1 // Copyright 2018 The Go Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style
3 // license that can be found in the LICENSE file.
4
5 (Last ___) => v.Args[len(v.Args)-1]
6
7 // Lowering arithmetic
8 (Add(64|32|16|8|Ptr) ...) => (I64Add ...)
9 (Add(64|32)F ...) => (F(64|32)Add ...)
10
11 (Sub(64|32|16|8|Ptr) ...) => (I64Sub ...)
12 (Sub(64|32)F ...) => (F(64|32)Sub ...)
13
14 (Mul(64|32|16|8) ...) => (I64Mul ...)
15 (Mul(64|32)F ...) => (F(64|32)Mul ...)
16
17 (Div64 [false] x y) => (I64DivS x y)
18 (Div32 [false] x y) => (I64DivS (SignExt32to64 x) (SignExt32to64 y))
19 (Div16 [false] x y) => (I64DivS (SignExt16to64 x) (SignExt16to64 y))
20 (Div8 x y) => (I64DivS (SignExt8to64 x) (SignExt8to64 y))
21 (Div64u ...) => (I64DivU ...)
22 (Div32u x y) => (I64DivU (ZeroExt32to64 x) (ZeroExt32to64 y))
23 (Div16u x y) => (I64DivU (ZeroExt16to64 x) (ZeroExt16to64 y))
24 (Div8u x y) => (I64DivU (ZeroExt8to64 x) (ZeroExt8to64 y))
25 (Div(64|32)F ...) => (F(64|32)Div ...)
26
27 (Mod64 [false] x y) => (I64RemS x y)
28 (Mod32 [false] x y) => (I64RemS (SignExt32to64 x) (SignExt32to64 y))
29 (Mod16 [false] x y) => (I64RemS (SignExt16to64 x) (SignExt16to64 y))
30 (Mod8 x y) => (I64RemS (SignExt8to64 x) (SignExt8to64 y))
31 (Mod64u ...) => (I64RemU ...)
32 (Mod32u x y) => (I64RemU (ZeroExt32to64 x) (ZeroExt32to64 y))
33 (Mod16u x y) => (I64RemU (ZeroExt16to64 x) (ZeroExt16to64 y))
34 (Mod8u x y) => (I64RemU (ZeroExt8to64 x) (ZeroExt8to64 y))
35
36 (And(64|32|16|8|B) ...) => (I64And ...)
37
38 (Or(64|32|16|8|B) ...) => (I64Or ...)
39
40 (Xor(64|32|16|8) ...) => (I64Xor ...)
41
42 (Neg(64|32|16|8) x) => (I64Sub (I64Const [0]) x)
43 (Neg(64|32)F ...) => (F(64|32)Neg ...)
44
45 (Com(64|32|16|8) x) => (I64Xor x (I64Const [-1]))
46
47 (Not ...) => (I64Eqz ...)
48
49 (Avg64u x y) => (I64Add (I64ShrU (I64Sub x y) (I64Const [1])) y)
50
51 // High word of multiply without carry bits; see Hacker's Delight, 2nd. ed, Figure 8-2, p. 174.
52 (Hmul64 <t> x y) =>
53 (Last <t>
54 x0: (ZeroExt32to64 x)
55 x1: (I64ShrS x (I64Const [32]))
56 y0: (ZeroExt32to64 y)
57 y1: (I64ShrS y (I64Const [32]))
58 x0y0: (I64Mul x0 y0)
59 tt: (I64Add (I64Mul x1 y0) (I64ShrU x0y0 (I64Const [32])))
60 w1: (I64Add (I64Mul x0 y1) (ZeroExt32to64 tt))
61 w2: (I64ShrS tt (I64Const [32]))
62 (I64Add (I64Add (I64Mul x1 y1) w2) (I64ShrS w1 (I64Const [32]))))
63
64 // Same as Hmul64 but signed shifts now unsigned.
65 (Hmul64u <t> x y) =>
66 (Last <t>
67 x0: (ZeroExt32to64 x)
68 x1: (I64ShrU x (I64Const [32]))
69 y0: (ZeroExt32to64 y)
70 y1: (I64ShrU y (I64Const [32]))
71 w0: (I64Mul x0 y0)
72 tt: (I64Add (I64Mul x1 y0) (I64ShrU w0 (I64Const [32])))
73 w1: (I64Add (I64Mul x0 y1) (ZeroExt32to64 tt))
74 w2: (I64ShrU tt (I64Const [32]))
75 hi: (I64Add (I64Add (I64Mul x1 y1) w2) (I64ShrU w1 (I64Const [32]))))
76
77 (Select0 <t> (Mul64uhilo x y)) => (Hmul64u <t> x y)
78 (Select1 <t> (Mul64uhilo x y)) => (I64Mul x y)
79
80 // Lowering pointer arithmetic
81 (OffPtr ...) => (I64AddConst ...)
82
83 // Lowering extension
84 // It is unnecessary to extend loads
85 (SignExt32to64 x:(I64Load32S _ _)) => x
86 (SignExt16to(64|32) x:(I64Load16S _ _)) => x
87 (SignExt8to(64|32|16) x:(I64Load8S _ _)) => x
88 (ZeroExt32to64 x:(I64Load32U _ _)) => x
89 (ZeroExt16to(64|32) x:(I64Load16U _ _)) => x
90 (ZeroExt8to(64|32|16) x:(I64Load8U _ _)) => x
91 (SignExt32to64 x) => (I64Extend32S x)
92 (SignExt8to(64|32|16) x) => (I64Extend8S x)
93 (SignExt16to(64|32) x) => (I64Extend16S x)
94 (ZeroExt32to64 x) => (I64And x (I64Const [0xffffffff]))
95 (ZeroExt16to(64|32) x) => (I64And x (I64Const [0xffff]))
96 (ZeroExt8to(64|32|16) x) => (I64And x (I64Const [0xff]))
97
98 (Slicemask x) => (I64ShrS (I64Sub (I64Const [0]) x) (I64Const [63]))
99
100 // Lowering truncation
101 // Because we ignore the high parts, truncates are just copies.
102 (Trunc64to(32|16|8) ...) => (Copy ...)
103 (Trunc32to(16|8) ...) => (Copy ...)
104 (Trunc16to8 ...) => (Copy ...)
105
106 // Lowering float <=> int
107 (Cvt32to(64|32)F x) => (F(64|32)ConvertI64S (SignExt32to64 x))
108 (Cvt64to(64|32)F ...) => (F(64|32)ConvertI64S ...)
109 (Cvt32Uto(64|32)F x) => (F(64|32)ConvertI64U (ZeroExt32to64 x))
110 (Cvt64Uto(64|32)F ...) => (F(64|32)ConvertI64U ...)
111
112 (Cvt32Fto32 ...) => (I64TruncSatF32S ...)
113 (Cvt32Fto64 ...) => (I64TruncSatF32S ...)
114 (Cvt64Fto32 ...) => (I64TruncSatF64S ...)
115 (Cvt64Fto64 ...) => (I64TruncSatF64S ...)
116 (Cvt32Fto32U ...) => (I64TruncSatF32U ...)
117 (Cvt32Fto64U ...) => (I64TruncSatF32U ...)
118 (Cvt64Fto32U ...) => (I64TruncSatF64U ...)
119 (Cvt64Fto64U ...) => (I64TruncSatF64U ...)
120
121 (Cvt32Fto64F ...) => (F64PromoteF32 ...)
122 (Cvt64Fto32F ...) => (F32DemoteF64 ...)
123
124 (CvtBoolToUint8 ...) => (Copy ...)
125
126 (Round32F ...) => (Copy ...)
127 (Round64F ...) => (Copy ...)
128
129 // Lowering shifts
130 // Unsigned shifts need to return 0 if shift amount is >= width of shifted value.
131
132 (Lsh64x64 x y) && ssa.ShiftIsBounded(v) => (I64Shl x y)
133 (Lsh64x64 x (I64Const [c])) && uint64(c) < 64 => (I64Shl x (I64Const [c]))
134 (Lsh64x64 x (I64Const [c])) && uint64(c) >= 64 => (I64Const [0])
135 (Lsh64x64 x y) => (Select (I64Shl x y) (I64Const [0]) (I64LtU y (I64Const [64])))
136 (Lsh64x(32|16|8) [c] x y) => (Lsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
137
138 (Lsh32x64 ...) => (Lsh64x64 ...)
139 (Lsh32x(32|16|8) [c] x y) => (Lsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
140
141 (Lsh16x64 ...) => (Lsh64x64 ...)
142 (Lsh16x(32|16|8) [c] x y) => (Lsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
143
144 (Lsh8x64 ...) => (Lsh64x64 ...)
145 (Lsh8x(32|16|8) [c] x y) => (Lsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
146
147 (Rsh64Ux64 x y) && ssa.ShiftIsBounded(v) => (I64ShrU x y)
148 (Rsh64Ux64 x (I64Const [c])) && uint64(c) < 64 => (I64ShrU x (I64Const [c]))
149 (Rsh64Ux64 x (I64Const [c])) && uint64(c) >= 64 => (I64Const [0])
150 (Rsh64Ux64 x y) => (Select (I64ShrU x y) (I64Const [0]) (I64LtU y (I64Const [64])))
151 (Rsh64Ux(32|16|8) [c] x y) => (Rsh64Ux64 [c] x (ZeroExt(32|16|8)to64 y))
152
153 (Rsh32Ux64 [c] x y) => (Rsh64Ux64 [c] (ZeroExt32to64 x) y)
154 (Rsh32Ux(32|16|8) [c] x y) => (Rsh64Ux64 [c] (ZeroExt32to64 x) (ZeroExt(32|16|8)to64 y))
155
156 (Rsh16Ux64 [c] x y) => (Rsh64Ux64 [c] (ZeroExt16to64 x) y)
157 (Rsh16Ux(32|16|8) [c] x y) => (Rsh64Ux64 [c] (ZeroExt16to64 x) (ZeroExt(32|16|8)to64 y))
158
159 (Rsh8Ux64 [c] x y) => (Rsh64Ux64 [c] (ZeroExt8to64 x) y)
160 (Rsh8Ux(32|16|8) [c] x y) => (Rsh64Ux64 [c] (ZeroExt8to64 x) (ZeroExt(32|16|8)to64 y))
161
162 // Signed right shift needs to return 0/-1 if shift amount is >= width of shifted value.
163 // We implement this by setting the shift value to (width - 1) if the shift value is >= width.
164
165 (Rsh64x64 x y) && ssa.ShiftIsBounded(v) => (I64ShrS x y)
166 (Rsh64x64 x (I64Const [c])) && uint64(c) < 64 => (I64ShrS x (I64Const [c]))
167 (Rsh64x64 x (I64Const [c])) && uint64(c) >= 64 => (I64ShrS x (I64Const [63]))
168 (Rsh64x64 x y) => (I64ShrS x (Select <typ.Int64> y (I64Const [63]) (I64LtU y (I64Const [64]))))
169 (Rsh64x(32|16|8) [c] x y) => (Rsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
170
171 (Rsh32x64 [c] x y) => (Rsh64x64 [c] (SignExt32to64 x) y)
172 (Rsh32x(32|16|8) [c] x y) => (Rsh64x64 [c] (SignExt32to64 x) (ZeroExt(32|16|8)to64 y))
173
174 (Rsh16x64 [c] x y) => (Rsh64x64 [c] (SignExt16to64 x) y)
175 (Rsh16x(32|16|8) [c] x y) => (Rsh64x64 [c] (SignExt16to64 x) (ZeroExt(32|16|8)to64 y))
176
177 (Rsh8x64 [c] x y) => (Rsh64x64 [c] (SignExt8to64 x) y)
178 (Rsh8x(32|16|8) [c] x y) => (Rsh64x64 [c] (SignExt8to64 x) (ZeroExt(32|16|8)to64 y))
179
180 // Lowering rotates
181 (RotateLeft8 <t> x (I64Const [c])) => (Or8 (Lsh8x64 <t> x (I64Const [c&7])) (Rsh8Ux64 <t> x (I64Const [-c&7])))
182 (RotateLeft16 <t> x (I64Const [c])) => (Or16 (Lsh16x64 <t> x (I64Const [c&15])) (Rsh16Ux64 <t> x (I64Const [-c&15])))
183 (RotateLeft32 ...) => (I32Rotl ...)
184 (RotateLeft64 ...) => (I64Rotl ...)
185
186 // Lowering comparisons
187 (Less64 ...) => (I64LtS ...)
188 (Less32 x y) => (I64LtS (SignExt32to64 x) (SignExt32to64 y))
189 (Less16 x y) => (I64LtS (SignExt16to64 x) (SignExt16to64 y))
190 (Less8 x y) => (I64LtS (SignExt8to64 x) (SignExt8to64 y))
191 (Less64U ...) => (I64LtU ...)
192 (Less32U x y) => (I64LtU (ZeroExt32to64 x) (ZeroExt32to64 y))
193 (Less16U x y) => (I64LtU (ZeroExt16to64 x) (ZeroExt16to64 y))
194 (Less8U x y) => (I64LtU (ZeroExt8to64 x) (ZeroExt8to64 y))
195 (Less(64|32)F ...) => (F(64|32)Lt ...)
196
197 (Leq64 ...) => (I64LeS ...)
198 (Leq32 x y) => (I64LeS (SignExt32to64 x) (SignExt32to64 y))
199 (Leq16 x y) => (I64LeS (SignExt16to64 x) (SignExt16to64 y))
200 (Leq8 x y) => (I64LeS (SignExt8to64 x) (SignExt8to64 y))
201 (Leq64U ...) => (I64LeU ...)
202 (Leq32U x y) => (I64LeU (ZeroExt32to64 x) (ZeroExt32to64 y))
203 (Leq16U x y) => (I64LeU (ZeroExt16to64 x) (ZeroExt16to64 y))
204 (Leq8U x y) => (I64LeU (ZeroExt8to64 x) (ZeroExt8to64 y))
205 (Leq(64|32)F ...) => (F(64|32)Le ...)
206
207 (Eq64 ...) => (I64Eq ...)
208 (Eq32 x y) => (I64Eq (ZeroExt32to64 x) (ZeroExt32to64 y))
209 (Eq16 x y) => (I64Eq (ZeroExt16to64 x) (ZeroExt16to64 y))
210 (Eq8 x y) => (I64Eq (ZeroExt8to64 x) (ZeroExt8to64 y))
211 (EqB ...) => (I64Eq ...)
212 (EqPtr ...) => (I64Eq ...)
213 (Eq(64|32)F ...) => (F(64|32)Eq ...)
214
215 (Neq64 ...) => (I64Ne ...)
216 (Neq32 x y) => (I64Ne (ZeroExt32to64 x) (ZeroExt32to64 y))
217 (Neq16 x y) => (I64Ne (ZeroExt16to64 x) (ZeroExt16to64 y))
218 (Neq8 x y) => (I64Ne (ZeroExt8to64 x) (ZeroExt8to64 y))
219 (NeqB ...) => (I64Ne ...)
220 (NeqPtr ...) => (I64Ne ...)
221 (Neq(64|32)F ...) => (F(64|32)Ne ...)
222
223 // Lowering loads
224 (Load <t> ptr mem) && ssa.Is32BitFloat(t) => (F32Load ptr mem)
225 (Load <t> ptr mem) && ssa.Is64BitFloat(t) => (F64Load ptr mem)
226 (Load <t> ptr mem) && t.Size() == 16 => (V128Load ptr mem)
227 (Load <t> ptr mem) && t.Size() == 8 => (I64Load ptr mem)
228 (Load <t> ptr mem) && t.Size() == 4 && !t.IsSigned() => (I64Load32U ptr mem)
229 (Load <t> ptr mem) && t.Size() == 4 && t.IsSigned() => (I64Load32S ptr mem)
230 (Load <t> ptr mem) && t.Size() == 2 && !t.IsSigned() => (I64Load16U ptr mem)
231 (Load <t> ptr mem) && t.Size() == 2 && t.IsSigned() => (I64Load16S ptr mem)
232 (Load <t> ptr mem) && t.Size() == 1 && !t.IsSigned() => (I64Load8U ptr mem)
233 (Load <t> ptr mem) && t.Size() == 1 && t.IsSigned() => (I64Load8S ptr mem)
234
235 // Lowering stores
236 (Store {t} ptr val mem) && ssa.Is64BitFloat(t) => (F64Store ptr val mem)
237 (Store {t} ptr val mem) && ssa.Is32BitFloat(t) => (F32Store ptr val mem)
238 (Store {t} ptr val mem) && t.Size() == 16 => (V128Store ptr val mem)
239 (Store {t} ptr val mem) && t.Size() == 8 => (I64Store ptr val mem)
240 (Store {t} ptr val mem) && t.Size() == 4 => (I64Store32 ptr val mem)
241 (Store {t} ptr val mem) && t.Size() == 2 => (I64Store16 ptr val mem)
242 (Store {t} ptr val mem) && t.Size() == 1 => (I64Store8 ptr val mem)
243
244 (ZeroSIMD ...) => (V128Zero ...)
245
246 // Lowering moves
247 (Move [0] _ _ mem) => mem
248 (Move [1] dst src mem) => (I64Store8 dst (I64Load8U src mem) mem)
249 (Move [2] dst src mem) => (I64Store16 dst (I64Load16U src mem) mem)
250 (Move [4] dst src mem) => (I64Store32 dst (I64Load32U src mem) mem)
251 (Move [8] dst src mem) => (I64Store dst (I64Load src mem) mem)
252 (Move [16] dst src mem) =>
253 (I64Store [8] dst (I64Load [8] src mem)
254 (I64Store dst (I64Load src mem) mem))
255 (Move [3] dst src mem) =>
256 (I64Store8 [2] dst (I64Load8U [2] src mem)
257 (I64Store16 dst (I64Load16U src mem) mem))
258 (Move [5] dst src mem) =>
259 (I64Store8 [4] dst (I64Load8U [4] src mem)
260 (I64Store32 dst (I64Load32U src mem) mem))
261 (Move [6] dst src mem) =>
262 (I64Store16 [4] dst (I64Load16U [4] src mem)
263 (I64Store32 dst (I64Load32U src mem) mem))
264 (Move [7] dst src mem) =>
265 (I64Store32 [3] dst (I64Load32U [3] src mem)
266 (I64Store32 dst (I64Load32U src mem) mem))
267 (Move [s] dst src mem) && s > 8 && s < 16 =>
268 (I64Store [s-8] dst (I64Load [s-8] src mem)
269 (I64Store dst (I64Load src mem) mem))
270
271 // Large copying uses helper.
272 (Move [s] dst src mem) && ssa.LogLargeCopyValue(v, s) =>
273 (LoweredMove [s] dst src mem)
274
275 // Lowering Zero instructions
276 (Zero [0] _ mem) => mem
277 (Zero [1] destptr mem) => (I64Store8 destptr (I64Const [0]) mem)
278 (Zero [2] destptr mem) => (I64Store16 destptr (I64Const [0]) mem)
279 (Zero [4] destptr mem) => (I64Store32 destptr (I64Const [0]) mem)
280 (Zero [8] destptr mem) => (I64Store destptr (I64Const [0]) mem)
281
282 (Zero [3] destptr mem) =>
283 (I64Store8 [2] destptr (I64Const [0])
284 (I64Store16 destptr (I64Const [0]) mem))
285 (Zero [5] destptr mem) =>
286 (I64Store8 [4] destptr (I64Const [0])
287 (I64Store32 destptr (I64Const [0]) mem))
288 (Zero [6] destptr mem) =>
289 (I64Store16 [4] destptr (I64Const [0])
290 (I64Store32 destptr (I64Const [0]) mem))
291 (Zero [7] destptr mem) =>
292 (I64Store32 [3] destptr (I64Const [0])
293 (I64Store32 destptr (I64Const [0]) mem))
294
295 // Strip off any fractional word zeroing.
296 (Zero [s] destptr mem) && s%8 != 0 && s > 8 && s < 32 =>
297 (Zero [s-s%8] (OffPtr <destptr.Type> destptr [s%8])
298 (I64Store destptr (I64Const [0]) mem))
299
300 // Zero small numbers of words directly.
301 (Zero [16] destptr mem) =>
302 (I64Store [8] destptr (I64Const [0])
303 (I64Store destptr (I64Const [0]) mem))
304 (Zero [24] destptr mem) =>
305 (I64Store [16] destptr (I64Const [0])
306 (I64Store [8] destptr (I64Const [0])
307 (I64Store destptr (I64Const [0]) mem)))
308 (Zero [32] destptr mem) =>
309 (I64Store [24] destptr (I64Const [0])
310 (I64Store [16] destptr (I64Const [0])
311 (I64Store [8] destptr (I64Const [0])
312 (I64Store destptr (I64Const [0]) mem))))
313
314 // Large zeroing uses helper.
315 (Zero [s] destptr mem) =>
316 (LoweredZero [s] destptr mem)
317
318 // Lowering constants
319 (Const64 ...) => (I64Const ...)
320 (Const(32|16|8) [c]) => (I64Const [int64(c)])
321 (Const(64|32)F ...) => (F(64|32)Const ...)
322 (ConstNil) => (I64Const [0])
323 (ConstBool [c]) => (I64Const [ssa.B2i(c)])
324
325 // Lowering calls
326 (StaticCall ...) => (LoweredStaticCall ...)
327 (ClosureCall ...) => (LoweredClosureCall ...)
328 (InterCall ...) => (LoweredInterCall ...)
329 (TailCall ...) => (LoweredTailCall ...)
330 (TailCallInter ...) => (LoweredTailCallInter ...)
331
332 // Miscellaneous
333 (Convert ...) => (LoweredConvert ...)
334 (IsNonNil p) => (I64Eqz (I64Eqz p))
335 (IsInBounds ...) => (I64LtU ...)
336 (IsSliceInBounds ...) => (I64LeU ...)
337 (NilCheck ...) => (LoweredNilCheck ...)
338 (GetClosurePtr ...) => (LoweredGetClosurePtr ...)
339 (GetCallerPC ...) => (LoweredGetCallerPC ...)
340 (GetCallerSP ...) => (LoweredGetCallerSP ...)
341 (Addr {sym} base) => (LoweredAddr {sym} [0] base)
342 (LocalAddr <t> {sym} base mem) && t.Elem().HasPointers() => (LoweredAddr {sym} (SPanchored base mem))
343 (LocalAddr <t> {sym} base _) && !t.Elem().HasPointers() => (LoweredAddr {sym} base)
344
345 // Write barrier.
346 (WB ...) => (LoweredWB ...)
347
348 // --- Intrinsics ---
349 (Sqrt ...) => (F64Sqrt ...)
350 (Trunc ...) => (F64Trunc ...)
351 (Ceil ...) => (F64Ceil ...)
352 (Floor ...) => (F64Floor ...)
353 (RoundToEven ...) => (F64Nearest ...)
354 (Abs ...) => (F64Abs ...)
355 (Copysign ...) => (F64Copysign ...)
356
357 (F32DemoteF64 (F64(Sqrt|Trunc|Ceil|Floor|Nearest|Abs) (F64PromoteF32 x))) => (F32(Sqrt|Trunc|Ceil|Floor|Nearest|Abs) x)
358 (F32DemoteF64 (F64Copysign (F64PromoteF32 x) (F64PromoteF32 y))) => (F32Copysign x y)
359
360 (Sqrt32 ...) => (F32Sqrt ...)
361
362 (Ctz64 ...) => (I64Ctz ...)
363 (Ctz32 x) => (I64Ctz (I64Or x (I64Const [0x100000000])))
364 (Ctz16 x) => (I64Ctz (I64Or x (I64Const [0x10000])))
365 (Ctz8 x) => (I64Ctz (I64Or x (I64Const [0x100])))
366
367 (Ctz(64|32|16|8)NonZero ...) => (I64Ctz ...)
368
369 (BitLen64 x) => (I64Sub (I64Const [64]) (I64Clz x))
370 (BitLen(32|16|8) x) => (BitLen64 (ZeroExt(32|16|8)to64 x))
371
372 (PopCount64 ...) => (I64Popcnt ...)
373 (PopCount32 x) => (I64Popcnt (ZeroExt32to64 x))
374 (PopCount16 x) => (I64Popcnt (ZeroExt16to64 x))
375 (PopCount8 x) => (I64Popcnt (ZeroExt8to64 x))
376
377 (CondSelect ...) => (Select ...)
378
379 // --- Optimizations ---
380 (I64Add (I64Const [x]) (I64Const [y])) => (I64Const [x + y])
381 (I64Sub (I64Const [x]) (I64Const [y])) => (I64Const [x - y])
382 (I64Mul (I64Const [x]) (I64Const [y])) => (I64Const [x * y])
383 (I64And (I64Const [x]) (I64Const [y])) => (I64Const [x & y])
384 (I64Or (I64Const [x]) (I64Const [y])) => (I64Const [x | y])
385 (I64Xor (I64Const [x]) (I64Const [y])) => (I64Const [x ^ y])
386 (F64Add (F64Const [x]) (F64Const [y])) => (F64Const [x + y])
387 (F64Mul (F64Const [x]) (F64Const [y])) && !math.IsNaN(x * y) => (F64Const [x * y])
388 (I64Eq (I64Const [x]) (I64Const [y])) && x == y => (I64Const [1])
389 (I64Eq (I64Const [x]) (I64Const [y])) && x != y => (I64Const [0])
390 (I64Ne (I64Const [x]) (I64Const [y])) && x == y => (I64Const [0])
391 (I64Ne (I64Const [x]) (I64Const [y])) && x != y => (I64Const [1])
392
393 (I64Shl (I64Const [x]) (I64Const [y])) => (I64Const [x << uint64(y)])
394 (I64ShrU (I64Const [x]) (I64Const [y])) => (I64Const [int64(uint64(x) >> uint64(y))])
395 (I64ShrS (I64Const [x]) (I64Const [y])) => (I64Const [x >> uint64(y)])
396
397 // Identity and absorption rules for AND/OR/XOR/MUL.
398 // These fire on nodes created during or after lowering.
399 (I64And x (I64Const [-1])) => x
400 (I64And x (I64Const [0])) => (I64Const [0])
401 (I64Or x (I64Const [0])) => x
402 (I64Or x (I64Const [-1])) => (I64Const [-1])
403 (I64Xor x (I64Const [0])) => x
404 (I64Mul x (I64Const [0])) => (I64Const [0])
405 (I64Mul x (I64Const [1])) => x
406
407 // Double-mask elimination: cascaded zero-extensions produce
408 // (I64And (I64And x C1) C2) which can be collapsed to a single mask.
409 (I64And (I64And x (I64Const [c1])) (I64Const [c2])) => (I64And x (I64Const [c1 & c2]))
410
411 // Redundant sign-extensions: idempotent and narrower-subsumes-wider.
412 (I64Extend32S (I64Extend32S x)) => (I64Extend32S x)
413 (I64Extend16S (I64Extend16S x)) => (I64Extend16S x)
414 (I64Extend8S (I64Extend8S x)) => (I64Extend8S x)
415 (I64Extend32S (I64Extend16S x)) => (I64Extend16S x)
416 (I64Extend32S (I64Extend8S x)) => (I64Extend8S x)
417 (I64Extend16S (I64Extend8S x)) => (I64Extend8S x)
418
419 // Sign-extend of a value already zero-extended from fewer bits is a no-op.
420 // E.g. (I64Extend32S (I64And x (I64Const [0xff]))) — top 33 bits are already
421 // zero, so sign-extending from 32 is identity.
422 (I64Extend32S x:(I64And _ (I64Const [c]))) && c >= 0 && int64(int32(c)) == c => x
423 (I64Extend16S x:(I64And _ (I64Const [c]))) && c >= 0 && int64(int16(c)) == c => x
424 (I64Extend8S x:(I64And _ (I64Const [c]))) && c >= 0 && int64(int8(c)) == c => x
425
426 // TODO: declare these operations as commutative and get rid of these rules?
427 (I64Add (I64Const [x]) y) && y.Op != ssaop.OpWasmI64Const => (I64Add y (I64Const [x]))
428 (I64Mul (I64Const [x]) y) && y.Op != ssaop.OpWasmI64Const => (I64Mul y (I64Const [x]))
429 (I64And (I64Const [x]) y) && y.Op != ssaop.OpWasmI64Const => (I64And y (I64Const [x]))
430 (I64Or (I64Const [x]) y) && y.Op != ssaop.OpWasmI64Const => (I64Or y (I64Const [x]))
431 (I64Xor (I64Const [x]) y) && y.Op != ssaop.OpWasmI64Const => (I64Xor y (I64Const [x]))
432 (F64Add (F64Const [x]) y) && y.Op != ssaop.OpWasmF64Const => (F64Add y (F64Const [x]))
433 (F64Mul (F64Const [x]) y) && y.Op != ssaop.OpWasmF64Const => (F64Mul y (F64Const [x]))
434 (I64Eq (I64Const [x]) y) && y.Op != ssaop.OpWasmI64Const => (I64Eq y (I64Const [x]))
435 (I64Ne (I64Const [x]) y) && y.Op != ssaop.OpWasmI64Const => (I64Ne y (I64Const [x]))
436
437 (I64Eq x (I64Const [0])) => (I64Eqz x)
438 (I64LtU (I64Const [0]) x) => (I64Eqz (I64Eqz x))
439 (I64LeU x (I64Const [0])) => (I64Eqz x)
440 (I64LtU x (I64Const [1])) => (I64Eqz x)
441 (I64LeU (I64Const [1]) x) => (I64Eqz (I64Eqz x))
442 (I64Ne x (I64Const [0])) => (I64Eqz (I64Eqz x))
443
444 (I64Add x (I64Const <t> [y])) && !t.IsPtr() => (I64AddConst [y] x)
445 (I64AddConst [0] x) => x
446 (I64Eqz (I64Eqz (I64Eqz x))) => (I64Eqz x)
447
448 // folding offset into load/store
449 ((I64Load|I64Load32U|I64Load32S|I64Load16U|I64Load16S|I64Load8U|I64Load8S) [off] (I64AddConst [off2] ptr) mem)
450 && ssa.IsU32Bit(off+off2) =>
451 ((I64Load|I64Load32U|I64Load32S|I64Load16U|I64Load16S|I64Load8U|I64Load8S) [off+off2] ptr mem)
452
453 ((I64Store|I64Store32|I64Store16|I64Store8) [off] (I64AddConst [off2] ptr) val mem)
454 && ssa.IsU32Bit(off+off2) =>
455 ((I64Store|I64Store32|I64Store16|I64Store8) [off+off2] ptr val mem)
456
457 // folding offset into address
458 (I64AddConst [off] (LoweredAddr {sym} [off2] base)) && ssa.IsU32Bit(off+int64(off2)) =>
459 (LoweredAddr {sym} [int32(off)+off2] base)
460 (I64AddConst [off] x:(SP)) && ssa.IsU32Bit(off) => (LoweredAddr [int32(off)] x) // so it is rematerializeable
461
462 // transforming readonly globals into constants
463 (I64Load [off] (LoweredAddr {sym} [off2] (SB)) _) && ssa.SymIsRO(sym) && ssa.IsU32Bit(off+int64(off2)) => (I64Const [int64(ssa.Read64(sym, off+int64(off2), config.Ctxt.Arch.ByteOrder))])
464 (I64Load32U [off] (LoweredAddr {sym} [off2] (SB)) _) && ssa.SymIsRO(sym) && ssa.IsU32Bit(off+int64(off2)) => (I64Const [int64(ssa.Read32(sym, off+int64(off2), config.Ctxt.Arch.ByteOrder))])
465 (I64Load16U [off] (LoweredAddr {sym} [off2] (SB)) _) && ssa.SymIsRO(sym) && ssa.IsU32Bit(off+int64(off2)) => (I64Const [int64(ssa.Read16(sym, off+int64(off2), config.Ctxt.Arch.ByteOrder))])
466 (I64Load8U [off] (LoweredAddr {sym} [off2] (SB)) _) && ssa.SymIsRO(sym) && ssa.IsU32Bit(off+int64(off2)) => (I64Const [int64(ssa.Read8(sym, off+int64(off2)))])
467 (I64Load32S [off] (LoweredAddr {sym} [off2] (SB)) _) && ssa.SymIsRO(sym) && ssa.IsU32Bit(off+int64(off2)) => (I64Const [int64(int32(ssa.Read32(sym, off+int64(off2), config.Ctxt.Arch.ByteOrder)))])
468 (I64Load16S [off] (LoweredAddr {sym} [off2] (SB)) _) && ssa.SymIsRO(sym) && ssa.IsU32Bit(off+int64(off2)) => (I64Const [int64(int16(ssa.Read16(sym, off+int64(off2), config.Ctxt.Arch.ByteOrder)))])
469 (I64Load8S [off] (LoweredAddr {sym} [off2] (SB)) _) && ssa.SymIsRO(sym) && ssa.IsU32Bit(off+int64(off2)) => (I64Const [int64(int8(ssa.Read8(sym, off+int64(off2))))])
470
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