1 // Copyright 2018 The Go Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style
3 // license that can be found in the LICENSE file.
4
5 // Lowering arithmetic
6 (Add(64|32|16|8|Ptr) ...) => (I64Add ...)
7 (Add(64|32)F ...) => (F(64|32)Add ...)
8
9 (Sub(64|32|16|8|Ptr) ...) => (I64Sub ...)
10 (Sub(64|32)F ...) => (F(64|32)Sub ...)
11
12 (Mul(64|32|16|8) ...) => (I64Mul ...)
13 (Mul(64|32)F ...) => (F(64|32)Mul ...)
14
15 (Div64 [false] x y) => (I64DivS x y)
16 (Div32 [false] x y) => (I64DivS (SignExt32to64 x) (SignExt32to64 y))
17 (Div16 [false] x y) => (I64DivS (SignExt16to64 x) (SignExt16to64 y))
18 (Div8 x y) => (I64DivS (SignExt8to64 x) (SignExt8to64 y))
19 (Div64u ...) => (I64DivU ...)
20 (Div32u x y) => (I64DivU (ZeroExt32to64 x) (ZeroExt32to64 y))
21 (Div16u x y) => (I64DivU (ZeroExt16to64 x) (ZeroExt16to64 y))
22 (Div8u x y) => (I64DivU (ZeroExt8to64 x) (ZeroExt8to64 y))
23 (Div(64|32)F ...) => (F(64|32)Div ...)
24
25 (Mod64 [false] x y) => (I64RemS x y)
26 (Mod32 [false] x y) => (I64RemS (SignExt32to64 x) (SignExt32to64 y))
27 (Mod16 [false] x y) => (I64RemS (SignExt16to64 x) (SignExt16to64 y))
28 (Mod8 x y) => (I64RemS (SignExt8to64 x) (SignExt8to64 y))
29 (Mod64u ...) => (I64RemU ...)
30 (Mod32u x y) => (I64RemU (ZeroExt32to64 x) (ZeroExt32to64 y))
31 (Mod16u x y) => (I64RemU (ZeroExt16to64 x) (ZeroExt16to64 y))
32 (Mod8u x y) => (I64RemU (ZeroExt8to64 x) (ZeroExt8to64 y))
33
34 (And(64|32|16|8|B) ...) => (I64And ...)
35
36 (Or(64|32|16|8|B) ...) => (I64Or ...)
37
38 (Xor(64|32|16|8) ...) => (I64Xor ...)
39
40 (Neg(64|32|16|8) x) => (I64Sub (I64Const [0]) x)
41 (Neg(64|32)F ...) => (F(64|32)Neg ...)
42
43 (Com(64|32|16|8) x) => (I64Xor x (I64Const [-1]))
44
45 (Not ...) => (I64Eqz ...)
46
47 // Lowering pointer arithmetic
48 (OffPtr ...) => (I64AddConst ...)
49
50 // Lowering extension
51 // It is unnecessary to extend loads
52 (SignExt32to64 x:(I64Load32S _ _)) => x
53 (SignExt16to(64|32) x:(I64Load16S _ _)) => x
54 (SignExt8to(64|32|16) x:(I64Load8S _ _)) => x
55 (ZeroExt32to64 x:(I64Load32U _ _)) => x
56 (ZeroExt16to(64|32) x:(I64Load16U _ _)) => x
57 (ZeroExt8to(64|32|16) x:(I64Load8U _ _)) => x
58 (SignExt32to64 x) => (I64Extend32S x)
59 (SignExt8to(64|32|16) x) => (I64Extend8S x)
60 (SignExt16to(64|32) x) => (I64Extend16S x)
61 (ZeroExt32to64 x) => (I64And x (I64Const [0xffffffff]))
62 (ZeroExt16to(64|32) x) => (I64And x (I64Const [0xffff]))
63 (ZeroExt8to(64|32|16) x) => (I64And x (I64Const [0xff]))
64
65 (Slicemask x) => (I64ShrS (I64Sub (I64Const [0]) x) (I64Const [63]))
66
67 // Lowering truncation
68 // Because we ignore the high parts, truncates are just copies.
69 (Trunc64to(32|16|8) ...) => (Copy ...)
70 (Trunc32to(16|8) ...) => (Copy ...)
71 (Trunc16to8 ...) => (Copy ...)
72
73 // Lowering float <=> int
74 (Cvt32to(64|32)F x) => (F(64|32)ConvertI64S (SignExt32to64 x))
75 (Cvt64to(64|32)F ...) => (F(64|32)ConvertI64S ...)
76 (Cvt32Uto(64|32)F x) => (F(64|32)ConvertI64U (ZeroExt32to64 x))
77 (Cvt64Uto(64|32)F ...) => (F(64|32)ConvertI64U ...)
78
79 (Cvt32Fto32 ...) => (I64TruncSatF32S ...)
80 (Cvt32Fto64 ...) => (I64TruncSatF32S ...)
81 (Cvt64Fto32 ...) => (I64TruncSatF64S ...)
82 (Cvt64Fto64 ...) => (I64TruncSatF64S ...)
83 (Cvt32Fto32U ...) => (I64TruncSatF32U ...)
84 (Cvt32Fto64U ...) => (I64TruncSatF32U ...)
85 (Cvt64Fto32U ...) => (I64TruncSatF64U ...)
86 (Cvt64Fto64U ...) => (I64TruncSatF64U ...)
87
88 (Cvt32Fto64F ...) => (F64PromoteF32 ...)
89 (Cvt64Fto32F ...) => (F32DemoteF64 ...)
90
91 (CvtBoolToUint8 ...) => (Copy ...)
92
93 (Round32F ...) => (Copy ...)
94 (Round64F ...) => (Copy ...)
95
96 // Lowering shifts
97 // Unsigned shifts need to return 0 if shift amount is >= width of shifted value.
98
99 (Lsh64x64 x y) && shiftIsBounded(v) => (I64Shl x y)
100 (Lsh64x64 x (I64Const [c])) && uint64(c) < 64 => (I64Shl x (I64Const [c]))
101 (Lsh64x64 x (I64Const [c])) && uint64(c) >= 64 => (I64Const [0])
102 (Lsh64x64 x y) => (Select (I64Shl x y) (I64Const [0]) (I64LtU y (I64Const [64])))
103 (Lsh64x(32|16|8) [c] x y) => (Lsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
104
105 (Lsh32x64 ...) => (Lsh64x64 ...)
106 (Lsh32x(32|16|8) [c] x y) => (Lsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
107
108 (Lsh16x64 ...) => (Lsh64x64 ...)
109 (Lsh16x(32|16|8) [c] x y) => (Lsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
110
111 (Lsh8x64 ...) => (Lsh64x64 ...)
112 (Lsh8x(32|16|8) [c] x y) => (Lsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
113
114 (Rsh64Ux64 x y) && shiftIsBounded(v) => (I64ShrU x y)
115 (Rsh64Ux64 x (I64Const [c])) && uint64(c) < 64 => (I64ShrU x (I64Const [c]))
116 (Rsh64Ux64 x (I64Const [c])) && uint64(c) >= 64 => (I64Const [0])
117 (Rsh64Ux64 x y) => (Select (I64ShrU x y) (I64Const [0]) (I64LtU y (I64Const [64])))
118 (Rsh64Ux(32|16|8) [c] x y) => (Rsh64Ux64 [c] x (ZeroExt(32|16|8)to64 y))
119
120 (Rsh32Ux64 [c] x y) => (Rsh64Ux64 [c] (ZeroExt32to64 x) y)
121 (Rsh32Ux(32|16|8) [c] x y) => (Rsh64Ux64 [c] (ZeroExt32to64 x) (ZeroExt(32|16|8)to64 y))
122
123 (Rsh16Ux64 [c] x y) => (Rsh64Ux64 [c] (ZeroExt16to64 x) y)
124 (Rsh16Ux(32|16|8) [c] x y) => (Rsh64Ux64 [c] (ZeroExt16to64 x) (ZeroExt(32|16|8)to64 y))
125
126 (Rsh8Ux64 [c] x y) => (Rsh64Ux64 [c] (ZeroExt8to64 x) y)
127 (Rsh8Ux(32|16|8) [c] x y) => (Rsh64Ux64 [c] (ZeroExt8to64 x) (ZeroExt(32|16|8)to64 y))
128
129 // Signed right shift needs to return 0/-1 if shift amount is >= width of shifted value.
130 // We implement this by setting the shift value to (width - 1) if the shift value is >= width.
131
132 (Rsh64x64 x y) && shiftIsBounded(v) => (I64ShrS x y)
133 (Rsh64x64 x (I64Const [c])) && uint64(c) < 64 => (I64ShrS x (I64Const [c]))
134 (Rsh64x64 x (I64Const [c])) && uint64(c) >= 64 => (I64ShrS x (I64Const [63]))
135 (Rsh64x64 x y) => (I64ShrS x (Select <typ.Int64> y (I64Const [63]) (I64LtU y (I64Const [64]))))
136 (Rsh64x(32|16|8) [c] x y) => (Rsh64x64 [c] x (ZeroExt(32|16|8)to64 y))
137
138 (Rsh32x64 [c] x y) => (Rsh64x64 [c] (SignExt32to64 x) y)
139 (Rsh32x(32|16|8) [c] x y) => (Rsh64x64 [c] (SignExt32to64 x) (ZeroExt(32|16|8)to64 y))
140
141 (Rsh16x64 [c] x y) => (Rsh64x64 [c] (SignExt16to64 x) y)
142 (Rsh16x(32|16|8) [c] x y) => (Rsh64x64 [c] (SignExt16to64 x) (ZeroExt(32|16|8)to64 y))
143
144 (Rsh8x64 [c] x y) => (Rsh64x64 [c] (SignExt8to64 x) y)
145 (Rsh8x(32|16|8) [c] x y) => (Rsh64x64 [c] (SignExt8to64 x) (ZeroExt(32|16|8)to64 y))
146
147 // Lowering rotates
148 (RotateLeft8 <t> x (I64Const [c])) => (Or8 (Lsh8x64 <t> x (I64Const [c&7])) (Rsh8Ux64 <t> x (I64Const [-c&7])))
149 (RotateLeft16 <t> x (I64Const [c])) => (Or16 (Lsh16x64 <t> x (I64Const [c&15])) (Rsh16Ux64 <t> x (I64Const [-c&15])))
150 (RotateLeft32 ...) => (I32Rotl ...)
151 (RotateLeft64 ...) => (I64Rotl ...)
152
153 // Lowering comparisons
154 (Less64 ...) => (I64LtS ...)
155 (Less32 x y) => (I64LtS (SignExt32to64 x) (SignExt32to64 y))
156 (Less16 x y) => (I64LtS (SignExt16to64 x) (SignExt16to64 y))
157 (Less8 x y) => (I64LtS (SignExt8to64 x) (SignExt8to64 y))
158 (Less64U ...) => (I64LtU ...)
159 (Less32U x y) => (I64LtU (ZeroExt32to64 x) (ZeroExt32to64 y))
160 (Less16U x y) => (I64LtU (ZeroExt16to64 x) (ZeroExt16to64 y))
161 (Less8U x y) => (I64LtU (ZeroExt8to64 x) (ZeroExt8to64 y))
162 (Less(64|32)F ...) => (F(64|32)Lt ...)
163
164 (Leq64 ...) => (I64LeS ...)
165 (Leq32 x y) => (I64LeS (SignExt32to64 x) (SignExt32to64 y))
166 (Leq16 x y) => (I64LeS (SignExt16to64 x) (SignExt16to64 y))
167 (Leq8 x y) => (I64LeS (SignExt8to64 x) (SignExt8to64 y))
168 (Leq64U ...) => (I64LeU ...)
169 (Leq32U x y) => (I64LeU (ZeroExt32to64 x) (ZeroExt32to64 y))
170 (Leq16U x y) => (I64LeU (ZeroExt16to64 x) (ZeroExt16to64 y))
171 (Leq8U x y) => (I64LeU (ZeroExt8to64 x) (ZeroExt8to64 y))
172 (Leq(64|32)F ...) => (F(64|32)Le ...)
173
174 (Eq64 ...) => (I64Eq ...)
175 (Eq32 x y) => (I64Eq (ZeroExt32to64 x) (ZeroExt32to64 y))
176 (Eq16 x y) => (I64Eq (ZeroExt16to64 x) (ZeroExt16to64 y))
177 (Eq8 x y) => (I64Eq (ZeroExt8to64 x) (ZeroExt8to64 y))
178 (EqB ...) => (I64Eq ...)
179 (EqPtr ...) => (I64Eq ...)
180 (Eq(64|32)F ...) => (F(64|32)Eq ...)
181
182 (Neq64 ...) => (I64Ne ...)
183 (Neq32 x y) => (I64Ne (ZeroExt32to64 x) (ZeroExt32to64 y))
184 (Neq16 x y) => (I64Ne (ZeroExt16to64 x) (ZeroExt16to64 y))
185 (Neq8 x y) => (I64Ne (ZeroExt8to64 x) (ZeroExt8to64 y))
186 (NeqB ...) => (I64Ne ...)
187 (NeqPtr ...) => (I64Ne ...)
188 (Neq(64|32)F ...) => (F(64|32)Ne ...)
189
190 // Lowering loads
191 (Load <t> ptr mem) && is32BitFloat(t) => (F32Load ptr mem)
192 (Load <t> ptr mem) && is64BitFloat(t) => (F64Load ptr mem)
193 (Load <t> ptr mem) && t.Size() == 8 => (I64Load ptr mem)
194 (Load <t> ptr mem) && t.Size() == 4 && !t.IsSigned() => (I64Load32U ptr mem)
195 (Load <t> ptr mem) && t.Size() == 4 && t.IsSigned() => (I64Load32S ptr mem)
196 (Load <t> ptr mem) && t.Size() == 2 && !t.IsSigned() => (I64Load16U ptr mem)
197 (Load <t> ptr mem) && t.Size() == 2 && t.IsSigned() => (I64Load16S ptr mem)
198 (Load <t> ptr mem) && t.Size() == 1 && !t.IsSigned() => (I64Load8U ptr mem)
199 (Load <t> ptr mem) && t.Size() == 1 && t.IsSigned() => (I64Load8S ptr mem)
200
201 // Lowering stores
202 (Store {t} ptr val mem) && is64BitFloat(t) => (F64Store ptr val mem)
203 (Store {t} ptr val mem) && is32BitFloat(t) => (F32Store ptr val mem)
204 (Store {t} ptr val mem) && t.Size() == 8 => (I64Store ptr val mem)
205 (Store {t} ptr val mem) && t.Size() == 4 => (I64Store32 ptr val mem)
206 (Store {t} ptr val mem) && t.Size() == 2 => (I64Store16 ptr val mem)
207 (Store {t} ptr val mem) && t.Size() == 1 => (I64Store8 ptr val mem)
208
209 // Lowering moves
210 (Move [0] _ _ mem) => mem
211 (Move [1] dst src mem) => (I64Store8 dst (I64Load8U src mem) mem)
212 (Move [2] dst src mem) => (I64Store16 dst (I64Load16U src mem) mem)
213 (Move [4] dst src mem) => (I64Store32 dst (I64Load32U src mem) mem)
214 (Move [8] dst src mem) => (I64Store dst (I64Load src mem) mem)
215 (Move [16] dst src mem) =>
216 (I64Store [8] dst (I64Load [8] src mem)
217 (I64Store dst (I64Load src mem) mem))
218 (Move [3] dst src mem) =>
219 (I64Store8 [2] dst (I64Load8U [2] src mem)
220 (I64Store16 dst (I64Load16U src mem) mem))
221 (Move [5] dst src mem) =>
222 (I64Store8 [4] dst (I64Load8U [4] src mem)
223 (I64Store32 dst (I64Load32U src mem) mem))
224 (Move [6] dst src mem) =>
225 (I64Store16 [4] dst (I64Load16U [4] src mem)
226 (I64Store32 dst (I64Load32U src mem) mem))
227 (Move [7] dst src mem) =>
228 (I64Store32 [3] dst (I64Load32U [3] src mem)
229 (I64Store32 dst (I64Load32U src mem) mem))
230 (Move [s] dst src mem) && s > 8 && s < 16 =>
231 (I64Store [s-8] dst (I64Load [s-8] src mem)
232 (I64Store dst (I64Load src mem) mem))
233
234 // Large copying uses helper.
235 (Move [s] dst src mem) && logLargeCopy(v, s) =>
236 (LoweredMove [s] dst src mem)
237
238 // Lowering Zero instructions
239 (Zero [0] _ mem) => mem
240 (Zero [1] destptr mem) => (I64Store8 destptr (I64Const [0]) mem)
241 (Zero [2] destptr mem) => (I64Store16 destptr (I64Const [0]) mem)
242 (Zero [4] destptr mem) => (I64Store32 destptr (I64Const [0]) mem)
243 (Zero [8] destptr mem) => (I64Store destptr (I64Const [0]) mem)
244
245 (Zero [3] destptr mem) =>
246 (I64Store8 [2] destptr (I64Const [0])
247 (I64Store16 destptr (I64Const [0]) mem))
248 (Zero [5] destptr mem) =>
249 (I64Store8 [4] destptr (I64Const [0])
250 (I64Store32 destptr (I64Const [0]) mem))
251 (Zero [6] destptr mem) =>
252 (I64Store16 [4] destptr (I64Const [0])
253 (I64Store32 destptr (I64Const [0]) mem))
254 (Zero [7] destptr mem) =>
255 (I64Store32 [3] destptr (I64Const [0])
256 (I64Store32 destptr (I64Const [0]) mem))
257
258 // Strip off any fractional word zeroing.
259 (Zero [s] destptr mem) && s%8 != 0 && s > 8 && s < 32 =>
260 (Zero [s-s%8] (OffPtr <destptr.Type> destptr [s%8])
261 (I64Store destptr (I64Const [0]) mem))
262
263 // Zero small numbers of words directly.
264 (Zero [16] destptr mem) =>
265 (I64Store [8] destptr (I64Const [0])
266 (I64Store destptr (I64Const [0]) mem))
267 (Zero [24] destptr mem) =>
268 (I64Store [16] destptr (I64Const [0])
269 (I64Store [8] destptr (I64Const [0])
270 (I64Store destptr (I64Const [0]) mem)))
271 (Zero [32] destptr mem) =>
272 (I64Store [24] destptr (I64Const [0])
273 (I64Store [16] destptr (I64Const [0])
274 (I64Store [8] destptr (I64Const [0])
275 (I64Store destptr (I64Const [0]) mem))))
276
277 // Large zeroing uses helper.
278 (Zero [s] destptr mem) =>
279 (LoweredZero [s] destptr mem)
280
281 // Lowering constants
282 (Const64 ...) => (I64Const ...)
283 (Const(32|16|8) [c]) => (I64Const [int64(c)])
284 (Const(64|32)F ...) => (F(64|32)Const ...)
285 (ConstNil) => (I64Const [0])
286 (ConstBool [c]) => (I64Const [b2i(c)])
287
288 // Lowering calls
289 (StaticCall ...) => (LoweredStaticCall ...)
290 (ClosureCall ...) => (LoweredClosureCall ...)
291 (InterCall ...) => (LoweredInterCall ...)
292 (TailCall ...) => (LoweredTailCall ...)
293
294 // Miscellaneous
295 (Convert ...) => (LoweredConvert ...)
296 (IsNonNil p) => (I64Eqz (I64Eqz p))
297 (IsInBounds ...) => (I64LtU ...)
298 (IsSliceInBounds ...) => (I64LeU ...)
299 (NilCheck ...) => (LoweredNilCheck ...)
300 (GetClosurePtr ...) => (LoweredGetClosurePtr ...)
301 (GetCallerPC ...) => (LoweredGetCallerPC ...)
302 (GetCallerSP ...) => (LoweredGetCallerSP ...)
303 (Addr {sym} base) => (LoweredAddr {sym} [0] base)
304 (LocalAddr <t> {sym} base mem) && t.Elem().HasPointers() => (LoweredAddr {sym} (SPanchored base mem))
305 (LocalAddr <t> {sym} base _) && !t.Elem().HasPointers() => (LoweredAddr {sym} base)
306
307 // Write barrier.
308 (WB ...) => (LoweredWB ...)
309
310 // --- Intrinsics ---
311 (Sqrt ...) => (F64Sqrt ...)
312 (Trunc ...) => (F64Trunc ...)
313 (Ceil ...) => (F64Ceil ...)
314 (Floor ...) => (F64Floor ...)
315 (RoundToEven ...) => (F64Nearest ...)
316 (Abs ...) => (F64Abs ...)
317 (Copysign ...) => (F64Copysign ...)
318
319 (Sqrt32 ...) => (F32Sqrt ...)
320
321 (Ctz64 ...) => (I64Ctz ...)
322 (Ctz32 x) => (I64Ctz (I64Or x (I64Const [0x100000000])))
323 (Ctz16 x) => (I64Ctz (I64Or x (I64Const [0x10000])))
324 (Ctz8 x) => (I64Ctz (I64Or x (I64Const [0x100])))
325
326 (Ctz(64|32|16|8)NonZero ...) => (I64Ctz ...)
327
328 (BitLen64 x) => (I64Sub (I64Const [64]) (I64Clz x))
329 (BitLen(32|16|8) x) => (BitLen64 (ZeroExt(32|16|8)to64 x))
330
331 (PopCount64 ...) => (I64Popcnt ...)
332 (PopCount32 x) => (I64Popcnt (ZeroExt32to64 x))
333 (PopCount16 x) => (I64Popcnt (ZeroExt16to64 x))
334 (PopCount8 x) => (I64Popcnt (ZeroExt8to64 x))
335
336 (CondSelect ...) => (Select ...)
337
338 // --- Optimizations ---
339 (I64Add (I64Const [x]) (I64Const [y])) => (I64Const [x + y])
340 (I64Mul (I64Const [x]) (I64Const [y])) => (I64Const [x * y])
341 (I64And (I64Const [x]) (I64Const [y])) => (I64Const [x & y])
342 (I64Or (I64Const [x]) (I64Const [y])) => (I64Const [x | y])
343 (I64Xor (I64Const [x]) (I64Const [y])) => (I64Const [x ^ y])
344 (F64Add (F64Const [x]) (F64Const [y])) => (F64Const [x + y])
345 (F64Mul (F64Const [x]) (F64Const [y])) && !math.IsNaN(x * y) => (F64Const [x * y])
346 (I64Eq (I64Const [x]) (I64Const [y])) && x == y => (I64Const [1])
347 (I64Eq (I64Const [x]) (I64Const [y])) && x != y => (I64Const [0])
348 (I64Ne (I64Const [x]) (I64Const [y])) && x == y => (I64Const [0])
349 (I64Ne (I64Const [x]) (I64Const [y])) && x != y => (I64Const [1])
350
351 (I64Shl (I64Const [x]) (I64Const [y])) => (I64Const [x << uint64(y)])
352 (I64ShrU (I64Const [x]) (I64Const [y])) => (I64Const [int64(uint64(x) >> uint64(y))])
353 (I64ShrS (I64Const [x]) (I64Const [y])) => (I64Const [x >> uint64(y)])
354
355 // TODO: declare these operations as commutative and get rid of these rules?
356 (I64Add (I64Const [x]) y) && y.Op != OpWasmI64Const => (I64Add y (I64Const [x]))
357 (I64Mul (I64Const [x]) y) && y.Op != OpWasmI64Const => (I64Mul y (I64Const [x]))
358 (I64And (I64Const [x]) y) && y.Op != OpWasmI64Const => (I64And y (I64Const [x]))
359 (I64Or (I64Const [x]) y) && y.Op != OpWasmI64Const => (I64Or y (I64Const [x]))
360 (I64Xor (I64Const [x]) y) && y.Op != OpWasmI64Const => (I64Xor y (I64Const [x]))
361 (F64Add (F64Const [x]) y) && y.Op != OpWasmF64Const => (F64Add y (F64Const [x]))
362 (F64Mul (F64Const [x]) y) && y.Op != OpWasmF64Const => (F64Mul y (F64Const [x]))
363 (I64Eq (I64Const [x]) y) && y.Op != OpWasmI64Const => (I64Eq y (I64Const [x]))
364 (I64Ne (I64Const [x]) y) && y.Op != OpWasmI64Const => (I64Ne y (I64Const [x]))
365
366 (I64Eq x (I64Const [0])) => (I64Eqz x)
367 (I64LtU (I64Const [0]) x) => (I64Eqz (I64Eqz x))
368 (I64LeU x (I64Const [0])) => (I64Eqz x)
369 (I64LtU x (I64Const [1])) => (I64Eqz x)
370 (I64LeU (I64Const [1]) x) => (I64Eqz (I64Eqz x))
371 (I64Ne x (I64Const [0])) => (I64Eqz (I64Eqz x))
372
373 (I64Add x (I64Const <t> [y])) && !t.IsPtr() => (I64AddConst [y] x)
374 (I64AddConst [0] x) => x
375 (I64Eqz (I64Eqz (I64Eqz x))) => (I64Eqz x)
376
377 // folding offset into load/store
378 ((I64Load|I64Load32U|I64Load32S|I64Load16U|I64Load16S|I64Load8U|I64Load8S) [off] (I64AddConst [off2] ptr) mem)
379 && isU32Bit(off+off2) =>
380 ((I64Load|I64Load32U|I64Load32S|I64Load16U|I64Load16S|I64Load8U|I64Load8S) [off+off2] ptr mem)
381
382 ((I64Store|I64Store32|I64Store16|I64Store8) [off] (I64AddConst [off2] ptr) val mem)
383 && isU32Bit(off+off2) =>
384 ((I64Store|I64Store32|I64Store16|I64Store8) [off+off2] ptr val mem)
385
386 // folding offset into address
387 (I64AddConst [off] (LoweredAddr {sym} [off2] base)) && isU32Bit(off+int64(off2)) =>
388 (LoweredAddr {sym} [int32(off)+off2] base)
389 (I64AddConst [off] x:(SP)) && isU32Bit(off) => (LoweredAddr [int32(off)] x) // so it is rematerializeable
390
391 // transforming readonly globals into constants
392 (I64Load [off] (LoweredAddr {sym} [off2] (SB)) _) && symIsRO(sym) && isU32Bit(off+int64(off2)) => (I64Const [int64(read64(sym, off+int64(off2), config.ctxt.Arch.ByteOrder))])
393 (I64Load32U [off] (LoweredAddr {sym} [off2] (SB)) _) && symIsRO(sym) && isU32Bit(off+int64(off2)) => (I64Const [int64(read32(sym, off+int64(off2), config.ctxt.Arch.ByteOrder))])
394 (I64Load16U [off] (LoweredAddr {sym} [off2] (SB)) _) && symIsRO(sym) && isU32Bit(off+int64(off2)) => (I64Const [int64(read16(sym, off+int64(off2), config.ctxt.Arch.ByteOrder))])
395 (I64Load8U [off] (LoweredAddr {sym} [off2] (SB)) _) && symIsRO(sym) && isU32Bit(off+int64(off2)) => (I64Const [int64(read8(sym, off+int64(off2)))])
396 (I64Load32S [off] (LoweredAddr {sym} [off2] (SB)) _) && symIsRO(sym) && isU32Bit(off+int64(off2)) => (I64Const [int64(int32(read32(sym, off+int64(off2), config.ctxt.Arch.ByteOrder)))])
397 (I64Load16S [off] (LoweredAddr {sym} [off2] (SB)) _) && symIsRO(sym) && isU32Bit(off+int64(off2)) => (I64Const [int64(int16(read16(sym, off+int64(off2), config.ctxt.Arch.ByteOrder)))])
398 (I64Load8S [off] (LoweredAddr {sym} [off2] (SB)) _) && symIsRO(sym) && isU32Bit(off+int64(off2)) => (I64Const [int64(int8(read8(sym, off+int64(off2))))])
399
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