1 // Code generated by x/arch/internal/simdgen using 'go run . -xedPath $XED_PATH -o godefs -goroot $GOROOT go.yaml types.yaml categories.yaml'; DO NOT EDIT.
2
3 (AESDecryptLastRoundUint8x16 ...) => (VAESDECLAST128 ...)
4 (AESDecryptLastRoundUint8x32 ...) => (VAESDECLAST256 ...)
5 (AESDecryptLastRoundUint8x64 ...) => (VAESDECLAST512 ...)
6 (AESDecryptOneRoundUint8x16 ...) => (VAESDEC128 ...)
7 (AESDecryptOneRoundUint8x32 ...) => (VAESDEC256 ...)
8 (AESDecryptOneRoundUint8x64 ...) => (VAESDEC512 ...)
9 (AESEncryptLastRoundUint8x16 ...) => (VAESENCLAST128 ...)
10 (AESEncryptLastRoundUint8x32 ...) => (VAESENCLAST256 ...)
11 (AESEncryptLastRoundUint8x64 ...) => (VAESENCLAST512 ...)
12 (AESEncryptOneRoundUint8x16 ...) => (VAESENC128 ...)
13 (AESEncryptOneRoundUint8x32 ...) => (VAESENC256 ...)
14 (AESEncryptOneRoundUint8x64 ...) => (VAESENC512 ...)
15 (AESInvMixColumnsUint32x4 ...) => (VAESIMC128 ...)
16 (AESRoundKeyGenAssistUint32x4 ...) => (VAESKEYGENASSIST128 ...)
17 (AbsInt8x16 ...) => (VPABSB128 ...)
18 (AbsInt8x32 ...) => (VPABSB256 ...)
19 (AbsInt8x64 ...) => (VPABSB512 ...)
20 (AbsInt16x8 ...) => (VPABSW128 ...)
21 (AbsInt16x16 ...) => (VPABSW256 ...)
22 (AbsInt16x32 ...) => (VPABSW512 ...)
23 (AbsInt32x4 ...) => (VPABSD128 ...)
24 (AbsInt32x8 ...) => (VPABSD256 ...)
25 (AbsInt32x16 ...) => (VPABSD512 ...)
26 (AbsInt64x2 ...) => (VPABSQ128 ...)
27 (AbsInt64x4 ...) => (VPABSQ256 ...)
28 (AbsInt64x8 ...) => (VPABSQ512 ...)
29 (AddFloat32x4 ...) => (VADDPS128 ...)
30 (AddFloat32x8 ...) => (VADDPS256 ...)
31 (AddFloat32x16 ...) => (VADDPS512 ...)
32 (AddFloat64x2 ...) => (VADDPD128 ...)
33 (AddFloat64x4 ...) => (VADDPD256 ...)
34 (AddFloat64x8 ...) => (VADDPD512 ...)
35 (AddInt8x16 ...) => (VPADDB128 ...)
36 (AddInt8x32 ...) => (VPADDB256 ...)
37 (AddInt8x64 ...) => (VPADDB512 ...)
38 (AddInt16x8 ...) => (VPADDW128 ...)
39 (AddInt16x16 ...) => (VPADDW256 ...)
40 (AddInt16x32 ...) => (VPADDW512 ...)
41 (AddInt32x4 ...) => (VPADDD128 ...)
42 (AddInt32x8 ...) => (VPADDD256 ...)
43 (AddInt32x16 ...) => (VPADDD512 ...)
44 (AddInt64x2 ...) => (VPADDQ128 ...)
45 (AddInt64x4 ...) => (VPADDQ256 ...)
46 (AddInt64x8 ...) => (VPADDQ512 ...)
47 (AddUint8x16 ...) => (VPADDB128 ...)
48 (AddUint8x32 ...) => (VPADDB256 ...)
49 (AddUint8x64 ...) => (VPADDB512 ...)
50 (AddUint16x8 ...) => (VPADDW128 ...)
51 (AddUint16x16 ...) => (VPADDW256 ...)
52 (AddUint16x32 ...) => (VPADDW512 ...)
53 (AddUint32x4 ...) => (VPADDD128 ...)
54 (AddUint32x8 ...) => (VPADDD256 ...)
55 (AddUint32x16 ...) => (VPADDD512 ...)
56 (AddUint64x2 ...) => (VPADDQ128 ...)
57 (AddUint64x4 ...) => (VPADDQ256 ...)
58 (AddUint64x8 ...) => (VPADDQ512 ...)
59 (AddPairsFloat32x4 ...) => (VHADDPS128 ...)
60 (AddPairsFloat32x8 ...) => (VHADDPS256 ...)
61 (AddPairsFloat64x2 ...) => (VHADDPD128 ...)
62 (AddPairsFloat64x4 ...) => (VHADDPD256 ...)
63 (AddPairsInt16x8 ...) => (VPHADDW128 ...)
64 (AddPairsInt16x16 ...) => (VPHADDW256 ...)
65 (AddPairsInt32x4 ...) => (VPHADDD128 ...)
66 (AddPairsInt32x8 ...) => (VPHADDD256 ...)
67 (AddPairsUint16x8 ...) => (VPHADDW128 ...)
68 (AddPairsUint16x16 ...) => (VPHADDW256 ...)
69 (AddPairsUint32x4 ...) => (VPHADDD128 ...)
70 (AddPairsUint32x8 ...) => (VPHADDD256 ...)
71 (AddPairsSaturatedInt16x8 ...) => (VPHADDSW128 ...)
72 (AddPairsSaturatedInt16x16 ...) => (VPHADDSW256 ...)
73 (AddSaturatedInt8x16 ...) => (VPADDSB128 ...)
74 (AddSaturatedInt8x32 ...) => (VPADDSB256 ...)
75 (AddSaturatedInt8x64 ...) => (VPADDSB512 ...)
76 (AddSaturatedInt16x8 ...) => (VPADDSW128 ...)
77 (AddSaturatedInt16x16 ...) => (VPADDSW256 ...)
78 (AddSaturatedInt16x32 ...) => (VPADDSW512 ...)
79 (AddSaturatedUint8x16 ...) => (VPADDUSB128 ...)
80 (AddSaturatedUint8x32 ...) => (VPADDUSB256 ...)
81 (AddSaturatedUint8x64 ...) => (VPADDUSB512 ...)
82 (AddSaturatedUint16x8 ...) => (VPADDUSW128 ...)
83 (AddSaturatedUint16x16 ...) => (VPADDUSW256 ...)
84 (AddSaturatedUint16x32 ...) => (VPADDUSW512 ...)
85 (AddSubFloat32x4 ...) => (VADDSUBPS128 ...)
86 (AddSubFloat32x8 ...) => (VADDSUBPS256 ...)
87 (AddSubFloat64x2 ...) => (VADDSUBPD128 ...)
88 (AddSubFloat64x4 ...) => (VADDSUBPD256 ...)
89 (AndInt8x16 ...) => (VPAND128 ...)
90 (AndInt8x32 ...) => (VPAND256 ...)
91 (AndInt8x64 ...) => (VPANDD512 ...)
92 (AndInt16x8 ...) => (VPAND128 ...)
93 (AndInt16x16 ...) => (VPAND256 ...)
94 (AndInt16x32 ...) => (VPANDD512 ...)
95 (AndInt32x4 ...) => (VPAND128 ...)
96 (AndInt32x8 ...) => (VPAND256 ...)
97 (AndInt32x16 ...) => (VPANDD512 ...)
98 (AndInt64x2 ...) => (VPAND128 ...)
99 (AndInt64x4 ...) => (VPAND256 ...)
100 (AndInt64x8 ...) => (VPANDQ512 ...)
101 (AndUint8x16 ...) => (VPAND128 ...)
102 (AndUint8x32 ...) => (VPAND256 ...)
103 (AndUint8x64 ...) => (VPANDD512 ...)
104 (AndUint16x8 ...) => (VPAND128 ...)
105 (AndUint16x16 ...) => (VPAND256 ...)
106 (AndUint16x32 ...) => (VPANDD512 ...)
107 (AndUint32x4 ...) => (VPAND128 ...)
108 (AndUint32x8 ...) => (VPAND256 ...)
109 (AndUint32x16 ...) => (VPANDD512 ...)
110 (AndUint64x2 ...) => (VPAND128 ...)
111 (AndUint64x4 ...) => (VPAND256 ...)
112 (AndUint64x8 ...) => (VPANDQ512 ...)
113 (AndNotInt8x16 ...) => (VPANDN128 ...)
114 (AndNotInt8x32 ...) => (VPANDN256 ...)
115 (AndNotInt8x64 ...) => (VPANDND512 ...)
116 (AndNotInt16x8 ...) => (VPANDN128 ...)
117 (AndNotInt16x16 ...) => (VPANDN256 ...)
118 (AndNotInt16x32 ...) => (VPANDND512 ...)
119 (AndNotInt32x4 ...) => (VPANDN128 ...)
120 (AndNotInt32x8 ...) => (VPANDN256 ...)
121 (AndNotInt32x16 ...) => (VPANDND512 ...)
122 (AndNotInt64x2 ...) => (VPANDN128 ...)
123 (AndNotInt64x4 ...) => (VPANDN256 ...)
124 (AndNotInt64x8 ...) => (VPANDNQ512 ...)
125 (AndNotUint8x16 ...) => (VPANDN128 ...)
126 (AndNotUint8x32 ...) => (VPANDN256 ...)
127 (AndNotUint8x64 ...) => (VPANDND512 ...)
128 (AndNotUint16x8 ...) => (VPANDN128 ...)
129 (AndNotUint16x16 ...) => (VPANDN256 ...)
130 (AndNotUint16x32 ...) => (VPANDND512 ...)
131 (AndNotUint32x4 ...) => (VPANDN128 ...)
132 (AndNotUint32x8 ...) => (VPANDN256 ...)
133 (AndNotUint32x16 ...) => (VPANDND512 ...)
134 (AndNotUint64x2 ...) => (VPANDN128 ...)
135 (AndNotUint64x4 ...) => (VPANDN256 ...)
136 (AndNotUint64x8 ...) => (VPANDNQ512 ...)
137 (AverageUint8x16 ...) => (VPAVGB128 ...)
138 (AverageUint8x32 ...) => (VPAVGB256 ...)
139 (AverageUint8x64 ...) => (VPAVGB512 ...)
140 (AverageUint16x8 ...) => (VPAVGW128 ...)
141 (AverageUint16x16 ...) => (VPAVGW256 ...)
142 (AverageUint16x32 ...) => (VPAVGW512 ...)
143 (Broadcast128Float32x4 ...) => (VBROADCASTSS128 ...)
144 (Broadcast128Float64x2 ...) => (VPBROADCASTQ128 ...)
145 (Broadcast128Int8x16 ...) => (VPBROADCASTB128 ...)
146 (Broadcast128Int16x8 ...) => (VPBROADCASTW128 ...)
147 (Broadcast128Int32x4 ...) => (VPBROADCASTD128 ...)
148 (Broadcast128Int64x2 ...) => (VPBROADCASTQ128 ...)
149 (Broadcast128Uint8x16 ...) => (VPBROADCASTB128 ...)
150 (Broadcast128Uint16x8 ...) => (VPBROADCASTW128 ...)
151 (Broadcast128Uint32x4 ...) => (VPBROADCASTD128 ...)
152 (Broadcast128Uint64x2 ...) => (VPBROADCASTQ128 ...)
153 (Broadcast256Float32x4 ...) => (VBROADCASTSS256 ...)
154 (Broadcast256Float64x2 ...) => (VBROADCASTSD256 ...)
155 (Broadcast256Int8x16 ...) => (VPBROADCASTB256 ...)
156 (Broadcast256Int16x8 ...) => (VPBROADCASTW256 ...)
157 (Broadcast256Int32x4 ...) => (VPBROADCASTD256 ...)
158 (Broadcast256Int64x2 ...) => (VPBROADCASTQ256 ...)
159 (Broadcast256Uint8x16 ...) => (VPBROADCASTB256 ...)
160 (Broadcast256Uint16x8 ...) => (VPBROADCASTW256 ...)
161 (Broadcast256Uint32x4 ...) => (VPBROADCASTD256 ...)
162 (Broadcast256Uint64x2 ...) => (VPBROADCASTQ256 ...)
163 (Broadcast512Float32x4 ...) => (VBROADCASTSS512 ...)
164 (Broadcast512Float64x2 ...) => (VBROADCASTSD512 ...)
165 (Broadcast512Int8x16 ...) => (VPBROADCASTB512 ...)
166 (Broadcast512Int16x8 ...) => (VPBROADCASTW512 ...)
167 (Broadcast512Int32x4 ...) => (VPBROADCASTD512 ...)
168 (Broadcast512Int64x2 ...) => (VPBROADCASTQ512 ...)
169 (Broadcast512Uint8x16 ...) => (VPBROADCASTB512 ...)
170 (Broadcast512Uint16x8 ...) => (VPBROADCASTW512 ...)
171 (Broadcast512Uint32x4 ...) => (VPBROADCASTD512 ...)
172 (Broadcast512Uint64x2 ...) => (VPBROADCASTQ512 ...)
173 (CeilFloat32x4 x) => (VROUNDPS128 [2] x)
174 (CeilFloat32x8 x) => (VROUNDPS256 [2] x)
175 (CeilFloat64x2 x) => (VROUNDPD128 [2] x)
176 (CeilFloat64x4 x) => (VROUNDPD256 [2] x)
177 (CeilScaledFloat32x4 [a] x) => (VRNDSCALEPS128 [a+2] x)
178 (CeilScaledFloat32x8 [a] x) => (VRNDSCALEPS256 [a+2] x)
179 (CeilScaledFloat32x16 [a] x) => (VRNDSCALEPS512 [a+2] x)
180 (CeilScaledFloat64x2 [a] x) => (VRNDSCALEPD128 [a+2] x)
181 (CeilScaledFloat64x4 [a] x) => (VRNDSCALEPD256 [a+2] x)
182 (CeilScaledFloat64x8 [a] x) => (VRNDSCALEPD512 [a+2] x)
183 (CeilScaledResidueFloat32x4 [a] x) => (VREDUCEPS128 [a+2] x)
184 (CeilScaledResidueFloat32x8 [a] x) => (VREDUCEPS256 [a+2] x)
185 (CeilScaledResidueFloat32x16 [a] x) => (VREDUCEPS512 [a+2] x)
186 (CeilScaledResidueFloat64x2 [a] x) => (VREDUCEPD128 [a+2] x)
187 (CeilScaledResidueFloat64x4 [a] x) => (VREDUCEPD256 [a+2] x)
188 (CeilScaledResidueFloat64x8 [a] x) => (VREDUCEPD512 [a+2] x)
189 (CompressFloat32x4 x mask) => (VCOMPRESSPSMasked128 x (VPMOVVec32x4ToM <types.TypeMask> mask))
190 (CompressFloat32x8 x mask) => (VCOMPRESSPSMasked256 x (VPMOVVec32x8ToM <types.TypeMask> mask))
191 (CompressFloat32x16 x mask) => (VCOMPRESSPSMasked512 x (VPMOVVec32x16ToM <types.TypeMask> mask))
192 (CompressFloat64x2 x mask) => (VCOMPRESSPDMasked128 x (VPMOVVec64x2ToM <types.TypeMask> mask))
193 (CompressFloat64x4 x mask) => (VCOMPRESSPDMasked256 x (VPMOVVec64x4ToM <types.TypeMask> mask))
194 (CompressFloat64x8 x mask) => (VCOMPRESSPDMasked512 x (VPMOVVec64x8ToM <types.TypeMask> mask))
195 (CompressInt8x16 x mask) => (VPCOMPRESSBMasked128 x (VPMOVVec8x16ToM <types.TypeMask> mask))
196 (CompressInt8x32 x mask) => (VPCOMPRESSBMasked256 x (VPMOVVec8x32ToM <types.TypeMask> mask))
197 (CompressInt8x64 x mask) => (VPCOMPRESSBMasked512 x (VPMOVVec8x64ToM <types.TypeMask> mask))
198 (CompressInt16x8 x mask) => (VPCOMPRESSWMasked128 x (VPMOVVec16x8ToM <types.TypeMask> mask))
199 (CompressInt16x16 x mask) => (VPCOMPRESSWMasked256 x (VPMOVVec16x16ToM <types.TypeMask> mask))
200 (CompressInt16x32 x mask) => (VPCOMPRESSWMasked512 x (VPMOVVec16x32ToM <types.TypeMask> mask))
201 (CompressInt32x4 x mask) => (VPCOMPRESSDMasked128 x (VPMOVVec32x4ToM <types.TypeMask> mask))
202 (CompressInt32x8 x mask) => (VPCOMPRESSDMasked256 x (VPMOVVec32x8ToM <types.TypeMask> mask))
203 (CompressInt32x16 x mask) => (VPCOMPRESSDMasked512 x (VPMOVVec32x16ToM <types.TypeMask> mask))
204 (CompressInt64x2 x mask) => (VPCOMPRESSQMasked128 x (VPMOVVec64x2ToM <types.TypeMask> mask))
205 (CompressInt64x4 x mask) => (VPCOMPRESSQMasked256 x (VPMOVVec64x4ToM <types.TypeMask> mask))
206 (CompressInt64x8 x mask) => (VPCOMPRESSQMasked512 x (VPMOVVec64x8ToM <types.TypeMask> mask))
207 (CompressUint8x16 x mask) => (VPCOMPRESSBMasked128 x (VPMOVVec8x16ToM <types.TypeMask> mask))
208 (CompressUint8x32 x mask) => (VPCOMPRESSBMasked256 x (VPMOVVec8x32ToM <types.TypeMask> mask))
209 (CompressUint8x64 x mask) => (VPCOMPRESSBMasked512 x (VPMOVVec8x64ToM <types.TypeMask> mask))
210 (CompressUint16x8 x mask) => (VPCOMPRESSWMasked128 x (VPMOVVec16x8ToM <types.TypeMask> mask))
211 (CompressUint16x16 x mask) => (VPCOMPRESSWMasked256 x (VPMOVVec16x16ToM <types.TypeMask> mask))
212 (CompressUint16x32 x mask) => (VPCOMPRESSWMasked512 x (VPMOVVec16x32ToM <types.TypeMask> mask))
213 (CompressUint32x4 x mask) => (VPCOMPRESSDMasked128 x (VPMOVVec32x4ToM <types.TypeMask> mask))
214 (CompressUint32x8 x mask) => (VPCOMPRESSDMasked256 x (VPMOVVec32x8ToM <types.TypeMask> mask))
215 (CompressUint32x16 x mask) => (VPCOMPRESSDMasked512 x (VPMOVVec32x16ToM <types.TypeMask> mask))
216 (CompressUint64x2 x mask) => (VPCOMPRESSQMasked128 x (VPMOVVec64x2ToM <types.TypeMask> mask))
217 (CompressUint64x4 x mask) => (VPCOMPRESSQMasked256 x (VPMOVVec64x4ToM <types.TypeMask> mask))
218 (CompressUint64x8 x mask) => (VPCOMPRESSQMasked512 x (VPMOVVec64x8ToM <types.TypeMask> mask))
219 (ConcatPermuteFloat32x4 ...) => (VPERMI2PS128 ...)
220 (ConcatPermuteFloat32x8 ...) => (VPERMI2PS256 ...)
221 (ConcatPermuteFloat32x16 ...) => (VPERMI2PS512 ...)
222 (ConcatPermuteFloat64x2 ...) => (VPERMI2PD128 ...)
223 (ConcatPermuteFloat64x4 ...) => (VPERMI2PD256 ...)
224 (ConcatPermuteFloat64x8 ...) => (VPERMI2PD512 ...)
225 (ConcatPermuteInt8x16 ...) => (VPERMI2B128 ...)
226 (ConcatPermuteInt8x32 ...) => (VPERMI2B256 ...)
227 (ConcatPermuteInt8x64 ...) => (VPERMI2B512 ...)
228 (ConcatPermuteInt16x8 ...) => (VPERMI2W128 ...)
229 (ConcatPermuteInt16x16 ...) => (VPERMI2W256 ...)
230 (ConcatPermuteInt16x32 ...) => (VPERMI2W512 ...)
231 (ConcatPermuteInt32x4 ...) => (VPERMI2D128 ...)
232 (ConcatPermuteInt32x8 ...) => (VPERMI2D256 ...)
233 (ConcatPermuteInt32x16 ...) => (VPERMI2D512 ...)
234 (ConcatPermuteInt64x2 ...) => (VPERMI2Q128 ...)
235 (ConcatPermuteInt64x4 ...) => (VPERMI2Q256 ...)
236 (ConcatPermuteInt64x8 ...) => (VPERMI2Q512 ...)
237 (ConcatPermuteUint8x16 ...) => (VPERMI2B128 ...)
238 (ConcatPermuteUint8x32 ...) => (VPERMI2B256 ...)
239 (ConcatPermuteUint8x64 ...) => (VPERMI2B512 ...)
240 (ConcatPermuteUint16x8 ...) => (VPERMI2W128 ...)
241 (ConcatPermuteUint16x16 ...) => (VPERMI2W256 ...)
242 (ConcatPermuteUint16x32 ...) => (VPERMI2W512 ...)
243 (ConcatPermuteUint32x4 ...) => (VPERMI2D128 ...)
244 (ConcatPermuteUint32x8 ...) => (VPERMI2D256 ...)
245 (ConcatPermuteUint32x16 ...) => (VPERMI2D512 ...)
246 (ConcatPermuteUint64x2 ...) => (VPERMI2Q128 ...)
247 (ConcatPermuteUint64x4 ...) => (VPERMI2Q256 ...)
248 (ConcatPermuteUint64x8 ...) => (VPERMI2Q512 ...)
249 (ConcatShiftBytesRightUint8x16 ...) => (VPALIGNR128 ...)
250 (ConcatShiftBytesRightGroupedUint8x32 ...) => (VPALIGNR256 ...)
251 (ConcatShiftBytesRightGroupedUint8x64 ...) => (VPALIGNR512 ...)
252 (ConvertToFloat32Float64x2 ...) => (VCVTPD2PSX128 ...)
253 (ConvertToFloat32Float64x4 ...) => (VCVTPD2PSY128 ...)
254 (ConvertToFloat32Float64x8 ...) => (VCVTPD2PS256 ...)
255 (ConvertToFloat32Int32x4 ...) => (VCVTDQ2PS128 ...)
256 (ConvertToFloat32Int32x8 ...) => (VCVTDQ2PS256 ...)
257 (ConvertToFloat32Int32x16 ...) => (VCVTDQ2PS512 ...)
258 (ConvertToFloat32Int64x2 ...) => (VCVTQQ2PSX128 ...)
259 (ConvertToFloat32Int64x4 ...) => (VCVTQQ2PSY128 ...)
260 (ConvertToFloat32Int64x8 ...) => (VCVTQQ2PS256 ...)
261 (ConvertToFloat32Uint32x4 ...) => (VCVTUDQ2PS128 ...)
262 (ConvertToFloat32Uint32x8 ...) => (VCVTUDQ2PS256 ...)
263 (ConvertToFloat32Uint32x16 ...) => (VCVTUDQ2PS512 ...)
264 (ConvertToFloat32Uint64x2 ...) => (VCVTUQQ2PSX128 ...)
265 (ConvertToFloat32Uint64x4 ...) => (VCVTUQQ2PSY128 ...)
266 (ConvertToFloat32Uint64x8 ...) => (VCVTUQQ2PS256 ...)
267 (ConvertToFloat64Float32x4 ...) => (VCVTPS2PD256 ...)
268 (ConvertToFloat64Float32x8 ...) => (VCVTPS2PD512 ...)
269 (ConvertToFloat64Int32x4 ...) => (VCVTDQ2PD256 ...)
270 (ConvertToFloat64Int32x8 ...) => (VCVTDQ2PD512 ...)
271 (ConvertToFloat64Int64x2 ...) => (VCVTQQ2PD128 ...)
272 (ConvertToFloat64Int64x4 ...) => (VCVTQQ2PD256 ...)
273 (ConvertToFloat64Int64x8 ...) => (VCVTQQ2PD512 ...)
274 (ConvertToFloat64Uint32x4 ...) => (VCVTUDQ2PD256 ...)
275 (ConvertToFloat64Uint32x8 ...) => (VCVTUDQ2PD512 ...)
276 (ConvertToFloat64Uint64x2 ...) => (VCVTUQQ2PD128 ...)
277 (ConvertToFloat64Uint64x4 ...) => (VCVTUQQ2PD256 ...)
278 (ConvertToFloat64Uint64x8 ...) => (VCVTUQQ2PD512 ...)
279 (ConvertToInt32Float32x4 ...) => (VCVTTPS2DQ128 ...)
280 (ConvertToInt32Float32x8 ...) => (VCVTTPS2DQ256 ...)
281 (ConvertToInt32Float32x16 ...) => (VCVTTPS2DQ512 ...)
282 (ConvertToInt32Float64x2 ...) => (VCVTTPD2DQX128 ...)
283 (ConvertToInt32Float64x4 ...) => (VCVTTPD2DQY128 ...)
284 (ConvertToInt32Float64x8 ...) => (VCVTTPD2DQ256 ...)
285 (ConvertToInt64Float32x4 ...) => (VCVTTPS2QQ256 ...)
286 (ConvertToInt64Float32x8 ...) => (VCVTTPS2QQ512 ...)
287 (ConvertToInt64Float64x2 ...) => (VCVTTPD2QQ128 ...)
288 (ConvertToInt64Float64x4 ...) => (VCVTTPD2QQ256 ...)
289 (ConvertToInt64Float64x8 ...) => (VCVTTPD2QQ512 ...)
290 (ConvertToUint32Float32x4 ...) => (VCVTTPS2UDQ128 ...)
291 (ConvertToUint32Float32x8 ...) => (VCVTTPS2UDQ256 ...)
292 (ConvertToUint32Float32x16 ...) => (VCVTTPS2UDQ512 ...)
293 (ConvertToUint32Float64x2 ...) => (VCVTTPD2UDQX128 ...)
294 (ConvertToUint32Float64x4 ...) => (VCVTTPD2UDQY128 ...)
295 (ConvertToUint32Float64x8 ...) => (VCVTTPD2UDQ256 ...)
296 (ConvertToUint64Float32x4 ...) => (VCVTTPS2UQQ256 ...)
297 (ConvertToUint64Float32x8 ...) => (VCVTTPS2UQQ512 ...)
298 (ConvertToUint64Float64x2 ...) => (VCVTTPD2UQQ128 ...)
299 (ConvertToUint64Float64x4 ...) => (VCVTTPD2UQQ256 ...)
300 (ConvertToUint64Float64x8 ...) => (VCVTTPD2UQQ512 ...)
301 (CopySignInt8x16 ...) => (VPSIGNB128 ...)
302 (CopySignInt8x32 ...) => (VPSIGNB256 ...)
303 (CopySignInt16x8 ...) => (VPSIGNW128 ...)
304 (CopySignInt16x16 ...) => (VPSIGNW256 ...)
305 (CopySignInt32x4 ...) => (VPSIGND128 ...)
306 (CopySignInt32x8 ...) => (VPSIGND256 ...)
307 (DivFloat32x4 ...) => (VDIVPS128 ...)
308 (DivFloat32x8 ...) => (VDIVPS256 ...)
309 (DivFloat32x16 ...) => (VDIVPS512 ...)
310 (DivFloat64x2 ...) => (VDIVPD128 ...)
311 (DivFloat64x4 ...) => (VDIVPD256 ...)
312 (DivFloat64x8 ...) => (VDIVPD512 ...)
313 (DotProductPairsInt16x8 ...) => (VPMADDWD128 ...)
314 (DotProductPairsInt16x16 ...) => (VPMADDWD256 ...)
315 (DotProductPairsInt16x32 ...) => (VPMADDWD512 ...)
316 (DotProductPairsSaturatedUint8x16 ...) => (VPMADDUBSW128 ...)
317 (DotProductPairsSaturatedUint8x32 ...) => (VPMADDUBSW256 ...)
318 (DotProductPairsSaturatedUint8x64 ...) => (VPMADDUBSW512 ...)
319 (DotProductQuadrupleInt32x4 ...) => (VPDPBUSD128 ...)
320 (DotProductQuadrupleInt32x8 ...) => (VPDPBUSD256 ...)
321 (DotProductQuadrupleInt32x16 ...) => (VPDPBUSD512 ...)
322 (DotProductQuadrupleSaturatedInt32x4 ...) => (VPDPBUSDS128 ...)
323 (DotProductQuadrupleSaturatedInt32x8 ...) => (VPDPBUSDS256 ...)
324 (DotProductQuadrupleSaturatedInt32x16 ...) => (VPDPBUSDS512 ...)
325 (EqualFloat32x4 x y) => (VCMPPS128 [0] x y)
326 (EqualFloat32x8 x y) => (VCMPPS256 [0] x y)
327 (EqualFloat32x16 x y) => (VPMOVMToVec32x16 (VCMPPS512 [0] x y))
328 (EqualFloat64x2 x y) => (VCMPPD128 [0] x y)
329 (EqualFloat64x4 x y) => (VCMPPD256 [0] x y)
330 (EqualFloat64x8 x y) => (VPMOVMToVec64x8 (VCMPPD512 [0] x y))
331 (EqualInt8x16 ...) => (VPCMPEQB128 ...)
332 (EqualInt8x32 ...) => (VPCMPEQB256 ...)
333 (EqualInt8x64 x y) => (VPMOVMToVec8x64 (VPCMPEQB512 x y))
334 (EqualInt16x8 ...) => (VPCMPEQW128 ...)
335 (EqualInt16x16 ...) => (VPCMPEQW256 ...)
336 (EqualInt16x32 x y) => (VPMOVMToVec16x32 (VPCMPEQW512 x y))
337 (EqualInt32x4 ...) => (VPCMPEQD128 ...)
338 (EqualInt32x8 ...) => (VPCMPEQD256 ...)
339 (EqualInt32x16 x y) => (VPMOVMToVec32x16 (VPCMPEQD512 x y))
340 (EqualInt64x2 ...) => (VPCMPEQQ128 ...)
341 (EqualInt64x4 ...) => (VPCMPEQQ256 ...)
342 (EqualInt64x8 x y) => (VPMOVMToVec64x8 (VPCMPEQQ512 x y))
343 (EqualUint8x16 ...) => (VPCMPEQB128 ...)
344 (EqualUint8x32 ...) => (VPCMPEQB256 ...)
345 (EqualUint8x64 x y) => (VPMOVMToVec8x64 (VPCMPEQB512 x y))
346 (EqualUint16x8 ...) => (VPCMPEQW128 ...)
347 (EqualUint16x16 ...) => (VPCMPEQW256 ...)
348 (EqualUint16x32 x y) => (VPMOVMToVec16x32 (VPCMPEQW512 x y))
349 (EqualUint32x4 ...) => (VPCMPEQD128 ...)
350 (EqualUint32x8 ...) => (VPCMPEQD256 ...)
351 (EqualUint32x16 x y) => (VPMOVMToVec32x16 (VPCMPEQD512 x y))
352 (EqualUint64x2 ...) => (VPCMPEQQ128 ...)
353 (EqualUint64x4 ...) => (VPCMPEQQ256 ...)
354 (EqualUint64x8 x y) => (VPMOVMToVec64x8 (VPCMPEQQ512 x y))
355 (ExpandFloat32x4 x mask) => (VEXPANDPSMasked128 x (VPMOVVec32x4ToM <types.TypeMask> mask))
356 (ExpandFloat32x8 x mask) => (VEXPANDPSMasked256 x (VPMOVVec32x8ToM <types.TypeMask> mask))
357 (ExpandFloat32x16 x mask) => (VEXPANDPSMasked512 x (VPMOVVec32x16ToM <types.TypeMask> mask))
358 (ExpandFloat64x2 x mask) => (VEXPANDPDMasked128 x (VPMOVVec64x2ToM <types.TypeMask> mask))
359 (ExpandFloat64x4 x mask) => (VEXPANDPDMasked256 x (VPMOVVec64x4ToM <types.TypeMask> mask))
360 (ExpandFloat64x8 x mask) => (VEXPANDPDMasked512 x (VPMOVVec64x8ToM <types.TypeMask> mask))
361 (ExpandInt8x16 x mask) => (VPEXPANDBMasked128 x (VPMOVVec8x16ToM <types.TypeMask> mask))
362 (ExpandInt8x32 x mask) => (VPEXPANDBMasked256 x (VPMOVVec8x32ToM <types.TypeMask> mask))
363 (ExpandInt8x64 x mask) => (VPEXPANDBMasked512 x (VPMOVVec8x64ToM <types.TypeMask> mask))
364 (ExpandInt16x8 x mask) => (VPEXPANDWMasked128 x (VPMOVVec16x8ToM <types.TypeMask> mask))
365 (ExpandInt16x16 x mask) => (VPEXPANDWMasked256 x (VPMOVVec16x16ToM <types.TypeMask> mask))
366 (ExpandInt16x32 x mask) => (VPEXPANDWMasked512 x (VPMOVVec16x32ToM <types.TypeMask> mask))
367 (ExpandInt32x4 x mask) => (VPEXPANDDMasked128 x (VPMOVVec32x4ToM <types.TypeMask> mask))
368 (ExpandInt32x8 x mask) => (VPEXPANDDMasked256 x (VPMOVVec32x8ToM <types.TypeMask> mask))
369 (ExpandInt32x16 x mask) => (VPEXPANDDMasked512 x (VPMOVVec32x16ToM <types.TypeMask> mask))
370 (ExpandInt64x2 x mask) => (VPEXPANDQMasked128 x (VPMOVVec64x2ToM <types.TypeMask> mask))
371 (ExpandInt64x4 x mask) => (VPEXPANDQMasked256 x (VPMOVVec64x4ToM <types.TypeMask> mask))
372 (ExpandInt64x8 x mask) => (VPEXPANDQMasked512 x (VPMOVVec64x8ToM <types.TypeMask> mask))
373 (ExpandUint8x16 x mask) => (VPEXPANDBMasked128 x (VPMOVVec8x16ToM <types.TypeMask> mask))
374 (ExpandUint8x32 x mask) => (VPEXPANDBMasked256 x (VPMOVVec8x32ToM <types.TypeMask> mask))
375 (ExpandUint8x64 x mask) => (VPEXPANDBMasked512 x (VPMOVVec8x64ToM <types.TypeMask> mask))
376 (ExpandUint16x8 x mask) => (VPEXPANDWMasked128 x (VPMOVVec16x8ToM <types.TypeMask> mask))
377 (ExpandUint16x16 x mask) => (VPEXPANDWMasked256 x (VPMOVVec16x16ToM <types.TypeMask> mask))
378 (ExpandUint16x32 x mask) => (VPEXPANDWMasked512 x (VPMOVVec16x32ToM <types.TypeMask> mask))
379 (ExpandUint32x4 x mask) => (VPEXPANDDMasked128 x (VPMOVVec32x4ToM <types.TypeMask> mask))
380 (ExpandUint32x8 x mask) => (VPEXPANDDMasked256 x (VPMOVVec32x8ToM <types.TypeMask> mask))
381 (ExpandUint32x16 x mask) => (VPEXPANDDMasked512 x (VPMOVVec32x16ToM <types.TypeMask> mask))
382 (ExpandUint64x2 x mask) => (VPEXPANDQMasked128 x (VPMOVVec64x2ToM <types.TypeMask> mask))
383 (ExpandUint64x4 x mask) => (VPEXPANDQMasked256 x (VPMOVVec64x4ToM <types.TypeMask> mask))
384 (ExpandUint64x8 x mask) => (VPEXPANDQMasked512 x (VPMOVVec64x8ToM <types.TypeMask> mask))
385 (ExtendLo2ToInt64x2Int8x16 ...) => (VPMOVSXBQ128 ...)
386 (ExtendLo2ToInt64x2Int16x8 ...) => (VPMOVSXWQ128 ...)
387 (ExtendLo2ToInt64x2Int32x4 ...) => (VPMOVSXDQ128 ...)
388 (ExtendLo2ToUint64x2Uint8x16 ...) => (VPMOVZXBQ128 ...)
389 (ExtendLo2ToUint64x2Uint16x8 ...) => (VPMOVZXWQ128 ...)
390 (ExtendLo2ToUint64x2Uint32x4 ...) => (VPMOVZXDQ128 ...)
391 (ExtendLo4ToInt32x4Int8x16 ...) => (VPMOVSXBD128 ...)
392 (ExtendLo4ToInt32x4Int16x8 ...) => (VPMOVSXWD128 ...)
393 (ExtendLo4ToInt64x4Int8x16 ...) => (VPMOVSXBQ256 ...)
394 (ExtendLo4ToInt64x4Int16x8 ...) => (VPMOVSXWQ256 ...)
395 (ExtendLo4ToUint32x4Uint8x16 ...) => (VPMOVZXBD128 ...)
396 (ExtendLo4ToUint32x4Uint16x8 ...) => (VPMOVZXWD128 ...)
397 (ExtendLo4ToUint64x4Uint8x16 ...) => (VPMOVZXBQ256 ...)
398 (ExtendLo4ToUint64x4Uint16x8 ...) => (VPMOVZXWQ256 ...)
399 (ExtendLo8ToInt16x8Int8x16 ...) => (VPMOVSXBW128 ...)
400 (ExtendLo8ToInt32x8Int8x16 ...) => (VPMOVSXBD256 ...)
401 (ExtendLo8ToInt64x8Int8x16 ...) => (VPMOVSXBQ512 ...)
402 (ExtendLo8ToUint16x8Uint8x16 ...) => (VPMOVZXBW128 ...)
403 (ExtendLo8ToUint32x8Uint8x16 ...) => (VPMOVZXBD256 ...)
404 (ExtendLo8ToUint64x8Uint8x16 ...) => (VPMOVZXBQ512 ...)
405 (ExtendToInt16Int8x16 ...) => (VPMOVSXBW256 ...)
406 (ExtendToInt16Int8x32 ...) => (VPMOVSXBW512 ...)
407 (ExtendToInt32Int8x16 ...) => (VPMOVSXBD512 ...)
408 (ExtendToInt32Int16x8 ...) => (VPMOVSXWD256 ...)
409 (ExtendToInt32Int16x16 ...) => (VPMOVSXWD512 ...)
410 (ExtendToInt64Int16x8 ...) => (VPMOVSXWQ512 ...)
411 (ExtendToInt64Int32x4 ...) => (VPMOVSXDQ256 ...)
412 (ExtendToInt64Int32x8 ...) => (VPMOVSXDQ512 ...)
413 (ExtendToUint16Uint8x16 ...) => (VPMOVZXBW256 ...)
414 (ExtendToUint16Uint8x32 ...) => (VPMOVZXBW512 ...)
415 (ExtendToUint32Uint8x16 ...) => (VPMOVZXBD512 ...)
416 (ExtendToUint32Uint16x8 ...) => (VPMOVZXWD256 ...)
417 (ExtendToUint32Uint16x16 ...) => (VPMOVZXWD512 ...)
418 (ExtendToUint64Uint16x8 ...) => (VPMOVZXWQ512 ...)
419 (ExtendToUint64Uint32x4 ...) => (VPMOVZXDQ256 ...)
420 (ExtendToUint64Uint32x8 ...) => (VPMOVZXDQ512 ...)
421 (FloorFloat32x4 x) => (VROUNDPS128 [1] x)
422 (FloorFloat32x8 x) => (VROUNDPS256 [1] x)
423 (FloorFloat64x2 x) => (VROUNDPD128 [1] x)
424 (FloorFloat64x4 x) => (VROUNDPD256 [1] x)
425 (FloorScaledFloat32x4 [a] x) => (VRNDSCALEPS128 [a+1] x)
426 (FloorScaledFloat32x8 [a] x) => (VRNDSCALEPS256 [a+1] x)
427 (FloorScaledFloat32x16 [a] x) => (VRNDSCALEPS512 [a+1] x)
428 (FloorScaledFloat64x2 [a] x) => (VRNDSCALEPD128 [a+1] x)
429 (FloorScaledFloat64x4 [a] x) => (VRNDSCALEPD256 [a+1] x)
430 (FloorScaledFloat64x8 [a] x) => (VRNDSCALEPD512 [a+1] x)
431 (FloorScaledResidueFloat32x4 [a] x) => (VREDUCEPS128 [a+1] x)
432 (FloorScaledResidueFloat32x8 [a] x) => (VREDUCEPS256 [a+1] x)
433 (FloorScaledResidueFloat32x16 [a] x) => (VREDUCEPS512 [a+1] x)
434 (FloorScaledResidueFloat64x2 [a] x) => (VREDUCEPD128 [a+1] x)
435 (FloorScaledResidueFloat64x4 [a] x) => (VREDUCEPD256 [a+1] x)
436 (FloorScaledResidueFloat64x8 [a] x) => (VREDUCEPD512 [a+1] x)
437 (GaloisFieldAffineTransformUint8x16 ...) => (VGF2P8AFFINEQB128 ...)
438 (GaloisFieldAffineTransformUint8x32 ...) => (VGF2P8AFFINEQB256 ...)
439 (GaloisFieldAffineTransformUint8x64 ...) => (VGF2P8AFFINEQB512 ...)
440 (GaloisFieldAffineTransformInverseUint8x16 ...) => (VGF2P8AFFINEINVQB128 ...)
441 (GaloisFieldAffineTransformInverseUint8x32 ...) => (VGF2P8AFFINEINVQB256 ...)
442 (GaloisFieldAffineTransformInverseUint8x64 ...) => (VGF2P8AFFINEINVQB512 ...)
443 (GaloisFieldMulUint8x16 ...) => (VGF2P8MULB128 ...)
444 (GaloisFieldMulUint8x32 ...) => (VGF2P8MULB256 ...)
445 (GaloisFieldMulUint8x64 ...) => (VGF2P8MULB512 ...)
446 (GetElemFloat32x4 ...) => (VPEXTRD128 ...)
447 (GetElemFloat64x2 ...) => (VPEXTRQ128 ...)
448 (GetElemInt8x16 ...) => (VPEXTRB128 ...)
449 (GetElemInt16x8 ...) => (VPEXTRW128 ...)
450 (GetElemInt32x4 ...) => (VPEXTRD128 ...)
451 (GetElemInt64x2 ...) => (VPEXTRQ128 ...)
452 (GetElemUint8x16 ...) => (VPEXTRB128 ...)
453 (GetElemUint16x8 ...) => (VPEXTRW128 ...)
454 (GetElemUint32x4 ...) => (VPEXTRD128 ...)
455 (GetElemUint64x2 ...) => (VPEXTRQ128 ...)
456 (GetHiFloat32x8 x) => (VEXTRACTF128128 [1] x)
457 (GetHiFloat32x16 x) => (VEXTRACTF64X4256 [1] x)
458 (GetHiFloat64x4 x) => (VEXTRACTF128128 [1] x)
459 (GetHiFloat64x8 x) => (VEXTRACTF64X4256 [1] x)
460 (GetHiInt8x32 x) => (VEXTRACTI128128 [1] x)
461 (GetHiInt8x64 x) => (VEXTRACTI64X4256 [1] x)
462 (GetHiInt16x16 x) => (VEXTRACTI128128 [1] x)
463 (GetHiInt16x32 x) => (VEXTRACTI64X4256 [1] x)
464 (GetHiInt32x8 x) => (VEXTRACTI128128 [1] x)
465 (GetHiInt32x16 x) => (VEXTRACTI64X4256 [1] x)
466 (GetHiInt64x4 x) => (VEXTRACTI128128 [1] x)
467 (GetHiInt64x8 x) => (VEXTRACTI64X4256 [1] x)
468 (GetHiUint8x32 x) => (VEXTRACTI128128 [1] x)
469 (GetHiUint8x64 x) => (VEXTRACTI64X4256 [1] x)
470 (GetHiUint16x16 x) => (VEXTRACTI128128 [1] x)
471 (GetHiUint16x32 x) => (VEXTRACTI64X4256 [1] x)
472 (GetHiUint32x8 x) => (VEXTRACTI128128 [1] x)
473 (GetHiUint32x16 x) => (VEXTRACTI64X4256 [1] x)
474 (GetHiUint64x4 x) => (VEXTRACTI128128 [1] x)
475 (GetHiUint64x8 x) => (VEXTRACTI64X4256 [1] x)
476 (GetLoFloat32x8 x) => (VEXTRACTF128128 [0] x)
477 (GetLoFloat32x16 x) => (VEXTRACTF64X4256 [0] x)
478 (GetLoFloat64x4 x) => (VEXTRACTF128128 [0] x)
479 (GetLoFloat64x8 x) => (VEXTRACTF64X4256 [0] x)
480 (GetLoInt8x32 x) => (VEXTRACTI128128 [0] x)
481 (GetLoInt8x64 x) => (VEXTRACTI64X4256 [0] x)
482 (GetLoInt16x16 x) => (VEXTRACTI128128 [0] x)
483 (GetLoInt16x32 x) => (VEXTRACTI64X4256 [0] x)
484 (GetLoInt32x8 x) => (VEXTRACTI128128 [0] x)
485 (GetLoInt32x16 x) => (VEXTRACTI64X4256 [0] x)
486 (GetLoInt64x4 x) => (VEXTRACTI128128 [0] x)
487 (GetLoInt64x8 x) => (VEXTRACTI64X4256 [0] x)
488 (GetLoUint8x32 x) => (VEXTRACTI128128 [0] x)
489 (GetLoUint8x64 x) => (VEXTRACTI64X4256 [0] x)
490 (GetLoUint16x16 x) => (VEXTRACTI128128 [0] x)
491 (GetLoUint16x32 x) => (VEXTRACTI64X4256 [0] x)
492 (GetLoUint32x8 x) => (VEXTRACTI128128 [0] x)
493 (GetLoUint32x16 x) => (VEXTRACTI64X4256 [0] x)
494 (GetLoUint64x4 x) => (VEXTRACTI128128 [0] x)
495 (GetLoUint64x8 x) => (VEXTRACTI64X4256 [0] x)
496 (GreaterFloat32x4 x y) => (VCMPPS128 [14] x y)
497 (GreaterFloat32x8 x y) => (VCMPPS256 [14] x y)
498 (GreaterFloat32x16 x y) => (VPMOVMToVec32x16 (VCMPPS512 [14] x y))
499 (GreaterFloat64x2 x y) => (VCMPPD128 [14] x y)
500 (GreaterFloat64x4 x y) => (VCMPPD256 [14] x y)
501 (GreaterFloat64x8 x y) => (VPMOVMToVec64x8 (VCMPPD512 [14] x y))
502 (GreaterInt8x16 ...) => (VPCMPGTB128 ...)
503 (GreaterInt8x32 ...) => (VPCMPGTB256 ...)
504 (GreaterInt8x64 x y) => (VPMOVMToVec8x64 (VPCMPGTB512 x y))
505 (GreaterInt16x8 ...) => (VPCMPGTW128 ...)
506 (GreaterInt16x16 ...) => (VPCMPGTW256 ...)
507 (GreaterInt16x32 x y) => (VPMOVMToVec16x32 (VPCMPGTW512 x y))
508 (GreaterInt32x4 ...) => (VPCMPGTD128 ...)
509 (GreaterInt32x8 ...) => (VPCMPGTD256 ...)
510 (GreaterInt32x16 x y) => (VPMOVMToVec32x16 (VPCMPGTD512 x y))
511 (GreaterInt64x2 ...) => (VPCMPGTQ128 ...)
512 (GreaterInt64x4 ...) => (VPCMPGTQ256 ...)
513 (GreaterInt64x8 x y) => (VPMOVMToVec64x8 (VPCMPGTQ512 x y))
514 (GreaterUint8x64 x y) => (VPMOVMToVec8x64 (VPCMPUB512 [14] x y))
515 (GreaterUint16x32 x y) => (VPMOVMToVec16x32 (VPCMPUW512 [14] x y))
516 (GreaterUint32x16 x y) => (VPMOVMToVec32x16 (VPCMPUD512 [14] x y))
517 (GreaterUint64x8 x y) => (VPMOVMToVec64x8 (VPCMPUQ512 [14] x y))
518 (GreaterEqualFloat32x4 x y) => (VCMPPS128 [13] x y)
519 (GreaterEqualFloat32x8 x y) => (VCMPPS256 [13] x y)
520 (GreaterEqualFloat32x16 x y) => (VPMOVMToVec32x16 (VCMPPS512 [13] x y))
521 (GreaterEqualFloat64x2 x y) => (VCMPPD128 [13] x y)
522 (GreaterEqualFloat64x4 x y) => (VCMPPD256 [13] x y)
523 (GreaterEqualFloat64x8 x y) => (VPMOVMToVec64x8 (VCMPPD512 [13] x y))
524 (GreaterEqualInt8x64 x y) => (VPMOVMToVec8x64 (VPCMPB512 [13] x y))
525 (GreaterEqualInt16x32 x y) => (VPMOVMToVec16x32 (VPCMPW512 [13] x y))
526 (GreaterEqualInt32x16 x y) => (VPMOVMToVec32x16 (VPCMPD512 [13] x y))
527 (GreaterEqualInt64x8 x y) => (VPMOVMToVec64x8 (VPCMPQ512 [13] x y))
528 (GreaterEqualUint8x64 x y) => (VPMOVMToVec8x64 (VPCMPUB512 [13] x y))
529 (GreaterEqualUint16x32 x y) => (VPMOVMToVec16x32 (VPCMPUW512 [13] x y))
530 (GreaterEqualUint32x16 x y) => (VPMOVMToVec32x16 (VPCMPUD512 [13] x y))
531 (GreaterEqualUint64x8 x y) => (VPMOVMToVec64x8 (VPCMPUQ512 [13] x y))
532 (InterleaveHiInt16x8 ...) => (VPUNPCKHWD128 ...)
533 (InterleaveHiInt32x4 ...) => (VPUNPCKHDQ128 ...)
534 (InterleaveHiInt64x2 ...) => (VPUNPCKHQDQ128 ...)
535 (InterleaveHiUint16x8 ...) => (VPUNPCKHWD128 ...)
536 (InterleaveHiUint32x4 ...) => (VPUNPCKHDQ128 ...)
537 (InterleaveHiUint64x2 ...) => (VPUNPCKHQDQ128 ...)
538 (InterleaveHiGroupedInt16x16 ...) => (VPUNPCKHWD256 ...)
539 (InterleaveHiGroupedInt16x32 ...) => (VPUNPCKHWD512 ...)
540 (InterleaveHiGroupedInt32x8 ...) => (VPUNPCKHDQ256 ...)
541 (InterleaveHiGroupedInt32x16 ...) => (VPUNPCKHDQ512 ...)
542 (InterleaveHiGroupedInt64x4 ...) => (VPUNPCKHQDQ256 ...)
543 (InterleaveHiGroupedInt64x8 ...) => (VPUNPCKHQDQ512 ...)
544 (InterleaveHiGroupedUint16x16 ...) => (VPUNPCKHWD256 ...)
545 (InterleaveHiGroupedUint16x32 ...) => (VPUNPCKHWD512 ...)
546 (InterleaveHiGroupedUint32x8 ...) => (VPUNPCKHDQ256 ...)
547 (InterleaveHiGroupedUint32x16 ...) => (VPUNPCKHDQ512 ...)
548 (InterleaveHiGroupedUint64x4 ...) => (VPUNPCKHQDQ256 ...)
549 (InterleaveHiGroupedUint64x8 ...) => (VPUNPCKHQDQ512 ...)
550 (InterleaveLoInt16x8 ...) => (VPUNPCKLWD128 ...)
551 (InterleaveLoInt32x4 ...) => (VPUNPCKLDQ128 ...)
552 (InterleaveLoInt64x2 ...) => (VPUNPCKLQDQ128 ...)
553 (InterleaveLoUint16x8 ...) => (VPUNPCKLWD128 ...)
554 (InterleaveLoUint32x4 ...) => (VPUNPCKLDQ128 ...)
555 (InterleaveLoUint64x2 ...) => (VPUNPCKLQDQ128 ...)
556 (InterleaveLoGroupedInt16x16 ...) => (VPUNPCKLWD256 ...)
557 (InterleaveLoGroupedInt16x32 ...) => (VPUNPCKLWD512 ...)
558 (InterleaveLoGroupedInt32x8 ...) => (VPUNPCKLDQ256 ...)
559 (InterleaveLoGroupedInt32x16 ...) => (VPUNPCKLDQ512 ...)
560 (InterleaveLoGroupedInt64x4 ...) => (VPUNPCKLQDQ256 ...)
561 (InterleaveLoGroupedInt64x8 ...) => (VPUNPCKLQDQ512 ...)
562 (InterleaveLoGroupedUint16x16 ...) => (VPUNPCKLWD256 ...)
563 (InterleaveLoGroupedUint16x32 ...) => (VPUNPCKLWD512 ...)
564 (InterleaveLoGroupedUint32x8 ...) => (VPUNPCKLDQ256 ...)
565 (InterleaveLoGroupedUint32x16 ...) => (VPUNPCKLDQ512 ...)
566 (InterleaveLoGroupedUint64x4 ...) => (VPUNPCKLQDQ256 ...)
567 (InterleaveLoGroupedUint64x8 ...) => (VPUNPCKLQDQ512 ...)
568 (IsNanFloat32x4 x y) => (VCMPPS128 [3] x y)
569 (IsNanFloat32x8 x y) => (VCMPPS256 [3] x y)
570 (IsNanFloat32x16 x y) => (VPMOVMToVec32x16 (VCMPPS512 [3] x y))
571 (IsNanFloat64x2 x y) => (VCMPPD128 [3] x y)
572 (IsNanFloat64x4 x y) => (VCMPPD256 [3] x y)
573 (IsNanFloat64x8 x y) => (VPMOVMToVec64x8 (VCMPPD512 [3] x y))
574 (LeadingZerosInt32x4 ...) => (VPLZCNTD128 ...)
575 (LeadingZerosInt32x8 ...) => (VPLZCNTD256 ...)
576 (LeadingZerosInt32x16 ...) => (VPLZCNTD512 ...)
577 (LeadingZerosInt64x2 ...) => (VPLZCNTQ128 ...)
578 (LeadingZerosInt64x4 ...) => (VPLZCNTQ256 ...)
579 (LeadingZerosInt64x8 ...) => (VPLZCNTQ512 ...)
580 (LeadingZerosUint32x4 ...) => (VPLZCNTD128 ...)
581 (LeadingZerosUint32x8 ...) => (VPLZCNTD256 ...)
582 (LeadingZerosUint32x16 ...) => (VPLZCNTD512 ...)
583 (LeadingZerosUint64x2 ...) => (VPLZCNTQ128 ...)
584 (LeadingZerosUint64x4 ...) => (VPLZCNTQ256 ...)
585 (LeadingZerosUint64x8 ...) => (VPLZCNTQ512 ...)
586 (LessFloat32x4 x y) => (VCMPPS128 [1] x y)
587 (LessFloat32x8 x y) => (VCMPPS256 [1] x y)
588 (LessFloat32x16 x y) => (VPMOVMToVec32x16 (VCMPPS512 [1] x y))
589 (LessFloat64x2 x y) => (VCMPPD128 [1] x y)
590 (LessFloat64x4 x y) => (VCMPPD256 [1] x y)
591 (LessFloat64x8 x y) => (VPMOVMToVec64x8 (VCMPPD512 [1] x y))
592 (LessInt8x64 x y) => (VPMOVMToVec8x64 (VPCMPB512 [1] x y))
593 (LessInt16x32 x y) => (VPMOVMToVec16x32 (VPCMPW512 [1] x y))
594 (LessInt32x16 x y) => (VPMOVMToVec32x16 (VPCMPD512 [1] x y))
595 (LessInt64x8 x y) => (VPMOVMToVec64x8 (VPCMPQ512 [1] x y))
596 (LessUint8x64 x y) => (VPMOVMToVec8x64 (VPCMPUB512 [1] x y))
597 (LessUint16x32 x y) => (VPMOVMToVec16x32 (VPCMPUW512 [1] x y))
598 (LessUint32x16 x y) => (VPMOVMToVec32x16 (VPCMPUD512 [1] x y))
599 (LessUint64x8 x y) => (VPMOVMToVec64x8 (VPCMPUQ512 [1] x y))
600 (LessEqualFloat32x4 x y) => (VCMPPS128 [2] x y)
601 (LessEqualFloat32x8 x y) => (VCMPPS256 [2] x y)
602 (LessEqualFloat32x16 x y) => (VPMOVMToVec32x16 (VCMPPS512 [2] x y))
603 (LessEqualFloat64x2 x y) => (VCMPPD128 [2] x y)
604 (LessEqualFloat64x4 x y) => (VCMPPD256 [2] x y)
605 (LessEqualFloat64x8 x y) => (VPMOVMToVec64x8 (VCMPPD512 [2] x y))
606 (LessEqualInt8x64 x y) => (VPMOVMToVec8x64 (VPCMPB512 [2] x y))
607 (LessEqualInt16x32 x y) => (VPMOVMToVec16x32 (VPCMPW512 [2] x y))
608 (LessEqualInt32x16 x y) => (VPMOVMToVec32x16 (VPCMPD512 [2] x y))
609 (LessEqualInt64x8 x y) => (VPMOVMToVec64x8 (VPCMPQ512 [2] x y))
610 (LessEqualUint8x64 x y) => (VPMOVMToVec8x64 (VPCMPUB512 [2] x y))
611 (LessEqualUint16x32 x y) => (VPMOVMToVec16x32 (VPCMPUW512 [2] x y))
612 (LessEqualUint32x16 x y) => (VPMOVMToVec32x16 (VPCMPUD512 [2] x y))
613 (LessEqualUint64x8 x y) => (VPMOVMToVec64x8 (VPCMPUQ512 [2] x y))
614 (MaxFloat32x4 ...) => (VMAXPS128 ...)
615 (MaxFloat32x8 ...) => (VMAXPS256 ...)
616 (MaxFloat32x16 ...) => (VMAXPS512 ...)
617 (MaxFloat64x2 ...) => (VMAXPD128 ...)
618 (MaxFloat64x4 ...) => (VMAXPD256 ...)
619 (MaxFloat64x8 ...) => (VMAXPD512 ...)
620 (MaxInt8x16 ...) => (VPMAXSB128 ...)
621 (MaxInt8x32 ...) => (VPMAXSB256 ...)
622 (MaxInt8x64 ...) => (VPMAXSB512 ...)
623 (MaxInt16x8 ...) => (VPMAXSW128 ...)
624 (MaxInt16x16 ...) => (VPMAXSW256 ...)
625 (MaxInt16x32 ...) => (VPMAXSW512 ...)
626 (MaxInt32x4 ...) => (VPMAXSD128 ...)
627 (MaxInt32x8 ...) => (VPMAXSD256 ...)
628 (MaxInt32x16 ...) => (VPMAXSD512 ...)
629 (MaxInt64x2 ...) => (VPMAXSQ128 ...)
630 (MaxInt64x4 ...) => (VPMAXSQ256 ...)
631 (MaxInt64x8 ...) => (VPMAXSQ512 ...)
632 (MaxUint8x16 ...) => (VPMAXUB128 ...)
633 (MaxUint8x32 ...) => (VPMAXUB256 ...)
634 (MaxUint8x64 ...) => (VPMAXUB512 ...)
635 (MaxUint16x8 ...) => (VPMAXUW128 ...)
636 (MaxUint16x16 ...) => (VPMAXUW256 ...)
637 (MaxUint16x32 ...) => (VPMAXUW512 ...)
638 (MaxUint32x4 ...) => (VPMAXUD128 ...)
639 (MaxUint32x8 ...) => (VPMAXUD256 ...)
640 (MaxUint32x16 ...) => (VPMAXUD512 ...)
641 (MaxUint64x2 ...) => (VPMAXUQ128 ...)
642 (MaxUint64x4 ...) => (VPMAXUQ256 ...)
643 (MaxUint64x8 ...) => (VPMAXUQ512 ...)
644 (MinFloat32x4 ...) => (VMINPS128 ...)
645 (MinFloat32x8 ...) => (VMINPS256 ...)
646 (MinFloat32x16 ...) => (VMINPS512 ...)
647 (MinFloat64x2 ...) => (VMINPD128 ...)
648 (MinFloat64x4 ...) => (VMINPD256 ...)
649 (MinFloat64x8 ...) => (VMINPD512 ...)
650 (MinInt8x16 ...) => (VPMINSB128 ...)
651 (MinInt8x32 ...) => (VPMINSB256 ...)
652 (MinInt8x64 ...) => (VPMINSB512 ...)
653 (MinInt16x8 ...) => (VPMINSW128 ...)
654 (MinInt16x16 ...) => (VPMINSW256 ...)
655 (MinInt16x32 ...) => (VPMINSW512 ...)
656 (MinInt32x4 ...) => (VPMINSD128 ...)
657 (MinInt32x8 ...) => (VPMINSD256 ...)
658 (MinInt32x16 ...) => (VPMINSD512 ...)
659 (MinInt64x2 ...) => (VPMINSQ128 ...)
660 (MinInt64x4 ...) => (VPMINSQ256 ...)
661 (MinInt64x8 ...) => (VPMINSQ512 ...)
662 (MinUint8x16 ...) => (VPMINUB128 ...)
663 (MinUint8x32 ...) => (VPMINUB256 ...)
664 (MinUint8x64 ...) => (VPMINUB512 ...)
665 (MinUint16x8 ...) => (VPMINUW128 ...)
666 (MinUint16x16 ...) => (VPMINUW256 ...)
667 (MinUint16x32 ...) => (VPMINUW512 ...)
668 (MinUint32x4 ...) => (VPMINUD128 ...)
669 (MinUint32x8 ...) => (VPMINUD256 ...)
670 (MinUint32x16 ...) => (VPMINUD512 ...)
671 (MinUint64x2 ...) => (VPMINUQ128 ...)
672 (MinUint64x4 ...) => (VPMINUQ256 ...)
673 (MinUint64x8 ...) => (VPMINUQ512 ...)
674 (MulFloat32x4 ...) => (VMULPS128 ...)
675 (MulFloat32x8 ...) => (VMULPS256 ...)
676 (MulFloat32x16 ...) => (VMULPS512 ...)
677 (MulFloat64x2 ...) => (VMULPD128 ...)
678 (MulFloat64x4 ...) => (VMULPD256 ...)
679 (MulFloat64x8 ...) => (VMULPD512 ...)
680 (MulInt16x8 ...) => (VPMULLW128 ...)
681 (MulInt16x16 ...) => (VPMULLW256 ...)
682 (MulInt16x32 ...) => (VPMULLW512 ...)
683 (MulInt32x4 ...) => (VPMULLD128 ...)
684 (MulInt32x8 ...) => (VPMULLD256 ...)
685 (MulInt32x16 ...) => (VPMULLD512 ...)
686 (MulInt64x2 ...) => (VPMULLQ128 ...)
687 (MulInt64x4 ...) => (VPMULLQ256 ...)
688 (MulInt64x8 ...) => (VPMULLQ512 ...)
689 (MulUint16x8 ...) => (VPMULLW128 ...)
690 (MulUint16x16 ...) => (VPMULLW256 ...)
691 (MulUint16x32 ...) => (VPMULLW512 ...)
692 (MulUint32x4 ...) => (VPMULLD128 ...)
693 (MulUint32x8 ...) => (VPMULLD256 ...)
694 (MulUint32x16 ...) => (VPMULLD512 ...)
695 (MulUint64x2 ...) => (VPMULLQ128 ...)
696 (MulUint64x4 ...) => (VPMULLQ256 ...)
697 (MulUint64x8 ...) => (VPMULLQ512 ...)
698 (MulAddFloat32x4 ...) => (VFMADD213PS128 ...)
699 (MulAddFloat32x8 ...) => (VFMADD213PS256 ...)
700 (MulAddFloat32x16 ...) => (VFMADD213PS512 ...)
701 (MulAddFloat64x2 ...) => (VFMADD213PD128 ...)
702 (MulAddFloat64x4 ...) => (VFMADD213PD256 ...)
703 (MulAddFloat64x8 ...) => (VFMADD213PD512 ...)
704 (MulAddSubFloat32x4 ...) => (VFMADDSUB213PS128 ...)
705 (MulAddSubFloat32x8 ...) => (VFMADDSUB213PS256 ...)
706 (MulAddSubFloat32x16 ...) => (VFMADDSUB213PS512 ...)
707 (MulAddSubFloat64x2 ...) => (VFMADDSUB213PD128 ...)
708 (MulAddSubFloat64x4 ...) => (VFMADDSUB213PD256 ...)
709 (MulAddSubFloat64x8 ...) => (VFMADDSUB213PD512 ...)
710 (MulEvenWidenInt32x4 ...) => (VPMULDQ128 ...)
711 (MulEvenWidenInt32x8 ...) => (VPMULDQ256 ...)
712 (MulEvenWidenUint32x4 ...) => (VPMULUDQ128 ...)
713 (MulEvenWidenUint32x8 ...) => (VPMULUDQ256 ...)
714 (MulHighInt16x8 ...) => (VPMULHW128 ...)
715 (MulHighInt16x16 ...) => (VPMULHW256 ...)
716 (MulHighInt16x32 ...) => (VPMULHW512 ...)
717 (MulHighUint16x8 ...) => (VPMULHUW128 ...)
718 (MulHighUint16x16 ...) => (VPMULHUW256 ...)
719 (MulHighUint16x32 ...) => (VPMULHUW512 ...)
720 (MulSubAddFloat32x4 ...) => (VFMSUBADD213PS128 ...)
721 (MulSubAddFloat32x8 ...) => (VFMSUBADD213PS256 ...)
722 (MulSubAddFloat32x16 ...) => (VFMSUBADD213PS512 ...)
723 (MulSubAddFloat64x2 ...) => (VFMSUBADD213PD128 ...)
724 (MulSubAddFloat64x4 ...) => (VFMSUBADD213PD256 ...)
725 (MulSubAddFloat64x8 ...) => (VFMSUBADD213PD512 ...)
726 (NotEqualFloat32x4 x y) => (VCMPPS128 [4] x y)
727 (NotEqualFloat32x8 x y) => (VCMPPS256 [4] x y)
728 (NotEqualFloat32x16 x y) => (VPMOVMToVec32x16 (VCMPPS512 [4] x y))
729 (NotEqualFloat64x2 x y) => (VCMPPD128 [4] x y)
730 (NotEqualFloat64x4 x y) => (VCMPPD256 [4] x y)
731 (NotEqualFloat64x8 x y) => (VPMOVMToVec64x8 (VCMPPD512 [4] x y))
732 (NotEqualInt8x64 x y) => (VPMOVMToVec8x64 (VPCMPB512 [4] x y))
733 (NotEqualInt16x32 x y) => (VPMOVMToVec16x32 (VPCMPW512 [4] x y))
734 (NotEqualInt32x16 x y) => (VPMOVMToVec32x16 (VPCMPD512 [4] x y))
735 (NotEqualInt64x8 x y) => (VPMOVMToVec64x8 (VPCMPQ512 [4] x y))
736 (NotEqualUint8x64 x y) => (VPMOVMToVec8x64 (VPCMPUB512 [4] x y))
737 (NotEqualUint16x32 x y) => (VPMOVMToVec16x32 (VPCMPUW512 [4] x y))
738 (NotEqualUint32x16 x y) => (VPMOVMToVec32x16 (VPCMPUD512 [4] x y))
739 (NotEqualUint64x8 x y) => (VPMOVMToVec64x8 (VPCMPUQ512 [4] x y))
740 (OnesCountInt8x16 ...) => (VPOPCNTB128 ...)
741 (OnesCountInt8x32 ...) => (VPOPCNTB256 ...)
742 (OnesCountInt8x64 ...) => (VPOPCNTB512 ...)
743 (OnesCountInt16x8 ...) => (VPOPCNTW128 ...)
744 (OnesCountInt16x16 ...) => (VPOPCNTW256 ...)
745 (OnesCountInt16x32 ...) => (VPOPCNTW512 ...)
746 (OnesCountInt32x4 ...) => (VPOPCNTD128 ...)
747 (OnesCountInt32x8 ...) => (VPOPCNTD256 ...)
748 (OnesCountInt32x16 ...) => (VPOPCNTD512 ...)
749 (OnesCountInt64x2 ...) => (VPOPCNTQ128 ...)
750 (OnesCountInt64x4 ...) => (VPOPCNTQ256 ...)
751 (OnesCountInt64x8 ...) => (VPOPCNTQ512 ...)
752 (OnesCountUint8x16 ...) => (VPOPCNTB128 ...)
753 (OnesCountUint8x32 ...) => (VPOPCNTB256 ...)
754 (OnesCountUint8x64 ...) => (VPOPCNTB512 ...)
755 (OnesCountUint16x8 ...) => (VPOPCNTW128 ...)
756 (OnesCountUint16x16 ...) => (VPOPCNTW256 ...)
757 (OnesCountUint16x32 ...) => (VPOPCNTW512 ...)
758 (OnesCountUint32x4 ...) => (VPOPCNTD128 ...)
759 (OnesCountUint32x8 ...) => (VPOPCNTD256 ...)
760 (OnesCountUint32x16 ...) => (VPOPCNTD512 ...)
761 (OnesCountUint64x2 ...) => (VPOPCNTQ128 ...)
762 (OnesCountUint64x4 ...) => (VPOPCNTQ256 ...)
763 (OnesCountUint64x8 ...) => (VPOPCNTQ512 ...)
764 (OrInt8x16 ...) => (VPOR128 ...)
765 (OrInt8x32 ...) => (VPOR256 ...)
766 (OrInt8x64 ...) => (VPORD512 ...)
767 (OrInt16x8 ...) => (VPOR128 ...)
768 (OrInt16x16 ...) => (VPOR256 ...)
769 (OrInt16x32 ...) => (VPORD512 ...)
770 (OrInt32x4 ...) => (VPOR128 ...)
771 (OrInt32x8 ...) => (VPOR256 ...)
772 (OrInt32x16 ...) => (VPORD512 ...)
773 (OrInt64x2 ...) => (VPOR128 ...)
774 (OrInt64x4 ...) => (VPOR256 ...)
775 (OrInt64x8 ...) => (VPORQ512 ...)
776 (OrUint8x16 ...) => (VPOR128 ...)
777 (OrUint8x32 ...) => (VPOR256 ...)
778 (OrUint8x64 ...) => (VPORD512 ...)
779 (OrUint16x8 ...) => (VPOR128 ...)
780 (OrUint16x16 ...) => (VPOR256 ...)
781 (OrUint16x32 ...) => (VPORD512 ...)
782 (OrUint32x4 ...) => (VPOR128 ...)
783 (OrUint32x8 ...) => (VPOR256 ...)
784 (OrUint32x16 ...) => (VPORD512 ...)
785 (OrUint64x2 ...) => (VPOR128 ...)
786 (OrUint64x4 ...) => (VPOR256 ...)
787 (OrUint64x8 ...) => (VPORQ512 ...)
788 (PermuteFloat32x8 ...) => (VPERMPS256 ...)
789 (PermuteFloat32x16 ...) => (VPERMPS512 ...)
790 (PermuteFloat64x4 ...) => (VPERMPD256 ...)
791 (PermuteFloat64x8 ...) => (VPERMPD512 ...)
792 (PermuteInt8x16 ...) => (VPERMB128 ...)
793 (PermuteInt8x32 ...) => (VPERMB256 ...)
794 (PermuteInt8x64 ...) => (VPERMB512 ...)
795 (PermuteInt16x8 ...) => (VPERMW128 ...)
796 (PermuteInt16x16 ...) => (VPERMW256 ...)
797 (PermuteInt16x32 ...) => (VPERMW512 ...)
798 (PermuteInt32x8 ...) => (VPERMD256 ...)
799 (PermuteInt32x16 ...) => (VPERMD512 ...)
800 (PermuteInt64x4 ...) => (VPERMQ256 ...)
801 (PermuteInt64x8 ...) => (VPERMQ512 ...)
802 (PermuteUint8x16 ...) => (VPERMB128 ...)
803 (PermuteUint8x32 ...) => (VPERMB256 ...)
804 (PermuteUint8x64 ...) => (VPERMB512 ...)
805 (PermuteUint16x8 ...) => (VPERMW128 ...)
806 (PermuteUint16x16 ...) => (VPERMW256 ...)
807 (PermuteUint16x32 ...) => (VPERMW512 ...)
808 (PermuteUint32x8 ...) => (VPERMD256 ...)
809 (PermuteUint32x16 ...) => (VPERMD512 ...)
810 (PermuteUint64x4 ...) => (VPERMQ256 ...)
811 (PermuteUint64x8 ...) => (VPERMQ512 ...)
812 (PermuteOrZeroInt8x16 ...) => (VPSHUFB128 ...)
813 (PermuteOrZeroUint8x16 ...) => (VPSHUFB128 ...)
814 (PermuteOrZeroGroupedInt8x32 ...) => (VPSHUFB256 ...)
815 (PermuteOrZeroGroupedInt8x64 ...) => (VPSHUFB512 ...)
816 (PermuteOrZeroGroupedUint8x32 ...) => (VPSHUFB256 ...)
817 (PermuteOrZeroGroupedUint8x64 ...) => (VPSHUFB512 ...)
818 (ReciprocalFloat32x4 ...) => (VRCPPS128 ...)
819 (ReciprocalFloat32x8 ...) => (VRCPPS256 ...)
820 (ReciprocalFloat32x16 ...) => (VRCP14PS512 ...)
821 (ReciprocalFloat64x2 ...) => (VRCP14PD128 ...)
822 (ReciprocalFloat64x4 ...) => (VRCP14PD256 ...)
823 (ReciprocalFloat64x8 ...) => (VRCP14PD512 ...)
824 (ReciprocalSqrtFloat32x4 ...) => (VRSQRTPS128 ...)
825 (ReciprocalSqrtFloat32x8 ...) => (VRSQRTPS256 ...)
826 (ReciprocalSqrtFloat32x16 ...) => (VRSQRT14PS512 ...)
827 (ReciprocalSqrtFloat64x2 ...) => (VRSQRT14PD128 ...)
828 (ReciprocalSqrtFloat64x4 ...) => (VRSQRT14PD256 ...)
829 (ReciprocalSqrtFloat64x8 ...) => (VRSQRT14PD512 ...)
830 (RotateAllLeftInt32x4 ...) => (VPROLD128 ...)
831 (RotateAllLeftInt32x8 ...) => (VPROLD256 ...)
832 (RotateAllLeftInt32x16 ...) => (VPROLD512 ...)
833 (RotateAllLeftInt64x2 ...) => (VPROLQ128 ...)
834 (RotateAllLeftInt64x4 ...) => (VPROLQ256 ...)
835 (RotateAllLeftInt64x8 ...) => (VPROLQ512 ...)
836 (RotateAllLeftUint32x4 ...) => (VPROLD128 ...)
837 (RotateAllLeftUint32x8 ...) => (VPROLD256 ...)
838 (RotateAllLeftUint32x16 ...) => (VPROLD512 ...)
839 (RotateAllLeftUint64x2 ...) => (VPROLQ128 ...)
840 (RotateAllLeftUint64x4 ...) => (VPROLQ256 ...)
841 (RotateAllLeftUint64x8 ...) => (VPROLQ512 ...)
842 (RotateAllRightInt32x4 ...) => (VPRORD128 ...)
843 (RotateAllRightInt32x8 ...) => (VPRORD256 ...)
844 (RotateAllRightInt32x16 ...) => (VPRORD512 ...)
845 (RotateAllRightInt64x2 ...) => (VPRORQ128 ...)
846 (RotateAllRightInt64x4 ...) => (VPRORQ256 ...)
847 (RotateAllRightInt64x8 ...) => (VPRORQ512 ...)
848 (RotateAllRightUint32x4 ...) => (VPRORD128 ...)
849 (RotateAllRightUint32x8 ...) => (VPRORD256 ...)
850 (RotateAllRightUint32x16 ...) => (VPRORD512 ...)
851 (RotateAllRightUint64x2 ...) => (VPRORQ128 ...)
852 (RotateAllRightUint64x4 ...) => (VPRORQ256 ...)
853 (RotateAllRightUint64x8 ...) => (VPRORQ512 ...)
854 (RotateLeftInt32x4 ...) => (VPROLVD128 ...)
855 (RotateLeftInt32x8 ...) => (VPROLVD256 ...)
856 (RotateLeftInt32x16 ...) => (VPROLVD512 ...)
857 (RotateLeftInt64x2 ...) => (VPROLVQ128 ...)
858 (RotateLeftInt64x4 ...) => (VPROLVQ256 ...)
859 (RotateLeftInt64x8 ...) => (VPROLVQ512 ...)
860 (RotateLeftUint32x4 ...) => (VPROLVD128 ...)
861 (RotateLeftUint32x8 ...) => (VPROLVD256 ...)
862 (RotateLeftUint32x16 ...) => (VPROLVD512 ...)
863 (RotateLeftUint64x2 ...) => (VPROLVQ128 ...)
864 (RotateLeftUint64x4 ...) => (VPROLVQ256 ...)
865 (RotateLeftUint64x8 ...) => (VPROLVQ512 ...)
866 (RotateRightInt32x4 ...) => (VPRORVD128 ...)
867 (RotateRightInt32x8 ...) => (VPRORVD256 ...)
868 (RotateRightInt32x16 ...) => (VPRORVD512 ...)
869 (RotateRightInt64x2 ...) => (VPRORVQ128 ...)
870 (RotateRightInt64x4 ...) => (VPRORVQ256 ...)
871 (RotateRightInt64x8 ...) => (VPRORVQ512 ...)
872 (RotateRightUint32x4 ...) => (VPRORVD128 ...)
873 (RotateRightUint32x8 ...) => (VPRORVD256 ...)
874 (RotateRightUint32x16 ...) => (VPRORVD512 ...)
875 (RotateRightUint64x2 ...) => (VPRORVQ128 ...)
876 (RotateRightUint64x4 ...) => (VPRORVQ256 ...)
877 (RotateRightUint64x8 ...) => (VPRORVQ512 ...)
878 (RoundToEvenFloat32x4 x) => (VROUNDPS128 [0] x)
879 (RoundToEvenFloat32x8 x) => (VROUNDPS256 [0] x)
880 (RoundToEvenFloat64x2 x) => (VROUNDPD128 [0] x)
881 (RoundToEvenFloat64x4 x) => (VROUNDPD256 [0] x)
882 (RoundToEvenScaledFloat32x4 [a] x) => (VRNDSCALEPS128 [a+0] x)
883 (RoundToEvenScaledFloat32x8 [a] x) => (VRNDSCALEPS256 [a+0] x)
884 (RoundToEvenScaledFloat32x16 [a] x) => (VRNDSCALEPS512 [a+0] x)
885 (RoundToEvenScaledFloat64x2 [a] x) => (VRNDSCALEPD128 [a+0] x)
886 (RoundToEvenScaledFloat64x4 [a] x) => (VRNDSCALEPD256 [a+0] x)
887 (RoundToEvenScaledFloat64x8 [a] x) => (VRNDSCALEPD512 [a+0] x)
888 (RoundToEvenScaledResidueFloat32x4 [a] x) => (VREDUCEPS128 [a+0] x)
889 (RoundToEvenScaledResidueFloat32x8 [a] x) => (VREDUCEPS256 [a+0] x)
890 (RoundToEvenScaledResidueFloat32x16 [a] x) => (VREDUCEPS512 [a+0] x)
891 (RoundToEvenScaledResidueFloat64x2 [a] x) => (VREDUCEPD128 [a+0] x)
892 (RoundToEvenScaledResidueFloat64x4 [a] x) => (VREDUCEPD256 [a+0] x)
893 (RoundToEvenScaledResidueFloat64x8 [a] x) => (VREDUCEPD512 [a+0] x)
894 (SHA1FourRoundsUint32x4 ...) => (SHA1RNDS4128 ...)
895 (SHA1Message1Uint32x4 ...) => (SHA1MSG1128 ...)
896 (SHA1Message2Uint32x4 ...) => (SHA1MSG2128 ...)
897 (SHA1NextEUint32x4 ...) => (SHA1NEXTE128 ...)
898 (SHA256Message1Uint32x4 ...) => (SHA256MSG1128 ...)
899 (SHA256Message2Uint32x4 ...) => (SHA256MSG2128 ...)
900 (SHA256TwoRoundsUint32x4 ...) => (SHA256RNDS2128 ...)
901 (SaturateToInt8Int16x8 ...) => (VPMOVSWB128_128 ...)
902 (SaturateToInt8Int16x16 ...) => (VPMOVSWB128_256 ...)
903 (SaturateToInt8Int16x32 ...) => (VPMOVSWB256 ...)
904 (SaturateToInt8Int32x4 ...) => (VPMOVSDB128_128 ...)
905 (SaturateToInt8Int32x8 ...) => (VPMOVSDB128_256 ...)
906 (SaturateToInt8Int32x16 ...) => (VPMOVSDB128_512 ...)
907 (SaturateToInt8Int64x2 ...) => (VPMOVSQB128_128 ...)
908 (SaturateToInt8Int64x4 ...) => (VPMOVSQB128_256 ...)
909 (SaturateToInt8Int64x8 ...) => (VPMOVSQB128_512 ...)
910 (SaturateToInt16Int32x4 ...) => (VPMOVSDW128_128 ...)
911 (SaturateToInt16Int32x8 ...) => (VPMOVSDW128_256 ...)
912 (SaturateToInt16Int32x16 ...) => (VPMOVSDW256 ...)
913 (SaturateToInt16Int64x2 ...) => (VPMOVSQW128_128 ...)
914 (SaturateToInt16Int64x4 ...) => (VPMOVSQW128_256 ...)
915 (SaturateToInt16Int64x8 ...) => (VPMOVSQW128_512 ...)
916 (SaturateToInt16ConcatInt32x4 ...) => (VPACKSSDW128 ...)
917 (SaturateToInt16ConcatInt32x8 ...) => (VPACKSSDW256 ...)
918 (SaturateToInt16ConcatInt32x16 ...) => (VPACKSSDW512 ...)
919 (SaturateToInt32Int64x2 ...) => (VPMOVSQD128_128 ...)
920 (SaturateToInt32Int64x4 ...) => (VPMOVSQD128_256 ...)
921 (SaturateToInt32Int64x8 ...) => (VPMOVSQD256 ...)
922 (SaturateToUint8Int16x8 ...) => (VPMOVSWB128_128 ...)
923 (SaturateToUint8Int16x16 ...) => (VPMOVSWB128_256 ...)
924 (SaturateToUint8Int32x4 ...) => (VPMOVSDB128_128 ...)
925 (SaturateToUint8Int32x8 ...) => (VPMOVSDB128_256 ...)
926 (SaturateToUint8Int32x16 ...) => (VPMOVSDB128_512 ...)
927 (SaturateToUint8Int64x2 ...) => (VPMOVSQB128_128 ...)
928 (SaturateToUint8Int64x4 ...) => (VPMOVSQB128_256 ...)
929 (SaturateToUint8Int64x8 ...) => (VPMOVSQB128_512 ...)
930 (SaturateToUint8Uint16x32 ...) => (VPMOVUSWB256 ...)
931 (SaturateToUint16Uint32x4 ...) => (VPMOVUSDW128_128 ...)
932 (SaturateToUint16Uint32x8 ...) => (VPMOVUSDW128_256 ...)
933 (SaturateToUint16Uint32x16 ...) => (VPMOVUSDW256 ...)
934 (SaturateToUint16Uint64x2 ...) => (VPMOVUSQW128_128 ...)
935 (SaturateToUint16Uint64x4 ...) => (VPMOVUSQW128_256 ...)
936 (SaturateToUint16Uint64x8 ...) => (VPMOVUSQW128_512 ...)
937 (SaturateToUint16ConcatUint32x4 ...) => (VPACKUSDW128 ...)
938 (SaturateToUint16ConcatUint32x8 ...) => (VPACKUSDW256 ...)
939 (SaturateToUint16ConcatUint32x16 ...) => (VPACKUSDW512 ...)
940 (SaturateToUint32Uint64x2 ...) => (VPMOVUSQD128_128 ...)
941 (SaturateToUint32Uint64x4 ...) => (VPMOVUSQD128_256 ...)
942 (SaturateToUint32Uint64x8 ...) => (VPMOVUSQD256 ...)
943 (ScaleFloat32x4 ...) => (VSCALEFPS128 ...)
944 (ScaleFloat32x8 ...) => (VSCALEFPS256 ...)
945 (ScaleFloat32x16 ...) => (VSCALEFPS512 ...)
946 (ScaleFloat64x2 ...) => (VSCALEFPD128 ...)
947 (ScaleFloat64x4 ...) => (VSCALEFPD256 ...)
948 (ScaleFloat64x8 ...) => (VSCALEFPD512 ...)
949 (Select128FromPairFloat32x8 ...) => (VPERM2F128256 ...)
950 (Select128FromPairFloat64x4 ...) => (VPERM2F128256 ...)
951 (Select128FromPairInt8x32 ...) => (VPERM2I128256 ...)
952 (Select128FromPairInt16x16 ...) => (VPERM2I128256 ...)
953 (Select128FromPairInt32x8 ...) => (VPERM2I128256 ...)
954 (Select128FromPairInt64x4 ...) => (VPERM2I128256 ...)
955 (Select128FromPairUint8x32 ...) => (VPERM2I128256 ...)
956 (Select128FromPairUint16x16 ...) => (VPERM2I128256 ...)
957 (Select128FromPairUint32x8 ...) => (VPERM2I128256 ...)
958 (Select128FromPairUint64x4 ...) => (VPERM2I128256 ...)
959 (SetElemFloat32x4 ...) => (VPINSRD128 ...)
960 (SetElemFloat64x2 ...) => (VPINSRQ128 ...)
961 (SetElemInt8x16 ...) => (VPINSRB128 ...)
962 (SetElemInt16x8 ...) => (VPINSRW128 ...)
963 (SetElemInt32x4 ...) => (VPINSRD128 ...)
964 (SetElemInt64x2 ...) => (VPINSRQ128 ...)
965 (SetElemUint8x16 ...) => (VPINSRB128 ...)
966 (SetElemUint16x8 ...) => (VPINSRW128 ...)
967 (SetElemUint32x4 ...) => (VPINSRD128 ...)
968 (SetElemUint64x2 ...) => (VPINSRQ128 ...)
969 (SetHiFloat32x8 x y) => (VINSERTF128256 [1] x y)
970 (SetHiFloat32x16 x y) => (VINSERTF64X4512 [1] x y)
971 (SetHiFloat64x4 x y) => (VINSERTF128256 [1] x y)
972 (SetHiFloat64x8 x y) => (VINSERTF64X4512 [1] x y)
973 (SetHiInt8x32 x y) => (VINSERTI128256 [1] x y)
974 (SetHiInt8x64 x y) => (VINSERTI64X4512 [1] x y)
975 (SetHiInt16x16 x y) => (VINSERTI128256 [1] x y)
976 (SetHiInt16x32 x y) => (VINSERTI64X4512 [1] x y)
977 (SetHiInt32x8 x y) => (VINSERTI128256 [1] x y)
978 (SetHiInt32x16 x y) => (VINSERTI64X4512 [1] x y)
979 (SetHiInt64x4 x y) => (VINSERTI128256 [1] x y)
980 (SetHiInt64x8 x y) => (VINSERTI64X4512 [1] x y)
981 (SetHiUint8x32 x y) => (VINSERTI128256 [1] x y)
982 (SetHiUint8x64 x y) => (VINSERTI64X4512 [1] x y)
983 (SetHiUint16x16 x y) => (VINSERTI128256 [1] x y)
984 (SetHiUint16x32 x y) => (VINSERTI64X4512 [1] x y)
985 (SetHiUint32x8 x y) => (VINSERTI128256 [1] x y)
986 (SetHiUint32x16 x y) => (VINSERTI64X4512 [1] x y)
987 (SetHiUint64x4 x y) => (VINSERTI128256 [1] x y)
988 (SetHiUint64x8 x y) => (VINSERTI64X4512 [1] x y)
989 (SetLoFloat32x8 x y) => (VINSERTF128256 [0] x y)
990 (SetLoFloat32x16 x y) => (VINSERTF64X4512 [0] x y)
991 (SetLoFloat64x4 x y) => (VINSERTF128256 [0] x y)
992 (SetLoFloat64x8 x y) => (VINSERTF64X4512 [0] x y)
993 (SetLoInt8x32 x y) => (VINSERTI128256 [0] x y)
994 (SetLoInt8x64 x y) => (VINSERTI64X4512 [0] x y)
995 (SetLoInt16x16 x y) => (VINSERTI128256 [0] x y)
996 (SetLoInt16x32 x y) => (VINSERTI64X4512 [0] x y)
997 (SetLoInt32x8 x y) => (VINSERTI128256 [0] x y)
998 (SetLoInt32x16 x y) => (VINSERTI64X4512 [0] x y)
999 (SetLoInt64x4 x y) => (VINSERTI128256 [0] x y)
1000 (SetLoInt64x8 x y) => (VINSERTI64X4512 [0] x y)
1001 (SetLoUint8x32 x y) => (VINSERTI128256 [0] x y)
1002 (SetLoUint8x64 x y) => (VINSERTI64X4512 [0] x y)
1003 (SetLoUint16x16 x y) => (VINSERTI128256 [0] x y)
1004 (SetLoUint16x32 x y) => (VINSERTI64X4512 [0] x y)
1005 (SetLoUint32x8 x y) => (VINSERTI128256 [0] x y)
1006 (SetLoUint32x16 x y) => (VINSERTI64X4512 [0] x y)
1007 (SetLoUint64x4 x y) => (VINSERTI128256 [0] x y)
1008 (SetLoUint64x8 x y) => (VINSERTI64X4512 [0] x y)
1009 (ShiftAllLeftInt16x8 ...) => (VPSLLW128 ...)
1010 (VPSLLW128 x (MOVQconst [c])) => (VPSLLW128const [uint8(c)] x)
1011 (ShiftAllLeftInt16x16 ...) => (VPSLLW256 ...)
1012 (VPSLLW256 x (MOVQconst [c])) => (VPSLLW256const [uint8(c)] x)
1013 (ShiftAllLeftInt16x32 ...) => (VPSLLW512 ...)
1014 (VPSLLW512 x (MOVQconst [c])) => (VPSLLW512const [uint8(c)] x)
1015 (ShiftAllLeftInt32x4 ...) => (VPSLLD128 ...)
1016 (VPSLLD128 x (MOVQconst [c])) => (VPSLLD128const [uint8(c)] x)
1017 (ShiftAllLeftInt32x8 ...) => (VPSLLD256 ...)
1018 (VPSLLD256 x (MOVQconst [c])) => (VPSLLD256const [uint8(c)] x)
1019 (ShiftAllLeftInt32x16 ...) => (VPSLLD512 ...)
1020 (VPSLLD512 x (MOVQconst [c])) => (VPSLLD512const [uint8(c)] x)
1021 (ShiftAllLeftInt64x2 ...) => (VPSLLQ128 ...)
1022 (VPSLLQ128 x (MOVQconst [c])) => (VPSLLQ128const [uint8(c)] x)
1023 (ShiftAllLeftInt64x4 ...) => (VPSLLQ256 ...)
1024 (VPSLLQ256 x (MOVQconst [c])) => (VPSLLQ256const [uint8(c)] x)
1025 (ShiftAllLeftInt64x8 ...) => (VPSLLQ512 ...)
1026 (VPSLLQ512 x (MOVQconst [c])) => (VPSLLQ512const [uint8(c)] x)
1027 (ShiftAllLeftUint16x8 ...) => (VPSLLW128 ...)
1028 (ShiftAllLeftUint16x16 ...) => (VPSLLW256 ...)
1029 (ShiftAllLeftUint16x32 ...) => (VPSLLW512 ...)
1030 (ShiftAllLeftUint32x4 ...) => (VPSLLD128 ...)
1031 (ShiftAllLeftUint32x8 ...) => (VPSLLD256 ...)
1032 (ShiftAllLeftUint32x16 ...) => (VPSLLD512 ...)
1033 (ShiftAllLeftUint64x2 ...) => (VPSLLQ128 ...)
1034 (ShiftAllLeftUint64x4 ...) => (VPSLLQ256 ...)
1035 (ShiftAllLeftUint64x8 ...) => (VPSLLQ512 ...)
1036 (ShiftAllLeftConcatInt16x8 ...) => (VPSHLDW128 ...)
1037 (ShiftAllLeftConcatInt16x16 ...) => (VPSHLDW256 ...)
1038 (ShiftAllLeftConcatInt16x32 ...) => (VPSHLDW512 ...)
1039 (ShiftAllLeftConcatInt32x4 ...) => (VPSHLDD128 ...)
1040 (ShiftAllLeftConcatInt32x8 ...) => (VPSHLDD256 ...)
1041 (ShiftAllLeftConcatInt32x16 ...) => (VPSHLDD512 ...)
1042 (ShiftAllLeftConcatInt64x2 ...) => (VPSHLDQ128 ...)
1043 (ShiftAllLeftConcatInt64x4 ...) => (VPSHLDQ256 ...)
1044 (ShiftAllLeftConcatInt64x8 ...) => (VPSHLDQ512 ...)
1045 (ShiftAllLeftConcatUint16x8 ...) => (VPSHLDW128 ...)
1046 (ShiftAllLeftConcatUint16x16 ...) => (VPSHLDW256 ...)
1047 (ShiftAllLeftConcatUint16x32 ...) => (VPSHLDW512 ...)
1048 (ShiftAllLeftConcatUint32x4 ...) => (VPSHLDD128 ...)
1049 (ShiftAllLeftConcatUint32x8 ...) => (VPSHLDD256 ...)
1050 (ShiftAllLeftConcatUint32x16 ...) => (VPSHLDD512 ...)
1051 (ShiftAllLeftConcatUint64x2 ...) => (VPSHLDQ128 ...)
1052 (ShiftAllLeftConcatUint64x4 ...) => (VPSHLDQ256 ...)
1053 (ShiftAllLeftConcatUint64x8 ...) => (VPSHLDQ512 ...)
1054 (VPSLLWMasked128 x (MOVQconst [c]) mask) => (VPSLLWMasked128const [uint8(c)] x mask)
1055 (VPSLLWMasked256 x (MOVQconst [c]) mask) => (VPSLLWMasked256const [uint8(c)] x mask)
1056 (VPSLLWMasked512 x (MOVQconst [c]) mask) => (VPSLLWMasked512const [uint8(c)] x mask)
1057 (VPSLLDMasked128 x (MOVQconst [c]) mask) => (VPSLLDMasked128const [uint8(c)] x mask)
1058 (VPSLLDMasked256 x (MOVQconst [c]) mask) => (VPSLLDMasked256const [uint8(c)] x mask)
1059 (VPSLLDMasked512 x (MOVQconst [c]) mask) => (VPSLLDMasked512const [uint8(c)] x mask)
1060 (VPSLLQMasked128 x (MOVQconst [c]) mask) => (VPSLLQMasked128const [uint8(c)] x mask)
1061 (VPSLLQMasked256 x (MOVQconst [c]) mask) => (VPSLLQMasked256const [uint8(c)] x mask)
1062 (VPSLLQMasked512 x (MOVQconst [c]) mask) => (VPSLLQMasked512const [uint8(c)] x mask)
1063 (ShiftAllRightInt16x8 ...) => (VPSRAW128 ...)
1064 (VPSRAW128 x (MOVQconst [c])) => (VPSRAW128const [uint8(c)] x)
1065 (ShiftAllRightInt16x16 ...) => (VPSRAW256 ...)
1066 (VPSRAW256 x (MOVQconst [c])) => (VPSRAW256const [uint8(c)] x)
1067 (ShiftAllRightInt16x32 ...) => (VPSRAW512 ...)
1068 (VPSRAW512 x (MOVQconst [c])) => (VPSRAW512const [uint8(c)] x)
1069 (ShiftAllRightInt32x4 ...) => (VPSRAD128 ...)
1070 (VPSRAD128 x (MOVQconst [c])) => (VPSRAD128const [uint8(c)] x)
1071 (ShiftAllRightInt32x8 ...) => (VPSRAD256 ...)
1072 (VPSRAD256 x (MOVQconst [c])) => (VPSRAD256const [uint8(c)] x)
1073 (ShiftAllRightInt32x16 ...) => (VPSRAD512 ...)
1074 (VPSRAD512 x (MOVQconst [c])) => (VPSRAD512const [uint8(c)] x)
1075 (ShiftAllRightInt64x2 ...) => (VPSRAQ128 ...)
1076 (VPSRAQ128 x (MOVQconst [c])) => (VPSRAQ128const [uint8(c)] x)
1077 (ShiftAllRightInt64x4 ...) => (VPSRAQ256 ...)
1078 (VPSRAQ256 x (MOVQconst [c])) => (VPSRAQ256const [uint8(c)] x)
1079 (ShiftAllRightInt64x8 ...) => (VPSRAQ512 ...)
1080 (VPSRAQ512 x (MOVQconst [c])) => (VPSRAQ512const [uint8(c)] x)
1081 (ShiftAllRightUint16x8 ...) => (VPSRLW128 ...)
1082 (ShiftAllRightUint16x16 ...) => (VPSRLW256 ...)
1083 (ShiftAllRightUint16x32 ...) => (VPSRLW512 ...)
1084 (ShiftAllRightUint32x4 ...) => (VPSRLD128 ...)
1085 (ShiftAllRightUint32x8 ...) => (VPSRLD256 ...)
1086 (ShiftAllRightUint32x16 ...) => (VPSRLD512 ...)
1087 (ShiftAllRightUint64x2 ...) => (VPSRLQ128 ...)
1088 (ShiftAllRightUint64x4 ...) => (VPSRLQ256 ...)
1089 (ShiftAllRightUint64x8 ...) => (VPSRLQ512 ...)
1090 (ShiftAllRightConcatInt16x8 ...) => (VPSHRDW128 ...)
1091 (ShiftAllRightConcatInt16x16 ...) => (VPSHRDW256 ...)
1092 (ShiftAllRightConcatInt16x32 ...) => (VPSHRDW512 ...)
1093 (ShiftAllRightConcatInt32x4 ...) => (VPSHRDD128 ...)
1094 (ShiftAllRightConcatInt32x8 ...) => (VPSHRDD256 ...)
1095 (ShiftAllRightConcatInt32x16 ...) => (VPSHRDD512 ...)
1096 (ShiftAllRightConcatInt64x2 ...) => (VPSHRDQ128 ...)
1097 (ShiftAllRightConcatInt64x4 ...) => (VPSHRDQ256 ...)
1098 (ShiftAllRightConcatInt64x8 ...) => (VPSHRDQ512 ...)
1099 (ShiftAllRightConcatUint16x8 ...) => (VPSHRDW128 ...)
1100 (ShiftAllRightConcatUint16x16 ...) => (VPSHRDW256 ...)
1101 (ShiftAllRightConcatUint16x32 ...) => (VPSHRDW512 ...)
1102 (ShiftAllRightConcatUint32x4 ...) => (VPSHRDD128 ...)
1103 (ShiftAllRightConcatUint32x8 ...) => (VPSHRDD256 ...)
1104 (ShiftAllRightConcatUint32x16 ...) => (VPSHRDD512 ...)
1105 (ShiftAllRightConcatUint64x2 ...) => (VPSHRDQ128 ...)
1106 (ShiftAllRightConcatUint64x4 ...) => (VPSHRDQ256 ...)
1107 (ShiftAllRightConcatUint64x8 ...) => (VPSHRDQ512 ...)
1108 (VPSRAWMasked128 x (MOVQconst [c]) mask) => (VPSRAWMasked128const [uint8(c)] x mask)
1109 (VPSRAWMasked256 x (MOVQconst [c]) mask) => (VPSRAWMasked256const [uint8(c)] x mask)
1110 (VPSRAWMasked512 x (MOVQconst [c]) mask) => (VPSRAWMasked512const [uint8(c)] x mask)
1111 (VPSRADMasked128 x (MOVQconst [c]) mask) => (VPSRADMasked128const [uint8(c)] x mask)
1112 (VPSRADMasked256 x (MOVQconst [c]) mask) => (VPSRADMasked256const [uint8(c)] x mask)
1113 (VPSRADMasked512 x (MOVQconst [c]) mask) => (VPSRADMasked512const [uint8(c)] x mask)
1114 (VPSRAQMasked128 x (MOVQconst [c]) mask) => (VPSRAQMasked128const [uint8(c)] x mask)
1115 (VPSRAQMasked256 x (MOVQconst [c]) mask) => (VPSRAQMasked256const [uint8(c)] x mask)
1116 (VPSRAQMasked512 x (MOVQconst [c]) mask) => (VPSRAQMasked512const [uint8(c)] x mask)
1117 (ShiftLeftInt16x8 ...) => (VPSLLVW128 ...)
1118 (ShiftLeftInt16x16 ...) => (VPSLLVW256 ...)
1119 (ShiftLeftInt16x32 ...) => (VPSLLVW512 ...)
1120 (ShiftLeftInt32x4 ...) => (VPSLLVD128 ...)
1121 (ShiftLeftInt32x8 ...) => (VPSLLVD256 ...)
1122 (ShiftLeftInt32x16 ...) => (VPSLLVD512 ...)
1123 (ShiftLeftInt64x2 ...) => (VPSLLVQ128 ...)
1124 (ShiftLeftInt64x4 ...) => (VPSLLVQ256 ...)
1125 (ShiftLeftInt64x8 ...) => (VPSLLVQ512 ...)
1126 (ShiftLeftUint16x8 ...) => (VPSLLVW128 ...)
1127 (ShiftLeftUint16x16 ...) => (VPSLLVW256 ...)
1128 (ShiftLeftUint16x32 ...) => (VPSLLVW512 ...)
1129 (ShiftLeftUint32x4 ...) => (VPSLLVD128 ...)
1130 (ShiftLeftUint32x8 ...) => (VPSLLVD256 ...)
1131 (ShiftLeftUint32x16 ...) => (VPSLLVD512 ...)
1132 (ShiftLeftUint64x2 ...) => (VPSLLVQ128 ...)
1133 (ShiftLeftUint64x4 ...) => (VPSLLVQ256 ...)
1134 (ShiftLeftUint64x8 ...) => (VPSLLVQ512 ...)
1135 (ShiftLeftConcatInt16x8 ...) => (VPSHLDVW128 ...)
1136 (ShiftLeftConcatInt16x16 ...) => (VPSHLDVW256 ...)
1137 (ShiftLeftConcatInt16x32 ...) => (VPSHLDVW512 ...)
1138 (ShiftLeftConcatInt32x4 ...) => (VPSHLDVD128 ...)
1139 (ShiftLeftConcatInt32x8 ...) => (VPSHLDVD256 ...)
1140 (ShiftLeftConcatInt32x16 ...) => (VPSHLDVD512 ...)
1141 (ShiftLeftConcatInt64x2 ...) => (VPSHLDVQ128 ...)
1142 (ShiftLeftConcatInt64x4 ...) => (VPSHLDVQ256 ...)
1143 (ShiftLeftConcatInt64x8 ...) => (VPSHLDVQ512 ...)
1144 (ShiftLeftConcatUint16x8 ...) => (VPSHLDVW128 ...)
1145 (ShiftLeftConcatUint16x16 ...) => (VPSHLDVW256 ...)
1146 (ShiftLeftConcatUint16x32 ...) => (VPSHLDVW512 ...)
1147 (ShiftLeftConcatUint32x4 ...) => (VPSHLDVD128 ...)
1148 (ShiftLeftConcatUint32x8 ...) => (VPSHLDVD256 ...)
1149 (ShiftLeftConcatUint32x16 ...) => (VPSHLDVD512 ...)
1150 (ShiftLeftConcatUint64x2 ...) => (VPSHLDVQ128 ...)
1151 (ShiftLeftConcatUint64x4 ...) => (VPSHLDVQ256 ...)
1152 (ShiftLeftConcatUint64x8 ...) => (VPSHLDVQ512 ...)
1153 (ShiftRightInt16x8 ...) => (VPSRAVW128 ...)
1154 (ShiftRightInt16x16 ...) => (VPSRAVW256 ...)
1155 (ShiftRightInt16x32 ...) => (VPSRAVW512 ...)
1156 (ShiftRightInt32x4 ...) => (VPSRAVD128 ...)
1157 (ShiftRightInt32x8 ...) => (VPSRAVD256 ...)
1158 (ShiftRightInt32x16 ...) => (VPSRAVD512 ...)
1159 (ShiftRightInt64x2 ...) => (VPSRAVQ128 ...)
1160 (ShiftRightInt64x4 ...) => (VPSRAVQ256 ...)
1161 (ShiftRightInt64x8 ...) => (VPSRAVQ512 ...)
1162 (ShiftRightUint16x8 ...) => (VPSRLVW128 ...)
1163 (ShiftRightUint16x16 ...) => (VPSRLVW256 ...)
1164 (ShiftRightUint16x32 ...) => (VPSRLVW512 ...)
1165 (ShiftRightUint32x4 ...) => (VPSRLVD128 ...)
1166 (ShiftRightUint32x8 ...) => (VPSRLVD256 ...)
1167 (ShiftRightUint32x16 ...) => (VPSRLVD512 ...)
1168 (ShiftRightUint64x2 ...) => (VPSRLVQ128 ...)
1169 (ShiftRightUint64x4 ...) => (VPSRLVQ256 ...)
1170 (ShiftRightUint64x8 ...) => (VPSRLVQ512 ...)
1171 (ShiftRightConcatInt16x8 ...) => (VPSHRDVW128 ...)
1172 (ShiftRightConcatInt16x16 ...) => (VPSHRDVW256 ...)
1173 (ShiftRightConcatInt16x32 ...) => (VPSHRDVW512 ...)
1174 (ShiftRightConcatInt32x4 ...) => (VPSHRDVD128 ...)
1175 (ShiftRightConcatInt32x8 ...) => (VPSHRDVD256 ...)
1176 (ShiftRightConcatInt32x16 ...) => (VPSHRDVD512 ...)
1177 (ShiftRightConcatInt64x2 ...) => (VPSHRDVQ128 ...)
1178 (ShiftRightConcatInt64x4 ...) => (VPSHRDVQ256 ...)
1179 (ShiftRightConcatInt64x8 ...) => (VPSHRDVQ512 ...)
1180 (ShiftRightConcatUint16x8 ...) => (VPSHRDVW128 ...)
1181 (ShiftRightConcatUint16x16 ...) => (VPSHRDVW256 ...)
1182 (ShiftRightConcatUint16x32 ...) => (VPSHRDVW512 ...)
1183 (ShiftRightConcatUint32x4 ...) => (VPSHRDVD128 ...)
1184 (ShiftRightConcatUint32x8 ...) => (VPSHRDVD256 ...)
1185 (ShiftRightConcatUint32x16 ...) => (VPSHRDVD512 ...)
1186 (ShiftRightConcatUint64x2 ...) => (VPSHRDVQ128 ...)
1187 (ShiftRightConcatUint64x4 ...) => (VPSHRDVQ256 ...)
1188 (ShiftRightConcatUint64x8 ...) => (VPSHRDVQ512 ...)
1189 (SqrtFloat32x4 ...) => (VSQRTPS128 ...)
1190 (SqrtFloat32x8 ...) => (VSQRTPS256 ...)
1191 (SqrtFloat32x16 ...) => (VSQRTPS512 ...)
1192 (SqrtFloat64x2 ...) => (VSQRTPD128 ...)
1193 (SqrtFloat64x4 ...) => (VSQRTPD256 ...)
1194 (SqrtFloat64x8 ...) => (VSQRTPD512 ...)
1195 (SubFloat32x4 ...) => (VSUBPS128 ...)
1196 (SubFloat32x8 ...) => (VSUBPS256 ...)
1197 (SubFloat32x16 ...) => (VSUBPS512 ...)
1198 (SubFloat64x2 ...) => (VSUBPD128 ...)
1199 (SubFloat64x4 ...) => (VSUBPD256 ...)
1200 (SubFloat64x8 ...) => (VSUBPD512 ...)
1201 (SubInt8x16 ...) => (VPSUBB128 ...)
1202 (SubInt8x32 ...) => (VPSUBB256 ...)
1203 (SubInt8x64 ...) => (VPSUBB512 ...)
1204 (SubInt16x8 ...) => (VPSUBW128 ...)
1205 (SubInt16x16 ...) => (VPSUBW256 ...)
1206 (SubInt16x32 ...) => (VPSUBW512 ...)
1207 (SubInt32x4 ...) => (VPSUBD128 ...)
1208 (SubInt32x8 ...) => (VPSUBD256 ...)
1209 (SubInt32x16 ...) => (VPSUBD512 ...)
1210 (SubInt64x2 ...) => (VPSUBQ128 ...)
1211 (SubInt64x4 ...) => (VPSUBQ256 ...)
1212 (SubInt64x8 ...) => (VPSUBQ512 ...)
1213 (SubUint8x16 ...) => (VPSUBB128 ...)
1214 (SubUint8x32 ...) => (VPSUBB256 ...)
1215 (SubUint8x64 ...) => (VPSUBB512 ...)
1216 (SubUint16x8 ...) => (VPSUBW128 ...)
1217 (SubUint16x16 ...) => (VPSUBW256 ...)
1218 (SubUint16x32 ...) => (VPSUBW512 ...)
1219 (SubUint32x4 ...) => (VPSUBD128 ...)
1220 (SubUint32x8 ...) => (VPSUBD256 ...)
1221 (SubUint32x16 ...) => (VPSUBD512 ...)
1222 (SubUint64x2 ...) => (VPSUBQ128 ...)
1223 (SubUint64x4 ...) => (VPSUBQ256 ...)
1224 (SubUint64x8 ...) => (VPSUBQ512 ...)
1225 (SubPairsFloat32x4 ...) => (VHSUBPS128 ...)
1226 (SubPairsFloat32x8 ...) => (VHSUBPS256 ...)
1227 (SubPairsFloat64x2 ...) => (VHSUBPD128 ...)
1228 (SubPairsFloat64x4 ...) => (VHSUBPD256 ...)
1229 (SubPairsInt16x8 ...) => (VPHSUBW128 ...)
1230 (SubPairsInt16x16 ...) => (VPHSUBW256 ...)
1231 (SubPairsInt32x4 ...) => (VPHSUBD128 ...)
1232 (SubPairsInt32x8 ...) => (VPHSUBD256 ...)
1233 (SubPairsUint16x8 ...) => (VPHSUBW128 ...)
1234 (SubPairsUint16x16 ...) => (VPHSUBW256 ...)
1235 (SubPairsUint32x4 ...) => (VPHSUBD128 ...)
1236 (SubPairsUint32x8 ...) => (VPHSUBD256 ...)
1237 (SubPairsSaturatedInt16x8 ...) => (VPHSUBSW128 ...)
1238 (SubPairsSaturatedInt16x16 ...) => (VPHSUBSW256 ...)
1239 (SubSaturatedInt8x16 ...) => (VPSUBSB128 ...)
1240 (SubSaturatedInt8x32 ...) => (VPSUBSB256 ...)
1241 (SubSaturatedInt8x64 ...) => (VPSUBSB512 ...)
1242 (SubSaturatedInt16x8 ...) => (VPSUBSW128 ...)
1243 (SubSaturatedInt16x16 ...) => (VPSUBSW256 ...)
1244 (SubSaturatedInt16x32 ...) => (VPSUBSW512 ...)
1245 (SubSaturatedUint8x16 ...) => (VPSUBUSB128 ...)
1246 (SubSaturatedUint8x32 ...) => (VPSUBUSB256 ...)
1247 (SubSaturatedUint8x64 ...) => (VPSUBUSB512 ...)
1248 (SubSaturatedUint16x8 ...) => (VPSUBUSW128 ...)
1249 (SubSaturatedUint16x16 ...) => (VPSUBUSW256 ...)
1250 (SubSaturatedUint16x32 ...) => (VPSUBUSW512 ...)
1251 (SumAbsDiffUint8x16 ...) => (VPSADBW128 ...)
1252 (SumAbsDiffUint8x32 ...) => (VPSADBW256 ...)
1253 (SumAbsDiffUint8x64 ...) => (VPSADBW512 ...)
1254 (TruncFloat32x4 x) => (VROUNDPS128 [3] x)
1255 (TruncFloat32x8 x) => (VROUNDPS256 [3] x)
1256 (TruncFloat64x2 x) => (VROUNDPD128 [3] x)
1257 (TruncFloat64x4 x) => (VROUNDPD256 [3] x)
1258 (TruncScaledFloat32x4 [a] x) => (VRNDSCALEPS128 [a+3] x)
1259 (TruncScaledFloat32x8 [a] x) => (VRNDSCALEPS256 [a+3] x)
1260 (TruncScaledFloat32x16 [a] x) => (VRNDSCALEPS512 [a+3] x)
1261 (TruncScaledFloat64x2 [a] x) => (VRNDSCALEPD128 [a+3] x)
1262 (TruncScaledFloat64x4 [a] x) => (VRNDSCALEPD256 [a+3] x)
1263 (TruncScaledFloat64x8 [a] x) => (VRNDSCALEPD512 [a+3] x)
1264 (TruncScaledResidueFloat32x4 [a] x) => (VREDUCEPS128 [a+3] x)
1265 (TruncScaledResidueFloat32x8 [a] x) => (VREDUCEPS256 [a+3] x)
1266 (TruncScaledResidueFloat32x16 [a] x) => (VREDUCEPS512 [a+3] x)
1267 (TruncScaledResidueFloat64x2 [a] x) => (VREDUCEPD128 [a+3] x)
1268 (TruncScaledResidueFloat64x4 [a] x) => (VREDUCEPD256 [a+3] x)
1269 (TruncScaledResidueFloat64x8 [a] x) => (VREDUCEPD512 [a+3] x)
1270 (TruncateToInt8Int16x8 ...) => (VPMOVWB128_128 ...)
1271 (TruncateToInt8Int16x16 ...) => (VPMOVWB128_256 ...)
1272 (TruncateToInt8Int16x32 ...) => (VPMOVWB256 ...)
1273 (TruncateToInt8Int32x4 ...) => (VPMOVDB128_128 ...)
1274 (TruncateToInt8Int32x8 ...) => (VPMOVDB128_256 ...)
1275 (TruncateToInt8Int32x16 ...) => (VPMOVDB128_512 ...)
1276 (TruncateToInt8Int64x2 ...) => (VPMOVQB128_128 ...)
1277 (TruncateToInt8Int64x4 ...) => (VPMOVQB128_256 ...)
1278 (TruncateToInt8Int64x8 ...) => (VPMOVQB128_512 ...)
1279 (TruncateToInt16Int32x4 ...) => (VPMOVDW128_128 ...)
1280 (TruncateToInt16Int32x8 ...) => (VPMOVDW128_256 ...)
1281 (TruncateToInt16Int32x16 ...) => (VPMOVDW256 ...)
1282 (TruncateToInt16Int64x2 ...) => (VPMOVQW128_128 ...)
1283 (TruncateToInt16Int64x4 ...) => (VPMOVQW128_256 ...)
1284 (TruncateToInt16Int64x8 ...) => (VPMOVQW128_512 ...)
1285 (TruncateToInt32Int64x2 ...) => (VPMOVQD128_128 ...)
1286 (TruncateToInt32Int64x4 ...) => (VPMOVQD128_256 ...)
1287 (TruncateToInt32Int64x8 ...) => (VPMOVQD256 ...)
1288 (TruncateToUint8Uint16x8 ...) => (VPMOVWB128_128 ...)
1289 (TruncateToUint8Uint16x16 ...) => (VPMOVWB128_256 ...)
1290 (TruncateToUint8Uint16x32 ...) => (VPMOVWB256 ...)
1291 (TruncateToUint8Uint32x4 ...) => (VPMOVDB128_128 ...)
1292 (TruncateToUint8Uint32x8 ...) => (VPMOVDB128_256 ...)
1293 (TruncateToUint8Uint32x16 ...) => (VPMOVDB128_512 ...)
1294 (TruncateToUint8Uint64x2 ...) => (VPMOVQB128_128 ...)
1295 (TruncateToUint8Uint64x4 ...) => (VPMOVQB128_256 ...)
1296 (TruncateToUint8Uint64x8 ...) => (VPMOVQB128_512 ...)
1297 (TruncateToUint16Uint32x4 ...) => (VPMOVDW128_128 ...)
1298 (TruncateToUint16Uint32x8 ...) => (VPMOVDW128_256 ...)
1299 (TruncateToUint16Uint32x16 ...) => (VPMOVDW256 ...)
1300 (TruncateToUint16Uint64x2 ...) => (VPMOVQW128_128 ...)
1301 (TruncateToUint16Uint64x4 ...) => (VPMOVQW128_256 ...)
1302 (TruncateToUint16Uint64x8 ...) => (VPMOVQW128_512 ...)
1303 (TruncateToUint32Uint64x2 ...) => (VPMOVQD128_128 ...)
1304 (TruncateToUint32Uint64x4 ...) => (VPMOVQD128_256 ...)
1305 (TruncateToUint32Uint64x8 ...) => (VPMOVQD256 ...)
1306 (XorInt8x16 ...) => (VPXOR128 ...)
1307 (XorInt8x32 ...) => (VPXOR256 ...)
1308 (XorInt8x64 ...) => (VPXORD512 ...)
1309 (XorInt16x8 ...) => (VPXOR128 ...)
1310 (XorInt16x16 ...) => (VPXOR256 ...)
1311 (XorInt16x32 ...) => (VPXORD512 ...)
1312 (XorInt32x4 ...) => (VPXOR128 ...)
1313 (XorInt32x8 ...) => (VPXOR256 ...)
1314 (XorInt32x16 ...) => (VPXORD512 ...)
1315 (XorInt64x2 ...) => (VPXOR128 ...)
1316 (XorInt64x4 ...) => (VPXOR256 ...)
1317 (XorInt64x8 ...) => (VPXORQ512 ...)
1318 (XorUint8x16 ...) => (VPXOR128 ...)
1319 (XorUint8x32 ...) => (VPXOR256 ...)
1320 (XorUint8x64 ...) => (VPXORD512 ...)
1321 (XorUint16x8 ...) => (VPXOR128 ...)
1322 (XorUint16x16 ...) => (VPXOR256 ...)
1323 (XorUint16x32 ...) => (VPXORD512 ...)
1324 (XorUint32x4 ...) => (VPXOR128 ...)
1325 (XorUint32x8 ...) => (VPXOR256 ...)
1326 (XorUint32x16 ...) => (VPXORD512 ...)
1327 (XorUint64x2 ...) => (VPXOR128 ...)
1328 (XorUint64x4 ...) => (VPXOR256 ...)
1329 (XorUint64x8 ...) => (VPXORQ512 ...)
1330 (blendInt8x16 ...) => (VPBLENDVB128 ...)
1331 (blendInt8x32 ...) => (VPBLENDVB256 ...)
1332 (blendMaskedInt8x64 x y mask) => (VPBLENDMBMasked512 x y (VPMOVVec8x64ToM <types.TypeMask> mask))
1333 (blendMaskedInt16x32 x y mask) => (VPBLENDMWMasked512 x y (VPMOVVec16x32ToM <types.TypeMask> mask))
1334 (blendMaskedInt32x16 x y mask) => (VPBLENDMDMasked512 x y (VPMOVVec32x16ToM <types.TypeMask> mask))
1335 (blendMaskedInt64x8 x y mask) => (VPBLENDMQMasked512 x y (VPMOVVec64x8ToM <types.TypeMask> mask))
1336 (carrylessMultiplyUint64x2 ...) => (VPCLMULQDQ128 ...)
1337 (carrylessMultiplyUint64x4 ...) => (VPCLMULQDQ256 ...)
1338 (carrylessMultiplyUint64x8 ...) => (VPCLMULQDQ512 ...)
1339 (concatSelectedConstantFloat32x4 ...) => (VSHUFPS128 ...)
1340 (concatSelectedConstantFloat64x2 ...) => (VSHUFPD128 ...)
1341 (concatSelectedConstantInt32x4 ...) => (VSHUFPS128 ...)
1342 (concatSelectedConstantInt64x2 ...) => (VSHUFPD128 ...)
1343 (concatSelectedConstantUint32x4 ...) => (VSHUFPS128 ...)
1344 (concatSelectedConstantUint64x2 ...) => (VSHUFPD128 ...)
1345 (concatSelectedConstantGroupedFloat32x8 ...) => (VSHUFPS256 ...)
1346 (concatSelectedConstantGroupedFloat32x16 ...) => (VSHUFPS512 ...)
1347 (concatSelectedConstantGroupedFloat64x4 ...) => (VSHUFPD256 ...)
1348 (concatSelectedConstantGroupedFloat64x8 ...) => (VSHUFPD512 ...)
1349 (concatSelectedConstantGroupedInt32x8 ...) => (VSHUFPS256 ...)
1350 (concatSelectedConstantGroupedInt32x16 ...) => (VSHUFPS512 ...)
1351 (concatSelectedConstantGroupedInt64x4 ...) => (VSHUFPD256 ...)
1352 (concatSelectedConstantGroupedInt64x8 ...) => (VSHUFPD512 ...)
1353 (concatSelectedConstantGroupedUint32x8 ...) => (VSHUFPS256 ...)
1354 (concatSelectedConstantGroupedUint32x16 ...) => (VSHUFPS512 ...)
1355 (concatSelectedConstantGroupedUint64x4 ...) => (VSHUFPD256 ...)
1356 (concatSelectedConstantGroupedUint64x8 ...) => (VSHUFPD512 ...)
1357 (permuteScalarsInt32x4 ...) => (VPSHUFD128 ...)
1358 (permuteScalarsUint32x4 ...) => (VPSHUFD128 ...)
1359 (permuteScalarsGroupedInt32x8 ...) => (VPSHUFD256 ...)
1360 (permuteScalarsGroupedInt32x16 ...) => (VPSHUFD512 ...)
1361 (permuteScalarsGroupedUint32x8 ...) => (VPSHUFD256 ...)
1362 (permuteScalarsGroupedUint32x16 ...) => (VPSHUFD512 ...)
1363 (permuteScalarsHiInt16x8 ...) => (VPSHUFHW128 ...)
1364 (permuteScalarsHiUint16x8 ...) => (VPSHUFHW128 ...)
1365 (permuteScalarsHiGroupedInt16x16 ...) => (VPSHUFHW256 ...)
1366 (permuteScalarsHiGroupedInt16x32 ...) => (VPSHUFHW512 ...)
1367 (permuteScalarsHiGroupedUint16x16 ...) => (VPSHUFHW256 ...)
1368 (permuteScalarsHiGroupedUint16x32 ...) => (VPSHUFHW512 ...)
1369 (permuteScalarsLoInt16x8 ...) => (VPSHUFLW128 ...)
1370 (permuteScalarsLoUint16x8 ...) => (VPSHUFLW128 ...)
1371 (permuteScalarsLoGroupedInt16x16 ...) => (VPSHUFLW256 ...)
1372 (permuteScalarsLoGroupedInt16x32 ...) => (VPSHUFLW512 ...)
1373 (permuteScalarsLoGroupedUint16x16 ...) => (VPSHUFLW256 ...)
1374 (permuteScalarsLoGroupedUint16x32 ...) => (VPSHUFLW512 ...)
1375 (ternInt32x4 ...) => (VPTERNLOGD128 ...)
1376 (ternInt32x8 ...) => (VPTERNLOGD256 ...)
1377 (ternInt32x16 ...) => (VPTERNLOGD512 ...)
1378 (ternInt64x2 ...) => (VPTERNLOGQ128 ...)
1379 (ternInt64x4 ...) => (VPTERNLOGQ256 ...)
1380 (ternInt64x8 ...) => (VPTERNLOGQ512 ...)
1381 (ternUint32x4 ...) => (VPTERNLOGD128 ...)
1382 (ternUint32x8 ...) => (VPTERNLOGD256 ...)
1383 (ternUint32x16 ...) => (VPTERNLOGD512 ...)
1384 (ternUint64x2 ...) => (VPTERNLOGQ128 ...)
1385 (ternUint64x4 ...) => (VPTERNLOGQ256 ...)
1386 (ternUint64x8 ...) => (VPTERNLOGQ512 ...)
1387 (VMOVDQU8Masked128 (VPABSB128 x) mask) => (VPABSBMasked128 x mask)
1388 (VMOVDQU8Masked256 (VPABSB256 x) mask) => (VPABSBMasked256 x mask)
1389 (VMOVDQU8Masked512 (VPABSB512 x) mask) => (VPABSBMasked512 x mask)
1390 (VMOVDQU16Masked128 (VPABSW128 x) mask) => (VPABSWMasked128 x mask)
1391 (VMOVDQU16Masked256 (VPABSW256 x) mask) => (VPABSWMasked256 x mask)
1392 (VMOVDQU16Masked512 (VPABSW512 x) mask) => (VPABSWMasked512 x mask)
1393 (VMOVDQU32Masked128 (VPABSD128 x) mask) => (VPABSDMasked128 x mask)
1394 (VMOVDQU32Masked256 (VPABSD256 x) mask) => (VPABSDMasked256 x mask)
1395 (VMOVDQU32Masked512 (VPABSD512 x) mask) => (VPABSDMasked512 x mask)
1396 (VMOVDQU64Masked128 (VPABSQ128 x) mask) => (VPABSQMasked128 x mask)
1397 (VMOVDQU64Masked256 (VPABSQ256 x) mask) => (VPABSQMasked256 x mask)
1398 (VMOVDQU64Masked512 (VPABSQ512 x) mask) => (VPABSQMasked512 x mask)
1399 (VMOVDQU32Masked128 (VADDPS128 x y) mask) => (VADDPSMasked128 x y mask)
1400 (VMOVDQU32Masked256 (VADDPS256 x y) mask) => (VADDPSMasked256 x y mask)
1401 (VMOVDQU32Masked512 (VADDPS512 x y) mask) => (VADDPSMasked512 x y mask)
1402 (VMOVDQU64Masked128 (VADDPD128 x y) mask) => (VADDPDMasked128 x y mask)
1403 (VMOVDQU64Masked256 (VADDPD256 x y) mask) => (VADDPDMasked256 x y mask)
1404 (VMOVDQU64Masked512 (VADDPD512 x y) mask) => (VADDPDMasked512 x y mask)
1405 (VMOVDQU8Masked128 (VPADDB128 x y) mask) => (VPADDBMasked128 x y mask)
1406 (VMOVDQU8Masked256 (VPADDB256 x y) mask) => (VPADDBMasked256 x y mask)
1407 (VMOVDQU8Masked512 (VPADDB512 x y) mask) => (VPADDBMasked512 x y mask)
1408 (VMOVDQU16Masked128 (VPADDW128 x y) mask) => (VPADDWMasked128 x y mask)
1409 (VMOVDQU16Masked256 (VPADDW256 x y) mask) => (VPADDWMasked256 x y mask)
1410 (VMOVDQU16Masked512 (VPADDW512 x y) mask) => (VPADDWMasked512 x y mask)
1411 (VMOVDQU32Masked128 (VPADDD128 x y) mask) => (VPADDDMasked128 x y mask)
1412 (VMOVDQU32Masked256 (VPADDD256 x y) mask) => (VPADDDMasked256 x y mask)
1413 (VMOVDQU32Masked512 (VPADDD512 x y) mask) => (VPADDDMasked512 x y mask)
1414 (VMOVDQU64Masked128 (VPADDQ128 x y) mask) => (VPADDQMasked128 x y mask)
1415 (VMOVDQU64Masked256 (VPADDQ256 x y) mask) => (VPADDQMasked256 x y mask)
1416 (VMOVDQU64Masked512 (VPADDQ512 x y) mask) => (VPADDQMasked512 x y mask)
1417 (VMOVDQU8Masked128 (VPADDSB128 x y) mask) => (VPADDSBMasked128 x y mask)
1418 (VMOVDQU8Masked256 (VPADDSB256 x y) mask) => (VPADDSBMasked256 x y mask)
1419 (VMOVDQU8Masked512 (VPADDSB512 x y) mask) => (VPADDSBMasked512 x y mask)
1420 (VMOVDQU16Masked128 (VPADDSW128 x y) mask) => (VPADDSWMasked128 x y mask)
1421 (VMOVDQU16Masked256 (VPADDSW256 x y) mask) => (VPADDSWMasked256 x y mask)
1422 (VMOVDQU16Masked512 (VPADDSW512 x y) mask) => (VPADDSWMasked512 x y mask)
1423 (VMOVDQU8Masked128 (VPADDUSB128 x y) mask) => (VPADDUSBMasked128 x y mask)
1424 (VMOVDQU8Masked256 (VPADDUSB256 x y) mask) => (VPADDUSBMasked256 x y mask)
1425 (VMOVDQU8Masked512 (VPADDUSB512 x y) mask) => (VPADDUSBMasked512 x y mask)
1426 (VMOVDQU16Masked128 (VPADDUSW128 x y) mask) => (VPADDUSWMasked128 x y mask)
1427 (VMOVDQU16Masked256 (VPADDUSW256 x y) mask) => (VPADDUSWMasked256 x y mask)
1428 (VMOVDQU16Masked512 (VPADDUSW512 x y) mask) => (VPADDUSWMasked512 x y mask)
1429 (VMOVDQU32Masked512 (VPANDD512 x y) mask) => (VPANDDMasked512 x y mask)
1430 (VMOVDQU64Masked512 (VPANDQ512 x y) mask) => (VPANDQMasked512 x y mask)
1431 (VMOVDQU32Masked512 (VPANDND512 x y) mask) => (VPANDNDMasked512 x y mask)
1432 (VMOVDQU64Masked512 (VPANDNQ512 x y) mask) => (VPANDNQMasked512 x y mask)
1433 (VMOVDQU8Masked128 (VPAVGB128 x y) mask) => (VPAVGBMasked128 x y mask)
1434 (VMOVDQU8Masked256 (VPAVGB256 x y) mask) => (VPAVGBMasked256 x y mask)
1435 (VMOVDQU8Masked512 (VPAVGB512 x y) mask) => (VPAVGBMasked512 x y mask)
1436 (VMOVDQU16Masked128 (VPAVGW128 x y) mask) => (VPAVGWMasked128 x y mask)
1437 (VMOVDQU16Masked256 (VPAVGW256 x y) mask) => (VPAVGWMasked256 x y mask)
1438 (VMOVDQU16Masked512 (VPAVGW512 x y) mask) => (VPAVGWMasked512 x y mask)
1439 (VMOVDQU32Masked128 (VBROADCASTSS128 x) mask) => (VBROADCASTSSMasked128 x mask)
1440 (VMOVDQU64Masked128 (VPBROADCASTQ128 x) mask) => (VPBROADCASTQMasked128 x mask)
1441 (VMOVDQU8Masked128 (VPBROADCASTB128 x) mask) => (VPBROADCASTBMasked128 x mask)
1442 (VMOVDQU16Masked128 (VPBROADCASTW128 x) mask) => (VPBROADCASTWMasked128 x mask)
1443 (VMOVDQU32Masked128 (VPBROADCASTD128 x) mask) => (VPBROADCASTDMasked128 x mask)
1444 (VMOVDQU32Masked256 (VBROADCASTSS256 x) mask) => (VBROADCASTSSMasked256 x mask)
1445 (VMOVDQU64Masked256 (VBROADCASTSD256 x) mask) => (VBROADCASTSDMasked256 x mask)
1446 (VMOVDQU8Masked256 (VPBROADCASTB256 x) mask) => (VPBROADCASTBMasked256 x mask)
1447 (VMOVDQU16Masked256 (VPBROADCASTW256 x) mask) => (VPBROADCASTWMasked256 x mask)
1448 (VMOVDQU32Masked256 (VPBROADCASTD256 x) mask) => (VPBROADCASTDMasked256 x mask)
1449 (VMOVDQU64Masked256 (VPBROADCASTQ256 x) mask) => (VPBROADCASTQMasked256 x mask)
1450 (VMOVDQU32Masked512 (VBROADCASTSS512 x) mask) => (VBROADCASTSSMasked512 x mask)
1451 (VMOVDQU64Masked512 (VBROADCASTSD512 x) mask) => (VBROADCASTSDMasked512 x mask)
1452 (VMOVDQU8Masked512 (VPBROADCASTB512 x) mask) => (VPBROADCASTBMasked512 x mask)
1453 (VMOVDQU16Masked512 (VPBROADCASTW512 x) mask) => (VPBROADCASTWMasked512 x mask)
1454 (VMOVDQU32Masked512 (VPBROADCASTD512 x) mask) => (VPBROADCASTDMasked512 x mask)
1455 (VMOVDQU64Masked512 (VPBROADCASTQ512 x) mask) => (VPBROADCASTQMasked512 x mask)
1456 (VMOVDQU32Masked128 (VRNDSCALEPS128 [a] x) mask) => (VRNDSCALEPSMasked128 [a] x mask)
1457 (VMOVDQU32Masked256 (VRNDSCALEPS256 [a] x) mask) => (VRNDSCALEPSMasked256 [a] x mask)
1458 (VMOVDQU32Masked512 (VRNDSCALEPS512 [a] x) mask) => (VRNDSCALEPSMasked512 [a] x mask)
1459 (VMOVDQU64Masked128 (VRNDSCALEPD128 [a] x) mask) => (VRNDSCALEPDMasked128 [a] x mask)
1460 (VMOVDQU64Masked256 (VRNDSCALEPD256 [a] x) mask) => (VRNDSCALEPDMasked256 [a] x mask)
1461 (VMOVDQU64Masked512 (VRNDSCALEPD512 [a] x) mask) => (VRNDSCALEPDMasked512 [a] x mask)
1462 (VMOVDQU32Masked128 (VREDUCEPS128 [a] x) mask) => (VREDUCEPSMasked128 [a] x mask)
1463 (VMOVDQU32Masked256 (VREDUCEPS256 [a] x) mask) => (VREDUCEPSMasked256 [a] x mask)
1464 (VMOVDQU32Masked512 (VREDUCEPS512 [a] x) mask) => (VREDUCEPSMasked512 [a] x mask)
1465 (VMOVDQU64Masked128 (VREDUCEPD128 [a] x) mask) => (VREDUCEPDMasked128 [a] x mask)
1466 (VMOVDQU64Masked256 (VREDUCEPD256 [a] x) mask) => (VREDUCEPDMasked256 [a] x mask)
1467 (VMOVDQU64Masked512 (VREDUCEPD512 [a] x) mask) => (VREDUCEPDMasked512 [a] x mask)
1468 (VMOVDQU8Masked128 (VPERMI2B128 x y z) mask) => (VPERMI2BMasked128 x y z mask)
1469 (VMOVDQU8Masked256 (VPERMI2B256 x y z) mask) => (VPERMI2BMasked256 x y z mask)
1470 (VMOVDQU8Masked512 (VPERMI2B512 x y z) mask) => (VPERMI2BMasked512 x y z mask)
1471 (VMOVDQU16Masked128 (VPERMI2W128 x y z) mask) => (VPERMI2WMasked128 x y z mask)
1472 (VMOVDQU16Masked256 (VPERMI2W256 x y z) mask) => (VPERMI2WMasked256 x y z mask)
1473 (VMOVDQU16Masked512 (VPERMI2W512 x y z) mask) => (VPERMI2WMasked512 x y z mask)
1474 (VMOVDQU32Masked128 (VPERMI2PS128 x y z) mask) => (VPERMI2PSMasked128 x y z mask)
1475 (VMOVDQU32Masked128 (VPERMI2D128 x y z) mask) => (VPERMI2DMasked128 x y z mask)
1476 (VMOVDQU32Masked256 (VPERMI2PS256 x y z) mask) => (VPERMI2PSMasked256 x y z mask)
1477 (VMOVDQU32Masked256 (VPERMI2D256 x y z) mask) => (VPERMI2DMasked256 x y z mask)
1478 (VMOVDQU32Masked512 (VPERMI2PS512 x y z) mask) => (VPERMI2PSMasked512 x y z mask)
1479 (VMOVDQU32Masked512 (VPERMI2D512 x y z) mask) => (VPERMI2DMasked512 x y z mask)
1480 (VMOVDQU64Masked128 (VPERMI2PD128 x y z) mask) => (VPERMI2PDMasked128 x y z mask)
1481 (VMOVDQU64Masked128 (VPERMI2Q128 x y z) mask) => (VPERMI2QMasked128 x y z mask)
1482 (VMOVDQU64Masked256 (VPERMI2PD256 x y z) mask) => (VPERMI2PDMasked256 x y z mask)
1483 (VMOVDQU64Masked256 (VPERMI2Q256 x y z) mask) => (VPERMI2QMasked256 x y z mask)
1484 (VMOVDQU64Masked512 (VPERMI2PD512 x y z) mask) => (VPERMI2PDMasked512 x y z mask)
1485 (VMOVDQU64Masked512 (VPERMI2Q512 x y z) mask) => (VPERMI2QMasked512 x y z mask)
1486 (VMOVDQU8Masked256 (VPALIGNR256 [a] x y) mask) => (VPALIGNRMasked256 [a] x y mask)
1487 (VMOVDQU8Masked512 (VPALIGNR512 [a] x y) mask) => (VPALIGNRMasked512 [a] x y mask)
1488 (VMOVDQU8Masked128 (VPALIGNR128 [a] x y) mask) => (VPALIGNRMasked128 [a] x y mask)
1489 (VMOVDQU64Masked128 (VCVTPD2PSX128 x) mask) => (VCVTPD2PSXMasked128 x mask)
1490 (VMOVDQU64Masked128 (VCVTPD2PSY128 x) mask) => (VCVTPD2PSYMasked128 x mask)
1491 (VMOVDQU64Masked256 (VCVTPD2PS256 x) mask) => (VCVTPD2PSMasked256 x mask)
1492 (VMOVDQU32Masked128 (VCVTDQ2PS128 x) mask) => (VCVTDQ2PSMasked128 x mask)
1493 (VMOVDQU32Masked256 (VCVTDQ2PS256 x) mask) => (VCVTDQ2PSMasked256 x mask)
1494 (VMOVDQU32Masked512 (VCVTDQ2PS512 x) mask) => (VCVTDQ2PSMasked512 x mask)
1495 (VMOVDQU64Masked128 (VCVTQQ2PSX128 x) mask) => (VCVTQQ2PSXMasked128 x mask)
1496 (VMOVDQU64Masked128 (VCVTQQ2PSY128 x) mask) => (VCVTQQ2PSYMasked128 x mask)
1497 (VMOVDQU64Masked256 (VCVTQQ2PS256 x) mask) => (VCVTQQ2PSMasked256 x mask)
1498 (VMOVDQU32Masked128 (VCVTUDQ2PS128 x) mask) => (VCVTUDQ2PSMasked128 x mask)
1499 (VMOVDQU32Masked256 (VCVTUDQ2PS256 x) mask) => (VCVTUDQ2PSMasked256 x mask)
1500 (VMOVDQU32Masked512 (VCVTUDQ2PS512 x) mask) => (VCVTUDQ2PSMasked512 x mask)
1501 (VMOVDQU64Masked128 (VCVTUQQ2PSX128 x) mask) => (VCVTUQQ2PSXMasked128 x mask)
1502 (VMOVDQU64Masked128 (VCVTUQQ2PSY128 x) mask) => (VCVTUQQ2PSYMasked128 x mask)
1503 (VMOVDQU64Masked256 (VCVTUQQ2PS256 x) mask) => (VCVTUQQ2PSMasked256 x mask)
1504 (VMOVDQU32Masked256 (VCVTPS2PD256 x) mask) => (VCVTPS2PDMasked256 x mask)
1505 (VMOVDQU32Masked512 (VCVTPS2PD512 x) mask) => (VCVTPS2PDMasked512 x mask)
1506 (VMOVDQU32Masked256 (VCVTDQ2PD256 x) mask) => (VCVTDQ2PDMasked256 x mask)
1507 (VMOVDQU32Masked512 (VCVTDQ2PD512 x) mask) => (VCVTDQ2PDMasked512 x mask)
1508 (VMOVDQU64Masked128 (VCVTQQ2PD128 x) mask) => (VCVTQQ2PDMasked128 x mask)
1509 (VMOVDQU64Masked256 (VCVTQQ2PD256 x) mask) => (VCVTQQ2PDMasked256 x mask)
1510 (VMOVDQU64Masked512 (VCVTQQ2PD512 x) mask) => (VCVTQQ2PDMasked512 x mask)
1511 (VMOVDQU32Masked256 (VCVTUDQ2PD256 x) mask) => (VCVTUDQ2PDMasked256 x mask)
1512 (VMOVDQU32Masked512 (VCVTUDQ2PD512 x) mask) => (VCVTUDQ2PDMasked512 x mask)
1513 (VMOVDQU64Masked128 (VCVTUQQ2PD128 x) mask) => (VCVTUQQ2PDMasked128 x mask)
1514 (VMOVDQU64Masked256 (VCVTUQQ2PD256 x) mask) => (VCVTUQQ2PDMasked256 x mask)
1515 (VMOVDQU64Masked512 (VCVTUQQ2PD512 x) mask) => (VCVTUQQ2PDMasked512 x mask)
1516 (VMOVDQU32Masked128 (VCVTTPS2DQ128 x) mask) => (VCVTTPS2DQMasked128 x mask)
1517 (VMOVDQU32Masked256 (VCVTTPS2DQ256 x) mask) => (VCVTTPS2DQMasked256 x mask)
1518 (VMOVDQU32Masked512 (VCVTTPS2DQ512 x) mask) => (VCVTTPS2DQMasked512 x mask)
1519 (VMOVDQU64Masked128 (VCVTTPD2DQX128 x) mask) => (VCVTTPD2DQXMasked128 x mask)
1520 (VMOVDQU64Masked128 (VCVTTPD2DQY128 x) mask) => (VCVTTPD2DQYMasked128 x mask)
1521 (VMOVDQU64Masked256 (VCVTTPD2DQ256 x) mask) => (VCVTTPD2DQMasked256 x mask)
1522 (VMOVDQU32Masked256 (VCVTTPS2QQ256 x) mask) => (VCVTTPS2QQMasked256 x mask)
1523 (VMOVDQU32Masked512 (VCVTTPS2QQ512 x) mask) => (VCVTTPS2QQMasked512 x mask)
1524 (VMOVDQU64Masked128 (VCVTTPD2QQ128 x) mask) => (VCVTTPD2QQMasked128 x mask)
1525 (VMOVDQU64Masked256 (VCVTTPD2QQ256 x) mask) => (VCVTTPD2QQMasked256 x mask)
1526 (VMOVDQU64Masked512 (VCVTTPD2QQ512 x) mask) => (VCVTTPD2QQMasked512 x mask)
1527 (VMOVDQU32Masked128 (VCVTTPS2UDQ128 x) mask) => (VCVTTPS2UDQMasked128 x mask)
1528 (VMOVDQU32Masked256 (VCVTTPS2UDQ256 x) mask) => (VCVTTPS2UDQMasked256 x mask)
1529 (VMOVDQU32Masked512 (VCVTTPS2UDQ512 x) mask) => (VCVTTPS2UDQMasked512 x mask)
1530 (VMOVDQU64Masked128 (VCVTTPD2UDQX128 x) mask) => (VCVTTPD2UDQXMasked128 x mask)
1531 (VMOVDQU64Masked128 (VCVTTPD2UDQY128 x) mask) => (VCVTTPD2UDQYMasked128 x mask)
1532 (VMOVDQU64Masked256 (VCVTTPD2UDQ256 x) mask) => (VCVTTPD2UDQMasked256 x mask)
1533 (VMOVDQU32Masked256 (VCVTTPS2UQQ256 x) mask) => (VCVTTPS2UQQMasked256 x mask)
1534 (VMOVDQU32Masked512 (VCVTTPS2UQQ512 x) mask) => (VCVTTPS2UQQMasked512 x mask)
1535 (VMOVDQU64Masked128 (VCVTTPD2UQQ128 x) mask) => (VCVTTPD2UQQMasked128 x mask)
1536 (VMOVDQU64Masked256 (VCVTTPD2UQQ256 x) mask) => (VCVTTPD2UQQMasked256 x mask)
1537 (VMOVDQU64Masked512 (VCVTTPD2UQQ512 x) mask) => (VCVTTPD2UQQMasked512 x mask)
1538 (VMOVDQU32Masked128 (VDIVPS128 x y) mask) => (VDIVPSMasked128 x y mask)
1539 (VMOVDQU32Masked256 (VDIVPS256 x y) mask) => (VDIVPSMasked256 x y mask)
1540 (VMOVDQU32Masked512 (VDIVPS512 x y) mask) => (VDIVPSMasked512 x y mask)
1541 (VMOVDQU64Masked128 (VDIVPD128 x y) mask) => (VDIVPDMasked128 x y mask)
1542 (VMOVDQU64Masked256 (VDIVPD256 x y) mask) => (VDIVPDMasked256 x y mask)
1543 (VMOVDQU64Masked512 (VDIVPD512 x y) mask) => (VDIVPDMasked512 x y mask)
1544 (VMOVDQU16Masked128 (VPMADDWD128 x y) mask) => (VPMADDWDMasked128 x y mask)
1545 (VMOVDQU16Masked256 (VPMADDWD256 x y) mask) => (VPMADDWDMasked256 x y mask)
1546 (VMOVDQU16Masked512 (VPMADDWD512 x y) mask) => (VPMADDWDMasked512 x y mask)
1547 (VMOVDQU16Masked128 (VPMADDUBSW128 x y) mask) => (VPMADDUBSWMasked128 x y mask)
1548 (VMOVDQU16Masked256 (VPMADDUBSW256 x y) mask) => (VPMADDUBSWMasked256 x y mask)
1549 (VMOVDQU16Masked512 (VPMADDUBSW512 x y) mask) => (VPMADDUBSWMasked512 x y mask)
1550 (VMOVDQU32Masked128 (VPDPBUSD128 x y z) mask) => (VPDPBUSDMasked128 x y z mask)
1551 (VMOVDQU32Masked256 (VPDPBUSD256 x y z) mask) => (VPDPBUSDMasked256 x y z mask)
1552 (VMOVDQU32Masked512 (VPDPBUSD512 x y z) mask) => (VPDPBUSDMasked512 x y z mask)
1553 (VMOVDQU32Masked128 (VPDPBUSDS128 x y z) mask) => (VPDPBUSDSMasked128 x y z mask)
1554 (VMOVDQU32Masked256 (VPDPBUSDS256 x y z) mask) => (VPDPBUSDSMasked256 x y z mask)
1555 (VMOVDQU32Masked512 (VPDPBUSDS512 x y z) mask) => (VPDPBUSDSMasked512 x y z mask)
1556 (VMOVDQU8Masked128 (VPMOVSXBQ128 x) mask) => (VPMOVSXBQMasked128 x mask)
1557 (VMOVDQU16Masked128 (VPMOVSXWQ128 x) mask) => (VPMOVSXWQMasked128 x mask)
1558 (VMOVDQU32Masked128 (VPMOVSXDQ128 x) mask) => (VPMOVSXDQMasked128 x mask)
1559 (VMOVDQU8Masked128 (VPMOVZXBQ128 x) mask) => (VPMOVZXBQMasked128 x mask)
1560 (VMOVDQU16Masked128 (VPMOVZXWQ128 x) mask) => (VPMOVZXWQMasked128 x mask)
1561 (VMOVDQU32Masked128 (VPMOVZXDQ128 x) mask) => (VPMOVZXDQMasked128 x mask)
1562 (VMOVDQU8Masked128 (VPMOVSXBD128 x) mask) => (VPMOVSXBDMasked128 x mask)
1563 (VMOVDQU16Masked128 (VPMOVSXWD128 x) mask) => (VPMOVSXWDMasked128 x mask)
1564 (VMOVDQU8Masked256 (VPMOVSXBQ256 x) mask) => (VPMOVSXBQMasked256 x mask)
1565 (VMOVDQU16Masked256 (VPMOVSXWQ256 x) mask) => (VPMOVSXWQMasked256 x mask)
1566 (VMOVDQU8Masked128 (VPMOVZXBD128 x) mask) => (VPMOVZXBDMasked128 x mask)
1567 (VMOVDQU16Masked128 (VPMOVZXWD128 x) mask) => (VPMOVZXWDMasked128 x mask)
1568 (VMOVDQU8Masked256 (VPMOVZXBQ256 x) mask) => (VPMOVZXBQMasked256 x mask)
1569 (VMOVDQU16Masked256 (VPMOVZXWQ256 x) mask) => (VPMOVZXWQMasked256 x mask)
1570 (VMOVDQU8Masked128 (VPMOVSXBW128 x) mask) => (VPMOVSXBWMasked128 x mask)
1571 (VMOVDQU8Masked256 (VPMOVSXBD256 x) mask) => (VPMOVSXBDMasked256 x mask)
1572 (VMOVDQU8Masked512 (VPMOVSXBQ512 x) mask) => (VPMOVSXBQMasked512 x mask)
1573 (VMOVDQU8Masked128 (VPMOVZXBW128 x) mask) => (VPMOVZXBWMasked128 x mask)
1574 (VMOVDQU8Masked256 (VPMOVZXBD256 x) mask) => (VPMOVZXBDMasked256 x mask)
1575 (VMOVDQU8Masked512 (VPMOVZXBQ512 x) mask) => (VPMOVZXBQMasked512 x mask)
1576 (VMOVDQU8Masked256 (VPMOVSXBW256 x) mask) => (VPMOVSXBWMasked256 x mask)
1577 (VMOVDQU8Masked512 (VPMOVSXBW512 x) mask) => (VPMOVSXBWMasked512 x mask)
1578 (VMOVDQU8Masked512 (VPMOVSXBD512 x) mask) => (VPMOVSXBDMasked512 x mask)
1579 (VMOVDQU16Masked256 (VPMOVSXWD256 x) mask) => (VPMOVSXWDMasked256 x mask)
1580 (VMOVDQU16Masked512 (VPMOVSXWD512 x) mask) => (VPMOVSXWDMasked512 x mask)
1581 (VMOVDQU16Masked512 (VPMOVSXWQ512 x) mask) => (VPMOVSXWQMasked512 x mask)
1582 (VMOVDQU32Masked256 (VPMOVSXDQ256 x) mask) => (VPMOVSXDQMasked256 x mask)
1583 (VMOVDQU32Masked512 (VPMOVSXDQ512 x) mask) => (VPMOVSXDQMasked512 x mask)
1584 (VMOVDQU8Masked256 (VPMOVZXBW256 x) mask) => (VPMOVZXBWMasked256 x mask)
1585 (VMOVDQU8Masked512 (VPMOVZXBW512 x) mask) => (VPMOVZXBWMasked512 x mask)
1586 (VMOVDQU8Masked512 (VPMOVZXBD512 x) mask) => (VPMOVZXBDMasked512 x mask)
1587 (VMOVDQU16Masked256 (VPMOVZXWD256 x) mask) => (VPMOVZXWDMasked256 x mask)
1588 (VMOVDQU16Masked512 (VPMOVZXWD512 x) mask) => (VPMOVZXWDMasked512 x mask)
1589 (VMOVDQU16Masked512 (VPMOVZXWQ512 x) mask) => (VPMOVZXWQMasked512 x mask)
1590 (VMOVDQU32Masked256 (VPMOVZXDQ256 x) mask) => (VPMOVZXDQMasked256 x mask)
1591 (VMOVDQU32Masked512 (VPMOVZXDQ512 x) mask) => (VPMOVZXDQMasked512 x mask)
1592 (VMOVDQU8Masked128 (VGF2P8AFFINEINVQB128 [a] x y) mask) => (VGF2P8AFFINEINVQBMasked128 [a] x y mask)
1593 (VMOVDQU8Masked256 (VGF2P8AFFINEINVQB256 [a] x y) mask) => (VGF2P8AFFINEINVQBMasked256 [a] x y mask)
1594 (VMOVDQU8Masked512 (VGF2P8AFFINEINVQB512 [a] x y) mask) => (VGF2P8AFFINEINVQBMasked512 [a] x y mask)
1595 (VMOVDQU8Masked128 (VGF2P8AFFINEQB128 [a] x y) mask) => (VGF2P8AFFINEQBMasked128 [a] x y mask)
1596 (VMOVDQU8Masked256 (VGF2P8AFFINEQB256 [a] x y) mask) => (VGF2P8AFFINEQBMasked256 [a] x y mask)
1597 (VMOVDQU8Masked512 (VGF2P8AFFINEQB512 [a] x y) mask) => (VGF2P8AFFINEQBMasked512 [a] x y mask)
1598 (VMOVDQU8Masked128 (VGF2P8MULB128 x y) mask) => (VGF2P8MULBMasked128 x y mask)
1599 (VMOVDQU8Masked256 (VGF2P8MULB256 x y) mask) => (VGF2P8MULBMasked256 x y mask)
1600 (VMOVDQU8Masked512 (VGF2P8MULB512 x y) mask) => (VGF2P8MULBMasked512 x y mask)
1601 (VMOVDQU32Masked128 (VPLZCNTD128 x) mask) => (VPLZCNTDMasked128 x mask)
1602 (VMOVDQU32Masked256 (VPLZCNTD256 x) mask) => (VPLZCNTDMasked256 x mask)
1603 (VMOVDQU32Masked512 (VPLZCNTD512 x) mask) => (VPLZCNTDMasked512 x mask)
1604 (VMOVDQU64Masked128 (VPLZCNTQ128 x) mask) => (VPLZCNTQMasked128 x mask)
1605 (VMOVDQU64Masked256 (VPLZCNTQ256 x) mask) => (VPLZCNTQMasked256 x mask)
1606 (VMOVDQU64Masked512 (VPLZCNTQ512 x) mask) => (VPLZCNTQMasked512 x mask)
1607 (VMOVDQU32Masked128 (VMAXPS128 x y) mask) => (VMAXPSMasked128 x y mask)
1608 (VMOVDQU32Masked256 (VMAXPS256 x y) mask) => (VMAXPSMasked256 x y mask)
1609 (VMOVDQU32Masked512 (VMAXPS512 x y) mask) => (VMAXPSMasked512 x y mask)
1610 (VMOVDQU64Masked128 (VMAXPD128 x y) mask) => (VMAXPDMasked128 x y mask)
1611 (VMOVDQU64Masked256 (VMAXPD256 x y) mask) => (VMAXPDMasked256 x y mask)
1612 (VMOVDQU64Masked512 (VMAXPD512 x y) mask) => (VMAXPDMasked512 x y mask)
1613 (VMOVDQU8Masked128 (VPMAXSB128 x y) mask) => (VPMAXSBMasked128 x y mask)
1614 (VMOVDQU8Masked256 (VPMAXSB256 x y) mask) => (VPMAXSBMasked256 x y mask)
1615 (VMOVDQU8Masked512 (VPMAXSB512 x y) mask) => (VPMAXSBMasked512 x y mask)
1616 (VMOVDQU16Masked128 (VPMAXSW128 x y) mask) => (VPMAXSWMasked128 x y mask)
1617 (VMOVDQU16Masked256 (VPMAXSW256 x y) mask) => (VPMAXSWMasked256 x y mask)
1618 (VMOVDQU16Masked512 (VPMAXSW512 x y) mask) => (VPMAXSWMasked512 x y mask)
1619 (VMOVDQU32Masked128 (VPMAXSD128 x y) mask) => (VPMAXSDMasked128 x y mask)
1620 (VMOVDQU32Masked256 (VPMAXSD256 x y) mask) => (VPMAXSDMasked256 x y mask)
1621 (VMOVDQU32Masked512 (VPMAXSD512 x y) mask) => (VPMAXSDMasked512 x y mask)
1622 (VMOVDQU64Masked128 (VPMAXSQ128 x y) mask) => (VPMAXSQMasked128 x y mask)
1623 (VMOVDQU64Masked256 (VPMAXSQ256 x y) mask) => (VPMAXSQMasked256 x y mask)
1624 (VMOVDQU64Masked512 (VPMAXSQ512 x y) mask) => (VPMAXSQMasked512 x y mask)
1625 (VMOVDQU8Masked128 (VPMAXUB128 x y) mask) => (VPMAXUBMasked128 x y mask)
1626 (VMOVDQU8Masked256 (VPMAXUB256 x y) mask) => (VPMAXUBMasked256 x y mask)
1627 (VMOVDQU8Masked512 (VPMAXUB512 x y) mask) => (VPMAXUBMasked512 x y mask)
1628 (VMOVDQU16Masked128 (VPMAXUW128 x y) mask) => (VPMAXUWMasked128 x y mask)
1629 (VMOVDQU16Masked256 (VPMAXUW256 x y) mask) => (VPMAXUWMasked256 x y mask)
1630 (VMOVDQU16Masked512 (VPMAXUW512 x y) mask) => (VPMAXUWMasked512 x y mask)
1631 (VMOVDQU32Masked128 (VPMAXUD128 x y) mask) => (VPMAXUDMasked128 x y mask)
1632 (VMOVDQU32Masked256 (VPMAXUD256 x y) mask) => (VPMAXUDMasked256 x y mask)
1633 (VMOVDQU32Masked512 (VPMAXUD512 x y) mask) => (VPMAXUDMasked512 x y mask)
1634 (VMOVDQU64Masked128 (VPMAXUQ128 x y) mask) => (VPMAXUQMasked128 x y mask)
1635 (VMOVDQU64Masked256 (VPMAXUQ256 x y) mask) => (VPMAXUQMasked256 x y mask)
1636 (VMOVDQU64Masked512 (VPMAXUQ512 x y) mask) => (VPMAXUQMasked512 x y mask)
1637 (VMOVDQU32Masked128 (VMINPS128 x y) mask) => (VMINPSMasked128 x y mask)
1638 (VMOVDQU32Masked256 (VMINPS256 x y) mask) => (VMINPSMasked256 x y mask)
1639 (VMOVDQU32Masked512 (VMINPS512 x y) mask) => (VMINPSMasked512 x y mask)
1640 (VMOVDQU64Masked128 (VMINPD128 x y) mask) => (VMINPDMasked128 x y mask)
1641 (VMOVDQU64Masked256 (VMINPD256 x y) mask) => (VMINPDMasked256 x y mask)
1642 (VMOVDQU64Masked512 (VMINPD512 x y) mask) => (VMINPDMasked512 x y mask)
1643 (VMOVDQU8Masked128 (VPMINSB128 x y) mask) => (VPMINSBMasked128 x y mask)
1644 (VMOVDQU8Masked256 (VPMINSB256 x y) mask) => (VPMINSBMasked256 x y mask)
1645 (VMOVDQU8Masked512 (VPMINSB512 x y) mask) => (VPMINSBMasked512 x y mask)
1646 (VMOVDQU16Masked128 (VPMINSW128 x y) mask) => (VPMINSWMasked128 x y mask)
1647 (VMOVDQU16Masked256 (VPMINSW256 x y) mask) => (VPMINSWMasked256 x y mask)
1648 (VMOVDQU16Masked512 (VPMINSW512 x y) mask) => (VPMINSWMasked512 x y mask)
1649 (VMOVDQU32Masked128 (VPMINSD128 x y) mask) => (VPMINSDMasked128 x y mask)
1650 (VMOVDQU32Masked256 (VPMINSD256 x y) mask) => (VPMINSDMasked256 x y mask)
1651 (VMOVDQU32Masked512 (VPMINSD512 x y) mask) => (VPMINSDMasked512 x y mask)
1652 (VMOVDQU64Masked128 (VPMINSQ128 x y) mask) => (VPMINSQMasked128 x y mask)
1653 (VMOVDQU64Masked256 (VPMINSQ256 x y) mask) => (VPMINSQMasked256 x y mask)
1654 (VMOVDQU64Masked512 (VPMINSQ512 x y) mask) => (VPMINSQMasked512 x y mask)
1655 (VMOVDQU8Masked128 (VPMINUB128 x y) mask) => (VPMINUBMasked128 x y mask)
1656 (VMOVDQU8Masked256 (VPMINUB256 x y) mask) => (VPMINUBMasked256 x y mask)
1657 (VMOVDQU8Masked512 (VPMINUB512 x y) mask) => (VPMINUBMasked512 x y mask)
1658 (VMOVDQU16Masked128 (VPMINUW128 x y) mask) => (VPMINUWMasked128 x y mask)
1659 (VMOVDQU16Masked256 (VPMINUW256 x y) mask) => (VPMINUWMasked256 x y mask)
1660 (VMOVDQU16Masked512 (VPMINUW512 x y) mask) => (VPMINUWMasked512 x y mask)
1661 (VMOVDQU32Masked128 (VPMINUD128 x y) mask) => (VPMINUDMasked128 x y mask)
1662 (VMOVDQU32Masked256 (VPMINUD256 x y) mask) => (VPMINUDMasked256 x y mask)
1663 (VMOVDQU32Masked512 (VPMINUD512 x y) mask) => (VPMINUDMasked512 x y mask)
1664 (VMOVDQU64Masked128 (VPMINUQ128 x y) mask) => (VPMINUQMasked128 x y mask)
1665 (VMOVDQU64Masked256 (VPMINUQ256 x y) mask) => (VPMINUQMasked256 x y mask)
1666 (VMOVDQU64Masked512 (VPMINUQ512 x y) mask) => (VPMINUQMasked512 x y mask)
1667 (VMOVDQU32Masked128 (VFMADD213PS128 x y z) mask) => (VFMADD213PSMasked128 x y z mask)
1668 (VMOVDQU32Masked256 (VFMADD213PS256 x y z) mask) => (VFMADD213PSMasked256 x y z mask)
1669 (VMOVDQU32Masked512 (VFMADD213PS512 x y z) mask) => (VFMADD213PSMasked512 x y z mask)
1670 (VMOVDQU64Masked128 (VFMADD213PD128 x y z) mask) => (VFMADD213PDMasked128 x y z mask)
1671 (VMOVDQU64Masked256 (VFMADD213PD256 x y z) mask) => (VFMADD213PDMasked256 x y z mask)
1672 (VMOVDQU64Masked512 (VFMADD213PD512 x y z) mask) => (VFMADD213PDMasked512 x y z mask)
1673 (VMOVDQU32Masked128 (VFMADDSUB213PS128 x y z) mask) => (VFMADDSUB213PSMasked128 x y z mask)
1674 (VMOVDQU32Masked256 (VFMADDSUB213PS256 x y z) mask) => (VFMADDSUB213PSMasked256 x y z mask)
1675 (VMOVDQU32Masked512 (VFMADDSUB213PS512 x y z) mask) => (VFMADDSUB213PSMasked512 x y z mask)
1676 (VMOVDQU64Masked128 (VFMADDSUB213PD128 x y z) mask) => (VFMADDSUB213PDMasked128 x y z mask)
1677 (VMOVDQU64Masked256 (VFMADDSUB213PD256 x y z) mask) => (VFMADDSUB213PDMasked256 x y z mask)
1678 (VMOVDQU64Masked512 (VFMADDSUB213PD512 x y z) mask) => (VFMADDSUB213PDMasked512 x y z mask)
1679 (VMOVDQU16Masked128 (VPMULHW128 x y) mask) => (VPMULHWMasked128 x y mask)
1680 (VMOVDQU16Masked256 (VPMULHW256 x y) mask) => (VPMULHWMasked256 x y mask)
1681 (VMOVDQU16Masked512 (VPMULHW512 x y) mask) => (VPMULHWMasked512 x y mask)
1682 (VMOVDQU16Masked128 (VPMULHUW128 x y) mask) => (VPMULHUWMasked128 x y mask)
1683 (VMOVDQU16Masked256 (VPMULHUW256 x y) mask) => (VPMULHUWMasked256 x y mask)
1684 (VMOVDQU16Masked512 (VPMULHUW512 x y) mask) => (VPMULHUWMasked512 x y mask)
1685 (VMOVDQU32Masked128 (VMULPS128 x y) mask) => (VMULPSMasked128 x y mask)
1686 (VMOVDQU32Masked256 (VMULPS256 x y) mask) => (VMULPSMasked256 x y mask)
1687 (VMOVDQU32Masked512 (VMULPS512 x y) mask) => (VMULPSMasked512 x y mask)
1688 (VMOVDQU64Masked128 (VMULPD128 x y) mask) => (VMULPDMasked128 x y mask)
1689 (VMOVDQU64Masked256 (VMULPD256 x y) mask) => (VMULPDMasked256 x y mask)
1690 (VMOVDQU64Masked512 (VMULPD512 x y) mask) => (VMULPDMasked512 x y mask)
1691 (VMOVDQU16Masked128 (VPMULLW128 x y) mask) => (VPMULLWMasked128 x y mask)
1692 (VMOVDQU16Masked256 (VPMULLW256 x y) mask) => (VPMULLWMasked256 x y mask)
1693 (VMOVDQU16Masked512 (VPMULLW512 x y) mask) => (VPMULLWMasked512 x y mask)
1694 (VMOVDQU32Masked128 (VPMULLD128 x y) mask) => (VPMULLDMasked128 x y mask)
1695 (VMOVDQU32Masked256 (VPMULLD256 x y) mask) => (VPMULLDMasked256 x y mask)
1696 (VMOVDQU32Masked512 (VPMULLD512 x y) mask) => (VPMULLDMasked512 x y mask)
1697 (VMOVDQU64Masked128 (VPMULLQ128 x y) mask) => (VPMULLQMasked128 x y mask)
1698 (VMOVDQU64Masked256 (VPMULLQ256 x y) mask) => (VPMULLQMasked256 x y mask)
1699 (VMOVDQU64Masked512 (VPMULLQ512 x y) mask) => (VPMULLQMasked512 x y mask)
1700 (VMOVDQU32Masked128 (VFMSUBADD213PS128 x y z) mask) => (VFMSUBADD213PSMasked128 x y z mask)
1701 (VMOVDQU32Masked256 (VFMSUBADD213PS256 x y z) mask) => (VFMSUBADD213PSMasked256 x y z mask)
1702 (VMOVDQU32Masked512 (VFMSUBADD213PS512 x y z) mask) => (VFMSUBADD213PSMasked512 x y z mask)
1703 (VMOVDQU64Masked128 (VFMSUBADD213PD128 x y z) mask) => (VFMSUBADD213PDMasked128 x y z mask)
1704 (VMOVDQU64Masked256 (VFMSUBADD213PD256 x y z) mask) => (VFMSUBADD213PDMasked256 x y z mask)
1705 (VMOVDQU64Masked512 (VFMSUBADD213PD512 x y z) mask) => (VFMSUBADD213PDMasked512 x y z mask)
1706 (VMOVDQU8Masked128 (VPOPCNTB128 x) mask) => (VPOPCNTBMasked128 x mask)
1707 (VMOVDQU8Masked256 (VPOPCNTB256 x) mask) => (VPOPCNTBMasked256 x mask)
1708 (VMOVDQU8Masked512 (VPOPCNTB512 x) mask) => (VPOPCNTBMasked512 x mask)
1709 (VMOVDQU16Masked128 (VPOPCNTW128 x) mask) => (VPOPCNTWMasked128 x mask)
1710 (VMOVDQU16Masked256 (VPOPCNTW256 x) mask) => (VPOPCNTWMasked256 x mask)
1711 (VMOVDQU16Masked512 (VPOPCNTW512 x) mask) => (VPOPCNTWMasked512 x mask)
1712 (VMOVDQU32Masked128 (VPOPCNTD128 x) mask) => (VPOPCNTDMasked128 x mask)
1713 (VMOVDQU32Masked256 (VPOPCNTD256 x) mask) => (VPOPCNTDMasked256 x mask)
1714 (VMOVDQU32Masked512 (VPOPCNTD512 x) mask) => (VPOPCNTDMasked512 x mask)
1715 (VMOVDQU64Masked128 (VPOPCNTQ128 x) mask) => (VPOPCNTQMasked128 x mask)
1716 (VMOVDQU64Masked256 (VPOPCNTQ256 x) mask) => (VPOPCNTQMasked256 x mask)
1717 (VMOVDQU64Masked512 (VPOPCNTQ512 x) mask) => (VPOPCNTQMasked512 x mask)
1718 (VMOVDQU32Masked512 (VPORD512 x y) mask) => (VPORDMasked512 x y mask)
1719 (VMOVDQU64Masked512 (VPORQ512 x y) mask) => (VPORQMasked512 x y mask)
1720 (VMOVDQU8Masked128 (VPERMB128 x y) mask) => (VPERMBMasked128 x y mask)
1721 (VMOVDQU8Masked256 (VPERMB256 x y) mask) => (VPERMBMasked256 x y mask)
1722 (VMOVDQU8Masked512 (VPERMB512 x y) mask) => (VPERMBMasked512 x y mask)
1723 (VMOVDQU16Masked128 (VPERMW128 x y) mask) => (VPERMWMasked128 x y mask)
1724 (VMOVDQU16Masked256 (VPERMW256 x y) mask) => (VPERMWMasked256 x y mask)
1725 (VMOVDQU16Masked512 (VPERMW512 x y) mask) => (VPERMWMasked512 x y mask)
1726 (VMOVDQU32Masked256 (VPERMPS256 x y) mask) => (VPERMPSMasked256 x y mask)
1727 (VMOVDQU32Masked256 (VPERMD256 x y) mask) => (VPERMDMasked256 x y mask)
1728 (VMOVDQU32Masked512 (VPERMPS512 x y) mask) => (VPERMPSMasked512 x y mask)
1729 (VMOVDQU32Masked512 (VPERMD512 x y) mask) => (VPERMDMasked512 x y mask)
1730 (VMOVDQU64Masked256 (VPERMPD256 x y) mask) => (VPERMPDMasked256 x y mask)
1731 (VMOVDQU64Masked256 (VPERMQ256 x y) mask) => (VPERMQMasked256 x y mask)
1732 (VMOVDQU64Masked512 (VPERMPD512 x y) mask) => (VPERMPDMasked512 x y mask)
1733 (VMOVDQU64Masked512 (VPERMQ512 x y) mask) => (VPERMQMasked512 x y mask)
1734 (VMOVDQU8Masked256 (VPSHUFB256 x y) mask) => (VPSHUFBMasked256 x y mask)
1735 (VMOVDQU8Masked512 (VPSHUFB512 x y) mask) => (VPSHUFBMasked512 x y mask)
1736 (VMOVDQU8Masked128 (VPSHUFB128 x y) mask) => (VPSHUFBMasked128 x y mask)
1737 (VMOVDQU32Masked512 (VRCP14PS512 x) mask) => (VRCP14PSMasked512 x mask)
1738 (VMOVDQU64Masked128 (VRCP14PD128 x) mask) => (VRCP14PDMasked128 x mask)
1739 (VMOVDQU64Masked256 (VRCP14PD256 x) mask) => (VRCP14PDMasked256 x mask)
1740 (VMOVDQU64Masked512 (VRCP14PD512 x) mask) => (VRCP14PDMasked512 x mask)
1741 (VMOVDQU32Masked512 (VRSQRT14PS512 x) mask) => (VRSQRT14PSMasked512 x mask)
1742 (VMOVDQU64Masked128 (VRSQRT14PD128 x) mask) => (VRSQRT14PDMasked128 x mask)
1743 (VMOVDQU64Masked256 (VRSQRT14PD256 x) mask) => (VRSQRT14PDMasked256 x mask)
1744 (VMOVDQU64Masked512 (VRSQRT14PD512 x) mask) => (VRSQRT14PDMasked512 x mask)
1745 (VMOVDQU32Masked128 (VPROLD128 [a] x) mask) => (VPROLDMasked128 [a] x mask)
1746 (VMOVDQU32Masked256 (VPROLD256 [a] x) mask) => (VPROLDMasked256 [a] x mask)
1747 (VMOVDQU32Masked512 (VPROLD512 [a] x) mask) => (VPROLDMasked512 [a] x mask)
1748 (VMOVDQU64Masked128 (VPROLQ128 [a] x) mask) => (VPROLQMasked128 [a] x mask)
1749 (VMOVDQU64Masked256 (VPROLQ256 [a] x) mask) => (VPROLQMasked256 [a] x mask)
1750 (VMOVDQU64Masked512 (VPROLQ512 [a] x) mask) => (VPROLQMasked512 [a] x mask)
1751 (VMOVDQU32Masked128 (VPRORD128 [a] x) mask) => (VPRORDMasked128 [a] x mask)
1752 (VMOVDQU32Masked256 (VPRORD256 [a] x) mask) => (VPRORDMasked256 [a] x mask)
1753 (VMOVDQU32Masked512 (VPRORD512 [a] x) mask) => (VPRORDMasked512 [a] x mask)
1754 (VMOVDQU64Masked128 (VPRORQ128 [a] x) mask) => (VPRORQMasked128 [a] x mask)
1755 (VMOVDQU64Masked256 (VPRORQ256 [a] x) mask) => (VPRORQMasked256 [a] x mask)
1756 (VMOVDQU64Masked512 (VPRORQ512 [a] x) mask) => (VPRORQMasked512 [a] x mask)
1757 (VMOVDQU32Masked128 (VPROLVD128 x y) mask) => (VPROLVDMasked128 x y mask)
1758 (VMOVDQU32Masked256 (VPROLVD256 x y) mask) => (VPROLVDMasked256 x y mask)
1759 (VMOVDQU32Masked512 (VPROLVD512 x y) mask) => (VPROLVDMasked512 x y mask)
1760 (VMOVDQU64Masked128 (VPROLVQ128 x y) mask) => (VPROLVQMasked128 x y mask)
1761 (VMOVDQU64Masked256 (VPROLVQ256 x y) mask) => (VPROLVQMasked256 x y mask)
1762 (VMOVDQU64Masked512 (VPROLVQ512 x y) mask) => (VPROLVQMasked512 x y mask)
1763 (VMOVDQU32Masked128 (VPRORVD128 x y) mask) => (VPRORVDMasked128 x y mask)
1764 (VMOVDQU32Masked256 (VPRORVD256 x y) mask) => (VPRORVDMasked256 x y mask)
1765 (VMOVDQU32Masked512 (VPRORVD512 x y) mask) => (VPRORVDMasked512 x y mask)
1766 (VMOVDQU64Masked128 (VPRORVQ128 x y) mask) => (VPRORVQMasked128 x y mask)
1767 (VMOVDQU64Masked256 (VPRORVQ256 x y) mask) => (VPRORVQMasked256 x y mask)
1768 (VMOVDQU64Masked512 (VPRORVQ512 x y) mask) => (VPRORVQMasked512 x y mask)
1769 (VMOVDQU16Masked128 (VPMOVSWB128_128 x) mask) => (VPMOVSWBMasked128_128 x mask)
1770 (VMOVDQU16Masked256 (VPMOVSWB128_256 x) mask) => (VPMOVSWBMasked128_256 x mask)
1771 (VMOVDQU16Masked256 (VPMOVSWB256 x) mask) => (VPMOVSWBMasked256 x mask)
1772 (VMOVDQU32Masked128 (VPMOVSDB128_128 x) mask) => (VPMOVSDBMasked128_128 x mask)
1773 (VMOVDQU32Masked256 (VPMOVSDB128_256 x) mask) => (VPMOVSDBMasked128_256 x mask)
1774 (VMOVDQU32Masked512 (VPMOVSDB128_512 x) mask) => (VPMOVSDBMasked128_512 x mask)
1775 (VMOVDQU64Masked128 (VPMOVSQB128_128 x) mask) => (VPMOVSQBMasked128_128 x mask)
1776 (VMOVDQU64Masked256 (VPMOVSQB128_256 x) mask) => (VPMOVSQBMasked128_256 x mask)
1777 (VMOVDQU64Masked512 (VPMOVSQB128_512 x) mask) => (VPMOVSQBMasked128_512 x mask)
1778 (VMOVDQU32Masked128 (VPACKSSDW128 x y) mask) => (VPACKSSDWMasked128 x y mask)
1779 (VMOVDQU32Masked256 (VPACKSSDW256 x y) mask) => (VPACKSSDWMasked256 x y mask)
1780 (VMOVDQU32Masked512 (VPACKSSDW512 x y) mask) => (VPACKSSDWMasked512 x y mask)
1781 (VMOVDQU32Masked128 (VPMOVSDW128_128 x) mask) => (VPMOVSDWMasked128_128 x mask)
1782 (VMOVDQU32Masked256 (VPMOVSDW128_256 x) mask) => (VPMOVSDWMasked128_256 x mask)
1783 (VMOVDQU32Masked256 (VPMOVSDW256 x) mask) => (VPMOVSDWMasked256 x mask)
1784 (VMOVDQU64Masked128 (VPMOVSQW128_128 x) mask) => (VPMOVSQWMasked128_128 x mask)
1785 (VMOVDQU64Masked256 (VPMOVSQW128_256 x) mask) => (VPMOVSQWMasked128_256 x mask)
1786 (VMOVDQU64Masked512 (VPMOVSQW128_512 x) mask) => (VPMOVSQWMasked128_512 x mask)
1787 (VMOVDQU64Masked128 (VPMOVSQD128_128 x) mask) => (VPMOVSQDMasked128_128 x mask)
1788 (VMOVDQU64Masked256 (VPMOVSQD128_256 x) mask) => (VPMOVSQDMasked128_256 x mask)
1789 (VMOVDQU64Masked256 (VPMOVSQD256 x) mask) => (VPMOVSQDMasked256 x mask)
1790 (VMOVDQU16Masked256 (VPMOVUSWB256 x) mask) => (VPMOVUSWBMasked256 x mask)
1791 (VMOVDQU32Masked128 (VPACKUSDW128 x y) mask) => (VPACKUSDWMasked128 x y mask)
1792 (VMOVDQU32Masked256 (VPACKUSDW256 x y) mask) => (VPACKUSDWMasked256 x y mask)
1793 (VMOVDQU32Masked512 (VPACKUSDW512 x y) mask) => (VPACKUSDWMasked512 x y mask)
1794 (VMOVDQU32Masked128 (VPMOVUSDW128_128 x) mask) => (VPMOVUSDWMasked128_128 x mask)
1795 (VMOVDQU32Masked256 (VPMOVUSDW128_256 x) mask) => (VPMOVUSDWMasked128_256 x mask)
1796 (VMOVDQU32Masked256 (VPMOVUSDW256 x) mask) => (VPMOVUSDWMasked256 x mask)
1797 (VMOVDQU64Masked128 (VPMOVUSQW128_128 x) mask) => (VPMOVUSQWMasked128_128 x mask)
1798 (VMOVDQU64Masked256 (VPMOVUSQW128_256 x) mask) => (VPMOVUSQWMasked128_256 x mask)
1799 (VMOVDQU64Masked512 (VPMOVUSQW128_512 x) mask) => (VPMOVUSQWMasked128_512 x mask)
1800 (VMOVDQU64Masked128 (VPMOVUSQD128_128 x) mask) => (VPMOVUSQDMasked128_128 x mask)
1801 (VMOVDQU64Masked256 (VPMOVUSQD128_256 x) mask) => (VPMOVUSQDMasked128_256 x mask)
1802 (VMOVDQU64Masked256 (VPMOVUSQD256 x) mask) => (VPMOVUSQDMasked256 x mask)
1803 (VMOVDQU32Masked128 (VSCALEFPS128 x y) mask) => (VSCALEFPSMasked128 x y mask)
1804 (VMOVDQU32Masked256 (VSCALEFPS256 x y) mask) => (VSCALEFPSMasked256 x y mask)
1805 (VMOVDQU32Masked512 (VSCALEFPS512 x y) mask) => (VSCALEFPSMasked512 x y mask)
1806 (VMOVDQU64Masked128 (VSCALEFPD128 x y) mask) => (VSCALEFPDMasked128 x y mask)
1807 (VMOVDQU64Masked256 (VSCALEFPD256 x y) mask) => (VSCALEFPDMasked256 x y mask)
1808 (VMOVDQU64Masked512 (VSCALEFPD512 x y) mask) => (VSCALEFPDMasked512 x y mask)
1809 (VMOVDQU16Masked128 (VPSHLDW128 [a] x y) mask) => (VPSHLDWMasked128 [a] x y mask)
1810 (VMOVDQU16Masked256 (VPSHLDW256 [a] x y) mask) => (VPSHLDWMasked256 [a] x y mask)
1811 (VMOVDQU16Masked512 (VPSHLDW512 [a] x y) mask) => (VPSHLDWMasked512 [a] x y mask)
1812 (VMOVDQU32Masked128 (VPSHLDD128 [a] x y) mask) => (VPSHLDDMasked128 [a] x y mask)
1813 (VMOVDQU32Masked256 (VPSHLDD256 [a] x y) mask) => (VPSHLDDMasked256 [a] x y mask)
1814 (VMOVDQU32Masked512 (VPSHLDD512 [a] x y) mask) => (VPSHLDDMasked512 [a] x y mask)
1815 (VMOVDQU64Masked128 (VPSHLDQ128 [a] x y) mask) => (VPSHLDQMasked128 [a] x y mask)
1816 (VMOVDQU64Masked256 (VPSHLDQ256 [a] x y) mask) => (VPSHLDQMasked256 [a] x y mask)
1817 (VMOVDQU64Masked512 (VPSHLDQ512 [a] x y) mask) => (VPSHLDQMasked512 [a] x y mask)
1818 (VMOVDQU16Masked128 (VPSLLW128 x y) mask) => (VPSLLWMasked128 x y mask)
1819 (VMOVDQU16Masked256 (VPSLLW256 x y) mask) => (VPSLLWMasked256 x y mask)
1820 (VMOVDQU16Masked512 (VPSLLW512 x y) mask) => (VPSLLWMasked512 x y mask)
1821 (VMOVDQU32Masked128 (VPSLLD128 x y) mask) => (VPSLLDMasked128 x y mask)
1822 (VMOVDQU32Masked256 (VPSLLD256 x y) mask) => (VPSLLDMasked256 x y mask)
1823 (VMOVDQU32Masked512 (VPSLLD512 x y) mask) => (VPSLLDMasked512 x y mask)
1824 (VMOVDQU64Masked128 (VPSLLQ128 x y) mask) => (VPSLLQMasked128 x y mask)
1825 (VMOVDQU64Masked256 (VPSLLQ256 x y) mask) => (VPSLLQMasked256 x y mask)
1826 (VMOVDQU64Masked512 (VPSLLQ512 x y) mask) => (VPSLLQMasked512 x y mask)
1827 (VMOVDQU16Masked128 (VPSHRDW128 [a] x y) mask) => (VPSHRDWMasked128 [a] x y mask)
1828 (VMOVDQU16Masked256 (VPSHRDW256 [a] x y) mask) => (VPSHRDWMasked256 [a] x y mask)
1829 (VMOVDQU16Masked512 (VPSHRDW512 [a] x y) mask) => (VPSHRDWMasked512 [a] x y mask)
1830 (VMOVDQU32Masked128 (VPSHRDD128 [a] x y) mask) => (VPSHRDDMasked128 [a] x y mask)
1831 (VMOVDQU32Masked256 (VPSHRDD256 [a] x y) mask) => (VPSHRDDMasked256 [a] x y mask)
1832 (VMOVDQU32Masked512 (VPSHRDD512 [a] x y) mask) => (VPSHRDDMasked512 [a] x y mask)
1833 (VMOVDQU64Masked128 (VPSHRDQ128 [a] x y) mask) => (VPSHRDQMasked128 [a] x y mask)
1834 (VMOVDQU64Masked256 (VPSHRDQ256 [a] x y) mask) => (VPSHRDQMasked256 [a] x y mask)
1835 (VMOVDQU64Masked512 (VPSHRDQ512 [a] x y) mask) => (VPSHRDQMasked512 [a] x y mask)
1836 (VMOVDQU16Masked128 (VPSRAW128 x y) mask) => (VPSRAWMasked128 x y mask)
1837 (VMOVDQU16Masked256 (VPSRAW256 x y) mask) => (VPSRAWMasked256 x y mask)
1838 (VMOVDQU16Masked512 (VPSRAW512 x y) mask) => (VPSRAWMasked512 x y mask)
1839 (VMOVDQU32Masked128 (VPSRAD128 x y) mask) => (VPSRADMasked128 x y mask)
1840 (VMOVDQU32Masked256 (VPSRAD256 x y) mask) => (VPSRADMasked256 x y mask)
1841 (VMOVDQU32Masked512 (VPSRAD512 x y) mask) => (VPSRADMasked512 x y mask)
1842 (VMOVDQU64Masked128 (VPSRAQ128 x y) mask) => (VPSRAQMasked128 x y mask)
1843 (VMOVDQU64Masked256 (VPSRAQ256 x y) mask) => (VPSRAQMasked256 x y mask)
1844 (VMOVDQU64Masked512 (VPSRAQ512 x y) mask) => (VPSRAQMasked512 x y mask)
1845 (VMOVDQU16Masked128 (VPSRLW128 x y) mask) => (VPSRLWMasked128 x y mask)
1846 (VMOVDQU16Masked256 (VPSRLW256 x y) mask) => (VPSRLWMasked256 x y mask)
1847 (VMOVDQU16Masked512 (VPSRLW512 x y) mask) => (VPSRLWMasked512 x y mask)
1848 (VMOVDQU32Masked128 (VPSRLD128 x y) mask) => (VPSRLDMasked128 x y mask)
1849 (VMOVDQU32Masked256 (VPSRLD256 x y) mask) => (VPSRLDMasked256 x y mask)
1850 (VMOVDQU32Masked512 (VPSRLD512 x y) mask) => (VPSRLDMasked512 x y mask)
1851 (VMOVDQU64Masked128 (VPSRLQ128 x y) mask) => (VPSRLQMasked128 x y mask)
1852 (VMOVDQU64Masked256 (VPSRLQ256 x y) mask) => (VPSRLQMasked256 x y mask)
1853 (VMOVDQU64Masked512 (VPSRLQ512 x y) mask) => (VPSRLQMasked512 x y mask)
1854 (VMOVDQU16Masked128 (VPSHLDVW128 x y z) mask) => (VPSHLDVWMasked128 x y z mask)
1855 (VMOVDQU16Masked256 (VPSHLDVW256 x y z) mask) => (VPSHLDVWMasked256 x y z mask)
1856 (VMOVDQU16Masked512 (VPSHLDVW512 x y z) mask) => (VPSHLDVWMasked512 x y z mask)
1857 (VMOVDQU32Masked128 (VPSHLDVD128 x y z) mask) => (VPSHLDVDMasked128 x y z mask)
1858 (VMOVDQU32Masked256 (VPSHLDVD256 x y z) mask) => (VPSHLDVDMasked256 x y z mask)
1859 (VMOVDQU32Masked512 (VPSHLDVD512 x y z) mask) => (VPSHLDVDMasked512 x y z mask)
1860 (VMOVDQU64Masked128 (VPSHLDVQ128 x y z) mask) => (VPSHLDVQMasked128 x y z mask)
1861 (VMOVDQU64Masked256 (VPSHLDVQ256 x y z) mask) => (VPSHLDVQMasked256 x y z mask)
1862 (VMOVDQU64Masked512 (VPSHLDVQ512 x y z) mask) => (VPSHLDVQMasked512 x y z mask)
1863 (VMOVDQU16Masked128 (VPSLLVW128 x y) mask) => (VPSLLVWMasked128 x y mask)
1864 (VMOVDQU16Masked256 (VPSLLVW256 x y) mask) => (VPSLLVWMasked256 x y mask)
1865 (VMOVDQU16Masked512 (VPSLLVW512 x y) mask) => (VPSLLVWMasked512 x y mask)
1866 (VMOVDQU32Masked128 (VPSLLVD128 x y) mask) => (VPSLLVDMasked128 x y mask)
1867 (VMOVDQU32Masked256 (VPSLLVD256 x y) mask) => (VPSLLVDMasked256 x y mask)
1868 (VMOVDQU32Masked512 (VPSLLVD512 x y) mask) => (VPSLLVDMasked512 x y mask)
1869 (VMOVDQU64Masked128 (VPSLLVQ128 x y) mask) => (VPSLLVQMasked128 x y mask)
1870 (VMOVDQU64Masked256 (VPSLLVQ256 x y) mask) => (VPSLLVQMasked256 x y mask)
1871 (VMOVDQU64Masked512 (VPSLLVQ512 x y) mask) => (VPSLLVQMasked512 x y mask)
1872 (VMOVDQU16Masked128 (VPSHRDVW128 x y z) mask) => (VPSHRDVWMasked128 x y z mask)
1873 (VMOVDQU16Masked256 (VPSHRDVW256 x y z) mask) => (VPSHRDVWMasked256 x y z mask)
1874 (VMOVDQU16Masked512 (VPSHRDVW512 x y z) mask) => (VPSHRDVWMasked512 x y z mask)
1875 (VMOVDQU32Masked128 (VPSHRDVD128 x y z) mask) => (VPSHRDVDMasked128 x y z mask)
1876 (VMOVDQU32Masked256 (VPSHRDVD256 x y z) mask) => (VPSHRDVDMasked256 x y z mask)
1877 (VMOVDQU32Masked512 (VPSHRDVD512 x y z) mask) => (VPSHRDVDMasked512 x y z mask)
1878 (VMOVDQU64Masked128 (VPSHRDVQ128 x y z) mask) => (VPSHRDVQMasked128 x y z mask)
1879 (VMOVDQU64Masked256 (VPSHRDVQ256 x y z) mask) => (VPSHRDVQMasked256 x y z mask)
1880 (VMOVDQU64Masked512 (VPSHRDVQ512 x y z) mask) => (VPSHRDVQMasked512 x y z mask)
1881 (VMOVDQU16Masked128 (VPSRAVW128 x y) mask) => (VPSRAVWMasked128 x y mask)
1882 (VMOVDQU16Masked256 (VPSRAVW256 x y) mask) => (VPSRAVWMasked256 x y mask)
1883 (VMOVDQU16Masked512 (VPSRAVW512 x y) mask) => (VPSRAVWMasked512 x y mask)
1884 (VMOVDQU32Masked128 (VPSRAVD128 x y) mask) => (VPSRAVDMasked128 x y mask)
1885 (VMOVDQU32Masked256 (VPSRAVD256 x y) mask) => (VPSRAVDMasked256 x y mask)
1886 (VMOVDQU32Masked512 (VPSRAVD512 x y) mask) => (VPSRAVDMasked512 x y mask)
1887 (VMOVDQU64Masked128 (VPSRAVQ128 x y) mask) => (VPSRAVQMasked128 x y mask)
1888 (VMOVDQU64Masked256 (VPSRAVQ256 x y) mask) => (VPSRAVQMasked256 x y mask)
1889 (VMOVDQU64Masked512 (VPSRAVQ512 x y) mask) => (VPSRAVQMasked512 x y mask)
1890 (VMOVDQU16Masked128 (VPSRLVW128 x y) mask) => (VPSRLVWMasked128 x y mask)
1891 (VMOVDQU16Masked256 (VPSRLVW256 x y) mask) => (VPSRLVWMasked256 x y mask)
1892 (VMOVDQU16Masked512 (VPSRLVW512 x y) mask) => (VPSRLVWMasked512 x y mask)
1893 (VMOVDQU32Masked128 (VPSRLVD128 x y) mask) => (VPSRLVDMasked128 x y mask)
1894 (VMOVDQU32Masked256 (VPSRLVD256 x y) mask) => (VPSRLVDMasked256 x y mask)
1895 (VMOVDQU32Masked512 (VPSRLVD512 x y) mask) => (VPSRLVDMasked512 x y mask)
1896 (VMOVDQU64Masked128 (VPSRLVQ128 x y) mask) => (VPSRLVQMasked128 x y mask)
1897 (VMOVDQU64Masked256 (VPSRLVQ256 x y) mask) => (VPSRLVQMasked256 x y mask)
1898 (VMOVDQU64Masked512 (VPSRLVQ512 x y) mask) => (VPSRLVQMasked512 x y mask)
1899 (VMOVDQU32Masked128 (VSQRTPS128 x) mask) => (VSQRTPSMasked128 x mask)
1900 (VMOVDQU32Masked256 (VSQRTPS256 x) mask) => (VSQRTPSMasked256 x mask)
1901 (VMOVDQU32Masked512 (VSQRTPS512 x) mask) => (VSQRTPSMasked512 x mask)
1902 (VMOVDQU64Masked128 (VSQRTPD128 x) mask) => (VSQRTPDMasked128 x mask)
1903 (VMOVDQU64Masked256 (VSQRTPD256 x) mask) => (VSQRTPDMasked256 x mask)
1904 (VMOVDQU64Masked512 (VSQRTPD512 x) mask) => (VSQRTPDMasked512 x mask)
1905 (VMOVDQU32Masked128 (VSUBPS128 x y) mask) => (VSUBPSMasked128 x y mask)
1906 (VMOVDQU32Masked256 (VSUBPS256 x y) mask) => (VSUBPSMasked256 x y mask)
1907 (VMOVDQU32Masked512 (VSUBPS512 x y) mask) => (VSUBPSMasked512 x y mask)
1908 (VMOVDQU64Masked128 (VSUBPD128 x y) mask) => (VSUBPDMasked128 x y mask)
1909 (VMOVDQU64Masked256 (VSUBPD256 x y) mask) => (VSUBPDMasked256 x y mask)
1910 (VMOVDQU64Masked512 (VSUBPD512 x y) mask) => (VSUBPDMasked512 x y mask)
1911 (VMOVDQU8Masked128 (VPSUBB128 x y) mask) => (VPSUBBMasked128 x y mask)
1912 (VMOVDQU8Masked256 (VPSUBB256 x y) mask) => (VPSUBBMasked256 x y mask)
1913 (VMOVDQU8Masked512 (VPSUBB512 x y) mask) => (VPSUBBMasked512 x y mask)
1914 (VMOVDQU16Masked128 (VPSUBW128 x y) mask) => (VPSUBWMasked128 x y mask)
1915 (VMOVDQU16Masked256 (VPSUBW256 x y) mask) => (VPSUBWMasked256 x y mask)
1916 (VMOVDQU16Masked512 (VPSUBW512 x y) mask) => (VPSUBWMasked512 x y mask)
1917 (VMOVDQU32Masked128 (VPSUBD128 x y) mask) => (VPSUBDMasked128 x y mask)
1918 (VMOVDQU32Masked256 (VPSUBD256 x y) mask) => (VPSUBDMasked256 x y mask)
1919 (VMOVDQU32Masked512 (VPSUBD512 x y) mask) => (VPSUBDMasked512 x y mask)
1920 (VMOVDQU64Masked128 (VPSUBQ128 x y) mask) => (VPSUBQMasked128 x y mask)
1921 (VMOVDQU64Masked256 (VPSUBQ256 x y) mask) => (VPSUBQMasked256 x y mask)
1922 (VMOVDQU64Masked512 (VPSUBQ512 x y) mask) => (VPSUBQMasked512 x y mask)
1923 (VMOVDQU8Masked128 (VPSUBSB128 x y) mask) => (VPSUBSBMasked128 x y mask)
1924 (VMOVDQU8Masked256 (VPSUBSB256 x y) mask) => (VPSUBSBMasked256 x y mask)
1925 (VMOVDQU8Masked512 (VPSUBSB512 x y) mask) => (VPSUBSBMasked512 x y mask)
1926 (VMOVDQU16Masked128 (VPSUBSW128 x y) mask) => (VPSUBSWMasked128 x y mask)
1927 (VMOVDQU16Masked256 (VPSUBSW256 x y) mask) => (VPSUBSWMasked256 x y mask)
1928 (VMOVDQU16Masked512 (VPSUBSW512 x y) mask) => (VPSUBSWMasked512 x y mask)
1929 (VMOVDQU8Masked128 (VPSUBUSB128 x y) mask) => (VPSUBUSBMasked128 x y mask)
1930 (VMOVDQU8Masked256 (VPSUBUSB256 x y) mask) => (VPSUBUSBMasked256 x y mask)
1931 (VMOVDQU8Masked512 (VPSUBUSB512 x y) mask) => (VPSUBUSBMasked512 x y mask)
1932 (VMOVDQU16Masked128 (VPSUBUSW128 x y) mask) => (VPSUBUSWMasked128 x y mask)
1933 (VMOVDQU16Masked256 (VPSUBUSW256 x y) mask) => (VPSUBUSWMasked256 x y mask)
1934 (VMOVDQU16Masked512 (VPSUBUSW512 x y) mask) => (VPSUBUSWMasked512 x y mask)
1935 (VMOVDQU16Masked128 (VPMOVWB128_128 x) mask) => (VPMOVWBMasked128_128 x mask)
1936 (VMOVDQU16Masked256 (VPMOVWB128_256 x) mask) => (VPMOVWBMasked128_256 x mask)
1937 (VMOVDQU16Masked256 (VPMOVWB256 x) mask) => (VPMOVWBMasked256 x mask)
1938 (VMOVDQU32Masked128 (VPMOVDB128_128 x) mask) => (VPMOVDBMasked128_128 x mask)
1939 (VMOVDQU32Masked256 (VPMOVDB128_256 x) mask) => (VPMOVDBMasked128_256 x mask)
1940 (VMOVDQU32Masked512 (VPMOVDB128_512 x) mask) => (VPMOVDBMasked128_512 x mask)
1941 (VMOVDQU64Masked128 (VPMOVQB128_128 x) mask) => (VPMOVQBMasked128_128 x mask)
1942 (VMOVDQU64Masked256 (VPMOVQB128_256 x) mask) => (VPMOVQBMasked128_256 x mask)
1943 (VMOVDQU64Masked512 (VPMOVQB128_512 x) mask) => (VPMOVQBMasked128_512 x mask)
1944 (VMOVDQU32Masked128 (VPMOVDW128_128 x) mask) => (VPMOVDWMasked128_128 x mask)
1945 (VMOVDQU32Masked256 (VPMOVDW128_256 x) mask) => (VPMOVDWMasked128_256 x mask)
1946 (VMOVDQU32Masked256 (VPMOVDW256 x) mask) => (VPMOVDWMasked256 x mask)
1947 (VMOVDQU64Masked128 (VPMOVQW128_128 x) mask) => (VPMOVQWMasked128_128 x mask)
1948 (VMOVDQU64Masked256 (VPMOVQW128_256 x) mask) => (VPMOVQWMasked128_256 x mask)
1949 (VMOVDQU64Masked512 (VPMOVQW128_512 x) mask) => (VPMOVQWMasked128_512 x mask)
1950 (VMOVDQU64Masked128 (VPMOVQD128_128 x) mask) => (VPMOVQDMasked128_128 x mask)
1951 (VMOVDQU64Masked256 (VPMOVQD128_256 x) mask) => (VPMOVQDMasked128_256 x mask)
1952 (VMOVDQU64Masked256 (VPMOVQD256 x) mask) => (VPMOVQDMasked256 x mask)
1953 (VMOVDQU32Masked512 (VPXORD512 x y) mask) => (VPXORDMasked512 x y mask)
1954 (VMOVDQU64Masked512 (VPXORQ512 x y) mask) => (VPXORQMasked512 x y mask)
1955 (VMOVDQU32Masked256 (VPSHUFD256 [a] x) mask) => (VPSHUFDMasked256 [a] x mask)
1956 (VMOVDQU32Masked512 (VPSHUFD512 [a] x) mask) => (VPSHUFDMasked512 [a] x mask)
1957 (VMOVDQU16Masked256 (VPSHUFHW256 [a] x) mask) => (VPSHUFHWMasked256 [a] x mask)
1958 (VMOVDQU16Masked512 (VPSHUFHW512 [a] x) mask) => (VPSHUFHWMasked512 [a] x mask)
1959 (VMOVDQU16Masked128 (VPSHUFHW128 [a] x) mask) => (VPSHUFHWMasked128 [a] x mask)
1960 (VMOVDQU16Masked256 (VPSHUFLW256 [a] x) mask) => (VPSHUFLWMasked256 [a] x mask)
1961 (VMOVDQU16Masked512 (VPSHUFLW512 [a] x) mask) => (VPSHUFLWMasked512 [a] x mask)
1962 (VMOVDQU16Masked128 (VPSHUFLW128 [a] x) mask) => (VPSHUFLWMasked128 [a] x mask)
1963 (VMOVDQU32Masked128 (VPSHUFD128 [a] x) mask) => (VPSHUFDMasked128 [a] x mask)
1964 (VMOVDQU16Masked128 (VPSLLW128const [a] x) mask) => (VPSLLWMasked128const [a] x mask)
1965 (VMOVDQU16Masked256 (VPSLLW256const [a] x) mask) => (VPSLLWMasked256const [a] x mask)
1966 (VMOVDQU16Masked512 (VPSLLW512const [a] x) mask) => (VPSLLWMasked512const [a] x mask)
1967 (VMOVDQU32Masked128 (VPSLLD128const [a] x) mask) => (VPSLLDMasked128const [a] x mask)
1968 (VMOVDQU32Masked256 (VPSLLD256const [a] x) mask) => (VPSLLDMasked256const [a] x mask)
1969 (VMOVDQU32Masked512 (VPSLLD512const [a] x) mask) => (VPSLLDMasked512const [a] x mask)
1970 (VMOVDQU64Masked128 (VPSLLQ128const [a] x) mask) => (VPSLLQMasked128const [a] x mask)
1971 (VMOVDQU64Masked256 (VPSLLQ256const [a] x) mask) => (VPSLLQMasked256const [a] x mask)
1972 (VMOVDQU64Masked512 (VPSLLQ512const [a] x) mask) => (VPSLLQMasked512const [a] x mask)
1973 (VMOVDQU16Masked128 (VPSRAW128const [a] x) mask) => (VPSRAWMasked128const [a] x mask)
1974 (VMOVDQU16Masked256 (VPSRAW256const [a] x) mask) => (VPSRAWMasked256const [a] x mask)
1975 (VMOVDQU16Masked512 (VPSRAW512const [a] x) mask) => (VPSRAWMasked512const [a] x mask)
1976 (VMOVDQU32Masked128 (VPSRAD128const [a] x) mask) => (VPSRADMasked128const [a] x mask)
1977 (VMOVDQU32Masked256 (VPSRAD256const [a] x) mask) => (VPSRADMasked256const [a] x mask)
1978 (VMOVDQU32Masked512 (VPSRAD512const [a] x) mask) => (VPSRADMasked512const [a] x mask)
1979 (VMOVDQU64Masked128 (VPSRAQ128const [a] x) mask) => (VPSRAQMasked128const [a] x mask)
1980 (VMOVDQU64Masked256 (VPSRAQ256const [a] x) mask) => (VPSRAQMasked256const [a] x mask)
1981 (VMOVDQU64Masked512 (VPSRAQ512const [a] x) mask) => (VPSRAQMasked512const [a] x mask)
1982 (VPBLENDMBMasked512 dst (VGF2P8MULB512 x y) mask) => (VGF2P8MULBMasked512Merging dst x y mask)
1983 (VPBLENDMBMasked512 dst (VPABSB512 x) mask) => (VPABSBMasked512Merging dst x mask)
1984 (VPBLENDMBMasked512 dst (VPADDB512 x y) mask) => (VPADDBMasked512Merging dst x y mask)
1985 (VPBLENDMBMasked512 dst (VPADDSB512 x y) mask) => (VPADDSBMasked512Merging dst x y mask)
1986 (VPBLENDMBMasked512 dst (VPADDUSB512 x y) mask) => (VPADDUSBMasked512Merging dst x y mask)
1987 (VPBLENDMBMasked512 dst (VPALIGNR512 [a] x y) mask) => (VPALIGNRMasked512Merging dst [a] x y mask)
1988 (VPBLENDMBMasked512 dst (VPAVGB512 x y) mask) => (VPAVGBMasked512Merging dst x y mask)
1989 (VPBLENDMBMasked512 dst (VPMAXSB512 x y) mask) => (VPMAXSBMasked512Merging dst x y mask)
1990 (VPBLENDMBMasked512 dst (VPMAXUB512 x y) mask) => (VPMAXUBMasked512Merging dst x y mask)
1991 (VPBLENDMBMasked512 dst (VPMINSB512 x y) mask) => (VPMINSBMasked512Merging dst x y mask)
1992 (VPBLENDMBMasked512 dst (VPMINUB512 x y) mask) => (VPMINUBMasked512Merging dst x y mask)
1993 (VPBLENDMBMasked512 dst (VPOPCNTB512 x) mask) => (VPOPCNTBMasked512Merging dst x mask)
1994 (VPBLENDMBMasked512 dst (VPSHUFB512 x y) mask) => (VPSHUFBMasked512Merging dst x y mask)
1995 (VPBLENDMBMasked512 dst (VPSUBB512 x y) mask) => (VPSUBBMasked512Merging dst x y mask)
1996 (VPBLENDMBMasked512 dst (VPSUBSB512 x y) mask) => (VPSUBSBMasked512Merging dst x y mask)
1997 (VPBLENDMBMasked512 dst (VPSUBUSB512 x y) mask) => (VPSUBUSBMasked512Merging dst x y mask)
1998 (VPBLENDMDMasked512 dst (VADDPS512 x y) mask) => (VADDPSMasked512Merging dst x y mask)
1999 (VPBLENDMDMasked512 dst (VCVTDQ2PS512 x) mask) => (VCVTDQ2PSMasked512Merging dst x mask)
2000 (VPBLENDMDMasked512 dst (VCVTTPS2DQ512 x) mask) => (VCVTTPS2DQMasked512Merging dst x mask)
2001 (VPBLENDMDMasked512 dst (VCVTTPS2UDQ512 x) mask) => (VCVTTPS2UDQMasked512Merging dst x mask)
2002 (VPBLENDMDMasked512 dst (VCVTUDQ2PS512 x) mask) => (VCVTUDQ2PSMasked512Merging dst x mask)
2003 (VPBLENDMDMasked512 dst (VDIVPS512 x y) mask) => (VDIVPSMasked512Merging dst x y mask)
2004 (VPBLENDMDMasked512 dst (VMAXPS512 x y) mask) => (VMAXPSMasked512Merging dst x y mask)
2005 (VPBLENDMDMasked512 dst (VMINPS512 x y) mask) => (VMINPSMasked512Merging dst x y mask)
2006 (VPBLENDMDMasked512 dst (VMULPS512 x y) mask) => (VMULPSMasked512Merging dst x y mask)
2007 (VPBLENDMDMasked512 dst (VPABSD512 x) mask) => (VPABSDMasked512Merging dst x mask)
2008 (VPBLENDMDMasked512 dst (VPACKSSDW512 x y) mask) => (VPACKSSDWMasked512Merging dst x y mask)
2009 (VPBLENDMDMasked512 dst (VPACKUSDW512 x y) mask) => (VPACKUSDWMasked512Merging dst x y mask)
2010 (VPBLENDMDMasked512 dst (VPADDD512 x y) mask) => (VPADDDMasked512Merging dst x y mask)
2011 (VPBLENDMDMasked512 dst (VPANDD512 x y) mask) => (VPANDDMasked512Merging dst x y mask)
2012 (VPBLENDMDMasked512 dst (VPLZCNTD512 x) mask) => (VPLZCNTDMasked512Merging dst x mask)
2013 (VPBLENDMDMasked512 dst (VPMAXSD512 x y) mask) => (VPMAXSDMasked512Merging dst x y mask)
2014 (VPBLENDMDMasked512 dst (VPMAXUD512 x y) mask) => (VPMAXUDMasked512Merging dst x y mask)
2015 (VPBLENDMDMasked512 dst (VPMINSD512 x y) mask) => (VPMINSDMasked512Merging dst x y mask)
2016 (VPBLENDMDMasked512 dst (VPMINUD512 x y) mask) => (VPMINUDMasked512Merging dst x y mask)
2017 (VPBLENDMDMasked512 dst (VPMOVDB128_512 x) mask) => (VPMOVDBMasked128_512Merging dst x mask)
2018 (VPBLENDMDMasked512 dst (VPMOVDW256 x) mask) => (VPMOVDWMasked256Merging dst x mask)
2019 (VPBLENDMDMasked512 dst (VPMOVSDB128_512 x) mask) => (VPMOVSDBMasked128_512Merging dst x mask)
2020 (VPBLENDMDMasked512 dst (VPMOVSDW256 x) mask) => (VPMOVSDWMasked256Merging dst x mask)
2021 (VPBLENDMDMasked512 dst (VPMOVUSDW256 x) mask) => (VPMOVUSDWMasked256Merging dst x mask)
2022 (VPBLENDMDMasked512 dst (VPMULLD512 x y) mask) => (VPMULLDMasked512Merging dst x y mask)
2023 (VPBLENDMDMasked512 dst (VPOPCNTD512 x) mask) => (VPOPCNTDMasked512Merging dst x mask)
2024 (VPBLENDMDMasked512 dst (VPORD512 x y) mask) => (VPORDMasked512Merging dst x y mask)
2025 (VPBLENDMDMasked512 dst (VPROLD512 [a] x) mask) => (VPROLDMasked512Merging dst [a] x mask)
2026 (VPBLENDMDMasked512 dst (VPROLVD512 x y) mask) => (VPROLVDMasked512Merging dst x y mask)
2027 (VPBLENDMDMasked512 dst (VPRORD512 [a] x) mask) => (VPRORDMasked512Merging dst [a] x mask)
2028 (VPBLENDMDMasked512 dst (VPRORVD512 x y) mask) => (VPRORVDMasked512Merging dst x y mask)
2029 (VPBLENDMDMasked512 dst (VPSHLDD512 [a] x y) mask) => (VPSHLDDMasked512Merging dst [a] x y mask)
2030 (VPBLENDMDMasked512 dst (VPSHRDD512 [a] x y) mask) => (VPSHRDDMasked512Merging dst [a] x y mask)
2031 (VPBLENDMDMasked512 dst (VPSHUFD512 [a] x) mask) => (VPSHUFDMasked512Merging dst [a] x mask)
2032 (VPBLENDMDMasked512 dst (VPSLLD512const [a] x) mask) => (VPSLLDMasked512constMerging dst [a] x mask)
2033 (VPBLENDMDMasked512 dst (VPSLLVD512 x y) mask) => (VPSLLVDMasked512Merging dst x y mask)
2034 (VPBLENDMDMasked512 dst (VPSRAD512const [a] x) mask) => (VPSRADMasked512constMerging dst [a] x mask)
2035 (VPBLENDMDMasked512 dst (VPSRAVD512 x y) mask) => (VPSRAVDMasked512Merging dst x y mask)
2036 (VPBLENDMDMasked512 dst (VPSRLVD512 x y) mask) => (VPSRLVDMasked512Merging dst x y mask)
2037 (VPBLENDMDMasked512 dst (VPSUBD512 x y) mask) => (VPSUBDMasked512Merging dst x y mask)
2038 (VPBLENDMDMasked512 dst (VPXORD512 x y) mask) => (VPXORDMasked512Merging dst x y mask)
2039 (VPBLENDMDMasked512 dst (VRCP14PS512 x) mask) => (VRCP14PSMasked512Merging dst x mask)
2040 (VPBLENDMDMasked512 dst (VREDUCEPS512 [a] x) mask) => (VREDUCEPSMasked512Merging dst [a] x mask)
2041 (VPBLENDMDMasked512 dst (VRNDSCALEPS512 [a] x) mask) => (VRNDSCALEPSMasked512Merging dst [a] x mask)
2042 (VPBLENDMDMasked512 dst (VRSQRT14PS512 x) mask) => (VRSQRT14PSMasked512Merging dst x mask)
2043 (VPBLENDMDMasked512 dst (VSCALEFPS512 x y) mask) => (VSCALEFPSMasked512Merging dst x y mask)
2044 (VPBLENDMDMasked512 dst (VSQRTPS512 x) mask) => (VSQRTPSMasked512Merging dst x mask)
2045 (VPBLENDMDMasked512 dst (VSUBPS512 x y) mask) => (VSUBPSMasked512Merging dst x y mask)
2046 (VPBLENDMQMasked512 dst (VADDPD512 x y) mask) => (VADDPDMasked512Merging dst x y mask)
2047 (VPBLENDMQMasked512 dst (VCVTPD2PS256 x) mask) => (VCVTPD2PSMasked256Merging dst x mask)
2048 (VPBLENDMQMasked512 dst (VCVTQQ2PD512 x) mask) => (VCVTQQ2PDMasked512Merging dst x mask)
2049 (VPBLENDMQMasked512 dst (VCVTQQ2PS256 x) mask) => (VCVTQQ2PSMasked256Merging dst x mask)
2050 (VPBLENDMQMasked512 dst (VCVTTPD2DQ256 x) mask) => (VCVTTPD2DQMasked256Merging dst x mask)
2051 (VPBLENDMQMasked512 dst (VCVTTPD2QQ512 x) mask) => (VCVTTPD2QQMasked512Merging dst x mask)
2052 (VPBLENDMQMasked512 dst (VCVTTPD2UDQ256 x) mask) => (VCVTTPD2UDQMasked256Merging dst x mask)
2053 (VPBLENDMQMasked512 dst (VCVTTPD2UQQ512 x) mask) => (VCVTTPD2UQQMasked512Merging dst x mask)
2054 (VPBLENDMQMasked512 dst (VCVTUQQ2PD512 x) mask) => (VCVTUQQ2PDMasked512Merging dst x mask)
2055 (VPBLENDMQMasked512 dst (VCVTUQQ2PS256 x) mask) => (VCVTUQQ2PSMasked256Merging dst x mask)
2056 (VPBLENDMQMasked512 dst (VDIVPD512 x y) mask) => (VDIVPDMasked512Merging dst x y mask)
2057 (VPBLENDMQMasked512 dst (VMAXPD512 x y) mask) => (VMAXPDMasked512Merging dst x y mask)
2058 (VPBLENDMQMasked512 dst (VMINPD512 x y) mask) => (VMINPDMasked512Merging dst x y mask)
2059 (VPBLENDMQMasked512 dst (VMULPD512 x y) mask) => (VMULPDMasked512Merging dst x y mask)
2060 (VPBLENDMQMasked512 dst (VPABSQ512 x) mask) => (VPABSQMasked512Merging dst x mask)
2061 (VPBLENDMQMasked512 dst (VPADDQ512 x y) mask) => (VPADDQMasked512Merging dst x y mask)
2062 (VPBLENDMQMasked512 dst (VPANDQ512 x y) mask) => (VPANDQMasked512Merging dst x y mask)
2063 (VPBLENDMQMasked512 dst (VPLZCNTQ512 x) mask) => (VPLZCNTQMasked512Merging dst x mask)
2064 (VPBLENDMQMasked512 dst (VPMAXSQ512 x y) mask) => (VPMAXSQMasked512Merging dst x y mask)
2065 (VPBLENDMQMasked512 dst (VPMAXUQ512 x y) mask) => (VPMAXUQMasked512Merging dst x y mask)
2066 (VPBLENDMQMasked512 dst (VPMINSQ512 x y) mask) => (VPMINSQMasked512Merging dst x y mask)
2067 (VPBLENDMQMasked512 dst (VPMINUQ512 x y) mask) => (VPMINUQMasked512Merging dst x y mask)
2068 (VPBLENDMQMasked512 dst (VPMOVQB128_512 x) mask) => (VPMOVQBMasked128_512Merging dst x mask)
2069 (VPBLENDMQMasked512 dst (VPMOVQD256 x) mask) => (VPMOVQDMasked256Merging dst x mask)
2070 (VPBLENDMQMasked512 dst (VPMOVQW128_512 x) mask) => (VPMOVQWMasked128_512Merging dst x mask)
2071 (VPBLENDMQMasked512 dst (VPMOVSQB128_512 x) mask) => (VPMOVSQBMasked128_512Merging dst x mask)
2072 (VPBLENDMQMasked512 dst (VPMOVSQD256 x) mask) => (VPMOVSQDMasked256Merging dst x mask)
2073 (VPBLENDMQMasked512 dst (VPMOVSQW128_512 x) mask) => (VPMOVSQWMasked128_512Merging dst x mask)
2074 (VPBLENDMQMasked512 dst (VPMOVUSQD256 x) mask) => (VPMOVUSQDMasked256Merging dst x mask)
2075 (VPBLENDMQMasked512 dst (VPMOVUSQW128_512 x) mask) => (VPMOVUSQWMasked128_512Merging dst x mask)
2076 (VPBLENDMQMasked512 dst (VPMULLQ512 x y) mask) => (VPMULLQMasked512Merging dst x y mask)
2077 (VPBLENDMQMasked512 dst (VPOPCNTQ512 x) mask) => (VPOPCNTQMasked512Merging dst x mask)
2078 (VPBLENDMQMasked512 dst (VPORQ512 x y) mask) => (VPORQMasked512Merging dst x y mask)
2079 (VPBLENDMQMasked512 dst (VPROLQ512 [a] x) mask) => (VPROLQMasked512Merging dst [a] x mask)
2080 (VPBLENDMQMasked512 dst (VPROLVQ512 x y) mask) => (VPROLVQMasked512Merging dst x y mask)
2081 (VPBLENDMQMasked512 dst (VPRORQ512 [a] x) mask) => (VPRORQMasked512Merging dst [a] x mask)
2082 (VPBLENDMQMasked512 dst (VPRORVQ512 x y) mask) => (VPRORVQMasked512Merging dst x y mask)
2083 (VPBLENDMQMasked512 dst (VPSHLDQ512 [a] x y) mask) => (VPSHLDQMasked512Merging dst [a] x y mask)
2084 (VPBLENDMQMasked512 dst (VPSHRDQ512 [a] x y) mask) => (VPSHRDQMasked512Merging dst [a] x y mask)
2085 (VPBLENDMQMasked512 dst (VPSLLQ512const [a] x) mask) => (VPSLLQMasked512constMerging dst [a] x mask)
2086 (VPBLENDMQMasked512 dst (VPSLLVQ512 x y) mask) => (VPSLLVQMasked512Merging dst x y mask)
2087 (VPBLENDMQMasked512 dst (VPSRAQ512const [a] x) mask) => (VPSRAQMasked512constMerging dst [a] x mask)
2088 (VPBLENDMQMasked512 dst (VPSRAVQ512 x y) mask) => (VPSRAVQMasked512Merging dst x y mask)
2089 (VPBLENDMQMasked512 dst (VPSRLVQ512 x y) mask) => (VPSRLVQMasked512Merging dst x y mask)
2090 (VPBLENDMQMasked512 dst (VPSUBQ512 x y) mask) => (VPSUBQMasked512Merging dst x y mask)
2091 (VPBLENDMQMasked512 dst (VPXORQ512 x y) mask) => (VPXORQMasked512Merging dst x y mask)
2092 (VPBLENDMQMasked512 dst (VRCP14PD512 x) mask) => (VRCP14PDMasked512Merging dst x mask)
2093 (VPBLENDMQMasked512 dst (VREDUCEPD512 [a] x) mask) => (VREDUCEPDMasked512Merging dst [a] x mask)
2094 (VPBLENDMQMasked512 dst (VRNDSCALEPD512 [a] x) mask) => (VRNDSCALEPDMasked512Merging dst [a] x mask)
2095 (VPBLENDMQMasked512 dst (VRSQRT14PD512 x) mask) => (VRSQRT14PDMasked512Merging dst x mask)
2096 (VPBLENDMQMasked512 dst (VSCALEFPD512 x y) mask) => (VSCALEFPDMasked512Merging dst x y mask)
2097 (VPBLENDMQMasked512 dst (VSQRTPD512 x) mask) => (VSQRTPDMasked512Merging dst x mask)
2098 (VPBLENDMQMasked512 dst (VSUBPD512 x y) mask) => (VSUBPDMasked512Merging dst x y mask)
2099 (VPBLENDMWMasked512 dst (VPABSW512 x) mask) => (VPABSWMasked512Merging dst x mask)
2100 (VPBLENDMWMasked512 dst (VPADDSW512 x y) mask) => (VPADDSWMasked512Merging dst x y mask)
2101 (VPBLENDMWMasked512 dst (VPADDUSW512 x y) mask) => (VPADDUSWMasked512Merging dst x y mask)
2102 (VPBLENDMWMasked512 dst (VPADDW512 x y) mask) => (VPADDWMasked512Merging dst x y mask)
2103 (VPBLENDMWMasked512 dst (VPAVGW512 x y) mask) => (VPAVGWMasked512Merging dst x y mask)
2104 (VPBLENDMWMasked512 dst (VPMADDUBSW512 x y) mask) => (VPMADDUBSWMasked512Merging dst x y mask)
2105 (VPBLENDMWMasked512 dst (VPMADDWD512 x y) mask) => (VPMADDWDMasked512Merging dst x y mask)
2106 (VPBLENDMWMasked512 dst (VPMAXSW512 x y) mask) => (VPMAXSWMasked512Merging dst x y mask)
2107 (VPBLENDMWMasked512 dst (VPMAXUW512 x y) mask) => (VPMAXUWMasked512Merging dst x y mask)
2108 (VPBLENDMWMasked512 dst (VPMINSW512 x y) mask) => (VPMINSWMasked512Merging dst x y mask)
2109 (VPBLENDMWMasked512 dst (VPMINUW512 x y) mask) => (VPMINUWMasked512Merging dst x y mask)
2110 (VPBLENDMWMasked512 dst (VPMOVSWB256 x) mask) => (VPMOVSWBMasked256Merging dst x mask)
2111 (VPBLENDMWMasked512 dst (VPMOVUSWB256 x) mask) => (VPMOVUSWBMasked256Merging dst x mask)
2112 (VPBLENDMWMasked512 dst (VPMOVWB256 x) mask) => (VPMOVWBMasked256Merging dst x mask)
2113 (VPBLENDMWMasked512 dst (VPMULHUW512 x y) mask) => (VPMULHUWMasked512Merging dst x y mask)
2114 (VPBLENDMWMasked512 dst (VPMULHW512 x y) mask) => (VPMULHWMasked512Merging dst x y mask)
2115 (VPBLENDMWMasked512 dst (VPMULLW512 x y) mask) => (VPMULLWMasked512Merging dst x y mask)
2116 (VPBLENDMWMasked512 dst (VPOPCNTW512 x) mask) => (VPOPCNTWMasked512Merging dst x mask)
2117 (VPBLENDMWMasked512 dst (VPSHLDW512 [a] x y) mask) => (VPSHLDWMasked512Merging dst [a] x y mask)
2118 (VPBLENDMWMasked512 dst (VPSHRDW512 [a] x y) mask) => (VPSHRDWMasked512Merging dst [a] x y mask)
2119 (VPBLENDMWMasked512 dst (VPSHUFHW512 [a] x) mask) => (VPSHUFHWMasked512Merging dst [a] x mask)
2120 (VPBLENDMWMasked512 dst (VPSHUFLW512 [a] x) mask) => (VPSHUFLWMasked512Merging dst [a] x mask)
2121 (VPBLENDMWMasked512 dst (VPSLLVW512 x y) mask) => (VPSLLVWMasked512Merging dst x y mask)
2122 (VPBLENDMWMasked512 dst (VPSLLW512const [a] x) mask) => (VPSLLWMasked512constMerging dst [a] x mask)
2123 (VPBLENDMWMasked512 dst (VPSRAVW512 x y) mask) => (VPSRAVWMasked512Merging dst x y mask)
2124 (VPBLENDMWMasked512 dst (VPSRAW512const [a] x) mask) => (VPSRAWMasked512constMerging dst [a] x mask)
2125 (VPBLENDMWMasked512 dst (VPSRLVW512 x y) mask) => (VPSRLVWMasked512Merging dst x y mask)
2126 (VPBLENDMWMasked512 dst (VPSUBSW512 x y) mask) => (VPSUBSWMasked512Merging dst x y mask)
2127 (VPBLENDMWMasked512 dst (VPSUBUSW512 x y) mask) => (VPSUBUSWMasked512Merging dst x y mask)
2128 (VPBLENDMWMasked512 dst (VPSUBW512 x y) mask) => (VPSUBWMasked512Merging dst x y mask)
2129 (VPBLENDVB128 dst (VADDPD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VADDPDMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2130 (VPBLENDVB128 dst (VADDPS128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VADDPSMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2131 (VPBLENDVB128 dst (VBROADCASTSD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VBROADCASTSDMasked256Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2132 (VPBLENDVB128 dst (VBROADCASTSD512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VBROADCASTSDMasked512Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2133 (VPBLENDVB128 dst (VBROADCASTSS128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VBROADCASTSSMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2134 (VPBLENDVB128 dst (VBROADCASTSS256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VBROADCASTSSMasked256Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2135 (VPBLENDVB128 dst (VBROADCASTSS512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VBROADCASTSSMasked512Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2136 (VPBLENDVB128 dst (VCVTDQ2PD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTDQ2PDMasked256Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2137 (VPBLENDVB128 dst (VCVTDQ2PS128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTDQ2PSMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2138 (VPBLENDVB128 dst (VCVTPD2PSX128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTPD2PSXMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2139 (VPBLENDVB128 dst (VCVTPS2PD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTPS2PDMasked256Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2140 (VPBLENDVB128 dst (VCVTQQ2PD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTQQ2PDMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2141 (VPBLENDVB128 dst (VCVTQQ2PSX128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTQQ2PSXMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2142 (VPBLENDVB128 dst (VCVTTPD2DQX128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPD2DQXMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2143 (VPBLENDVB128 dst (VCVTTPD2QQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPD2QQMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2144 (VPBLENDVB128 dst (VCVTTPD2UDQX128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPD2UDQXMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2145 (VPBLENDVB128 dst (VCVTTPD2UQQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPD2UQQMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2146 (VPBLENDVB128 dst (VCVTTPS2DQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPS2DQMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2147 (VPBLENDVB128 dst (VCVTTPS2QQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPS2QQMasked256Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2148 (VPBLENDVB128 dst (VCVTTPS2UDQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPS2UDQMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2149 (VPBLENDVB128 dst (VCVTTPS2UQQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPS2UQQMasked256Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2150 (VPBLENDVB128 dst (VCVTUDQ2PD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTUDQ2PDMasked256Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2151 (VPBLENDVB128 dst (VCVTUDQ2PS128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTUDQ2PSMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2152 (VPBLENDVB128 dst (VCVTUQQ2PD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTUQQ2PDMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2153 (VPBLENDVB128 dst (VCVTUQQ2PSX128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTUQQ2PSXMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2154 (VPBLENDVB128 dst (VDIVPD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VDIVPDMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2155 (VPBLENDVB128 dst (VDIVPS128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VDIVPSMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2156 (VPBLENDVB128 dst (VGF2P8MULB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VGF2P8MULBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2157 (VPBLENDVB128 dst (VMAXPD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMAXPDMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2158 (VPBLENDVB128 dst (VMAXPS128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMAXPSMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2159 (VPBLENDVB128 dst (VMINPD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMINPDMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2160 (VPBLENDVB128 dst (VMINPS128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMINPSMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2161 (VPBLENDVB128 dst (VMULPD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMULPDMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2162 (VPBLENDVB128 dst (VMULPS128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMULPSMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2163 (VPBLENDVB128 dst (VPABSB128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPABSBMasked128Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2164 (VPBLENDVB128 dst (VPABSD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPABSDMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2165 (VPBLENDVB128 dst (VPABSQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPABSQMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2166 (VPBLENDVB128 dst (VPABSW128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPABSWMasked128Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2167 (VPBLENDVB128 dst (VPACKSSDW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPACKSSDWMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2168 (VPBLENDVB128 dst (VPACKUSDW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPACKUSDWMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2169 (VPBLENDVB128 dst (VPADDB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2170 (VPBLENDVB128 dst (VPADDD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2171 (VPBLENDVB128 dst (VPADDQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2172 (VPBLENDVB128 dst (VPADDSB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDSBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2173 (VPBLENDVB128 dst (VPADDSW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDSWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2174 (VPBLENDVB128 dst (VPADDUSB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDUSBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2175 (VPBLENDVB128 dst (VPADDUSW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDUSWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2176 (VPBLENDVB128 dst (VPADDW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2177 (VPBLENDVB128 dst (VPALIGNR128 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPALIGNRMasked128Merging dst [a] x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2178 (VPBLENDVB128 dst (VPAVGB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPAVGBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2179 (VPBLENDVB128 dst (VPAVGW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPAVGWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2180 (VPBLENDVB128 dst (VPBROADCASTB128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTBMasked128Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2181 (VPBLENDVB128 dst (VPBROADCASTB256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTBMasked256Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2182 (VPBLENDVB128 dst (VPBROADCASTB512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTBMasked512Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2183 (VPBLENDVB128 dst (VPBROADCASTD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTDMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2184 (VPBLENDVB128 dst (VPBROADCASTD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTDMasked256Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2185 (VPBLENDVB128 dst (VPBROADCASTD512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTDMasked512Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2186 (VPBLENDVB128 dst (VPBROADCASTQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTQMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2187 (VPBLENDVB128 dst (VPBROADCASTQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTQMasked256Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2188 (VPBLENDVB128 dst (VPBROADCASTQ512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTQMasked512Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2189 (VPBLENDVB128 dst (VPBROADCASTW128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTWMasked128Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2190 (VPBLENDVB128 dst (VPBROADCASTW256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTWMasked256Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2191 (VPBLENDVB128 dst (VPBROADCASTW512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPBROADCASTWMasked512Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2192 (VPBLENDVB128 dst (VPLZCNTD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPLZCNTDMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2193 (VPBLENDVB128 dst (VPLZCNTQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPLZCNTQMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2194 (VPBLENDVB128 dst (VPMADDUBSW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMADDUBSWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2195 (VPBLENDVB128 dst (VPMADDWD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMADDWDMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2196 (VPBLENDVB128 dst (VPMAXSB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXSBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2197 (VPBLENDVB128 dst (VPMAXSD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXSDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2198 (VPBLENDVB128 dst (VPMAXSQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXSQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2199 (VPBLENDVB128 dst (VPMAXSW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXSWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2200 (VPBLENDVB128 dst (VPMAXUB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXUBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2201 (VPBLENDVB128 dst (VPMAXUD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXUDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2202 (VPBLENDVB128 dst (VPMAXUQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXUQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2203 (VPBLENDVB128 dst (VPMAXUW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXUWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2204 (VPBLENDVB128 dst (VPMINSB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINSBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2205 (VPBLENDVB128 dst (VPMINSD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINSDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2206 (VPBLENDVB128 dst (VPMINSQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINSQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2207 (VPBLENDVB128 dst (VPMINSW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINSWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2208 (VPBLENDVB128 dst (VPMINUB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINUBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2209 (VPBLENDVB128 dst (VPMINUD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINUDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2210 (VPBLENDVB128 dst (VPMINUQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINUQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2211 (VPBLENDVB128 dst (VPMINUW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINUWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2212 (VPBLENDVB128 dst (VPMOVDB128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVDBMasked128_128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2213 (VPBLENDVB128 dst (VPMOVDW128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVDWMasked128_128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2214 (VPBLENDVB128 dst (VPMOVQB128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVQBMasked128_128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2215 (VPBLENDVB128 dst (VPMOVQD128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVQDMasked128_128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2216 (VPBLENDVB128 dst (VPMOVQW128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVQWMasked128_128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2217 (VPBLENDVB128 dst (VPMOVSDB128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSDBMasked128_128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2218 (VPBLENDVB128 dst (VPMOVSDW128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSDWMasked128_128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2219 (VPBLENDVB128 dst (VPMOVSQB128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSQBMasked128_128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2220 (VPBLENDVB128 dst (VPMOVSQD128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSQDMasked128_128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2221 (VPBLENDVB128 dst (VPMOVSQW128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSQWMasked128_128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2222 (VPBLENDVB128 dst (VPMOVSWB128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSWBMasked128_128Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2223 (VPBLENDVB128 dst (VPMOVSXBD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXBDMasked128Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2224 (VPBLENDVB128 dst (VPMOVSXBD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXBDMasked256Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2225 (VPBLENDVB128 dst (VPMOVSXBD512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXBDMasked512Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2226 (VPBLENDVB128 dst (VPMOVSXBQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXBQMasked128Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2227 (VPBLENDVB128 dst (VPMOVSXBQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXBQMasked256Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2228 (VPBLENDVB128 dst (VPMOVSXBQ512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXBQMasked512Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2229 (VPBLENDVB128 dst (VPMOVSXBW128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXBWMasked128Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2230 (VPBLENDVB128 dst (VPMOVSXBW256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXBWMasked256Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2231 (VPBLENDVB128 dst (VPMOVSXDQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXDQMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2232 (VPBLENDVB128 dst (VPMOVSXDQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXDQMasked256Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2233 (VPBLENDVB128 dst (VPMOVSXWD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXWDMasked128Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2234 (VPBLENDVB128 dst (VPMOVSXWD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXWDMasked256Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2235 (VPBLENDVB128 dst (VPMOVSXWQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXWQMasked128Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2236 (VPBLENDVB128 dst (VPMOVSXWQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXWQMasked256Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2237 (VPBLENDVB128 dst (VPMOVSXWQ512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXWQMasked512Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2238 (VPBLENDVB128 dst (VPMOVUSDW128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVUSDWMasked128_128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2239 (VPBLENDVB128 dst (VPMOVUSQD128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVUSQDMasked128_128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2240 (VPBLENDVB128 dst (VPMOVUSQW128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVUSQWMasked128_128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2241 (VPBLENDVB128 dst (VPMOVWB128_128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVWBMasked128_128Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2242 (VPBLENDVB128 dst (VPMOVZXBD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXBDMasked128Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2243 (VPBLENDVB128 dst (VPMOVZXBD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXBDMasked256Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2244 (VPBLENDVB128 dst (VPMOVZXBD512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXBDMasked512Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2245 (VPBLENDVB128 dst (VPMOVZXBQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXBQMasked128Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2246 (VPBLENDVB128 dst (VPMOVZXBQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXBQMasked256Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2247 (VPBLENDVB128 dst (VPMOVZXBQ512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXBQMasked512Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2248 (VPBLENDVB128 dst (VPMOVZXBW128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXBWMasked128Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2249 (VPBLENDVB128 dst (VPMOVZXBW256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXBWMasked256Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2250 (VPBLENDVB128 dst (VPMOVZXDQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXDQMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2251 (VPBLENDVB128 dst (VPMOVZXDQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXDQMasked256Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2252 (VPBLENDVB128 dst (VPMOVZXWD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXWDMasked128Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2253 (VPBLENDVB128 dst (VPMOVZXWD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXWDMasked256Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2254 (VPBLENDVB128 dst (VPMOVZXWQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXWQMasked128Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2255 (VPBLENDVB128 dst (VPMOVZXWQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXWQMasked256Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2256 (VPBLENDVB128 dst (VPMOVZXWQ512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXWQMasked512Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2257 (VPBLENDVB128 dst (VPMULHUW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULHUWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2258 (VPBLENDVB128 dst (VPMULHW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULHWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2259 (VPBLENDVB128 dst (VPMULLD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULLDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2260 (VPBLENDVB128 dst (VPMULLQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULLQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2261 (VPBLENDVB128 dst (VPMULLW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULLWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2262 (VPBLENDVB128 dst (VPOPCNTB128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPOPCNTBMasked128Merging dst x (VPMOVVec8x16ToM <types.TypeMask> mask))
2263 (VPBLENDVB128 dst (VPOPCNTD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPOPCNTDMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2264 (VPBLENDVB128 dst (VPOPCNTQ128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPOPCNTQMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2265 (VPBLENDVB128 dst (VPOPCNTW128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPOPCNTWMasked128Merging dst x (VPMOVVec16x8ToM <types.TypeMask> mask))
2266 (VPBLENDVB128 dst (VPROLD128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPROLDMasked128Merging dst [a] x (VPMOVVec32x4ToM <types.TypeMask> mask))
2267 (VPBLENDVB128 dst (VPROLQ128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPROLQMasked128Merging dst [a] x (VPMOVVec64x2ToM <types.TypeMask> mask))
2268 (VPBLENDVB128 dst (VPROLVD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPROLVDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2269 (VPBLENDVB128 dst (VPROLVQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPROLVQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2270 (VPBLENDVB128 dst (VPRORD128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPRORDMasked128Merging dst [a] x (VPMOVVec32x4ToM <types.TypeMask> mask))
2271 (VPBLENDVB128 dst (VPRORQ128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPRORQMasked128Merging dst [a] x (VPMOVVec64x2ToM <types.TypeMask> mask))
2272 (VPBLENDVB128 dst (VPRORVD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPRORVDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2273 (VPBLENDVB128 dst (VPRORVQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPRORVQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2274 (VPBLENDVB128 dst (VPSHLDD128 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHLDDMasked128Merging dst [a] x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2275 (VPBLENDVB128 dst (VPSHLDQ128 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHLDQMasked128Merging dst [a] x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2276 (VPBLENDVB128 dst (VPSHLDW128 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHLDWMasked128Merging dst [a] x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2277 (VPBLENDVB128 dst (VPSHRDD128 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHRDDMasked128Merging dst [a] x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2278 (VPBLENDVB128 dst (VPSHRDQ128 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHRDQMasked128Merging dst [a] x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2279 (VPBLENDVB128 dst (VPSHRDW128 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHRDWMasked128Merging dst [a] x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2280 (VPBLENDVB128 dst (VPSHUFB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHUFBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2281 (VPBLENDVB128 dst (VPSHUFD128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHUFDMasked128Merging dst [a] x (VPMOVVec32x4ToM <types.TypeMask> mask))
2282 (VPBLENDVB128 dst (VPSHUFHW128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHUFHWMasked128Merging dst [a] x (VPMOVVec16x8ToM <types.TypeMask> mask))
2283 (VPBLENDVB128 dst (VPSHUFLW128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHUFLWMasked128Merging dst [a] x (VPMOVVec16x8ToM <types.TypeMask> mask))
2284 (VPBLENDVB128 dst (VPSLLD128const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLDMasked128constMerging dst [a] x (VPMOVVec32x4ToM <types.TypeMask> mask))
2285 (VPBLENDVB128 dst (VPSLLQ128const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLQMasked128constMerging dst [a] x (VPMOVVec64x2ToM <types.TypeMask> mask))
2286 (VPBLENDVB128 dst (VPSLLVD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLVDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2287 (VPBLENDVB128 dst (VPSLLVQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLVQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2288 (VPBLENDVB128 dst (VPSLLVW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLVWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2289 (VPBLENDVB128 dst (VPSLLW128const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLWMasked128constMerging dst [a] x (VPMOVVec16x8ToM <types.TypeMask> mask))
2290 (VPBLENDVB128 dst (VPSRAD128const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRADMasked128constMerging dst [a] x (VPMOVVec32x4ToM <types.TypeMask> mask))
2291 (VPBLENDVB128 dst (VPSRAQ128const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAQMasked128constMerging dst [a] x (VPMOVVec64x2ToM <types.TypeMask> mask))
2292 (VPBLENDVB128 dst (VPSRAVD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAVDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2293 (VPBLENDVB128 dst (VPSRAVQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAVQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2294 (VPBLENDVB128 dst (VPSRAVW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAVWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2295 (VPBLENDVB128 dst (VPSRAW128const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAWMasked128constMerging dst [a] x (VPMOVVec16x8ToM <types.TypeMask> mask))
2296 (VPBLENDVB128 dst (VPSRLVD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRLVDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2297 (VPBLENDVB128 dst (VPSRLVQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRLVQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2298 (VPBLENDVB128 dst (VPSRLVW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRLVWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2299 (VPBLENDVB128 dst (VPSUBB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2300 (VPBLENDVB128 dst (VPSUBD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBDMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2301 (VPBLENDVB128 dst (VPSUBQ128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBQMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2302 (VPBLENDVB128 dst (VPSUBSB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBSBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2303 (VPBLENDVB128 dst (VPSUBSW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBSWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2304 (VPBLENDVB128 dst (VPSUBUSB128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBUSBMasked128Merging dst x y (VPMOVVec8x16ToM <types.TypeMask> mask))
2305 (VPBLENDVB128 dst (VPSUBUSW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBUSWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2306 (VPBLENDVB128 dst (VPSUBW128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBWMasked128Merging dst x y (VPMOVVec16x8ToM <types.TypeMask> mask))
2307 (VPBLENDVB128 dst (VRCP14PD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VRCP14PDMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2308 (VPBLENDVB128 dst (VREDUCEPD128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VREDUCEPDMasked128Merging dst [a] x (VPMOVVec64x2ToM <types.TypeMask> mask))
2309 (VPBLENDVB128 dst (VREDUCEPS128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VREDUCEPSMasked128Merging dst [a] x (VPMOVVec32x4ToM <types.TypeMask> mask))
2310 (VPBLENDVB128 dst (VRNDSCALEPD128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VRNDSCALEPDMasked128Merging dst [a] x (VPMOVVec64x2ToM <types.TypeMask> mask))
2311 (VPBLENDVB128 dst (VRNDSCALEPS128 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VRNDSCALEPSMasked128Merging dst [a] x (VPMOVVec32x4ToM <types.TypeMask> mask))
2312 (VPBLENDVB128 dst (VRSQRT14PD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VRSQRT14PDMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2313 (VPBLENDVB128 dst (VSCALEFPD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSCALEFPDMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2314 (VPBLENDVB128 dst (VSCALEFPS128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSCALEFPSMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2315 (VPBLENDVB128 dst (VSQRTPD128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSQRTPDMasked128Merging dst x (VPMOVVec64x2ToM <types.TypeMask> mask))
2316 (VPBLENDVB128 dst (VSQRTPS128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSQRTPSMasked128Merging dst x (VPMOVVec32x4ToM <types.TypeMask> mask))
2317 (VPBLENDVB128 dst (VSUBPD128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSUBPDMasked128Merging dst x y (VPMOVVec64x2ToM <types.TypeMask> mask))
2318 (VPBLENDVB128 dst (VSUBPS128 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSUBPSMasked128Merging dst x y (VPMOVVec32x4ToM <types.TypeMask> mask))
2319 (VPBLENDVB256 dst (VADDPD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VADDPDMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2320 (VPBLENDVB256 dst (VADDPS256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VADDPSMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2321 (VPBLENDVB256 dst (VCVTDQ2PD512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTDQ2PDMasked512Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2322 (VPBLENDVB256 dst (VCVTDQ2PS256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTDQ2PSMasked256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2323 (VPBLENDVB256 dst (VCVTPD2PSY128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTPD2PSYMasked128Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2324 (VPBLENDVB256 dst (VCVTPS2PD512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTPS2PDMasked512Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2325 (VPBLENDVB256 dst (VCVTQQ2PD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTQQ2PDMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2326 (VPBLENDVB256 dst (VCVTQQ2PSY128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTQQ2PSYMasked128Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2327 (VPBLENDVB256 dst (VCVTTPD2DQY128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPD2DQYMasked128Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2328 (VPBLENDVB256 dst (VCVTTPD2QQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPD2QQMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2329 (VPBLENDVB256 dst (VCVTTPD2UDQY128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPD2UDQYMasked128Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2330 (VPBLENDVB256 dst (VCVTTPD2UQQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPD2UQQMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2331 (VPBLENDVB256 dst (VCVTTPS2DQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPS2DQMasked256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2332 (VPBLENDVB256 dst (VCVTTPS2QQ512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPS2QQMasked512Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2333 (VPBLENDVB256 dst (VCVTTPS2UDQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPS2UDQMasked256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2334 (VPBLENDVB256 dst (VCVTTPS2UQQ512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTTPS2UQQMasked512Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2335 (VPBLENDVB256 dst (VCVTUDQ2PD512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTUDQ2PDMasked512Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2336 (VPBLENDVB256 dst (VCVTUDQ2PS256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTUDQ2PSMasked256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2337 (VPBLENDVB256 dst (VCVTUQQ2PD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTUQQ2PDMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2338 (VPBLENDVB256 dst (VCVTUQQ2PSY128 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VCVTUQQ2PSYMasked128Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2339 (VPBLENDVB256 dst (VDIVPD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VDIVPDMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2340 (VPBLENDVB256 dst (VDIVPS256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VDIVPSMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2341 (VPBLENDVB256 dst (VGF2P8MULB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VGF2P8MULBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2342 (VPBLENDVB256 dst (VMAXPD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMAXPDMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2343 (VPBLENDVB256 dst (VMAXPS256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMAXPSMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2344 (VPBLENDVB256 dst (VMINPD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMINPDMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2345 (VPBLENDVB256 dst (VMINPS256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMINPSMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2346 (VPBLENDVB256 dst (VMULPD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMULPDMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2347 (VPBLENDVB256 dst (VMULPS256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VMULPSMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2348 (VPBLENDVB256 dst (VPABSB256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPABSBMasked256Merging dst x (VPMOVVec8x32ToM <types.TypeMask> mask))
2349 (VPBLENDVB256 dst (VPABSD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPABSDMasked256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2350 (VPBLENDVB256 dst (VPABSQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPABSQMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2351 (VPBLENDVB256 dst (VPABSW256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPABSWMasked256Merging dst x (VPMOVVec16x16ToM <types.TypeMask> mask))
2352 (VPBLENDVB256 dst (VPACKSSDW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPACKSSDWMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2353 (VPBLENDVB256 dst (VPACKUSDW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPACKUSDWMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2354 (VPBLENDVB256 dst (VPADDB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2355 (VPBLENDVB256 dst (VPADDD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2356 (VPBLENDVB256 dst (VPADDQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2357 (VPBLENDVB256 dst (VPADDSB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDSBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2358 (VPBLENDVB256 dst (VPADDSW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDSWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2359 (VPBLENDVB256 dst (VPADDUSB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDUSBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2360 (VPBLENDVB256 dst (VPADDUSW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDUSWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2361 (VPBLENDVB256 dst (VPADDW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPADDWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2362 (VPBLENDVB256 dst (VPALIGNR256 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPALIGNRMasked256Merging dst [a] x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2363 (VPBLENDVB256 dst (VPAVGB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPAVGBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2364 (VPBLENDVB256 dst (VPAVGW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPAVGWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2365 (VPBLENDVB256 dst (VPLZCNTD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPLZCNTDMasked256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2366 (VPBLENDVB256 dst (VPLZCNTQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPLZCNTQMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2367 (VPBLENDVB256 dst (VPMADDUBSW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMADDUBSWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2368 (VPBLENDVB256 dst (VPMADDWD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMADDWDMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2369 (VPBLENDVB256 dst (VPMAXSB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXSBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2370 (VPBLENDVB256 dst (VPMAXSD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXSDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2371 (VPBLENDVB256 dst (VPMAXSQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXSQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2372 (VPBLENDVB256 dst (VPMAXSW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXSWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2373 (VPBLENDVB256 dst (VPMAXUB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXUBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2374 (VPBLENDVB256 dst (VPMAXUD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXUDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2375 (VPBLENDVB256 dst (VPMAXUQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXUQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2376 (VPBLENDVB256 dst (VPMAXUW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMAXUWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2377 (VPBLENDVB256 dst (VPMINSB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINSBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2378 (VPBLENDVB256 dst (VPMINSD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINSDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2379 (VPBLENDVB256 dst (VPMINSQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINSQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2380 (VPBLENDVB256 dst (VPMINSW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINSWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2381 (VPBLENDVB256 dst (VPMINUB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINUBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2382 (VPBLENDVB256 dst (VPMINUD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINUDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2383 (VPBLENDVB256 dst (VPMINUQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINUQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2384 (VPBLENDVB256 dst (VPMINUW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMINUWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2385 (VPBLENDVB256 dst (VPMOVDB128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVDBMasked128_256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2386 (VPBLENDVB256 dst (VPMOVDW128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVDWMasked128_256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2387 (VPBLENDVB256 dst (VPMOVQB128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVQBMasked128_256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2388 (VPBLENDVB256 dst (VPMOVQD128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVQDMasked128_256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2389 (VPBLENDVB256 dst (VPMOVQW128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVQWMasked128_256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2390 (VPBLENDVB256 dst (VPMOVSDB128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSDBMasked128_256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2391 (VPBLENDVB256 dst (VPMOVSDW128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSDWMasked128_256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2392 (VPBLENDVB256 dst (VPMOVSQB128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSQBMasked128_256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2393 (VPBLENDVB256 dst (VPMOVSQD128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSQDMasked128_256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2394 (VPBLENDVB256 dst (VPMOVSQW128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSQWMasked128_256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2395 (VPBLENDVB256 dst (VPMOVSWB128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSWBMasked128_256Merging dst x (VPMOVVec16x16ToM <types.TypeMask> mask))
2396 (VPBLENDVB256 dst (VPMOVSXBW512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXBWMasked512Merging dst x (VPMOVVec8x32ToM <types.TypeMask> mask))
2397 (VPBLENDVB256 dst (VPMOVSXDQ512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXDQMasked512Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2398 (VPBLENDVB256 dst (VPMOVSXWD512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVSXWDMasked512Merging dst x (VPMOVVec16x16ToM <types.TypeMask> mask))
2399 (VPBLENDVB256 dst (VPMOVUSDW128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVUSDWMasked128_256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2400 (VPBLENDVB256 dst (VPMOVUSQD128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVUSQDMasked128_256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2401 (VPBLENDVB256 dst (VPMOVUSQW128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVUSQWMasked128_256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2402 (VPBLENDVB256 dst (VPMOVWB128_256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVWBMasked128_256Merging dst x (VPMOVVec16x16ToM <types.TypeMask> mask))
2403 (VPBLENDVB256 dst (VPMOVZXBW512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXBWMasked512Merging dst x (VPMOVVec8x32ToM <types.TypeMask> mask))
2404 (VPBLENDVB256 dst (VPMOVZXDQ512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXDQMasked512Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2405 (VPBLENDVB256 dst (VPMOVZXWD512 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMOVZXWDMasked512Merging dst x (VPMOVVec16x16ToM <types.TypeMask> mask))
2406 (VPBLENDVB256 dst (VPMULHUW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULHUWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2407 (VPBLENDVB256 dst (VPMULHW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULHWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2408 (VPBLENDVB256 dst (VPMULLD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULLDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2409 (VPBLENDVB256 dst (VPMULLQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULLQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2410 (VPBLENDVB256 dst (VPMULLW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPMULLWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2411 (VPBLENDVB256 dst (VPOPCNTB256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPOPCNTBMasked256Merging dst x (VPMOVVec8x32ToM <types.TypeMask> mask))
2412 (VPBLENDVB256 dst (VPOPCNTD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPOPCNTDMasked256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2413 (VPBLENDVB256 dst (VPOPCNTQ256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPOPCNTQMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2414 (VPBLENDVB256 dst (VPOPCNTW256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPOPCNTWMasked256Merging dst x (VPMOVVec16x16ToM <types.TypeMask> mask))
2415 (VPBLENDVB256 dst (VPROLD256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPROLDMasked256Merging dst [a] x (VPMOVVec32x8ToM <types.TypeMask> mask))
2416 (VPBLENDVB256 dst (VPROLQ256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPROLQMasked256Merging dst [a] x (VPMOVVec64x4ToM <types.TypeMask> mask))
2417 (VPBLENDVB256 dst (VPROLVD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPROLVDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2418 (VPBLENDVB256 dst (VPROLVQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPROLVQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2419 (VPBLENDVB256 dst (VPRORD256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPRORDMasked256Merging dst [a] x (VPMOVVec32x8ToM <types.TypeMask> mask))
2420 (VPBLENDVB256 dst (VPRORQ256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPRORQMasked256Merging dst [a] x (VPMOVVec64x4ToM <types.TypeMask> mask))
2421 (VPBLENDVB256 dst (VPRORVD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPRORVDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2422 (VPBLENDVB256 dst (VPRORVQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPRORVQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2423 (VPBLENDVB256 dst (VPSHLDD256 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHLDDMasked256Merging dst [a] x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2424 (VPBLENDVB256 dst (VPSHLDQ256 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHLDQMasked256Merging dst [a] x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2425 (VPBLENDVB256 dst (VPSHLDW256 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHLDWMasked256Merging dst [a] x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2426 (VPBLENDVB256 dst (VPSHRDD256 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHRDDMasked256Merging dst [a] x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2427 (VPBLENDVB256 dst (VPSHRDQ256 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHRDQMasked256Merging dst [a] x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2428 (VPBLENDVB256 dst (VPSHRDW256 [a] x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHRDWMasked256Merging dst [a] x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2429 (VPBLENDVB256 dst (VPSHUFB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHUFBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2430 (VPBLENDVB256 dst (VPSHUFD256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHUFDMasked256Merging dst [a] x (VPMOVVec32x8ToM <types.TypeMask> mask))
2431 (VPBLENDVB256 dst (VPSHUFHW256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHUFHWMasked256Merging dst [a] x (VPMOVVec16x16ToM <types.TypeMask> mask))
2432 (VPBLENDVB256 dst (VPSHUFLW256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSHUFLWMasked256Merging dst [a] x (VPMOVVec16x16ToM <types.TypeMask> mask))
2433 (VPBLENDVB256 dst (VPSLLD256const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLDMasked256constMerging dst [a] x (VPMOVVec32x8ToM <types.TypeMask> mask))
2434 (VPBLENDVB256 dst (VPSLLQ256const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLQMasked256constMerging dst [a] x (VPMOVVec64x4ToM <types.TypeMask> mask))
2435 (VPBLENDVB256 dst (VPSLLVD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLVDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2436 (VPBLENDVB256 dst (VPSLLVQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLVQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2437 (VPBLENDVB256 dst (VPSLLVW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLVWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2438 (VPBLENDVB256 dst (VPSLLW256const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSLLWMasked256constMerging dst [a] x (VPMOVVec16x16ToM <types.TypeMask> mask))
2439 (VPBLENDVB256 dst (VPSRAD256const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRADMasked256constMerging dst [a] x (VPMOVVec32x8ToM <types.TypeMask> mask))
2440 (VPBLENDVB256 dst (VPSRAQ256const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAQMasked256constMerging dst [a] x (VPMOVVec64x4ToM <types.TypeMask> mask))
2441 (VPBLENDVB256 dst (VPSRAVD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAVDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2442 (VPBLENDVB256 dst (VPSRAVQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAVQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2443 (VPBLENDVB256 dst (VPSRAVW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAVWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2444 (VPBLENDVB256 dst (VPSRAW256const [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRAWMasked256constMerging dst [a] x (VPMOVVec16x16ToM <types.TypeMask> mask))
2445 (VPBLENDVB256 dst (VPSRLVD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRLVDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2446 (VPBLENDVB256 dst (VPSRLVQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRLVQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2447 (VPBLENDVB256 dst (VPSRLVW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSRLVWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2448 (VPBLENDVB256 dst (VPSUBB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2449 (VPBLENDVB256 dst (VPSUBD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBDMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2450 (VPBLENDVB256 dst (VPSUBQ256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBQMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2451 (VPBLENDVB256 dst (VPSUBSB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBSBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2452 (VPBLENDVB256 dst (VPSUBSW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBSWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2453 (VPBLENDVB256 dst (VPSUBUSB256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBUSBMasked256Merging dst x y (VPMOVVec8x32ToM <types.TypeMask> mask))
2454 (VPBLENDVB256 dst (VPSUBUSW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBUSWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2455 (VPBLENDVB256 dst (VPSUBW256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VPSUBWMasked256Merging dst x y (VPMOVVec16x16ToM <types.TypeMask> mask))
2456 (VPBLENDVB256 dst (VRCP14PD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VRCP14PDMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2457 (VPBLENDVB256 dst (VREDUCEPD256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VREDUCEPDMasked256Merging dst [a] x (VPMOVVec64x4ToM <types.TypeMask> mask))
2458 (VPBLENDVB256 dst (VREDUCEPS256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VREDUCEPSMasked256Merging dst [a] x (VPMOVVec32x8ToM <types.TypeMask> mask))
2459 (VPBLENDVB256 dst (VRNDSCALEPD256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VRNDSCALEPDMasked256Merging dst [a] x (VPMOVVec64x4ToM <types.TypeMask> mask))
2460 (VPBLENDVB256 dst (VRNDSCALEPS256 [a] x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VRNDSCALEPSMasked256Merging dst [a] x (VPMOVVec32x8ToM <types.TypeMask> mask))
2461 (VPBLENDVB256 dst (VRSQRT14PD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VRSQRT14PDMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2462 (VPBLENDVB256 dst (VSCALEFPD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSCALEFPDMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2463 (VPBLENDVB256 dst (VSCALEFPS256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSCALEFPSMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2464 (VPBLENDVB256 dst (VSQRTPD256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSQRTPDMasked256Merging dst x (VPMOVVec64x4ToM <types.TypeMask> mask))
2465 (VPBLENDVB256 dst (VSQRTPS256 x) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSQRTPSMasked256Merging dst x (VPMOVVec32x8ToM <types.TypeMask> mask))
2466 (VPBLENDVB256 dst (VSUBPD256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSUBPDMasked256Merging dst x y (VPMOVVec64x4ToM <types.TypeMask> mask))
2467 (VPBLENDVB256 dst (VSUBPS256 x y) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (VSUBPSMasked256Merging dst x y (VPMOVVec32x8ToM <types.TypeMask> mask))
2468 (VPABSD512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPABSD512load {sym} [off] ptr mem)
2469 (VPABSQ128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPABSQ128load {sym} [off] ptr mem)
2470 (VPABSQ256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPABSQ256load {sym} [off] ptr mem)
2471 (VPABSQ512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPABSQ512load {sym} [off] ptr mem)
2472 (VPABSDMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPABSDMasked128load {sym} [off] ptr mask mem)
2473 (VPABSDMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPABSDMasked256load {sym} [off] ptr mask mem)
2474 (VPABSDMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPABSDMasked512load {sym} [off] ptr mask mem)
2475 (VPABSQMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPABSQMasked128load {sym} [off] ptr mask mem)
2476 (VPABSQMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPABSQMasked256load {sym} [off] ptr mask mem)
2477 (VPABSQMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPABSQMasked512load {sym} [off] ptr mask mem)
2478 (VADDPS512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VADDPS512load {sym} [off] x ptr mem)
2479 (VADDPD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VADDPD512load {sym} [off] x ptr mem)
2480 (VPADDD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPADDD512load {sym} [off] x ptr mem)
2481 (VPADDQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPADDQ512load {sym} [off] x ptr mem)
2482 (VPDPWSSD512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPDPWSSD512load {sym} [off] x y ptr mem)
2483 (VPDPWSSDMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPWSSDMasked128load {sym} [off] x y ptr mask mem)
2484 (VPDPWSSDMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPWSSDMasked256load {sym} [off] x y ptr mask mem)
2485 (VPDPWSSDMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPWSSDMasked512load {sym} [off] x y ptr mask mem)
2486 (VADDPSMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VADDPSMasked128load {sym} [off] x ptr mask mem)
2487 (VADDPSMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VADDPSMasked256load {sym} [off] x ptr mask mem)
2488 (VADDPSMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VADDPSMasked512load {sym} [off] x ptr mask mem)
2489 (VADDPDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VADDPDMasked128load {sym} [off] x ptr mask mem)
2490 (VADDPDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VADDPDMasked256load {sym} [off] x ptr mask mem)
2491 (VADDPDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VADDPDMasked512load {sym} [off] x ptr mask mem)
2492 (VPADDDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPADDDMasked128load {sym} [off] x ptr mask mem)
2493 (VPADDDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPADDDMasked256load {sym} [off] x ptr mask mem)
2494 (VPADDDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPADDDMasked512load {sym} [off] x ptr mask mem)
2495 (VPADDQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPADDQMasked128load {sym} [off] x ptr mask mem)
2496 (VPADDQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPADDQMasked256load {sym} [off] x ptr mask mem)
2497 (VPADDQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPADDQMasked512load {sym} [off] x ptr mask mem)
2498 (VPANDD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPANDD512load {sym} [off] x ptr mem)
2499 (VPANDQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPANDQ512load {sym} [off] x ptr mem)
2500 (VPANDDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDDMasked128load {sym} [off] x ptr mask mem)
2501 (VPANDDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDDMasked256load {sym} [off] x ptr mask mem)
2502 (VPANDDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDDMasked512load {sym} [off] x ptr mask mem)
2503 (VPANDQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDQMasked128load {sym} [off] x ptr mask mem)
2504 (VPANDQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDQMasked256load {sym} [off] x ptr mask mem)
2505 (VPANDQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDQMasked512load {sym} [off] x ptr mask mem)
2506 (VPANDND512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPANDND512load {sym} [off] x ptr mem)
2507 (VPANDNQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPANDNQ512load {sym} [off] x ptr mem)
2508 (VPANDNDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDNDMasked128load {sym} [off] x ptr mask mem)
2509 (VPANDNDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDNDMasked256load {sym} [off] x ptr mask mem)
2510 (VPANDNDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDNDMasked512load {sym} [off] x ptr mask mem)
2511 (VPANDNQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDNQMasked128load {sym} [off] x ptr mask mem)
2512 (VPANDNQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDNQMasked256load {sym} [off] x ptr mask mem)
2513 (VPANDNQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDNQMasked512load {sym} [off] x ptr mask mem)
2514 (VRNDSCALEPS128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPS128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2515 (VRNDSCALEPS256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPS256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2516 (VRNDSCALEPS512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPS512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2517 (VRNDSCALEPD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2518 (VRNDSCALEPD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2519 (VRNDSCALEPD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2520 (VRNDSCALEPSMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPSMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2521 (VRNDSCALEPSMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPSMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2522 (VRNDSCALEPSMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPSMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2523 (VRNDSCALEPDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2524 (VRNDSCALEPDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2525 (VRNDSCALEPDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2526 (VREDUCEPS128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPS128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2527 (VREDUCEPS256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPS256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2528 (VREDUCEPS512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPS512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2529 (VREDUCEPD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2530 (VREDUCEPD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2531 (VREDUCEPD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2532 (VREDUCEPSMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPSMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2533 (VREDUCEPSMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPSMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2534 (VREDUCEPSMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPSMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2535 (VREDUCEPDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2536 (VREDUCEPDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2537 (VREDUCEPDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2538 (VPERMI2PS128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PS128load {sym} [off] x y ptr mem)
2539 (VPERMI2D128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2D128load {sym} [off] x y ptr mem)
2540 (VPERMI2PS256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PS256load {sym} [off] x y ptr mem)
2541 (VPERMI2D256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2D256load {sym} [off] x y ptr mem)
2542 (VPERMI2PS512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PS512load {sym} [off] x y ptr mem)
2543 (VPERMI2D512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2D512load {sym} [off] x y ptr mem)
2544 (VPERMI2PD128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PD128load {sym} [off] x y ptr mem)
2545 (VPERMI2Q128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2Q128load {sym} [off] x y ptr mem)
2546 (VPERMI2PD256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PD256load {sym} [off] x y ptr mem)
2547 (VPERMI2Q256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2Q256load {sym} [off] x y ptr mem)
2548 (VPERMI2PD512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PD512load {sym} [off] x y ptr mem)
2549 (VPERMI2Q512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2Q512load {sym} [off] x y ptr mem)
2550 (VPERMI2PSMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PSMasked128load {sym} [off] x y ptr mask mem)
2551 (VPERMI2DMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2DMasked128load {sym} [off] x y ptr mask mem)
2552 (VPERMI2PSMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PSMasked256load {sym} [off] x y ptr mask mem)
2553 (VPERMI2DMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2DMasked256load {sym} [off] x y ptr mask mem)
2554 (VPERMI2PSMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PSMasked512load {sym} [off] x y ptr mask mem)
2555 (VPERMI2DMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2DMasked512load {sym} [off] x y ptr mask mem)
2556 (VPERMI2PDMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PDMasked128load {sym} [off] x y ptr mask mem)
2557 (VPERMI2QMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2QMasked128load {sym} [off] x y ptr mask mem)
2558 (VPERMI2PDMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PDMasked256load {sym} [off] x y ptr mask mem)
2559 (VPERMI2QMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2QMasked256load {sym} [off] x y ptr mask mem)
2560 (VPERMI2PDMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PDMasked512load {sym} [off] x y ptr mask mem)
2561 (VPERMI2QMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMI2QMasked512load {sym} [off] x y ptr mask mem)
2562 (VCVTPD2PS256 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTPD2PS256load {sym} [off] ptr mem)
2563 (VCVTDQ2PS512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTDQ2PS512load {sym} [off] ptr mem)
2564 (VCVTQQ2PSX128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PSX128load {sym} [off] ptr mem)
2565 (VCVTQQ2PSY128 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PSY128load {sym} [off] ptr mem)
2566 (VCVTQQ2PS256 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PS256load {sym} [off] ptr mem)
2567 (VCVTUDQ2PS128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PS128load {sym} [off] ptr mem)
2568 (VCVTUDQ2PS256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PS256load {sym} [off] ptr mem)
2569 (VCVTUDQ2PS512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PS512load {sym} [off] ptr mem)
2570 (VCVTUQQ2PSX128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PSX128load {sym} [off] ptr mem)
2571 (VCVTUQQ2PSY128 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PSY128load {sym} [off] ptr mem)
2572 (VCVTUQQ2PS256 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PS256load {sym} [off] ptr mem)
2573 (VCVTPD2PSXMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTPD2PSXMasked128load {sym} [off] ptr mask mem)
2574 (VCVTPD2PSYMasked128 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTPD2PSYMasked128load {sym} [off] ptr mask mem)
2575 (VCVTPD2PSMasked256 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTPD2PSMasked256load {sym} [off] ptr mask mem)
2576 (VCVTDQ2PSMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTDQ2PSMasked128load {sym} [off] ptr mask mem)
2577 (VCVTDQ2PSMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTDQ2PSMasked256load {sym} [off] ptr mask mem)
2578 (VCVTDQ2PSMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTDQ2PSMasked512load {sym} [off] ptr mask mem)
2579 (VCVTQQ2PSXMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PSXMasked128load {sym} [off] ptr mask mem)
2580 (VCVTQQ2PSYMasked128 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PSYMasked128load {sym} [off] ptr mask mem)
2581 (VCVTQQ2PSMasked256 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PSMasked256load {sym} [off] ptr mask mem)
2582 (VCVTUDQ2PSMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PSMasked128load {sym} [off] ptr mask mem)
2583 (VCVTUDQ2PSMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PSMasked256load {sym} [off] ptr mask mem)
2584 (VCVTUDQ2PSMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PSMasked512load {sym} [off] ptr mask mem)
2585 (VCVTUQQ2PSXMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PSXMasked128load {sym} [off] ptr mask mem)
2586 (VCVTUQQ2PSYMasked128 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PSYMasked128load {sym} [off] ptr mask mem)
2587 (VCVTUQQ2PSMasked256 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PSMasked256load {sym} [off] ptr mask mem)
2588 (VCVTPS2PD512 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTPS2PD512load {sym} [off] ptr mem)
2589 (VCVTDQ2PD512 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTDQ2PD512load {sym} [off] ptr mem)
2590 (VCVTQQ2PD128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PD128load {sym} [off] ptr mem)
2591 (VCVTQQ2PD256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PD256load {sym} [off] ptr mem)
2592 (VCVTQQ2PD512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PD512load {sym} [off] ptr mem)
2593 (VCVTUDQ2PD256 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PD256load {sym} [off] ptr mem)
2594 (VCVTUDQ2PD512 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PD512load {sym} [off] ptr mem)
2595 (VCVTUQQ2PD128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PD128load {sym} [off] ptr mem)
2596 (VCVTUQQ2PD256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PD256load {sym} [off] ptr mem)
2597 (VCVTUQQ2PD512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PD512load {sym} [off] ptr mem)
2598 (VCVTPS2PDMasked256 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTPS2PDMasked256load {sym} [off] ptr mask mem)
2599 (VCVTPS2PDMasked512 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTPS2PDMasked512load {sym} [off] ptr mask mem)
2600 (VCVTDQ2PDMasked256 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTDQ2PDMasked256load {sym} [off] ptr mask mem)
2601 (VCVTDQ2PDMasked512 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTDQ2PDMasked512load {sym} [off] ptr mask mem)
2602 (VCVTQQ2PDMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PDMasked128load {sym} [off] ptr mask mem)
2603 (VCVTQQ2PDMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PDMasked256load {sym} [off] ptr mask mem)
2604 (VCVTQQ2PDMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTQQ2PDMasked512load {sym} [off] ptr mask mem)
2605 (VCVTUDQ2PDMasked256 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PDMasked256load {sym} [off] ptr mask mem)
2606 (VCVTUDQ2PDMasked512 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUDQ2PDMasked512load {sym} [off] ptr mask mem)
2607 (VCVTUQQ2PDMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PDMasked128load {sym} [off] ptr mask mem)
2608 (VCVTUQQ2PDMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PDMasked256load {sym} [off] ptr mask mem)
2609 (VCVTUQQ2PDMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTUQQ2PDMasked512load {sym} [off] ptr mask mem)
2610 (VCVTTPS2DQ512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2DQ512load {sym} [off] ptr mem)
2611 (VCVTTPD2DQ256 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2DQ256load {sym} [off] ptr mem)
2612 (VCVTTPS2DQMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2DQMasked128load {sym} [off] ptr mask mem)
2613 (VCVTTPS2DQMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2DQMasked256load {sym} [off] ptr mask mem)
2614 (VCVTTPS2DQMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2DQMasked512load {sym} [off] ptr mask mem)
2615 (VCVTTPD2DQXMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2DQXMasked128load {sym} [off] ptr mask mem)
2616 (VCVTTPD2DQYMasked128 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2DQYMasked128load {sym} [off] ptr mask mem)
2617 (VCVTTPD2DQMasked256 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2DQMasked256load {sym} [off] ptr mask mem)
2618 (VCVTTPS2QQ256 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2QQ256load {sym} [off] ptr mem)
2619 (VCVTTPS2QQ512 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2QQ512load {sym} [off] ptr mem)
2620 (VCVTTPD2QQ128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2QQ128load {sym} [off] ptr mem)
2621 (VCVTTPD2QQ256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2QQ256load {sym} [off] ptr mem)
2622 (VCVTTPD2QQ512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2QQ512load {sym} [off] ptr mem)
2623 (VCVTTPS2QQMasked256 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2QQMasked256load {sym} [off] ptr mask mem)
2624 (VCVTTPS2QQMasked512 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2QQMasked512load {sym} [off] ptr mask mem)
2625 (VCVTTPD2QQMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2QQMasked128load {sym} [off] ptr mask mem)
2626 (VCVTTPD2QQMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2QQMasked256load {sym} [off] ptr mask mem)
2627 (VCVTTPD2QQMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2QQMasked512load {sym} [off] ptr mask mem)
2628 (VCVTTPS2UDQ128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UDQ128load {sym} [off] ptr mem)
2629 (VCVTTPS2UDQ256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UDQ256load {sym} [off] ptr mem)
2630 (VCVTTPS2UDQ512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UDQ512load {sym} [off] ptr mem)
2631 (VCVTTPD2UDQX128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UDQX128load {sym} [off] ptr mem)
2632 (VCVTTPD2UDQY128 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UDQY128load {sym} [off] ptr mem)
2633 (VCVTTPD2UDQ256 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UDQ256load {sym} [off] ptr mem)
2634 (VCVTTPS2UDQMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UDQMasked128load {sym} [off] ptr mask mem)
2635 (VCVTTPS2UDQMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UDQMasked256load {sym} [off] ptr mask mem)
2636 (VCVTTPS2UDQMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UDQMasked512load {sym} [off] ptr mask mem)
2637 (VCVTTPD2UDQXMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UDQXMasked128load {sym} [off] ptr mask mem)
2638 (VCVTTPD2UDQYMasked128 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UDQYMasked128load {sym} [off] ptr mask mem)
2639 (VCVTTPD2UDQMasked256 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UDQMasked256load {sym} [off] ptr mask mem)
2640 (VCVTTPS2UQQ256 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UQQ256load {sym} [off] ptr mem)
2641 (VCVTTPS2UQQ512 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UQQ512load {sym} [off] ptr mem)
2642 (VCVTTPD2UQQ128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UQQ128load {sym} [off] ptr mem)
2643 (VCVTTPD2UQQ256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UQQ256load {sym} [off] ptr mem)
2644 (VCVTTPD2UQQ512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UQQ512load {sym} [off] ptr mem)
2645 (VCVTTPS2UQQMasked256 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UQQMasked256load {sym} [off] ptr mask mem)
2646 (VCVTTPS2UQQMasked512 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPS2UQQMasked512load {sym} [off] ptr mask mem)
2647 (VCVTTPD2UQQMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UQQMasked128load {sym} [off] ptr mask mem)
2648 (VCVTTPD2UQQMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UQQMasked256load {sym} [off] ptr mask mem)
2649 (VCVTTPD2UQQMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCVTTPD2UQQMasked512load {sym} [off] ptr mask mem)
2650 (VDIVPS512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VDIVPS512load {sym} [off] x ptr mem)
2651 (VDIVPD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VDIVPD512load {sym} [off] x ptr mem)
2652 (VDIVPSMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VDIVPSMasked128load {sym} [off] x ptr mask mem)
2653 (VDIVPSMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VDIVPSMasked256load {sym} [off] x ptr mask mem)
2654 (VDIVPSMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VDIVPSMasked512load {sym} [off] x ptr mask mem)
2655 (VDIVPDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VDIVPDMasked128load {sym} [off] x ptr mask mem)
2656 (VDIVPDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VDIVPDMasked256load {sym} [off] x ptr mask mem)
2657 (VDIVPDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VDIVPDMasked512load {sym} [off] x ptr mask mem)
2658 (VPDPBUSD512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPDPBUSD512load {sym} [off] x y ptr mem)
2659 (VPDPBUSDMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPBUSDMasked128load {sym} [off] x y ptr mask mem)
2660 (VPDPBUSDMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPBUSDMasked256load {sym} [off] x y ptr mask mem)
2661 (VPDPBUSDMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPBUSDMasked512load {sym} [off] x y ptr mask mem)
2662 (VPDPBUSDS512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPDPBUSDS512load {sym} [off] x y ptr mem)
2663 (VPDPBUSDSMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPBUSDSMasked128load {sym} [off] x y ptr mask mem)
2664 (VPDPBUSDSMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPBUSDSMasked256load {sym} [off] x y ptr mask mem)
2665 (VPDPBUSDSMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPBUSDSMasked512load {sym} [off] x y ptr mask mem)
2666 (VPCMPEQD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPEQD512load {sym} [off] x ptr mem)
2667 (VPCMPEQQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPEQQ512load {sym} [off] x ptr mem)
2668 (VCMPPS512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCMPPS512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2669 (VCMPPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCMPPD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2670 (VCMPPSMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPSMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2671 (VCMPPSMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPSMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2672 (VCMPPSMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPSMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2673 (VCMPPDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2674 (VCMPPDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2675 (VCMPPDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2676 (VPCMPDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2677 (VPCMPDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2678 (VPCMPDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2679 (VPCMPQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2680 (VPCMPQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2681 (VPCMPQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2682 (VPCMPUDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2683 (VPCMPUDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2684 (VPCMPUDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2685 (VPCMPUQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2686 (VPCMPUQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2687 (VPCMPUQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2688 (VGF2P8AFFINEQB128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQB128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2689 (VGF2P8AFFINEQB256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQB256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2690 (VGF2P8AFFINEQB512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQB512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2691 (VGF2P8AFFINEINVQB128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQB128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2692 (VGF2P8AFFINEINVQB256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQB256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2693 (VGF2P8AFFINEINVQB512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQB512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2694 (VGF2P8AFFINEINVQBMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQBMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2695 (VGF2P8AFFINEINVQBMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQBMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2696 (VGF2P8AFFINEINVQBMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQBMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2697 (VGF2P8AFFINEQBMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQBMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2698 (VGF2P8AFFINEQBMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQBMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2699 (VGF2P8AFFINEQBMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQBMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2700 (VPCMPGTD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPGTD512load {sym} [off] x ptr mem)
2701 (VPCMPGTQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPGTQ512load {sym} [off] x ptr mem)
2702 (VPCMPUD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPUD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2703 (VPCMPUQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2704 (VPCMPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2705 (VPCMPQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2706 (VPUNPCKHDQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPUNPCKHDQ512load {sym} [off] x ptr mem)
2707 (VPUNPCKHQDQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPUNPCKHQDQ512load {sym} [off] x ptr mem)
2708 (VPUNPCKLDQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPUNPCKLDQ512load {sym} [off] x ptr mem)
2709 (VPUNPCKLQDQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPUNPCKLQDQ512load {sym} [off] x ptr mem)
2710 (VPLZCNTD128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTD128load {sym} [off] ptr mem)
2711 (VPLZCNTD256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTD256load {sym} [off] ptr mem)
2712 (VPLZCNTD512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTD512load {sym} [off] ptr mem)
2713 (VPLZCNTQ128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTQ128load {sym} [off] ptr mem)
2714 (VPLZCNTQ256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTQ256load {sym} [off] ptr mem)
2715 (VPLZCNTQ512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTQ512load {sym} [off] ptr mem)
2716 (VPLZCNTDMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTDMasked128load {sym} [off] ptr mask mem)
2717 (VPLZCNTDMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTDMasked256load {sym} [off] ptr mask mem)
2718 (VPLZCNTDMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTDMasked512load {sym} [off] ptr mask mem)
2719 (VPLZCNTQMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTQMasked128load {sym} [off] ptr mask mem)
2720 (VPLZCNTQMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTQMasked256load {sym} [off] ptr mask mem)
2721 (VPLZCNTQMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPLZCNTQMasked512load {sym} [off] ptr mask mem)
2722 (VMAXPS512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VMAXPS512load {sym} [off] x ptr mem)
2723 (VMAXPD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VMAXPD512load {sym} [off] x ptr mem)
2724 (VPMAXSD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMAXSD512load {sym} [off] x ptr mem)
2725 (VPMAXSQ128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMAXSQ128load {sym} [off] x ptr mem)
2726 (VPMAXSQ256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMAXSQ256load {sym} [off] x ptr mem)
2727 (VPMAXSQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMAXSQ512load {sym} [off] x ptr mem)
2728 (VPMAXUD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMAXUD512load {sym} [off] x ptr mem)
2729 (VPMAXUQ128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMAXUQ128load {sym} [off] x ptr mem)
2730 (VPMAXUQ256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMAXUQ256load {sym} [off] x ptr mem)
2731 (VPMAXUQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMAXUQ512load {sym} [off] x ptr mem)
2732 (VMAXPSMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMAXPSMasked128load {sym} [off] x ptr mask mem)
2733 (VMAXPSMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMAXPSMasked256load {sym} [off] x ptr mask mem)
2734 (VMAXPSMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMAXPSMasked512load {sym} [off] x ptr mask mem)
2735 (VMAXPDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMAXPDMasked128load {sym} [off] x ptr mask mem)
2736 (VMAXPDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMAXPDMasked256load {sym} [off] x ptr mask mem)
2737 (VMAXPDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMAXPDMasked512load {sym} [off] x ptr mask mem)
2738 (VPMAXSDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXSDMasked128load {sym} [off] x ptr mask mem)
2739 (VPMAXSDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXSDMasked256load {sym} [off] x ptr mask mem)
2740 (VPMAXSDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXSDMasked512load {sym} [off] x ptr mask mem)
2741 (VPMAXSQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXSQMasked128load {sym} [off] x ptr mask mem)
2742 (VPMAXSQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXSQMasked256load {sym} [off] x ptr mask mem)
2743 (VPMAXSQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXSQMasked512load {sym} [off] x ptr mask mem)
2744 (VPMAXUDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXUDMasked128load {sym} [off] x ptr mask mem)
2745 (VPMAXUDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXUDMasked256load {sym} [off] x ptr mask mem)
2746 (VPMAXUDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXUDMasked512load {sym} [off] x ptr mask mem)
2747 (VPMAXUQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXUQMasked128load {sym} [off] x ptr mask mem)
2748 (VPMAXUQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXUQMasked256load {sym} [off] x ptr mask mem)
2749 (VPMAXUQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMAXUQMasked512load {sym} [off] x ptr mask mem)
2750 (VMINPS512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VMINPS512load {sym} [off] x ptr mem)
2751 (VMINPD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VMINPD512load {sym} [off] x ptr mem)
2752 (VPMINSD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMINSD512load {sym} [off] x ptr mem)
2753 (VPMINSQ128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMINSQ128load {sym} [off] x ptr mem)
2754 (VPMINSQ256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMINSQ256load {sym} [off] x ptr mem)
2755 (VPMINSQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMINSQ512load {sym} [off] x ptr mem)
2756 (VPMINUD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMINUD512load {sym} [off] x ptr mem)
2757 (VPMINUQ128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMINUQ128load {sym} [off] x ptr mem)
2758 (VPMINUQ256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMINUQ256load {sym} [off] x ptr mem)
2759 (VPMINUQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMINUQ512load {sym} [off] x ptr mem)
2760 (VMINPSMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMINPSMasked128load {sym} [off] x ptr mask mem)
2761 (VMINPSMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMINPSMasked256load {sym} [off] x ptr mask mem)
2762 (VMINPSMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMINPSMasked512load {sym} [off] x ptr mask mem)
2763 (VMINPDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMINPDMasked128load {sym} [off] x ptr mask mem)
2764 (VMINPDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMINPDMasked256load {sym} [off] x ptr mask mem)
2765 (VMINPDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMINPDMasked512load {sym} [off] x ptr mask mem)
2766 (VPMINSDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINSDMasked128load {sym} [off] x ptr mask mem)
2767 (VPMINSDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINSDMasked256load {sym} [off] x ptr mask mem)
2768 (VPMINSDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINSDMasked512load {sym} [off] x ptr mask mem)
2769 (VPMINSQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINSQMasked128load {sym} [off] x ptr mask mem)
2770 (VPMINSQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINSQMasked256load {sym} [off] x ptr mask mem)
2771 (VPMINSQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINSQMasked512load {sym} [off] x ptr mask mem)
2772 (VPMINUDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINUDMasked128load {sym} [off] x ptr mask mem)
2773 (VPMINUDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINUDMasked256load {sym} [off] x ptr mask mem)
2774 (VPMINUDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINUDMasked512load {sym} [off] x ptr mask mem)
2775 (VPMINUQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINUQMasked128load {sym} [off] x ptr mask mem)
2776 (VPMINUQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINUQMasked256load {sym} [off] x ptr mask mem)
2777 (VPMINUQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMINUQMasked512load {sym} [off] x ptr mask mem)
2778 (VMULPS512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VMULPS512load {sym} [off] x ptr mem)
2779 (VMULPD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VMULPD512load {sym} [off] x ptr mem)
2780 (VPMULLD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMULLD512load {sym} [off] x ptr mem)
2781 (VPMULLQ128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMULLQ128load {sym} [off] x ptr mem)
2782 (VPMULLQ256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMULLQ256load {sym} [off] x ptr mem)
2783 (VPMULLQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPMULLQ512load {sym} [off] x ptr mem)
2784 (VFMADD213PS128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PS128load {sym} [off] x y ptr mem)
2785 (VFMADD213PS256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PS256load {sym} [off] x y ptr mem)
2786 (VFMADD213PS512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PS512load {sym} [off] x y ptr mem)
2787 (VFMADD213PD128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PD128load {sym} [off] x y ptr mem)
2788 (VFMADD213PD256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PD256load {sym} [off] x y ptr mem)
2789 (VFMADD213PD512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PD512load {sym} [off] x y ptr mem)
2790 (VFMADD213PSMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PSMasked128load {sym} [off] x y ptr mask mem)
2791 (VFMADD213PSMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PSMasked256load {sym} [off] x y ptr mask mem)
2792 (VFMADD213PSMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PSMasked512load {sym} [off] x y ptr mask mem)
2793 (VFMADD213PDMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PDMasked128load {sym} [off] x y ptr mask mem)
2794 (VFMADD213PDMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PDMasked256load {sym} [off] x y ptr mask mem)
2795 (VFMADD213PDMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADD213PDMasked512load {sym} [off] x y ptr mask mem)
2796 (VFMADDSUB213PS128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PS128load {sym} [off] x y ptr mem)
2797 (VFMADDSUB213PS256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PS256load {sym} [off] x y ptr mem)
2798 (VFMADDSUB213PS512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PS512load {sym} [off] x y ptr mem)
2799 (VFMADDSUB213PD128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PD128load {sym} [off] x y ptr mem)
2800 (VFMADDSUB213PD256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PD256load {sym} [off] x y ptr mem)
2801 (VFMADDSUB213PD512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PD512load {sym} [off] x y ptr mem)
2802 (VFMADDSUB213PSMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PSMasked128load {sym} [off] x y ptr mask mem)
2803 (VFMADDSUB213PSMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PSMasked256load {sym} [off] x y ptr mask mem)
2804 (VFMADDSUB213PSMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PSMasked512load {sym} [off] x y ptr mask mem)
2805 (VFMADDSUB213PDMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PDMasked128load {sym} [off] x y ptr mask mem)
2806 (VFMADDSUB213PDMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PDMasked256load {sym} [off] x y ptr mask mem)
2807 (VFMADDSUB213PDMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMADDSUB213PDMasked512load {sym} [off] x y ptr mask mem)
2808 (VMULPSMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMULPSMasked128load {sym} [off] x ptr mask mem)
2809 (VMULPSMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMULPSMasked256load {sym} [off] x ptr mask mem)
2810 (VMULPSMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMULPSMasked512load {sym} [off] x ptr mask mem)
2811 (VMULPDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMULPDMasked128load {sym} [off] x ptr mask mem)
2812 (VMULPDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMULPDMasked256load {sym} [off] x ptr mask mem)
2813 (VMULPDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VMULPDMasked512load {sym} [off] x ptr mask mem)
2814 (VPMULLDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMULLDMasked128load {sym} [off] x ptr mask mem)
2815 (VPMULLDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMULLDMasked256load {sym} [off] x ptr mask mem)
2816 (VPMULLDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMULLDMasked512load {sym} [off] x ptr mask mem)
2817 (VPMULLQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMULLQMasked128load {sym} [off] x ptr mask mem)
2818 (VPMULLQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMULLQMasked256load {sym} [off] x ptr mask mem)
2819 (VPMULLQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPMULLQMasked512load {sym} [off] x ptr mask mem)
2820 (VFMSUBADD213PS128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PS128load {sym} [off] x y ptr mem)
2821 (VFMSUBADD213PS256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PS256load {sym} [off] x y ptr mem)
2822 (VFMSUBADD213PS512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PS512load {sym} [off] x y ptr mem)
2823 (VFMSUBADD213PD128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PD128load {sym} [off] x y ptr mem)
2824 (VFMSUBADD213PD256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PD256load {sym} [off] x y ptr mem)
2825 (VFMSUBADD213PD512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PD512load {sym} [off] x y ptr mem)
2826 (VFMSUBADD213PSMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PSMasked128load {sym} [off] x y ptr mask mem)
2827 (VFMSUBADD213PSMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PSMasked256load {sym} [off] x y ptr mask mem)
2828 (VFMSUBADD213PSMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PSMasked512load {sym} [off] x y ptr mask mem)
2829 (VFMSUBADD213PDMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PDMasked128load {sym} [off] x y ptr mask mem)
2830 (VFMSUBADD213PDMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PDMasked256load {sym} [off] x y ptr mask mem)
2831 (VFMSUBADD213PDMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VFMSUBADD213PDMasked512load {sym} [off] x y ptr mask mem)
2832 (VPOPCNTD128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTD128load {sym} [off] ptr mem)
2833 (VPOPCNTD256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTD256load {sym} [off] ptr mem)
2834 (VPOPCNTD512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTD512load {sym} [off] ptr mem)
2835 (VPOPCNTQ128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTQ128load {sym} [off] ptr mem)
2836 (VPOPCNTQ256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTQ256load {sym} [off] ptr mem)
2837 (VPOPCNTQ512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTQ512load {sym} [off] ptr mem)
2838 (VPOPCNTDMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTDMasked128load {sym} [off] ptr mask mem)
2839 (VPOPCNTDMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTDMasked256load {sym} [off] ptr mask mem)
2840 (VPOPCNTDMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTDMasked512load {sym} [off] ptr mask mem)
2841 (VPOPCNTQMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTQMasked128load {sym} [off] ptr mask mem)
2842 (VPOPCNTQMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTQMasked256load {sym} [off] ptr mask mem)
2843 (VPOPCNTQMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPOPCNTQMasked512load {sym} [off] ptr mask mem)
2844 (VPORD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPORD512load {sym} [off] x ptr mem)
2845 (VPORQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPORQ512load {sym} [off] x ptr mem)
2846 (VPORDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPORDMasked128load {sym} [off] x ptr mask mem)
2847 (VPORDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPORDMasked256load {sym} [off] x ptr mask mem)
2848 (VPORDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPORDMasked512load {sym} [off] x ptr mask mem)
2849 (VPORQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPORQMasked128load {sym} [off] x ptr mask mem)
2850 (VPORQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPORQMasked256load {sym} [off] x ptr mask mem)
2851 (VPORQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPORQMasked512load {sym} [off] x ptr mask mem)
2852 (VPERMPS512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMPS512load {sym} [off] x ptr mem)
2853 (VPERMD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMD512load {sym} [off] x ptr mem)
2854 (VPERMPD256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMPD256load {sym} [off] x ptr mem)
2855 (VPERMQ256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMQ256load {sym} [off] x ptr mem)
2856 (VPERMPD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMPD512load {sym} [off] x ptr mem)
2857 (VPERMQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMQ512load {sym} [off] x ptr mem)
2858 (VPERMPSMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMPSMasked256load {sym} [off] x ptr mask mem)
2859 (VPERMDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMDMasked256load {sym} [off] x ptr mask mem)
2860 (VPERMPSMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMPSMasked512load {sym} [off] x ptr mask mem)
2861 (VPERMDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMDMasked512load {sym} [off] x ptr mask mem)
2862 (VPERMPDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMPDMasked256load {sym} [off] x ptr mask mem)
2863 (VPERMQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMQMasked256load {sym} [off] x ptr mask mem)
2864 (VPERMPDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMPDMasked512load {sym} [off] x ptr mask mem)
2865 (VPERMQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPERMQMasked512load {sym} [off] x ptr mask mem)
2866 (VRCP14PS512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRCP14PS512load {sym} [off] ptr mem)
2867 (VRCP14PD128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRCP14PD128load {sym} [off] ptr mem)
2868 (VRCP14PD256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRCP14PD256load {sym} [off] ptr mem)
2869 (VRCP14PD512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRCP14PD512load {sym} [off] ptr mem)
2870 (VRCP14PSMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRCP14PSMasked128load {sym} [off] ptr mask mem)
2871 (VRCP14PSMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRCP14PSMasked256load {sym} [off] ptr mask mem)
2872 (VRCP14PSMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRCP14PSMasked512load {sym} [off] ptr mask mem)
2873 (VRCP14PDMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRCP14PDMasked128load {sym} [off] ptr mask mem)
2874 (VRCP14PDMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRCP14PDMasked256load {sym} [off] ptr mask mem)
2875 (VRCP14PDMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRCP14PDMasked512load {sym} [off] ptr mask mem)
2876 (VRSQRT14PS512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PS512load {sym} [off] ptr mem)
2877 (VRSQRT14PD128 l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PD128load {sym} [off] ptr mem)
2878 (VRSQRT14PD256 l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PD256load {sym} [off] ptr mem)
2879 (VRSQRT14PD512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PD512load {sym} [off] ptr mem)
2880 (VRSQRT14PSMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PSMasked128load {sym} [off] ptr mask mem)
2881 (VRSQRT14PSMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PSMasked256load {sym} [off] ptr mask mem)
2882 (VRSQRT14PSMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PSMasked512load {sym} [off] ptr mask mem)
2883 (VRSQRT14PDMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PDMasked128load {sym} [off] ptr mask mem)
2884 (VRSQRT14PDMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PDMasked256load {sym} [off] ptr mask mem)
2885 (VRSQRT14PDMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PDMasked512load {sym} [off] ptr mask mem)
2886 (VPROLD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2887 (VPROLD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2888 (VPROLD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2889 (VPROLQ128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLQ128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2890 (VPROLQ256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLQ256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2891 (VPROLQ512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLQ512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2892 (VPROLDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2893 (VPROLDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2894 (VPROLDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2895 (VPROLQMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2896 (VPROLQMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2897 (VPROLQMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2898 (VPRORD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2899 (VPRORD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2900 (VPRORD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2901 (VPRORQ128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORQ128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2902 (VPRORQ256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORQ256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2903 (VPRORQ512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORQ512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
2904 (VPRORDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2905 (VPRORDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2906 (VPRORDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2907 (VPRORQMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2908 (VPRORQMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2909 (VPRORQMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
2910 (VPROLVD128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLVD128load {sym} [off] x ptr mem)
2911 (VPROLVD256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLVD256load {sym} [off] x ptr mem)
2912 (VPROLVD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLVD512load {sym} [off] x ptr mem)
2913 (VPROLVQ128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLVQ128load {sym} [off] x ptr mem)
2914 (VPROLVQ256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLVQ256load {sym} [off] x ptr mem)
2915 (VPROLVQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLVQ512load {sym} [off] x ptr mem)
2916 (VPROLVDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLVDMasked128load {sym} [off] x ptr mask mem)
2917 (VPROLVDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLVDMasked256load {sym} [off] x ptr mask mem)
2918 (VPROLVDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLVDMasked512load {sym} [off] x ptr mask mem)
2919 (VPROLVQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLVQMasked128load {sym} [off] x ptr mask mem)
2920 (VPROLVQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLVQMasked256load {sym} [off] x ptr mask mem)
2921 (VPROLVQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLVQMasked512load {sym} [off] x ptr mask mem)
2922 (VPRORVD128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORVD128load {sym} [off] x ptr mem)
2923 (VPRORVD256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORVD256load {sym} [off] x ptr mem)
2924 (VPRORVD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORVD512load {sym} [off] x ptr mem)
2925 (VPRORVQ128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORVQ128load {sym} [off] x ptr mem)
2926 (VPRORVQ256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORVQ256load {sym} [off] x ptr mem)
2927 (VPRORVQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORVQ512load {sym} [off] x ptr mem)
2928 (VPRORVDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORVDMasked128load {sym} [off] x ptr mask mem)
2929 (VPRORVDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORVDMasked256load {sym} [off] x ptr mask mem)
2930 (VPRORVDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORVDMasked512load {sym} [off] x ptr mask mem)
2931 (VPRORVQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORVQMasked128load {sym} [off] x ptr mask mem)
2932 (VPRORVQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORVQMasked256load {sym} [off] x ptr mask mem)
2933 (VPRORVQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORVQMasked512load {sym} [off] x ptr mask mem)
2934 (VPACKSSDW512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPACKSSDW512load {sym} [off] x ptr mem)
2935 (VPACKSSDWMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPACKSSDWMasked128load {sym} [off] x ptr mask mem)
2936 (VPACKSSDWMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPACKSSDWMasked256load {sym} [off] x ptr mask mem)
2937 (VPACKSSDWMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPACKSSDWMasked512load {sym} [off] x ptr mask mem)
2938 (VPACKUSDW512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPACKUSDW512load {sym} [off] x ptr mem)
2939 (VPACKUSDWMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPACKUSDWMasked128load {sym} [off] x ptr mask mem)
2940 (VPACKUSDWMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPACKUSDWMasked256load {sym} [off] x ptr mask mem)
2941 (VPACKUSDWMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPACKUSDWMasked512load {sym} [off] x ptr mask mem)
2942 (VSCALEFPS128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPS128load {sym} [off] x ptr mem)
2943 (VSCALEFPS256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPS256load {sym} [off] x ptr mem)
2944 (VSCALEFPS512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPS512load {sym} [off] x ptr mem)
2945 (VSCALEFPD128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPD128load {sym} [off] x ptr mem)
2946 (VSCALEFPD256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPD256load {sym} [off] x ptr mem)
2947 (VSCALEFPD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPD512load {sym} [off] x ptr mem)
2948 (VSCALEFPSMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPSMasked128load {sym} [off] x ptr mask mem)
2949 (VSCALEFPSMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPSMasked256load {sym} [off] x ptr mask mem)
2950 (VSCALEFPSMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPSMasked512load {sym} [off] x ptr mask mem)
2951 (VSCALEFPDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPDMasked128load {sym} [off] x ptr mask mem)
2952 (VSCALEFPDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPDMasked256load {sym} [off] x ptr mask mem)
2953 (VSCALEFPDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPDMasked512load {sym} [off] x ptr mask mem)
2954 (VPSHLDD128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDD128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2955 (VPSHLDD256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDD256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2956 (VPSHLDD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2957 (VPSHLDQ128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQ128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2958 (VPSHLDQ256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQ256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2959 (VPSHLDQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2960 (VPSHLDDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2961 (VPSHLDDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2962 (VPSHLDDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2963 (VPSHLDQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2964 (VPSHLDQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2965 (VPSHLDQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2966 (VPSHRDD128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDD128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2967 (VPSHRDD256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDD256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2968 (VPSHRDD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2969 (VPSHRDQ128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQ128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2970 (VPSHRDQ256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQ256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2971 (VPSHRDQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
2972 (VPSHRDDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2973 (VPSHRDDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2974 (VPSHRDDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2975 (VPSHRDQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2976 (VPSHRDQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2977 (VPSHRDQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
2978 (VPSLLVD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLVD512load {sym} [off] x ptr mem)
2979 (VPSLLVQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLVQ512load {sym} [off] x ptr mem)
2980 (VPSHLDVD128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVD128load {sym} [off] x y ptr mem)
2981 (VPSHLDVD256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVD256load {sym} [off] x y ptr mem)
2982 (VPSHLDVD512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVD512load {sym} [off] x y ptr mem)
2983 (VPSHLDVQ128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVQ128load {sym} [off] x y ptr mem)
2984 (VPSHLDVQ256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVQ256load {sym} [off] x y ptr mem)
2985 (VPSHLDVQ512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVQ512load {sym} [off] x y ptr mem)
2986 (VPSHLDVDMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVDMasked128load {sym} [off] x y ptr mask mem)
2987 (VPSHLDVDMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVDMasked256load {sym} [off] x y ptr mask mem)
2988 (VPSHLDVDMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVDMasked512load {sym} [off] x y ptr mask mem)
2989 (VPSHLDVQMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVQMasked128load {sym} [off] x y ptr mask mem)
2990 (VPSHLDVQMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVQMasked256load {sym} [off] x y ptr mask mem)
2991 (VPSHLDVQMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVQMasked512load {sym} [off] x y ptr mask mem)
2992 (VPSLLVDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLVDMasked128load {sym} [off] x ptr mask mem)
2993 (VPSLLVDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLVDMasked256load {sym} [off] x ptr mask mem)
2994 (VPSLLVDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLVDMasked512load {sym} [off] x ptr mask mem)
2995 (VPSLLVQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLVQMasked128load {sym} [off] x ptr mask mem)
2996 (VPSLLVQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLVQMasked256load {sym} [off] x ptr mask mem)
2997 (VPSLLVQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLVQMasked512load {sym} [off] x ptr mask mem)
2998 (VPSRAVD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAVD512load {sym} [off] x ptr mem)
2999 (VPSRAVQ128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAVQ128load {sym} [off] x ptr mem)
3000 (VPSRAVQ256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAVQ256load {sym} [off] x ptr mem)
3001 (VPSRAVQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAVQ512load {sym} [off] x ptr mem)
3002 (VPSRLVD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRLVD512load {sym} [off] x ptr mem)
3003 (VPSRLVQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRLVQ512load {sym} [off] x ptr mem)
3004 (VPSHRDVD128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVD128load {sym} [off] x y ptr mem)
3005 (VPSHRDVD256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVD256load {sym} [off] x y ptr mem)
3006 (VPSHRDVD512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVD512load {sym} [off] x y ptr mem)
3007 (VPSHRDVQ128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVQ128load {sym} [off] x y ptr mem)
3008 (VPSHRDVQ256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVQ256load {sym} [off] x y ptr mem)
3009 (VPSHRDVQ512 x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVQ512load {sym} [off] x y ptr mem)
3010 (VPSHRDVDMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVDMasked128load {sym} [off] x y ptr mask mem)
3011 (VPSHRDVDMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVDMasked256load {sym} [off] x y ptr mask mem)
3012 (VPSHRDVDMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVDMasked512load {sym} [off] x y ptr mask mem)
3013 (VPSHRDVQMasked128 x y l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVQMasked128load {sym} [off] x y ptr mask mem)
3014 (VPSHRDVQMasked256 x y l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVQMasked256load {sym} [off] x y ptr mask mem)
3015 (VPSHRDVQMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDVQMasked512load {sym} [off] x y ptr mask mem)
3016 (VPSRAVDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAVDMasked128load {sym} [off] x ptr mask mem)
3017 (VPSRAVDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAVDMasked256load {sym} [off] x ptr mask mem)
3018 (VPSRAVDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAVDMasked512load {sym} [off] x ptr mask mem)
3019 (VPSRAVQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAVQMasked128load {sym} [off] x ptr mask mem)
3020 (VPSRAVQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAVQMasked256load {sym} [off] x ptr mask mem)
3021 (VPSRAVQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAVQMasked512load {sym} [off] x ptr mask mem)
3022 (VPSRLVDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLVDMasked128load {sym} [off] x ptr mask mem)
3023 (VPSRLVDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLVDMasked256load {sym} [off] x ptr mask mem)
3024 (VPSRLVDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLVDMasked512load {sym} [off] x ptr mask mem)
3025 (VPSRLVQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLVQMasked128load {sym} [off] x ptr mask mem)
3026 (VPSRLVQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLVQMasked256load {sym} [off] x ptr mask mem)
3027 (VPSRLVQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLVQMasked512load {sym} [off] x ptr mask mem)
3028 (VSQRTPS512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSQRTPS512load {sym} [off] ptr mem)
3029 (VSQRTPD512 l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSQRTPD512load {sym} [off] ptr mem)
3030 (VSQRTPSMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSQRTPSMasked128load {sym} [off] ptr mask mem)
3031 (VSQRTPSMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSQRTPSMasked256load {sym} [off] ptr mask mem)
3032 (VSQRTPSMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSQRTPSMasked512load {sym} [off] ptr mask mem)
3033 (VSQRTPDMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSQRTPDMasked128load {sym} [off] ptr mask mem)
3034 (VSQRTPDMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSQRTPDMasked256load {sym} [off] ptr mask mem)
3035 (VSQRTPDMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSQRTPDMasked512load {sym} [off] ptr mask mem)
3036 (VSUBPS512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSUBPS512load {sym} [off] x ptr mem)
3037 (VSUBPD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSUBPD512load {sym} [off] x ptr mem)
3038 (VPSUBD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSUBD512load {sym} [off] x ptr mem)
3039 (VPSUBQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSUBQ512load {sym} [off] x ptr mem)
3040 (VSUBPSMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSUBPSMasked128load {sym} [off] x ptr mask mem)
3041 (VSUBPSMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSUBPSMasked256load {sym} [off] x ptr mask mem)
3042 (VSUBPSMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSUBPSMasked512load {sym} [off] x ptr mask mem)
3043 (VSUBPDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSUBPDMasked128load {sym} [off] x ptr mask mem)
3044 (VSUBPDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSUBPDMasked256load {sym} [off] x ptr mask mem)
3045 (VSUBPDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSUBPDMasked512load {sym} [off] x ptr mask mem)
3046 (VPSUBDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSUBDMasked128load {sym} [off] x ptr mask mem)
3047 (VPSUBDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSUBDMasked256load {sym} [off] x ptr mask mem)
3048 (VPSUBDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSUBDMasked512load {sym} [off] x ptr mask mem)
3049 (VPSUBQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSUBQMasked128load {sym} [off] x ptr mask mem)
3050 (VPSUBQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSUBQMasked256load {sym} [off] x ptr mask mem)
3051 (VPSUBQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSUBQMasked512load {sym} [off] x ptr mask mem)
3052 (VPXORD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPXORD512load {sym} [off] x ptr mem)
3053 (VPXORQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPXORQ512load {sym} [off] x ptr mem)
3054 (VPXORDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPXORDMasked128load {sym} [off] x ptr mask mem)
3055 (VPXORDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPXORDMasked256load {sym} [off] x ptr mask mem)
3056 (VPXORDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPXORDMasked512load {sym} [off] x ptr mask mem)
3057 (VPXORQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPXORQMasked128load {sym} [off] x ptr mask mem)
3058 (VPXORQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPXORQMasked256load {sym} [off] x ptr mask mem)
3059 (VPXORQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPXORQMasked512load {sym} [off] x ptr mask mem)
3060 (VPBLENDMDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPBLENDMDMasked512load {sym} [off] x ptr mask mem)
3061 (VPBLENDMQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPBLENDMQMasked512load {sym} [off] x ptr mask mem)
3062 (VSHUFPS512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSHUFPS512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
3063 (VSHUFPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSHUFPD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
3064 (VPSHUFD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHUFD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
3065 (VPSHUFDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHUFDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3066 (VPSHUFDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHUFDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3067 (VPSHUFDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHUFDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3068 (VPSLLD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLD512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
3069 (VPSLLQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLQ512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
3070 (VPSLLDMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLDMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3071 (VPSLLDMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLDMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3072 (VPSLLDMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLDMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3073 (VPSLLQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLQMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3074 (VPSLLQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLQMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3075 (VPSLLQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLQMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3076 (VPSRLD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRLD512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
3077 (VPSRLQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRLQ512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
3078 (VPSRAD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAD512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
3079 (VPSRAQ128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAQ128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
3080 (VPSRAQ256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAQ256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
3081 (VPSRAQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAQ512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
3082 (VPSRLDMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLDMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3083 (VPSRLDMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLDMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3084 (VPSRLDMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLDMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3085 (VPSRLQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLQMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3086 (VPSRLQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLQMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3087 (VPSRLQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLQMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3088 (VPSRADMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRADMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3089 (VPSRADMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRADMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3090 (VPSRADMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRADMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3091 (VPSRAQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAQMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3092 (VPSRAQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAQMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3093 (VPSRAQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAQMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
3094 (VPTERNLOGD128 [c] x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGD128load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
3095 (VPTERNLOGD256 [c] x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGD256load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
3096 (VPTERNLOGD512 [c] x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGD512load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
3097 (VPTERNLOGQ128 [c] x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGQ128load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
3098 (VPTERNLOGQ256 [c] x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGQ256load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
3099 (VPTERNLOGQ512 [c] x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
3100
View as plain text