1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105
106 BlockMIPSEQ
107 BlockMIPSNE
108 BlockMIPSLTZ
109 BlockMIPSLEZ
110 BlockMIPSGTZ
111 BlockMIPSGEZ
112 BlockMIPSFPT
113 BlockMIPSFPF
114
115 BlockMIPS64EQ
116 BlockMIPS64NE
117 BlockMIPS64LTZ
118 BlockMIPS64LEZ
119 BlockMIPS64GTZ
120 BlockMIPS64GEZ
121 BlockMIPS64FPT
122 BlockMIPS64FPF
123
124 BlockPPC64EQ
125 BlockPPC64NE
126 BlockPPC64LT
127 BlockPPC64LE
128 BlockPPC64GT
129 BlockPPC64GE
130 BlockPPC64FLT
131 BlockPPC64FLE
132 BlockPPC64FGT
133 BlockPPC64FGE
134
135 BlockRISCV64BEQ
136 BlockRISCV64BNE
137 BlockRISCV64BLT
138 BlockRISCV64BGE
139 BlockRISCV64BLTU
140 BlockRISCV64BGEU
141 BlockRISCV64BEQZ
142 BlockRISCV64BNEZ
143 BlockRISCV64BLEZ
144 BlockRISCV64BGEZ
145 BlockRISCV64BLTZ
146 BlockRISCV64BGTZ
147
148 BlockS390XBRC
149 BlockS390XCRJ
150 BlockS390XCGRJ
151 BlockS390XCLRJ
152 BlockS390XCLGRJ
153 BlockS390XCIJ
154 BlockS390XCGIJ
155 BlockS390XCLIJ
156 BlockS390XCLGIJ
157
158 BlockPlain
159 BlockIf
160 BlockDefer
161 BlockRet
162 BlockRetJmp
163 BlockExit
164 BlockJumpTable
165 BlockFirst
166 )
167
168 var blockString = [...]string{
169 BlockInvalid: "BlockInvalid",
170
171 Block386EQ: "EQ",
172 Block386NE: "NE",
173 Block386LT: "LT",
174 Block386LE: "LE",
175 Block386GT: "GT",
176 Block386GE: "GE",
177 Block386OS: "OS",
178 Block386OC: "OC",
179 Block386ULT: "ULT",
180 Block386ULE: "ULE",
181 Block386UGT: "UGT",
182 Block386UGE: "UGE",
183 Block386EQF: "EQF",
184 Block386NEF: "NEF",
185 Block386ORD: "ORD",
186 Block386NAN: "NAN",
187
188 BlockAMD64EQ: "EQ",
189 BlockAMD64NE: "NE",
190 BlockAMD64LT: "LT",
191 BlockAMD64LE: "LE",
192 BlockAMD64GT: "GT",
193 BlockAMD64GE: "GE",
194 BlockAMD64OS: "OS",
195 BlockAMD64OC: "OC",
196 BlockAMD64ULT: "ULT",
197 BlockAMD64ULE: "ULE",
198 BlockAMD64UGT: "UGT",
199 BlockAMD64UGE: "UGE",
200 BlockAMD64EQF: "EQF",
201 BlockAMD64NEF: "NEF",
202 BlockAMD64ORD: "ORD",
203 BlockAMD64NAN: "NAN",
204 BlockAMD64JUMPTABLE: "JUMPTABLE",
205
206 BlockARMEQ: "EQ",
207 BlockARMNE: "NE",
208 BlockARMLT: "LT",
209 BlockARMLE: "LE",
210 BlockARMGT: "GT",
211 BlockARMGE: "GE",
212 BlockARMULT: "ULT",
213 BlockARMULE: "ULE",
214 BlockARMUGT: "UGT",
215 BlockARMUGE: "UGE",
216 BlockARMLTnoov: "LTnoov",
217 BlockARMLEnoov: "LEnoov",
218 BlockARMGTnoov: "GTnoov",
219 BlockARMGEnoov: "GEnoov",
220
221 BlockARM64EQ: "EQ",
222 BlockARM64NE: "NE",
223 BlockARM64LT: "LT",
224 BlockARM64LE: "LE",
225 BlockARM64GT: "GT",
226 BlockARM64GE: "GE",
227 BlockARM64ULT: "ULT",
228 BlockARM64ULE: "ULE",
229 BlockARM64UGT: "UGT",
230 BlockARM64UGE: "UGE",
231 BlockARM64Z: "Z",
232 BlockARM64NZ: "NZ",
233 BlockARM64ZW: "ZW",
234 BlockARM64NZW: "NZW",
235 BlockARM64TBZ: "TBZ",
236 BlockARM64TBNZ: "TBNZ",
237 BlockARM64FLT: "FLT",
238 BlockARM64FLE: "FLE",
239 BlockARM64FGT: "FGT",
240 BlockARM64FGE: "FGE",
241 BlockARM64LTnoov: "LTnoov",
242 BlockARM64LEnoov: "LEnoov",
243 BlockARM64GTnoov: "GTnoov",
244 BlockARM64GEnoov: "GEnoov",
245 BlockARM64JUMPTABLE: "JUMPTABLE",
246
247 BlockLOONG64EQ: "EQ",
248 BlockLOONG64NE: "NE",
249 BlockLOONG64LTZ: "LTZ",
250 BlockLOONG64LEZ: "LEZ",
251 BlockLOONG64GTZ: "GTZ",
252 BlockLOONG64GEZ: "GEZ",
253 BlockLOONG64FPT: "FPT",
254 BlockLOONG64FPF: "FPF",
255
256 BlockMIPSEQ: "EQ",
257 BlockMIPSNE: "NE",
258 BlockMIPSLTZ: "LTZ",
259 BlockMIPSLEZ: "LEZ",
260 BlockMIPSGTZ: "GTZ",
261 BlockMIPSGEZ: "GEZ",
262 BlockMIPSFPT: "FPT",
263 BlockMIPSFPF: "FPF",
264
265 BlockMIPS64EQ: "EQ",
266 BlockMIPS64NE: "NE",
267 BlockMIPS64LTZ: "LTZ",
268 BlockMIPS64LEZ: "LEZ",
269 BlockMIPS64GTZ: "GTZ",
270 BlockMIPS64GEZ: "GEZ",
271 BlockMIPS64FPT: "FPT",
272 BlockMIPS64FPF: "FPF",
273
274 BlockPPC64EQ: "EQ",
275 BlockPPC64NE: "NE",
276 BlockPPC64LT: "LT",
277 BlockPPC64LE: "LE",
278 BlockPPC64GT: "GT",
279 BlockPPC64GE: "GE",
280 BlockPPC64FLT: "FLT",
281 BlockPPC64FLE: "FLE",
282 BlockPPC64FGT: "FGT",
283 BlockPPC64FGE: "FGE",
284
285 BlockRISCV64BEQ: "BEQ",
286 BlockRISCV64BNE: "BNE",
287 BlockRISCV64BLT: "BLT",
288 BlockRISCV64BGE: "BGE",
289 BlockRISCV64BLTU: "BLTU",
290 BlockRISCV64BGEU: "BGEU",
291 BlockRISCV64BEQZ: "BEQZ",
292 BlockRISCV64BNEZ: "BNEZ",
293 BlockRISCV64BLEZ: "BLEZ",
294 BlockRISCV64BGEZ: "BGEZ",
295 BlockRISCV64BLTZ: "BLTZ",
296 BlockRISCV64BGTZ: "BGTZ",
297
298 BlockS390XBRC: "BRC",
299 BlockS390XCRJ: "CRJ",
300 BlockS390XCGRJ: "CGRJ",
301 BlockS390XCLRJ: "CLRJ",
302 BlockS390XCLGRJ: "CLGRJ",
303 BlockS390XCIJ: "CIJ",
304 BlockS390XCGIJ: "CGIJ",
305 BlockS390XCLIJ: "CLIJ",
306 BlockS390XCLGIJ: "CLGIJ",
307
308 BlockPlain: "Plain",
309 BlockIf: "If",
310 BlockDefer: "Defer",
311 BlockRet: "Ret",
312 BlockRetJmp: "RetJmp",
313 BlockExit: "Exit",
314 BlockJumpTable: "JumpTable",
315 BlockFirst: "First",
316 }
317
318 func (k BlockKind) String() string { return blockString[k] }
319 func (k BlockKind) AuxIntType() string {
320 switch k {
321 case BlockARM64TBZ:
322 return "int64"
323 case BlockARM64TBNZ:
324 return "int64"
325 case BlockS390XCIJ:
326 return "int8"
327 case BlockS390XCGIJ:
328 return "int8"
329 case BlockS390XCLIJ:
330 return "uint8"
331 case BlockS390XCLGIJ:
332 return "uint8"
333 }
334 return ""
335 }
336
337 const (
338 OpInvalid Op = iota
339
340 Op386ADDSS
341 Op386ADDSD
342 Op386SUBSS
343 Op386SUBSD
344 Op386MULSS
345 Op386MULSD
346 Op386DIVSS
347 Op386DIVSD
348 Op386MOVSSload
349 Op386MOVSDload
350 Op386MOVSSconst
351 Op386MOVSDconst
352 Op386MOVSSloadidx1
353 Op386MOVSSloadidx4
354 Op386MOVSDloadidx1
355 Op386MOVSDloadidx8
356 Op386MOVSSstore
357 Op386MOVSDstore
358 Op386MOVSSstoreidx1
359 Op386MOVSSstoreidx4
360 Op386MOVSDstoreidx1
361 Op386MOVSDstoreidx8
362 Op386ADDSSload
363 Op386ADDSDload
364 Op386SUBSSload
365 Op386SUBSDload
366 Op386MULSSload
367 Op386MULSDload
368 Op386DIVSSload
369 Op386DIVSDload
370 Op386ADDL
371 Op386ADDLconst
372 Op386ADDLcarry
373 Op386ADDLconstcarry
374 Op386ADCL
375 Op386ADCLconst
376 Op386SUBL
377 Op386SUBLconst
378 Op386SUBLcarry
379 Op386SUBLconstcarry
380 Op386SBBL
381 Op386SBBLconst
382 Op386MULL
383 Op386MULLconst
384 Op386MULLU
385 Op386HMULL
386 Op386HMULLU
387 Op386MULLQU
388 Op386AVGLU
389 Op386DIVL
390 Op386DIVW
391 Op386DIVLU
392 Op386DIVWU
393 Op386MODL
394 Op386MODW
395 Op386MODLU
396 Op386MODWU
397 Op386ANDL
398 Op386ANDLconst
399 Op386ORL
400 Op386ORLconst
401 Op386XORL
402 Op386XORLconst
403 Op386CMPL
404 Op386CMPW
405 Op386CMPB
406 Op386CMPLconst
407 Op386CMPWconst
408 Op386CMPBconst
409 Op386CMPLload
410 Op386CMPWload
411 Op386CMPBload
412 Op386CMPLconstload
413 Op386CMPWconstload
414 Op386CMPBconstload
415 Op386UCOMISS
416 Op386UCOMISD
417 Op386TESTL
418 Op386TESTW
419 Op386TESTB
420 Op386TESTLconst
421 Op386TESTWconst
422 Op386TESTBconst
423 Op386SHLL
424 Op386SHLLconst
425 Op386SHRL
426 Op386SHRW
427 Op386SHRB
428 Op386SHRLconst
429 Op386SHRWconst
430 Op386SHRBconst
431 Op386SARL
432 Op386SARW
433 Op386SARB
434 Op386SARLconst
435 Op386SARWconst
436 Op386SARBconst
437 Op386ROLL
438 Op386ROLW
439 Op386ROLB
440 Op386ROLLconst
441 Op386ROLWconst
442 Op386ROLBconst
443 Op386ADDLload
444 Op386SUBLload
445 Op386MULLload
446 Op386ANDLload
447 Op386ORLload
448 Op386XORLload
449 Op386ADDLloadidx4
450 Op386SUBLloadidx4
451 Op386MULLloadidx4
452 Op386ANDLloadidx4
453 Op386ORLloadidx4
454 Op386XORLloadidx4
455 Op386NEGL
456 Op386NOTL
457 Op386BSFL
458 Op386BSFW
459 Op386LoweredCtz32
460 Op386BSRL
461 Op386BSRW
462 Op386BSWAPL
463 Op386SQRTSD
464 Op386SQRTSS
465 Op386SBBLcarrymask
466 Op386SETEQ
467 Op386SETNE
468 Op386SETL
469 Op386SETLE
470 Op386SETG
471 Op386SETGE
472 Op386SETB
473 Op386SETBE
474 Op386SETA
475 Op386SETAE
476 Op386SETO
477 Op386SETEQF
478 Op386SETNEF
479 Op386SETORD
480 Op386SETNAN
481 Op386SETGF
482 Op386SETGEF
483 Op386MOVBLSX
484 Op386MOVBLZX
485 Op386MOVWLSX
486 Op386MOVWLZX
487 Op386MOVLconst
488 Op386CVTTSD2SL
489 Op386CVTTSS2SL
490 Op386CVTSL2SS
491 Op386CVTSL2SD
492 Op386CVTSD2SS
493 Op386CVTSS2SD
494 Op386PXOR
495 Op386LEAL
496 Op386LEAL1
497 Op386LEAL2
498 Op386LEAL4
499 Op386LEAL8
500 Op386MOVBload
501 Op386MOVBLSXload
502 Op386MOVWload
503 Op386MOVWLSXload
504 Op386MOVLload
505 Op386MOVBstore
506 Op386MOVWstore
507 Op386MOVLstore
508 Op386ADDLmodify
509 Op386SUBLmodify
510 Op386ANDLmodify
511 Op386ORLmodify
512 Op386XORLmodify
513 Op386ADDLmodifyidx4
514 Op386SUBLmodifyidx4
515 Op386ANDLmodifyidx4
516 Op386ORLmodifyidx4
517 Op386XORLmodifyidx4
518 Op386ADDLconstmodify
519 Op386ANDLconstmodify
520 Op386ORLconstmodify
521 Op386XORLconstmodify
522 Op386ADDLconstmodifyidx4
523 Op386ANDLconstmodifyidx4
524 Op386ORLconstmodifyidx4
525 Op386XORLconstmodifyidx4
526 Op386MOVBloadidx1
527 Op386MOVWloadidx1
528 Op386MOVWloadidx2
529 Op386MOVLloadidx1
530 Op386MOVLloadidx4
531 Op386MOVBstoreidx1
532 Op386MOVWstoreidx1
533 Op386MOVWstoreidx2
534 Op386MOVLstoreidx1
535 Op386MOVLstoreidx4
536 Op386MOVBstoreconst
537 Op386MOVWstoreconst
538 Op386MOVLstoreconst
539 Op386MOVBstoreconstidx1
540 Op386MOVWstoreconstidx1
541 Op386MOVWstoreconstidx2
542 Op386MOVLstoreconstidx1
543 Op386MOVLstoreconstidx4
544 Op386DUFFZERO
545 Op386REPSTOSL
546 Op386CALLstatic
547 Op386CALLtail
548 Op386CALLclosure
549 Op386CALLinter
550 Op386DUFFCOPY
551 Op386REPMOVSL
552 Op386InvertFlags
553 Op386LoweredGetG
554 Op386LoweredGetClosurePtr
555 Op386LoweredGetCallerPC
556 Op386LoweredGetCallerSP
557 Op386LoweredNilCheck
558 Op386LoweredWB
559 Op386LoweredPanicBoundsA
560 Op386LoweredPanicBoundsB
561 Op386LoweredPanicBoundsC
562 Op386LoweredPanicExtendA
563 Op386LoweredPanicExtendB
564 Op386LoweredPanicExtendC
565 Op386FlagEQ
566 Op386FlagLT_ULT
567 Op386FlagLT_UGT
568 Op386FlagGT_UGT
569 Op386FlagGT_ULT
570 Op386MOVSSconst1
571 Op386MOVSDconst1
572 Op386MOVSSconst2
573 Op386MOVSDconst2
574
575 OpAMD64ADDSS
576 OpAMD64ADDSD
577 OpAMD64SUBSS
578 OpAMD64SUBSD
579 OpAMD64MULSS
580 OpAMD64MULSD
581 OpAMD64DIVSS
582 OpAMD64DIVSD
583 OpAMD64MOVSSload
584 OpAMD64MOVSDload
585 OpAMD64MOVSSconst
586 OpAMD64MOVSDconst
587 OpAMD64MOVSSloadidx1
588 OpAMD64MOVSSloadidx4
589 OpAMD64MOVSDloadidx1
590 OpAMD64MOVSDloadidx8
591 OpAMD64MOVSSstore
592 OpAMD64MOVSDstore
593 OpAMD64MOVSSstoreidx1
594 OpAMD64MOVSSstoreidx4
595 OpAMD64MOVSDstoreidx1
596 OpAMD64MOVSDstoreidx8
597 OpAMD64ADDSSload
598 OpAMD64ADDSDload
599 OpAMD64SUBSSload
600 OpAMD64SUBSDload
601 OpAMD64MULSSload
602 OpAMD64MULSDload
603 OpAMD64DIVSSload
604 OpAMD64DIVSDload
605 OpAMD64ADDSSloadidx1
606 OpAMD64ADDSSloadidx4
607 OpAMD64ADDSDloadidx1
608 OpAMD64ADDSDloadidx8
609 OpAMD64SUBSSloadidx1
610 OpAMD64SUBSSloadidx4
611 OpAMD64SUBSDloadidx1
612 OpAMD64SUBSDloadidx8
613 OpAMD64MULSSloadidx1
614 OpAMD64MULSSloadidx4
615 OpAMD64MULSDloadidx1
616 OpAMD64MULSDloadidx8
617 OpAMD64DIVSSloadidx1
618 OpAMD64DIVSSloadidx4
619 OpAMD64DIVSDloadidx1
620 OpAMD64DIVSDloadidx8
621 OpAMD64ADDQ
622 OpAMD64ADDL
623 OpAMD64ADDQconst
624 OpAMD64ADDLconst
625 OpAMD64ADDQconstmodify
626 OpAMD64ADDLconstmodify
627 OpAMD64SUBQ
628 OpAMD64SUBL
629 OpAMD64SUBQconst
630 OpAMD64SUBLconst
631 OpAMD64MULQ
632 OpAMD64MULL
633 OpAMD64MULQconst
634 OpAMD64MULLconst
635 OpAMD64MULLU
636 OpAMD64MULQU
637 OpAMD64HMULQ
638 OpAMD64HMULL
639 OpAMD64HMULQU
640 OpAMD64HMULLU
641 OpAMD64AVGQU
642 OpAMD64DIVQ
643 OpAMD64DIVL
644 OpAMD64DIVW
645 OpAMD64DIVQU
646 OpAMD64DIVLU
647 OpAMD64DIVWU
648 OpAMD64NEGLflags
649 OpAMD64ADDQcarry
650 OpAMD64ADCQ
651 OpAMD64ADDQconstcarry
652 OpAMD64ADCQconst
653 OpAMD64SUBQborrow
654 OpAMD64SBBQ
655 OpAMD64SUBQconstborrow
656 OpAMD64SBBQconst
657 OpAMD64MULQU2
658 OpAMD64DIVQU2
659 OpAMD64ANDQ
660 OpAMD64ANDL
661 OpAMD64ANDQconst
662 OpAMD64ANDLconst
663 OpAMD64ANDQconstmodify
664 OpAMD64ANDLconstmodify
665 OpAMD64ORQ
666 OpAMD64ORL
667 OpAMD64ORQconst
668 OpAMD64ORLconst
669 OpAMD64ORQconstmodify
670 OpAMD64ORLconstmodify
671 OpAMD64XORQ
672 OpAMD64XORL
673 OpAMD64XORQconst
674 OpAMD64XORLconst
675 OpAMD64XORQconstmodify
676 OpAMD64XORLconstmodify
677 OpAMD64CMPQ
678 OpAMD64CMPL
679 OpAMD64CMPW
680 OpAMD64CMPB
681 OpAMD64CMPQconst
682 OpAMD64CMPLconst
683 OpAMD64CMPWconst
684 OpAMD64CMPBconst
685 OpAMD64CMPQload
686 OpAMD64CMPLload
687 OpAMD64CMPWload
688 OpAMD64CMPBload
689 OpAMD64CMPQconstload
690 OpAMD64CMPLconstload
691 OpAMD64CMPWconstload
692 OpAMD64CMPBconstload
693 OpAMD64CMPQloadidx8
694 OpAMD64CMPQloadidx1
695 OpAMD64CMPLloadidx4
696 OpAMD64CMPLloadidx1
697 OpAMD64CMPWloadidx2
698 OpAMD64CMPWloadidx1
699 OpAMD64CMPBloadidx1
700 OpAMD64CMPQconstloadidx8
701 OpAMD64CMPQconstloadidx1
702 OpAMD64CMPLconstloadidx4
703 OpAMD64CMPLconstloadidx1
704 OpAMD64CMPWconstloadidx2
705 OpAMD64CMPWconstloadidx1
706 OpAMD64CMPBconstloadidx1
707 OpAMD64UCOMISS
708 OpAMD64UCOMISD
709 OpAMD64BTL
710 OpAMD64BTQ
711 OpAMD64BTCL
712 OpAMD64BTCQ
713 OpAMD64BTRL
714 OpAMD64BTRQ
715 OpAMD64BTSL
716 OpAMD64BTSQ
717 OpAMD64BTLconst
718 OpAMD64BTQconst
719 OpAMD64BTCQconst
720 OpAMD64BTRQconst
721 OpAMD64BTSQconst
722 OpAMD64BTSQconstmodify
723 OpAMD64BTRQconstmodify
724 OpAMD64BTCQconstmodify
725 OpAMD64TESTQ
726 OpAMD64TESTL
727 OpAMD64TESTW
728 OpAMD64TESTB
729 OpAMD64TESTQconst
730 OpAMD64TESTLconst
731 OpAMD64TESTWconst
732 OpAMD64TESTBconst
733 OpAMD64SHLQ
734 OpAMD64SHLL
735 OpAMD64SHLQconst
736 OpAMD64SHLLconst
737 OpAMD64SHRQ
738 OpAMD64SHRL
739 OpAMD64SHRW
740 OpAMD64SHRB
741 OpAMD64SHRQconst
742 OpAMD64SHRLconst
743 OpAMD64SHRWconst
744 OpAMD64SHRBconst
745 OpAMD64SARQ
746 OpAMD64SARL
747 OpAMD64SARW
748 OpAMD64SARB
749 OpAMD64SARQconst
750 OpAMD64SARLconst
751 OpAMD64SARWconst
752 OpAMD64SARBconst
753 OpAMD64SHRDQ
754 OpAMD64SHLDQ
755 OpAMD64ROLQ
756 OpAMD64ROLL
757 OpAMD64ROLW
758 OpAMD64ROLB
759 OpAMD64RORQ
760 OpAMD64RORL
761 OpAMD64RORW
762 OpAMD64RORB
763 OpAMD64ROLQconst
764 OpAMD64ROLLconst
765 OpAMD64ROLWconst
766 OpAMD64ROLBconst
767 OpAMD64ADDLload
768 OpAMD64ADDQload
769 OpAMD64SUBQload
770 OpAMD64SUBLload
771 OpAMD64ANDLload
772 OpAMD64ANDQload
773 OpAMD64ORQload
774 OpAMD64ORLload
775 OpAMD64XORQload
776 OpAMD64XORLload
777 OpAMD64ADDLloadidx1
778 OpAMD64ADDLloadidx4
779 OpAMD64ADDLloadidx8
780 OpAMD64ADDQloadidx1
781 OpAMD64ADDQloadidx8
782 OpAMD64SUBLloadidx1
783 OpAMD64SUBLloadidx4
784 OpAMD64SUBLloadidx8
785 OpAMD64SUBQloadidx1
786 OpAMD64SUBQloadidx8
787 OpAMD64ANDLloadidx1
788 OpAMD64ANDLloadidx4
789 OpAMD64ANDLloadidx8
790 OpAMD64ANDQloadidx1
791 OpAMD64ANDQloadidx8
792 OpAMD64ORLloadidx1
793 OpAMD64ORLloadidx4
794 OpAMD64ORLloadidx8
795 OpAMD64ORQloadidx1
796 OpAMD64ORQloadidx8
797 OpAMD64XORLloadidx1
798 OpAMD64XORLloadidx4
799 OpAMD64XORLloadidx8
800 OpAMD64XORQloadidx1
801 OpAMD64XORQloadidx8
802 OpAMD64ADDQmodify
803 OpAMD64SUBQmodify
804 OpAMD64ANDQmodify
805 OpAMD64ORQmodify
806 OpAMD64XORQmodify
807 OpAMD64ADDLmodify
808 OpAMD64SUBLmodify
809 OpAMD64ANDLmodify
810 OpAMD64ORLmodify
811 OpAMD64XORLmodify
812 OpAMD64ADDQmodifyidx1
813 OpAMD64ADDQmodifyidx8
814 OpAMD64SUBQmodifyidx1
815 OpAMD64SUBQmodifyidx8
816 OpAMD64ANDQmodifyidx1
817 OpAMD64ANDQmodifyidx8
818 OpAMD64ORQmodifyidx1
819 OpAMD64ORQmodifyidx8
820 OpAMD64XORQmodifyidx1
821 OpAMD64XORQmodifyidx8
822 OpAMD64ADDLmodifyidx1
823 OpAMD64ADDLmodifyidx4
824 OpAMD64ADDLmodifyidx8
825 OpAMD64SUBLmodifyidx1
826 OpAMD64SUBLmodifyidx4
827 OpAMD64SUBLmodifyidx8
828 OpAMD64ANDLmodifyidx1
829 OpAMD64ANDLmodifyidx4
830 OpAMD64ANDLmodifyidx8
831 OpAMD64ORLmodifyidx1
832 OpAMD64ORLmodifyidx4
833 OpAMD64ORLmodifyidx8
834 OpAMD64XORLmodifyidx1
835 OpAMD64XORLmodifyidx4
836 OpAMD64XORLmodifyidx8
837 OpAMD64ADDQconstmodifyidx1
838 OpAMD64ADDQconstmodifyidx8
839 OpAMD64ANDQconstmodifyidx1
840 OpAMD64ANDQconstmodifyidx8
841 OpAMD64ORQconstmodifyidx1
842 OpAMD64ORQconstmodifyidx8
843 OpAMD64XORQconstmodifyidx1
844 OpAMD64XORQconstmodifyidx8
845 OpAMD64ADDLconstmodifyidx1
846 OpAMD64ADDLconstmodifyidx4
847 OpAMD64ADDLconstmodifyidx8
848 OpAMD64ANDLconstmodifyidx1
849 OpAMD64ANDLconstmodifyidx4
850 OpAMD64ANDLconstmodifyidx8
851 OpAMD64ORLconstmodifyidx1
852 OpAMD64ORLconstmodifyidx4
853 OpAMD64ORLconstmodifyidx8
854 OpAMD64XORLconstmodifyidx1
855 OpAMD64XORLconstmodifyidx4
856 OpAMD64XORLconstmodifyidx8
857 OpAMD64NEGQ
858 OpAMD64NEGL
859 OpAMD64NOTQ
860 OpAMD64NOTL
861 OpAMD64BSFQ
862 OpAMD64BSFL
863 OpAMD64BSRQ
864 OpAMD64BSRL
865 OpAMD64CMOVQEQ
866 OpAMD64CMOVQNE
867 OpAMD64CMOVQLT
868 OpAMD64CMOVQGT
869 OpAMD64CMOVQLE
870 OpAMD64CMOVQGE
871 OpAMD64CMOVQLS
872 OpAMD64CMOVQHI
873 OpAMD64CMOVQCC
874 OpAMD64CMOVQCS
875 OpAMD64CMOVLEQ
876 OpAMD64CMOVLNE
877 OpAMD64CMOVLLT
878 OpAMD64CMOVLGT
879 OpAMD64CMOVLLE
880 OpAMD64CMOVLGE
881 OpAMD64CMOVLLS
882 OpAMD64CMOVLHI
883 OpAMD64CMOVLCC
884 OpAMD64CMOVLCS
885 OpAMD64CMOVWEQ
886 OpAMD64CMOVWNE
887 OpAMD64CMOVWLT
888 OpAMD64CMOVWGT
889 OpAMD64CMOVWLE
890 OpAMD64CMOVWGE
891 OpAMD64CMOVWLS
892 OpAMD64CMOVWHI
893 OpAMD64CMOVWCC
894 OpAMD64CMOVWCS
895 OpAMD64CMOVQEQF
896 OpAMD64CMOVQNEF
897 OpAMD64CMOVQGTF
898 OpAMD64CMOVQGEF
899 OpAMD64CMOVLEQF
900 OpAMD64CMOVLNEF
901 OpAMD64CMOVLGTF
902 OpAMD64CMOVLGEF
903 OpAMD64CMOVWEQF
904 OpAMD64CMOVWNEF
905 OpAMD64CMOVWGTF
906 OpAMD64CMOVWGEF
907 OpAMD64BSWAPQ
908 OpAMD64BSWAPL
909 OpAMD64POPCNTQ
910 OpAMD64POPCNTL
911 OpAMD64SQRTSD
912 OpAMD64SQRTSS
913 OpAMD64ROUNDSD
914 OpAMD64VFMADD231SD
915 OpAMD64MINSD
916 OpAMD64MINSS
917 OpAMD64SBBQcarrymask
918 OpAMD64SBBLcarrymask
919 OpAMD64SETEQ
920 OpAMD64SETNE
921 OpAMD64SETL
922 OpAMD64SETLE
923 OpAMD64SETG
924 OpAMD64SETGE
925 OpAMD64SETB
926 OpAMD64SETBE
927 OpAMD64SETA
928 OpAMD64SETAE
929 OpAMD64SETO
930 OpAMD64SETEQstore
931 OpAMD64SETNEstore
932 OpAMD64SETLstore
933 OpAMD64SETLEstore
934 OpAMD64SETGstore
935 OpAMD64SETGEstore
936 OpAMD64SETBstore
937 OpAMD64SETBEstore
938 OpAMD64SETAstore
939 OpAMD64SETAEstore
940 OpAMD64SETEQstoreidx1
941 OpAMD64SETNEstoreidx1
942 OpAMD64SETLstoreidx1
943 OpAMD64SETLEstoreidx1
944 OpAMD64SETGstoreidx1
945 OpAMD64SETGEstoreidx1
946 OpAMD64SETBstoreidx1
947 OpAMD64SETBEstoreidx1
948 OpAMD64SETAstoreidx1
949 OpAMD64SETAEstoreidx1
950 OpAMD64SETEQF
951 OpAMD64SETNEF
952 OpAMD64SETORD
953 OpAMD64SETNAN
954 OpAMD64SETGF
955 OpAMD64SETGEF
956 OpAMD64MOVBQSX
957 OpAMD64MOVBQZX
958 OpAMD64MOVWQSX
959 OpAMD64MOVWQZX
960 OpAMD64MOVLQSX
961 OpAMD64MOVLQZX
962 OpAMD64MOVLconst
963 OpAMD64MOVQconst
964 OpAMD64CVTTSD2SL
965 OpAMD64CVTTSD2SQ
966 OpAMD64CVTTSS2SL
967 OpAMD64CVTTSS2SQ
968 OpAMD64CVTSL2SS
969 OpAMD64CVTSL2SD
970 OpAMD64CVTSQ2SS
971 OpAMD64CVTSQ2SD
972 OpAMD64CVTSD2SS
973 OpAMD64CVTSS2SD
974 OpAMD64MOVQi2f
975 OpAMD64MOVQf2i
976 OpAMD64MOVLi2f
977 OpAMD64MOVLf2i
978 OpAMD64PXOR
979 OpAMD64POR
980 OpAMD64LEAQ
981 OpAMD64LEAL
982 OpAMD64LEAW
983 OpAMD64LEAQ1
984 OpAMD64LEAL1
985 OpAMD64LEAW1
986 OpAMD64LEAQ2
987 OpAMD64LEAL2
988 OpAMD64LEAW2
989 OpAMD64LEAQ4
990 OpAMD64LEAL4
991 OpAMD64LEAW4
992 OpAMD64LEAQ8
993 OpAMD64LEAL8
994 OpAMD64LEAW8
995 OpAMD64MOVBload
996 OpAMD64MOVBQSXload
997 OpAMD64MOVWload
998 OpAMD64MOVWQSXload
999 OpAMD64MOVLload
1000 OpAMD64MOVLQSXload
1001 OpAMD64MOVQload
1002 OpAMD64MOVBstore
1003 OpAMD64MOVWstore
1004 OpAMD64MOVLstore
1005 OpAMD64MOVQstore
1006 OpAMD64MOVOload
1007 OpAMD64MOVOstore
1008 OpAMD64MOVBloadidx1
1009 OpAMD64MOVWloadidx1
1010 OpAMD64MOVWloadidx2
1011 OpAMD64MOVLloadidx1
1012 OpAMD64MOVLloadidx4
1013 OpAMD64MOVLloadidx8
1014 OpAMD64MOVQloadidx1
1015 OpAMD64MOVQloadidx8
1016 OpAMD64MOVBstoreidx1
1017 OpAMD64MOVWstoreidx1
1018 OpAMD64MOVWstoreidx2
1019 OpAMD64MOVLstoreidx1
1020 OpAMD64MOVLstoreidx4
1021 OpAMD64MOVLstoreidx8
1022 OpAMD64MOVQstoreidx1
1023 OpAMD64MOVQstoreidx8
1024 OpAMD64MOVBstoreconst
1025 OpAMD64MOVWstoreconst
1026 OpAMD64MOVLstoreconst
1027 OpAMD64MOVQstoreconst
1028 OpAMD64MOVOstoreconst
1029 OpAMD64MOVBstoreconstidx1
1030 OpAMD64MOVWstoreconstidx1
1031 OpAMD64MOVWstoreconstidx2
1032 OpAMD64MOVLstoreconstidx1
1033 OpAMD64MOVLstoreconstidx4
1034 OpAMD64MOVQstoreconstidx1
1035 OpAMD64MOVQstoreconstidx8
1036 OpAMD64DUFFZERO
1037 OpAMD64REPSTOSQ
1038 OpAMD64CALLstatic
1039 OpAMD64CALLtail
1040 OpAMD64CALLclosure
1041 OpAMD64CALLinter
1042 OpAMD64DUFFCOPY
1043 OpAMD64REPMOVSQ
1044 OpAMD64InvertFlags
1045 OpAMD64LoweredGetG
1046 OpAMD64LoweredGetClosurePtr
1047 OpAMD64LoweredGetCallerPC
1048 OpAMD64LoweredGetCallerSP
1049 OpAMD64LoweredNilCheck
1050 OpAMD64LoweredWB
1051 OpAMD64LoweredHasCPUFeature
1052 OpAMD64LoweredPanicBoundsA
1053 OpAMD64LoweredPanicBoundsB
1054 OpAMD64LoweredPanicBoundsC
1055 OpAMD64FlagEQ
1056 OpAMD64FlagLT_ULT
1057 OpAMD64FlagLT_UGT
1058 OpAMD64FlagGT_UGT
1059 OpAMD64FlagGT_ULT
1060 OpAMD64MOVBatomicload
1061 OpAMD64MOVLatomicload
1062 OpAMD64MOVQatomicload
1063 OpAMD64XCHGB
1064 OpAMD64XCHGL
1065 OpAMD64XCHGQ
1066 OpAMD64XADDLlock
1067 OpAMD64XADDQlock
1068 OpAMD64AddTupleFirst32
1069 OpAMD64AddTupleFirst64
1070 OpAMD64CMPXCHGLlock
1071 OpAMD64CMPXCHGQlock
1072 OpAMD64ANDBlock
1073 OpAMD64ANDLlock
1074 OpAMD64ORBlock
1075 OpAMD64ORLlock
1076 OpAMD64PrefetchT0
1077 OpAMD64PrefetchNTA
1078 OpAMD64ANDNQ
1079 OpAMD64ANDNL
1080 OpAMD64BLSIQ
1081 OpAMD64BLSIL
1082 OpAMD64BLSMSKQ
1083 OpAMD64BLSMSKL
1084 OpAMD64BLSRQ
1085 OpAMD64BLSRL
1086 OpAMD64TZCNTQ
1087 OpAMD64TZCNTL
1088 OpAMD64LZCNTQ
1089 OpAMD64LZCNTL
1090 OpAMD64MOVBEWstore
1091 OpAMD64MOVBELload
1092 OpAMD64MOVBELstore
1093 OpAMD64MOVBEQload
1094 OpAMD64MOVBEQstore
1095 OpAMD64MOVBELloadidx1
1096 OpAMD64MOVBELloadidx4
1097 OpAMD64MOVBELloadidx8
1098 OpAMD64MOVBEQloadidx1
1099 OpAMD64MOVBEQloadidx8
1100 OpAMD64MOVBEWstoreidx1
1101 OpAMD64MOVBEWstoreidx2
1102 OpAMD64MOVBELstoreidx1
1103 OpAMD64MOVBELstoreidx4
1104 OpAMD64MOVBELstoreidx8
1105 OpAMD64MOVBEQstoreidx1
1106 OpAMD64MOVBEQstoreidx8
1107 OpAMD64SARXQ
1108 OpAMD64SARXL
1109 OpAMD64SHLXQ
1110 OpAMD64SHLXL
1111 OpAMD64SHRXQ
1112 OpAMD64SHRXL
1113 OpAMD64SARXLload
1114 OpAMD64SARXQload
1115 OpAMD64SHLXLload
1116 OpAMD64SHLXQload
1117 OpAMD64SHRXLload
1118 OpAMD64SHRXQload
1119 OpAMD64SARXLloadidx1
1120 OpAMD64SARXLloadidx4
1121 OpAMD64SARXLloadidx8
1122 OpAMD64SARXQloadidx1
1123 OpAMD64SARXQloadidx8
1124 OpAMD64SHLXLloadidx1
1125 OpAMD64SHLXLloadidx4
1126 OpAMD64SHLXLloadidx8
1127 OpAMD64SHLXQloadidx1
1128 OpAMD64SHLXQloadidx8
1129 OpAMD64SHRXLloadidx1
1130 OpAMD64SHRXLloadidx4
1131 OpAMD64SHRXLloadidx8
1132 OpAMD64SHRXQloadidx1
1133 OpAMD64SHRXQloadidx8
1134
1135 OpARMADD
1136 OpARMADDconst
1137 OpARMSUB
1138 OpARMSUBconst
1139 OpARMRSB
1140 OpARMRSBconst
1141 OpARMMUL
1142 OpARMHMUL
1143 OpARMHMULU
1144 OpARMCALLudiv
1145 OpARMADDS
1146 OpARMADDSconst
1147 OpARMADC
1148 OpARMADCconst
1149 OpARMSUBS
1150 OpARMSUBSconst
1151 OpARMRSBSconst
1152 OpARMSBC
1153 OpARMSBCconst
1154 OpARMRSCconst
1155 OpARMMULLU
1156 OpARMMULA
1157 OpARMMULS
1158 OpARMADDF
1159 OpARMADDD
1160 OpARMSUBF
1161 OpARMSUBD
1162 OpARMMULF
1163 OpARMMULD
1164 OpARMNMULF
1165 OpARMNMULD
1166 OpARMDIVF
1167 OpARMDIVD
1168 OpARMMULAF
1169 OpARMMULAD
1170 OpARMMULSF
1171 OpARMMULSD
1172 OpARMFMULAD
1173 OpARMAND
1174 OpARMANDconst
1175 OpARMOR
1176 OpARMORconst
1177 OpARMXOR
1178 OpARMXORconst
1179 OpARMBIC
1180 OpARMBICconst
1181 OpARMBFX
1182 OpARMBFXU
1183 OpARMMVN
1184 OpARMNEGF
1185 OpARMNEGD
1186 OpARMSQRTD
1187 OpARMSQRTF
1188 OpARMABSD
1189 OpARMCLZ
1190 OpARMREV
1191 OpARMREV16
1192 OpARMRBIT
1193 OpARMSLL
1194 OpARMSLLconst
1195 OpARMSRL
1196 OpARMSRLconst
1197 OpARMSRA
1198 OpARMSRAconst
1199 OpARMSRR
1200 OpARMSRRconst
1201 OpARMADDshiftLL
1202 OpARMADDshiftRL
1203 OpARMADDshiftRA
1204 OpARMSUBshiftLL
1205 OpARMSUBshiftRL
1206 OpARMSUBshiftRA
1207 OpARMRSBshiftLL
1208 OpARMRSBshiftRL
1209 OpARMRSBshiftRA
1210 OpARMANDshiftLL
1211 OpARMANDshiftRL
1212 OpARMANDshiftRA
1213 OpARMORshiftLL
1214 OpARMORshiftRL
1215 OpARMORshiftRA
1216 OpARMXORshiftLL
1217 OpARMXORshiftRL
1218 OpARMXORshiftRA
1219 OpARMXORshiftRR
1220 OpARMBICshiftLL
1221 OpARMBICshiftRL
1222 OpARMBICshiftRA
1223 OpARMMVNshiftLL
1224 OpARMMVNshiftRL
1225 OpARMMVNshiftRA
1226 OpARMADCshiftLL
1227 OpARMADCshiftRL
1228 OpARMADCshiftRA
1229 OpARMSBCshiftLL
1230 OpARMSBCshiftRL
1231 OpARMSBCshiftRA
1232 OpARMRSCshiftLL
1233 OpARMRSCshiftRL
1234 OpARMRSCshiftRA
1235 OpARMADDSshiftLL
1236 OpARMADDSshiftRL
1237 OpARMADDSshiftRA
1238 OpARMSUBSshiftLL
1239 OpARMSUBSshiftRL
1240 OpARMSUBSshiftRA
1241 OpARMRSBSshiftLL
1242 OpARMRSBSshiftRL
1243 OpARMRSBSshiftRA
1244 OpARMADDshiftLLreg
1245 OpARMADDshiftRLreg
1246 OpARMADDshiftRAreg
1247 OpARMSUBshiftLLreg
1248 OpARMSUBshiftRLreg
1249 OpARMSUBshiftRAreg
1250 OpARMRSBshiftLLreg
1251 OpARMRSBshiftRLreg
1252 OpARMRSBshiftRAreg
1253 OpARMANDshiftLLreg
1254 OpARMANDshiftRLreg
1255 OpARMANDshiftRAreg
1256 OpARMORshiftLLreg
1257 OpARMORshiftRLreg
1258 OpARMORshiftRAreg
1259 OpARMXORshiftLLreg
1260 OpARMXORshiftRLreg
1261 OpARMXORshiftRAreg
1262 OpARMBICshiftLLreg
1263 OpARMBICshiftRLreg
1264 OpARMBICshiftRAreg
1265 OpARMMVNshiftLLreg
1266 OpARMMVNshiftRLreg
1267 OpARMMVNshiftRAreg
1268 OpARMADCshiftLLreg
1269 OpARMADCshiftRLreg
1270 OpARMADCshiftRAreg
1271 OpARMSBCshiftLLreg
1272 OpARMSBCshiftRLreg
1273 OpARMSBCshiftRAreg
1274 OpARMRSCshiftLLreg
1275 OpARMRSCshiftRLreg
1276 OpARMRSCshiftRAreg
1277 OpARMADDSshiftLLreg
1278 OpARMADDSshiftRLreg
1279 OpARMADDSshiftRAreg
1280 OpARMSUBSshiftLLreg
1281 OpARMSUBSshiftRLreg
1282 OpARMSUBSshiftRAreg
1283 OpARMRSBSshiftLLreg
1284 OpARMRSBSshiftRLreg
1285 OpARMRSBSshiftRAreg
1286 OpARMCMP
1287 OpARMCMPconst
1288 OpARMCMN
1289 OpARMCMNconst
1290 OpARMTST
1291 OpARMTSTconst
1292 OpARMTEQ
1293 OpARMTEQconst
1294 OpARMCMPF
1295 OpARMCMPD
1296 OpARMCMPshiftLL
1297 OpARMCMPshiftRL
1298 OpARMCMPshiftRA
1299 OpARMCMNshiftLL
1300 OpARMCMNshiftRL
1301 OpARMCMNshiftRA
1302 OpARMTSTshiftLL
1303 OpARMTSTshiftRL
1304 OpARMTSTshiftRA
1305 OpARMTEQshiftLL
1306 OpARMTEQshiftRL
1307 OpARMTEQshiftRA
1308 OpARMCMPshiftLLreg
1309 OpARMCMPshiftRLreg
1310 OpARMCMPshiftRAreg
1311 OpARMCMNshiftLLreg
1312 OpARMCMNshiftRLreg
1313 OpARMCMNshiftRAreg
1314 OpARMTSTshiftLLreg
1315 OpARMTSTshiftRLreg
1316 OpARMTSTshiftRAreg
1317 OpARMTEQshiftLLreg
1318 OpARMTEQshiftRLreg
1319 OpARMTEQshiftRAreg
1320 OpARMCMPF0
1321 OpARMCMPD0
1322 OpARMMOVWconst
1323 OpARMMOVFconst
1324 OpARMMOVDconst
1325 OpARMMOVWaddr
1326 OpARMMOVBload
1327 OpARMMOVBUload
1328 OpARMMOVHload
1329 OpARMMOVHUload
1330 OpARMMOVWload
1331 OpARMMOVFload
1332 OpARMMOVDload
1333 OpARMMOVBstore
1334 OpARMMOVHstore
1335 OpARMMOVWstore
1336 OpARMMOVFstore
1337 OpARMMOVDstore
1338 OpARMMOVWloadidx
1339 OpARMMOVWloadshiftLL
1340 OpARMMOVWloadshiftRL
1341 OpARMMOVWloadshiftRA
1342 OpARMMOVBUloadidx
1343 OpARMMOVBloadidx
1344 OpARMMOVHUloadidx
1345 OpARMMOVHloadidx
1346 OpARMMOVWstoreidx
1347 OpARMMOVWstoreshiftLL
1348 OpARMMOVWstoreshiftRL
1349 OpARMMOVWstoreshiftRA
1350 OpARMMOVBstoreidx
1351 OpARMMOVHstoreidx
1352 OpARMMOVBreg
1353 OpARMMOVBUreg
1354 OpARMMOVHreg
1355 OpARMMOVHUreg
1356 OpARMMOVWreg
1357 OpARMMOVWnop
1358 OpARMMOVWF
1359 OpARMMOVWD
1360 OpARMMOVWUF
1361 OpARMMOVWUD
1362 OpARMMOVFW
1363 OpARMMOVDW
1364 OpARMMOVFWU
1365 OpARMMOVDWU
1366 OpARMMOVFD
1367 OpARMMOVDF
1368 OpARMCMOVWHSconst
1369 OpARMCMOVWLSconst
1370 OpARMSRAcond
1371 OpARMCALLstatic
1372 OpARMCALLtail
1373 OpARMCALLclosure
1374 OpARMCALLinter
1375 OpARMLoweredNilCheck
1376 OpARMEqual
1377 OpARMNotEqual
1378 OpARMLessThan
1379 OpARMLessEqual
1380 OpARMGreaterThan
1381 OpARMGreaterEqual
1382 OpARMLessThanU
1383 OpARMLessEqualU
1384 OpARMGreaterThanU
1385 OpARMGreaterEqualU
1386 OpARMDUFFZERO
1387 OpARMDUFFCOPY
1388 OpARMLoweredZero
1389 OpARMLoweredMove
1390 OpARMLoweredGetClosurePtr
1391 OpARMLoweredGetCallerSP
1392 OpARMLoweredGetCallerPC
1393 OpARMLoweredPanicBoundsA
1394 OpARMLoweredPanicBoundsB
1395 OpARMLoweredPanicBoundsC
1396 OpARMLoweredPanicExtendA
1397 OpARMLoweredPanicExtendB
1398 OpARMLoweredPanicExtendC
1399 OpARMFlagConstant
1400 OpARMInvertFlags
1401 OpARMLoweredWB
1402
1403 OpARM64ADCSflags
1404 OpARM64ADCzerocarry
1405 OpARM64ADD
1406 OpARM64ADDconst
1407 OpARM64ADDSconstflags
1408 OpARM64ADDSflags
1409 OpARM64SUB
1410 OpARM64SUBconst
1411 OpARM64SBCSflags
1412 OpARM64SUBSflags
1413 OpARM64MUL
1414 OpARM64MULW
1415 OpARM64MNEG
1416 OpARM64MNEGW
1417 OpARM64MULH
1418 OpARM64UMULH
1419 OpARM64MULL
1420 OpARM64UMULL
1421 OpARM64DIV
1422 OpARM64UDIV
1423 OpARM64DIVW
1424 OpARM64UDIVW
1425 OpARM64MOD
1426 OpARM64UMOD
1427 OpARM64MODW
1428 OpARM64UMODW
1429 OpARM64FADDS
1430 OpARM64FADDD
1431 OpARM64FSUBS
1432 OpARM64FSUBD
1433 OpARM64FMULS
1434 OpARM64FMULD
1435 OpARM64FNMULS
1436 OpARM64FNMULD
1437 OpARM64FDIVS
1438 OpARM64FDIVD
1439 OpARM64AND
1440 OpARM64ANDconst
1441 OpARM64OR
1442 OpARM64ORconst
1443 OpARM64XOR
1444 OpARM64XORconst
1445 OpARM64BIC
1446 OpARM64EON
1447 OpARM64ORN
1448 OpARM64MVN
1449 OpARM64NEG
1450 OpARM64NEGSflags
1451 OpARM64NGCzerocarry
1452 OpARM64FABSD
1453 OpARM64FNEGS
1454 OpARM64FNEGD
1455 OpARM64FSQRTD
1456 OpARM64FSQRTS
1457 OpARM64FMIND
1458 OpARM64FMINS
1459 OpARM64FMAXD
1460 OpARM64FMAXS
1461 OpARM64REV
1462 OpARM64REVW
1463 OpARM64REV16
1464 OpARM64REV16W
1465 OpARM64RBIT
1466 OpARM64RBITW
1467 OpARM64CLZ
1468 OpARM64CLZW
1469 OpARM64VCNT
1470 OpARM64VUADDLV
1471 OpARM64LoweredRound32F
1472 OpARM64LoweredRound64F
1473 OpARM64FMADDS
1474 OpARM64FMADDD
1475 OpARM64FNMADDS
1476 OpARM64FNMADDD
1477 OpARM64FMSUBS
1478 OpARM64FMSUBD
1479 OpARM64FNMSUBS
1480 OpARM64FNMSUBD
1481 OpARM64MADD
1482 OpARM64MADDW
1483 OpARM64MSUB
1484 OpARM64MSUBW
1485 OpARM64SLL
1486 OpARM64SLLconst
1487 OpARM64SRL
1488 OpARM64SRLconst
1489 OpARM64SRA
1490 OpARM64SRAconst
1491 OpARM64ROR
1492 OpARM64RORW
1493 OpARM64RORconst
1494 OpARM64RORWconst
1495 OpARM64EXTRconst
1496 OpARM64EXTRWconst
1497 OpARM64CMP
1498 OpARM64CMPconst
1499 OpARM64CMPW
1500 OpARM64CMPWconst
1501 OpARM64CMN
1502 OpARM64CMNconst
1503 OpARM64CMNW
1504 OpARM64CMNWconst
1505 OpARM64TST
1506 OpARM64TSTconst
1507 OpARM64TSTW
1508 OpARM64TSTWconst
1509 OpARM64FCMPS
1510 OpARM64FCMPD
1511 OpARM64FCMPS0
1512 OpARM64FCMPD0
1513 OpARM64MVNshiftLL
1514 OpARM64MVNshiftRL
1515 OpARM64MVNshiftRA
1516 OpARM64MVNshiftRO
1517 OpARM64NEGshiftLL
1518 OpARM64NEGshiftRL
1519 OpARM64NEGshiftRA
1520 OpARM64ADDshiftLL
1521 OpARM64ADDshiftRL
1522 OpARM64ADDshiftRA
1523 OpARM64SUBshiftLL
1524 OpARM64SUBshiftRL
1525 OpARM64SUBshiftRA
1526 OpARM64ANDshiftLL
1527 OpARM64ANDshiftRL
1528 OpARM64ANDshiftRA
1529 OpARM64ANDshiftRO
1530 OpARM64ORshiftLL
1531 OpARM64ORshiftRL
1532 OpARM64ORshiftRA
1533 OpARM64ORshiftRO
1534 OpARM64XORshiftLL
1535 OpARM64XORshiftRL
1536 OpARM64XORshiftRA
1537 OpARM64XORshiftRO
1538 OpARM64BICshiftLL
1539 OpARM64BICshiftRL
1540 OpARM64BICshiftRA
1541 OpARM64BICshiftRO
1542 OpARM64EONshiftLL
1543 OpARM64EONshiftRL
1544 OpARM64EONshiftRA
1545 OpARM64EONshiftRO
1546 OpARM64ORNshiftLL
1547 OpARM64ORNshiftRL
1548 OpARM64ORNshiftRA
1549 OpARM64ORNshiftRO
1550 OpARM64CMPshiftLL
1551 OpARM64CMPshiftRL
1552 OpARM64CMPshiftRA
1553 OpARM64CMNshiftLL
1554 OpARM64CMNshiftRL
1555 OpARM64CMNshiftRA
1556 OpARM64TSTshiftLL
1557 OpARM64TSTshiftRL
1558 OpARM64TSTshiftRA
1559 OpARM64TSTshiftRO
1560 OpARM64BFI
1561 OpARM64BFXIL
1562 OpARM64SBFIZ
1563 OpARM64SBFX
1564 OpARM64UBFIZ
1565 OpARM64UBFX
1566 OpARM64MOVDconst
1567 OpARM64FMOVSconst
1568 OpARM64FMOVDconst
1569 OpARM64MOVDaddr
1570 OpARM64MOVBload
1571 OpARM64MOVBUload
1572 OpARM64MOVHload
1573 OpARM64MOVHUload
1574 OpARM64MOVWload
1575 OpARM64MOVWUload
1576 OpARM64MOVDload
1577 OpARM64LDP
1578 OpARM64FMOVSload
1579 OpARM64FMOVDload
1580 OpARM64MOVDloadidx
1581 OpARM64MOVWloadidx
1582 OpARM64MOVWUloadidx
1583 OpARM64MOVHloadidx
1584 OpARM64MOVHUloadidx
1585 OpARM64MOVBloadidx
1586 OpARM64MOVBUloadidx
1587 OpARM64FMOVSloadidx
1588 OpARM64FMOVDloadidx
1589 OpARM64MOVHloadidx2
1590 OpARM64MOVHUloadidx2
1591 OpARM64MOVWloadidx4
1592 OpARM64MOVWUloadidx4
1593 OpARM64MOVDloadidx8
1594 OpARM64FMOVSloadidx4
1595 OpARM64FMOVDloadidx8
1596 OpARM64MOVBstore
1597 OpARM64MOVHstore
1598 OpARM64MOVWstore
1599 OpARM64MOVDstore
1600 OpARM64STP
1601 OpARM64FMOVSstore
1602 OpARM64FMOVDstore
1603 OpARM64MOVBstoreidx
1604 OpARM64MOVHstoreidx
1605 OpARM64MOVWstoreidx
1606 OpARM64MOVDstoreidx
1607 OpARM64FMOVSstoreidx
1608 OpARM64FMOVDstoreidx
1609 OpARM64MOVHstoreidx2
1610 OpARM64MOVWstoreidx4
1611 OpARM64MOVDstoreidx8
1612 OpARM64FMOVSstoreidx4
1613 OpARM64FMOVDstoreidx8
1614 OpARM64MOVBstorezero
1615 OpARM64MOVHstorezero
1616 OpARM64MOVWstorezero
1617 OpARM64MOVDstorezero
1618 OpARM64MOVQstorezero
1619 OpARM64MOVBstorezeroidx
1620 OpARM64MOVHstorezeroidx
1621 OpARM64MOVWstorezeroidx
1622 OpARM64MOVDstorezeroidx
1623 OpARM64MOVHstorezeroidx2
1624 OpARM64MOVWstorezeroidx4
1625 OpARM64MOVDstorezeroidx8
1626 OpARM64FMOVDgpfp
1627 OpARM64FMOVDfpgp
1628 OpARM64FMOVSgpfp
1629 OpARM64FMOVSfpgp
1630 OpARM64MOVBreg
1631 OpARM64MOVBUreg
1632 OpARM64MOVHreg
1633 OpARM64MOVHUreg
1634 OpARM64MOVWreg
1635 OpARM64MOVWUreg
1636 OpARM64MOVDreg
1637 OpARM64MOVDnop
1638 OpARM64SCVTFWS
1639 OpARM64SCVTFWD
1640 OpARM64UCVTFWS
1641 OpARM64UCVTFWD
1642 OpARM64SCVTFS
1643 OpARM64SCVTFD
1644 OpARM64UCVTFS
1645 OpARM64UCVTFD
1646 OpARM64FCVTZSSW
1647 OpARM64FCVTZSDW
1648 OpARM64FCVTZUSW
1649 OpARM64FCVTZUDW
1650 OpARM64FCVTZSS
1651 OpARM64FCVTZSD
1652 OpARM64FCVTZUS
1653 OpARM64FCVTZUD
1654 OpARM64FCVTSD
1655 OpARM64FCVTDS
1656 OpARM64FRINTAD
1657 OpARM64FRINTMD
1658 OpARM64FRINTND
1659 OpARM64FRINTPD
1660 OpARM64FRINTZD
1661 OpARM64CSEL
1662 OpARM64CSEL0
1663 OpARM64CSINC
1664 OpARM64CSINV
1665 OpARM64CSNEG
1666 OpARM64CSETM
1667 OpARM64CALLstatic
1668 OpARM64CALLtail
1669 OpARM64CALLclosure
1670 OpARM64CALLinter
1671 OpARM64LoweredNilCheck
1672 OpARM64Equal
1673 OpARM64NotEqual
1674 OpARM64LessThan
1675 OpARM64LessEqual
1676 OpARM64GreaterThan
1677 OpARM64GreaterEqual
1678 OpARM64LessThanU
1679 OpARM64LessEqualU
1680 OpARM64GreaterThanU
1681 OpARM64GreaterEqualU
1682 OpARM64LessThanF
1683 OpARM64LessEqualF
1684 OpARM64GreaterThanF
1685 OpARM64GreaterEqualF
1686 OpARM64NotLessThanF
1687 OpARM64NotLessEqualF
1688 OpARM64NotGreaterThanF
1689 OpARM64NotGreaterEqualF
1690 OpARM64LessThanNoov
1691 OpARM64GreaterEqualNoov
1692 OpARM64DUFFZERO
1693 OpARM64LoweredZero
1694 OpARM64DUFFCOPY
1695 OpARM64LoweredMove
1696 OpARM64LoweredGetClosurePtr
1697 OpARM64LoweredGetCallerSP
1698 OpARM64LoweredGetCallerPC
1699 OpARM64FlagConstant
1700 OpARM64InvertFlags
1701 OpARM64LDAR
1702 OpARM64LDARB
1703 OpARM64LDARW
1704 OpARM64STLRB
1705 OpARM64STLR
1706 OpARM64STLRW
1707 OpARM64LoweredAtomicExchange64
1708 OpARM64LoweredAtomicExchange32
1709 OpARM64LoweredAtomicExchange64Variant
1710 OpARM64LoweredAtomicExchange32Variant
1711 OpARM64LoweredAtomicAdd64
1712 OpARM64LoweredAtomicAdd32
1713 OpARM64LoweredAtomicAdd64Variant
1714 OpARM64LoweredAtomicAdd32Variant
1715 OpARM64LoweredAtomicCas64
1716 OpARM64LoweredAtomicCas32
1717 OpARM64LoweredAtomicCas64Variant
1718 OpARM64LoweredAtomicCas32Variant
1719 OpARM64LoweredAtomicAnd8
1720 OpARM64LoweredAtomicAnd32
1721 OpARM64LoweredAtomicOr8
1722 OpARM64LoweredAtomicOr32
1723 OpARM64LoweredAtomicAnd8Variant
1724 OpARM64LoweredAtomicAnd32Variant
1725 OpARM64LoweredAtomicOr8Variant
1726 OpARM64LoweredAtomicOr32Variant
1727 OpARM64LoweredWB
1728 OpARM64LoweredPanicBoundsA
1729 OpARM64LoweredPanicBoundsB
1730 OpARM64LoweredPanicBoundsC
1731 OpARM64PRFM
1732 OpARM64DMB
1733
1734 OpLOONG64ADDV
1735 OpLOONG64ADDVconst
1736 OpLOONG64SUBV
1737 OpLOONG64SUBVconst
1738 OpLOONG64MULV
1739 OpLOONG64MULHV
1740 OpLOONG64MULHVU
1741 OpLOONG64DIVV
1742 OpLOONG64DIVVU
1743 OpLOONG64REMV
1744 OpLOONG64REMVU
1745 OpLOONG64ADDF
1746 OpLOONG64ADDD
1747 OpLOONG64SUBF
1748 OpLOONG64SUBD
1749 OpLOONG64MULF
1750 OpLOONG64MULD
1751 OpLOONG64DIVF
1752 OpLOONG64DIVD
1753 OpLOONG64AND
1754 OpLOONG64ANDconst
1755 OpLOONG64OR
1756 OpLOONG64ORconst
1757 OpLOONG64XOR
1758 OpLOONG64XORconst
1759 OpLOONG64NOR
1760 OpLOONG64NORconst
1761 OpLOONG64NEGV
1762 OpLOONG64NEGF
1763 OpLOONG64NEGD
1764 OpLOONG64SQRTD
1765 OpLOONG64SQRTF
1766 OpLOONG64MASKEQZ
1767 OpLOONG64MASKNEZ
1768 OpLOONG64SLLV
1769 OpLOONG64SLLVconst
1770 OpLOONG64SRLV
1771 OpLOONG64SRLVconst
1772 OpLOONG64SRAV
1773 OpLOONG64SRAVconst
1774 OpLOONG64ROTR
1775 OpLOONG64ROTRV
1776 OpLOONG64ROTRconst
1777 OpLOONG64ROTRVconst
1778 OpLOONG64SGT
1779 OpLOONG64SGTconst
1780 OpLOONG64SGTU
1781 OpLOONG64SGTUconst
1782 OpLOONG64CMPEQF
1783 OpLOONG64CMPEQD
1784 OpLOONG64CMPGEF
1785 OpLOONG64CMPGED
1786 OpLOONG64CMPGTF
1787 OpLOONG64CMPGTD
1788 OpLOONG64MOVVconst
1789 OpLOONG64MOVFconst
1790 OpLOONG64MOVDconst
1791 OpLOONG64MOVVaddr
1792 OpLOONG64MOVBload
1793 OpLOONG64MOVBUload
1794 OpLOONG64MOVHload
1795 OpLOONG64MOVHUload
1796 OpLOONG64MOVWload
1797 OpLOONG64MOVWUload
1798 OpLOONG64MOVVload
1799 OpLOONG64MOVFload
1800 OpLOONG64MOVDload
1801 OpLOONG64MOVBstore
1802 OpLOONG64MOVHstore
1803 OpLOONG64MOVWstore
1804 OpLOONG64MOVVstore
1805 OpLOONG64MOVFstore
1806 OpLOONG64MOVDstore
1807 OpLOONG64MOVBstorezero
1808 OpLOONG64MOVHstorezero
1809 OpLOONG64MOVWstorezero
1810 OpLOONG64MOVVstorezero
1811 OpLOONG64MOVBreg
1812 OpLOONG64MOVBUreg
1813 OpLOONG64MOVHreg
1814 OpLOONG64MOVHUreg
1815 OpLOONG64MOVWreg
1816 OpLOONG64MOVWUreg
1817 OpLOONG64MOVVreg
1818 OpLOONG64MOVVnop
1819 OpLOONG64MOVWF
1820 OpLOONG64MOVWD
1821 OpLOONG64MOVVF
1822 OpLOONG64MOVVD
1823 OpLOONG64TRUNCFW
1824 OpLOONG64TRUNCDW
1825 OpLOONG64TRUNCFV
1826 OpLOONG64TRUNCDV
1827 OpLOONG64MOVFD
1828 OpLOONG64MOVDF
1829 OpLOONG64CALLstatic
1830 OpLOONG64CALLtail
1831 OpLOONG64CALLclosure
1832 OpLOONG64CALLinter
1833 OpLOONG64DUFFZERO
1834 OpLOONG64DUFFCOPY
1835 OpLOONG64LoweredZero
1836 OpLOONG64LoweredMove
1837 OpLOONG64LoweredAtomicLoad8
1838 OpLOONG64LoweredAtomicLoad32
1839 OpLOONG64LoweredAtomicLoad64
1840 OpLOONG64LoweredAtomicStore8
1841 OpLOONG64LoweredAtomicStore32
1842 OpLOONG64LoweredAtomicStore64
1843 OpLOONG64LoweredAtomicStorezero32
1844 OpLOONG64LoweredAtomicStorezero64
1845 OpLOONG64LoweredAtomicExchange32
1846 OpLOONG64LoweredAtomicExchange64
1847 OpLOONG64LoweredAtomicAdd32
1848 OpLOONG64LoweredAtomicAdd64
1849 OpLOONG64LoweredAtomicAddconst32
1850 OpLOONG64LoweredAtomicAddconst64
1851 OpLOONG64LoweredAtomicCas32
1852 OpLOONG64LoweredAtomicCas64
1853 OpLOONG64LoweredNilCheck
1854 OpLOONG64FPFlagTrue
1855 OpLOONG64FPFlagFalse
1856 OpLOONG64LoweredGetClosurePtr
1857 OpLOONG64LoweredGetCallerSP
1858 OpLOONG64LoweredGetCallerPC
1859 OpLOONG64LoweredWB
1860 OpLOONG64LoweredPanicBoundsA
1861 OpLOONG64LoweredPanicBoundsB
1862 OpLOONG64LoweredPanicBoundsC
1863
1864 OpMIPSADD
1865 OpMIPSADDconst
1866 OpMIPSSUB
1867 OpMIPSSUBconst
1868 OpMIPSMUL
1869 OpMIPSMULT
1870 OpMIPSMULTU
1871 OpMIPSDIV
1872 OpMIPSDIVU
1873 OpMIPSADDF
1874 OpMIPSADDD
1875 OpMIPSSUBF
1876 OpMIPSSUBD
1877 OpMIPSMULF
1878 OpMIPSMULD
1879 OpMIPSDIVF
1880 OpMIPSDIVD
1881 OpMIPSAND
1882 OpMIPSANDconst
1883 OpMIPSOR
1884 OpMIPSORconst
1885 OpMIPSXOR
1886 OpMIPSXORconst
1887 OpMIPSNOR
1888 OpMIPSNORconst
1889 OpMIPSNEG
1890 OpMIPSNEGF
1891 OpMIPSNEGD
1892 OpMIPSABSD
1893 OpMIPSSQRTD
1894 OpMIPSSQRTF
1895 OpMIPSSLL
1896 OpMIPSSLLconst
1897 OpMIPSSRL
1898 OpMIPSSRLconst
1899 OpMIPSSRA
1900 OpMIPSSRAconst
1901 OpMIPSCLZ
1902 OpMIPSSGT
1903 OpMIPSSGTconst
1904 OpMIPSSGTzero
1905 OpMIPSSGTU
1906 OpMIPSSGTUconst
1907 OpMIPSSGTUzero
1908 OpMIPSCMPEQF
1909 OpMIPSCMPEQD
1910 OpMIPSCMPGEF
1911 OpMIPSCMPGED
1912 OpMIPSCMPGTF
1913 OpMIPSCMPGTD
1914 OpMIPSMOVWconst
1915 OpMIPSMOVFconst
1916 OpMIPSMOVDconst
1917 OpMIPSMOVWaddr
1918 OpMIPSMOVBload
1919 OpMIPSMOVBUload
1920 OpMIPSMOVHload
1921 OpMIPSMOVHUload
1922 OpMIPSMOVWload
1923 OpMIPSMOVFload
1924 OpMIPSMOVDload
1925 OpMIPSMOVBstore
1926 OpMIPSMOVHstore
1927 OpMIPSMOVWstore
1928 OpMIPSMOVFstore
1929 OpMIPSMOVDstore
1930 OpMIPSMOVBstorezero
1931 OpMIPSMOVHstorezero
1932 OpMIPSMOVWstorezero
1933 OpMIPSMOVWfpgp
1934 OpMIPSMOVWgpfp
1935 OpMIPSMOVBreg
1936 OpMIPSMOVBUreg
1937 OpMIPSMOVHreg
1938 OpMIPSMOVHUreg
1939 OpMIPSMOVWreg
1940 OpMIPSMOVWnop
1941 OpMIPSCMOVZ
1942 OpMIPSCMOVZzero
1943 OpMIPSMOVWF
1944 OpMIPSMOVWD
1945 OpMIPSTRUNCFW
1946 OpMIPSTRUNCDW
1947 OpMIPSMOVFD
1948 OpMIPSMOVDF
1949 OpMIPSCALLstatic
1950 OpMIPSCALLtail
1951 OpMIPSCALLclosure
1952 OpMIPSCALLinter
1953 OpMIPSLoweredAtomicLoad8
1954 OpMIPSLoweredAtomicLoad32
1955 OpMIPSLoweredAtomicStore8
1956 OpMIPSLoweredAtomicStore32
1957 OpMIPSLoweredAtomicStorezero
1958 OpMIPSLoweredAtomicExchange
1959 OpMIPSLoweredAtomicAdd
1960 OpMIPSLoweredAtomicAddconst
1961 OpMIPSLoweredAtomicCas
1962 OpMIPSLoweredAtomicAnd
1963 OpMIPSLoweredAtomicOr
1964 OpMIPSLoweredZero
1965 OpMIPSLoweredMove
1966 OpMIPSLoweredNilCheck
1967 OpMIPSFPFlagTrue
1968 OpMIPSFPFlagFalse
1969 OpMIPSLoweredGetClosurePtr
1970 OpMIPSLoweredGetCallerSP
1971 OpMIPSLoweredGetCallerPC
1972 OpMIPSLoweredWB
1973 OpMIPSLoweredPanicBoundsA
1974 OpMIPSLoweredPanicBoundsB
1975 OpMIPSLoweredPanicBoundsC
1976 OpMIPSLoweredPanicExtendA
1977 OpMIPSLoweredPanicExtendB
1978 OpMIPSLoweredPanicExtendC
1979
1980 OpMIPS64ADDV
1981 OpMIPS64ADDVconst
1982 OpMIPS64SUBV
1983 OpMIPS64SUBVconst
1984 OpMIPS64MULV
1985 OpMIPS64MULVU
1986 OpMIPS64DIVV
1987 OpMIPS64DIVVU
1988 OpMIPS64ADDF
1989 OpMIPS64ADDD
1990 OpMIPS64SUBF
1991 OpMIPS64SUBD
1992 OpMIPS64MULF
1993 OpMIPS64MULD
1994 OpMIPS64DIVF
1995 OpMIPS64DIVD
1996 OpMIPS64AND
1997 OpMIPS64ANDconst
1998 OpMIPS64OR
1999 OpMIPS64ORconst
2000 OpMIPS64XOR
2001 OpMIPS64XORconst
2002 OpMIPS64NOR
2003 OpMIPS64NORconst
2004 OpMIPS64NEGV
2005 OpMIPS64NEGF
2006 OpMIPS64NEGD
2007 OpMIPS64ABSD
2008 OpMIPS64SQRTD
2009 OpMIPS64SQRTF
2010 OpMIPS64SLLV
2011 OpMIPS64SLLVconst
2012 OpMIPS64SRLV
2013 OpMIPS64SRLVconst
2014 OpMIPS64SRAV
2015 OpMIPS64SRAVconst
2016 OpMIPS64SGT
2017 OpMIPS64SGTconst
2018 OpMIPS64SGTU
2019 OpMIPS64SGTUconst
2020 OpMIPS64CMPEQF
2021 OpMIPS64CMPEQD
2022 OpMIPS64CMPGEF
2023 OpMIPS64CMPGED
2024 OpMIPS64CMPGTF
2025 OpMIPS64CMPGTD
2026 OpMIPS64MOVVconst
2027 OpMIPS64MOVFconst
2028 OpMIPS64MOVDconst
2029 OpMIPS64MOVVaddr
2030 OpMIPS64MOVBload
2031 OpMIPS64MOVBUload
2032 OpMIPS64MOVHload
2033 OpMIPS64MOVHUload
2034 OpMIPS64MOVWload
2035 OpMIPS64MOVWUload
2036 OpMIPS64MOVVload
2037 OpMIPS64MOVFload
2038 OpMIPS64MOVDload
2039 OpMIPS64MOVBstore
2040 OpMIPS64MOVHstore
2041 OpMIPS64MOVWstore
2042 OpMIPS64MOVVstore
2043 OpMIPS64MOVFstore
2044 OpMIPS64MOVDstore
2045 OpMIPS64MOVBstorezero
2046 OpMIPS64MOVHstorezero
2047 OpMIPS64MOVWstorezero
2048 OpMIPS64MOVVstorezero
2049 OpMIPS64MOVWfpgp
2050 OpMIPS64MOVWgpfp
2051 OpMIPS64MOVVfpgp
2052 OpMIPS64MOVVgpfp
2053 OpMIPS64MOVBreg
2054 OpMIPS64MOVBUreg
2055 OpMIPS64MOVHreg
2056 OpMIPS64MOVHUreg
2057 OpMIPS64MOVWreg
2058 OpMIPS64MOVWUreg
2059 OpMIPS64MOVVreg
2060 OpMIPS64MOVVnop
2061 OpMIPS64MOVWF
2062 OpMIPS64MOVWD
2063 OpMIPS64MOVVF
2064 OpMIPS64MOVVD
2065 OpMIPS64TRUNCFW
2066 OpMIPS64TRUNCDW
2067 OpMIPS64TRUNCFV
2068 OpMIPS64TRUNCDV
2069 OpMIPS64MOVFD
2070 OpMIPS64MOVDF
2071 OpMIPS64CALLstatic
2072 OpMIPS64CALLtail
2073 OpMIPS64CALLclosure
2074 OpMIPS64CALLinter
2075 OpMIPS64DUFFZERO
2076 OpMIPS64DUFFCOPY
2077 OpMIPS64LoweredZero
2078 OpMIPS64LoweredMove
2079 OpMIPS64LoweredAtomicAnd32
2080 OpMIPS64LoweredAtomicOr32
2081 OpMIPS64LoweredAtomicLoad8
2082 OpMIPS64LoweredAtomicLoad32
2083 OpMIPS64LoweredAtomicLoad64
2084 OpMIPS64LoweredAtomicStore8
2085 OpMIPS64LoweredAtomicStore32
2086 OpMIPS64LoweredAtomicStore64
2087 OpMIPS64LoweredAtomicStorezero32
2088 OpMIPS64LoweredAtomicStorezero64
2089 OpMIPS64LoweredAtomicExchange32
2090 OpMIPS64LoweredAtomicExchange64
2091 OpMIPS64LoweredAtomicAdd32
2092 OpMIPS64LoweredAtomicAdd64
2093 OpMIPS64LoweredAtomicAddconst32
2094 OpMIPS64LoweredAtomicAddconst64
2095 OpMIPS64LoweredAtomicCas32
2096 OpMIPS64LoweredAtomicCas64
2097 OpMIPS64LoweredNilCheck
2098 OpMIPS64FPFlagTrue
2099 OpMIPS64FPFlagFalse
2100 OpMIPS64LoweredGetClosurePtr
2101 OpMIPS64LoweredGetCallerSP
2102 OpMIPS64LoweredGetCallerPC
2103 OpMIPS64LoweredWB
2104 OpMIPS64LoweredPanicBoundsA
2105 OpMIPS64LoweredPanicBoundsB
2106 OpMIPS64LoweredPanicBoundsC
2107
2108 OpPPC64ADD
2109 OpPPC64ADDCC
2110 OpPPC64ADDconst
2111 OpPPC64ADDCCconst
2112 OpPPC64FADD
2113 OpPPC64FADDS
2114 OpPPC64SUB
2115 OpPPC64SUBCC
2116 OpPPC64SUBFCconst
2117 OpPPC64FSUB
2118 OpPPC64FSUBS
2119 OpPPC64XSMINJDP
2120 OpPPC64XSMAXJDP
2121 OpPPC64MULLD
2122 OpPPC64MULLW
2123 OpPPC64MULLDconst
2124 OpPPC64MULLWconst
2125 OpPPC64MADDLD
2126 OpPPC64MULHD
2127 OpPPC64MULHW
2128 OpPPC64MULHDU
2129 OpPPC64MULHWU
2130 OpPPC64FMUL
2131 OpPPC64FMULS
2132 OpPPC64FMADD
2133 OpPPC64FMADDS
2134 OpPPC64FMSUB
2135 OpPPC64FMSUBS
2136 OpPPC64SRAD
2137 OpPPC64SRAW
2138 OpPPC64SRD
2139 OpPPC64SRW
2140 OpPPC64SLD
2141 OpPPC64SLW
2142 OpPPC64ROTL
2143 OpPPC64ROTLW
2144 OpPPC64CLRLSLWI
2145 OpPPC64CLRLSLDI
2146 OpPPC64ADDC
2147 OpPPC64SUBC
2148 OpPPC64ADDCconst
2149 OpPPC64SUBCconst
2150 OpPPC64ADDE
2151 OpPPC64ADDZE
2152 OpPPC64SUBE
2153 OpPPC64ADDZEzero
2154 OpPPC64SUBZEzero
2155 OpPPC64SRADconst
2156 OpPPC64SRAWconst
2157 OpPPC64SRDconst
2158 OpPPC64SRWconst
2159 OpPPC64SLDconst
2160 OpPPC64SLWconst
2161 OpPPC64ROTLconst
2162 OpPPC64ROTLWconst
2163 OpPPC64EXTSWSLconst
2164 OpPPC64RLWINM
2165 OpPPC64RLWNM
2166 OpPPC64RLWMI
2167 OpPPC64RLDICL
2168 OpPPC64RLDICR
2169 OpPPC64CNTLZD
2170 OpPPC64CNTLZDCC
2171 OpPPC64CNTLZW
2172 OpPPC64CNTTZD
2173 OpPPC64CNTTZW
2174 OpPPC64POPCNTD
2175 OpPPC64POPCNTW
2176 OpPPC64POPCNTB
2177 OpPPC64FDIV
2178 OpPPC64FDIVS
2179 OpPPC64DIVD
2180 OpPPC64DIVW
2181 OpPPC64DIVDU
2182 OpPPC64DIVWU
2183 OpPPC64MODUD
2184 OpPPC64MODSD
2185 OpPPC64MODUW
2186 OpPPC64MODSW
2187 OpPPC64FCTIDZ
2188 OpPPC64FCTIWZ
2189 OpPPC64FCFID
2190 OpPPC64FCFIDS
2191 OpPPC64FRSP
2192 OpPPC64MFVSRD
2193 OpPPC64MTVSRD
2194 OpPPC64AND
2195 OpPPC64ANDN
2196 OpPPC64ANDNCC
2197 OpPPC64ANDCC
2198 OpPPC64OR
2199 OpPPC64ORN
2200 OpPPC64ORCC
2201 OpPPC64NOR
2202 OpPPC64NORCC
2203 OpPPC64XOR
2204 OpPPC64XORCC
2205 OpPPC64EQV
2206 OpPPC64NEG
2207 OpPPC64NEGCC
2208 OpPPC64BRD
2209 OpPPC64BRW
2210 OpPPC64BRH
2211 OpPPC64FNEG
2212 OpPPC64FSQRT
2213 OpPPC64FSQRTS
2214 OpPPC64FFLOOR
2215 OpPPC64FCEIL
2216 OpPPC64FTRUNC
2217 OpPPC64FROUND
2218 OpPPC64FABS
2219 OpPPC64FNABS
2220 OpPPC64FCPSGN
2221 OpPPC64ORconst
2222 OpPPC64XORconst
2223 OpPPC64ANDCCconst
2224 OpPPC64MOVBreg
2225 OpPPC64MOVBZreg
2226 OpPPC64MOVHreg
2227 OpPPC64MOVHZreg
2228 OpPPC64MOVWreg
2229 OpPPC64MOVWZreg
2230 OpPPC64MOVBZload
2231 OpPPC64MOVHload
2232 OpPPC64MOVHZload
2233 OpPPC64MOVWload
2234 OpPPC64MOVWZload
2235 OpPPC64MOVDload
2236 OpPPC64MOVDBRload
2237 OpPPC64MOVWBRload
2238 OpPPC64MOVHBRload
2239 OpPPC64MOVBZloadidx
2240 OpPPC64MOVHloadidx
2241 OpPPC64MOVHZloadidx
2242 OpPPC64MOVWloadidx
2243 OpPPC64MOVWZloadidx
2244 OpPPC64MOVDloadidx
2245 OpPPC64MOVHBRloadidx
2246 OpPPC64MOVWBRloadidx
2247 OpPPC64MOVDBRloadidx
2248 OpPPC64FMOVDloadidx
2249 OpPPC64FMOVSloadidx
2250 OpPPC64DCBT
2251 OpPPC64MOVDBRstore
2252 OpPPC64MOVWBRstore
2253 OpPPC64MOVHBRstore
2254 OpPPC64FMOVDload
2255 OpPPC64FMOVSload
2256 OpPPC64MOVBstore
2257 OpPPC64MOVHstore
2258 OpPPC64MOVWstore
2259 OpPPC64MOVDstore
2260 OpPPC64FMOVDstore
2261 OpPPC64FMOVSstore
2262 OpPPC64MOVBstoreidx
2263 OpPPC64MOVHstoreidx
2264 OpPPC64MOVWstoreidx
2265 OpPPC64MOVDstoreidx
2266 OpPPC64FMOVDstoreidx
2267 OpPPC64FMOVSstoreidx
2268 OpPPC64MOVHBRstoreidx
2269 OpPPC64MOVWBRstoreidx
2270 OpPPC64MOVDBRstoreidx
2271 OpPPC64MOVBstorezero
2272 OpPPC64MOVHstorezero
2273 OpPPC64MOVWstorezero
2274 OpPPC64MOVDstorezero
2275 OpPPC64MOVDaddr
2276 OpPPC64MOVDconst
2277 OpPPC64FMOVDconst
2278 OpPPC64FMOVSconst
2279 OpPPC64FCMPU
2280 OpPPC64CMP
2281 OpPPC64CMPU
2282 OpPPC64CMPW
2283 OpPPC64CMPWU
2284 OpPPC64CMPconst
2285 OpPPC64CMPUconst
2286 OpPPC64CMPWconst
2287 OpPPC64CMPWUconst
2288 OpPPC64ISEL
2289 OpPPC64ISELZ
2290 OpPPC64SETBC
2291 OpPPC64SETBCR
2292 OpPPC64Equal
2293 OpPPC64NotEqual
2294 OpPPC64LessThan
2295 OpPPC64FLessThan
2296 OpPPC64LessEqual
2297 OpPPC64FLessEqual
2298 OpPPC64GreaterThan
2299 OpPPC64FGreaterThan
2300 OpPPC64GreaterEqual
2301 OpPPC64FGreaterEqual
2302 OpPPC64LoweredGetClosurePtr
2303 OpPPC64LoweredGetCallerSP
2304 OpPPC64LoweredGetCallerPC
2305 OpPPC64LoweredNilCheck
2306 OpPPC64LoweredRound32F
2307 OpPPC64LoweredRound64F
2308 OpPPC64CALLstatic
2309 OpPPC64CALLtail
2310 OpPPC64CALLclosure
2311 OpPPC64CALLinter
2312 OpPPC64LoweredZero
2313 OpPPC64LoweredZeroShort
2314 OpPPC64LoweredQuadZeroShort
2315 OpPPC64LoweredQuadZero
2316 OpPPC64LoweredMove
2317 OpPPC64LoweredMoveShort
2318 OpPPC64LoweredQuadMove
2319 OpPPC64LoweredQuadMoveShort
2320 OpPPC64LoweredAtomicStore8
2321 OpPPC64LoweredAtomicStore32
2322 OpPPC64LoweredAtomicStore64
2323 OpPPC64LoweredAtomicLoad8
2324 OpPPC64LoweredAtomicLoad32
2325 OpPPC64LoweredAtomicLoad64
2326 OpPPC64LoweredAtomicLoadPtr
2327 OpPPC64LoweredAtomicAdd32
2328 OpPPC64LoweredAtomicAdd64
2329 OpPPC64LoweredAtomicExchange32
2330 OpPPC64LoweredAtomicExchange64
2331 OpPPC64LoweredAtomicCas64
2332 OpPPC64LoweredAtomicCas32
2333 OpPPC64LoweredAtomicAnd8
2334 OpPPC64LoweredAtomicAnd32
2335 OpPPC64LoweredAtomicOr8
2336 OpPPC64LoweredAtomicOr32
2337 OpPPC64LoweredWB
2338 OpPPC64LoweredPubBarrier
2339 OpPPC64LoweredPanicBoundsA
2340 OpPPC64LoweredPanicBoundsB
2341 OpPPC64LoweredPanicBoundsC
2342 OpPPC64InvertFlags
2343 OpPPC64FlagEQ
2344 OpPPC64FlagLT
2345 OpPPC64FlagGT
2346
2347 OpRISCV64ADD
2348 OpRISCV64ADDI
2349 OpRISCV64ADDIW
2350 OpRISCV64NEG
2351 OpRISCV64NEGW
2352 OpRISCV64SUB
2353 OpRISCV64SUBW
2354 OpRISCV64MUL
2355 OpRISCV64MULW
2356 OpRISCV64MULH
2357 OpRISCV64MULHU
2358 OpRISCV64LoweredMuluhilo
2359 OpRISCV64LoweredMuluover
2360 OpRISCV64DIV
2361 OpRISCV64DIVU
2362 OpRISCV64DIVW
2363 OpRISCV64DIVUW
2364 OpRISCV64REM
2365 OpRISCV64REMU
2366 OpRISCV64REMW
2367 OpRISCV64REMUW
2368 OpRISCV64MOVaddr
2369 OpRISCV64MOVDconst
2370 OpRISCV64MOVBload
2371 OpRISCV64MOVHload
2372 OpRISCV64MOVWload
2373 OpRISCV64MOVDload
2374 OpRISCV64MOVBUload
2375 OpRISCV64MOVHUload
2376 OpRISCV64MOVWUload
2377 OpRISCV64MOVBstore
2378 OpRISCV64MOVHstore
2379 OpRISCV64MOVWstore
2380 OpRISCV64MOVDstore
2381 OpRISCV64MOVBstorezero
2382 OpRISCV64MOVHstorezero
2383 OpRISCV64MOVWstorezero
2384 OpRISCV64MOVDstorezero
2385 OpRISCV64MOVBreg
2386 OpRISCV64MOVHreg
2387 OpRISCV64MOVWreg
2388 OpRISCV64MOVDreg
2389 OpRISCV64MOVBUreg
2390 OpRISCV64MOVHUreg
2391 OpRISCV64MOVWUreg
2392 OpRISCV64MOVDnop
2393 OpRISCV64SLL
2394 OpRISCV64SLLW
2395 OpRISCV64SRA
2396 OpRISCV64SRAW
2397 OpRISCV64SRL
2398 OpRISCV64SRLW
2399 OpRISCV64SLLI
2400 OpRISCV64SLLIW
2401 OpRISCV64SRAI
2402 OpRISCV64SRAIW
2403 OpRISCV64SRLI
2404 OpRISCV64SRLIW
2405 OpRISCV64AND
2406 OpRISCV64ANDI
2407 OpRISCV64NOT
2408 OpRISCV64OR
2409 OpRISCV64ORI
2410 OpRISCV64ROL
2411 OpRISCV64ROLW
2412 OpRISCV64ROR
2413 OpRISCV64RORI
2414 OpRISCV64RORIW
2415 OpRISCV64RORW
2416 OpRISCV64XOR
2417 OpRISCV64XORI
2418 OpRISCV64SEQZ
2419 OpRISCV64SNEZ
2420 OpRISCV64SLT
2421 OpRISCV64SLTI
2422 OpRISCV64SLTU
2423 OpRISCV64SLTIU
2424 OpRISCV64LoweredRound32F
2425 OpRISCV64LoweredRound64F
2426 OpRISCV64CALLstatic
2427 OpRISCV64CALLtail
2428 OpRISCV64CALLclosure
2429 OpRISCV64CALLinter
2430 OpRISCV64DUFFZERO
2431 OpRISCV64DUFFCOPY
2432 OpRISCV64LoweredZero
2433 OpRISCV64LoweredMove
2434 OpRISCV64LoweredAtomicLoad8
2435 OpRISCV64LoweredAtomicLoad32
2436 OpRISCV64LoweredAtomicLoad64
2437 OpRISCV64LoweredAtomicStore8
2438 OpRISCV64LoweredAtomicStore32
2439 OpRISCV64LoweredAtomicStore64
2440 OpRISCV64LoweredAtomicExchange32
2441 OpRISCV64LoweredAtomicExchange64
2442 OpRISCV64LoweredAtomicAdd32
2443 OpRISCV64LoweredAtomicAdd64
2444 OpRISCV64LoweredAtomicCas32
2445 OpRISCV64LoweredAtomicCas64
2446 OpRISCV64LoweredAtomicAnd32
2447 OpRISCV64LoweredAtomicOr32
2448 OpRISCV64LoweredNilCheck
2449 OpRISCV64LoweredGetClosurePtr
2450 OpRISCV64LoweredGetCallerSP
2451 OpRISCV64LoweredGetCallerPC
2452 OpRISCV64LoweredWB
2453 OpRISCV64LoweredPubBarrier
2454 OpRISCV64LoweredPanicBoundsA
2455 OpRISCV64LoweredPanicBoundsB
2456 OpRISCV64LoweredPanicBoundsC
2457 OpRISCV64FADDS
2458 OpRISCV64FSUBS
2459 OpRISCV64FMULS
2460 OpRISCV64FDIVS
2461 OpRISCV64FMADDS
2462 OpRISCV64FMSUBS
2463 OpRISCV64FNMADDS
2464 OpRISCV64FNMSUBS
2465 OpRISCV64FSQRTS
2466 OpRISCV64FNEGS
2467 OpRISCV64FMVSX
2468 OpRISCV64FCVTSW
2469 OpRISCV64FCVTSL
2470 OpRISCV64FCVTWS
2471 OpRISCV64FCVTLS
2472 OpRISCV64FMOVWload
2473 OpRISCV64FMOVWstore
2474 OpRISCV64FEQS
2475 OpRISCV64FNES
2476 OpRISCV64FLTS
2477 OpRISCV64FLES
2478 OpRISCV64LoweredFMAXS
2479 OpRISCV64LoweredFMINS
2480 OpRISCV64FADDD
2481 OpRISCV64FSUBD
2482 OpRISCV64FMULD
2483 OpRISCV64FDIVD
2484 OpRISCV64FMADDD
2485 OpRISCV64FMSUBD
2486 OpRISCV64FNMADDD
2487 OpRISCV64FNMSUBD
2488 OpRISCV64FSQRTD
2489 OpRISCV64FNEGD
2490 OpRISCV64FABSD
2491 OpRISCV64FSGNJD
2492 OpRISCV64FMVDX
2493 OpRISCV64FCVTDW
2494 OpRISCV64FCVTDL
2495 OpRISCV64FCVTWD
2496 OpRISCV64FCVTLD
2497 OpRISCV64FCVTDS
2498 OpRISCV64FCVTSD
2499 OpRISCV64FMOVDload
2500 OpRISCV64FMOVDstore
2501 OpRISCV64FEQD
2502 OpRISCV64FNED
2503 OpRISCV64FLTD
2504 OpRISCV64FLED
2505 OpRISCV64LoweredFMIND
2506 OpRISCV64LoweredFMAXD
2507
2508 OpS390XFADDS
2509 OpS390XFADD
2510 OpS390XFSUBS
2511 OpS390XFSUB
2512 OpS390XFMULS
2513 OpS390XFMUL
2514 OpS390XFDIVS
2515 OpS390XFDIV
2516 OpS390XFNEGS
2517 OpS390XFNEG
2518 OpS390XFMADDS
2519 OpS390XFMADD
2520 OpS390XFMSUBS
2521 OpS390XFMSUB
2522 OpS390XLPDFR
2523 OpS390XLNDFR
2524 OpS390XCPSDR
2525 OpS390XFIDBR
2526 OpS390XFMOVSload
2527 OpS390XFMOVDload
2528 OpS390XFMOVSconst
2529 OpS390XFMOVDconst
2530 OpS390XFMOVSloadidx
2531 OpS390XFMOVDloadidx
2532 OpS390XFMOVSstore
2533 OpS390XFMOVDstore
2534 OpS390XFMOVSstoreidx
2535 OpS390XFMOVDstoreidx
2536 OpS390XADD
2537 OpS390XADDW
2538 OpS390XADDconst
2539 OpS390XADDWconst
2540 OpS390XADDload
2541 OpS390XADDWload
2542 OpS390XSUB
2543 OpS390XSUBW
2544 OpS390XSUBconst
2545 OpS390XSUBWconst
2546 OpS390XSUBload
2547 OpS390XSUBWload
2548 OpS390XMULLD
2549 OpS390XMULLW
2550 OpS390XMULLDconst
2551 OpS390XMULLWconst
2552 OpS390XMULLDload
2553 OpS390XMULLWload
2554 OpS390XMULHD
2555 OpS390XMULHDU
2556 OpS390XDIVD
2557 OpS390XDIVW
2558 OpS390XDIVDU
2559 OpS390XDIVWU
2560 OpS390XMODD
2561 OpS390XMODW
2562 OpS390XMODDU
2563 OpS390XMODWU
2564 OpS390XAND
2565 OpS390XANDW
2566 OpS390XANDconst
2567 OpS390XANDWconst
2568 OpS390XANDload
2569 OpS390XANDWload
2570 OpS390XOR
2571 OpS390XORW
2572 OpS390XORconst
2573 OpS390XORWconst
2574 OpS390XORload
2575 OpS390XORWload
2576 OpS390XXOR
2577 OpS390XXORW
2578 OpS390XXORconst
2579 OpS390XXORWconst
2580 OpS390XXORload
2581 OpS390XXORWload
2582 OpS390XADDC
2583 OpS390XADDCconst
2584 OpS390XADDE
2585 OpS390XSUBC
2586 OpS390XSUBE
2587 OpS390XCMP
2588 OpS390XCMPW
2589 OpS390XCMPU
2590 OpS390XCMPWU
2591 OpS390XCMPconst
2592 OpS390XCMPWconst
2593 OpS390XCMPUconst
2594 OpS390XCMPWUconst
2595 OpS390XFCMPS
2596 OpS390XFCMP
2597 OpS390XLTDBR
2598 OpS390XLTEBR
2599 OpS390XSLD
2600 OpS390XSLW
2601 OpS390XSLDconst
2602 OpS390XSLWconst
2603 OpS390XSRD
2604 OpS390XSRW
2605 OpS390XSRDconst
2606 OpS390XSRWconst
2607 OpS390XSRAD
2608 OpS390XSRAW
2609 OpS390XSRADconst
2610 OpS390XSRAWconst
2611 OpS390XRLLG
2612 OpS390XRLL
2613 OpS390XRLLconst
2614 OpS390XRXSBG
2615 OpS390XRISBGZ
2616 OpS390XNEG
2617 OpS390XNEGW
2618 OpS390XNOT
2619 OpS390XNOTW
2620 OpS390XFSQRT
2621 OpS390XFSQRTS
2622 OpS390XLOCGR
2623 OpS390XMOVBreg
2624 OpS390XMOVBZreg
2625 OpS390XMOVHreg
2626 OpS390XMOVHZreg
2627 OpS390XMOVWreg
2628 OpS390XMOVWZreg
2629 OpS390XMOVDconst
2630 OpS390XLDGR
2631 OpS390XLGDR
2632 OpS390XCFDBRA
2633 OpS390XCGDBRA
2634 OpS390XCFEBRA
2635 OpS390XCGEBRA
2636 OpS390XCEFBRA
2637 OpS390XCDFBRA
2638 OpS390XCEGBRA
2639 OpS390XCDGBRA
2640 OpS390XCLFEBR
2641 OpS390XCLFDBR
2642 OpS390XCLGEBR
2643 OpS390XCLGDBR
2644 OpS390XCELFBR
2645 OpS390XCDLFBR
2646 OpS390XCELGBR
2647 OpS390XCDLGBR
2648 OpS390XLEDBR
2649 OpS390XLDEBR
2650 OpS390XMOVDaddr
2651 OpS390XMOVDaddridx
2652 OpS390XMOVBZload
2653 OpS390XMOVBload
2654 OpS390XMOVHZload
2655 OpS390XMOVHload
2656 OpS390XMOVWZload
2657 OpS390XMOVWload
2658 OpS390XMOVDload
2659 OpS390XMOVWBR
2660 OpS390XMOVDBR
2661 OpS390XMOVHBRload
2662 OpS390XMOVWBRload
2663 OpS390XMOVDBRload
2664 OpS390XMOVBstore
2665 OpS390XMOVHstore
2666 OpS390XMOVWstore
2667 OpS390XMOVDstore
2668 OpS390XMOVHBRstore
2669 OpS390XMOVWBRstore
2670 OpS390XMOVDBRstore
2671 OpS390XMVC
2672 OpS390XMOVBZloadidx
2673 OpS390XMOVBloadidx
2674 OpS390XMOVHZloadidx
2675 OpS390XMOVHloadidx
2676 OpS390XMOVWZloadidx
2677 OpS390XMOVWloadidx
2678 OpS390XMOVDloadidx
2679 OpS390XMOVHBRloadidx
2680 OpS390XMOVWBRloadidx
2681 OpS390XMOVDBRloadidx
2682 OpS390XMOVBstoreidx
2683 OpS390XMOVHstoreidx
2684 OpS390XMOVWstoreidx
2685 OpS390XMOVDstoreidx
2686 OpS390XMOVHBRstoreidx
2687 OpS390XMOVWBRstoreidx
2688 OpS390XMOVDBRstoreidx
2689 OpS390XMOVBstoreconst
2690 OpS390XMOVHstoreconst
2691 OpS390XMOVWstoreconst
2692 OpS390XMOVDstoreconst
2693 OpS390XCLEAR
2694 OpS390XCALLstatic
2695 OpS390XCALLtail
2696 OpS390XCALLclosure
2697 OpS390XCALLinter
2698 OpS390XInvertFlags
2699 OpS390XLoweredGetG
2700 OpS390XLoweredGetClosurePtr
2701 OpS390XLoweredGetCallerSP
2702 OpS390XLoweredGetCallerPC
2703 OpS390XLoweredNilCheck
2704 OpS390XLoweredRound32F
2705 OpS390XLoweredRound64F
2706 OpS390XLoweredWB
2707 OpS390XLoweredPanicBoundsA
2708 OpS390XLoweredPanicBoundsB
2709 OpS390XLoweredPanicBoundsC
2710 OpS390XFlagEQ
2711 OpS390XFlagLT
2712 OpS390XFlagGT
2713 OpS390XFlagOV
2714 OpS390XSYNC
2715 OpS390XMOVBZatomicload
2716 OpS390XMOVWZatomicload
2717 OpS390XMOVDatomicload
2718 OpS390XMOVBatomicstore
2719 OpS390XMOVWatomicstore
2720 OpS390XMOVDatomicstore
2721 OpS390XLAA
2722 OpS390XLAAG
2723 OpS390XAddTupleFirst32
2724 OpS390XAddTupleFirst64
2725 OpS390XLAN
2726 OpS390XLANfloor
2727 OpS390XLAO
2728 OpS390XLAOfloor
2729 OpS390XLoweredAtomicCas32
2730 OpS390XLoweredAtomicCas64
2731 OpS390XLoweredAtomicExchange32
2732 OpS390XLoweredAtomicExchange64
2733 OpS390XFLOGR
2734 OpS390XPOPCNT
2735 OpS390XMLGR
2736 OpS390XSumBytes2
2737 OpS390XSumBytes4
2738 OpS390XSumBytes8
2739 OpS390XSTMG2
2740 OpS390XSTMG3
2741 OpS390XSTMG4
2742 OpS390XSTM2
2743 OpS390XSTM3
2744 OpS390XSTM4
2745 OpS390XLoweredMove
2746 OpS390XLoweredZero
2747
2748 OpWasmLoweredStaticCall
2749 OpWasmLoweredTailCall
2750 OpWasmLoweredClosureCall
2751 OpWasmLoweredInterCall
2752 OpWasmLoweredAddr
2753 OpWasmLoweredMove
2754 OpWasmLoweredZero
2755 OpWasmLoweredGetClosurePtr
2756 OpWasmLoweredGetCallerPC
2757 OpWasmLoweredGetCallerSP
2758 OpWasmLoweredNilCheck
2759 OpWasmLoweredWB
2760 OpWasmLoweredConvert
2761 OpWasmSelect
2762 OpWasmI64Load8U
2763 OpWasmI64Load8S
2764 OpWasmI64Load16U
2765 OpWasmI64Load16S
2766 OpWasmI64Load32U
2767 OpWasmI64Load32S
2768 OpWasmI64Load
2769 OpWasmI64Store8
2770 OpWasmI64Store16
2771 OpWasmI64Store32
2772 OpWasmI64Store
2773 OpWasmF32Load
2774 OpWasmF64Load
2775 OpWasmF32Store
2776 OpWasmF64Store
2777 OpWasmI64Const
2778 OpWasmF32Const
2779 OpWasmF64Const
2780 OpWasmI64Eqz
2781 OpWasmI64Eq
2782 OpWasmI64Ne
2783 OpWasmI64LtS
2784 OpWasmI64LtU
2785 OpWasmI64GtS
2786 OpWasmI64GtU
2787 OpWasmI64LeS
2788 OpWasmI64LeU
2789 OpWasmI64GeS
2790 OpWasmI64GeU
2791 OpWasmF32Eq
2792 OpWasmF32Ne
2793 OpWasmF32Lt
2794 OpWasmF32Gt
2795 OpWasmF32Le
2796 OpWasmF32Ge
2797 OpWasmF64Eq
2798 OpWasmF64Ne
2799 OpWasmF64Lt
2800 OpWasmF64Gt
2801 OpWasmF64Le
2802 OpWasmF64Ge
2803 OpWasmI64Add
2804 OpWasmI64AddConst
2805 OpWasmI64Sub
2806 OpWasmI64Mul
2807 OpWasmI64DivS
2808 OpWasmI64DivU
2809 OpWasmI64RemS
2810 OpWasmI64RemU
2811 OpWasmI64And
2812 OpWasmI64Or
2813 OpWasmI64Xor
2814 OpWasmI64Shl
2815 OpWasmI64ShrS
2816 OpWasmI64ShrU
2817 OpWasmF32Neg
2818 OpWasmF32Add
2819 OpWasmF32Sub
2820 OpWasmF32Mul
2821 OpWasmF32Div
2822 OpWasmF64Neg
2823 OpWasmF64Add
2824 OpWasmF64Sub
2825 OpWasmF64Mul
2826 OpWasmF64Div
2827 OpWasmI64TruncSatF64S
2828 OpWasmI64TruncSatF64U
2829 OpWasmI64TruncSatF32S
2830 OpWasmI64TruncSatF32U
2831 OpWasmF32ConvertI64S
2832 OpWasmF32ConvertI64U
2833 OpWasmF64ConvertI64S
2834 OpWasmF64ConvertI64U
2835 OpWasmF32DemoteF64
2836 OpWasmF64PromoteF32
2837 OpWasmI64Extend8S
2838 OpWasmI64Extend16S
2839 OpWasmI64Extend32S
2840 OpWasmF32Sqrt
2841 OpWasmF32Trunc
2842 OpWasmF32Ceil
2843 OpWasmF32Floor
2844 OpWasmF32Nearest
2845 OpWasmF32Abs
2846 OpWasmF32Copysign
2847 OpWasmF64Sqrt
2848 OpWasmF64Trunc
2849 OpWasmF64Ceil
2850 OpWasmF64Floor
2851 OpWasmF64Nearest
2852 OpWasmF64Abs
2853 OpWasmF64Copysign
2854 OpWasmI64Ctz
2855 OpWasmI64Clz
2856 OpWasmI32Rotl
2857 OpWasmI64Rotl
2858 OpWasmI64Popcnt
2859
2860 OpAdd8
2861 OpAdd16
2862 OpAdd32
2863 OpAdd64
2864 OpAddPtr
2865 OpAdd32F
2866 OpAdd64F
2867 OpSub8
2868 OpSub16
2869 OpSub32
2870 OpSub64
2871 OpSubPtr
2872 OpSub32F
2873 OpSub64F
2874 OpMul8
2875 OpMul16
2876 OpMul32
2877 OpMul64
2878 OpMul32F
2879 OpMul64F
2880 OpDiv32F
2881 OpDiv64F
2882 OpHmul32
2883 OpHmul32u
2884 OpHmul64
2885 OpHmul64u
2886 OpMul32uhilo
2887 OpMul64uhilo
2888 OpMul32uover
2889 OpMul64uover
2890 OpAvg32u
2891 OpAvg64u
2892 OpDiv8
2893 OpDiv8u
2894 OpDiv16
2895 OpDiv16u
2896 OpDiv32
2897 OpDiv32u
2898 OpDiv64
2899 OpDiv64u
2900 OpDiv128u
2901 OpMod8
2902 OpMod8u
2903 OpMod16
2904 OpMod16u
2905 OpMod32
2906 OpMod32u
2907 OpMod64
2908 OpMod64u
2909 OpAnd8
2910 OpAnd16
2911 OpAnd32
2912 OpAnd64
2913 OpOr8
2914 OpOr16
2915 OpOr32
2916 OpOr64
2917 OpXor8
2918 OpXor16
2919 OpXor32
2920 OpXor64
2921 OpLsh8x8
2922 OpLsh8x16
2923 OpLsh8x32
2924 OpLsh8x64
2925 OpLsh16x8
2926 OpLsh16x16
2927 OpLsh16x32
2928 OpLsh16x64
2929 OpLsh32x8
2930 OpLsh32x16
2931 OpLsh32x32
2932 OpLsh32x64
2933 OpLsh64x8
2934 OpLsh64x16
2935 OpLsh64x32
2936 OpLsh64x64
2937 OpRsh8x8
2938 OpRsh8x16
2939 OpRsh8x32
2940 OpRsh8x64
2941 OpRsh16x8
2942 OpRsh16x16
2943 OpRsh16x32
2944 OpRsh16x64
2945 OpRsh32x8
2946 OpRsh32x16
2947 OpRsh32x32
2948 OpRsh32x64
2949 OpRsh64x8
2950 OpRsh64x16
2951 OpRsh64x32
2952 OpRsh64x64
2953 OpRsh8Ux8
2954 OpRsh8Ux16
2955 OpRsh8Ux32
2956 OpRsh8Ux64
2957 OpRsh16Ux8
2958 OpRsh16Ux16
2959 OpRsh16Ux32
2960 OpRsh16Ux64
2961 OpRsh32Ux8
2962 OpRsh32Ux16
2963 OpRsh32Ux32
2964 OpRsh32Ux64
2965 OpRsh64Ux8
2966 OpRsh64Ux16
2967 OpRsh64Ux32
2968 OpRsh64Ux64
2969 OpEq8
2970 OpEq16
2971 OpEq32
2972 OpEq64
2973 OpEqPtr
2974 OpEqInter
2975 OpEqSlice
2976 OpEq32F
2977 OpEq64F
2978 OpNeq8
2979 OpNeq16
2980 OpNeq32
2981 OpNeq64
2982 OpNeqPtr
2983 OpNeqInter
2984 OpNeqSlice
2985 OpNeq32F
2986 OpNeq64F
2987 OpLess8
2988 OpLess8U
2989 OpLess16
2990 OpLess16U
2991 OpLess32
2992 OpLess32U
2993 OpLess64
2994 OpLess64U
2995 OpLess32F
2996 OpLess64F
2997 OpLeq8
2998 OpLeq8U
2999 OpLeq16
3000 OpLeq16U
3001 OpLeq32
3002 OpLeq32U
3003 OpLeq64
3004 OpLeq64U
3005 OpLeq32F
3006 OpLeq64F
3007 OpCondSelect
3008 OpAndB
3009 OpOrB
3010 OpEqB
3011 OpNeqB
3012 OpNot
3013 OpNeg8
3014 OpNeg16
3015 OpNeg32
3016 OpNeg64
3017 OpNeg32F
3018 OpNeg64F
3019 OpCom8
3020 OpCom16
3021 OpCom32
3022 OpCom64
3023 OpCtz8
3024 OpCtz16
3025 OpCtz32
3026 OpCtz64
3027 OpCtz8NonZero
3028 OpCtz16NonZero
3029 OpCtz32NonZero
3030 OpCtz64NonZero
3031 OpBitLen8
3032 OpBitLen16
3033 OpBitLen32
3034 OpBitLen64
3035 OpBswap16
3036 OpBswap32
3037 OpBswap64
3038 OpBitRev8
3039 OpBitRev16
3040 OpBitRev32
3041 OpBitRev64
3042 OpPopCount8
3043 OpPopCount16
3044 OpPopCount32
3045 OpPopCount64
3046 OpRotateLeft64
3047 OpRotateLeft32
3048 OpRotateLeft16
3049 OpRotateLeft8
3050 OpSqrt
3051 OpSqrt32
3052 OpFloor
3053 OpCeil
3054 OpTrunc
3055 OpRound
3056 OpRoundToEven
3057 OpAbs
3058 OpCopysign
3059 OpMin64F
3060 OpMin32F
3061 OpMax64F
3062 OpMax32F
3063 OpFMA
3064 OpPhi
3065 OpCopy
3066 OpConvert
3067 OpConstBool
3068 OpConstString
3069 OpConstNil
3070 OpConst8
3071 OpConst16
3072 OpConst32
3073 OpConst64
3074 OpConst32F
3075 OpConst64F
3076 OpConstInterface
3077 OpConstSlice
3078 OpInitMem
3079 OpArg
3080 OpArgIntReg
3081 OpArgFloatReg
3082 OpAddr
3083 OpLocalAddr
3084 OpSP
3085 OpSB
3086 OpSPanchored
3087 OpLoad
3088 OpDereference
3089 OpStore
3090 OpMove
3091 OpZero
3092 OpStoreWB
3093 OpMoveWB
3094 OpZeroWB
3095 OpWBend
3096 OpWB
3097 OpHasCPUFeature
3098 OpPanicBounds
3099 OpPanicExtend
3100 OpClosureCall
3101 OpStaticCall
3102 OpInterCall
3103 OpTailCall
3104 OpClosureLECall
3105 OpStaticLECall
3106 OpInterLECall
3107 OpTailLECall
3108 OpSignExt8to16
3109 OpSignExt8to32
3110 OpSignExt8to64
3111 OpSignExt16to32
3112 OpSignExt16to64
3113 OpSignExt32to64
3114 OpZeroExt8to16
3115 OpZeroExt8to32
3116 OpZeroExt8to64
3117 OpZeroExt16to32
3118 OpZeroExt16to64
3119 OpZeroExt32to64
3120 OpTrunc16to8
3121 OpTrunc32to8
3122 OpTrunc32to16
3123 OpTrunc64to8
3124 OpTrunc64to16
3125 OpTrunc64to32
3126 OpCvt32to32F
3127 OpCvt32to64F
3128 OpCvt64to32F
3129 OpCvt64to64F
3130 OpCvt32Fto32
3131 OpCvt32Fto64
3132 OpCvt64Fto32
3133 OpCvt64Fto64
3134 OpCvt32Fto64F
3135 OpCvt64Fto32F
3136 OpCvtBoolToUint8
3137 OpRound32F
3138 OpRound64F
3139 OpIsNonNil
3140 OpIsInBounds
3141 OpIsSliceInBounds
3142 OpNilCheck
3143 OpGetG
3144 OpGetClosurePtr
3145 OpGetCallerPC
3146 OpGetCallerSP
3147 OpPtrIndex
3148 OpOffPtr
3149 OpSliceMake
3150 OpSlicePtr
3151 OpSliceLen
3152 OpSliceCap
3153 OpSlicePtrUnchecked
3154 OpComplexMake
3155 OpComplexReal
3156 OpComplexImag
3157 OpStringMake
3158 OpStringPtr
3159 OpStringLen
3160 OpIMake
3161 OpITab
3162 OpIData
3163 OpStructMake0
3164 OpStructMake1
3165 OpStructMake2
3166 OpStructMake3
3167 OpStructMake4
3168 OpStructSelect
3169 OpArrayMake0
3170 OpArrayMake1
3171 OpArraySelect
3172 OpStoreReg
3173 OpLoadReg
3174 OpFwdRef
3175 OpUnknown
3176 OpVarDef
3177 OpVarLive
3178 OpKeepAlive
3179 OpInlMark
3180 OpInt64Make
3181 OpInt64Hi
3182 OpInt64Lo
3183 OpAdd32carry
3184 OpAdd32withcarry
3185 OpSub32carry
3186 OpSub32withcarry
3187 OpAdd64carry
3188 OpSub64borrow
3189 OpSignmask
3190 OpZeromask
3191 OpSlicemask
3192 OpSpectreIndex
3193 OpSpectreSliceIndex
3194 OpCvt32Uto32F
3195 OpCvt32Uto64F
3196 OpCvt32Fto32U
3197 OpCvt64Fto32U
3198 OpCvt64Uto32F
3199 OpCvt64Uto64F
3200 OpCvt32Fto64U
3201 OpCvt64Fto64U
3202 OpSelect0
3203 OpSelect1
3204 OpSelectN
3205 OpSelectNAddr
3206 OpMakeResult
3207 OpAtomicLoad8
3208 OpAtomicLoad32
3209 OpAtomicLoad64
3210 OpAtomicLoadPtr
3211 OpAtomicLoadAcq32
3212 OpAtomicLoadAcq64
3213 OpAtomicStore8
3214 OpAtomicStore32
3215 OpAtomicStore64
3216 OpAtomicStorePtrNoWB
3217 OpAtomicStoreRel32
3218 OpAtomicStoreRel64
3219 OpAtomicExchange32
3220 OpAtomicExchange64
3221 OpAtomicAdd32
3222 OpAtomicAdd64
3223 OpAtomicCompareAndSwap32
3224 OpAtomicCompareAndSwap64
3225 OpAtomicCompareAndSwapRel32
3226 OpAtomicAnd8
3227 OpAtomicAnd32
3228 OpAtomicOr8
3229 OpAtomicOr32
3230 OpAtomicAdd32Variant
3231 OpAtomicAdd64Variant
3232 OpAtomicExchange32Variant
3233 OpAtomicExchange64Variant
3234 OpAtomicCompareAndSwap32Variant
3235 OpAtomicCompareAndSwap64Variant
3236 OpAtomicAnd8Variant
3237 OpAtomicAnd32Variant
3238 OpAtomicOr8Variant
3239 OpAtomicOr32Variant
3240 OpPubBarrier
3241 OpClobber
3242 OpClobberReg
3243 OpPrefetchCache
3244 OpPrefetchCacheStreamed
3245 )
3246
3247 var opcodeTable = [...]opInfo{
3248 {name: "OpInvalid"},
3249
3250 {
3251 name: "ADDSS",
3252 argLen: 2,
3253 commutative: true,
3254 resultInArg0: true,
3255 asm: x86.AADDSS,
3256 reg: regInfo{
3257 inputs: []inputInfo{
3258 {0, 65280},
3259 {1, 65280},
3260 },
3261 outputs: []outputInfo{
3262 {0, 65280},
3263 },
3264 },
3265 },
3266 {
3267 name: "ADDSD",
3268 argLen: 2,
3269 commutative: true,
3270 resultInArg0: true,
3271 asm: x86.AADDSD,
3272 reg: regInfo{
3273 inputs: []inputInfo{
3274 {0, 65280},
3275 {1, 65280},
3276 },
3277 outputs: []outputInfo{
3278 {0, 65280},
3279 },
3280 },
3281 },
3282 {
3283 name: "SUBSS",
3284 argLen: 2,
3285 resultInArg0: true,
3286 asm: x86.ASUBSS,
3287 reg: regInfo{
3288 inputs: []inputInfo{
3289 {0, 65280},
3290 {1, 65280},
3291 },
3292 outputs: []outputInfo{
3293 {0, 65280},
3294 },
3295 },
3296 },
3297 {
3298 name: "SUBSD",
3299 argLen: 2,
3300 resultInArg0: true,
3301 asm: x86.ASUBSD,
3302 reg: regInfo{
3303 inputs: []inputInfo{
3304 {0, 65280},
3305 {1, 65280},
3306 },
3307 outputs: []outputInfo{
3308 {0, 65280},
3309 },
3310 },
3311 },
3312 {
3313 name: "MULSS",
3314 argLen: 2,
3315 commutative: true,
3316 resultInArg0: true,
3317 asm: x86.AMULSS,
3318 reg: regInfo{
3319 inputs: []inputInfo{
3320 {0, 65280},
3321 {1, 65280},
3322 },
3323 outputs: []outputInfo{
3324 {0, 65280},
3325 },
3326 },
3327 },
3328 {
3329 name: "MULSD",
3330 argLen: 2,
3331 commutative: true,
3332 resultInArg0: true,
3333 asm: x86.AMULSD,
3334 reg: regInfo{
3335 inputs: []inputInfo{
3336 {0, 65280},
3337 {1, 65280},
3338 },
3339 outputs: []outputInfo{
3340 {0, 65280},
3341 },
3342 },
3343 },
3344 {
3345 name: "DIVSS",
3346 argLen: 2,
3347 resultInArg0: true,
3348 asm: x86.ADIVSS,
3349 reg: regInfo{
3350 inputs: []inputInfo{
3351 {0, 65280},
3352 {1, 65280},
3353 },
3354 outputs: []outputInfo{
3355 {0, 65280},
3356 },
3357 },
3358 },
3359 {
3360 name: "DIVSD",
3361 argLen: 2,
3362 resultInArg0: true,
3363 asm: x86.ADIVSD,
3364 reg: regInfo{
3365 inputs: []inputInfo{
3366 {0, 65280},
3367 {1, 65280},
3368 },
3369 outputs: []outputInfo{
3370 {0, 65280},
3371 },
3372 },
3373 },
3374 {
3375 name: "MOVSSload",
3376 auxType: auxSymOff,
3377 argLen: 2,
3378 faultOnNilArg0: true,
3379 symEffect: SymRead,
3380 asm: x86.AMOVSS,
3381 reg: regInfo{
3382 inputs: []inputInfo{
3383 {0, 65791},
3384 },
3385 outputs: []outputInfo{
3386 {0, 65280},
3387 },
3388 },
3389 },
3390 {
3391 name: "MOVSDload",
3392 auxType: auxSymOff,
3393 argLen: 2,
3394 faultOnNilArg0: true,
3395 symEffect: SymRead,
3396 asm: x86.AMOVSD,
3397 reg: regInfo{
3398 inputs: []inputInfo{
3399 {0, 65791},
3400 },
3401 outputs: []outputInfo{
3402 {0, 65280},
3403 },
3404 },
3405 },
3406 {
3407 name: "MOVSSconst",
3408 auxType: auxFloat32,
3409 argLen: 0,
3410 rematerializeable: true,
3411 asm: x86.AMOVSS,
3412 reg: regInfo{
3413 outputs: []outputInfo{
3414 {0, 65280},
3415 },
3416 },
3417 },
3418 {
3419 name: "MOVSDconst",
3420 auxType: auxFloat64,
3421 argLen: 0,
3422 rematerializeable: true,
3423 asm: x86.AMOVSD,
3424 reg: regInfo{
3425 outputs: []outputInfo{
3426 {0, 65280},
3427 },
3428 },
3429 },
3430 {
3431 name: "MOVSSloadidx1",
3432 auxType: auxSymOff,
3433 argLen: 3,
3434 symEffect: SymRead,
3435 asm: x86.AMOVSS,
3436 reg: regInfo{
3437 inputs: []inputInfo{
3438 {1, 255},
3439 {0, 65791},
3440 },
3441 outputs: []outputInfo{
3442 {0, 65280},
3443 },
3444 },
3445 },
3446 {
3447 name: "MOVSSloadidx4",
3448 auxType: auxSymOff,
3449 argLen: 3,
3450 symEffect: SymRead,
3451 asm: x86.AMOVSS,
3452 reg: regInfo{
3453 inputs: []inputInfo{
3454 {1, 255},
3455 {0, 65791},
3456 },
3457 outputs: []outputInfo{
3458 {0, 65280},
3459 },
3460 },
3461 },
3462 {
3463 name: "MOVSDloadidx1",
3464 auxType: auxSymOff,
3465 argLen: 3,
3466 symEffect: SymRead,
3467 asm: x86.AMOVSD,
3468 reg: regInfo{
3469 inputs: []inputInfo{
3470 {1, 255},
3471 {0, 65791},
3472 },
3473 outputs: []outputInfo{
3474 {0, 65280},
3475 },
3476 },
3477 },
3478 {
3479 name: "MOVSDloadidx8",
3480 auxType: auxSymOff,
3481 argLen: 3,
3482 symEffect: SymRead,
3483 asm: x86.AMOVSD,
3484 reg: regInfo{
3485 inputs: []inputInfo{
3486 {1, 255},
3487 {0, 65791},
3488 },
3489 outputs: []outputInfo{
3490 {0, 65280},
3491 },
3492 },
3493 },
3494 {
3495 name: "MOVSSstore",
3496 auxType: auxSymOff,
3497 argLen: 3,
3498 faultOnNilArg0: true,
3499 symEffect: SymWrite,
3500 asm: x86.AMOVSS,
3501 reg: regInfo{
3502 inputs: []inputInfo{
3503 {1, 65280},
3504 {0, 65791},
3505 },
3506 },
3507 },
3508 {
3509 name: "MOVSDstore",
3510 auxType: auxSymOff,
3511 argLen: 3,
3512 faultOnNilArg0: true,
3513 symEffect: SymWrite,
3514 asm: x86.AMOVSD,
3515 reg: regInfo{
3516 inputs: []inputInfo{
3517 {1, 65280},
3518 {0, 65791},
3519 },
3520 },
3521 },
3522 {
3523 name: "MOVSSstoreidx1",
3524 auxType: auxSymOff,
3525 argLen: 4,
3526 symEffect: SymWrite,
3527 asm: x86.AMOVSS,
3528 reg: regInfo{
3529 inputs: []inputInfo{
3530 {1, 255},
3531 {2, 65280},
3532 {0, 65791},
3533 },
3534 },
3535 },
3536 {
3537 name: "MOVSSstoreidx4",
3538 auxType: auxSymOff,
3539 argLen: 4,
3540 symEffect: SymWrite,
3541 asm: x86.AMOVSS,
3542 reg: regInfo{
3543 inputs: []inputInfo{
3544 {1, 255},
3545 {2, 65280},
3546 {0, 65791},
3547 },
3548 },
3549 },
3550 {
3551 name: "MOVSDstoreidx1",
3552 auxType: auxSymOff,
3553 argLen: 4,
3554 symEffect: SymWrite,
3555 asm: x86.AMOVSD,
3556 reg: regInfo{
3557 inputs: []inputInfo{
3558 {1, 255},
3559 {2, 65280},
3560 {0, 65791},
3561 },
3562 },
3563 },
3564 {
3565 name: "MOVSDstoreidx8",
3566 auxType: auxSymOff,
3567 argLen: 4,
3568 symEffect: SymWrite,
3569 asm: x86.AMOVSD,
3570 reg: regInfo{
3571 inputs: []inputInfo{
3572 {1, 255},
3573 {2, 65280},
3574 {0, 65791},
3575 },
3576 },
3577 },
3578 {
3579 name: "ADDSSload",
3580 auxType: auxSymOff,
3581 argLen: 3,
3582 resultInArg0: true,
3583 faultOnNilArg1: true,
3584 symEffect: SymRead,
3585 asm: x86.AADDSS,
3586 reg: regInfo{
3587 inputs: []inputInfo{
3588 {0, 65280},
3589 {1, 65791},
3590 },
3591 outputs: []outputInfo{
3592 {0, 65280},
3593 },
3594 },
3595 },
3596 {
3597 name: "ADDSDload",
3598 auxType: auxSymOff,
3599 argLen: 3,
3600 resultInArg0: true,
3601 faultOnNilArg1: true,
3602 symEffect: SymRead,
3603 asm: x86.AADDSD,
3604 reg: regInfo{
3605 inputs: []inputInfo{
3606 {0, 65280},
3607 {1, 65791},
3608 },
3609 outputs: []outputInfo{
3610 {0, 65280},
3611 },
3612 },
3613 },
3614 {
3615 name: "SUBSSload",
3616 auxType: auxSymOff,
3617 argLen: 3,
3618 resultInArg0: true,
3619 faultOnNilArg1: true,
3620 symEffect: SymRead,
3621 asm: x86.ASUBSS,
3622 reg: regInfo{
3623 inputs: []inputInfo{
3624 {0, 65280},
3625 {1, 65791},
3626 },
3627 outputs: []outputInfo{
3628 {0, 65280},
3629 },
3630 },
3631 },
3632 {
3633 name: "SUBSDload",
3634 auxType: auxSymOff,
3635 argLen: 3,
3636 resultInArg0: true,
3637 faultOnNilArg1: true,
3638 symEffect: SymRead,
3639 asm: x86.ASUBSD,
3640 reg: regInfo{
3641 inputs: []inputInfo{
3642 {0, 65280},
3643 {1, 65791},
3644 },
3645 outputs: []outputInfo{
3646 {0, 65280},
3647 },
3648 },
3649 },
3650 {
3651 name: "MULSSload",
3652 auxType: auxSymOff,
3653 argLen: 3,
3654 resultInArg0: true,
3655 faultOnNilArg1: true,
3656 symEffect: SymRead,
3657 asm: x86.AMULSS,
3658 reg: regInfo{
3659 inputs: []inputInfo{
3660 {0, 65280},
3661 {1, 65791},
3662 },
3663 outputs: []outputInfo{
3664 {0, 65280},
3665 },
3666 },
3667 },
3668 {
3669 name: "MULSDload",
3670 auxType: auxSymOff,
3671 argLen: 3,
3672 resultInArg0: true,
3673 faultOnNilArg1: true,
3674 symEffect: SymRead,
3675 asm: x86.AMULSD,
3676 reg: regInfo{
3677 inputs: []inputInfo{
3678 {0, 65280},
3679 {1, 65791},
3680 },
3681 outputs: []outputInfo{
3682 {0, 65280},
3683 },
3684 },
3685 },
3686 {
3687 name: "DIVSSload",
3688 auxType: auxSymOff,
3689 argLen: 3,
3690 resultInArg0: true,
3691 faultOnNilArg1: true,
3692 symEffect: SymRead,
3693 asm: x86.ADIVSS,
3694 reg: regInfo{
3695 inputs: []inputInfo{
3696 {0, 65280},
3697 {1, 65791},
3698 },
3699 outputs: []outputInfo{
3700 {0, 65280},
3701 },
3702 },
3703 },
3704 {
3705 name: "DIVSDload",
3706 auxType: auxSymOff,
3707 argLen: 3,
3708 resultInArg0: true,
3709 faultOnNilArg1: true,
3710 symEffect: SymRead,
3711 asm: x86.ADIVSD,
3712 reg: regInfo{
3713 inputs: []inputInfo{
3714 {0, 65280},
3715 {1, 65791},
3716 },
3717 outputs: []outputInfo{
3718 {0, 65280},
3719 },
3720 },
3721 },
3722 {
3723 name: "ADDL",
3724 argLen: 2,
3725 commutative: true,
3726 clobberFlags: true,
3727 asm: x86.AADDL,
3728 reg: regInfo{
3729 inputs: []inputInfo{
3730 {1, 239},
3731 {0, 255},
3732 },
3733 outputs: []outputInfo{
3734 {0, 239},
3735 },
3736 },
3737 },
3738 {
3739 name: "ADDLconst",
3740 auxType: auxInt32,
3741 argLen: 1,
3742 clobberFlags: true,
3743 asm: x86.AADDL,
3744 reg: regInfo{
3745 inputs: []inputInfo{
3746 {0, 255},
3747 },
3748 outputs: []outputInfo{
3749 {0, 239},
3750 },
3751 },
3752 },
3753 {
3754 name: "ADDLcarry",
3755 argLen: 2,
3756 commutative: true,
3757 resultInArg0: true,
3758 asm: x86.AADDL,
3759 reg: regInfo{
3760 inputs: []inputInfo{
3761 {0, 239},
3762 {1, 239},
3763 },
3764 outputs: []outputInfo{
3765 {1, 0},
3766 {0, 239},
3767 },
3768 },
3769 },
3770 {
3771 name: "ADDLconstcarry",
3772 auxType: auxInt32,
3773 argLen: 1,
3774 resultInArg0: true,
3775 asm: x86.AADDL,
3776 reg: regInfo{
3777 inputs: []inputInfo{
3778 {0, 239},
3779 },
3780 outputs: []outputInfo{
3781 {1, 0},
3782 {0, 239},
3783 },
3784 },
3785 },
3786 {
3787 name: "ADCL",
3788 argLen: 3,
3789 commutative: true,
3790 resultInArg0: true,
3791 clobberFlags: true,
3792 asm: x86.AADCL,
3793 reg: regInfo{
3794 inputs: []inputInfo{
3795 {0, 239},
3796 {1, 239},
3797 },
3798 outputs: []outputInfo{
3799 {0, 239},
3800 },
3801 },
3802 },
3803 {
3804 name: "ADCLconst",
3805 auxType: auxInt32,
3806 argLen: 2,
3807 resultInArg0: true,
3808 clobberFlags: true,
3809 asm: x86.AADCL,
3810 reg: regInfo{
3811 inputs: []inputInfo{
3812 {0, 239},
3813 },
3814 outputs: []outputInfo{
3815 {0, 239},
3816 },
3817 },
3818 },
3819 {
3820 name: "SUBL",
3821 argLen: 2,
3822 resultInArg0: true,
3823 clobberFlags: true,
3824 asm: x86.ASUBL,
3825 reg: regInfo{
3826 inputs: []inputInfo{
3827 {0, 239},
3828 {1, 239},
3829 },
3830 outputs: []outputInfo{
3831 {0, 239},
3832 },
3833 },
3834 },
3835 {
3836 name: "SUBLconst",
3837 auxType: auxInt32,
3838 argLen: 1,
3839 resultInArg0: true,
3840 clobberFlags: true,
3841 asm: x86.ASUBL,
3842 reg: regInfo{
3843 inputs: []inputInfo{
3844 {0, 239},
3845 },
3846 outputs: []outputInfo{
3847 {0, 239},
3848 },
3849 },
3850 },
3851 {
3852 name: "SUBLcarry",
3853 argLen: 2,
3854 resultInArg0: true,
3855 asm: x86.ASUBL,
3856 reg: regInfo{
3857 inputs: []inputInfo{
3858 {0, 239},
3859 {1, 239},
3860 },
3861 outputs: []outputInfo{
3862 {1, 0},
3863 {0, 239},
3864 },
3865 },
3866 },
3867 {
3868 name: "SUBLconstcarry",
3869 auxType: auxInt32,
3870 argLen: 1,
3871 resultInArg0: true,
3872 asm: x86.ASUBL,
3873 reg: regInfo{
3874 inputs: []inputInfo{
3875 {0, 239},
3876 },
3877 outputs: []outputInfo{
3878 {1, 0},
3879 {0, 239},
3880 },
3881 },
3882 },
3883 {
3884 name: "SBBL",
3885 argLen: 3,
3886 resultInArg0: true,
3887 clobberFlags: true,
3888 asm: x86.ASBBL,
3889 reg: regInfo{
3890 inputs: []inputInfo{
3891 {0, 239},
3892 {1, 239},
3893 },
3894 outputs: []outputInfo{
3895 {0, 239},
3896 },
3897 },
3898 },
3899 {
3900 name: "SBBLconst",
3901 auxType: auxInt32,
3902 argLen: 2,
3903 resultInArg0: true,
3904 clobberFlags: true,
3905 asm: x86.ASBBL,
3906 reg: regInfo{
3907 inputs: []inputInfo{
3908 {0, 239},
3909 },
3910 outputs: []outputInfo{
3911 {0, 239},
3912 },
3913 },
3914 },
3915 {
3916 name: "MULL",
3917 argLen: 2,
3918 commutative: true,
3919 resultInArg0: true,
3920 clobberFlags: true,
3921 asm: x86.AIMULL,
3922 reg: regInfo{
3923 inputs: []inputInfo{
3924 {0, 239},
3925 {1, 239},
3926 },
3927 outputs: []outputInfo{
3928 {0, 239},
3929 },
3930 },
3931 },
3932 {
3933 name: "MULLconst",
3934 auxType: auxInt32,
3935 argLen: 1,
3936 clobberFlags: true,
3937 asm: x86.AIMUL3L,
3938 reg: regInfo{
3939 inputs: []inputInfo{
3940 {0, 239},
3941 },
3942 outputs: []outputInfo{
3943 {0, 239},
3944 },
3945 },
3946 },
3947 {
3948 name: "MULLU",
3949 argLen: 2,
3950 commutative: true,
3951 clobberFlags: true,
3952 asm: x86.AMULL,
3953 reg: regInfo{
3954 inputs: []inputInfo{
3955 {0, 1},
3956 {1, 255},
3957 },
3958 clobbers: 4,
3959 outputs: []outputInfo{
3960 {1, 0},
3961 {0, 1},
3962 },
3963 },
3964 },
3965 {
3966 name: "HMULL",
3967 argLen: 2,
3968 commutative: true,
3969 clobberFlags: true,
3970 asm: x86.AIMULL,
3971 reg: regInfo{
3972 inputs: []inputInfo{
3973 {0, 1},
3974 {1, 255},
3975 },
3976 clobbers: 1,
3977 outputs: []outputInfo{
3978 {0, 4},
3979 },
3980 },
3981 },
3982 {
3983 name: "HMULLU",
3984 argLen: 2,
3985 commutative: true,
3986 clobberFlags: true,
3987 asm: x86.AMULL,
3988 reg: regInfo{
3989 inputs: []inputInfo{
3990 {0, 1},
3991 {1, 255},
3992 },
3993 clobbers: 1,
3994 outputs: []outputInfo{
3995 {0, 4},
3996 },
3997 },
3998 },
3999 {
4000 name: "MULLQU",
4001 argLen: 2,
4002 commutative: true,
4003 clobberFlags: true,
4004 asm: x86.AMULL,
4005 reg: regInfo{
4006 inputs: []inputInfo{
4007 {0, 1},
4008 {1, 255},
4009 },
4010 outputs: []outputInfo{
4011 {0, 4},
4012 {1, 1},
4013 },
4014 },
4015 },
4016 {
4017 name: "AVGLU",
4018 argLen: 2,
4019 commutative: true,
4020 resultInArg0: true,
4021 clobberFlags: true,
4022 reg: regInfo{
4023 inputs: []inputInfo{
4024 {0, 239},
4025 {1, 239},
4026 },
4027 outputs: []outputInfo{
4028 {0, 239},
4029 },
4030 },
4031 },
4032 {
4033 name: "DIVL",
4034 auxType: auxBool,
4035 argLen: 2,
4036 clobberFlags: true,
4037 asm: x86.AIDIVL,
4038 reg: regInfo{
4039 inputs: []inputInfo{
4040 {0, 1},
4041 {1, 251},
4042 },
4043 clobbers: 4,
4044 outputs: []outputInfo{
4045 {0, 1},
4046 },
4047 },
4048 },
4049 {
4050 name: "DIVW",
4051 auxType: auxBool,
4052 argLen: 2,
4053 clobberFlags: true,
4054 asm: x86.AIDIVW,
4055 reg: regInfo{
4056 inputs: []inputInfo{
4057 {0, 1},
4058 {1, 251},
4059 },
4060 clobbers: 4,
4061 outputs: []outputInfo{
4062 {0, 1},
4063 },
4064 },
4065 },
4066 {
4067 name: "DIVLU",
4068 argLen: 2,
4069 clobberFlags: true,
4070 asm: x86.ADIVL,
4071 reg: regInfo{
4072 inputs: []inputInfo{
4073 {0, 1},
4074 {1, 251},
4075 },
4076 clobbers: 4,
4077 outputs: []outputInfo{
4078 {0, 1},
4079 },
4080 },
4081 },
4082 {
4083 name: "DIVWU",
4084 argLen: 2,
4085 clobberFlags: true,
4086 asm: x86.ADIVW,
4087 reg: regInfo{
4088 inputs: []inputInfo{
4089 {0, 1},
4090 {1, 251},
4091 },
4092 clobbers: 4,
4093 outputs: []outputInfo{
4094 {0, 1},
4095 },
4096 },
4097 },
4098 {
4099 name: "MODL",
4100 auxType: auxBool,
4101 argLen: 2,
4102 clobberFlags: true,
4103 asm: x86.AIDIVL,
4104 reg: regInfo{
4105 inputs: []inputInfo{
4106 {0, 1},
4107 {1, 251},
4108 },
4109 clobbers: 1,
4110 outputs: []outputInfo{
4111 {0, 4},
4112 },
4113 },
4114 },
4115 {
4116 name: "MODW",
4117 auxType: auxBool,
4118 argLen: 2,
4119 clobberFlags: true,
4120 asm: x86.AIDIVW,
4121 reg: regInfo{
4122 inputs: []inputInfo{
4123 {0, 1},
4124 {1, 251},
4125 },
4126 clobbers: 1,
4127 outputs: []outputInfo{
4128 {0, 4},
4129 },
4130 },
4131 },
4132 {
4133 name: "MODLU",
4134 argLen: 2,
4135 clobberFlags: true,
4136 asm: x86.ADIVL,
4137 reg: regInfo{
4138 inputs: []inputInfo{
4139 {0, 1},
4140 {1, 251},
4141 },
4142 clobbers: 1,
4143 outputs: []outputInfo{
4144 {0, 4},
4145 },
4146 },
4147 },
4148 {
4149 name: "MODWU",
4150 argLen: 2,
4151 clobberFlags: true,
4152 asm: x86.ADIVW,
4153 reg: regInfo{
4154 inputs: []inputInfo{
4155 {0, 1},
4156 {1, 251},
4157 },
4158 clobbers: 1,
4159 outputs: []outputInfo{
4160 {0, 4},
4161 },
4162 },
4163 },
4164 {
4165 name: "ANDL",
4166 argLen: 2,
4167 commutative: true,
4168 resultInArg0: true,
4169 clobberFlags: true,
4170 asm: x86.AANDL,
4171 reg: regInfo{
4172 inputs: []inputInfo{
4173 {0, 239},
4174 {1, 239},
4175 },
4176 outputs: []outputInfo{
4177 {0, 239},
4178 },
4179 },
4180 },
4181 {
4182 name: "ANDLconst",
4183 auxType: auxInt32,
4184 argLen: 1,
4185 resultInArg0: true,
4186 clobberFlags: true,
4187 asm: x86.AANDL,
4188 reg: regInfo{
4189 inputs: []inputInfo{
4190 {0, 239},
4191 },
4192 outputs: []outputInfo{
4193 {0, 239},
4194 },
4195 },
4196 },
4197 {
4198 name: "ORL",
4199 argLen: 2,
4200 commutative: true,
4201 resultInArg0: true,
4202 clobberFlags: true,
4203 asm: x86.AORL,
4204 reg: regInfo{
4205 inputs: []inputInfo{
4206 {0, 239},
4207 {1, 239},
4208 },
4209 outputs: []outputInfo{
4210 {0, 239},
4211 },
4212 },
4213 },
4214 {
4215 name: "ORLconst",
4216 auxType: auxInt32,
4217 argLen: 1,
4218 resultInArg0: true,
4219 clobberFlags: true,
4220 asm: x86.AORL,
4221 reg: regInfo{
4222 inputs: []inputInfo{
4223 {0, 239},
4224 },
4225 outputs: []outputInfo{
4226 {0, 239},
4227 },
4228 },
4229 },
4230 {
4231 name: "XORL",
4232 argLen: 2,
4233 commutative: true,
4234 resultInArg0: true,
4235 clobberFlags: true,
4236 asm: x86.AXORL,
4237 reg: regInfo{
4238 inputs: []inputInfo{
4239 {0, 239},
4240 {1, 239},
4241 },
4242 outputs: []outputInfo{
4243 {0, 239},
4244 },
4245 },
4246 },
4247 {
4248 name: "XORLconst",
4249 auxType: auxInt32,
4250 argLen: 1,
4251 resultInArg0: true,
4252 clobberFlags: true,
4253 asm: x86.AXORL,
4254 reg: regInfo{
4255 inputs: []inputInfo{
4256 {0, 239},
4257 },
4258 outputs: []outputInfo{
4259 {0, 239},
4260 },
4261 },
4262 },
4263 {
4264 name: "CMPL",
4265 argLen: 2,
4266 asm: x86.ACMPL,
4267 reg: regInfo{
4268 inputs: []inputInfo{
4269 {0, 255},
4270 {1, 255},
4271 },
4272 },
4273 },
4274 {
4275 name: "CMPW",
4276 argLen: 2,
4277 asm: x86.ACMPW,
4278 reg: regInfo{
4279 inputs: []inputInfo{
4280 {0, 255},
4281 {1, 255},
4282 },
4283 },
4284 },
4285 {
4286 name: "CMPB",
4287 argLen: 2,
4288 asm: x86.ACMPB,
4289 reg: regInfo{
4290 inputs: []inputInfo{
4291 {0, 255},
4292 {1, 255},
4293 },
4294 },
4295 },
4296 {
4297 name: "CMPLconst",
4298 auxType: auxInt32,
4299 argLen: 1,
4300 asm: x86.ACMPL,
4301 reg: regInfo{
4302 inputs: []inputInfo{
4303 {0, 255},
4304 },
4305 },
4306 },
4307 {
4308 name: "CMPWconst",
4309 auxType: auxInt16,
4310 argLen: 1,
4311 asm: x86.ACMPW,
4312 reg: regInfo{
4313 inputs: []inputInfo{
4314 {0, 255},
4315 },
4316 },
4317 },
4318 {
4319 name: "CMPBconst",
4320 auxType: auxInt8,
4321 argLen: 1,
4322 asm: x86.ACMPB,
4323 reg: regInfo{
4324 inputs: []inputInfo{
4325 {0, 255},
4326 },
4327 },
4328 },
4329 {
4330 name: "CMPLload",
4331 auxType: auxSymOff,
4332 argLen: 3,
4333 faultOnNilArg0: true,
4334 symEffect: SymRead,
4335 asm: x86.ACMPL,
4336 reg: regInfo{
4337 inputs: []inputInfo{
4338 {1, 255},
4339 {0, 65791},
4340 },
4341 },
4342 },
4343 {
4344 name: "CMPWload",
4345 auxType: auxSymOff,
4346 argLen: 3,
4347 faultOnNilArg0: true,
4348 symEffect: SymRead,
4349 asm: x86.ACMPW,
4350 reg: regInfo{
4351 inputs: []inputInfo{
4352 {1, 255},
4353 {0, 65791},
4354 },
4355 },
4356 },
4357 {
4358 name: "CMPBload",
4359 auxType: auxSymOff,
4360 argLen: 3,
4361 faultOnNilArg0: true,
4362 symEffect: SymRead,
4363 asm: x86.ACMPB,
4364 reg: regInfo{
4365 inputs: []inputInfo{
4366 {1, 255},
4367 {0, 65791},
4368 },
4369 },
4370 },
4371 {
4372 name: "CMPLconstload",
4373 auxType: auxSymValAndOff,
4374 argLen: 2,
4375 faultOnNilArg0: true,
4376 symEffect: SymRead,
4377 asm: x86.ACMPL,
4378 reg: regInfo{
4379 inputs: []inputInfo{
4380 {0, 65791},
4381 },
4382 },
4383 },
4384 {
4385 name: "CMPWconstload",
4386 auxType: auxSymValAndOff,
4387 argLen: 2,
4388 faultOnNilArg0: true,
4389 symEffect: SymRead,
4390 asm: x86.ACMPW,
4391 reg: regInfo{
4392 inputs: []inputInfo{
4393 {0, 65791},
4394 },
4395 },
4396 },
4397 {
4398 name: "CMPBconstload",
4399 auxType: auxSymValAndOff,
4400 argLen: 2,
4401 faultOnNilArg0: true,
4402 symEffect: SymRead,
4403 asm: x86.ACMPB,
4404 reg: regInfo{
4405 inputs: []inputInfo{
4406 {0, 65791},
4407 },
4408 },
4409 },
4410 {
4411 name: "UCOMISS",
4412 argLen: 2,
4413 asm: x86.AUCOMISS,
4414 reg: regInfo{
4415 inputs: []inputInfo{
4416 {0, 65280},
4417 {1, 65280},
4418 },
4419 },
4420 },
4421 {
4422 name: "UCOMISD",
4423 argLen: 2,
4424 asm: x86.AUCOMISD,
4425 reg: regInfo{
4426 inputs: []inputInfo{
4427 {0, 65280},
4428 {1, 65280},
4429 },
4430 },
4431 },
4432 {
4433 name: "TESTL",
4434 argLen: 2,
4435 commutative: true,
4436 asm: x86.ATESTL,
4437 reg: regInfo{
4438 inputs: []inputInfo{
4439 {0, 255},
4440 {1, 255},
4441 },
4442 },
4443 },
4444 {
4445 name: "TESTW",
4446 argLen: 2,
4447 commutative: true,
4448 asm: x86.ATESTW,
4449 reg: regInfo{
4450 inputs: []inputInfo{
4451 {0, 255},
4452 {1, 255},
4453 },
4454 },
4455 },
4456 {
4457 name: "TESTB",
4458 argLen: 2,
4459 commutative: true,
4460 asm: x86.ATESTB,
4461 reg: regInfo{
4462 inputs: []inputInfo{
4463 {0, 255},
4464 {1, 255},
4465 },
4466 },
4467 },
4468 {
4469 name: "TESTLconst",
4470 auxType: auxInt32,
4471 argLen: 1,
4472 asm: x86.ATESTL,
4473 reg: regInfo{
4474 inputs: []inputInfo{
4475 {0, 255},
4476 },
4477 },
4478 },
4479 {
4480 name: "TESTWconst",
4481 auxType: auxInt16,
4482 argLen: 1,
4483 asm: x86.ATESTW,
4484 reg: regInfo{
4485 inputs: []inputInfo{
4486 {0, 255},
4487 },
4488 },
4489 },
4490 {
4491 name: "TESTBconst",
4492 auxType: auxInt8,
4493 argLen: 1,
4494 asm: x86.ATESTB,
4495 reg: regInfo{
4496 inputs: []inputInfo{
4497 {0, 255},
4498 },
4499 },
4500 },
4501 {
4502 name: "SHLL",
4503 argLen: 2,
4504 resultInArg0: true,
4505 clobberFlags: true,
4506 asm: x86.ASHLL,
4507 reg: regInfo{
4508 inputs: []inputInfo{
4509 {1, 2},
4510 {0, 239},
4511 },
4512 outputs: []outputInfo{
4513 {0, 239},
4514 },
4515 },
4516 },
4517 {
4518 name: "SHLLconst",
4519 auxType: auxInt32,
4520 argLen: 1,
4521 resultInArg0: true,
4522 clobberFlags: true,
4523 asm: x86.ASHLL,
4524 reg: regInfo{
4525 inputs: []inputInfo{
4526 {0, 239},
4527 },
4528 outputs: []outputInfo{
4529 {0, 239},
4530 },
4531 },
4532 },
4533 {
4534 name: "SHRL",
4535 argLen: 2,
4536 resultInArg0: true,
4537 clobberFlags: true,
4538 asm: x86.ASHRL,
4539 reg: regInfo{
4540 inputs: []inputInfo{
4541 {1, 2},
4542 {0, 239},
4543 },
4544 outputs: []outputInfo{
4545 {0, 239},
4546 },
4547 },
4548 },
4549 {
4550 name: "SHRW",
4551 argLen: 2,
4552 resultInArg0: true,
4553 clobberFlags: true,
4554 asm: x86.ASHRW,
4555 reg: regInfo{
4556 inputs: []inputInfo{
4557 {1, 2},
4558 {0, 239},
4559 },
4560 outputs: []outputInfo{
4561 {0, 239},
4562 },
4563 },
4564 },
4565 {
4566 name: "SHRB",
4567 argLen: 2,
4568 resultInArg0: true,
4569 clobberFlags: true,
4570 asm: x86.ASHRB,
4571 reg: regInfo{
4572 inputs: []inputInfo{
4573 {1, 2},
4574 {0, 239},
4575 },
4576 outputs: []outputInfo{
4577 {0, 239},
4578 },
4579 },
4580 },
4581 {
4582 name: "SHRLconst",
4583 auxType: auxInt32,
4584 argLen: 1,
4585 resultInArg0: true,
4586 clobberFlags: true,
4587 asm: x86.ASHRL,
4588 reg: regInfo{
4589 inputs: []inputInfo{
4590 {0, 239},
4591 },
4592 outputs: []outputInfo{
4593 {0, 239},
4594 },
4595 },
4596 },
4597 {
4598 name: "SHRWconst",
4599 auxType: auxInt16,
4600 argLen: 1,
4601 resultInArg0: true,
4602 clobberFlags: true,
4603 asm: x86.ASHRW,
4604 reg: regInfo{
4605 inputs: []inputInfo{
4606 {0, 239},
4607 },
4608 outputs: []outputInfo{
4609 {0, 239},
4610 },
4611 },
4612 },
4613 {
4614 name: "SHRBconst",
4615 auxType: auxInt8,
4616 argLen: 1,
4617 resultInArg0: true,
4618 clobberFlags: true,
4619 asm: x86.ASHRB,
4620 reg: regInfo{
4621 inputs: []inputInfo{
4622 {0, 239},
4623 },
4624 outputs: []outputInfo{
4625 {0, 239},
4626 },
4627 },
4628 },
4629 {
4630 name: "SARL",
4631 argLen: 2,
4632 resultInArg0: true,
4633 clobberFlags: true,
4634 asm: x86.ASARL,
4635 reg: regInfo{
4636 inputs: []inputInfo{
4637 {1, 2},
4638 {0, 239},
4639 },
4640 outputs: []outputInfo{
4641 {0, 239},
4642 },
4643 },
4644 },
4645 {
4646 name: "SARW",
4647 argLen: 2,
4648 resultInArg0: true,
4649 clobberFlags: true,
4650 asm: x86.ASARW,
4651 reg: regInfo{
4652 inputs: []inputInfo{
4653 {1, 2},
4654 {0, 239},
4655 },
4656 outputs: []outputInfo{
4657 {0, 239},
4658 },
4659 },
4660 },
4661 {
4662 name: "SARB",
4663 argLen: 2,
4664 resultInArg0: true,
4665 clobberFlags: true,
4666 asm: x86.ASARB,
4667 reg: regInfo{
4668 inputs: []inputInfo{
4669 {1, 2},
4670 {0, 239},
4671 },
4672 outputs: []outputInfo{
4673 {0, 239},
4674 },
4675 },
4676 },
4677 {
4678 name: "SARLconst",
4679 auxType: auxInt32,
4680 argLen: 1,
4681 resultInArg0: true,
4682 clobberFlags: true,
4683 asm: x86.ASARL,
4684 reg: regInfo{
4685 inputs: []inputInfo{
4686 {0, 239},
4687 },
4688 outputs: []outputInfo{
4689 {0, 239},
4690 },
4691 },
4692 },
4693 {
4694 name: "SARWconst",
4695 auxType: auxInt16,
4696 argLen: 1,
4697 resultInArg0: true,
4698 clobberFlags: true,
4699 asm: x86.ASARW,
4700 reg: regInfo{
4701 inputs: []inputInfo{
4702 {0, 239},
4703 },
4704 outputs: []outputInfo{
4705 {0, 239},
4706 },
4707 },
4708 },
4709 {
4710 name: "SARBconst",
4711 auxType: auxInt8,
4712 argLen: 1,
4713 resultInArg0: true,
4714 clobberFlags: true,
4715 asm: x86.ASARB,
4716 reg: regInfo{
4717 inputs: []inputInfo{
4718 {0, 239},
4719 },
4720 outputs: []outputInfo{
4721 {0, 239},
4722 },
4723 },
4724 },
4725 {
4726 name: "ROLL",
4727 argLen: 2,
4728 resultInArg0: true,
4729 clobberFlags: true,
4730 asm: x86.AROLL,
4731 reg: regInfo{
4732 inputs: []inputInfo{
4733 {1, 2},
4734 {0, 239},
4735 },
4736 outputs: []outputInfo{
4737 {0, 239},
4738 },
4739 },
4740 },
4741 {
4742 name: "ROLW",
4743 argLen: 2,
4744 resultInArg0: true,
4745 clobberFlags: true,
4746 asm: x86.AROLW,
4747 reg: regInfo{
4748 inputs: []inputInfo{
4749 {1, 2},
4750 {0, 239},
4751 },
4752 outputs: []outputInfo{
4753 {0, 239},
4754 },
4755 },
4756 },
4757 {
4758 name: "ROLB",
4759 argLen: 2,
4760 resultInArg0: true,
4761 clobberFlags: true,
4762 asm: x86.AROLB,
4763 reg: regInfo{
4764 inputs: []inputInfo{
4765 {1, 2},
4766 {0, 239},
4767 },
4768 outputs: []outputInfo{
4769 {0, 239},
4770 },
4771 },
4772 },
4773 {
4774 name: "ROLLconst",
4775 auxType: auxInt32,
4776 argLen: 1,
4777 resultInArg0: true,
4778 clobberFlags: true,
4779 asm: x86.AROLL,
4780 reg: regInfo{
4781 inputs: []inputInfo{
4782 {0, 239},
4783 },
4784 outputs: []outputInfo{
4785 {0, 239},
4786 },
4787 },
4788 },
4789 {
4790 name: "ROLWconst",
4791 auxType: auxInt16,
4792 argLen: 1,
4793 resultInArg0: true,
4794 clobberFlags: true,
4795 asm: x86.AROLW,
4796 reg: regInfo{
4797 inputs: []inputInfo{
4798 {0, 239},
4799 },
4800 outputs: []outputInfo{
4801 {0, 239},
4802 },
4803 },
4804 },
4805 {
4806 name: "ROLBconst",
4807 auxType: auxInt8,
4808 argLen: 1,
4809 resultInArg0: true,
4810 clobberFlags: true,
4811 asm: x86.AROLB,
4812 reg: regInfo{
4813 inputs: []inputInfo{
4814 {0, 239},
4815 },
4816 outputs: []outputInfo{
4817 {0, 239},
4818 },
4819 },
4820 },
4821 {
4822 name: "ADDLload",
4823 auxType: auxSymOff,
4824 argLen: 3,
4825 resultInArg0: true,
4826 clobberFlags: true,
4827 faultOnNilArg1: true,
4828 symEffect: SymRead,
4829 asm: x86.AADDL,
4830 reg: regInfo{
4831 inputs: []inputInfo{
4832 {0, 239},
4833 {1, 65791},
4834 },
4835 outputs: []outputInfo{
4836 {0, 239},
4837 },
4838 },
4839 },
4840 {
4841 name: "SUBLload",
4842 auxType: auxSymOff,
4843 argLen: 3,
4844 resultInArg0: true,
4845 clobberFlags: true,
4846 faultOnNilArg1: true,
4847 symEffect: SymRead,
4848 asm: x86.ASUBL,
4849 reg: regInfo{
4850 inputs: []inputInfo{
4851 {0, 239},
4852 {1, 65791},
4853 },
4854 outputs: []outputInfo{
4855 {0, 239},
4856 },
4857 },
4858 },
4859 {
4860 name: "MULLload",
4861 auxType: auxSymOff,
4862 argLen: 3,
4863 resultInArg0: true,
4864 clobberFlags: true,
4865 faultOnNilArg1: true,
4866 symEffect: SymRead,
4867 asm: x86.AIMULL,
4868 reg: regInfo{
4869 inputs: []inputInfo{
4870 {0, 239},
4871 {1, 65791},
4872 },
4873 outputs: []outputInfo{
4874 {0, 239},
4875 },
4876 },
4877 },
4878 {
4879 name: "ANDLload",
4880 auxType: auxSymOff,
4881 argLen: 3,
4882 resultInArg0: true,
4883 clobberFlags: true,
4884 faultOnNilArg1: true,
4885 symEffect: SymRead,
4886 asm: x86.AANDL,
4887 reg: regInfo{
4888 inputs: []inputInfo{
4889 {0, 239},
4890 {1, 65791},
4891 },
4892 outputs: []outputInfo{
4893 {0, 239},
4894 },
4895 },
4896 },
4897 {
4898 name: "ORLload",
4899 auxType: auxSymOff,
4900 argLen: 3,
4901 resultInArg0: true,
4902 clobberFlags: true,
4903 faultOnNilArg1: true,
4904 symEffect: SymRead,
4905 asm: x86.AORL,
4906 reg: regInfo{
4907 inputs: []inputInfo{
4908 {0, 239},
4909 {1, 65791},
4910 },
4911 outputs: []outputInfo{
4912 {0, 239},
4913 },
4914 },
4915 },
4916 {
4917 name: "XORLload",
4918 auxType: auxSymOff,
4919 argLen: 3,
4920 resultInArg0: true,
4921 clobberFlags: true,
4922 faultOnNilArg1: true,
4923 symEffect: SymRead,
4924 asm: x86.AXORL,
4925 reg: regInfo{
4926 inputs: []inputInfo{
4927 {0, 239},
4928 {1, 65791},
4929 },
4930 outputs: []outputInfo{
4931 {0, 239},
4932 },
4933 },
4934 },
4935 {
4936 name: "ADDLloadidx4",
4937 auxType: auxSymOff,
4938 argLen: 4,
4939 resultInArg0: true,
4940 clobberFlags: true,
4941 symEffect: SymRead,
4942 asm: x86.AADDL,
4943 reg: regInfo{
4944 inputs: []inputInfo{
4945 {0, 239},
4946 {2, 255},
4947 {1, 65791},
4948 },
4949 outputs: []outputInfo{
4950 {0, 239},
4951 },
4952 },
4953 },
4954 {
4955 name: "SUBLloadidx4",
4956 auxType: auxSymOff,
4957 argLen: 4,
4958 resultInArg0: true,
4959 clobberFlags: true,
4960 symEffect: SymRead,
4961 asm: x86.ASUBL,
4962 reg: regInfo{
4963 inputs: []inputInfo{
4964 {0, 239},
4965 {2, 255},
4966 {1, 65791},
4967 },
4968 outputs: []outputInfo{
4969 {0, 239},
4970 },
4971 },
4972 },
4973 {
4974 name: "MULLloadidx4",
4975 auxType: auxSymOff,
4976 argLen: 4,
4977 resultInArg0: true,
4978 clobberFlags: true,
4979 symEffect: SymRead,
4980 asm: x86.AIMULL,
4981 reg: regInfo{
4982 inputs: []inputInfo{
4983 {0, 239},
4984 {2, 255},
4985 {1, 65791},
4986 },
4987 outputs: []outputInfo{
4988 {0, 239},
4989 },
4990 },
4991 },
4992 {
4993 name: "ANDLloadidx4",
4994 auxType: auxSymOff,
4995 argLen: 4,
4996 resultInArg0: true,
4997 clobberFlags: true,
4998 symEffect: SymRead,
4999 asm: x86.AANDL,
5000 reg: regInfo{
5001 inputs: []inputInfo{
5002 {0, 239},
5003 {2, 255},
5004 {1, 65791},
5005 },
5006 outputs: []outputInfo{
5007 {0, 239},
5008 },
5009 },
5010 },
5011 {
5012 name: "ORLloadidx4",
5013 auxType: auxSymOff,
5014 argLen: 4,
5015 resultInArg0: true,
5016 clobberFlags: true,
5017 symEffect: SymRead,
5018 asm: x86.AORL,
5019 reg: regInfo{
5020 inputs: []inputInfo{
5021 {0, 239},
5022 {2, 255},
5023 {1, 65791},
5024 },
5025 outputs: []outputInfo{
5026 {0, 239},
5027 },
5028 },
5029 },
5030 {
5031 name: "XORLloadidx4",
5032 auxType: auxSymOff,
5033 argLen: 4,
5034 resultInArg0: true,
5035 clobberFlags: true,
5036 symEffect: SymRead,
5037 asm: x86.AXORL,
5038 reg: regInfo{
5039 inputs: []inputInfo{
5040 {0, 239},
5041 {2, 255},
5042 {1, 65791},
5043 },
5044 outputs: []outputInfo{
5045 {0, 239},
5046 },
5047 },
5048 },
5049 {
5050 name: "NEGL",
5051 argLen: 1,
5052 resultInArg0: true,
5053 clobberFlags: true,
5054 asm: x86.ANEGL,
5055 reg: regInfo{
5056 inputs: []inputInfo{
5057 {0, 239},
5058 },
5059 outputs: []outputInfo{
5060 {0, 239},
5061 },
5062 },
5063 },
5064 {
5065 name: "NOTL",
5066 argLen: 1,
5067 resultInArg0: true,
5068 asm: x86.ANOTL,
5069 reg: regInfo{
5070 inputs: []inputInfo{
5071 {0, 239},
5072 },
5073 outputs: []outputInfo{
5074 {0, 239},
5075 },
5076 },
5077 },
5078 {
5079 name: "BSFL",
5080 argLen: 1,
5081 clobberFlags: true,
5082 asm: x86.ABSFL,
5083 reg: regInfo{
5084 inputs: []inputInfo{
5085 {0, 239},
5086 },
5087 outputs: []outputInfo{
5088 {0, 239},
5089 },
5090 },
5091 },
5092 {
5093 name: "BSFW",
5094 argLen: 1,
5095 clobberFlags: true,
5096 asm: x86.ABSFW,
5097 reg: regInfo{
5098 inputs: []inputInfo{
5099 {0, 239},
5100 },
5101 outputs: []outputInfo{
5102 {0, 239},
5103 },
5104 },
5105 },
5106 {
5107 name: "LoweredCtz32",
5108 argLen: 1,
5109 clobberFlags: true,
5110 reg: regInfo{
5111 inputs: []inputInfo{
5112 {0, 239},
5113 },
5114 outputs: []outputInfo{
5115 {0, 239},
5116 },
5117 },
5118 },
5119 {
5120 name: "BSRL",
5121 argLen: 1,
5122 clobberFlags: true,
5123 asm: x86.ABSRL,
5124 reg: regInfo{
5125 inputs: []inputInfo{
5126 {0, 239},
5127 },
5128 outputs: []outputInfo{
5129 {0, 239},
5130 },
5131 },
5132 },
5133 {
5134 name: "BSRW",
5135 argLen: 1,
5136 clobberFlags: true,
5137 asm: x86.ABSRW,
5138 reg: regInfo{
5139 inputs: []inputInfo{
5140 {0, 239},
5141 },
5142 outputs: []outputInfo{
5143 {0, 239},
5144 },
5145 },
5146 },
5147 {
5148 name: "BSWAPL",
5149 argLen: 1,
5150 resultInArg0: true,
5151 asm: x86.ABSWAPL,
5152 reg: regInfo{
5153 inputs: []inputInfo{
5154 {0, 239},
5155 },
5156 outputs: []outputInfo{
5157 {0, 239},
5158 },
5159 },
5160 },
5161 {
5162 name: "SQRTSD",
5163 argLen: 1,
5164 asm: x86.ASQRTSD,
5165 reg: regInfo{
5166 inputs: []inputInfo{
5167 {0, 65280},
5168 },
5169 outputs: []outputInfo{
5170 {0, 65280},
5171 },
5172 },
5173 },
5174 {
5175 name: "SQRTSS",
5176 argLen: 1,
5177 asm: x86.ASQRTSS,
5178 reg: regInfo{
5179 inputs: []inputInfo{
5180 {0, 65280},
5181 },
5182 outputs: []outputInfo{
5183 {0, 65280},
5184 },
5185 },
5186 },
5187 {
5188 name: "SBBLcarrymask",
5189 argLen: 1,
5190 asm: x86.ASBBL,
5191 reg: regInfo{
5192 outputs: []outputInfo{
5193 {0, 239},
5194 },
5195 },
5196 },
5197 {
5198 name: "SETEQ",
5199 argLen: 1,
5200 asm: x86.ASETEQ,
5201 reg: regInfo{
5202 outputs: []outputInfo{
5203 {0, 239},
5204 },
5205 },
5206 },
5207 {
5208 name: "SETNE",
5209 argLen: 1,
5210 asm: x86.ASETNE,
5211 reg: regInfo{
5212 outputs: []outputInfo{
5213 {0, 239},
5214 },
5215 },
5216 },
5217 {
5218 name: "SETL",
5219 argLen: 1,
5220 asm: x86.ASETLT,
5221 reg: regInfo{
5222 outputs: []outputInfo{
5223 {0, 239},
5224 },
5225 },
5226 },
5227 {
5228 name: "SETLE",
5229 argLen: 1,
5230 asm: x86.ASETLE,
5231 reg: regInfo{
5232 outputs: []outputInfo{
5233 {0, 239},
5234 },
5235 },
5236 },
5237 {
5238 name: "SETG",
5239 argLen: 1,
5240 asm: x86.ASETGT,
5241 reg: regInfo{
5242 outputs: []outputInfo{
5243 {0, 239},
5244 },
5245 },
5246 },
5247 {
5248 name: "SETGE",
5249 argLen: 1,
5250 asm: x86.ASETGE,
5251 reg: regInfo{
5252 outputs: []outputInfo{
5253 {0, 239},
5254 },
5255 },
5256 },
5257 {
5258 name: "SETB",
5259 argLen: 1,
5260 asm: x86.ASETCS,
5261 reg: regInfo{
5262 outputs: []outputInfo{
5263 {0, 239},
5264 },
5265 },
5266 },
5267 {
5268 name: "SETBE",
5269 argLen: 1,
5270 asm: x86.ASETLS,
5271 reg: regInfo{
5272 outputs: []outputInfo{
5273 {0, 239},
5274 },
5275 },
5276 },
5277 {
5278 name: "SETA",
5279 argLen: 1,
5280 asm: x86.ASETHI,
5281 reg: regInfo{
5282 outputs: []outputInfo{
5283 {0, 239},
5284 },
5285 },
5286 },
5287 {
5288 name: "SETAE",
5289 argLen: 1,
5290 asm: x86.ASETCC,
5291 reg: regInfo{
5292 outputs: []outputInfo{
5293 {0, 239},
5294 },
5295 },
5296 },
5297 {
5298 name: "SETO",
5299 argLen: 1,
5300 asm: x86.ASETOS,
5301 reg: regInfo{
5302 outputs: []outputInfo{
5303 {0, 239},
5304 },
5305 },
5306 },
5307 {
5308 name: "SETEQF",
5309 argLen: 1,
5310 clobberFlags: true,
5311 asm: x86.ASETEQ,
5312 reg: regInfo{
5313 clobbers: 1,
5314 outputs: []outputInfo{
5315 {0, 238},
5316 },
5317 },
5318 },
5319 {
5320 name: "SETNEF",
5321 argLen: 1,
5322 clobberFlags: true,
5323 asm: x86.ASETNE,
5324 reg: regInfo{
5325 clobbers: 1,
5326 outputs: []outputInfo{
5327 {0, 238},
5328 },
5329 },
5330 },
5331 {
5332 name: "SETORD",
5333 argLen: 1,
5334 asm: x86.ASETPC,
5335 reg: regInfo{
5336 outputs: []outputInfo{
5337 {0, 239},
5338 },
5339 },
5340 },
5341 {
5342 name: "SETNAN",
5343 argLen: 1,
5344 asm: x86.ASETPS,
5345 reg: regInfo{
5346 outputs: []outputInfo{
5347 {0, 239},
5348 },
5349 },
5350 },
5351 {
5352 name: "SETGF",
5353 argLen: 1,
5354 asm: x86.ASETHI,
5355 reg: regInfo{
5356 outputs: []outputInfo{
5357 {0, 239},
5358 },
5359 },
5360 },
5361 {
5362 name: "SETGEF",
5363 argLen: 1,
5364 asm: x86.ASETCC,
5365 reg: regInfo{
5366 outputs: []outputInfo{
5367 {0, 239},
5368 },
5369 },
5370 },
5371 {
5372 name: "MOVBLSX",
5373 argLen: 1,
5374 asm: x86.AMOVBLSX,
5375 reg: regInfo{
5376 inputs: []inputInfo{
5377 {0, 239},
5378 },
5379 outputs: []outputInfo{
5380 {0, 239},
5381 },
5382 },
5383 },
5384 {
5385 name: "MOVBLZX",
5386 argLen: 1,
5387 asm: x86.AMOVBLZX,
5388 reg: regInfo{
5389 inputs: []inputInfo{
5390 {0, 239},
5391 },
5392 outputs: []outputInfo{
5393 {0, 239},
5394 },
5395 },
5396 },
5397 {
5398 name: "MOVWLSX",
5399 argLen: 1,
5400 asm: x86.AMOVWLSX,
5401 reg: regInfo{
5402 inputs: []inputInfo{
5403 {0, 239},
5404 },
5405 outputs: []outputInfo{
5406 {0, 239},
5407 },
5408 },
5409 },
5410 {
5411 name: "MOVWLZX",
5412 argLen: 1,
5413 asm: x86.AMOVWLZX,
5414 reg: regInfo{
5415 inputs: []inputInfo{
5416 {0, 239},
5417 },
5418 outputs: []outputInfo{
5419 {0, 239},
5420 },
5421 },
5422 },
5423 {
5424 name: "MOVLconst",
5425 auxType: auxInt32,
5426 argLen: 0,
5427 rematerializeable: true,
5428 asm: x86.AMOVL,
5429 reg: regInfo{
5430 outputs: []outputInfo{
5431 {0, 239},
5432 },
5433 },
5434 },
5435 {
5436 name: "CVTTSD2SL",
5437 argLen: 1,
5438 asm: x86.ACVTTSD2SL,
5439 reg: regInfo{
5440 inputs: []inputInfo{
5441 {0, 65280},
5442 },
5443 outputs: []outputInfo{
5444 {0, 239},
5445 },
5446 },
5447 },
5448 {
5449 name: "CVTTSS2SL",
5450 argLen: 1,
5451 asm: x86.ACVTTSS2SL,
5452 reg: regInfo{
5453 inputs: []inputInfo{
5454 {0, 65280},
5455 },
5456 outputs: []outputInfo{
5457 {0, 239},
5458 },
5459 },
5460 },
5461 {
5462 name: "CVTSL2SS",
5463 argLen: 1,
5464 asm: x86.ACVTSL2SS,
5465 reg: regInfo{
5466 inputs: []inputInfo{
5467 {0, 239},
5468 },
5469 outputs: []outputInfo{
5470 {0, 65280},
5471 },
5472 },
5473 },
5474 {
5475 name: "CVTSL2SD",
5476 argLen: 1,
5477 asm: x86.ACVTSL2SD,
5478 reg: regInfo{
5479 inputs: []inputInfo{
5480 {0, 239},
5481 },
5482 outputs: []outputInfo{
5483 {0, 65280},
5484 },
5485 },
5486 },
5487 {
5488 name: "CVTSD2SS",
5489 argLen: 1,
5490 asm: x86.ACVTSD2SS,
5491 reg: regInfo{
5492 inputs: []inputInfo{
5493 {0, 65280},
5494 },
5495 outputs: []outputInfo{
5496 {0, 65280},
5497 },
5498 },
5499 },
5500 {
5501 name: "CVTSS2SD",
5502 argLen: 1,
5503 asm: x86.ACVTSS2SD,
5504 reg: regInfo{
5505 inputs: []inputInfo{
5506 {0, 65280},
5507 },
5508 outputs: []outputInfo{
5509 {0, 65280},
5510 },
5511 },
5512 },
5513 {
5514 name: "PXOR",
5515 argLen: 2,
5516 commutative: true,
5517 resultInArg0: true,
5518 asm: x86.APXOR,
5519 reg: regInfo{
5520 inputs: []inputInfo{
5521 {0, 65280},
5522 {1, 65280},
5523 },
5524 outputs: []outputInfo{
5525 {0, 65280},
5526 },
5527 },
5528 },
5529 {
5530 name: "LEAL",
5531 auxType: auxSymOff,
5532 argLen: 1,
5533 rematerializeable: true,
5534 symEffect: SymAddr,
5535 reg: regInfo{
5536 inputs: []inputInfo{
5537 {0, 65791},
5538 },
5539 outputs: []outputInfo{
5540 {0, 239},
5541 },
5542 },
5543 },
5544 {
5545 name: "LEAL1",
5546 auxType: auxSymOff,
5547 argLen: 2,
5548 commutative: true,
5549 symEffect: SymAddr,
5550 reg: regInfo{
5551 inputs: []inputInfo{
5552 {1, 255},
5553 {0, 65791},
5554 },
5555 outputs: []outputInfo{
5556 {0, 239},
5557 },
5558 },
5559 },
5560 {
5561 name: "LEAL2",
5562 auxType: auxSymOff,
5563 argLen: 2,
5564 symEffect: SymAddr,
5565 reg: regInfo{
5566 inputs: []inputInfo{
5567 {1, 255},
5568 {0, 65791},
5569 },
5570 outputs: []outputInfo{
5571 {0, 239},
5572 },
5573 },
5574 },
5575 {
5576 name: "LEAL4",
5577 auxType: auxSymOff,
5578 argLen: 2,
5579 symEffect: SymAddr,
5580 reg: regInfo{
5581 inputs: []inputInfo{
5582 {1, 255},
5583 {0, 65791},
5584 },
5585 outputs: []outputInfo{
5586 {0, 239},
5587 },
5588 },
5589 },
5590 {
5591 name: "LEAL8",
5592 auxType: auxSymOff,
5593 argLen: 2,
5594 symEffect: SymAddr,
5595 reg: regInfo{
5596 inputs: []inputInfo{
5597 {1, 255},
5598 {0, 65791},
5599 },
5600 outputs: []outputInfo{
5601 {0, 239},
5602 },
5603 },
5604 },
5605 {
5606 name: "MOVBload",
5607 auxType: auxSymOff,
5608 argLen: 2,
5609 faultOnNilArg0: true,
5610 symEffect: SymRead,
5611 asm: x86.AMOVBLZX,
5612 reg: regInfo{
5613 inputs: []inputInfo{
5614 {0, 65791},
5615 },
5616 outputs: []outputInfo{
5617 {0, 239},
5618 },
5619 },
5620 },
5621 {
5622 name: "MOVBLSXload",
5623 auxType: auxSymOff,
5624 argLen: 2,
5625 faultOnNilArg0: true,
5626 symEffect: SymRead,
5627 asm: x86.AMOVBLSX,
5628 reg: regInfo{
5629 inputs: []inputInfo{
5630 {0, 65791},
5631 },
5632 outputs: []outputInfo{
5633 {0, 239},
5634 },
5635 },
5636 },
5637 {
5638 name: "MOVWload",
5639 auxType: auxSymOff,
5640 argLen: 2,
5641 faultOnNilArg0: true,
5642 symEffect: SymRead,
5643 asm: x86.AMOVWLZX,
5644 reg: regInfo{
5645 inputs: []inputInfo{
5646 {0, 65791},
5647 },
5648 outputs: []outputInfo{
5649 {0, 239},
5650 },
5651 },
5652 },
5653 {
5654 name: "MOVWLSXload",
5655 auxType: auxSymOff,
5656 argLen: 2,
5657 faultOnNilArg0: true,
5658 symEffect: SymRead,
5659 asm: x86.AMOVWLSX,
5660 reg: regInfo{
5661 inputs: []inputInfo{
5662 {0, 65791},
5663 },
5664 outputs: []outputInfo{
5665 {0, 239},
5666 },
5667 },
5668 },
5669 {
5670 name: "MOVLload",
5671 auxType: auxSymOff,
5672 argLen: 2,
5673 faultOnNilArg0: true,
5674 symEffect: SymRead,
5675 asm: x86.AMOVL,
5676 reg: regInfo{
5677 inputs: []inputInfo{
5678 {0, 65791},
5679 },
5680 outputs: []outputInfo{
5681 {0, 239},
5682 },
5683 },
5684 },
5685 {
5686 name: "MOVBstore",
5687 auxType: auxSymOff,
5688 argLen: 3,
5689 faultOnNilArg0: true,
5690 symEffect: SymWrite,
5691 asm: x86.AMOVB,
5692 reg: regInfo{
5693 inputs: []inputInfo{
5694 {1, 255},
5695 {0, 65791},
5696 },
5697 },
5698 },
5699 {
5700 name: "MOVWstore",
5701 auxType: auxSymOff,
5702 argLen: 3,
5703 faultOnNilArg0: true,
5704 symEffect: SymWrite,
5705 asm: x86.AMOVW,
5706 reg: regInfo{
5707 inputs: []inputInfo{
5708 {1, 255},
5709 {0, 65791},
5710 },
5711 },
5712 },
5713 {
5714 name: "MOVLstore",
5715 auxType: auxSymOff,
5716 argLen: 3,
5717 faultOnNilArg0: true,
5718 symEffect: SymWrite,
5719 asm: x86.AMOVL,
5720 reg: regInfo{
5721 inputs: []inputInfo{
5722 {1, 255},
5723 {0, 65791},
5724 },
5725 },
5726 },
5727 {
5728 name: "ADDLmodify",
5729 auxType: auxSymOff,
5730 argLen: 3,
5731 clobberFlags: true,
5732 faultOnNilArg0: true,
5733 symEffect: SymRead | SymWrite,
5734 asm: x86.AADDL,
5735 reg: regInfo{
5736 inputs: []inputInfo{
5737 {1, 255},
5738 {0, 65791},
5739 },
5740 },
5741 },
5742 {
5743 name: "SUBLmodify",
5744 auxType: auxSymOff,
5745 argLen: 3,
5746 clobberFlags: true,
5747 faultOnNilArg0: true,
5748 symEffect: SymRead | SymWrite,
5749 asm: x86.ASUBL,
5750 reg: regInfo{
5751 inputs: []inputInfo{
5752 {1, 255},
5753 {0, 65791},
5754 },
5755 },
5756 },
5757 {
5758 name: "ANDLmodify",
5759 auxType: auxSymOff,
5760 argLen: 3,
5761 clobberFlags: true,
5762 faultOnNilArg0: true,
5763 symEffect: SymRead | SymWrite,
5764 asm: x86.AANDL,
5765 reg: regInfo{
5766 inputs: []inputInfo{
5767 {1, 255},
5768 {0, 65791},
5769 },
5770 },
5771 },
5772 {
5773 name: "ORLmodify",
5774 auxType: auxSymOff,
5775 argLen: 3,
5776 clobberFlags: true,
5777 faultOnNilArg0: true,
5778 symEffect: SymRead | SymWrite,
5779 asm: x86.AORL,
5780 reg: regInfo{
5781 inputs: []inputInfo{
5782 {1, 255},
5783 {0, 65791},
5784 },
5785 },
5786 },
5787 {
5788 name: "XORLmodify",
5789 auxType: auxSymOff,
5790 argLen: 3,
5791 clobberFlags: true,
5792 faultOnNilArg0: true,
5793 symEffect: SymRead | SymWrite,
5794 asm: x86.AXORL,
5795 reg: regInfo{
5796 inputs: []inputInfo{
5797 {1, 255},
5798 {0, 65791},
5799 },
5800 },
5801 },
5802 {
5803 name: "ADDLmodifyidx4",
5804 auxType: auxSymOff,
5805 argLen: 4,
5806 clobberFlags: true,
5807 symEffect: SymRead | SymWrite,
5808 asm: x86.AADDL,
5809 reg: regInfo{
5810 inputs: []inputInfo{
5811 {1, 255},
5812 {2, 255},
5813 {0, 65791},
5814 },
5815 },
5816 },
5817 {
5818 name: "SUBLmodifyidx4",
5819 auxType: auxSymOff,
5820 argLen: 4,
5821 clobberFlags: true,
5822 symEffect: SymRead | SymWrite,
5823 asm: x86.ASUBL,
5824 reg: regInfo{
5825 inputs: []inputInfo{
5826 {1, 255},
5827 {2, 255},
5828 {0, 65791},
5829 },
5830 },
5831 },
5832 {
5833 name: "ANDLmodifyidx4",
5834 auxType: auxSymOff,
5835 argLen: 4,
5836 clobberFlags: true,
5837 symEffect: SymRead | SymWrite,
5838 asm: x86.AANDL,
5839 reg: regInfo{
5840 inputs: []inputInfo{
5841 {1, 255},
5842 {2, 255},
5843 {0, 65791},
5844 },
5845 },
5846 },
5847 {
5848 name: "ORLmodifyidx4",
5849 auxType: auxSymOff,
5850 argLen: 4,
5851 clobberFlags: true,
5852 symEffect: SymRead | SymWrite,
5853 asm: x86.AORL,
5854 reg: regInfo{
5855 inputs: []inputInfo{
5856 {1, 255},
5857 {2, 255},
5858 {0, 65791},
5859 },
5860 },
5861 },
5862 {
5863 name: "XORLmodifyidx4",
5864 auxType: auxSymOff,
5865 argLen: 4,
5866 clobberFlags: true,
5867 symEffect: SymRead | SymWrite,
5868 asm: x86.AXORL,
5869 reg: regInfo{
5870 inputs: []inputInfo{
5871 {1, 255},
5872 {2, 255},
5873 {0, 65791},
5874 },
5875 },
5876 },
5877 {
5878 name: "ADDLconstmodify",
5879 auxType: auxSymValAndOff,
5880 argLen: 2,
5881 clobberFlags: true,
5882 faultOnNilArg0: true,
5883 symEffect: SymRead | SymWrite,
5884 asm: x86.AADDL,
5885 reg: regInfo{
5886 inputs: []inputInfo{
5887 {0, 65791},
5888 },
5889 },
5890 },
5891 {
5892 name: "ANDLconstmodify",
5893 auxType: auxSymValAndOff,
5894 argLen: 2,
5895 clobberFlags: true,
5896 faultOnNilArg0: true,
5897 symEffect: SymRead | SymWrite,
5898 asm: x86.AANDL,
5899 reg: regInfo{
5900 inputs: []inputInfo{
5901 {0, 65791},
5902 },
5903 },
5904 },
5905 {
5906 name: "ORLconstmodify",
5907 auxType: auxSymValAndOff,
5908 argLen: 2,
5909 clobberFlags: true,
5910 faultOnNilArg0: true,
5911 symEffect: SymRead | SymWrite,
5912 asm: x86.AORL,
5913 reg: regInfo{
5914 inputs: []inputInfo{
5915 {0, 65791},
5916 },
5917 },
5918 },
5919 {
5920 name: "XORLconstmodify",
5921 auxType: auxSymValAndOff,
5922 argLen: 2,
5923 clobberFlags: true,
5924 faultOnNilArg0: true,
5925 symEffect: SymRead | SymWrite,
5926 asm: x86.AXORL,
5927 reg: regInfo{
5928 inputs: []inputInfo{
5929 {0, 65791},
5930 },
5931 },
5932 },
5933 {
5934 name: "ADDLconstmodifyidx4",
5935 auxType: auxSymValAndOff,
5936 argLen: 3,
5937 clobberFlags: true,
5938 symEffect: SymRead | SymWrite,
5939 asm: x86.AADDL,
5940 reg: regInfo{
5941 inputs: []inputInfo{
5942 {1, 255},
5943 {0, 65791},
5944 },
5945 },
5946 },
5947 {
5948 name: "ANDLconstmodifyidx4",
5949 auxType: auxSymValAndOff,
5950 argLen: 3,
5951 clobberFlags: true,
5952 symEffect: SymRead | SymWrite,
5953 asm: x86.AANDL,
5954 reg: regInfo{
5955 inputs: []inputInfo{
5956 {1, 255},
5957 {0, 65791},
5958 },
5959 },
5960 },
5961 {
5962 name: "ORLconstmodifyidx4",
5963 auxType: auxSymValAndOff,
5964 argLen: 3,
5965 clobberFlags: true,
5966 symEffect: SymRead | SymWrite,
5967 asm: x86.AORL,
5968 reg: regInfo{
5969 inputs: []inputInfo{
5970 {1, 255},
5971 {0, 65791},
5972 },
5973 },
5974 },
5975 {
5976 name: "XORLconstmodifyidx4",
5977 auxType: auxSymValAndOff,
5978 argLen: 3,
5979 clobberFlags: true,
5980 symEffect: SymRead | SymWrite,
5981 asm: x86.AXORL,
5982 reg: regInfo{
5983 inputs: []inputInfo{
5984 {1, 255},
5985 {0, 65791},
5986 },
5987 },
5988 },
5989 {
5990 name: "MOVBloadidx1",
5991 auxType: auxSymOff,
5992 argLen: 3,
5993 commutative: true,
5994 symEffect: SymRead,
5995 asm: x86.AMOVBLZX,
5996 reg: regInfo{
5997 inputs: []inputInfo{
5998 {1, 255},
5999 {0, 65791},
6000 },
6001 outputs: []outputInfo{
6002 {0, 239},
6003 },
6004 },
6005 },
6006 {
6007 name: "MOVWloadidx1",
6008 auxType: auxSymOff,
6009 argLen: 3,
6010 commutative: true,
6011 symEffect: SymRead,
6012 asm: x86.AMOVWLZX,
6013 reg: regInfo{
6014 inputs: []inputInfo{
6015 {1, 255},
6016 {0, 65791},
6017 },
6018 outputs: []outputInfo{
6019 {0, 239},
6020 },
6021 },
6022 },
6023 {
6024 name: "MOVWloadidx2",
6025 auxType: auxSymOff,
6026 argLen: 3,
6027 symEffect: SymRead,
6028 asm: x86.AMOVWLZX,
6029 reg: regInfo{
6030 inputs: []inputInfo{
6031 {1, 255},
6032 {0, 65791},
6033 },
6034 outputs: []outputInfo{
6035 {0, 239},
6036 },
6037 },
6038 },
6039 {
6040 name: "MOVLloadidx1",
6041 auxType: auxSymOff,
6042 argLen: 3,
6043 commutative: true,
6044 symEffect: SymRead,
6045 asm: x86.AMOVL,
6046 reg: regInfo{
6047 inputs: []inputInfo{
6048 {1, 255},
6049 {0, 65791},
6050 },
6051 outputs: []outputInfo{
6052 {0, 239},
6053 },
6054 },
6055 },
6056 {
6057 name: "MOVLloadidx4",
6058 auxType: auxSymOff,
6059 argLen: 3,
6060 symEffect: SymRead,
6061 asm: x86.AMOVL,
6062 reg: regInfo{
6063 inputs: []inputInfo{
6064 {1, 255},
6065 {0, 65791},
6066 },
6067 outputs: []outputInfo{
6068 {0, 239},
6069 },
6070 },
6071 },
6072 {
6073 name: "MOVBstoreidx1",
6074 auxType: auxSymOff,
6075 argLen: 4,
6076 commutative: true,
6077 symEffect: SymWrite,
6078 asm: x86.AMOVB,
6079 reg: regInfo{
6080 inputs: []inputInfo{
6081 {1, 255},
6082 {2, 255},
6083 {0, 65791},
6084 },
6085 },
6086 },
6087 {
6088 name: "MOVWstoreidx1",
6089 auxType: auxSymOff,
6090 argLen: 4,
6091 commutative: true,
6092 symEffect: SymWrite,
6093 asm: x86.AMOVW,
6094 reg: regInfo{
6095 inputs: []inputInfo{
6096 {1, 255},
6097 {2, 255},
6098 {0, 65791},
6099 },
6100 },
6101 },
6102 {
6103 name: "MOVWstoreidx2",
6104 auxType: auxSymOff,
6105 argLen: 4,
6106 symEffect: SymWrite,
6107 asm: x86.AMOVW,
6108 reg: regInfo{
6109 inputs: []inputInfo{
6110 {1, 255},
6111 {2, 255},
6112 {0, 65791},
6113 },
6114 },
6115 },
6116 {
6117 name: "MOVLstoreidx1",
6118 auxType: auxSymOff,
6119 argLen: 4,
6120 commutative: true,
6121 symEffect: SymWrite,
6122 asm: x86.AMOVL,
6123 reg: regInfo{
6124 inputs: []inputInfo{
6125 {1, 255},
6126 {2, 255},
6127 {0, 65791},
6128 },
6129 },
6130 },
6131 {
6132 name: "MOVLstoreidx4",
6133 auxType: auxSymOff,
6134 argLen: 4,
6135 symEffect: SymWrite,
6136 asm: x86.AMOVL,
6137 reg: regInfo{
6138 inputs: []inputInfo{
6139 {1, 255},
6140 {2, 255},
6141 {0, 65791},
6142 },
6143 },
6144 },
6145 {
6146 name: "MOVBstoreconst",
6147 auxType: auxSymValAndOff,
6148 argLen: 2,
6149 faultOnNilArg0: true,
6150 symEffect: SymWrite,
6151 asm: x86.AMOVB,
6152 reg: regInfo{
6153 inputs: []inputInfo{
6154 {0, 65791},
6155 },
6156 },
6157 },
6158 {
6159 name: "MOVWstoreconst",
6160 auxType: auxSymValAndOff,
6161 argLen: 2,
6162 faultOnNilArg0: true,
6163 symEffect: SymWrite,
6164 asm: x86.AMOVW,
6165 reg: regInfo{
6166 inputs: []inputInfo{
6167 {0, 65791},
6168 },
6169 },
6170 },
6171 {
6172 name: "MOVLstoreconst",
6173 auxType: auxSymValAndOff,
6174 argLen: 2,
6175 faultOnNilArg0: true,
6176 symEffect: SymWrite,
6177 asm: x86.AMOVL,
6178 reg: regInfo{
6179 inputs: []inputInfo{
6180 {0, 65791},
6181 },
6182 },
6183 },
6184 {
6185 name: "MOVBstoreconstidx1",
6186 auxType: auxSymValAndOff,
6187 argLen: 3,
6188 symEffect: SymWrite,
6189 asm: x86.AMOVB,
6190 reg: regInfo{
6191 inputs: []inputInfo{
6192 {1, 255},
6193 {0, 65791},
6194 },
6195 },
6196 },
6197 {
6198 name: "MOVWstoreconstidx1",
6199 auxType: auxSymValAndOff,
6200 argLen: 3,
6201 symEffect: SymWrite,
6202 asm: x86.AMOVW,
6203 reg: regInfo{
6204 inputs: []inputInfo{
6205 {1, 255},
6206 {0, 65791},
6207 },
6208 },
6209 },
6210 {
6211 name: "MOVWstoreconstidx2",
6212 auxType: auxSymValAndOff,
6213 argLen: 3,
6214 symEffect: SymWrite,
6215 asm: x86.AMOVW,
6216 reg: regInfo{
6217 inputs: []inputInfo{
6218 {1, 255},
6219 {0, 65791},
6220 },
6221 },
6222 },
6223 {
6224 name: "MOVLstoreconstidx1",
6225 auxType: auxSymValAndOff,
6226 argLen: 3,
6227 symEffect: SymWrite,
6228 asm: x86.AMOVL,
6229 reg: regInfo{
6230 inputs: []inputInfo{
6231 {1, 255},
6232 {0, 65791},
6233 },
6234 },
6235 },
6236 {
6237 name: "MOVLstoreconstidx4",
6238 auxType: auxSymValAndOff,
6239 argLen: 3,
6240 symEffect: SymWrite,
6241 asm: x86.AMOVL,
6242 reg: regInfo{
6243 inputs: []inputInfo{
6244 {1, 255},
6245 {0, 65791},
6246 },
6247 },
6248 },
6249 {
6250 name: "DUFFZERO",
6251 auxType: auxInt64,
6252 argLen: 3,
6253 faultOnNilArg0: true,
6254 reg: regInfo{
6255 inputs: []inputInfo{
6256 {0, 128},
6257 {1, 1},
6258 },
6259 clobbers: 130,
6260 },
6261 },
6262 {
6263 name: "REPSTOSL",
6264 argLen: 4,
6265 faultOnNilArg0: true,
6266 reg: regInfo{
6267 inputs: []inputInfo{
6268 {0, 128},
6269 {1, 2},
6270 {2, 1},
6271 },
6272 clobbers: 130,
6273 },
6274 },
6275 {
6276 name: "CALLstatic",
6277 auxType: auxCallOff,
6278 argLen: 1,
6279 clobberFlags: true,
6280 call: true,
6281 reg: regInfo{
6282 clobbers: 65519,
6283 },
6284 },
6285 {
6286 name: "CALLtail",
6287 auxType: auxCallOff,
6288 argLen: 1,
6289 clobberFlags: true,
6290 call: true,
6291 tailCall: true,
6292 reg: regInfo{
6293 clobbers: 65519,
6294 },
6295 },
6296 {
6297 name: "CALLclosure",
6298 auxType: auxCallOff,
6299 argLen: 3,
6300 clobberFlags: true,
6301 call: true,
6302 reg: regInfo{
6303 inputs: []inputInfo{
6304 {1, 4},
6305 {0, 255},
6306 },
6307 clobbers: 65519,
6308 },
6309 },
6310 {
6311 name: "CALLinter",
6312 auxType: auxCallOff,
6313 argLen: 2,
6314 clobberFlags: true,
6315 call: true,
6316 reg: regInfo{
6317 inputs: []inputInfo{
6318 {0, 239},
6319 },
6320 clobbers: 65519,
6321 },
6322 },
6323 {
6324 name: "DUFFCOPY",
6325 auxType: auxInt64,
6326 argLen: 3,
6327 clobberFlags: true,
6328 faultOnNilArg0: true,
6329 faultOnNilArg1: true,
6330 reg: regInfo{
6331 inputs: []inputInfo{
6332 {0, 128},
6333 {1, 64},
6334 },
6335 clobbers: 194,
6336 },
6337 },
6338 {
6339 name: "REPMOVSL",
6340 argLen: 4,
6341 faultOnNilArg0: true,
6342 faultOnNilArg1: true,
6343 reg: regInfo{
6344 inputs: []inputInfo{
6345 {0, 128},
6346 {1, 64},
6347 {2, 2},
6348 },
6349 clobbers: 194,
6350 },
6351 },
6352 {
6353 name: "InvertFlags",
6354 argLen: 1,
6355 reg: regInfo{},
6356 },
6357 {
6358 name: "LoweredGetG",
6359 argLen: 1,
6360 reg: regInfo{
6361 outputs: []outputInfo{
6362 {0, 239},
6363 },
6364 },
6365 },
6366 {
6367 name: "LoweredGetClosurePtr",
6368 argLen: 0,
6369 zeroWidth: true,
6370 reg: regInfo{
6371 outputs: []outputInfo{
6372 {0, 4},
6373 },
6374 },
6375 },
6376 {
6377 name: "LoweredGetCallerPC",
6378 argLen: 0,
6379 rematerializeable: true,
6380 reg: regInfo{
6381 outputs: []outputInfo{
6382 {0, 239},
6383 },
6384 },
6385 },
6386 {
6387 name: "LoweredGetCallerSP",
6388 argLen: 1,
6389 rematerializeable: true,
6390 reg: regInfo{
6391 outputs: []outputInfo{
6392 {0, 239},
6393 },
6394 },
6395 },
6396 {
6397 name: "LoweredNilCheck",
6398 argLen: 2,
6399 clobberFlags: true,
6400 nilCheck: true,
6401 faultOnNilArg0: true,
6402 reg: regInfo{
6403 inputs: []inputInfo{
6404 {0, 255},
6405 },
6406 },
6407 },
6408 {
6409 name: "LoweredWB",
6410 auxType: auxInt64,
6411 argLen: 1,
6412 clobberFlags: true,
6413 reg: regInfo{
6414 clobbers: 65280,
6415 outputs: []outputInfo{
6416 {0, 128},
6417 },
6418 },
6419 },
6420 {
6421 name: "LoweredPanicBoundsA",
6422 auxType: auxInt64,
6423 argLen: 3,
6424 call: true,
6425 reg: regInfo{
6426 inputs: []inputInfo{
6427 {0, 4},
6428 {1, 8},
6429 },
6430 },
6431 },
6432 {
6433 name: "LoweredPanicBoundsB",
6434 auxType: auxInt64,
6435 argLen: 3,
6436 call: true,
6437 reg: regInfo{
6438 inputs: []inputInfo{
6439 {0, 2},
6440 {1, 4},
6441 },
6442 },
6443 },
6444 {
6445 name: "LoweredPanicBoundsC",
6446 auxType: auxInt64,
6447 argLen: 3,
6448 call: true,
6449 reg: regInfo{
6450 inputs: []inputInfo{
6451 {0, 1},
6452 {1, 2},
6453 },
6454 },
6455 },
6456 {
6457 name: "LoweredPanicExtendA",
6458 auxType: auxInt64,
6459 argLen: 4,
6460 call: true,
6461 reg: regInfo{
6462 inputs: []inputInfo{
6463 {0, 64},
6464 {1, 4},
6465 {2, 8},
6466 },
6467 },
6468 },
6469 {
6470 name: "LoweredPanicExtendB",
6471 auxType: auxInt64,
6472 argLen: 4,
6473 call: true,
6474 reg: regInfo{
6475 inputs: []inputInfo{
6476 {0, 64},
6477 {1, 2},
6478 {2, 4},
6479 },
6480 },
6481 },
6482 {
6483 name: "LoweredPanicExtendC",
6484 auxType: auxInt64,
6485 argLen: 4,
6486 call: true,
6487 reg: regInfo{
6488 inputs: []inputInfo{
6489 {0, 64},
6490 {1, 1},
6491 {2, 2},
6492 },
6493 },
6494 },
6495 {
6496 name: "FlagEQ",
6497 argLen: 0,
6498 reg: regInfo{},
6499 },
6500 {
6501 name: "FlagLT_ULT",
6502 argLen: 0,
6503 reg: regInfo{},
6504 },
6505 {
6506 name: "FlagLT_UGT",
6507 argLen: 0,
6508 reg: regInfo{},
6509 },
6510 {
6511 name: "FlagGT_UGT",
6512 argLen: 0,
6513 reg: regInfo{},
6514 },
6515 {
6516 name: "FlagGT_ULT",
6517 argLen: 0,
6518 reg: regInfo{},
6519 },
6520 {
6521 name: "MOVSSconst1",
6522 auxType: auxFloat32,
6523 argLen: 0,
6524 reg: regInfo{
6525 outputs: []outputInfo{
6526 {0, 239},
6527 },
6528 },
6529 },
6530 {
6531 name: "MOVSDconst1",
6532 auxType: auxFloat64,
6533 argLen: 0,
6534 reg: regInfo{
6535 outputs: []outputInfo{
6536 {0, 239},
6537 },
6538 },
6539 },
6540 {
6541 name: "MOVSSconst2",
6542 argLen: 1,
6543 asm: x86.AMOVSS,
6544 reg: regInfo{
6545 inputs: []inputInfo{
6546 {0, 239},
6547 },
6548 outputs: []outputInfo{
6549 {0, 65280},
6550 },
6551 },
6552 },
6553 {
6554 name: "MOVSDconst2",
6555 argLen: 1,
6556 asm: x86.AMOVSD,
6557 reg: regInfo{
6558 inputs: []inputInfo{
6559 {0, 239},
6560 },
6561 outputs: []outputInfo{
6562 {0, 65280},
6563 },
6564 },
6565 },
6566
6567 {
6568 name: "ADDSS",
6569 argLen: 2,
6570 commutative: true,
6571 resultInArg0: true,
6572 asm: x86.AADDSS,
6573 reg: regInfo{
6574 inputs: []inputInfo{
6575 {0, 2147418112},
6576 {1, 2147418112},
6577 },
6578 outputs: []outputInfo{
6579 {0, 2147418112},
6580 },
6581 },
6582 },
6583 {
6584 name: "ADDSD",
6585 argLen: 2,
6586 commutative: true,
6587 resultInArg0: true,
6588 asm: x86.AADDSD,
6589 reg: regInfo{
6590 inputs: []inputInfo{
6591 {0, 2147418112},
6592 {1, 2147418112},
6593 },
6594 outputs: []outputInfo{
6595 {0, 2147418112},
6596 },
6597 },
6598 },
6599 {
6600 name: "SUBSS",
6601 argLen: 2,
6602 resultInArg0: true,
6603 asm: x86.ASUBSS,
6604 reg: regInfo{
6605 inputs: []inputInfo{
6606 {0, 2147418112},
6607 {1, 2147418112},
6608 },
6609 outputs: []outputInfo{
6610 {0, 2147418112},
6611 },
6612 },
6613 },
6614 {
6615 name: "SUBSD",
6616 argLen: 2,
6617 resultInArg0: true,
6618 asm: x86.ASUBSD,
6619 reg: regInfo{
6620 inputs: []inputInfo{
6621 {0, 2147418112},
6622 {1, 2147418112},
6623 },
6624 outputs: []outputInfo{
6625 {0, 2147418112},
6626 },
6627 },
6628 },
6629 {
6630 name: "MULSS",
6631 argLen: 2,
6632 commutative: true,
6633 resultInArg0: true,
6634 asm: x86.AMULSS,
6635 reg: regInfo{
6636 inputs: []inputInfo{
6637 {0, 2147418112},
6638 {1, 2147418112},
6639 },
6640 outputs: []outputInfo{
6641 {0, 2147418112},
6642 },
6643 },
6644 },
6645 {
6646 name: "MULSD",
6647 argLen: 2,
6648 commutative: true,
6649 resultInArg0: true,
6650 asm: x86.AMULSD,
6651 reg: regInfo{
6652 inputs: []inputInfo{
6653 {0, 2147418112},
6654 {1, 2147418112},
6655 },
6656 outputs: []outputInfo{
6657 {0, 2147418112},
6658 },
6659 },
6660 },
6661 {
6662 name: "DIVSS",
6663 argLen: 2,
6664 resultInArg0: true,
6665 asm: x86.ADIVSS,
6666 reg: regInfo{
6667 inputs: []inputInfo{
6668 {0, 2147418112},
6669 {1, 2147418112},
6670 },
6671 outputs: []outputInfo{
6672 {0, 2147418112},
6673 },
6674 },
6675 },
6676 {
6677 name: "DIVSD",
6678 argLen: 2,
6679 resultInArg0: true,
6680 asm: x86.ADIVSD,
6681 reg: regInfo{
6682 inputs: []inputInfo{
6683 {0, 2147418112},
6684 {1, 2147418112},
6685 },
6686 outputs: []outputInfo{
6687 {0, 2147418112},
6688 },
6689 },
6690 },
6691 {
6692 name: "MOVSSload",
6693 auxType: auxSymOff,
6694 argLen: 2,
6695 faultOnNilArg0: true,
6696 symEffect: SymRead,
6697 asm: x86.AMOVSS,
6698 reg: regInfo{
6699 inputs: []inputInfo{
6700 {0, 4295016447},
6701 },
6702 outputs: []outputInfo{
6703 {0, 2147418112},
6704 },
6705 },
6706 },
6707 {
6708 name: "MOVSDload",
6709 auxType: auxSymOff,
6710 argLen: 2,
6711 faultOnNilArg0: true,
6712 symEffect: SymRead,
6713 asm: x86.AMOVSD,
6714 reg: regInfo{
6715 inputs: []inputInfo{
6716 {0, 4295016447},
6717 },
6718 outputs: []outputInfo{
6719 {0, 2147418112},
6720 },
6721 },
6722 },
6723 {
6724 name: "MOVSSconst",
6725 auxType: auxFloat32,
6726 argLen: 0,
6727 rematerializeable: true,
6728 asm: x86.AMOVSS,
6729 reg: regInfo{
6730 outputs: []outputInfo{
6731 {0, 2147418112},
6732 },
6733 },
6734 },
6735 {
6736 name: "MOVSDconst",
6737 auxType: auxFloat64,
6738 argLen: 0,
6739 rematerializeable: true,
6740 asm: x86.AMOVSD,
6741 reg: regInfo{
6742 outputs: []outputInfo{
6743 {0, 2147418112},
6744 },
6745 },
6746 },
6747 {
6748 name: "MOVSSloadidx1",
6749 auxType: auxSymOff,
6750 argLen: 3,
6751 symEffect: SymRead,
6752 asm: x86.AMOVSS,
6753 scale: 1,
6754 reg: regInfo{
6755 inputs: []inputInfo{
6756 {1, 49151},
6757 {0, 4295016447},
6758 },
6759 outputs: []outputInfo{
6760 {0, 2147418112},
6761 },
6762 },
6763 },
6764 {
6765 name: "MOVSSloadidx4",
6766 auxType: auxSymOff,
6767 argLen: 3,
6768 symEffect: SymRead,
6769 asm: x86.AMOVSS,
6770 scale: 4,
6771 reg: regInfo{
6772 inputs: []inputInfo{
6773 {1, 49151},
6774 {0, 4295016447},
6775 },
6776 outputs: []outputInfo{
6777 {0, 2147418112},
6778 },
6779 },
6780 },
6781 {
6782 name: "MOVSDloadidx1",
6783 auxType: auxSymOff,
6784 argLen: 3,
6785 symEffect: SymRead,
6786 asm: x86.AMOVSD,
6787 scale: 1,
6788 reg: regInfo{
6789 inputs: []inputInfo{
6790 {1, 49151},
6791 {0, 4295016447},
6792 },
6793 outputs: []outputInfo{
6794 {0, 2147418112},
6795 },
6796 },
6797 },
6798 {
6799 name: "MOVSDloadidx8",
6800 auxType: auxSymOff,
6801 argLen: 3,
6802 symEffect: SymRead,
6803 asm: x86.AMOVSD,
6804 scale: 8,
6805 reg: regInfo{
6806 inputs: []inputInfo{
6807 {1, 49151},
6808 {0, 4295016447},
6809 },
6810 outputs: []outputInfo{
6811 {0, 2147418112},
6812 },
6813 },
6814 },
6815 {
6816 name: "MOVSSstore",
6817 auxType: auxSymOff,
6818 argLen: 3,
6819 faultOnNilArg0: true,
6820 symEffect: SymWrite,
6821 asm: x86.AMOVSS,
6822 reg: regInfo{
6823 inputs: []inputInfo{
6824 {1, 2147418112},
6825 {0, 4295016447},
6826 },
6827 },
6828 },
6829 {
6830 name: "MOVSDstore",
6831 auxType: auxSymOff,
6832 argLen: 3,
6833 faultOnNilArg0: true,
6834 symEffect: SymWrite,
6835 asm: x86.AMOVSD,
6836 reg: regInfo{
6837 inputs: []inputInfo{
6838 {1, 2147418112},
6839 {0, 4295016447},
6840 },
6841 },
6842 },
6843 {
6844 name: "MOVSSstoreidx1",
6845 auxType: auxSymOff,
6846 argLen: 4,
6847 symEffect: SymWrite,
6848 asm: x86.AMOVSS,
6849 scale: 1,
6850 reg: regInfo{
6851 inputs: []inputInfo{
6852 {1, 49151},
6853 {2, 2147418112},
6854 {0, 4295016447},
6855 },
6856 },
6857 },
6858 {
6859 name: "MOVSSstoreidx4",
6860 auxType: auxSymOff,
6861 argLen: 4,
6862 symEffect: SymWrite,
6863 asm: x86.AMOVSS,
6864 scale: 4,
6865 reg: regInfo{
6866 inputs: []inputInfo{
6867 {1, 49151},
6868 {2, 2147418112},
6869 {0, 4295016447},
6870 },
6871 },
6872 },
6873 {
6874 name: "MOVSDstoreidx1",
6875 auxType: auxSymOff,
6876 argLen: 4,
6877 symEffect: SymWrite,
6878 asm: x86.AMOVSD,
6879 scale: 1,
6880 reg: regInfo{
6881 inputs: []inputInfo{
6882 {1, 49151},
6883 {2, 2147418112},
6884 {0, 4295016447},
6885 },
6886 },
6887 },
6888 {
6889 name: "MOVSDstoreidx8",
6890 auxType: auxSymOff,
6891 argLen: 4,
6892 symEffect: SymWrite,
6893 asm: x86.AMOVSD,
6894 scale: 8,
6895 reg: regInfo{
6896 inputs: []inputInfo{
6897 {1, 49151},
6898 {2, 2147418112},
6899 {0, 4295016447},
6900 },
6901 },
6902 },
6903 {
6904 name: "ADDSSload",
6905 auxType: auxSymOff,
6906 argLen: 3,
6907 resultInArg0: true,
6908 faultOnNilArg1: true,
6909 symEffect: SymRead,
6910 asm: x86.AADDSS,
6911 reg: regInfo{
6912 inputs: []inputInfo{
6913 {0, 2147418112},
6914 {1, 4295032831},
6915 },
6916 outputs: []outputInfo{
6917 {0, 2147418112},
6918 },
6919 },
6920 },
6921 {
6922 name: "ADDSDload",
6923 auxType: auxSymOff,
6924 argLen: 3,
6925 resultInArg0: true,
6926 faultOnNilArg1: true,
6927 symEffect: SymRead,
6928 asm: x86.AADDSD,
6929 reg: regInfo{
6930 inputs: []inputInfo{
6931 {0, 2147418112},
6932 {1, 4295032831},
6933 },
6934 outputs: []outputInfo{
6935 {0, 2147418112},
6936 },
6937 },
6938 },
6939 {
6940 name: "SUBSSload",
6941 auxType: auxSymOff,
6942 argLen: 3,
6943 resultInArg0: true,
6944 faultOnNilArg1: true,
6945 symEffect: SymRead,
6946 asm: x86.ASUBSS,
6947 reg: regInfo{
6948 inputs: []inputInfo{
6949 {0, 2147418112},
6950 {1, 4295032831},
6951 },
6952 outputs: []outputInfo{
6953 {0, 2147418112},
6954 },
6955 },
6956 },
6957 {
6958 name: "SUBSDload",
6959 auxType: auxSymOff,
6960 argLen: 3,
6961 resultInArg0: true,
6962 faultOnNilArg1: true,
6963 symEffect: SymRead,
6964 asm: x86.ASUBSD,
6965 reg: regInfo{
6966 inputs: []inputInfo{
6967 {0, 2147418112},
6968 {1, 4295032831},
6969 },
6970 outputs: []outputInfo{
6971 {0, 2147418112},
6972 },
6973 },
6974 },
6975 {
6976 name: "MULSSload",
6977 auxType: auxSymOff,
6978 argLen: 3,
6979 resultInArg0: true,
6980 faultOnNilArg1: true,
6981 symEffect: SymRead,
6982 asm: x86.AMULSS,
6983 reg: regInfo{
6984 inputs: []inputInfo{
6985 {0, 2147418112},
6986 {1, 4295032831},
6987 },
6988 outputs: []outputInfo{
6989 {0, 2147418112},
6990 },
6991 },
6992 },
6993 {
6994 name: "MULSDload",
6995 auxType: auxSymOff,
6996 argLen: 3,
6997 resultInArg0: true,
6998 faultOnNilArg1: true,
6999 symEffect: SymRead,
7000 asm: x86.AMULSD,
7001 reg: regInfo{
7002 inputs: []inputInfo{
7003 {0, 2147418112},
7004 {1, 4295032831},
7005 },
7006 outputs: []outputInfo{
7007 {0, 2147418112},
7008 },
7009 },
7010 },
7011 {
7012 name: "DIVSSload",
7013 auxType: auxSymOff,
7014 argLen: 3,
7015 resultInArg0: true,
7016 faultOnNilArg1: true,
7017 symEffect: SymRead,
7018 asm: x86.ADIVSS,
7019 reg: regInfo{
7020 inputs: []inputInfo{
7021 {0, 2147418112},
7022 {1, 4295032831},
7023 },
7024 outputs: []outputInfo{
7025 {0, 2147418112},
7026 },
7027 },
7028 },
7029 {
7030 name: "DIVSDload",
7031 auxType: auxSymOff,
7032 argLen: 3,
7033 resultInArg0: true,
7034 faultOnNilArg1: true,
7035 symEffect: SymRead,
7036 asm: x86.ADIVSD,
7037 reg: regInfo{
7038 inputs: []inputInfo{
7039 {0, 2147418112},
7040 {1, 4295032831},
7041 },
7042 outputs: []outputInfo{
7043 {0, 2147418112},
7044 },
7045 },
7046 },
7047 {
7048 name: "ADDSSloadidx1",
7049 auxType: auxSymOff,
7050 argLen: 4,
7051 resultInArg0: true,
7052 symEffect: SymRead,
7053 asm: x86.AADDSS,
7054 scale: 1,
7055 reg: regInfo{
7056 inputs: []inputInfo{
7057 {0, 2147418112},
7058 {2, 4295016447},
7059 {1, 4295032831},
7060 },
7061 outputs: []outputInfo{
7062 {0, 2147418112},
7063 },
7064 },
7065 },
7066 {
7067 name: "ADDSSloadidx4",
7068 auxType: auxSymOff,
7069 argLen: 4,
7070 resultInArg0: true,
7071 symEffect: SymRead,
7072 asm: x86.AADDSS,
7073 scale: 4,
7074 reg: regInfo{
7075 inputs: []inputInfo{
7076 {0, 2147418112},
7077 {2, 4295016447},
7078 {1, 4295032831},
7079 },
7080 outputs: []outputInfo{
7081 {0, 2147418112},
7082 },
7083 },
7084 },
7085 {
7086 name: "ADDSDloadidx1",
7087 auxType: auxSymOff,
7088 argLen: 4,
7089 resultInArg0: true,
7090 symEffect: SymRead,
7091 asm: x86.AADDSD,
7092 scale: 1,
7093 reg: regInfo{
7094 inputs: []inputInfo{
7095 {0, 2147418112},
7096 {2, 4295016447},
7097 {1, 4295032831},
7098 },
7099 outputs: []outputInfo{
7100 {0, 2147418112},
7101 },
7102 },
7103 },
7104 {
7105 name: "ADDSDloadidx8",
7106 auxType: auxSymOff,
7107 argLen: 4,
7108 resultInArg0: true,
7109 symEffect: SymRead,
7110 asm: x86.AADDSD,
7111 scale: 8,
7112 reg: regInfo{
7113 inputs: []inputInfo{
7114 {0, 2147418112},
7115 {2, 4295016447},
7116 {1, 4295032831},
7117 },
7118 outputs: []outputInfo{
7119 {0, 2147418112},
7120 },
7121 },
7122 },
7123 {
7124 name: "SUBSSloadidx1",
7125 auxType: auxSymOff,
7126 argLen: 4,
7127 resultInArg0: true,
7128 symEffect: SymRead,
7129 asm: x86.ASUBSS,
7130 scale: 1,
7131 reg: regInfo{
7132 inputs: []inputInfo{
7133 {0, 2147418112},
7134 {2, 4295016447},
7135 {1, 4295032831},
7136 },
7137 outputs: []outputInfo{
7138 {0, 2147418112},
7139 },
7140 },
7141 },
7142 {
7143 name: "SUBSSloadidx4",
7144 auxType: auxSymOff,
7145 argLen: 4,
7146 resultInArg0: true,
7147 symEffect: SymRead,
7148 asm: x86.ASUBSS,
7149 scale: 4,
7150 reg: regInfo{
7151 inputs: []inputInfo{
7152 {0, 2147418112},
7153 {2, 4295016447},
7154 {1, 4295032831},
7155 },
7156 outputs: []outputInfo{
7157 {0, 2147418112},
7158 },
7159 },
7160 },
7161 {
7162 name: "SUBSDloadidx1",
7163 auxType: auxSymOff,
7164 argLen: 4,
7165 resultInArg0: true,
7166 symEffect: SymRead,
7167 asm: x86.ASUBSD,
7168 scale: 1,
7169 reg: regInfo{
7170 inputs: []inputInfo{
7171 {0, 2147418112},
7172 {2, 4295016447},
7173 {1, 4295032831},
7174 },
7175 outputs: []outputInfo{
7176 {0, 2147418112},
7177 },
7178 },
7179 },
7180 {
7181 name: "SUBSDloadidx8",
7182 auxType: auxSymOff,
7183 argLen: 4,
7184 resultInArg0: true,
7185 symEffect: SymRead,
7186 asm: x86.ASUBSD,
7187 scale: 8,
7188 reg: regInfo{
7189 inputs: []inputInfo{
7190 {0, 2147418112},
7191 {2, 4295016447},
7192 {1, 4295032831},
7193 },
7194 outputs: []outputInfo{
7195 {0, 2147418112},
7196 },
7197 },
7198 },
7199 {
7200 name: "MULSSloadidx1",
7201 auxType: auxSymOff,
7202 argLen: 4,
7203 resultInArg0: true,
7204 symEffect: SymRead,
7205 asm: x86.AMULSS,
7206 scale: 1,
7207 reg: regInfo{
7208 inputs: []inputInfo{
7209 {0, 2147418112},
7210 {2, 4295016447},
7211 {1, 4295032831},
7212 },
7213 outputs: []outputInfo{
7214 {0, 2147418112},
7215 },
7216 },
7217 },
7218 {
7219 name: "MULSSloadidx4",
7220 auxType: auxSymOff,
7221 argLen: 4,
7222 resultInArg0: true,
7223 symEffect: SymRead,
7224 asm: x86.AMULSS,
7225 scale: 4,
7226 reg: regInfo{
7227 inputs: []inputInfo{
7228 {0, 2147418112},
7229 {2, 4295016447},
7230 {1, 4295032831},
7231 },
7232 outputs: []outputInfo{
7233 {0, 2147418112},
7234 },
7235 },
7236 },
7237 {
7238 name: "MULSDloadidx1",
7239 auxType: auxSymOff,
7240 argLen: 4,
7241 resultInArg0: true,
7242 symEffect: SymRead,
7243 asm: x86.AMULSD,
7244 scale: 1,
7245 reg: regInfo{
7246 inputs: []inputInfo{
7247 {0, 2147418112},
7248 {2, 4295016447},
7249 {1, 4295032831},
7250 },
7251 outputs: []outputInfo{
7252 {0, 2147418112},
7253 },
7254 },
7255 },
7256 {
7257 name: "MULSDloadidx8",
7258 auxType: auxSymOff,
7259 argLen: 4,
7260 resultInArg0: true,
7261 symEffect: SymRead,
7262 asm: x86.AMULSD,
7263 scale: 8,
7264 reg: regInfo{
7265 inputs: []inputInfo{
7266 {0, 2147418112},
7267 {2, 4295016447},
7268 {1, 4295032831},
7269 },
7270 outputs: []outputInfo{
7271 {0, 2147418112},
7272 },
7273 },
7274 },
7275 {
7276 name: "DIVSSloadidx1",
7277 auxType: auxSymOff,
7278 argLen: 4,
7279 resultInArg0: true,
7280 symEffect: SymRead,
7281 asm: x86.ADIVSS,
7282 scale: 1,
7283 reg: regInfo{
7284 inputs: []inputInfo{
7285 {0, 2147418112},
7286 {2, 4295016447},
7287 {1, 4295032831},
7288 },
7289 outputs: []outputInfo{
7290 {0, 2147418112},
7291 },
7292 },
7293 },
7294 {
7295 name: "DIVSSloadidx4",
7296 auxType: auxSymOff,
7297 argLen: 4,
7298 resultInArg0: true,
7299 symEffect: SymRead,
7300 asm: x86.ADIVSS,
7301 scale: 4,
7302 reg: regInfo{
7303 inputs: []inputInfo{
7304 {0, 2147418112},
7305 {2, 4295016447},
7306 {1, 4295032831},
7307 },
7308 outputs: []outputInfo{
7309 {0, 2147418112},
7310 },
7311 },
7312 },
7313 {
7314 name: "DIVSDloadidx1",
7315 auxType: auxSymOff,
7316 argLen: 4,
7317 resultInArg0: true,
7318 symEffect: SymRead,
7319 asm: x86.ADIVSD,
7320 scale: 1,
7321 reg: regInfo{
7322 inputs: []inputInfo{
7323 {0, 2147418112},
7324 {2, 4295016447},
7325 {1, 4295032831},
7326 },
7327 outputs: []outputInfo{
7328 {0, 2147418112},
7329 },
7330 },
7331 },
7332 {
7333 name: "DIVSDloadidx8",
7334 auxType: auxSymOff,
7335 argLen: 4,
7336 resultInArg0: true,
7337 symEffect: SymRead,
7338 asm: x86.ADIVSD,
7339 scale: 8,
7340 reg: regInfo{
7341 inputs: []inputInfo{
7342 {0, 2147418112},
7343 {2, 4295016447},
7344 {1, 4295032831},
7345 },
7346 outputs: []outputInfo{
7347 {0, 2147418112},
7348 },
7349 },
7350 },
7351 {
7352 name: "ADDQ",
7353 argLen: 2,
7354 commutative: true,
7355 clobberFlags: true,
7356 asm: x86.AADDQ,
7357 reg: regInfo{
7358 inputs: []inputInfo{
7359 {1, 49135},
7360 {0, 49151},
7361 },
7362 outputs: []outputInfo{
7363 {0, 49135},
7364 },
7365 },
7366 },
7367 {
7368 name: "ADDL",
7369 argLen: 2,
7370 commutative: true,
7371 clobberFlags: true,
7372 asm: x86.AADDL,
7373 reg: regInfo{
7374 inputs: []inputInfo{
7375 {1, 49135},
7376 {0, 49151},
7377 },
7378 outputs: []outputInfo{
7379 {0, 49135},
7380 },
7381 },
7382 },
7383 {
7384 name: "ADDQconst",
7385 auxType: auxInt32,
7386 argLen: 1,
7387 clobberFlags: true,
7388 asm: x86.AADDQ,
7389 reg: regInfo{
7390 inputs: []inputInfo{
7391 {0, 49151},
7392 },
7393 outputs: []outputInfo{
7394 {0, 49135},
7395 },
7396 },
7397 },
7398 {
7399 name: "ADDLconst",
7400 auxType: auxInt32,
7401 argLen: 1,
7402 clobberFlags: true,
7403 asm: x86.AADDL,
7404 reg: regInfo{
7405 inputs: []inputInfo{
7406 {0, 49151},
7407 },
7408 outputs: []outputInfo{
7409 {0, 49135},
7410 },
7411 },
7412 },
7413 {
7414 name: "ADDQconstmodify",
7415 auxType: auxSymValAndOff,
7416 argLen: 2,
7417 clobberFlags: true,
7418 faultOnNilArg0: true,
7419 symEffect: SymRead | SymWrite,
7420 asm: x86.AADDQ,
7421 reg: regInfo{
7422 inputs: []inputInfo{
7423 {0, 4295032831},
7424 },
7425 },
7426 },
7427 {
7428 name: "ADDLconstmodify",
7429 auxType: auxSymValAndOff,
7430 argLen: 2,
7431 clobberFlags: true,
7432 faultOnNilArg0: true,
7433 symEffect: SymRead | SymWrite,
7434 asm: x86.AADDL,
7435 reg: regInfo{
7436 inputs: []inputInfo{
7437 {0, 4295032831},
7438 },
7439 },
7440 },
7441 {
7442 name: "SUBQ",
7443 argLen: 2,
7444 resultInArg0: true,
7445 clobberFlags: true,
7446 asm: x86.ASUBQ,
7447 reg: regInfo{
7448 inputs: []inputInfo{
7449 {0, 49135},
7450 {1, 49135},
7451 },
7452 outputs: []outputInfo{
7453 {0, 49135},
7454 },
7455 },
7456 },
7457 {
7458 name: "SUBL",
7459 argLen: 2,
7460 resultInArg0: true,
7461 clobberFlags: true,
7462 asm: x86.ASUBL,
7463 reg: regInfo{
7464 inputs: []inputInfo{
7465 {0, 49135},
7466 {1, 49135},
7467 },
7468 outputs: []outputInfo{
7469 {0, 49135},
7470 },
7471 },
7472 },
7473 {
7474 name: "SUBQconst",
7475 auxType: auxInt32,
7476 argLen: 1,
7477 resultInArg0: true,
7478 clobberFlags: true,
7479 asm: x86.ASUBQ,
7480 reg: regInfo{
7481 inputs: []inputInfo{
7482 {0, 49135},
7483 },
7484 outputs: []outputInfo{
7485 {0, 49135},
7486 },
7487 },
7488 },
7489 {
7490 name: "SUBLconst",
7491 auxType: auxInt32,
7492 argLen: 1,
7493 resultInArg0: true,
7494 clobberFlags: true,
7495 asm: x86.ASUBL,
7496 reg: regInfo{
7497 inputs: []inputInfo{
7498 {0, 49135},
7499 },
7500 outputs: []outputInfo{
7501 {0, 49135},
7502 },
7503 },
7504 },
7505 {
7506 name: "MULQ",
7507 argLen: 2,
7508 commutative: true,
7509 resultInArg0: true,
7510 clobberFlags: true,
7511 asm: x86.AIMULQ,
7512 reg: regInfo{
7513 inputs: []inputInfo{
7514 {0, 49135},
7515 {1, 49135},
7516 },
7517 outputs: []outputInfo{
7518 {0, 49135},
7519 },
7520 },
7521 },
7522 {
7523 name: "MULL",
7524 argLen: 2,
7525 commutative: true,
7526 resultInArg0: true,
7527 clobberFlags: true,
7528 asm: x86.AIMULL,
7529 reg: regInfo{
7530 inputs: []inputInfo{
7531 {0, 49135},
7532 {1, 49135},
7533 },
7534 outputs: []outputInfo{
7535 {0, 49135},
7536 },
7537 },
7538 },
7539 {
7540 name: "MULQconst",
7541 auxType: auxInt32,
7542 argLen: 1,
7543 clobberFlags: true,
7544 asm: x86.AIMUL3Q,
7545 reg: regInfo{
7546 inputs: []inputInfo{
7547 {0, 49135},
7548 },
7549 outputs: []outputInfo{
7550 {0, 49135},
7551 },
7552 },
7553 },
7554 {
7555 name: "MULLconst",
7556 auxType: auxInt32,
7557 argLen: 1,
7558 clobberFlags: true,
7559 asm: x86.AIMUL3L,
7560 reg: regInfo{
7561 inputs: []inputInfo{
7562 {0, 49135},
7563 },
7564 outputs: []outputInfo{
7565 {0, 49135},
7566 },
7567 },
7568 },
7569 {
7570 name: "MULLU",
7571 argLen: 2,
7572 commutative: true,
7573 clobberFlags: true,
7574 asm: x86.AMULL,
7575 reg: regInfo{
7576 inputs: []inputInfo{
7577 {0, 1},
7578 {1, 49151},
7579 },
7580 clobbers: 4,
7581 outputs: []outputInfo{
7582 {1, 0},
7583 {0, 1},
7584 },
7585 },
7586 },
7587 {
7588 name: "MULQU",
7589 argLen: 2,
7590 commutative: true,
7591 clobberFlags: true,
7592 asm: x86.AMULQ,
7593 reg: regInfo{
7594 inputs: []inputInfo{
7595 {0, 1},
7596 {1, 49151},
7597 },
7598 clobbers: 4,
7599 outputs: []outputInfo{
7600 {1, 0},
7601 {0, 1},
7602 },
7603 },
7604 },
7605 {
7606 name: "HMULQ",
7607 argLen: 2,
7608 clobberFlags: true,
7609 asm: x86.AIMULQ,
7610 reg: regInfo{
7611 inputs: []inputInfo{
7612 {0, 1},
7613 {1, 49151},
7614 },
7615 clobbers: 1,
7616 outputs: []outputInfo{
7617 {0, 4},
7618 },
7619 },
7620 },
7621 {
7622 name: "HMULL",
7623 argLen: 2,
7624 clobberFlags: true,
7625 asm: x86.AIMULL,
7626 reg: regInfo{
7627 inputs: []inputInfo{
7628 {0, 1},
7629 {1, 49151},
7630 },
7631 clobbers: 1,
7632 outputs: []outputInfo{
7633 {0, 4},
7634 },
7635 },
7636 },
7637 {
7638 name: "HMULQU",
7639 argLen: 2,
7640 clobberFlags: true,
7641 asm: x86.AMULQ,
7642 reg: regInfo{
7643 inputs: []inputInfo{
7644 {0, 1},
7645 {1, 49151},
7646 },
7647 clobbers: 1,
7648 outputs: []outputInfo{
7649 {0, 4},
7650 },
7651 },
7652 },
7653 {
7654 name: "HMULLU",
7655 argLen: 2,
7656 clobberFlags: true,
7657 asm: x86.AMULL,
7658 reg: regInfo{
7659 inputs: []inputInfo{
7660 {0, 1},
7661 {1, 49151},
7662 },
7663 clobbers: 1,
7664 outputs: []outputInfo{
7665 {0, 4},
7666 },
7667 },
7668 },
7669 {
7670 name: "AVGQU",
7671 argLen: 2,
7672 commutative: true,
7673 resultInArg0: true,
7674 clobberFlags: true,
7675 reg: regInfo{
7676 inputs: []inputInfo{
7677 {0, 49135},
7678 {1, 49135},
7679 },
7680 outputs: []outputInfo{
7681 {0, 49135},
7682 },
7683 },
7684 },
7685 {
7686 name: "DIVQ",
7687 auxType: auxBool,
7688 argLen: 2,
7689 clobberFlags: true,
7690 asm: x86.AIDIVQ,
7691 reg: regInfo{
7692 inputs: []inputInfo{
7693 {0, 1},
7694 {1, 49147},
7695 },
7696 outputs: []outputInfo{
7697 {0, 1},
7698 {1, 4},
7699 },
7700 },
7701 },
7702 {
7703 name: "DIVL",
7704 auxType: auxBool,
7705 argLen: 2,
7706 clobberFlags: true,
7707 asm: x86.AIDIVL,
7708 reg: regInfo{
7709 inputs: []inputInfo{
7710 {0, 1},
7711 {1, 49147},
7712 },
7713 outputs: []outputInfo{
7714 {0, 1},
7715 {1, 4},
7716 },
7717 },
7718 },
7719 {
7720 name: "DIVW",
7721 auxType: auxBool,
7722 argLen: 2,
7723 clobberFlags: true,
7724 asm: x86.AIDIVW,
7725 reg: regInfo{
7726 inputs: []inputInfo{
7727 {0, 1},
7728 {1, 49147},
7729 },
7730 outputs: []outputInfo{
7731 {0, 1},
7732 {1, 4},
7733 },
7734 },
7735 },
7736 {
7737 name: "DIVQU",
7738 argLen: 2,
7739 clobberFlags: true,
7740 asm: x86.ADIVQ,
7741 reg: regInfo{
7742 inputs: []inputInfo{
7743 {0, 1},
7744 {1, 49147},
7745 },
7746 outputs: []outputInfo{
7747 {0, 1},
7748 {1, 4},
7749 },
7750 },
7751 },
7752 {
7753 name: "DIVLU",
7754 argLen: 2,
7755 clobberFlags: true,
7756 asm: x86.ADIVL,
7757 reg: regInfo{
7758 inputs: []inputInfo{
7759 {0, 1},
7760 {1, 49147},
7761 },
7762 outputs: []outputInfo{
7763 {0, 1},
7764 {1, 4},
7765 },
7766 },
7767 },
7768 {
7769 name: "DIVWU",
7770 argLen: 2,
7771 clobberFlags: true,
7772 asm: x86.ADIVW,
7773 reg: regInfo{
7774 inputs: []inputInfo{
7775 {0, 1},
7776 {1, 49147},
7777 },
7778 outputs: []outputInfo{
7779 {0, 1},
7780 {1, 4},
7781 },
7782 },
7783 },
7784 {
7785 name: "NEGLflags",
7786 argLen: 1,
7787 resultInArg0: true,
7788 asm: x86.ANEGL,
7789 reg: regInfo{
7790 inputs: []inputInfo{
7791 {0, 49135},
7792 },
7793 outputs: []outputInfo{
7794 {1, 0},
7795 {0, 49135},
7796 },
7797 },
7798 },
7799 {
7800 name: "ADDQcarry",
7801 argLen: 2,
7802 commutative: true,
7803 resultInArg0: true,
7804 asm: x86.AADDQ,
7805 reg: regInfo{
7806 inputs: []inputInfo{
7807 {0, 49135},
7808 {1, 49135},
7809 },
7810 outputs: []outputInfo{
7811 {1, 0},
7812 {0, 49135},
7813 },
7814 },
7815 },
7816 {
7817 name: "ADCQ",
7818 argLen: 3,
7819 commutative: true,
7820 resultInArg0: true,
7821 asm: x86.AADCQ,
7822 reg: regInfo{
7823 inputs: []inputInfo{
7824 {0, 49135},
7825 {1, 49135},
7826 },
7827 outputs: []outputInfo{
7828 {1, 0},
7829 {0, 49135},
7830 },
7831 },
7832 },
7833 {
7834 name: "ADDQconstcarry",
7835 auxType: auxInt32,
7836 argLen: 1,
7837 resultInArg0: true,
7838 asm: x86.AADDQ,
7839 reg: regInfo{
7840 inputs: []inputInfo{
7841 {0, 49135},
7842 },
7843 outputs: []outputInfo{
7844 {1, 0},
7845 {0, 49135},
7846 },
7847 },
7848 },
7849 {
7850 name: "ADCQconst",
7851 auxType: auxInt32,
7852 argLen: 2,
7853 resultInArg0: true,
7854 asm: x86.AADCQ,
7855 reg: regInfo{
7856 inputs: []inputInfo{
7857 {0, 49135},
7858 },
7859 outputs: []outputInfo{
7860 {1, 0},
7861 {0, 49135},
7862 },
7863 },
7864 },
7865 {
7866 name: "SUBQborrow",
7867 argLen: 2,
7868 resultInArg0: true,
7869 asm: x86.ASUBQ,
7870 reg: regInfo{
7871 inputs: []inputInfo{
7872 {0, 49135},
7873 {1, 49135},
7874 },
7875 outputs: []outputInfo{
7876 {1, 0},
7877 {0, 49135},
7878 },
7879 },
7880 },
7881 {
7882 name: "SBBQ",
7883 argLen: 3,
7884 resultInArg0: true,
7885 asm: x86.ASBBQ,
7886 reg: regInfo{
7887 inputs: []inputInfo{
7888 {0, 49135},
7889 {1, 49135},
7890 },
7891 outputs: []outputInfo{
7892 {1, 0},
7893 {0, 49135},
7894 },
7895 },
7896 },
7897 {
7898 name: "SUBQconstborrow",
7899 auxType: auxInt32,
7900 argLen: 1,
7901 resultInArg0: true,
7902 asm: x86.ASUBQ,
7903 reg: regInfo{
7904 inputs: []inputInfo{
7905 {0, 49135},
7906 },
7907 outputs: []outputInfo{
7908 {1, 0},
7909 {0, 49135},
7910 },
7911 },
7912 },
7913 {
7914 name: "SBBQconst",
7915 auxType: auxInt32,
7916 argLen: 2,
7917 resultInArg0: true,
7918 asm: x86.ASBBQ,
7919 reg: regInfo{
7920 inputs: []inputInfo{
7921 {0, 49135},
7922 },
7923 outputs: []outputInfo{
7924 {1, 0},
7925 {0, 49135},
7926 },
7927 },
7928 },
7929 {
7930 name: "MULQU2",
7931 argLen: 2,
7932 commutative: true,
7933 clobberFlags: true,
7934 asm: x86.AMULQ,
7935 reg: regInfo{
7936 inputs: []inputInfo{
7937 {0, 1},
7938 {1, 49151},
7939 },
7940 outputs: []outputInfo{
7941 {0, 4},
7942 {1, 1},
7943 },
7944 },
7945 },
7946 {
7947 name: "DIVQU2",
7948 argLen: 3,
7949 clobberFlags: true,
7950 asm: x86.ADIVQ,
7951 reg: regInfo{
7952 inputs: []inputInfo{
7953 {0, 4},
7954 {1, 1},
7955 {2, 49151},
7956 },
7957 outputs: []outputInfo{
7958 {0, 1},
7959 {1, 4},
7960 },
7961 },
7962 },
7963 {
7964 name: "ANDQ",
7965 argLen: 2,
7966 commutative: true,
7967 resultInArg0: true,
7968 clobberFlags: true,
7969 asm: x86.AANDQ,
7970 reg: regInfo{
7971 inputs: []inputInfo{
7972 {0, 49135},
7973 {1, 49135},
7974 },
7975 outputs: []outputInfo{
7976 {0, 49135},
7977 },
7978 },
7979 },
7980 {
7981 name: "ANDL",
7982 argLen: 2,
7983 commutative: true,
7984 resultInArg0: true,
7985 clobberFlags: true,
7986 asm: x86.AANDL,
7987 reg: regInfo{
7988 inputs: []inputInfo{
7989 {0, 49135},
7990 {1, 49135},
7991 },
7992 outputs: []outputInfo{
7993 {0, 49135},
7994 },
7995 },
7996 },
7997 {
7998 name: "ANDQconst",
7999 auxType: auxInt32,
8000 argLen: 1,
8001 resultInArg0: true,
8002 clobberFlags: true,
8003 asm: x86.AANDQ,
8004 reg: regInfo{
8005 inputs: []inputInfo{
8006 {0, 49135},
8007 },
8008 outputs: []outputInfo{
8009 {0, 49135},
8010 },
8011 },
8012 },
8013 {
8014 name: "ANDLconst",
8015 auxType: auxInt32,
8016 argLen: 1,
8017 resultInArg0: true,
8018 clobberFlags: true,
8019 asm: x86.AANDL,
8020 reg: regInfo{
8021 inputs: []inputInfo{
8022 {0, 49135},
8023 },
8024 outputs: []outputInfo{
8025 {0, 49135},
8026 },
8027 },
8028 },
8029 {
8030 name: "ANDQconstmodify",
8031 auxType: auxSymValAndOff,
8032 argLen: 2,
8033 clobberFlags: true,
8034 faultOnNilArg0: true,
8035 symEffect: SymRead | SymWrite,
8036 asm: x86.AANDQ,
8037 reg: regInfo{
8038 inputs: []inputInfo{
8039 {0, 4295032831},
8040 },
8041 },
8042 },
8043 {
8044 name: "ANDLconstmodify",
8045 auxType: auxSymValAndOff,
8046 argLen: 2,
8047 clobberFlags: true,
8048 faultOnNilArg0: true,
8049 symEffect: SymRead | SymWrite,
8050 asm: x86.AANDL,
8051 reg: regInfo{
8052 inputs: []inputInfo{
8053 {0, 4295032831},
8054 },
8055 },
8056 },
8057 {
8058 name: "ORQ",
8059 argLen: 2,
8060 commutative: true,
8061 resultInArg0: true,
8062 clobberFlags: true,
8063 asm: x86.AORQ,
8064 reg: regInfo{
8065 inputs: []inputInfo{
8066 {0, 49135},
8067 {1, 49135},
8068 },
8069 outputs: []outputInfo{
8070 {0, 49135},
8071 },
8072 },
8073 },
8074 {
8075 name: "ORL",
8076 argLen: 2,
8077 commutative: true,
8078 resultInArg0: true,
8079 clobberFlags: true,
8080 asm: x86.AORL,
8081 reg: regInfo{
8082 inputs: []inputInfo{
8083 {0, 49135},
8084 {1, 49135},
8085 },
8086 outputs: []outputInfo{
8087 {0, 49135},
8088 },
8089 },
8090 },
8091 {
8092 name: "ORQconst",
8093 auxType: auxInt32,
8094 argLen: 1,
8095 resultInArg0: true,
8096 clobberFlags: true,
8097 asm: x86.AORQ,
8098 reg: regInfo{
8099 inputs: []inputInfo{
8100 {0, 49135},
8101 },
8102 outputs: []outputInfo{
8103 {0, 49135},
8104 },
8105 },
8106 },
8107 {
8108 name: "ORLconst",
8109 auxType: auxInt32,
8110 argLen: 1,
8111 resultInArg0: true,
8112 clobberFlags: true,
8113 asm: x86.AORL,
8114 reg: regInfo{
8115 inputs: []inputInfo{
8116 {0, 49135},
8117 },
8118 outputs: []outputInfo{
8119 {0, 49135},
8120 },
8121 },
8122 },
8123 {
8124 name: "ORQconstmodify",
8125 auxType: auxSymValAndOff,
8126 argLen: 2,
8127 clobberFlags: true,
8128 faultOnNilArg0: true,
8129 symEffect: SymRead | SymWrite,
8130 asm: x86.AORQ,
8131 reg: regInfo{
8132 inputs: []inputInfo{
8133 {0, 4295032831},
8134 },
8135 },
8136 },
8137 {
8138 name: "ORLconstmodify",
8139 auxType: auxSymValAndOff,
8140 argLen: 2,
8141 clobberFlags: true,
8142 faultOnNilArg0: true,
8143 symEffect: SymRead | SymWrite,
8144 asm: x86.AORL,
8145 reg: regInfo{
8146 inputs: []inputInfo{
8147 {0, 4295032831},
8148 },
8149 },
8150 },
8151 {
8152 name: "XORQ",
8153 argLen: 2,
8154 commutative: true,
8155 resultInArg0: true,
8156 clobberFlags: true,
8157 asm: x86.AXORQ,
8158 reg: regInfo{
8159 inputs: []inputInfo{
8160 {0, 49135},
8161 {1, 49135},
8162 },
8163 outputs: []outputInfo{
8164 {0, 49135},
8165 },
8166 },
8167 },
8168 {
8169 name: "XORL",
8170 argLen: 2,
8171 commutative: true,
8172 resultInArg0: true,
8173 clobberFlags: true,
8174 asm: x86.AXORL,
8175 reg: regInfo{
8176 inputs: []inputInfo{
8177 {0, 49135},
8178 {1, 49135},
8179 },
8180 outputs: []outputInfo{
8181 {0, 49135},
8182 },
8183 },
8184 },
8185 {
8186 name: "XORQconst",
8187 auxType: auxInt32,
8188 argLen: 1,
8189 resultInArg0: true,
8190 clobberFlags: true,
8191 asm: x86.AXORQ,
8192 reg: regInfo{
8193 inputs: []inputInfo{
8194 {0, 49135},
8195 },
8196 outputs: []outputInfo{
8197 {0, 49135},
8198 },
8199 },
8200 },
8201 {
8202 name: "XORLconst",
8203 auxType: auxInt32,
8204 argLen: 1,
8205 resultInArg0: true,
8206 clobberFlags: true,
8207 asm: x86.AXORL,
8208 reg: regInfo{
8209 inputs: []inputInfo{
8210 {0, 49135},
8211 },
8212 outputs: []outputInfo{
8213 {0, 49135},
8214 },
8215 },
8216 },
8217 {
8218 name: "XORQconstmodify",
8219 auxType: auxSymValAndOff,
8220 argLen: 2,
8221 clobberFlags: true,
8222 faultOnNilArg0: true,
8223 symEffect: SymRead | SymWrite,
8224 asm: x86.AXORQ,
8225 reg: regInfo{
8226 inputs: []inputInfo{
8227 {0, 4295032831},
8228 },
8229 },
8230 },
8231 {
8232 name: "XORLconstmodify",
8233 auxType: auxSymValAndOff,
8234 argLen: 2,
8235 clobberFlags: true,
8236 faultOnNilArg0: true,
8237 symEffect: SymRead | SymWrite,
8238 asm: x86.AXORL,
8239 reg: regInfo{
8240 inputs: []inputInfo{
8241 {0, 4295032831},
8242 },
8243 },
8244 },
8245 {
8246 name: "CMPQ",
8247 argLen: 2,
8248 asm: x86.ACMPQ,
8249 reg: regInfo{
8250 inputs: []inputInfo{
8251 {0, 49151},
8252 {1, 49151},
8253 },
8254 },
8255 },
8256 {
8257 name: "CMPL",
8258 argLen: 2,
8259 asm: x86.ACMPL,
8260 reg: regInfo{
8261 inputs: []inputInfo{
8262 {0, 49151},
8263 {1, 49151},
8264 },
8265 },
8266 },
8267 {
8268 name: "CMPW",
8269 argLen: 2,
8270 asm: x86.ACMPW,
8271 reg: regInfo{
8272 inputs: []inputInfo{
8273 {0, 49151},
8274 {1, 49151},
8275 },
8276 },
8277 },
8278 {
8279 name: "CMPB",
8280 argLen: 2,
8281 asm: x86.ACMPB,
8282 reg: regInfo{
8283 inputs: []inputInfo{
8284 {0, 49151},
8285 {1, 49151},
8286 },
8287 },
8288 },
8289 {
8290 name: "CMPQconst",
8291 auxType: auxInt32,
8292 argLen: 1,
8293 asm: x86.ACMPQ,
8294 reg: regInfo{
8295 inputs: []inputInfo{
8296 {0, 49151},
8297 },
8298 },
8299 },
8300 {
8301 name: "CMPLconst",
8302 auxType: auxInt32,
8303 argLen: 1,
8304 asm: x86.ACMPL,
8305 reg: regInfo{
8306 inputs: []inputInfo{
8307 {0, 49151},
8308 },
8309 },
8310 },
8311 {
8312 name: "CMPWconst",
8313 auxType: auxInt16,
8314 argLen: 1,
8315 asm: x86.ACMPW,
8316 reg: regInfo{
8317 inputs: []inputInfo{
8318 {0, 49151},
8319 },
8320 },
8321 },
8322 {
8323 name: "CMPBconst",
8324 auxType: auxInt8,
8325 argLen: 1,
8326 asm: x86.ACMPB,
8327 reg: regInfo{
8328 inputs: []inputInfo{
8329 {0, 49151},
8330 },
8331 },
8332 },
8333 {
8334 name: "CMPQload",
8335 auxType: auxSymOff,
8336 argLen: 3,
8337 faultOnNilArg0: true,
8338 symEffect: SymRead,
8339 asm: x86.ACMPQ,
8340 reg: regInfo{
8341 inputs: []inputInfo{
8342 {1, 49151},
8343 {0, 4295032831},
8344 },
8345 },
8346 },
8347 {
8348 name: "CMPLload",
8349 auxType: auxSymOff,
8350 argLen: 3,
8351 faultOnNilArg0: true,
8352 symEffect: SymRead,
8353 asm: x86.ACMPL,
8354 reg: regInfo{
8355 inputs: []inputInfo{
8356 {1, 49151},
8357 {0, 4295032831},
8358 },
8359 },
8360 },
8361 {
8362 name: "CMPWload",
8363 auxType: auxSymOff,
8364 argLen: 3,
8365 faultOnNilArg0: true,
8366 symEffect: SymRead,
8367 asm: x86.ACMPW,
8368 reg: regInfo{
8369 inputs: []inputInfo{
8370 {1, 49151},
8371 {0, 4295032831},
8372 },
8373 },
8374 },
8375 {
8376 name: "CMPBload",
8377 auxType: auxSymOff,
8378 argLen: 3,
8379 faultOnNilArg0: true,
8380 symEffect: SymRead,
8381 asm: x86.ACMPB,
8382 reg: regInfo{
8383 inputs: []inputInfo{
8384 {1, 49151},
8385 {0, 4295032831},
8386 },
8387 },
8388 },
8389 {
8390 name: "CMPQconstload",
8391 auxType: auxSymValAndOff,
8392 argLen: 2,
8393 faultOnNilArg0: true,
8394 symEffect: SymRead,
8395 asm: x86.ACMPQ,
8396 reg: regInfo{
8397 inputs: []inputInfo{
8398 {0, 4295032831},
8399 },
8400 },
8401 },
8402 {
8403 name: "CMPLconstload",
8404 auxType: auxSymValAndOff,
8405 argLen: 2,
8406 faultOnNilArg0: true,
8407 symEffect: SymRead,
8408 asm: x86.ACMPL,
8409 reg: regInfo{
8410 inputs: []inputInfo{
8411 {0, 4295032831},
8412 },
8413 },
8414 },
8415 {
8416 name: "CMPWconstload",
8417 auxType: auxSymValAndOff,
8418 argLen: 2,
8419 faultOnNilArg0: true,
8420 symEffect: SymRead,
8421 asm: x86.ACMPW,
8422 reg: regInfo{
8423 inputs: []inputInfo{
8424 {0, 4295032831},
8425 },
8426 },
8427 },
8428 {
8429 name: "CMPBconstload",
8430 auxType: auxSymValAndOff,
8431 argLen: 2,
8432 faultOnNilArg0: true,
8433 symEffect: SymRead,
8434 asm: x86.ACMPB,
8435 reg: regInfo{
8436 inputs: []inputInfo{
8437 {0, 4295032831},
8438 },
8439 },
8440 },
8441 {
8442 name: "CMPQloadidx8",
8443 auxType: auxSymOff,
8444 argLen: 4,
8445 symEffect: SymRead,
8446 asm: x86.ACMPQ,
8447 scale: 8,
8448 reg: regInfo{
8449 inputs: []inputInfo{
8450 {1, 49151},
8451 {2, 49151},
8452 {0, 4295032831},
8453 },
8454 },
8455 },
8456 {
8457 name: "CMPQloadidx1",
8458 auxType: auxSymOff,
8459 argLen: 4,
8460 commutative: true,
8461 symEffect: SymRead,
8462 asm: x86.ACMPQ,
8463 scale: 1,
8464 reg: regInfo{
8465 inputs: []inputInfo{
8466 {1, 49151},
8467 {2, 49151},
8468 {0, 4295032831},
8469 },
8470 },
8471 },
8472 {
8473 name: "CMPLloadidx4",
8474 auxType: auxSymOff,
8475 argLen: 4,
8476 symEffect: SymRead,
8477 asm: x86.ACMPL,
8478 scale: 4,
8479 reg: regInfo{
8480 inputs: []inputInfo{
8481 {1, 49151},
8482 {2, 49151},
8483 {0, 4295032831},
8484 },
8485 },
8486 },
8487 {
8488 name: "CMPLloadidx1",
8489 auxType: auxSymOff,
8490 argLen: 4,
8491 commutative: true,
8492 symEffect: SymRead,
8493 asm: x86.ACMPL,
8494 scale: 1,
8495 reg: regInfo{
8496 inputs: []inputInfo{
8497 {1, 49151},
8498 {2, 49151},
8499 {0, 4295032831},
8500 },
8501 },
8502 },
8503 {
8504 name: "CMPWloadidx2",
8505 auxType: auxSymOff,
8506 argLen: 4,
8507 symEffect: SymRead,
8508 asm: x86.ACMPW,
8509 scale: 2,
8510 reg: regInfo{
8511 inputs: []inputInfo{
8512 {1, 49151},
8513 {2, 49151},
8514 {0, 4295032831},
8515 },
8516 },
8517 },
8518 {
8519 name: "CMPWloadidx1",
8520 auxType: auxSymOff,
8521 argLen: 4,
8522 commutative: true,
8523 symEffect: SymRead,
8524 asm: x86.ACMPW,
8525 scale: 1,
8526 reg: regInfo{
8527 inputs: []inputInfo{
8528 {1, 49151},
8529 {2, 49151},
8530 {0, 4295032831},
8531 },
8532 },
8533 },
8534 {
8535 name: "CMPBloadidx1",
8536 auxType: auxSymOff,
8537 argLen: 4,
8538 commutative: true,
8539 symEffect: SymRead,
8540 asm: x86.ACMPB,
8541 scale: 1,
8542 reg: regInfo{
8543 inputs: []inputInfo{
8544 {1, 49151},
8545 {2, 49151},
8546 {0, 4295032831},
8547 },
8548 },
8549 },
8550 {
8551 name: "CMPQconstloadidx8",
8552 auxType: auxSymValAndOff,
8553 argLen: 3,
8554 symEffect: SymRead,
8555 asm: x86.ACMPQ,
8556 scale: 8,
8557 reg: regInfo{
8558 inputs: []inputInfo{
8559 {1, 49151},
8560 {0, 4295032831},
8561 },
8562 },
8563 },
8564 {
8565 name: "CMPQconstloadidx1",
8566 auxType: auxSymValAndOff,
8567 argLen: 3,
8568 commutative: true,
8569 symEffect: SymRead,
8570 asm: x86.ACMPQ,
8571 scale: 1,
8572 reg: regInfo{
8573 inputs: []inputInfo{
8574 {1, 49151},
8575 {0, 4295032831},
8576 },
8577 },
8578 },
8579 {
8580 name: "CMPLconstloadidx4",
8581 auxType: auxSymValAndOff,
8582 argLen: 3,
8583 symEffect: SymRead,
8584 asm: x86.ACMPL,
8585 scale: 4,
8586 reg: regInfo{
8587 inputs: []inputInfo{
8588 {1, 49151},
8589 {0, 4295032831},
8590 },
8591 },
8592 },
8593 {
8594 name: "CMPLconstloadidx1",
8595 auxType: auxSymValAndOff,
8596 argLen: 3,
8597 commutative: true,
8598 symEffect: SymRead,
8599 asm: x86.ACMPL,
8600 scale: 1,
8601 reg: regInfo{
8602 inputs: []inputInfo{
8603 {1, 49151},
8604 {0, 4295032831},
8605 },
8606 },
8607 },
8608 {
8609 name: "CMPWconstloadidx2",
8610 auxType: auxSymValAndOff,
8611 argLen: 3,
8612 symEffect: SymRead,
8613 asm: x86.ACMPW,
8614 scale: 2,
8615 reg: regInfo{
8616 inputs: []inputInfo{
8617 {1, 49151},
8618 {0, 4295032831},
8619 },
8620 },
8621 },
8622 {
8623 name: "CMPWconstloadidx1",
8624 auxType: auxSymValAndOff,
8625 argLen: 3,
8626 commutative: true,
8627 symEffect: SymRead,
8628 asm: x86.ACMPW,
8629 scale: 1,
8630 reg: regInfo{
8631 inputs: []inputInfo{
8632 {1, 49151},
8633 {0, 4295032831},
8634 },
8635 },
8636 },
8637 {
8638 name: "CMPBconstloadidx1",
8639 auxType: auxSymValAndOff,
8640 argLen: 3,
8641 commutative: true,
8642 symEffect: SymRead,
8643 asm: x86.ACMPB,
8644 scale: 1,
8645 reg: regInfo{
8646 inputs: []inputInfo{
8647 {1, 49151},
8648 {0, 4295032831},
8649 },
8650 },
8651 },
8652 {
8653 name: "UCOMISS",
8654 argLen: 2,
8655 asm: x86.AUCOMISS,
8656 reg: regInfo{
8657 inputs: []inputInfo{
8658 {0, 2147418112},
8659 {1, 2147418112},
8660 },
8661 },
8662 },
8663 {
8664 name: "UCOMISD",
8665 argLen: 2,
8666 asm: x86.AUCOMISD,
8667 reg: regInfo{
8668 inputs: []inputInfo{
8669 {0, 2147418112},
8670 {1, 2147418112},
8671 },
8672 },
8673 },
8674 {
8675 name: "BTL",
8676 argLen: 2,
8677 asm: x86.ABTL,
8678 reg: regInfo{
8679 inputs: []inputInfo{
8680 {0, 49151},
8681 {1, 49151},
8682 },
8683 },
8684 },
8685 {
8686 name: "BTQ",
8687 argLen: 2,
8688 asm: x86.ABTQ,
8689 reg: regInfo{
8690 inputs: []inputInfo{
8691 {0, 49151},
8692 {1, 49151},
8693 },
8694 },
8695 },
8696 {
8697 name: "BTCL",
8698 argLen: 2,
8699 resultInArg0: true,
8700 clobberFlags: true,
8701 asm: x86.ABTCL,
8702 reg: regInfo{
8703 inputs: []inputInfo{
8704 {0, 49135},
8705 {1, 49135},
8706 },
8707 outputs: []outputInfo{
8708 {0, 49135},
8709 },
8710 },
8711 },
8712 {
8713 name: "BTCQ",
8714 argLen: 2,
8715 resultInArg0: true,
8716 clobberFlags: true,
8717 asm: x86.ABTCQ,
8718 reg: regInfo{
8719 inputs: []inputInfo{
8720 {0, 49135},
8721 {1, 49135},
8722 },
8723 outputs: []outputInfo{
8724 {0, 49135},
8725 },
8726 },
8727 },
8728 {
8729 name: "BTRL",
8730 argLen: 2,
8731 resultInArg0: true,
8732 clobberFlags: true,
8733 asm: x86.ABTRL,
8734 reg: regInfo{
8735 inputs: []inputInfo{
8736 {0, 49135},
8737 {1, 49135},
8738 },
8739 outputs: []outputInfo{
8740 {0, 49135},
8741 },
8742 },
8743 },
8744 {
8745 name: "BTRQ",
8746 argLen: 2,
8747 resultInArg0: true,
8748 clobberFlags: true,
8749 asm: x86.ABTRQ,
8750 reg: regInfo{
8751 inputs: []inputInfo{
8752 {0, 49135},
8753 {1, 49135},
8754 },
8755 outputs: []outputInfo{
8756 {0, 49135},
8757 },
8758 },
8759 },
8760 {
8761 name: "BTSL",
8762 argLen: 2,
8763 resultInArg0: true,
8764 clobberFlags: true,
8765 asm: x86.ABTSL,
8766 reg: regInfo{
8767 inputs: []inputInfo{
8768 {0, 49135},
8769 {1, 49135},
8770 },
8771 outputs: []outputInfo{
8772 {0, 49135},
8773 },
8774 },
8775 },
8776 {
8777 name: "BTSQ",
8778 argLen: 2,
8779 resultInArg0: true,
8780 clobberFlags: true,
8781 asm: x86.ABTSQ,
8782 reg: regInfo{
8783 inputs: []inputInfo{
8784 {0, 49135},
8785 {1, 49135},
8786 },
8787 outputs: []outputInfo{
8788 {0, 49135},
8789 },
8790 },
8791 },
8792 {
8793 name: "BTLconst",
8794 auxType: auxInt8,
8795 argLen: 1,
8796 asm: x86.ABTL,
8797 reg: regInfo{
8798 inputs: []inputInfo{
8799 {0, 49151},
8800 },
8801 },
8802 },
8803 {
8804 name: "BTQconst",
8805 auxType: auxInt8,
8806 argLen: 1,
8807 asm: x86.ABTQ,
8808 reg: regInfo{
8809 inputs: []inputInfo{
8810 {0, 49151},
8811 },
8812 },
8813 },
8814 {
8815 name: "BTCQconst",
8816 auxType: auxInt8,
8817 argLen: 1,
8818 resultInArg0: true,
8819 clobberFlags: true,
8820 asm: x86.ABTCQ,
8821 reg: regInfo{
8822 inputs: []inputInfo{
8823 {0, 49135},
8824 },
8825 outputs: []outputInfo{
8826 {0, 49135},
8827 },
8828 },
8829 },
8830 {
8831 name: "BTRQconst",
8832 auxType: auxInt8,
8833 argLen: 1,
8834 resultInArg0: true,
8835 clobberFlags: true,
8836 asm: x86.ABTRQ,
8837 reg: regInfo{
8838 inputs: []inputInfo{
8839 {0, 49135},
8840 },
8841 outputs: []outputInfo{
8842 {0, 49135},
8843 },
8844 },
8845 },
8846 {
8847 name: "BTSQconst",
8848 auxType: auxInt8,
8849 argLen: 1,
8850 resultInArg0: true,
8851 clobberFlags: true,
8852 asm: x86.ABTSQ,
8853 reg: regInfo{
8854 inputs: []inputInfo{
8855 {0, 49135},
8856 },
8857 outputs: []outputInfo{
8858 {0, 49135},
8859 },
8860 },
8861 },
8862 {
8863 name: "BTSQconstmodify",
8864 auxType: auxSymValAndOff,
8865 argLen: 2,
8866 clobberFlags: true,
8867 faultOnNilArg0: true,
8868 symEffect: SymRead | SymWrite,
8869 asm: x86.ABTSQ,
8870 reg: regInfo{
8871 inputs: []inputInfo{
8872 {0, 4295032831},
8873 },
8874 },
8875 },
8876 {
8877 name: "BTRQconstmodify",
8878 auxType: auxSymValAndOff,
8879 argLen: 2,
8880 clobberFlags: true,
8881 faultOnNilArg0: true,
8882 symEffect: SymRead | SymWrite,
8883 asm: x86.ABTRQ,
8884 reg: regInfo{
8885 inputs: []inputInfo{
8886 {0, 4295032831},
8887 },
8888 },
8889 },
8890 {
8891 name: "BTCQconstmodify",
8892 auxType: auxSymValAndOff,
8893 argLen: 2,
8894 clobberFlags: true,
8895 faultOnNilArg0: true,
8896 symEffect: SymRead | SymWrite,
8897 asm: x86.ABTCQ,
8898 reg: regInfo{
8899 inputs: []inputInfo{
8900 {0, 4295032831},
8901 },
8902 },
8903 },
8904 {
8905 name: "TESTQ",
8906 argLen: 2,
8907 commutative: true,
8908 asm: x86.ATESTQ,
8909 reg: regInfo{
8910 inputs: []inputInfo{
8911 {0, 49151},
8912 {1, 49151},
8913 },
8914 },
8915 },
8916 {
8917 name: "TESTL",
8918 argLen: 2,
8919 commutative: true,
8920 asm: x86.ATESTL,
8921 reg: regInfo{
8922 inputs: []inputInfo{
8923 {0, 49151},
8924 {1, 49151},
8925 },
8926 },
8927 },
8928 {
8929 name: "TESTW",
8930 argLen: 2,
8931 commutative: true,
8932 asm: x86.ATESTW,
8933 reg: regInfo{
8934 inputs: []inputInfo{
8935 {0, 49151},
8936 {1, 49151},
8937 },
8938 },
8939 },
8940 {
8941 name: "TESTB",
8942 argLen: 2,
8943 commutative: true,
8944 asm: x86.ATESTB,
8945 reg: regInfo{
8946 inputs: []inputInfo{
8947 {0, 49151},
8948 {1, 49151},
8949 },
8950 },
8951 },
8952 {
8953 name: "TESTQconst",
8954 auxType: auxInt32,
8955 argLen: 1,
8956 asm: x86.ATESTQ,
8957 reg: regInfo{
8958 inputs: []inputInfo{
8959 {0, 49151},
8960 },
8961 },
8962 },
8963 {
8964 name: "TESTLconst",
8965 auxType: auxInt32,
8966 argLen: 1,
8967 asm: x86.ATESTL,
8968 reg: regInfo{
8969 inputs: []inputInfo{
8970 {0, 49151},
8971 },
8972 },
8973 },
8974 {
8975 name: "TESTWconst",
8976 auxType: auxInt16,
8977 argLen: 1,
8978 asm: x86.ATESTW,
8979 reg: regInfo{
8980 inputs: []inputInfo{
8981 {0, 49151},
8982 },
8983 },
8984 },
8985 {
8986 name: "TESTBconst",
8987 auxType: auxInt8,
8988 argLen: 1,
8989 asm: x86.ATESTB,
8990 reg: regInfo{
8991 inputs: []inputInfo{
8992 {0, 49151},
8993 },
8994 },
8995 },
8996 {
8997 name: "SHLQ",
8998 argLen: 2,
8999 resultInArg0: true,
9000 clobberFlags: true,
9001 asm: x86.ASHLQ,
9002 reg: regInfo{
9003 inputs: []inputInfo{
9004 {1, 2},
9005 {0, 49135},
9006 },
9007 outputs: []outputInfo{
9008 {0, 49135},
9009 },
9010 },
9011 },
9012 {
9013 name: "SHLL",
9014 argLen: 2,
9015 resultInArg0: true,
9016 clobberFlags: true,
9017 asm: x86.ASHLL,
9018 reg: regInfo{
9019 inputs: []inputInfo{
9020 {1, 2},
9021 {0, 49135},
9022 },
9023 outputs: []outputInfo{
9024 {0, 49135},
9025 },
9026 },
9027 },
9028 {
9029 name: "SHLQconst",
9030 auxType: auxInt8,
9031 argLen: 1,
9032 resultInArg0: true,
9033 clobberFlags: true,
9034 asm: x86.ASHLQ,
9035 reg: regInfo{
9036 inputs: []inputInfo{
9037 {0, 49135},
9038 },
9039 outputs: []outputInfo{
9040 {0, 49135},
9041 },
9042 },
9043 },
9044 {
9045 name: "SHLLconst",
9046 auxType: auxInt8,
9047 argLen: 1,
9048 resultInArg0: true,
9049 clobberFlags: true,
9050 asm: x86.ASHLL,
9051 reg: regInfo{
9052 inputs: []inputInfo{
9053 {0, 49135},
9054 },
9055 outputs: []outputInfo{
9056 {0, 49135},
9057 },
9058 },
9059 },
9060 {
9061 name: "SHRQ",
9062 argLen: 2,
9063 resultInArg0: true,
9064 clobberFlags: true,
9065 asm: x86.ASHRQ,
9066 reg: regInfo{
9067 inputs: []inputInfo{
9068 {1, 2},
9069 {0, 49135},
9070 },
9071 outputs: []outputInfo{
9072 {0, 49135},
9073 },
9074 },
9075 },
9076 {
9077 name: "SHRL",
9078 argLen: 2,
9079 resultInArg0: true,
9080 clobberFlags: true,
9081 asm: x86.ASHRL,
9082 reg: regInfo{
9083 inputs: []inputInfo{
9084 {1, 2},
9085 {0, 49135},
9086 },
9087 outputs: []outputInfo{
9088 {0, 49135},
9089 },
9090 },
9091 },
9092 {
9093 name: "SHRW",
9094 argLen: 2,
9095 resultInArg0: true,
9096 clobberFlags: true,
9097 asm: x86.ASHRW,
9098 reg: regInfo{
9099 inputs: []inputInfo{
9100 {1, 2},
9101 {0, 49135},
9102 },
9103 outputs: []outputInfo{
9104 {0, 49135},
9105 },
9106 },
9107 },
9108 {
9109 name: "SHRB",
9110 argLen: 2,
9111 resultInArg0: true,
9112 clobberFlags: true,
9113 asm: x86.ASHRB,
9114 reg: regInfo{
9115 inputs: []inputInfo{
9116 {1, 2},
9117 {0, 49135},
9118 },
9119 outputs: []outputInfo{
9120 {0, 49135},
9121 },
9122 },
9123 },
9124 {
9125 name: "SHRQconst",
9126 auxType: auxInt8,
9127 argLen: 1,
9128 resultInArg0: true,
9129 clobberFlags: true,
9130 asm: x86.ASHRQ,
9131 reg: regInfo{
9132 inputs: []inputInfo{
9133 {0, 49135},
9134 },
9135 outputs: []outputInfo{
9136 {0, 49135},
9137 },
9138 },
9139 },
9140 {
9141 name: "SHRLconst",
9142 auxType: auxInt8,
9143 argLen: 1,
9144 resultInArg0: true,
9145 clobberFlags: true,
9146 asm: x86.ASHRL,
9147 reg: regInfo{
9148 inputs: []inputInfo{
9149 {0, 49135},
9150 },
9151 outputs: []outputInfo{
9152 {0, 49135},
9153 },
9154 },
9155 },
9156 {
9157 name: "SHRWconst",
9158 auxType: auxInt8,
9159 argLen: 1,
9160 resultInArg0: true,
9161 clobberFlags: true,
9162 asm: x86.ASHRW,
9163 reg: regInfo{
9164 inputs: []inputInfo{
9165 {0, 49135},
9166 },
9167 outputs: []outputInfo{
9168 {0, 49135},
9169 },
9170 },
9171 },
9172 {
9173 name: "SHRBconst",
9174 auxType: auxInt8,
9175 argLen: 1,
9176 resultInArg0: true,
9177 clobberFlags: true,
9178 asm: x86.ASHRB,
9179 reg: regInfo{
9180 inputs: []inputInfo{
9181 {0, 49135},
9182 },
9183 outputs: []outputInfo{
9184 {0, 49135},
9185 },
9186 },
9187 },
9188 {
9189 name: "SARQ",
9190 argLen: 2,
9191 resultInArg0: true,
9192 clobberFlags: true,
9193 asm: x86.ASARQ,
9194 reg: regInfo{
9195 inputs: []inputInfo{
9196 {1, 2},
9197 {0, 49135},
9198 },
9199 outputs: []outputInfo{
9200 {0, 49135},
9201 },
9202 },
9203 },
9204 {
9205 name: "SARL",
9206 argLen: 2,
9207 resultInArg0: true,
9208 clobberFlags: true,
9209 asm: x86.ASARL,
9210 reg: regInfo{
9211 inputs: []inputInfo{
9212 {1, 2},
9213 {0, 49135},
9214 },
9215 outputs: []outputInfo{
9216 {0, 49135},
9217 },
9218 },
9219 },
9220 {
9221 name: "SARW",
9222 argLen: 2,
9223 resultInArg0: true,
9224 clobberFlags: true,
9225 asm: x86.ASARW,
9226 reg: regInfo{
9227 inputs: []inputInfo{
9228 {1, 2},
9229 {0, 49135},
9230 },
9231 outputs: []outputInfo{
9232 {0, 49135},
9233 },
9234 },
9235 },
9236 {
9237 name: "SARB",
9238 argLen: 2,
9239 resultInArg0: true,
9240 clobberFlags: true,
9241 asm: x86.ASARB,
9242 reg: regInfo{
9243 inputs: []inputInfo{
9244 {1, 2},
9245 {0, 49135},
9246 },
9247 outputs: []outputInfo{
9248 {0, 49135},
9249 },
9250 },
9251 },
9252 {
9253 name: "SARQconst",
9254 auxType: auxInt8,
9255 argLen: 1,
9256 resultInArg0: true,
9257 clobberFlags: true,
9258 asm: x86.ASARQ,
9259 reg: regInfo{
9260 inputs: []inputInfo{
9261 {0, 49135},
9262 },
9263 outputs: []outputInfo{
9264 {0, 49135},
9265 },
9266 },
9267 },
9268 {
9269 name: "SARLconst",
9270 auxType: auxInt8,
9271 argLen: 1,
9272 resultInArg0: true,
9273 clobberFlags: true,
9274 asm: x86.ASARL,
9275 reg: regInfo{
9276 inputs: []inputInfo{
9277 {0, 49135},
9278 },
9279 outputs: []outputInfo{
9280 {0, 49135},
9281 },
9282 },
9283 },
9284 {
9285 name: "SARWconst",
9286 auxType: auxInt8,
9287 argLen: 1,
9288 resultInArg0: true,
9289 clobberFlags: true,
9290 asm: x86.ASARW,
9291 reg: regInfo{
9292 inputs: []inputInfo{
9293 {0, 49135},
9294 },
9295 outputs: []outputInfo{
9296 {0, 49135},
9297 },
9298 },
9299 },
9300 {
9301 name: "SARBconst",
9302 auxType: auxInt8,
9303 argLen: 1,
9304 resultInArg0: true,
9305 clobberFlags: true,
9306 asm: x86.ASARB,
9307 reg: regInfo{
9308 inputs: []inputInfo{
9309 {0, 49135},
9310 },
9311 outputs: []outputInfo{
9312 {0, 49135},
9313 },
9314 },
9315 },
9316 {
9317 name: "SHRDQ",
9318 argLen: 3,
9319 resultInArg0: true,
9320 clobberFlags: true,
9321 asm: x86.ASHRQ,
9322 reg: regInfo{
9323 inputs: []inputInfo{
9324 {2, 2},
9325 {0, 49135},
9326 {1, 49135},
9327 },
9328 outputs: []outputInfo{
9329 {0, 49135},
9330 },
9331 },
9332 },
9333 {
9334 name: "SHLDQ",
9335 argLen: 3,
9336 resultInArg0: true,
9337 clobberFlags: true,
9338 asm: x86.ASHLQ,
9339 reg: regInfo{
9340 inputs: []inputInfo{
9341 {2, 2},
9342 {0, 49135},
9343 {1, 49135},
9344 },
9345 outputs: []outputInfo{
9346 {0, 49135},
9347 },
9348 },
9349 },
9350 {
9351 name: "ROLQ",
9352 argLen: 2,
9353 resultInArg0: true,
9354 clobberFlags: true,
9355 asm: x86.AROLQ,
9356 reg: regInfo{
9357 inputs: []inputInfo{
9358 {1, 2},
9359 {0, 49135},
9360 },
9361 outputs: []outputInfo{
9362 {0, 49135},
9363 },
9364 },
9365 },
9366 {
9367 name: "ROLL",
9368 argLen: 2,
9369 resultInArg0: true,
9370 clobberFlags: true,
9371 asm: x86.AROLL,
9372 reg: regInfo{
9373 inputs: []inputInfo{
9374 {1, 2},
9375 {0, 49135},
9376 },
9377 outputs: []outputInfo{
9378 {0, 49135},
9379 },
9380 },
9381 },
9382 {
9383 name: "ROLW",
9384 argLen: 2,
9385 resultInArg0: true,
9386 clobberFlags: true,
9387 asm: x86.AROLW,
9388 reg: regInfo{
9389 inputs: []inputInfo{
9390 {1, 2},
9391 {0, 49135},
9392 },
9393 outputs: []outputInfo{
9394 {0, 49135},
9395 },
9396 },
9397 },
9398 {
9399 name: "ROLB",
9400 argLen: 2,
9401 resultInArg0: true,
9402 clobberFlags: true,
9403 asm: x86.AROLB,
9404 reg: regInfo{
9405 inputs: []inputInfo{
9406 {1, 2},
9407 {0, 49135},
9408 },
9409 outputs: []outputInfo{
9410 {0, 49135},
9411 },
9412 },
9413 },
9414 {
9415 name: "RORQ",
9416 argLen: 2,
9417 resultInArg0: true,
9418 clobberFlags: true,
9419 asm: x86.ARORQ,
9420 reg: regInfo{
9421 inputs: []inputInfo{
9422 {1, 2},
9423 {0, 49135},
9424 },
9425 outputs: []outputInfo{
9426 {0, 49135},
9427 },
9428 },
9429 },
9430 {
9431 name: "RORL",
9432 argLen: 2,
9433 resultInArg0: true,
9434 clobberFlags: true,
9435 asm: x86.ARORL,
9436 reg: regInfo{
9437 inputs: []inputInfo{
9438 {1, 2},
9439 {0, 49135},
9440 },
9441 outputs: []outputInfo{
9442 {0, 49135},
9443 },
9444 },
9445 },
9446 {
9447 name: "RORW",
9448 argLen: 2,
9449 resultInArg0: true,
9450 clobberFlags: true,
9451 asm: x86.ARORW,
9452 reg: regInfo{
9453 inputs: []inputInfo{
9454 {1, 2},
9455 {0, 49135},
9456 },
9457 outputs: []outputInfo{
9458 {0, 49135},
9459 },
9460 },
9461 },
9462 {
9463 name: "RORB",
9464 argLen: 2,
9465 resultInArg0: true,
9466 clobberFlags: true,
9467 asm: x86.ARORB,
9468 reg: regInfo{
9469 inputs: []inputInfo{
9470 {1, 2},
9471 {0, 49135},
9472 },
9473 outputs: []outputInfo{
9474 {0, 49135},
9475 },
9476 },
9477 },
9478 {
9479 name: "ROLQconst",
9480 auxType: auxInt8,
9481 argLen: 1,
9482 resultInArg0: true,
9483 clobberFlags: true,
9484 asm: x86.AROLQ,
9485 reg: regInfo{
9486 inputs: []inputInfo{
9487 {0, 49135},
9488 },
9489 outputs: []outputInfo{
9490 {0, 49135},
9491 },
9492 },
9493 },
9494 {
9495 name: "ROLLconst",
9496 auxType: auxInt8,
9497 argLen: 1,
9498 resultInArg0: true,
9499 clobberFlags: true,
9500 asm: x86.AROLL,
9501 reg: regInfo{
9502 inputs: []inputInfo{
9503 {0, 49135},
9504 },
9505 outputs: []outputInfo{
9506 {0, 49135},
9507 },
9508 },
9509 },
9510 {
9511 name: "ROLWconst",
9512 auxType: auxInt8,
9513 argLen: 1,
9514 resultInArg0: true,
9515 clobberFlags: true,
9516 asm: x86.AROLW,
9517 reg: regInfo{
9518 inputs: []inputInfo{
9519 {0, 49135},
9520 },
9521 outputs: []outputInfo{
9522 {0, 49135},
9523 },
9524 },
9525 },
9526 {
9527 name: "ROLBconst",
9528 auxType: auxInt8,
9529 argLen: 1,
9530 resultInArg0: true,
9531 clobberFlags: true,
9532 asm: x86.AROLB,
9533 reg: regInfo{
9534 inputs: []inputInfo{
9535 {0, 49135},
9536 },
9537 outputs: []outputInfo{
9538 {0, 49135},
9539 },
9540 },
9541 },
9542 {
9543 name: "ADDLload",
9544 auxType: auxSymOff,
9545 argLen: 3,
9546 resultInArg0: true,
9547 clobberFlags: true,
9548 faultOnNilArg1: true,
9549 symEffect: SymRead,
9550 asm: x86.AADDL,
9551 reg: regInfo{
9552 inputs: []inputInfo{
9553 {0, 49135},
9554 {1, 4295032831},
9555 },
9556 outputs: []outputInfo{
9557 {0, 49135},
9558 },
9559 },
9560 },
9561 {
9562 name: "ADDQload",
9563 auxType: auxSymOff,
9564 argLen: 3,
9565 resultInArg0: true,
9566 clobberFlags: true,
9567 faultOnNilArg1: true,
9568 symEffect: SymRead,
9569 asm: x86.AADDQ,
9570 reg: regInfo{
9571 inputs: []inputInfo{
9572 {0, 49135},
9573 {1, 4295032831},
9574 },
9575 outputs: []outputInfo{
9576 {0, 49135},
9577 },
9578 },
9579 },
9580 {
9581 name: "SUBQload",
9582 auxType: auxSymOff,
9583 argLen: 3,
9584 resultInArg0: true,
9585 clobberFlags: true,
9586 faultOnNilArg1: true,
9587 symEffect: SymRead,
9588 asm: x86.ASUBQ,
9589 reg: regInfo{
9590 inputs: []inputInfo{
9591 {0, 49135},
9592 {1, 4295032831},
9593 },
9594 outputs: []outputInfo{
9595 {0, 49135},
9596 },
9597 },
9598 },
9599 {
9600 name: "SUBLload",
9601 auxType: auxSymOff,
9602 argLen: 3,
9603 resultInArg0: true,
9604 clobberFlags: true,
9605 faultOnNilArg1: true,
9606 symEffect: SymRead,
9607 asm: x86.ASUBL,
9608 reg: regInfo{
9609 inputs: []inputInfo{
9610 {0, 49135},
9611 {1, 4295032831},
9612 },
9613 outputs: []outputInfo{
9614 {0, 49135},
9615 },
9616 },
9617 },
9618 {
9619 name: "ANDLload",
9620 auxType: auxSymOff,
9621 argLen: 3,
9622 resultInArg0: true,
9623 clobberFlags: true,
9624 faultOnNilArg1: true,
9625 symEffect: SymRead,
9626 asm: x86.AANDL,
9627 reg: regInfo{
9628 inputs: []inputInfo{
9629 {0, 49135},
9630 {1, 4295032831},
9631 },
9632 outputs: []outputInfo{
9633 {0, 49135},
9634 },
9635 },
9636 },
9637 {
9638 name: "ANDQload",
9639 auxType: auxSymOff,
9640 argLen: 3,
9641 resultInArg0: true,
9642 clobberFlags: true,
9643 faultOnNilArg1: true,
9644 symEffect: SymRead,
9645 asm: x86.AANDQ,
9646 reg: regInfo{
9647 inputs: []inputInfo{
9648 {0, 49135},
9649 {1, 4295032831},
9650 },
9651 outputs: []outputInfo{
9652 {0, 49135},
9653 },
9654 },
9655 },
9656 {
9657 name: "ORQload",
9658 auxType: auxSymOff,
9659 argLen: 3,
9660 resultInArg0: true,
9661 clobberFlags: true,
9662 faultOnNilArg1: true,
9663 symEffect: SymRead,
9664 asm: x86.AORQ,
9665 reg: regInfo{
9666 inputs: []inputInfo{
9667 {0, 49135},
9668 {1, 4295032831},
9669 },
9670 outputs: []outputInfo{
9671 {0, 49135},
9672 },
9673 },
9674 },
9675 {
9676 name: "ORLload",
9677 auxType: auxSymOff,
9678 argLen: 3,
9679 resultInArg0: true,
9680 clobberFlags: true,
9681 faultOnNilArg1: true,
9682 symEffect: SymRead,
9683 asm: x86.AORL,
9684 reg: regInfo{
9685 inputs: []inputInfo{
9686 {0, 49135},
9687 {1, 4295032831},
9688 },
9689 outputs: []outputInfo{
9690 {0, 49135},
9691 },
9692 },
9693 },
9694 {
9695 name: "XORQload",
9696 auxType: auxSymOff,
9697 argLen: 3,
9698 resultInArg0: true,
9699 clobberFlags: true,
9700 faultOnNilArg1: true,
9701 symEffect: SymRead,
9702 asm: x86.AXORQ,
9703 reg: regInfo{
9704 inputs: []inputInfo{
9705 {0, 49135},
9706 {1, 4295032831},
9707 },
9708 outputs: []outputInfo{
9709 {0, 49135},
9710 },
9711 },
9712 },
9713 {
9714 name: "XORLload",
9715 auxType: auxSymOff,
9716 argLen: 3,
9717 resultInArg0: true,
9718 clobberFlags: true,
9719 faultOnNilArg1: true,
9720 symEffect: SymRead,
9721 asm: x86.AXORL,
9722 reg: regInfo{
9723 inputs: []inputInfo{
9724 {0, 49135},
9725 {1, 4295032831},
9726 },
9727 outputs: []outputInfo{
9728 {0, 49135},
9729 },
9730 },
9731 },
9732 {
9733 name: "ADDLloadidx1",
9734 auxType: auxSymOff,
9735 argLen: 4,
9736 resultInArg0: true,
9737 clobberFlags: true,
9738 symEffect: SymRead,
9739 asm: x86.AADDL,
9740 scale: 1,
9741 reg: regInfo{
9742 inputs: []inputInfo{
9743 {0, 49135},
9744 {2, 49151},
9745 {1, 4295032831},
9746 },
9747 outputs: []outputInfo{
9748 {0, 49135},
9749 },
9750 },
9751 },
9752 {
9753 name: "ADDLloadidx4",
9754 auxType: auxSymOff,
9755 argLen: 4,
9756 resultInArg0: true,
9757 clobberFlags: true,
9758 symEffect: SymRead,
9759 asm: x86.AADDL,
9760 scale: 4,
9761 reg: regInfo{
9762 inputs: []inputInfo{
9763 {0, 49135},
9764 {2, 49151},
9765 {1, 4295032831},
9766 },
9767 outputs: []outputInfo{
9768 {0, 49135},
9769 },
9770 },
9771 },
9772 {
9773 name: "ADDLloadidx8",
9774 auxType: auxSymOff,
9775 argLen: 4,
9776 resultInArg0: true,
9777 clobberFlags: true,
9778 symEffect: SymRead,
9779 asm: x86.AADDL,
9780 scale: 8,
9781 reg: regInfo{
9782 inputs: []inputInfo{
9783 {0, 49135},
9784 {2, 49151},
9785 {1, 4295032831},
9786 },
9787 outputs: []outputInfo{
9788 {0, 49135},
9789 },
9790 },
9791 },
9792 {
9793 name: "ADDQloadidx1",
9794 auxType: auxSymOff,
9795 argLen: 4,
9796 resultInArg0: true,
9797 clobberFlags: true,
9798 symEffect: SymRead,
9799 asm: x86.AADDQ,
9800 scale: 1,
9801 reg: regInfo{
9802 inputs: []inputInfo{
9803 {0, 49135},
9804 {2, 49151},
9805 {1, 4295032831},
9806 },
9807 outputs: []outputInfo{
9808 {0, 49135},
9809 },
9810 },
9811 },
9812 {
9813 name: "ADDQloadidx8",
9814 auxType: auxSymOff,
9815 argLen: 4,
9816 resultInArg0: true,
9817 clobberFlags: true,
9818 symEffect: SymRead,
9819 asm: x86.AADDQ,
9820 scale: 8,
9821 reg: regInfo{
9822 inputs: []inputInfo{
9823 {0, 49135},
9824 {2, 49151},
9825 {1, 4295032831},
9826 },
9827 outputs: []outputInfo{
9828 {0, 49135},
9829 },
9830 },
9831 },
9832 {
9833 name: "SUBLloadidx1",
9834 auxType: auxSymOff,
9835 argLen: 4,
9836 resultInArg0: true,
9837 clobberFlags: true,
9838 symEffect: SymRead,
9839 asm: x86.ASUBL,
9840 scale: 1,
9841 reg: regInfo{
9842 inputs: []inputInfo{
9843 {0, 49135},
9844 {2, 49151},
9845 {1, 4295032831},
9846 },
9847 outputs: []outputInfo{
9848 {0, 49135},
9849 },
9850 },
9851 },
9852 {
9853 name: "SUBLloadidx4",
9854 auxType: auxSymOff,
9855 argLen: 4,
9856 resultInArg0: true,
9857 clobberFlags: true,
9858 symEffect: SymRead,
9859 asm: x86.ASUBL,
9860 scale: 4,
9861 reg: regInfo{
9862 inputs: []inputInfo{
9863 {0, 49135},
9864 {2, 49151},
9865 {1, 4295032831},
9866 },
9867 outputs: []outputInfo{
9868 {0, 49135},
9869 },
9870 },
9871 },
9872 {
9873 name: "SUBLloadidx8",
9874 auxType: auxSymOff,
9875 argLen: 4,
9876 resultInArg0: true,
9877 clobberFlags: true,
9878 symEffect: SymRead,
9879 asm: x86.ASUBL,
9880 scale: 8,
9881 reg: regInfo{
9882 inputs: []inputInfo{
9883 {0, 49135},
9884 {2, 49151},
9885 {1, 4295032831},
9886 },
9887 outputs: []outputInfo{
9888 {0, 49135},
9889 },
9890 },
9891 },
9892 {
9893 name: "SUBQloadidx1",
9894 auxType: auxSymOff,
9895 argLen: 4,
9896 resultInArg0: true,
9897 clobberFlags: true,
9898 symEffect: SymRead,
9899 asm: x86.ASUBQ,
9900 scale: 1,
9901 reg: regInfo{
9902 inputs: []inputInfo{
9903 {0, 49135},
9904 {2, 49151},
9905 {1, 4295032831},
9906 },
9907 outputs: []outputInfo{
9908 {0, 49135},
9909 },
9910 },
9911 },
9912 {
9913 name: "SUBQloadidx8",
9914 auxType: auxSymOff,
9915 argLen: 4,
9916 resultInArg0: true,
9917 clobberFlags: true,
9918 symEffect: SymRead,
9919 asm: x86.ASUBQ,
9920 scale: 8,
9921 reg: regInfo{
9922 inputs: []inputInfo{
9923 {0, 49135},
9924 {2, 49151},
9925 {1, 4295032831},
9926 },
9927 outputs: []outputInfo{
9928 {0, 49135},
9929 },
9930 },
9931 },
9932 {
9933 name: "ANDLloadidx1",
9934 auxType: auxSymOff,
9935 argLen: 4,
9936 resultInArg0: true,
9937 clobberFlags: true,
9938 symEffect: SymRead,
9939 asm: x86.AANDL,
9940 scale: 1,
9941 reg: regInfo{
9942 inputs: []inputInfo{
9943 {0, 49135},
9944 {2, 49151},
9945 {1, 4295032831},
9946 },
9947 outputs: []outputInfo{
9948 {0, 49135},
9949 },
9950 },
9951 },
9952 {
9953 name: "ANDLloadidx4",
9954 auxType: auxSymOff,
9955 argLen: 4,
9956 resultInArg0: true,
9957 clobberFlags: true,
9958 symEffect: SymRead,
9959 asm: x86.AANDL,
9960 scale: 4,
9961 reg: regInfo{
9962 inputs: []inputInfo{
9963 {0, 49135},
9964 {2, 49151},
9965 {1, 4295032831},
9966 },
9967 outputs: []outputInfo{
9968 {0, 49135},
9969 },
9970 },
9971 },
9972 {
9973 name: "ANDLloadidx8",
9974 auxType: auxSymOff,
9975 argLen: 4,
9976 resultInArg0: true,
9977 clobberFlags: true,
9978 symEffect: SymRead,
9979 asm: x86.AANDL,
9980 scale: 8,
9981 reg: regInfo{
9982 inputs: []inputInfo{
9983 {0, 49135},
9984 {2, 49151},
9985 {1, 4295032831},
9986 },
9987 outputs: []outputInfo{
9988 {0, 49135},
9989 },
9990 },
9991 },
9992 {
9993 name: "ANDQloadidx1",
9994 auxType: auxSymOff,
9995 argLen: 4,
9996 resultInArg0: true,
9997 clobberFlags: true,
9998 symEffect: SymRead,
9999 asm: x86.AANDQ,
10000 scale: 1,
10001 reg: regInfo{
10002 inputs: []inputInfo{
10003 {0, 49135},
10004 {2, 49151},
10005 {1, 4295032831},
10006 },
10007 outputs: []outputInfo{
10008 {0, 49135},
10009 },
10010 },
10011 },
10012 {
10013 name: "ANDQloadidx8",
10014 auxType: auxSymOff,
10015 argLen: 4,
10016 resultInArg0: true,
10017 clobberFlags: true,
10018 symEffect: SymRead,
10019 asm: x86.AANDQ,
10020 scale: 8,
10021 reg: regInfo{
10022 inputs: []inputInfo{
10023 {0, 49135},
10024 {2, 49151},
10025 {1, 4295032831},
10026 },
10027 outputs: []outputInfo{
10028 {0, 49135},
10029 },
10030 },
10031 },
10032 {
10033 name: "ORLloadidx1",
10034 auxType: auxSymOff,
10035 argLen: 4,
10036 resultInArg0: true,
10037 clobberFlags: true,
10038 symEffect: SymRead,
10039 asm: x86.AORL,
10040 scale: 1,
10041 reg: regInfo{
10042 inputs: []inputInfo{
10043 {0, 49135},
10044 {2, 49151},
10045 {1, 4295032831},
10046 },
10047 outputs: []outputInfo{
10048 {0, 49135},
10049 },
10050 },
10051 },
10052 {
10053 name: "ORLloadidx4",
10054 auxType: auxSymOff,
10055 argLen: 4,
10056 resultInArg0: true,
10057 clobberFlags: true,
10058 symEffect: SymRead,
10059 asm: x86.AORL,
10060 scale: 4,
10061 reg: regInfo{
10062 inputs: []inputInfo{
10063 {0, 49135},
10064 {2, 49151},
10065 {1, 4295032831},
10066 },
10067 outputs: []outputInfo{
10068 {0, 49135},
10069 },
10070 },
10071 },
10072 {
10073 name: "ORLloadidx8",
10074 auxType: auxSymOff,
10075 argLen: 4,
10076 resultInArg0: true,
10077 clobberFlags: true,
10078 symEffect: SymRead,
10079 asm: x86.AORL,
10080 scale: 8,
10081 reg: regInfo{
10082 inputs: []inputInfo{
10083 {0, 49135},
10084 {2, 49151},
10085 {1, 4295032831},
10086 },
10087 outputs: []outputInfo{
10088 {0, 49135},
10089 },
10090 },
10091 },
10092 {
10093 name: "ORQloadidx1",
10094 auxType: auxSymOff,
10095 argLen: 4,
10096 resultInArg0: true,
10097 clobberFlags: true,
10098 symEffect: SymRead,
10099 asm: x86.AORQ,
10100 scale: 1,
10101 reg: regInfo{
10102 inputs: []inputInfo{
10103 {0, 49135},
10104 {2, 49151},
10105 {1, 4295032831},
10106 },
10107 outputs: []outputInfo{
10108 {0, 49135},
10109 },
10110 },
10111 },
10112 {
10113 name: "ORQloadidx8",
10114 auxType: auxSymOff,
10115 argLen: 4,
10116 resultInArg0: true,
10117 clobberFlags: true,
10118 symEffect: SymRead,
10119 asm: x86.AORQ,
10120 scale: 8,
10121 reg: regInfo{
10122 inputs: []inputInfo{
10123 {0, 49135},
10124 {2, 49151},
10125 {1, 4295032831},
10126 },
10127 outputs: []outputInfo{
10128 {0, 49135},
10129 },
10130 },
10131 },
10132 {
10133 name: "XORLloadidx1",
10134 auxType: auxSymOff,
10135 argLen: 4,
10136 resultInArg0: true,
10137 clobberFlags: true,
10138 symEffect: SymRead,
10139 asm: x86.AXORL,
10140 scale: 1,
10141 reg: regInfo{
10142 inputs: []inputInfo{
10143 {0, 49135},
10144 {2, 49151},
10145 {1, 4295032831},
10146 },
10147 outputs: []outputInfo{
10148 {0, 49135},
10149 },
10150 },
10151 },
10152 {
10153 name: "XORLloadidx4",
10154 auxType: auxSymOff,
10155 argLen: 4,
10156 resultInArg0: true,
10157 clobberFlags: true,
10158 symEffect: SymRead,
10159 asm: x86.AXORL,
10160 scale: 4,
10161 reg: regInfo{
10162 inputs: []inputInfo{
10163 {0, 49135},
10164 {2, 49151},
10165 {1, 4295032831},
10166 },
10167 outputs: []outputInfo{
10168 {0, 49135},
10169 },
10170 },
10171 },
10172 {
10173 name: "XORLloadidx8",
10174 auxType: auxSymOff,
10175 argLen: 4,
10176 resultInArg0: true,
10177 clobberFlags: true,
10178 symEffect: SymRead,
10179 asm: x86.AXORL,
10180 scale: 8,
10181 reg: regInfo{
10182 inputs: []inputInfo{
10183 {0, 49135},
10184 {2, 49151},
10185 {1, 4295032831},
10186 },
10187 outputs: []outputInfo{
10188 {0, 49135},
10189 },
10190 },
10191 },
10192 {
10193 name: "XORQloadidx1",
10194 auxType: auxSymOff,
10195 argLen: 4,
10196 resultInArg0: true,
10197 clobberFlags: true,
10198 symEffect: SymRead,
10199 asm: x86.AXORQ,
10200 scale: 1,
10201 reg: regInfo{
10202 inputs: []inputInfo{
10203 {0, 49135},
10204 {2, 49151},
10205 {1, 4295032831},
10206 },
10207 outputs: []outputInfo{
10208 {0, 49135},
10209 },
10210 },
10211 },
10212 {
10213 name: "XORQloadidx8",
10214 auxType: auxSymOff,
10215 argLen: 4,
10216 resultInArg0: true,
10217 clobberFlags: true,
10218 symEffect: SymRead,
10219 asm: x86.AXORQ,
10220 scale: 8,
10221 reg: regInfo{
10222 inputs: []inputInfo{
10223 {0, 49135},
10224 {2, 49151},
10225 {1, 4295032831},
10226 },
10227 outputs: []outputInfo{
10228 {0, 49135},
10229 },
10230 },
10231 },
10232 {
10233 name: "ADDQmodify",
10234 auxType: auxSymOff,
10235 argLen: 3,
10236 clobberFlags: true,
10237 faultOnNilArg0: true,
10238 symEffect: SymRead | SymWrite,
10239 asm: x86.AADDQ,
10240 reg: regInfo{
10241 inputs: []inputInfo{
10242 {1, 49151},
10243 {0, 4295032831},
10244 },
10245 },
10246 },
10247 {
10248 name: "SUBQmodify",
10249 auxType: auxSymOff,
10250 argLen: 3,
10251 clobberFlags: true,
10252 faultOnNilArg0: true,
10253 symEffect: SymRead | SymWrite,
10254 asm: x86.ASUBQ,
10255 reg: regInfo{
10256 inputs: []inputInfo{
10257 {1, 49151},
10258 {0, 4295032831},
10259 },
10260 },
10261 },
10262 {
10263 name: "ANDQmodify",
10264 auxType: auxSymOff,
10265 argLen: 3,
10266 clobberFlags: true,
10267 faultOnNilArg0: true,
10268 symEffect: SymRead | SymWrite,
10269 asm: x86.AANDQ,
10270 reg: regInfo{
10271 inputs: []inputInfo{
10272 {1, 49151},
10273 {0, 4295032831},
10274 },
10275 },
10276 },
10277 {
10278 name: "ORQmodify",
10279 auxType: auxSymOff,
10280 argLen: 3,
10281 clobberFlags: true,
10282 faultOnNilArg0: true,
10283 symEffect: SymRead | SymWrite,
10284 asm: x86.AORQ,
10285 reg: regInfo{
10286 inputs: []inputInfo{
10287 {1, 49151},
10288 {0, 4295032831},
10289 },
10290 },
10291 },
10292 {
10293 name: "XORQmodify",
10294 auxType: auxSymOff,
10295 argLen: 3,
10296 clobberFlags: true,
10297 faultOnNilArg0: true,
10298 symEffect: SymRead | SymWrite,
10299 asm: x86.AXORQ,
10300 reg: regInfo{
10301 inputs: []inputInfo{
10302 {1, 49151},
10303 {0, 4295032831},
10304 },
10305 },
10306 },
10307 {
10308 name: "ADDLmodify",
10309 auxType: auxSymOff,
10310 argLen: 3,
10311 clobberFlags: true,
10312 faultOnNilArg0: true,
10313 symEffect: SymRead | SymWrite,
10314 asm: x86.AADDL,
10315 reg: regInfo{
10316 inputs: []inputInfo{
10317 {1, 49151},
10318 {0, 4295032831},
10319 },
10320 },
10321 },
10322 {
10323 name: "SUBLmodify",
10324 auxType: auxSymOff,
10325 argLen: 3,
10326 clobberFlags: true,
10327 faultOnNilArg0: true,
10328 symEffect: SymRead | SymWrite,
10329 asm: x86.ASUBL,
10330 reg: regInfo{
10331 inputs: []inputInfo{
10332 {1, 49151},
10333 {0, 4295032831},
10334 },
10335 },
10336 },
10337 {
10338 name: "ANDLmodify",
10339 auxType: auxSymOff,
10340 argLen: 3,
10341 clobberFlags: true,
10342 faultOnNilArg0: true,
10343 symEffect: SymRead | SymWrite,
10344 asm: x86.AANDL,
10345 reg: regInfo{
10346 inputs: []inputInfo{
10347 {1, 49151},
10348 {0, 4295032831},
10349 },
10350 },
10351 },
10352 {
10353 name: "ORLmodify",
10354 auxType: auxSymOff,
10355 argLen: 3,
10356 clobberFlags: true,
10357 faultOnNilArg0: true,
10358 symEffect: SymRead | SymWrite,
10359 asm: x86.AORL,
10360 reg: regInfo{
10361 inputs: []inputInfo{
10362 {1, 49151},
10363 {0, 4295032831},
10364 },
10365 },
10366 },
10367 {
10368 name: "XORLmodify",
10369 auxType: auxSymOff,
10370 argLen: 3,
10371 clobberFlags: true,
10372 faultOnNilArg0: true,
10373 symEffect: SymRead | SymWrite,
10374 asm: x86.AXORL,
10375 reg: regInfo{
10376 inputs: []inputInfo{
10377 {1, 49151},
10378 {0, 4295032831},
10379 },
10380 },
10381 },
10382 {
10383 name: "ADDQmodifyidx1",
10384 auxType: auxSymOff,
10385 argLen: 4,
10386 clobberFlags: true,
10387 symEffect: SymRead | SymWrite,
10388 asm: x86.AADDQ,
10389 scale: 1,
10390 reg: regInfo{
10391 inputs: []inputInfo{
10392 {1, 49151},
10393 {2, 49151},
10394 {0, 4295032831},
10395 },
10396 },
10397 },
10398 {
10399 name: "ADDQmodifyidx8",
10400 auxType: auxSymOff,
10401 argLen: 4,
10402 clobberFlags: true,
10403 symEffect: SymRead | SymWrite,
10404 asm: x86.AADDQ,
10405 scale: 8,
10406 reg: regInfo{
10407 inputs: []inputInfo{
10408 {1, 49151},
10409 {2, 49151},
10410 {0, 4295032831},
10411 },
10412 },
10413 },
10414 {
10415 name: "SUBQmodifyidx1",
10416 auxType: auxSymOff,
10417 argLen: 4,
10418 clobberFlags: true,
10419 symEffect: SymRead | SymWrite,
10420 asm: x86.ASUBQ,
10421 scale: 1,
10422 reg: regInfo{
10423 inputs: []inputInfo{
10424 {1, 49151},
10425 {2, 49151},
10426 {0, 4295032831},
10427 },
10428 },
10429 },
10430 {
10431 name: "SUBQmodifyidx8",
10432 auxType: auxSymOff,
10433 argLen: 4,
10434 clobberFlags: true,
10435 symEffect: SymRead | SymWrite,
10436 asm: x86.ASUBQ,
10437 scale: 8,
10438 reg: regInfo{
10439 inputs: []inputInfo{
10440 {1, 49151},
10441 {2, 49151},
10442 {0, 4295032831},
10443 },
10444 },
10445 },
10446 {
10447 name: "ANDQmodifyidx1",
10448 auxType: auxSymOff,
10449 argLen: 4,
10450 clobberFlags: true,
10451 symEffect: SymRead | SymWrite,
10452 asm: x86.AANDQ,
10453 scale: 1,
10454 reg: regInfo{
10455 inputs: []inputInfo{
10456 {1, 49151},
10457 {2, 49151},
10458 {0, 4295032831},
10459 },
10460 },
10461 },
10462 {
10463 name: "ANDQmodifyidx8",
10464 auxType: auxSymOff,
10465 argLen: 4,
10466 clobberFlags: true,
10467 symEffect: SymRead | SymWrite,
10468 asm: x86.AANDQ,
10469 scale: 8,
10470 reg: regInfo{
10471 inputs: []inputInfo{
10472 {1, 49151},
10473 {2, 49151},
10474 {0, 4295032831},
10475 },
10476 },
10477 },
10478 {
10479 name: "ORQmodifyidx1",
10480 auxType: auxSymOff,
10481 argLen: 4,
10482 clobberFlags: true,
10483 symEffect: SymRead | SymWrite,
10484 asm: x86.AORQ,
10485 scale: 1,
10486 reg: regInfo{
10487 inputs: []inputInfo{
10488 {1, 49151},
10489 {2, 49151},
10490 {0, 4295032831},
10491 },
10492 },
10493 },
10494 {
10495 name: "ORQmodifyidx8",
10496 auxType: auxSymOff,
10497 argLen: 4,
10498 clobberFlags: true,
10499 symEffect: SymRead | SymWrite,
10500 asm: x86.AORQ,
10501 scale: 8,
10502 reg: regInfo{
10503 inputs: []inputInfo{
10504 {1, 49151},
10505 {2, 49151},
10506 {0, 4295032831},
10507 },
10508 },
10509 },
10510 {
10511 name: "XORQmodifyidx1",
10512 auxType: auxSymOff,
10513 argLen: 4,
10514 clobberFlags: true,
10515 symEffect: SymRead | SymWrite,
10516 asm: x86.AXORQ,
10517 scale: 1,
10518 reg: regInfo{
10519 inputs: []inputInfo{
10520 {1, 49151},
10521 {2, 49151},
10522 {0, 4295032831},
10523 },
10524 },
10525 },
10526 {
10527 name: "XORQmodifyidx8",
10528 auxType: auxSymOff,
10529 argLen: 4,
10530 clobberFlags: true,
10531 symEffect: SymRead | SymWrite,
10532 asm: x86.AXORQ,
10533 scale: 8,
10534 reg: regInfo{
10535 inputs: []inputInfo{
10536 {1, 49151},
10537 {2, 49151},
10538 {0, 4295032831},
10539 },
10540 },
10541 },
10542 {
10543 name: "ADDLmodifyidx1",
10544 auxType: auxSymOff,
10545 argLen: 4,
10546 clobberFlags: true,
10547 symEffect: SymRead | SymWrite,
10548 asm: x86.AADDL,
10549 scale: 1,
10550 reg: regInfo{
10551 inputs: []inputInfo{
10552 {1, 49151},
10553 {2, 49151},
10554 {0, 4295032831},
10555 },
10556 },
10557 },
10558 {
10559 name: "ADDLmodifyidx4",
10560 auxType: auxSymOff,
10561 argLen: 4,
10562 clobberFlags: true,
10563 symEffect: SymRead | SymWrite,
10564 asm: x86.AADDL,
10565 scale: 4,
10566 reg: regInfo{
10567 inputs: []inputInfo{
10568 {1, 49151},
10569 {2, 49151},
10570 {0, 4295032831},
10571 },
10572 },
10573 },
10574 {
10575 name: "ADDLmodifyidx8",
10576 auxType: auxSymOff,
10577 argLen: 4,
10578 clobberFlags: true,
10579 symEffect: SymRead | SymWrite,
10580 asm: x86.AADDL,
10581 scale: 8,
10582 reg: regInfo{
10583 inputs: []inputInfo{
10584 {1, 49151},
10585 {2, 49151},
10586 {0, 4295032831},
10587 },
10588 },
10589 },
10590 {
10591 name: "SUBLmodifyidx1",
10592 auxType: auxSymOff,
10593 argLen: 4,
10594 clobberFlags: true,
10595 symEffect: SymRead | SymWrite,
10596 asm: x86.ASUBL,
10597 scale: 1,
10598 reg: regInfo{
10599 inputs: []inputInfo{
10600 {1, 49151},
10601 {2, 49151},
10602 {0, 4295032831},
10603 },
10604 },
10605 },
10606 {
10607 name: "SUBLmodifyidx4",
10608 auxType: auxSymOff,
10609 argLen: 4,
10610 clobberFlags: true,
10611 symEffect: SymRead | SymWrite,
10612 asm: x86.ASUBL,
10613 scale: 4,
10614 reg: regInfo{
10615 inputs: []inputInfo{
10616 {1, 49151},
10617 {2, 49151},
10618 {0, 4295032831},
10619 },
10620 },
10621 },
10622 {
10623 name: "SUBLmodifyidx8",
10624 auxType: auxSymOff,
10625 argLen: 4,
10626 clobberFlags: true,
10627 symEffect: SymRead | SymWrite,
10628 asm: x86.ASUBL,
10629 scale: 8,
10630 reg: regInfo{
10631 inputs: []inputInfo{
10632 {1, 49151},
10633 {2, 49151},
10634 {0, 4295032831},
10635 },
10636 },
10637 },
10638 {
10639 name: "ANDLmodifyidx1",
10640 auxType: auxSymOff,
10641 argLen: 4,
10642 clobberFlags: true,
10643 symEffect: SymRead | SymWrite,
10644 asm: x86.AANDL,
10645 scale: 1,
10646 reg: regInfo{
10647 inputs: []inputInfo{
10648 {1, 49151},
10649 {2, 49151},
10650 {0, 4295032831},
10651 },
10652 },
10653 },
10654 {
10655 name: "ANDLmodifyidx4",
10656 auxType: auxSymOff,
10657 argLen: 4,
10658 clobberFlags: true,
10659 symEffect: SymRead | SymWrite,
10660 asm: x86.AANDL,
10661 scale: 4,
10662 reg: regInfo{
10663 inputs: []inputInfo{
10664 {1, 49151},
10665 {2, 49151},
10666 {0, 4295032831},
10667 },
10668 },
10669 },
10670 {
10671 name: "ANDLmodifyidx8",
10672 auxType: auxSymOff,
10673 argLen: 4,
10674 clobberFlags: true,
10675 symEffect: SymRead | SymWrite,
10676 asm: x86.AANDL,
10677 scale: 8,
10678 reg: regInfo{
10679 inputs: []inputInfo{
10680 {1, 49151},
10681 {2, 49151},
10682 {0, 4295032831},
10683 },
10684 },
10685 },
10686 {
10687 name: "ORLmodifyidx1",
10688 auxType: auxSymOff,
10689 argLen: 4,
10690 clobberFlags: true,
10691 symEffect: SymRead | SymWrite,
10692 asm: x86.AORL,
10693 scale: 1,
10694 reg: regInfo{
10695 inputs: []inputInfo{
10696 {1, 49151},
10697 {2, 49151},
10698 {0, 4295032831},
10699 },
10700 },
10701 },
10702 {
10703 name: "ORLmodifyidx4",
10704 auxType: auxSymOff,
10705 argLen: 4,
10706 clobberFlags: true,
10707 symEffect: SymRead | SymWrite,
10708 asm: x86.AORL,
10709 scale: 4,
10710 reg: regInfo{
10711 inputs: []inputInfo{
10712 {1, 49151},
10713 {2, 49151},
10714 {0, 4295032831},
10715 },
10716 },
10717 },
10718 {
10719 name: "ORLmodifyidx8",
10720 auxType: auxSymOff,
10721 argLen: 4,
10722 clobberFlags: true,
10723 symEffect: SymRead | SymWrite,
10724 asm: x86.AORL,
10725 scale: 8,
10726 reg: regInfo{
10727 inputs: []inputInfo{
10728 {1, 49151},
10729 {2, 49151},
10730 {0, 4295032831},
10731 },
10732 },
10733 },
10734 {
10735 name: "XORLmodifyidx1",
10736 auxType: auxSymOff,
10737 argLen: 4,
10738 clobberFlags: true,
10739 symEffect: SymRead | SymWrite,
10740 asm: x86.AXORL,
10741 scale: 1,
10742 reg: regInfo{
10743 inputs: []inputInfo{
10744 {1, 49151},
10745 {2, 49151},
10746 {0, 4295032831},
10747 },
10748 },
10749 },
10750 {
10751 name: "XORLmodifyidx4",
10752 auxType: auxSymOff,
10753 argLen: 4,
10754 clobberFlags: true,
10755 symEffect: SymRead | SymWrite,
10756 asm: x86.AXORL,
10757 scale: 4,
10758 reg: regInfo{
10759 inputs: []inputInfo{
10760 {1, 49151},
10761 {2, 49151},
10762 {0, 4295032831},
10763 },
10764 },
10765 },
10766 {
10767 name: "XORLmodifyidx8",
10768 auxType: auxSymOff,
10769 argLen: 4,
10770 clobberFlags: true,
10771 symEffect: SymRead | SymWrite,
10772 asm: x86.AXORL,
10773 scale: 8,
10774 reg: regInfo{
10775 inputs: []inputInfo{
10776 {1, 49151},
10777 {2, 49151},
10778 {0, 4295032831},
10779 },
10780 },
10781 },
10782 {
10783 name: "ADDQconstmodifyidx1",
10784 auxType: auxSymValAndOff,
10785 argLen: 3,
10786 clobberFlags: true,
10787 symEffect: SymRead | SymWrite,
10788 asm: x86.AADDQ,
10789 scale: 1,
10790 reg: regInfo{
10791 inputs: []inputInfo{
10792 {1, 49151},
10793 {0, 4295032831},
10794 },
10795 },
10796 },
10797 {
10798 name: "ADDQconstmodifyidx8",
10799 auxType: auxSymValAndOff,
10800 argLen: 3,
10801 clobberFlags: true,
10802 symEffect: SymRead | SymWrite,
10803 asm: x86.AADDQ,
10804 scale: 8,
10805 reg: regInfo{
10806 inputs: []inputInfo{
10807 {1, 49151},
10808 {0, 4295032831},
10809 },
10810 },
10811 },
10812 {
10813 name: "ANDQconstmodifyidx1",
10814 auxType: auxSymValAndOff,
10815 argLen: 3,
10816 clobberFlags: true,
10817 symEffect: SymRead | SymWrite,
10818 asm: x86.AANDQ,
10819 scale: 1,
10820 reg: regInfo{
10821 inputs: []inputInfo{
10822 {1, 49151},
10823 {0, 4295032831},
10824 },
10825 },
10826 },
10827 {
10828 name: "ANDQconstmodifyidx8",
10829 auxType: auxSymValAndOff,
10830 argLen: 3,
10831 clobberFlags: true,
10832 symEffect: SymRead | SymWrite,
10833 asm: x86.AANDQ,
10834 scale: 8,
10835 reg: regInfo{
10836 inputs: []inputInfo{
10837 {1, 49151},
10838 {0, 4295032831},
10839 },
10840 },
10841 },
10842 {
10843 name: "ORQconstmodifyidx1",
10844 auxType: auxSymValAndOff,
10845 argLen: 3,
10846 clobberFlags: true,
10847 symEffect: SymRead | SymWrite,
10848 asm: x86.AORQ,
10849 scale: 1,
10850 reg: regInfo{
10851 inputs: []inputInfo{
10852 {1, 49151},
10853 {0, 4295032831},
10854 },
10855 },
10856 },
10857 {
10858 name: "ORQconstmodifyidx8",
10859 auxType: auxSymValAndOff,
10860 argLen: 3,
10861 clobberFlags: true,
10862 symEffect: SymRead | SymWrite,
10863 asm: x86.AORQ,
10864 scale: 8,
10865 reg: regInfo{
10866 inputs: []inputInfo{
10867 {1, 49151},
10868 {0, 4295032831},
10869 },
10870 },
10871 },
10872 {
10873 name: "XORQconstmodifyidx1",
10874 auxType: auxSymValAndOff,
10875 argLen: 3,
10876 clobberFlags: true,
10877 symEffect: SymRead | SymWrite,
10878 asm: x86.AXORQ,
10879 scale: 1,
10880 reg: regInfo{
10881 inputs: []inputInfo{
10882 {1, 49151},
10883 {0, 4295032831},
10884 },
10885 },
10886 },
10887 {
10888 name: "XORQconstmodifyidx8",
10889 auxType: auxSymValAndOff,
10890 argLen: 3,
10891 clobberFlags: true,
10892 symEffect: SymRead | SymWrite,
10893 asm: x86.AXORQ,
10894 scale: 8,
10895 reg: regInfo{
10896 inputs: []inputInfo{
10897 {1, 49151},
10898 {0, 4295032831},
10899 },
10900 },
10901 },
10902 {
10903 name: "ADDLconstmodifyidx1",
10904 auxType: auxSymValAndOff,
10905 argLen: 3,
10906 clobberFlags: true,
10907 symEffect: SymRead | SymWrite,
10908 asm: x86.AADDL,
10909 scale: 1,
10910 reg: regInfo{
10911 inputs: []inputInfo{
10912 {1, 49151},
10913 {0, 4295032831},
10914 },
10915 },
10916 },
10917 {
10918 name: "ADDLconstmodifyidx4",
10919 auxType: auxSymValAndOff,
10920 argLen: 3,
10921 clobberFlags: true,
10922 symEffect: SymRead | SymWrite,
10923 asm: x86.AADDL,
10924 scale: 4,
10925 reg: regInfo{
10926 inputs: []inputInfo{
10927 {1, 49151},
10928 {0, 4295032831},
10929 },
10930 },
10931 },
10932 {
10933 name: "ADDLconstmodifyidx8",
10934 auxType: auxSymValAndOff,
10935 argLen: 3,
10936 clobberFlags: true,
10937 symEffect: SymRead | SymWrite,
10938 asm: x86.AADDL,
10939 scale: 8,
10940 reg: regInfo{
10941 inputs: []inputInfo{
10942 {1, 49151},
10943 {0, 4295032831},
10944 },
10945 },
10946 },
10947 {
10948 name: "ANDLconstmodifyidx1",
10949 auxType: auxSymValAndOff,
10950 argLen: 3,
10951 clobberFlags: true,
10952 symEffect: SymRead | SymWrite,
10953 asm: x86.AANDL,
10954 scale: 1,
10955 reg: regInfo{
10956 inputs: []inputInfo{
10957 {1, 49151},
10958 {0, 4295032831},
10959 },
10960 },
10961 },
10962 {
10963 name: "ANDLconstmodifyidx4",
10964 auxType: auxSymValAndOff,
10965 argLen: 3,
10966 clobberFlags: true,
10967 symEffect: SymRead | SymWrite,
10968 asm: x86.AANDL,
10969 scale: 4,
10970 reg: regInfo{
10971 inputs: []inputInfo{
10972 {1, 49151},
10973 {0, 4295032831},
10974 },
10975 },
10976 },
10977 {
10978 name: "ANDLconstmodifyidx8",
10979 auxType: auxSymValAndOff,
10980 argLen: 3,
10981 clobberFlags: true,
10982 symEffect: SymRead | SymWrite,
10983 asm: x86.AANDL,
10984 scale: 8,
10985 reg: regInfo{
10986 inputs: []inputInfo{
10987 {1, 49151},
10988 {0, 4295032831},
10989 },
10990 },
10991 },
10992 {
10993 name: "ORLconstmodifyidx1",
10994 auxType: auxSymValAndOff,
10995 argLen: 3,
10996 clobberFlags: true,
10997 symEffect: SymRead | SymWrite,
10998 asm: x86.AORL,
10999 scale: 1,
11000 reg: regInfo{
11001 inputs: []inputInfo{
11002 {1, 49151},
11003 {0, 4295032831},
11004 },
11005 },
11006 },
11007 {
11008 name: "ORLconstmodifyidx4",
11009 auxType: auxSymValAndOff,
11010 argLen: 3,
11011 clobberFlags: true,
11012 symEffect: SymRead | SymWrite,
11013 asm: x86.AORL,
11014 scale: 4,
11015 reg: regInfo{
11016 inputs: []inputInfo{
11017 {1, 49151},
11018 {0, 4295032831},
11019 },
11020 },
11021 },
11022 {
11023 name: "ORLconstmodifyidx8",
11024 auxType: auxSymValAndOff,
11025 argLen: 3,
11026 clobberFlags: true,
11027 symEffect: SymRead | SymWrite,
11028 asm: x86.AORL,
11029 scale: 8,
11030 reg: regInfo{
11031 inputs: []inputInfo{
11032 {1, 49151},
11033 {0, 4295032831},
11034 },
11035 },
11036 },
11037 {
11038 name: "XORLconstmodifyidx1",
11039 auxType: auxSymValAndOff,
11040 argLen: 3,
11041 clobberFlags: true,
11042 symEffect: SymRead | SymWrite,
11043 asm: x86.AXORL,
11044 scale: 1,
11045 reg: regInfo{
11046 inputs: []inputInfo{
11047 {1, 49151},
11048 {0, 4295032831},
11049 },
11050 },
11051 },
11052 {
11053 name: "XORLconstmodifyidx4",
11054 auxType: auxSymValAndOff,
11055 argLen: 3,
11056 clobberFlags: true,
11057 symEffect: SymRead | SymWrite,
11058 asm: x86.AXORL,
11059 scale: 4,
11060 reg: regInfo{
11061 inputs: []inputInfo{
11062 {1, 49151},
11063 {0, 4295032831},
11064 },
11065 },
11066 },
11067 {
11068 name: "XORLconstmodifyidx8",
11069 auxType: auxSymValAndOff,
11070 argLen: 3,
11071 clobberFlags: true,
11072 symEffect: SymRead | SymWrite,
11073 asm: x86.AXORL,
11074 scale: 8,
11075 reg: regInfo{
11076 inputs: []inputInfo{
11077 {1, 49151},
11078 {0, 4295032831},
11079 },
11080 },
11081 },
11082 {
11083 name: "NEGQ",
11084 argLen: 1,
11085 resultInArg0: true,
11086 clobberFlags: true,
11087 asm: x86.ANEGQ,
11088 reg: regInfo{
11089 inputs: []inputInfo{
11090 {0, 49135},
11091 },
11092 outputs: []outputInfo{
11093 {0, 49135},
11094 },
11095 },
11096 },
11097 {
11098 name: "NEGL",
11099 argLen: 1,
11100 resultInArg0: true,
11101 clobberFlags: true,
11102 asm: x86.ANEGL,
11103 reg: regInfo{
11104 inputs: []inputInfo{
11105 {0, 49135},
11106 },
11107 outputs: []outputInfo{
11108 {0, 49135},
11109 },
11110 },
11111 },
11112 {
11113 name: "NOTQ",
11114 argLen: 1,
11115 resultInArg0: true,
11116 asm: x86.ANOTQ,
11117 reg: regInfo{
11118 inputs: []inputInfo{
11119 {0, 49135},
11120 },
11121 outputs: []outputInfo{
11122 {0, 49135},
11123 },
11124 },
11125 },
11126 {
11127 name: "NOTL",
11128 argLen: 1,
11129 resultInArg0: true,
11130 asm: x86.ANOTL,
11131 reg: regInfo{
11132 inputs: []inputInfo{
11133 {0, 49135},
11134 },
11135 outputs: []outputInfo{
11136 {0, 49135},
11137 },
11138 },
11139 },
11140 {
11141 name: "BSFQ",
11142 argLen: 1,
11143 asm: x86.ABSFQ,
11144 reg: regInfo{
11145 inputs: []inputInfo{
11146 {0, 49135},
11147 },
11148 outputs: []outputInfo{
11149 {1, 0},
11150 {0, 49135},
11151 },
11152 },
11153 },
11154 {
11155 name: "BSFL",
11156 argLen: 1,
11157 clobberFlags: true,
11158 asm: x86.ABSFL,
11159 reg: regInfo{
11160 inputs: []inputInfo{
11161 {0, 49135},
11162 },
11163 outputs: []outputInfo{
11164 {0, 49135},
11165 },
11166 },
11167 },
11168 {
11169 name: "BSRQ",
11170 argLen: 1,
11171 asm: x86.ABSRQ,
11172 reg: regInfo{
11173 inputs: []inputInfo{
11174 {0, 49135},
11175 },
11176 outputs: []outputInfo{
11177 {1, 0},
11178 {0, 49135},
11179 },
11180 },
11181 },
11182 {
11183 name: "BSRL",
11184 argLen: 1,
11185 clobberFlags: true,
11186 asm: x86.ABSRL,
11187 reg: regInfo{
11188 inputs: []inputInfo{
11189 {0, 49135},
11190 },
11191 outputs: []outputInfo{
11192 {0, 49135},
11193 },
11194 },
11195 },
11196 {
11197 name: "CMOVQEQ",
11198 argLen: 3,
11199 resultInArg0: true,
11200 asm: x86.ACMOVQEQ,
11201 reg: regInfo{
11202 inputs: []inputInfo{
11203 {0, 49135},
11204 {1, 49135},
11205 },
11206 outputs: []outputInfo{
11207 {0, 49135},
11208 },
11209 },
11210 },
11211 {
11212 name: "CMOVQNE",
11213 argLen: 3,
11214 resultInArg0: true,
11215 asm: x86.ACMOVQNE,
11216 reg: regInfo{
11217 inputs: []inputInfo{
11218 {0, 49135},
11219 {1, 49135},
11220 },
11221 outputs: []outputInfo{
11222 {0, 49135},
11223 },
11224 },
11225 },
11226 {
11227 name: "CMOVQLT",
11228 argLen: 3,
11229 resultInArg0: true,
11230 asm: x86.ACMOVQLT,
11231 reg: regInfo{
11232 inputs: []inputInfo{
11233 {0, 49135},
11234 {1, 49135},
11235 },
11236 outputs: []outputInfo{
11237 {0, 49135},
11238 },
11239 },
11240 },
11241 {
11242 name: "CMOVQGT",
11243 argLen: 3,
11244 resultInArg0: true,
11245 asm: x86.ACMOVQGT,
11246 reg: regInfo{
11247 inputs: []inputInfo{
11248 {0, 49135},
11249 {1, 49135},
11250 },
11251 outputs: []outputInfo{
11252 {0, 49135},
11253 },
11254 },
11255 },
11256 {
11257 name: "CMOVQLE",
11258 argLen: 3,
11259 resultInArg0: true,
11260 asm: x86.ACMOVQLE,
11261 reg: regInfo{
11262 inputs: []inputInfo{
11263 {0, 49135},
11264 {1, 49135},
11265 },
11266 outputs: []outputInfo{
11267 {0, 49135},
11268 },
11269 },
11270 },
11271 {
11272 name: "CMOVQGE",
11273 argLen: 3,
11274 resultInArg0: true,
11275 asm: x86.ACMOVQGE,
11276 reg: regInfo{
11277 inputs: []inputInfo{
11278 {0, 49135},
11279 {1, 49135},
11280 },
11281 outputs: []outputInfo{
11282 {0, 49135},
11283 },
11284 },
11285 },
11286 {
11287 name: "CMOVQLS",
11288 argLen: 3,
11289 resultInArg0: true,
11290 asm: x86.ACMOVQLS,
11291 reg: regInfo{
11292 inputs: []inputInfo{
11293 {0, 49135},
11294 {1, 49135},
11295 },
11296 outputs: []outputInfo{
11297 {0, 49135},
11298 },
11299 },
11300 },
11301 {
11302 name: "CMOVQHI",
11303 argLen: 3,
11304 resultInArg0: true,
11305 asm: x86.ACMOVQHI,
11306 reg: regInfo{
11307 inputs: []inputInfo{
11308 {0, 49135},
11309 {1, 49135},
11310 },
11311 outputs: []outputInfo{
11312 {0, 49135},
11313 },
11314 },
11315 },
11316 {
11317 name: "CMOVQCC",
11318 argLen: 3,
11319 resultInArg0: true,
11320 asm: x86.ACMOVQCC,
11321 reg: regInfo{
11322 inputs: []inputInfo{
11323 {0, 49135},
11324 {1, 49135},
11325 },
11326 outputs: []outputInfo{
11327 {0, 49135},
11328 },
11329 },
11330 },
11331 {
11332 name: "CMOVQCS",
11333 argLen: 3,
11334 resultInArg0: true,
11335 asm: x86.ACMOVQCS,
11336 reg: regInfo{
11337 inputs: []inputInfo{
11338 {0, 49135},
11339 {1, 49135},
11340 },
11341 outputs: []outputInfo{
11342 {0, 49135},
11343 },
11344 },
11345 },
11346 {
11347 name: "CMOVLEQ",
11348 argLen: 3,
11349 resultInArg0: true,
11350 asm: x86.ACMOVLEQ,
11351 reg: regInfo{
11352 inputs: []inputInfo{
11353 {0, 49135},
11354 {1, 49135},
11355 },
11356 outputs: []outputInfo{
11357 {0, 49135},
11358 },
11359 },
11360 },
11361 {
11362 name: "CMOVLNE",
11363 argLen: 3,
11364 resultInArg0: true,
11365 asm: x86.ACMOVLNE,
11366 reg: regInfo{
11367 inputs: []inputInfo{
11368 {0, 49135},
11369 {1, 49135},
11370 },
11371 outputs: []outputInfo{
11372 {0, 49135},
11373 },
11374 },
11375 },
11376 {
11377 name: "CMOVLLT",
11378 argLen: 3,
11379 resultInArg0: true,
11380 asm: x86.ACMOVLLT,
11381 reg: regInfo{
11382 inputs: []inputInfo{
11383 {0, 49135},
11384 {1, 49135},
11385 },
11386 outputs: []outputInfo{
11387 {0, 49135},
11388 },
11389 },
11390 },
11391 {
11392 name: "CMOVLGT",
11393 argLen: 3,
11394 resultInArg0: true,
11395 asm: x86.ACMOVLGT,
11396 reg: regInfo{
11397 inputs: []inputInfo{
11398 {0, 49135},
11399 {1, 49135},
11400 },
11401 outputs: []outputInfo{
11402 {0, 49135},
11403 },
11404 },
11405 },
11406 {
11407 name: "CMOVLLE",
11408 argLen: 3,
11409 resultInArg0: true,
11410 asm: x86.ACMOVLLE,
11411 reg: regInfo{
11412 inputs: []inputInfo{
11413 {0, 49135},
11414 {1, 49135},
11415 },
11416 outputs: []outputInfo{
11417 {0, 49135},
11418 },
11419 },
11420 },
11421 {
11422 name: "CMOVLGE",
11423 argLen: 3,
11424 resultInArg0: true,
11425 asm: x86.ACMOVLGE,
11426 reg: regInfo{
11427 inputs: []inputInfo{
11428 {0, 49135},
11429 {1, 49135},
11430 },
11431 outputs: []outputInfo{
11432 {0, 49135},
11433 },
11434 },
11435 },
11436 {
11437 name: "CMOVLLS",
11438 argLen: 3,
11439 resultInArg0: true,
11440 asm: x86.ACMOVLLS,
11441 reg: regInfo{
11442 inputs: []inputInfo{
11443 {0, 49135},
11444 {1, 49135},
11445 },
11446 outputs: []outputInfo{
11447 {0, 49135},
11448 },
11449 },
11450 },
11451 {
11452 name: "CMOVLHI",
11453 argLen: 3,
11454 resultInArg0: true,
11455 asm: x86.ACMOVLHI,
11456 reg: regInfo{
11457 inputs: []inputInfo{
11458 {0, 49135},
11459 {1, 49135},
11460 },
11461 outputs: []outputInfo{
11462 {0, 49135},
11463 },
11464 },
11465 },
11466 {
11467 name: "CMOVLCC",
11468 argLen: 3,
11469 resultInArg0: true,
11470 asm: x86.ACMOVLCC,
11471 reg: regInfo{
11472 inputs: []inputInfo{
11473 {0, 49135},
11474 {1, 49135},
11475 },
11476 outputs: []outputInfo{
11477 {0, 49135},
11478 },
11479 },
11480 },
11481 {
11482 name: "CMOVLCS",
11483 argLen: 3,
11484 resultInArg0: true,
11485 asm: x86.ACMOVLCS,
11486 reg: regInfo{
11487 inputs: []inputInfo{
11488 {0, 49135},
11489 {1, 49135},
11490 },
11491 outputs: []outputInfo{
11492 {0, 49135},
11493 },
11494 },
11495 },
11496 {
11497 name: "CMOVWEQ",
11498 argLen: 3,
11499 resultInArg0: true,
11500 asm: x86.ACMOVWEQ,
11501 reg: regInfo{
11502 inputs: []inputInfo{
11503 {0, 49135},
11504 {1, 49135},
11505 },
11506 outputs: []outputInfo{
11507 {0, 49135},
11508 },
11509 },
11510 },
11511 {
11512 name: "CMOVWNE",
11513 argLen: 3,
11514 resultInArg0: true,
11515 asm: x86.ACMOVWNE,
11516 reg: regInfo{
11517 inputs: []inputInfo{
11518 {0, 49135},
11519 {1, 49135},
11520 },
11521 outputs: []outputInfo{
11522 {0, 49135},
11523 },
11524 },
11525 },
11526 {
11527 name: "CMOVWLT",
11528 argLen: 3,
11529 resultInArg0: true,
11530 asm: x86.ACMOVWLT,
11531 reg: regInfo{
11532 inputs: []inputInfo{
11533 {0, 49135},
11534 {1, 49135},
11535 },
11536 outputs: []outputInfo{
11537 {0, 49135},
11538 },
11539 },
11540 },
11541 {
11542 name: "CMOVWGT",
11543 argLen: 3,
11544 resultInArg0: true,
11545 asm: x86.ACMOVWGT,
11546 reg: regInfo{
11547 inputs: []inputInfo{
11548 {0, 49135},
11549 {1, 49135},
11550 },
11551 outputs: []outputInfo{
11552 {0, 49135},
11553 },
11554 },
11555 },
11556 {
11557 name: "CMOVWLE",
11558 argLen: 3,
11559 resultInArg0: true,
11560 asm: x86.ACMOVWLE,
11561 reg: regInfo{
11562 inputs: []inputInfo{
11563 {0, 49135},
11564 {1, 49135},
11565 },
11566 outputs: []outputInfo{
11567 {0, 49135},
11568 },
11569 },
11570 },
11571 {
11572 name: "CMOVWGE",
11573 argLen: 3,
11574 resultInArg0: true,
11575 asm: x86.ACMOVWGE,
11576 reg: regInfo{
11577 inputs: []inputInfo{
11578 {0, 49135},
11579 {1, 49135},
11580 },
11581 outputs: []outputInfo{
11582 {0, 49135},
11583 },
11584 },
11585 },
11586 {
11587 name: "CMOVWLS",
11588 argLen: 3,
11589 resultInArg0: true,
11590 asm: x86.ACMOVWLS,
11591 reg: regInfo{
11592 inputs: []inputInfo{
11593 {0, 49135},
11594 {1, 49135},
11595 },
11596 outputs: []outputInfo{
11597 {0, 49135},
11598 },
11599 },
11600 },
11601 {
11602 name: "CMOVWHI",
11603 argLen: 3,
11604 resultInArg0: true,
11605 asm: x86.ACMOVWHI,
11606 reg: regInfo{
11607 inputs: []inputInfo{
11608 {0, 49135},
11609 {1, 49135},
11610 },
11611 outputs: []outputInfo{
11612 {0, 49135},
11613 },
11614 },
11615 },
11616 {
11617 name: "CMOVWCC",
11618 argLen: 3,
11619 resultInArg0: true,
11620 asm: x86.ACMOVWCC,
11621 reg: regInfo{
11622 inputs: []inputInfo{
11623 {0, 49135},
11624 {1, 49135},
11625 },
11626 outputs: []outputInfo{
11627 {0, 49135},
11628 },
11629 },
11630 },
11631 {
11632 name: "CMOVWCS",
11633 argLen: 3,
11634 resultInArg0: true,
11635 asm: x86.ACMOVWCS,
11636 reg: regInfo{
11637 inputs: []inputInfo{
11638 {0, 49135},
11639 {1, 49135},
11640 },
11641 outputs: []outputInfo{
11642 {0, 49135},
11643 },
11644 },
11645 },
11646 {
11647 name: "CMOVQEQF",
11648 argLen: 3,
11649 resultInArg0: true,
11650 needIntTemp: true,
11651 asm: x86.ACMOVQNE,
11652 reg: regInfo{
11653 inputs: []inputInfo{
11654 {0, 49135},
11655 {1, 49135},
11656 },
11657 outputs: []outputInfo{
11658 {0, 49135},
11659 },
11660 },
11661 },
11662 {
11663 name: "CMOVQNEF",
11664 argLen: 3,
11665 resultInArg0: true,
11666 asm: x86.ACMOVQNE,
11667 reg: regInfo{
11668 inputs: []inputInfo{
11669 {0, 49135},
11670 {1, 49135},
11671 },
11672 outputs: []outputInfo{
11673 {0, 49135},
11674 },
11675 },
11676 },
11677 {
11678 name: "CMOVQGTF",
11679 argLen: 3,
11680 resultInArg0: true,
11681 asm: x86.ACMOVQHI,
11682 reg: regInfo{
11683 inputs: []inputInfo{
11684 {0, 49135},
11685 {1, 49135},
11686 },
11687 outputs: []outputInfo{
11688 {0, 49135},
11689 },
11690 },
11691 },
11692 {
11693 name: "CMOVQGEF",
11694 argLen: 3,
11695 resultInArg0: true,
11696 asm: x86.ACMOVQCC,
11697 reg: regInfo{
11698 inputs: []inputInfo{
11699 {0, 49135},
11700 {1, 49135},
11701 },
11702 outputs: []outputInfo{
11703 {0, 49135},
11704 },
11705 },
11706 },
11707 {
11708 name: "CMOVLEQF",
11709 argLen: 3,
11710 resultInArg0: true,
11711 needIntTemp: true,
11712 asm: x86.ACMOVLNE,
11713 reg: regInfo{
11714 inputs: []inputInfo{
11715 {0, 49135},
11716 {1, 49135},
11717 },
11718 outputs: []outputInfo{
11719 {0, 49135},
11720 },
11721 },
11722 },
11723 {
11724 name: "CMOVLNEF",
11725 argLen: 3,
11726 resultInArg0: true,
11727 asm: x86.ACMOVLNE,
11728 reg: regInfo{
11729 inputs: []inputInfo{
11730 {0, 49135},
11731 {1, 49135},
11732 },
11733 outputs: []outputInfo{
11734 {0, 49135},
11735 },
11736 },
11737 },
11738 {
11739 name: "CMOVLGTF",
11740 argLen: 3,
11741 resultInArg0: true,
11742 asm: x86.ACMOVLHI,
11743 reg: regInfo{
11744 inputs: []inputInfo{
11745 {0, 49135},
11746 {1, 49135},
11747 },
11748 outputs: []outputInfo{
11749 {0, 49135},
11750 },
11751 },
11752 },
11753 {
11754 name: "CMOVLGEF",
11755 argLen: 3,
11756 resultInArg0: true,
11757 asm: x86.ACMOVLCC,
11758 reg: regInfo{
11759 inputs: []inputInfo{
11760 {0, 49135},
11761 {1, 49135},
11762 },
11763 outputs: []outputInfo{
11764 {0, 49135},
11765 },
11766 },
11767 },
11768 {
11769 name: "CMOVWEQF",
11770 argLen: 3,
11771 resultInArg0: true,
11772 needIntTemp: true,
11773 asm: x86.ACMOVWNE,
11774 reg: regInfo{
11775 inputs: []inputInfo{
11776 {0, 49135},
11777 {1, 49135},
11778 },
11779 outputs: []outputInfo{
11780 {0, 49135},
11781 },
11782 },
11783 },
11784 {
11785 name: "CMOVWNEF",
11786 argLen: 3,
11787 resultInArg0: true,
11788 asm: x86.ACMOVWNE,
11789 reg: regInfo{
11790 inputs: []inputInfo{
11791 {0, 49135},
11792 {1, 49135},
11793 },
11794 outputs: []outputInfo{
11795 {0, 49135},
11796 },
11797 },
11798 },
11799 {
11800 name: "CMOVWGTF",
11801 argLen: 3,
11802 resultInArg0: true,
11803 asm: x86.ACMOVWHI,
11804 reg: regInfo{
11805 inputs: []inputInfo{
11806 {0, 49135},
11807 {1, 49135},
11808 },
11809 outputs: []outputInfo{
11810 {0, 49135},
11811 },
11812 },
11813 },
11814 {
11815 name: "CMOVWGEF",
11816 argLen: 3,
11817 resultInArg0: true,
11818 asm: x86.ACMOVWCC,
11819 reg: regInfo{
11820 inputs: []inputInfo{
11821 {0, 49135},
11822 {1, 49135},
11823 },
11824 outputs: []outputInfo{
11825 {0, 49135},
11826 },
11827 },
11828 },
11829 {
11830 name: "BSWAPQ",
11831 argLen: 1,
11832 resultInArg0: true,
11833 asm: x86.ABSWAPQ,
11834 reg: regInfo{
11835 inputs: []inputInfo{
11836 {0, 49135},
11837 },
11838 outputs: []outputInfo{
11839 {0, 49135},
11840 },
11841 },
11842 },
11843 {
11844 name: "BSWAPL",
11845 argLen: 1,
11846 resultInArg0: true,
11847 asm: x86.ABSWAPL,
11848 reg: regInfo{
11849 inputs: []inputInfo{
11850 {0, 49135},
11851 },
11852 outputs: []outputInfo{
11853 {0, 49135},
11854 },
11855 },
11856 },
11857 {
11858 name: "POPCNTQ",
11859 argLen: 1,
11860 clobberFlags: true,
11861 asm: x86.APOPCNTQ,
11862 reg: regInfo{
11863 inputs: []inputInfo{
11864 {0, 49135},
11865 },
11866 outputs: []outputInfo{
11867 {0, 49135},
11868 },
11869 },
11870 },
11871 {
11872 name: "POPCNTL",
11873 argLen: 1,
11874 clobberFlags: true,
11875 asm: x86.APOPCNTL,
11876 reg: regInfo{
11877 inputs: []inputInfo{
11878 {0, 49135},
11879 },
11880 outputs: []outputInfo{
11881 {0, 49135},
11882 },
11883 },
11884 },
11885 {
11886 name: "SQRTSD",
11887 argLen: 1,
11888 asm: x86.ASQRTSD,
11889 reg: regInfo{
11890 inputs: []inputInfo{
11891 {0, 2147418112},
11892 },
11893 outputs: []outputInfo{
11894 {0, 2147418112},
11895 },
11896 },
11897 },
11898 {
11899 name: "SQRTSS",
11900 argLen: 1,
11901 asm: x86.ASQRTSS,
11902 reg: regInfo{
11903 inputs: []inputInfo{
11904 {0, 2147418112},
11905 },
11906 outputs: []outputInfo{
11907 {0, 2147418112},
11908 },
11909 },
11910 },
11911 {
11912 name: "ROUNDSD",
11913 auxType: auxInt8,
11914 argLen: 1,
11915 asm: x86.AROUNDSD,
11916 reg: regInfo{
11917 inputs: []inputInfo{
11918 {0, 2147418112},
11919 },
11920 outputs: []outputInfo{
11921 {0, 2147418112},
11922 },
11923 },
11924 },
11925 {
11926 name: "VFMADD231SD",
11927 argLen: 3,
11928 resultInArg0: true,
11929 asm: x86.AVFMADD231SD,
11930 reg: regInfo{
11931 inputs: []inputInfo{
11932 {0, 2147418112},
11933 {1, 2147418112},
11934 {2, 2147418112},
11935 },
11936 outputs: []outputInfo{
11937 {0, 2147418112},
11938 },
11939 },
11940 },
11941 {
11942 name: "MINSD",
11943 argLen: 2,
11944 resultInArg0: true,
11945 asm: x86.AMINSD,
11946 reg: regInfo{
11947 inputs: []inputInfo{
11948 {0, 2147418112},
11949 {1, 2147418112},
11950 },
11951 outputs: []outputInfo{
11952 {0, 2147418112},
11953 },
11954 },
11955 },
11956 {
11957 name: "MINSS",
11958 argLen: 2,
11959 resultInArg0: true,
11960 asm: x86.AMINSS,
11961 reg: regInfo{
11962 inputs: []inputInfo{
11963 {0, 2147418112},
11964 {1, 2147418112},
11965 },
11966 outputs: []outputInfo{
11967 {0, 2147418112},
11968 },
11969 },
11970 },
11971 {
11972 name: "SBBQcarrymask",
11973 argLen: 1,
11974 asm: x86.ASBBQ,
11975 reg: regInfo{
11976 outputs: []outputInfo{
11977 {0, 49135},
11978 },
11979 },
11980 },
11981 {
11982 name: "SBBLcarrymask",
11983 argLen: 1,
11984 asm: x86.ASBBL,
11985 reg: regInfo{
11986 outputs: []outputInfo{
11987 {0, 49135},
11988 },
11989 },
11990 },
11991 {
11992 name: "SETEQ",
11993 argLen: 1,
11994 asm: x86.ASETEQ,
11995 reg: regInfo{
11996 outputs: []outputInfo{
11997 {0, 49135},
11998 },
11999 },
12000 },
12001 {
12002 name: "SETNE",
12003 argLen: 1,
12004 asm: x86.ASETNE,
12005 reg: regInfo{
12006 outputs: []outputInfo{
12007 {0, 49135},
12008 },
12009 },
12010 },
12011 {
12012 name: "SETL",
12013 argLen: 1,
12014 asm: x86.ASETLT,
12015 reg: regInfo{
12016 outputs: []outputInfo{
12017 {0, 49135},
12018 },
12019 },
12020 },
12021 {
12022 name: "SETLE",
12023 argLen: 1,
12024 asm: x86.ASETLE,
12025 reg: regInfo{
12026 outputs: []outputInfo{
12027 {0, 49135},
12028 },
12029 },
12030 },
12031 {
12032 name: "SETG",
12033 argLen: 1,
12034 asm: x86.ASETGT,
12035 reg: regInfo{
12036 outputs: []outputInfo{
12037 {0, 49135},
12038 },
12039 },
12040 },
12041 {
12042 name: "SETGE",
12043 argLen: 1,
12044 asm: x86.ASETGE,
12045 reg: regInfo{
12046 outputs: []outputInfo{
12047 {0, 49135},
12048 },
12049 },
12050 },
12051 {
12052 name: "SETB",
12053 argLen: 1,
12054 asm: x86.ASETCS,
12055 reg: regInfo{
12056 outputs: []outputInfo{
12057 {0, 49135},
12058 },
12059 },
12060 },
12061 {
12062 name: "SETBE",
12063 argLen: 1,
12064 asm: x86.ASETLS,
12065 reg: regInfo{
12066 outputs: []outputInfo{
12067 {0, 49135},
12068 },
12069 },
12070 },
12071 {
12072 name: "SETA",
12073 argLen: 1,
12074 asm: x86.ASETHI,
12075 reg: regInfo{
12076 outputs: []outputInfo{
12077 {0, 49135},
12078 },
12079 },
12080 },
12081 {
12082 name: "SETAE",
12083 argLen: 1,
12084 asm: x86.ASETCC,
12085 reg: regInfo{
12086 outputs: []outputInfo{
12087 {0, 49135},
12088 },
12089 },
12090 },
12091 {
12092 name: "SETO",
12093 argLen: 1,
12094 asm: x86.ASETOS,
12095 reg: regInfo{
12096 outputs: []outputInfo{
12097 {0, 49135},
12098 },
12099 },
12100 },
12101 {
12102 name: "SETEQstore",
12103 auxType: auxSymOff,
12104 argLen: 3,
12105 faultOnNilArg0: true,
12106 symEffect: SymWrite,
12107 asm: x86.ASETEQ,
12108 reg: regInfo{
12109 inputs: []inputInfo{
12110 {0, 4295032831},
12111 },
12112 },
12113 },
12114 {
12115 name: "SETNEstore",
12116 auxType: auxSymOff,
12117 argLen: 3,
12118 faultOnNilArg0: true,
12119 symEffect: SymWrite,
12120 asm: x86.ASETNE,
12121 reg: regInfo{
12122 inputs: []inputInfo{
12123 {0, 4295032831},
12124 },
12125 },
12126 },
12127 {
12128 name: "SETLstore",
12129 auxType: auxSymOff,
12130 argLen: 3,
12131 faultOnNilArg0: true,
12132 symEffect: SymWrite,
12133 asm: x86.ASETLT,
12134 reg: regInfo{
12135 inputs: []inputInfo{
12136 {0, 4295032831},
12137 },
12138 },
12139 },
12140 {
12141 name: "SETLEstore",
12142 auxType: auxSymOff,
12143 argLen: 3,
12144 faultOnNilArg0: true,
12145 symEffect: SymWrite,
12146 asm: x86.ASETLE,
12147 reg: regInfo{
12148 inputs: []inputInfo{
12149 {0, 4295032831},
12150 },
12151 },
12152 },
12153 {
12154 name: "SETGstore",
12155 auxType: auxSymOff,
12156 argLen: 3,
12157 faultOnNilArg0: true,
12158 symEffect: SymWrite,
12159 asm: x86.ASETGT,
12160 reg: regInfo{
12161 inputs: []inputInfo{
12162 {0, 4295032831},
12163 },
12164 },
12165 },
12166 {
12167 name: "SETGEstore",
12168 auxType: auxSymOff,
12169 argLen: 3,
12170 faultOnNilArg0: true,
12171 symEffect: SymWrite,
12172 asm: x86.ASETGE,
12173 reg: regInfo{
12174 inputs: []inputInfo{
12175 {0, 4295032831},
12176 },
12177 },
12178 },
12179 {
12180 name: "SETBstore",
12181 auxType: auxSymOff,
12182 argLen: 3,
12183 faultOnNilArg0: true,
12184 symEffect: SymWrite,
12185 asm: x86.ASETCS,
12186 reg: regInfo{
12187 inputs: []inputInfo{
12188 {0, 4295032831},
12189 },
12190 },
12191 },
12192 {
12193 name: "SETBEstore",
12194 auxType: auxSymOff,
12195 argLen: 3,
12196 faultOnNilArg0: true,
12197 symEffect: SymWrite,
12198 asm: x86.ASETLS,
12199 reg: regInfo{
12200 inputs: []inputInfo{
12201 {0, 4295032831},
12202 },
12203 },
12204 },
12205 {
12206 name: "SETAstore",
12207 auxType: auxSymOff,
12208 argLen: 3,
12209 faultOnNilArg0: true,
12210 symEffect: SymWrite,
12211 asm: x86.ASETHI,
12212 reg: regInfo{
12213 inputs: []inputInfo{
12214 {0, 4295032831},
12215 },
12216 },
12217 },
12218 {
12219 name: "SETAEstore",
12220 auxType: auxSymOff,
12221 argLen: 3,
12222 faultOnNilArg0: true,
12223 symEffect: SymWrite,
12224 asm: x86.ASETCC,
12225 reg: regInfo{
12226 inputs: []inputInfo{
12227 {0, 4295032831},
12228 },
12229 },
12230 },
12231 {
12232 name: "SETEQstoreidx1",
12233 auxType: auxSymOff,
12234 argLen: 4,
12235 commutative: true,
12236 symEffect: SymWrite,
12237 asm: x86.ASETEQ,
12238 scale: 1,
12239 reg: regInfo{
12240 inputs: []inputInfo{
12241 {1, 49151},
12242 {0, 4295032831},
12243 },
12244 },
12245 },
12246 {
12247 name: "SETNEstoreidx1",
12248 auxType: auxSymOff,
12249 argLen: 4,
12250 commutative: true,
12251 symEffect: SymWrite,
12252 asm: x86.ASETNE,
12253 scale: 1,
12254 reg: regInfo{
12255 inputs: []inputInfo{
12256 {1, 49151},
12257 {0, 4295032831},
12258 },
12259 },
12260 },
12261 {
12262 name: "SETLstoreidx1",
12263 auxType: auxSymOff,
12264 argLen: 4,
12265 commutative: true,
12266 symEffect: SymWrite,
12267 asm: x86.ASETLT,
12268 scale: 1,
12269 reg: regInfo{
12270 inputs: []inputInfo{
12271 {1, 49151},
12272 {0, 4295032831},
12273 },
12274 },
12275 },
12276 {
12277 name: "SETLEstoreidx1",
12278 auxType: auxSymOff,
12279 argLen: 4,
12280 commutative: true,
12281 symEffect: SymWrite,
12282 asm: x86.ASETLE,
12283 scale: 1,
12284 reg: regInfo{
12285 inputs: []inputInfo{
12286 {1, 49151},
12287 {0, 4295032831},
12288 },
12289 },
12290 },
12291 {
12292 name: "SETGstoreidx1",
12293 auxType: auxSymOff,
12294 argLen: 4,
12295 commutative: true,
12296 symEffect: SymWrite,
12297 asm: x86.ASETGT,
12298 scale: 1,
12299 reg: regInfo{
12300 inputs: []inputInfo{
12301 {1, 49151},
12302 {0, 4295032831},
12303 },
12304 },
12305 },
12306 {
12307 name: "SETGEstoreidx1",
12308 auxType: auxSymOff,
12309 argLen: 4,
12310 commutative: true,
12311 symEffect: SymWrite,
12312 asm: x86.ASETGE,
12313 scale: 1,
12314 reg: regInfo{
12315 inputs: []inputInfo{
12316 {1, 49151},
12317 {0, 4295032831},
12318 },
12319 },
12320 },
12321 {
12322 name: "SETBstoreidx1",
12323 auxType: auxSymOff,
12324 argLen: 4,
12325 commutative: true,
12326 symEffect: SymWrite,
12327 asm: x86.ASETCS,
12328 scale: 1,
12329 reg: regInfo{
12330 inputs: []inputInfo{
12331 {1, 49151},
12332 {0, 4295032831},
12333 },
12334 },
12335 },
12336 {
12337 name: "SETBEstoreidx1",
12338 auxType: auxSymOff,
12339 argLen: 4,
12340 commutative: true,
12341 symEffect: SymWrite,
12342 asm: x86.ASETLS,
12343 scale: 1,
12344 reg: regInfo{
12345 inputs: []inputInfo{
12346 {1, 49151},
12347 {0, 4295032831},
12348 },
12349 },
12350 },
12351 {
12352 name: "SETAstoreidx1",
12353 auxType: auxSymOff,
12354 argLen: 4,
12355 commutative: true,
12356 symEffect: SymWrite,
12357 asm: x86.ASETHI,
12358 scale: 1,
12359 reg: regInfo{
12360 inputs: []inputInfo{
12361 {1, 49151},
12362 {0, 4295032831},
12363 },
12364 },
12365 },
12366 {
12367 name: "SETAEstoreidx1",
12368 auxType: auxSymOff,
12369 argLen: 4,
12370 commutative: true,
12371 symEffect: SymWrite,
12372 asm: x86.ASETCC,
12373 scale: 1,
12374 reg: regInfo{
12375 inputs: []inputInfo{
12376 {1, 49151},
12377 {0, 4295032831},
12378 },
12379 },
12380 },
12381 {
12382 name: "SETEQF",
12383 argLen: 1,
12384 clobberFlags: true,
12385 needIntTemp: true,
12386 asm: x86.ASETEQ,
12387 reg: regInfo{
12388 outputs: []outputInfo{
12389 {0, 49135},
12390 },
12391 },
12392 },
12393 {
12394 name: "SETNEF",
12395 argLen: 1,
12396 clobberFlags: true,
12397 needIntTemp: true,
12398 asm: x86.ASETNE,
12399 reg: regInfo{
12400 outputs: []outputInfo{
12401 {0, 49135},
12402 },
12403 },
12404 },
12405 {
12406 name: "SETORD",
12407 argLen: 1,
12408 asm: x86.ASETPC,
12409 reg: regInfo{
12410 outputs: []outputInfo{
12411 {0, 49135},
12412 },
12413 },
12414 },
12415 {
12416 name: "SETNAN",
12417 argLen: 1,
12418 asm: x86.ASETPS,
12419 reg: regInfo{
12420 outputs: []outputInfo{
12421 {0, 49135},
12422 },
12423 },
12424 },
12425 {
12426 name: "SETGF",
12427 argLen: 1,
12428 asm: x86.ASETHI,
12429 reg: regInfo{
12430 outputs: []outputInfo{
12431 {0, 49135},
12432 },
12433 },
12434 },
12435 {
12436 name: "SETGEF",
12437 argLen: 1,
12438 asm: x86.ASETCC,
12439 reg: regInfo{
12440 outputs: []outputInfo{
12441 {0, 49135},
12442 },
12443 },
12444 },
12445 {
12446 name: "MOVBQSX",
12447 argLen: 1,
12448 asm: x86.AMOVBQSX,
12449 reg: regInfo{
12450 inputs: []inputInfo{
12451 {0, 49135},
12452 },
12453 outputs: []outputInfo{
12454 {0, 49135},
12455 },
12456 },
12457 },
12458 {
12459 name: "MOVBQZX",
12460 argLen: 1,
12461 asm: x86.AMOVBLZX,
12462 reg: regInfo{
12463 inputs: []inputInfo{
12464 {0, 49135},
12465 },
12466 outputs: []outputInfo{
12467 {0, 49135},
12468 },
12469 },
12470 },
12471 {
12472 name: "MOVWQSX",
12473 argLen: 1,
12474 asm: x86.AMOVWQSX,
12475 reg: regInfo{
12476 inputs: []inputInfo{
12477 {0, 49135},
12478 },
12479 outputs: []outputInfo{
12480 {0, 49135},
12481 },
12482 },
12483 },
12484 {
12485 name: "MOVWQZX",
12486 argLen: 1,
12487 asm: x86.AMOVWLZX,
12488 reg: regInfo{
12489 inputs: []inputInfo{
12490 {0, 49135},
12491 },
12492 outputs: []outputInfo{
12493 {0, 49135},
12494 },
12495 },
12496 },
12497 {
12498 name: "MOVLQSX",
12499 argLen: 1,
12500 asm: x86.AMOVLQSX,
12501 reg: regInfo{
12502 inputs: []inputInfo{
12503 {0, 49135},
12504 },
12505 outputs: []outputInfo{
12506 {0, 49135},
12507 },
12508 },
12509 },
12510 {
12511 name: "MOVLQZX",
12512 argLen: 1,
12513 asm: x86.AMOVL,
12514 reg: regInfo{
12515 inputs: []inputInfo{
12516 {0, 49135},
12517 },
12518 outputs: []outputInfo{
12519 {0, 49135},
12520 },
12521 },
12522 },
12523 {
12524 name: "MOVLconst",
12525 auxType: auxInt32,
12526 argLen: 0,
12527 rematerializeable: true,
12528 asm: x86.AMOVL,
12529 reg: regInfo{
12530 outputs: []outputInfo{
12531 {0, 49135},
12532 },
12533 },
12534 },
12535 {
12536 name: "MOVQconst",
12537 auxType: auxInt64,
12538 argLen: 0,
12539 rematerializeable: true,
12540 asm: x86.AMOVQ,
12541 reg: regInfo{
12542 outputs: []outputInfo{
12543 {0, 49135},
12544 },
12545 },
12546 },
12547 {
12548 name: "CVTTSD2SL",
12549 argLen: 1,
12550 asm: x86.ACVTTSD2SL,
12551 reg: regInfo{
12552 inputs: []inputInfo{
12553 {0, 2147418112},
12554 },
12555 outputs: []outputInfo{
12556 {0, 49135},
12557 },
12558 },
12559 },
12560 {
12561 name: "CVTTSD2SQ",
12562 argLen: 1,
12563 asm: x86.ACVTTSD2SQ,
12564 reg: regInfo{
12565 inputs: []inputInfo{
12566 {0, 2147418112},
12567 },
12568 outputs: []outputInfo{
12569 {0, 49135},
12570 },
12571 },
12572 },
12573 {
12574 name: "CVTTSS2SL",
12575 argLen: 1,
12576 asm: x86.ACVTTSS2SL,
12577 reg: regInfo{
12578 inputs: []inputInfo{
12579 {0, 2147418112},
12580 },
12581 outputs: []outputInfo{
12582 {0, 49135},
12583 },
12584 },
12585 },
12586 {
12587 name: "CVTTSS2SQ",
12588 argLen: 1,
12589 asm: x86.ACVTTSS2SQ,
12590 reg: regInfo{
12591 inputs: []inputInfo{
12592 {0, 2147418112},
12593 },
12594 outputs: []outputInfo{
12595 {0, 49135},
12596 },
12597 },
12598 },
12599 {
12600 name: "CVTSL2SS",
12601 argLen: 1,
12602 asm: x86.ACVTSL2SS,
12603 reg: regInfo{
12604 inputs: []inputInfo{
12605 {0, 49135},
12606 },
12607 outputs: []outputInfo{
12608 {0, 2147418112},
12609 },
12610 },
12611 },
12612 {
12613 name: "CVTSL2SD",
12614 argLen: 1,
12615 asm: x86.ACVTSL2SD,
12616 reg: regInfo{
12617 inputs: []inputInfo{
12618 {0, 49135},
12619 },
12620 outputs: []outputInfo{
12621 {0, 2147418112},
12622 },
12623 },
12624 },
12625 {
12626 name: "CVTSQ2SS",
12627 argLen: 1,
12628 asm: x86.ACVTSQ2SS,
12629 reg: regInfo{
12630 inputs: []inputInfo{
12631 {0, 49135},
12632 },
12633 outputs: []outputInfo{
12634 {0, 2147418112},
12635 },
12636 },
12637 },
12638 {
12639 name: "CVTSQ2SD",
12640 argLen: 1,
12641 asm: x86.ACVTSQ2SD,
12642 reg: regInfo{
12643 inputs: []inputInfo{
12644 {0, 49135},
12645 },
12646 outputs: []outputInfo{
12647 {0, 2147418112},
12648 },
12649 },
12650 },
12651 {
12652 name: "CVTSD2SS",
12653 argLen: 1,
12654 asm: x86.ACVTSD2SS,
12655 reg: regInfo{
12656 inputs: []inputInfo{
12657 {0, 2147418112},
12658 },
12659 outputs: []outputInfo{
12660 {0, 2147418112},
12661 },
12662 },
12663 },
12664 {
12665 name: "CVTSS2SD",
12666 argLen: 1,
12667 asm: x86.ACVTSS2SD,
12668 reg: regInfo{
12669 inputs: []inputInfo{
12670 {0, 2147418112},
12671 },
12672 outputs: []outputInfo{
12673 {0, 2147418112},
12674 },
12675 },
12676 },
12677 {
12678 name: "MOVQi2f",
12679 argLen: 1,
12680 reg: regInfo{
12681 inputs: []inputInfo{
12682 {0, 49135},
12683 },
12684 outputs: []outputInfo{
12685 {0, 2147418112},
12686 },
12687 },
12688 },
12689 {
12690 name: "MOVQf2i",
12691 argLen: 1,
12692 reg: regInfo{
12693 inputs: []inputInfo{
12694 {0, 2147418112},
12695 },
12696 outputs: []outputInfo{
12697 {0, 49135},
12698 },
12699 },
12700 },
12701 {
12702 name: "MOVLi2f",
12703 argLen: 1,
12704 reg: regInfo{
12705 inputs: []inputInfo{
12706 {0, 49135},
12707 },
12708 outputs: []outputInfo{
12709 {0, 2147418112},
12710 },
12711 },
12712 },
12713 {
12714 name: "MOVLf2i",
12715 argLen: 1,
12716 reg: regInfo{
12717 inputs: []inputInfo{
12718 {0, 2147418112},
12719 },
12720 outputs: []outputInfo{
12721 {0, 49135},
12722 },
12723 },
12724 },
12725 {
12726 name: "PXOR",
12727 argLen: 2,
12728 commutative: true,
12729 resultInArg0: true,
12730 asm: x86.APXOR,
12731 reg: regInfo{
12732 inputs: []inputInfo{
12733 {0, 2147418112},
12734 {1, 2147418112},
12735 },
12736 outputs: []outputInfo{
12737 {0, 2147418112},
12738 },
12739 },
12740 },
12741 {
12742 name: "POR",
12743 argLen: 2,
12744 commutative: true,
12745 resultInArg0: true,
12746 asm: x86.APOR,
12747 reg: regInfo{
12748 inputs: []inputInfo{
12749 {0, 2147418112},
12750 {1, 2147418112},
12751 },
12752 outputs: []outputInfo{
12753 {0, 2147418112},
12754 },
12755 },
12756 },
12757 {
12758 name: "LEAQ",
12759 auxType: auxSymOff,
12760 argLen: 1,
12761 rematerializeable: true,
12762 symEffect: SymAddr,
12763 asm: x86.ALEAQ,
12764 reg: regInfo{
12765 inputs: []inputInfo{
12766 {0, 4295032831},
12767 },
12768 outputs: []outputInfo{
12769 {0, 49135},
12770 },
12771 },
12772 },
12773 {
12774 name: "LEAL",
12775 auxType: auxSymOff,
12776 argLen: 1,
12777 rematerializeable: true,
12778 symEffect: SymAddr,
12779 asm: x86.ALEAL,
12780 reg: regInfo{
12781 inputs: []inputInfo{
12782 {0, 4295032831},
12783 },
12784 outputs: []outputInfo{
12785 {0, 49135},
12786 },
12787 },
12788 },
12789 {
12790 name: "LEAW",
12791 auxType: auxSymOff,
12792 argLen: 1,
12793 rematerializeable: true,
12794 symEffect: SymAddr,
12795 asm: x86.ALEAW,
12796 reg: regInfo{
12797 inputs: []inputInfo{
12798 {0, 4295032831},
12799 },
12800 outputs: []outputInfo{
12801 {0, 49135},
12802 },
12803 },
12804 },
12805 {
12806 name: "LEAQ1",
12807 auxType: auxSymOff,
12808 argLen: 2,
12809 commutative: true,
12810 symEffect: SymAddr,
12811 asm: x86.ALEAQ,
12812 scale: 1,
12813 reg: regInfo{
12814 inputs: []inputInfo{
12815 {1, 49151},
12816 {0, 4295032831},
12817 },
12818 outputs: []outputInfo{
12819 {0, 49135},
12820 },
12821 },
12822 },
12823 {
12824 name: "LEAL1",
12825 auxType: auxSymOff,
12826 argLen: 2,
12827 commutative: true,
12828 symEffect: SymAddr,
12829 asm: x86.ALEAL,
12830 scale: 1,
12831 reg: regInfo{
12832 inputs: []inputInfo{
12833 {1, 49151},
12834 {0, 4295032831},
12835 },
12836 outputs: []outputInfo{
12837 {0, 49135},
12838 },
12839 },
12840 },
12841 {
12842 name: "LEAW1",
12843 auxType: auxSymOff,
12844 argLen: 2,
12845 commutative: true,
12846 symEffect: SymAddr,
12847 asm: x86.ALEAW,
12848 scale: 1,
12849 reg: regInfo{
12850 inputs: []inputInfo{
12851 {1, 49151},
12852 {0, 4295032831},
12853 },
12854 outputs: []outputInfo{
12855 {0, 49135},
12856 },
12857 },
12858 },
12859 {
12860 name: "LEAQ2",
12861 auxType: auxSymOff,
12862 argLen: 2,
12863 symEffect: SymAddr,
12864 asm: x86.ALEAQ,
12865 scale: 2,
12866 reg: regInfo{
12867 inputs: []inputInfo{
12868 {1, 49151},
12869 {0, 4295032831},
12870 },
12871 outputs: []outputInfo{
12872 {0, 49135},
12873 },
12874 },
12875 },
12876 {
12877 name: "LEAL2",
12878 auxType: auxSymOff,
12879 argLen: 2,
12880 symEffect: SymAddr,
12881 asm: x86.ALEAL,
12882 scale: 2,
12883 reg: regInfo{
12884 inputs: []inputInfo{
12885 {1, 49151},
12886 {0, 4295032831},
12887 },
12888 outputs: []outputInfo{
12889 {0, 49135},
12890 },
12891 },
12892 },
12893 {
12894 name: "LEAW2",
12895 auxType: auxSymOff,
12896 argLen: 2,
12897 symEffect: SymAddr,
12898 asm: x86.ALEAW,
12899 scale: 2,
12900 reg: regInfo{
12901 inputs: []inputInfo{
12902 {1, 49151},
12903 {0, 4295032831},
12904 },
12905 outputs: []outputInfo{
12906 {0, 49135},
12907 },
12908 },
12909 },
12910 {
12911 name: "LEAQ4",
12912 auxType: auxSymOff,
12913 argLen: 2,
12914 symEffect: SymAddr,
12915 asm: x86.ALEAQ,
12916 scale: 4,
12917 reg: regInfo{
12918 inputs: []inputInfo{
12919 {1, 49151},
12920 {0, 4295032831},
12921 },
12922 outputs: []outputInfo{
12923 {0, 49135},
12924 },
12925 },
12926 },
12927 {
12928 name: "LEAL4",
12929 auxType: auxSymOff,
12930 argLen: 2,
12931 symEffect: SymAddr,
12932 asm: x86.ALEAL,
12933 scale: 4,
12934 reg: regInfo{
12935 inputs: []inputInfo{
12936 {1, 49151},
12937 {0, 4295032831},
12938 },
12939 outputs: []outputInfo{
12940 {0, 49135},
12941 },
12942 },
12943 },
12944 {
12945 name: "LEAW4",
12946 auxType: auxSymOff,
12947 argLen: 2,
12948 symEffect: SymAddr,
12949 asm: x86.ALEAW,
12950 scale: 4,
12951 reg: regInfo{
12952 inputs: []inputInfo{
12953 {1, 49151},
12954 {0, 4295032831},
12955 },
12956 outputs: []outputInfo{
12957 {0, 49135},
12958 },
12959 },
12960 },
12961 {
12962 name: "LEAQ8",
12963 auxType: auxSymOff,
12964 argLen: 2,
12965 symEffect: SymAddr,
12966 asm: x86.ALEAQ,
12967 scale: 8,
12968 reg: regInfo{
12969 inputs: []inputInfo{
12970 {1, 49151},
12971 {0, 4295032831},
12972 },
12973 outputs: []outputInfo{
12974 {0, 49135},
12975 },
12976 },
12977 },
12978 {
12979 name: "LEAL8",
12980 auxType: auxSymOff,
12981 argLen: 2,
12982 symEffect: SymAddr,
12983 asm: x86.ALEAL,
12984 scale: 8,
12985 reg: regInfo{
12986 inputs: []inputInfo{
12987 {1, 49151},
12988 {0, 4295032831},
12989 },
12990 outputs: []outputInfo{
12991 {0, 49135},
12992 },
12993 },
12994 },
12995 {
12996 name: "LEAW8",
12997 auxType: auxSymOff,
12998 argLen: 2,
12999 symEffect: SymAddr,
13000 asm: x86.ALEAW,
13001 scale: 8,
13002 reg: regInfo{
13003 inputs: []inputInfo{
13004 {1, 49151},
13005 {0, 4295032831},
13006 },
13007 outputs: []outputInfo{
13008 {0, 49135},
13009 },
13010 },
13011 },
13012 {
13013 name: "MOVBload",
13014 auxType: auxSymOff,
13015 argLen: 2,
13016 faultOnNilArg0: true,
13017 symEffect: SymRead,
13018 asm: x86.AMOVBLZX,
13019 reg: regInfo{
13020 inputs: []inputInfo{
13021 {0, 4295032831},
13022 },
13023 outputs: []outputInfo{
13024 {0, 49135},
13025 },
13026 },
13027 },
13028 {
13029 name: "MOVBQSXload",
13030 auxType: auxSymOff,
13031 argLen: 2,
13032 faultOnNilArg0: true,
13033 symEffect: SymRead,
13034 asm: x86.AMOVBQSX,
13035 reg: regInfo{
13036 inputs: []inputInfo{
13037 {0, 4295032831},
13038 },
13039 outputs: []outputInfo{
13040 {0, 49135},
13041 },
13042 },
13043 },
13044 {
13045 name: "MOVWload",
13046 auxType: auxSymOff,
13047 argLen: 2,
13048 faultOnNilArg0: true,
13049 symEffect: SymRead,
13050 asm: x86.AMOVWLZX,
13051 reg: regInfo{
13052 inputs: []inputInfo{
13053 {0, 4295032831},
13054 },
13055 outputs: []outputInfo{
13056 {0, 49135},
13057 },
13058 },
13059 },
13060 {
13061 name: "MOVWQSXload",
13062 auxType: auxSymOff,
13063 argLen: 2,
13064 faultOnNilArg0: true,
13065 symEffect: SymRead,
13066 asm: x86.AMOVWQSX,
13067 reg: regInfo{
13068 inputs: []inputInfo{
13069 {0, 4295032831},
13070 },
13071 outputs: []outputInfo{
13072 {0, 49135},
13073 },
13074 },
13075 },
13076 {
13077 name: "MOVLload",
13078 auxType: auxSymOff,
13079 argLen: 2,
13080 faultOnNilArg0: true,
13081 symEffect: SymRead,
13082 asm: x86.AMOVL,
13083 reg: regInfo{
13084 inputs: []inputInfo{
13085 {0, 4295032831},
13086 },
13087 outputs: []outputInfo{
13088 {0, 49135},
13089 },
13090 },
13091 },
13092 {
13093 name: "MOVLQSXload",
13094 auxType: auxSymOff,
13095 argLen: 2,
13096 faultOnNilArg0: true,
13097 symEffect: SymRead,
13098 asm: x86.AMOVLQSX,
13099 reg: regInfo{
13100 inputs: []inputInfo{
13101 {0, 4295032831},
13102 },
13103 outputs: []outputInfo{
13104 {0, 49135},
13105 },
13106 },
13107 },
13108 {
13109 name: "MOVQload",
13110 auxType: auxSymOff,
13111 argLen: 2,
13112 faultOnNilArg0: true,
13113 symEffect: SymRead,
13114 asm: x86.AMOVQ,
13115 reg: regInfo{
13116 inputs: []inputInfo{
13117 {0, 4295032831},
13118 },
13119 outputs: []outputInfo{
13120 {0, 49135},
13121 },
13122 },
13123 },
13124 {
13125 name: "MOVBstore",
13126 auxType: auxSymOff,
13127 argLen: 3,
13128 faultOnNilArg0: true,
13129 symEffect: SymWrite,
13130 asm: x86.AMOVB,
13131 reg: regInfo{
13132 inputs: []inputInfo{
13133 {1, 49151},
13134 {0, 4295032831},
13135 },
13136 },
13137 },
13138 {
13139 name: "MOVWstore",
13140 auxType: auxSymOff,
13141 argLen: 3,
13142 faultOnNilArg0: true,
13143 symEffect: SymWrite,
13144 asm: x86.AMOVW,
13145 reg: regInfo{
13146 inputs: []inputInfo{
13147 {1, 49151},
13148 {0, 4295032831},
13149 },
13150 },
13151 },
13152 {
13153 name: "MOVLstore",
13154 auxType: auxSymOff,
13155 argLen: 3,
13156 faultOnNilArg0: true,
13157 symEffect: SymWrite,
13158 asm: x86.AMOVL,
13159 reg: regInfo{
13160 inputs: []inputInfo{
13161 {1, 49151},
13162 {0, 4295032831},
13163 },
13164 },
13165 },
13166 {
13167 name: "MOVQstore",
13168 auxType: auxSymOff,
13169 argLen: 3,
13170 faultOnNilArg0: true,
13171 symEffect: SymWrite,
13172 asm: x86.AMOVQ,
13173 reg: regInfo{
13174 inputs: []inputInfo{
13175 {1, 49151},
13176 {0, 4295032831},
13177 },
13178 },
13179 },
13180 {
13181 name: "MOVOload",
13182 auxType: auxSymOff,
13183 argLen: 2,
13184 faultOnNilArg0: true,
13185 symEffect: SymRead,
13186 asm: x86.AMOVUPS,
13187 reg: regInfo{
13188 inputs: []inputInfo{
13189 {0, 4295016447},
13190 },
13191 outputs: []outputInfo{
13192 {0, 2147418112},
13193 },
13194 },
13195 },
13196 {
13197 name: "MOVOstore",
13198 auxType: auxSymOff,
13199 argLen: 3,
13200 faultOnNilArg0: true,
13201 symEffect: SymWrite,
13202 asm: x86.AMOVUPS,
13203 reg: regInfo{
13204 inputs: []inputInfo{
13205 {1, 2147418112},
13206 {0, 4295016447},
13207 },
13208 },
13209 },
13210 {
13211 name: "MOVBloadidx1",
13212 auxType: auxSymOff,
13213 argLen: 3,
13214 commutative: true,
13215 symEffect: SymRead,
13216 asm: x86.AMOVBLZX,
13217 scale: 1,
13218 reg: regInfo{
13219 inputs: []inputInfo{
13220 {1, 49151},
13221 {0, 4295032831},
13222 },
13223 outputs: []outputInfo{
13224 {0, 49135},
13225 },
13226 },
13227 },
13228 {
13229 name: "MOVWloadidx1",
13230 auxType: auxSymOff,
13231 argLen: 3,
13232 commutative: true,
13233 symEffect: SymRead,
13234 asm: x86.AMOVWLZX,
13235 scale: 1,
13236 reg: regInfo{
13237 inputs: []inputInfo{
13238 {1, 49151},
13239 {0, 4295032831},
13240 },
13241 outputs: []outputInfo{
13242 {0, 49135},
13243 },
13244 },
13245 },
13246 {
13247 name: "MOVWloadidx2",
13248 auxType: auxSymOff,
13249 argLen: 3,
13250 symEffect: SymRead,
13251 asm: x86.AMOVWLZX,
13252 scale: 2,
13253 reg: regInfo{
13254 inputs: []inputInfo{
13255 {1, 49151},
13256 {0, 4295032831},
13257 },
13258 outputs: []outputInfo{
13259 {0, 49135},
13260 },
13261 },
13262 },
13263 {
13264 name: "MOVLloadidx1",
13265 auxType: auxSymOff,
13266 argLen: 3,
13267 commutative: true,
13268 symEffect: SymRead,
13269 asm: x86.AMOVL,
13270 scale: 1,
13271 reg: regInfo{
13272 inputs: []inputInfo{
13273 {1, 49151},
13274 {0, 4295032831},
13275 },
13276 outputs: []outputInfo{
13277 {0, 49135},
13278 },
13279 },
13280 },
13281 {
13282 name: "MOVLloadidx4",
13283 auxType: auxSymOff,
13284 argLen: 3,
13285 symEffect: SymRead,
13286 asm: x86.AMOVL,
13287 scale: 4,
13288 reg: regInfo{
13289 inputs: []inputInfo{
13290 {1, 49151},
13291 {0, 4295032831},
13292 },
13293 outputs: []outputInfo{
13294 {0, 49135},
13295 },
13296 },
13297 },
13298 {
13299 name: "MOVLloadidx8",
13300 auxType: auxSymOff,
13301 argLen: 3,
13302 symEffect: SymRead,
13303 asm: x86.AMOVL,
13304 scale: 8,
13305 reg: regInfo{
13306 inputs: []inputInfo{
13307 {1, 49151},
13308 {0, 4295032831},
13309 },
13310 outputs: []outputInfo{
13311 {0, 49135},
13312 },
13313 },
13314 },
13315 {
13316 name: "MOVQloadidx1",
13317 auxType: auxSymOff,
13318 argLen: 3,
13319 commutative: true,
13320 symEffect: SymRead,
13321 asm: x86.AMOVQ,
13322 scale: 1,
13323 reg: regInfo{
13324 inputs: []inputInfo{
13325 {1, 49151},
13326 {0, 4295032831},
13327 },
13328 outputs: []outputInfo{
13329 {0, 49135},
13330 },
13331 },
13332 },
13333 {
13334 name: "MOVQloadidx8",
13335 auxType: auxSymOff,
13336 argLen: 3,
13337 symEffect: SymRead,
13338 asm: x86.AMOVQ,
13339 scale: 8,
13340 reg: regInfo{
13341 inputs: []inputInfo{
13342 {1, 49151},
13343 {0, 4295032831},
13344 },
13345 outputs: []outputInfo{
13346 {0, 49135},
13347 },
13348 },
13349 },
13350 {
13351 name: "MOVBstoreidx1",
13352 auxType: auxSymOff,
13353 argLen: 4,
13354 commutative: true,
13355 symEffect: SymWrite,
13356 asm: x86.AMOVB,
13357 scale: 1,
13358 reg: regInfo{
13359 inputs: []inputInfo{
13360 {1, 49151},
13361 {2, 49151},
13362 {0, 4295032831},
13363 },
13364 },
13365 },
13366 {
13367 name: "MOVWstoreidx1",
13368 auxType: auxSymOff,
13369 argLen: 4,
13370 commutative: true,
13371 symEffect: SymWrite,
13372 asm: x86.AMOVW,
13373 scale: 1,
13374 reg: regInfo{
13375 inputs: []inputInfo{
13376 {1, 49151},
13377 {2, 49151},
13378 {0, 4295032831},
13379 },
13380 },
13381 },
13382 {
13383 name: "MOVWstoreidx2",
13384 auxType: auxSymOff,
13385 argLen: 4,
13386 symEffect: SymWrite,
13387 asm: x86.AMOVW,
13388 scale: 2,
13389 reg: regInfo{
13390 inputs: []inputInfo{
13391 {1, 49151},
13392 {2, 49151},
13393 {0, 4295032831},
13394 },
13395 },
13396 },
13397 {
13398 name: "MOVLstoreidx1",
13399 auxType: auxSymOff,
13400 argLen: 4,
13401 commutative: true,
13402 symEffect: SymWrite,
13403 asm: x86.AMOVL,
13404 scale: 1,
13405 reg: regInfo{
13406 inputs: []inputInfo{
13407 {1, 49151},
13408 {2, 49151},
13409 {0, 4295032831},
13410 },
13411 },
13412 },
13413 {
13414 name: "MOVLstoreidx4",
13415 auxType: auxSymOff,
13416 argLen: 4,
13417 symEffect: SymWrite,
13418 asm: x86.AMOVL,
13419 scale: 4,
13420 reg: regInfo{
13421 inputs: []inputInfo{
13422 {1, 49151},
13423 {2, 49151},
13424 {0, 4295032831},
13425 },
13426 },
13427 },
13428 {
13429 name: "MOVLstoreidx8",
13430 auxType: auxSymOff,
13431 argLen: 4,
13432 symEffect: SymWrite,
13433 asm: x86.AMOVL,
13434 scale: 8,
13435 reg: regInfo{
13436 inputs: []inputInfo{
13437 {1, 49151},
13438 {2, 49151},
13439 {0, 4295032831},
13440 },
13441 },
13442 },
13443 {
13444 name: "MOVQstoreidx1",
13445 auxType: auxSymOff,
13446 argLen: 4,
13447 commutative: true,
13448 symEffect: SymWrite,
13449 asm: x86.AMOVQ,
13450 scale: 1,
13451 reg: regInfo{
13452 inputs: []inputInfo{
13453 {1, 49151},
13454 {2, 49151},
13455 {0, 4295032831},
13456 },
13457 },
13458 },
13459 {
13460 name: "MOVQstoreidx8",
13461 auxType: auxSymOff,
13462 argLen: 4,
13463 symEffect: SymWrite,
13464 asm: x86.AMOVQ,
13465 scale: 8,
13466 reg: regInfo{
13467 inputs: []inputInfo{
13468 {1, 49151},
13469 {2, 49151},
13470 {0, 4295032831},
13471 },
13472 },
13473 },
13474 {
13475 name: "MOVBstoreconst",
13476 auxType: auxSymValAndOff,
13477 argLen: 2,
13478 faultOnNilArg0: true,
13479 symEffect: SymWrite,
13480 asm: x86.AMOVB,
13481 reg: regInfo{
13482 inputs: []inputInfo{
13483 {0, 4295032831},
13484 },
13485 },
13486 },
13487 {
13488 name: "MOVWstoreconst",
13489 auxType: auxSymValAndOff,
13490 argLen: 2,
13491 faultOnNilArg0: true,
13492 symEffect: SymWrite,
13493 asm: x86.AMOVW,
13494 reg: regInfo{
13495 inputs: []inputInfo{
13496 {0, 4295032831},
13497 },
13498 },
13499 },
13500 {
13501 name: "MOVLstoreconst",
13502 auxType: auxSymValAndOff,
13503 argLen: 2,
13504 faultOnNilArg0: true,
13505 symEffect: SymWrite,
13506 asm: x86.AMOVL,
13507 reg: regInfo{
13508 inputs: []inputInfo{
13509 {0, 4295032831},
13510 },
13511 },
13512 },
13513 {
13514 name: "MOVQstoreconst",
13515 auxType: auxSymValAndOff,
13516 argLen: 2,
13517 faultOnNilArg0: true,
13518 symEffect: SymWrite,
13519 asm: x86.AMOVQ,
13520 reg: regInfo{
13521 inputs: []inputInfo{
13522 {0, 4295032831},
13523 },
13524 },
13525 },
13526 {
13527 name: "MOVOstoreconst",
13528 auxType: auxSymValAndOff,
13529 argLen: 2,
13530 faultOnNilArg0: true,
13531 symEffect: SymWrite,
13532 asm: x86.AMOVUPS,
13533 reg: regInfo{
13534 inputs: []inputInfo{
13535 {0, 4295032831},
13536 },
13537 },
13538 },
13539 {
13540 name: "MOVBstoreconstidx1",
13541 auxType: auxSymValAndOff,
13542 argLen: 3,
13543 commutative: true,
13544 symEffect: SymWrite,
13545 asm: x86.AMOVB,
13546 scale: 1,
13547 reg: regInfo{
13548 inputs: []inputInfo{
13549 {1, 49151},
13550 {0, 4295032831},
13551 },
13552 },
13553 },
13554 {
13555 name: "MOVWstoreconstidx1",
13556 auxType: auxSymValAndOff,
13557 argLen: 3,
13558 commutative: true,
13559 symEffect: SymWrite,
13560 asm: x86.AMOVW,
13561 scale: 1,
13562 reg: regInfo{
13563 inputs: []inputInfo{
13564 {1, 49151},
13565 {0, 4295032831},
13566 },
13567 },
13568 },
13569 {
13570 name: "MOVWstoreconstidx2",
13571 auxType: auxSymValAndOff,
13572 argLen: 3,
13573 symEffect: SymWrite,
13574 asm: x86.AMOVW,
13575 scale: 2,
13576 reg: regInfo{
13577 inputs: []inputInfo{
13578 {1, 49151},
13579 {0, 4295032831},
13580 },
13581 },
13582 },
13583 {
13584 name: "MOVLstoreconstidx1",
13585 auxType: auxSymValAndOff,
13586 argLen: 3,
13587 commutative: true,
13588 symEffect: SymWrite,
13589 asm: x86.AMOVL,
13590 scale: 1,
13591 reg: regInfo{
13592 inputs: []inputInfo{
13593 {1, 49151},
13594 {0, 4295032831},
13595 },
13596 },
13597 },
13598 {
13599 name: "MOVLstoreconstidx4",
13600 auxType: auxSymValAndOff,
13601 argLen: 3,
13602 symEffect: SymWrite,
13603 asm: x86.AMOVL,
13604 scale: 4,
13605 reg: regInfo{
13606 inputs: []inputInfo{
13607 {1, 49151},
13608 {0, 4295032831},
13609 },
13610 },
13611 },
13612 {
13613 name: "MOVQstoreconstidx1",
13614 auxType: auxSymValAndOff,
13615 argLen: 3,
13616 commutative: true,
13617 symEffect: SymWrite,
13618 asm: x86.AMOVQ,
13619 scale: 1,
13620 reg: regInfo{
13621 inputs: []inputInfo{
13622 {1, 49151},
13623 {0, 4295032831},
13624 },
13625 },
13626 },
13627 {
13628 name: "MOVQstoreconstidx8",
13629 auxType: auxSymValAndOff,
13630 argLen: 3,
13631 symEffect: SymWrite,
13632 asm: x86.AMOVQ,
13633 scale: 8,
13634 reg: regInfo{
13635 inputs: []inputInfo{
13636 {1, 49151},
13637 {0, 4295032831},
13638 },
13639 },
13640 },
13641 {
13642 name: "DUFFZERO",
13643 auxType: auxInt64,
13644 argLen: 2,
13645 faultOnNilArg0: true,
13646 unsafePoint: true,
13647 reg: regInfo{
13648 inputs: []inputInfo{
13649 {0, 128},
13650 },
13651 clobbers: 128,
13652 },
13653 },
13654 {
13655 name: "REPSTOSQ",
13656 argLen: 4,
13657 faultOnNilArg0: true,
13658 reg: regInfo{
13659 inputs: []inputInfo{
13660 {0, 128},
13661 {1, 2},
13662 {2, 1},
13663 },
13664 clobbers: 130,
13665 },
13666 },
13667 {
13668 name: "CALLstatic",
13669 auxType: auxCallOff,
13670 argLen: -1,
13671 clobberFlags: true,
13672 call: true,
13673 reg: regInfo{
13674 clobbers: 2147483631,
13675 },
13676 },
13677 {
13678 name: "CALLtail",
13679 auxType: auxCallOff,
13680 argLen: -1,
13681 clobberFlags: true,
13682 call: true,
13683 tailCall: true,
13684 reg: regInfo{
13685 clobbers: 2147483631,
13686 },
13687 },
13688 {
13689 name: "CALLclosure",
13690 auxType: auxCallOff,
13691 argLen: -1,
13692 clobberFlags: true,
13693 call: true,
13694 reg: regInfo{
13695 inputs: []inputInfo{
13696 {1, 4},
13697 {0, 49151},
13698 },
13699 clobbers: 2147483631,
13700 },
13701 },
13702 {
13703 name: "CALLinter",
13704 auxType: auxCallOff,
13705 argLen: -1,
13706 clobberFlags: true,
13707 call: true,
13708 reg: regInfo{
13709 inputs: []inputInfo{
13710 {0, 49135},
13711 },
13712 clobbers: 2147483631,
13713 },
13714 },
13715 {
13716 name: "DUFFCOPY",
13717 auxType: auxInt64,
13718 argLen: 3,
13719 clobberFlags: true,
13720 faultOnNilArg0: true,
13721 faultOnNilArg1: true,
13722 unsafePoint: true,
13723 reg: regInfo{
13724 inputs: []inputInfo{
13725 {0, 128},
13726 {1, 64},
13727 },
13728 clobbers: 65728,
13729 },
13730 },
13731 {
13732 name: "REPMOVSQ",
13733 argLen: 4,
13734 faultOnNilArg0: true,
13735 faultOnNilArg1: true,
13736 reg: regInfo{
13737 inputs: []inputInfo{
13738 {0, 128},
13739 {1, 64},
13740 {2, 2},
13741 },
13742 clobbers: 194,
13743 },
13744 },
13745 {
13746 name: "InvertFlags",
13747 argLen: 1,
13748 reg: regInfo{},
13749 },
13750 {
13751 name: "LoweredGetG",
13752 argLen: 1,
13753 reg: regInfo{
13754 outputs: []outputInfo{
13755 {0, 49135},
13756 },
13757 },
13758 },
13759 {
13760 name: "LoweredGetClosurePtr",
13761 argLen: 0,
13762 zeroWidth: true,
13763 reg: regInfo{
13764 outputs: []outputInfo{
13765 {0, 4},
13766 },
13767 },
13768 },
13769 {
13770 name: "LoweredGetCallerPC",
13771 argLen: 0,
13772 rematerializeable: true,
13773 reg: regInfo{
13774 outputs: []outputInfo{
13775 {0, 49135},
13776 },
13777 },
13778 },
13779 {
13780 name: "LoweredGetCallerSP",
13781 argLen: 1,
13782 rematerializeable: true,
13783 reg: regInfo{
13784 outputs: []outputInfo{
13785 {0, 49135},
13786 },
13787 },
13788 },
13789 {
13790 name: "LoweredNilCheck",
13791 argLen: 2,
13792 clobberFlags: true,
13793 nilCheck: true,
13794 faultOnNilArg0: true,
13795 reg: regInfo{
13796 inputs: []inputInfo{
13797 {0, 49151},
13798 },
13799 },
13800 },
13801 {
13802 name: "LoweredWB",
13803 auxType: auxInt64,
13804 argLen: 1,
13805 clobberFlags: true,
13806 reg: regInfo{
13807 clobbers: 2147418112,
13808 outputs: []outputInfo{
13809 {0, 2048},
13810 },
13811 },
13812 },
13813 {
13814 name: "LoweredHasCPUFeature",
13815 auxType: auxSym,
13816 argLen: 0,
13817 rematerializeable: true,
13818 symEffect: SymNone,
13819 reg: regInfo{
13820 outputs: []outputInfo{
13821 {0, 49135},
13822 },
13823 },
13824 },
13825 {
13826 name: "LoweredPanicBoundsA",
13827 auxType: auxInt64,
13828 argLen: 3,
13829 call: true,
13830 reg: regInfo{
13831 inputs: []inputInfo{
13832 {0, 4},
13833 {1, 8},
13834 },
13835 },
13836 },
13837 {
13838 name: "LoweredPanicBoundsB",
13839 auxType: auxInt64,
13840 argLen: 3,
13841 call: true,
13842 reg: regInfo{
13843 inputs: []inputInfo{
13844 {0, 2},
13845 {1, 4},
13846 },
13847 },
13848 },
13849 {
13850 name: "LoweredPanicBoundsC",
13851 auxType: auxInt64,
13852 argLen: 3,
13853 call: true,
13854 reg: regInfo{
13855 inputs: []inputInfo{
13856 {0, 1},
13857 {1, 2},
13858 },
13859 },
13860 },
13861 {
13862 name: "FlagEQ",
13863 argLen: 0,
13864 reg: regInfo{},
13865 },
13866 {
13867 name: "FlagLT_ULT",
13868 argLen: 0,
13869 reg: regInfo{},
13870 },
13871 {
13872 name: "FlagLT_UGT",
13873 argLen: 0,
13874 reg: regInfo{},
13875 },
13876 {
13877 name: "FlagGT_UGT",
13878 argLen: 0,
13879 reg: regInfo{},
13880 },
13881 {
13882 name: "FlagGT_ULT",
13883 argLen: 0,
13884 reg: regInfo{},
13885 },
13886 {
13887 name: "MOVBatomicload",
13888 auxType: auxSymOff,
13889 argLen: 2,
13890 faultOnNilArg0: true,
13891 symEffect: SymRead,
13892 asm: x86.AMOVB,
13893 reg: regInfo{
13894 inputs: []inputInfo{
13895 {0, 4295032831},
13896 },
13897 outputs: []outputInfo{
13898 {0, 49135},
13899 },
13900 },
13901 },
13902 {
13903 name: "MOVLatomicload",
13904 auxType: auxSymOff,
13905 argLen: 2,
13906 faultOnNilArg0: true,
13907 symEffect: SymRead,
13908 asm: x86.AMOVL,
13909 reg: regInfo{
13910 inputs: []inputInfo{
13911 {0, 4295032831},
13912 },
13913 outputs: []outputInfo{
13914 {0, 49135},
13915 },
13916 },
13917 },
13918 {
13919 name: "MOVQatomicload",
13920 auxType: auxSymOff,
13921 argLen: 2,
13922 faultOnNilArg0: true,
13923 symEffect: SymRead,
13924 asm: x86.AMOVQ,
13925 reg: regInfo{
13926 inputs: []inputInfo{
13927 {0, 4295032831},
13928 },
13929 outputs: []outputInfo{
13930 {0, 49135},
13931 },
13932 },
13933 },
13934 {
13935 name: "XCHGB",
13936 auxType: auxSymOff,
13937 argLen: 3,
13938 resultInArg0: true,
13939 faultOnNilArg1: true,
13940 hasSideEffects: true,
13941 symEffect: SymRdWr,
13942 asm: x86.AXCHGB,
13943 reg: regInfo{
13944 inputs: []inputInfo{
13945 {0, 49135},
13946 {1, 4295032831},
13947 },
13948 outputs: []outputInfo{
13949 {0, 49135},
13950 },
13951 },
13952 },
13953 {
13954 name: "XCHGL",
13955 auxType: auxSymOff,
13956 argLen: 3,
13957 resultInArg0: true,
13958 faultOnNilArg1: true,
13959 hasSideEffects: true,
13960 symEffect: SymRdWr,
13961 asm: x86.AXCHGL,
13962 reg: regInfo{
13963 inputs: []inputInfo{
13964 {0, 49135},
13965 {1, 4295032831},
13966 },
13967 outputs: []outputInfo{
13968 {0, 49135},
13969 },
13970 },
13971 },
13972 {
13973 name: "XCHGQ",
13974 auxType: auxSymOff,
13975 argLen: 3,
13976 resultInArg0: true,
13977 faultOnNilArg1: true,
13978 hasSideEffects: true,
13979 symEffect: SymRdWr,
13980 asm: x86.AXCHGQ,
13981 reg: regInfo{
13982 inputs: []inputInfo{
13983 {0, 49135},
13984 {1, 4295032831},
13985 },
13986 outputs: []outputInfo{
13987 {0, 49135},
13988 },
13989 },
13990 },
13991 {
13992 name: "XADDLlock",
13993 auxType: auxSymOff,
13994 argLen: 3,
13995 resultInArg0: true,
13996 clobberFlags: true,
13997 faultOnNilArg1: true,
13998 hasSideEffects: true,
13999 symEffect: SymRdWr,
14000 asm: x86.AXADDL,
14001 reg: regInfo{
14002 inputs: []inputInfo{
14003 {0, 49135},
14004 {1, 4295032831},
14005 },
14006 outputs: []outputInfo{
14007 {0, 49135},
14008 },
14009 },
14010 },
14011 {
14012 name: "XADDQlock",
14013 auxType: auxSymOff,
14014 argLen: 3,
14015 resultInArg0: true,
14016 clobberFlags: true,
14017 faultOnNilArg1: true,
14018 hasSideEffects: true,
14019 symEffect: SymRdWr,
14020 asm: x86.AXADDQ,
14021 reg: regInfo{
14022 inputs: []inputInfo{
14023 {0, 49135},
14024 {1, 4295032831},
14025 },
14026 outputs: []outputInfo{
14027 {0, 49135},
14028 },
14029 },
14030 },
14031 {
14032 name: "AddTupleFirst32",
14033 argLen: 2,
14034 reg: regInfo{},
14035 },
14036 {
14037 name: "AddTupleFirst64",
14038 argLen: 2,
14039 reg: regInfo{},
14040 },
14041 {
14042 name: "CMPXCHGLlock",
14043 auxType: auxSymOff,
14044 argLen: 4,
14045 clobberFlags: true,
14046 faultOnNilArg0: true,
14047 hasSideEffects: true,
14048 symEffect: SymRdWr,
14049 asm: x86.ACMPXCHGL,
14050 reg: regInfo{
14051 inputs: []inputInfo{
14052 {1, 1},
14053 {0, 49135},
14054 {2, 49135},
14055 },
14056 clobbers: 1,
14057 outputs: []outputInfo{
14058 {1, 0},
14059 {0, 49135},
14060 },
14061 },
14062 },
14063 {
14064 name: "CMPXCHGQlock",
14065 auxType: auxSymOff,
14066 argLen: 4,
14067 clobberFlags: true,
14068 faultOnNilArg0: true,
14069 hasSideEffects: true,
14070 symEffect: SymRdWr,
14071 asm: x86.ACMPXCHGQ,
14072 reg: regInfo{
14073 inputs: []inputInfo{
14074 {1, 1},
14075 {0, 49135},
14076 {2, 49135},
14077 },
14078 clobbers: 1,
14079 outputs: []outputInfo{
14080 {1, 0},
14081 {0, 49135},
14082 },
14083 },
14084 },
14085 {
14086 name: "ANDBlock",
14087 auxType: auxSymOff,
14088 argLen: 3,
14089 clobberFlags: true,
14090 faultOnNilArg0: true,
14091 hasSideEffects: true,
14092 symEffect: SymRdWr,
14093 asm: x86.AANDB,
14094 reg: regInfo{
14095 inputs: []inputInfo{
14096 {1, 49151},
14097 {0, 4295032831},
14098 },
14099 },
14100 },
14101 {
14102 name: "ANDLlock",
14103 auxType: auxSymOff,
14104 argLen: 3,
14105 clobberFlags: true,
14106 faultOnNilArg0: true,
14107 hasSideEffects: true,
14108 symEffect: SymRdWr,
14109 asm: x86.AANDL,
14110 reg: regInfo{
14111 inputs: []inputInfo{
14112 {1, 49151},
14113 {0, 4295032831},
14114 },
14115 },
14116 },
14117 {
14118 name: "ORBlock",
14119 auxType: auxSymOff,
14120 argLen: 3,
14121 clobberFlags: true,
14122 faultOnNilArg0: true,
14123 hasSideEffects: true,
14124 symEffect: SymRdWr,
14125 asm: x86.AORB,
14126 reg: regInfo{
14127 inputs: []inputInfo{
14128 {1, 49151},
14129 {0, 4295032831},
14130 },
14131 },
14132 },
14133 {
14134 name: "ORLlock",
14135 auxType: auxSymOff,
14136 argLen: 3,
14137 clobberFlags: true,
14138 faultOnNilArg0: true,
14139 hasSideEffects: true,
14140 symEffect: SymRdWr,
14141 asm: x86.AORL,
14142 reg: regInfo{
14143 inputs: []inputInfo{
14144 {1, 49151},
14145 {0, 4295032831},
14146 },
14147 },
14148 },
14149 {
14150 name: "PrefetchT0",
14151 argLen: 2,
14152 hasSideEffects: true,
14153 asm: x86.APREFETCHT0,
14154 reg: regInfo{
14155 inputs: []inputInfo{
14156 {0, 4295032831},
14157 },
14158 },
14159 },
14160 {
14161 name: "PrefetchNTA",
14162 argLen: 2,
14163 hasSideEffects: true,
14164 asm: x86.APREFETCHNTA,
14165 reg: regInfo{
14166 inputs: []inputInfo{
14167 {0, 4295032831},
14168 },
14169 },
14170 },
14171 {
14172 name: "ANDNQ",
14173 argLen: 2,
14174 clobberFlags: true,
14175 asm: x86.AANDNQ,
14176 reg: regInfo{
14177 inputs: []inputInfo{
14178 {0, 49135},
14179 {1, 49135},
14180 },
14181 outputs: []outputInfo{
14182 {0, 49135},
14183 },
14184 },
14185 },
14186 {
14187 name: "ANDNL",
14188 argLen: 2,
14189 clobberFlags: true,
14190 asm: x86.AANDNL,
14191 reg: regInfo{
14192 inputs: []inputInfo{
14193 {0, 49135},
14194 {1, 49135},
14195 },
14196 outputs: []outputInfo{
14197 {0, 49135},
14198 },
14199 },
14200 },
14201 {
14202 name: "BLSIQ",
14203 argLen: 1,
14204 clobberFlags: true,
14205 asm: x86.ABLSIQ,
14206 reg: regInfo{
14207 inputs: []inputInfo{
14208 {0, 49135},
14209 },
14210 outputs: []outputInfo{
14211 {0, 49135},
14212 },
14213 },
14214 },
14215 {
14216 name: "BLSIL",
14217 argLen: 1,
14218 clobberFlags: true,
14219 asm: x86.ABLSIL,
14220 reg: regInfo{
14221 inputs: []inputInfo{
14222 {0, 49135},
14223 },
14224 outputs: []outputInfo{
14225 {0, 49135},
14226 },
14227 },
14228 },
14229 {
14230 name: "BLSMSKQ",
14231 argLen: 1,
14232 clobberFlags: true,
14233 asm: x86.ABLSMSKQ,
14234 reg: regInfo{
14235 inputs: []inputInfo{
14236 {0, 49135},
14237 },
14238 outputs: []outputInfo{
14239 {0, 49135},
14240 },
14241 },
14242 },
14243 {
14244 name: "BLSMSKL",
14245 argLen: 1,
14246 clobberFlags: true,
14247 asm: x86.ABLSMSKL,
14248 reg: regInfo{
14249 inputs: []inputInfo{
14250 {0, 49135},
14251 },
14252 outputs: []outputInfo{
14253 {0, 49135},
14254 },
14255 },
14256 },
14257 {
14258 name: "BLSRQ",
14259 argLen: 1,
14260 asm: x86.ABLSRQ,
14261 reg: regInfo{
14262 inputs: []inputInfo{
14263 {0, 49135},
14264 },
14265 outputs: []outputInfo{
14266 {1, 0},
14267 {0, 49135},
14268 },
14269 },
14270 },
14271 {
14272 name: "BLSRL",
14273 argLen: 1,
14274 asm: x86.ABLSRL,
14275 reg: regInfo{
14276 inputs: []inputInfo{
14277 {0, 49135},
14278 },
14279 outputs: []outputInfo{
14280 {1, 0},
14281 {0, 49135},
14282 },
14283 },
14284 },
14285 {
14286 name: "TZCNTQ",
14287 argLen: 1,
14288 clobberFlags: true,
14289 asm: x86.ATZCNTQ,
14290 reg: regInfo{
14291 inputs: []inputInfo{
14292 {0, 49135},
14293 },
14294 outputs: []outputInfo{
14295 {0, 49135},
14296 },
14297 },
14298 },
14299 {
14300 name: "TZCNTL",
14301 argLen: 1,
14302 clobberFlags: true,
14303 asm: x86.ATZCNTL,
14304 reg: regInfo{
14305 inputs: []inputInfo{
14306 {0, 49135},
14307 },
14308 outputs: []outputInfo{
14309 {0, 49135},
14310 },
14311 },
14312 },
14313 {
14314 name: "LZCNTQ",
14315 argLen: 1,
14316 clobberFlags: true,
14317 asm: x86.ALZCNTQ,
14318 reg: regInfo{
14319 inputs: []inputInfo{
14320 {0, 49135},
14321 },
14322 outputs: []outputInfo{
14323 {0, 49135},
14324 },
14325 },
14326 },
14327 {
14328 name: "LZCNTL",
14329 argLen: 1,
14330 clobberFlags: true,
14331 asm: x86.ALZCNTL,
14332 reg: regInfo{
14333 inputs: []inputInfo{
14334 {0, 49135},
14335 },
14336 outputs: []outputInfo{
14337 {0, 49135},
14338 },
14339 },
14340 },
14341 {
14342 name: "MOVBEWstore",
14343 auxType: auxSymOff,
14344 argLen: 3,
14345 faultOnNilArg0: true,
14346 symEffect: SymWrite,
14347 asm: x86.AMOVBEW,
14348 reg: regInfo{
14349 inputs: []inputInfo{
14350 {1, 49151},
14351 {0, 4295032831},
14352 },
14353 },
14354 },
14355 {
14356 name: "MOVBELload",
14357 auxType: auxSymOff,
14358 argLen: 2,
14359 faultOnNilArg0: true,
14360 symEffect: SymRead,
14361 asm: x86.AMOVBEL,
14362 reg: regInfo{
14363 inputs: []inputInfo{
14364 {0, 4295032831},
14365 },
14366 outputs: []outputInfo{
14367 {0, 49135},
14368 },
14369 },
14370 },
14371 {
14372 name: "MOVBELstore",
14373 auxType: auxSymOff,
14374 argLen: 3,
14375 faultOnNilArg0: true,
14376 symEffect: SymWrite,
14377 asm: x86.AMOVBEL,
14378 reg: regInfo{
14379 inputs: []inputInfo{
14380 {1, 49151},
14381 {0, 4295032831},
14382 },
14383 },
14384 },
14385 {
14386 name: "MOVBEQload",
14387 auxType: auxSymOff,
14388 argLen: 2,
14389 faultOnNilArg0: true,
14390 symEffect: SymRead,
14391 asm: x86.AMOVBEQ,
14392 reg: regInfo{
14393 inputs: []inputInfo{
14394 {0, 4295032831},
14395 },
14396 outputs: []outputInfo{
14397 {0, 49135},
14398 },
14399 },
14400 },
14401 {
14402 name: "MOVBEQstore",
14403 auxType: auxSymOff,
14404 argLen: 3,
14405 faultOnNilArg0: true,
14406 symEffect: SymWrite,
14407 asm: x86.AMOVBEQ,
14408 reg: regInfo{
14409 inputs: []inputInfo{
14410 {1, 49151},
14411 {0, 4295032831},
14412 },
14413 },
14414 },
14415 {
14416 name: "MOVBELloadidx1",
14417 auxType: auxSymOff,
14418 argLen: 3,
14419 commutative: true,
14420 symEffect: SymRead,
14421 asm: x86.AMOVBEL,
14422 scale: 1,
14423 reg: regInfo{
14424 inputs: []inputInfo{
14425 {1, 49151},
14426 {0, 4295032831},
14427 },
14428 outputs: []outputInfo{
14429 {0, 49135},
14430 },
14431 },
14432 },
14433 {
14434 name: "MOVBELloadidx4",
14435 auxType: auxSymOff,
14436 argLen: 3,
14437 symEffect: SymRead,
14438 asm: x86.AMOVBEL,
14439 scale: 4,
14440 reg: regInfo{
14441 inputs: []inputInfo{
14442 {1, 49151},
14443 {0, 4295032831},
14444 },
14445 outputs: []outputInfo{
14446 {0, 49135},
14447 },
14448 },
14449 },
14450 {
14451 name: "MOVBELloadidx8",
14452 auxType: auxSymOff,
14453 argLen: 3,
14454 symEffect: SymRead,
14455 asm: x86.AMOVBEL,
14456 scale: 8,
14457 reg: regInfo{
14458 inputs: []inputInfo{
14459 {1, 49151},
14460 {0, 4295032831},
14461 },
14462 outputs: []outputInfo{
14463 {0, 49135},
14464 },
14465 },
14466 },
14467 {
14468 name: "MOVBEQloadidx1",
14469 auxType: auxSymOff,
14470 argLen: 3,
14471 commutative: true,
14472 symEffect: SymRead,
14473 asm: x86.AMOVBEQ,
14474 scale: 1,
14475 reg: regInfo{
14476 inputs: []inputInfo{
14477 {1, 49151},
14478 {0, 4295032831},
14479 },
14480 outputs: []outputInfo{
14481 {0, 49135},
14482 },
14483 },
14484 },
14485 {
14486 name: "MOVBEQloadidx8",
14487 auxType: auxSymOff,
14488 argLen: 3,
14489 symEffect: SymRead,
14490 asm: x86.AMOVBEQ,
14491 scale: 8,
14492 reg: regInfo{
14493 inputs: []inputInfo{
14494 {1, 49151},
14495 {0, 4295032831},
14496 },
14497 outputs: []outputInfo{
14498 {0, 49135},
14499 },
14500 },
14501 },
14502 {
14503 name: "MOVBEWstoreidx1",
14504 auxType: auxSymOff,
14505 argLen: 4,
14506 commutative: true,
14507 symEffect: SymWrite,
14508 asm: x86.AMOVBEW,
14509 scale: 1,
14510 reg: regInfo{
14511 inputs: []inputInfo{
14512 {1, 49151},
14513 {2, 49151},
14514 {0, 4295032831},
14515 },
14516 },
14517 },
14518 {
14519 name: "MOVBEWstoreidx2",
14520 auxType: auxSymOff,
14521 argLen: 4,
14522 symEffect: SymWrite,
14523 asm: x86.AMOVBEW,
14524 scale: 2,
14525 reg: regInfo{
14526 inputs: []inputInfo{
14527 {1, 49151},
14528 {2, 49151},
14529 {0, 4295032831},
14530 },
14531 },
14532 },
14533 {
14534 name: "MOVBELstoreidx1",
14535 auxType: auxSymOff,
14536 argLen: 4,
14537 commutative: true,
14538 symEffect: SymWrite,
14539 asm: x86.AMOVBEL,
14540 scale: 1,
14541 reg: regInfo{
14542 inputs: []inputInfo{
14543 {1, 49151},
14544 {2, 49151},
14545 {0, 4295032831},
14546 },
14547 },
14548 },
14549 {
14550 name: "MOVBELstoreidx4",
14551 auxType: auxSymOff,
14552 argLen: 4,
14553 symEffect: SymWrite,
14554 asm: x86.AMOVBEL,
14555 scale: 4,
14556 reg: regInfo{
14557 inputs: []inputInfo{
14558 {1, 49151},
14559 {2, 49151},
14560 {0, 4295032831},
14561 },
14562 },
14563 },
14564 {
14565 name: "MOVBELstoreidx8",
14566 auxType: auxSymOff,
14567 argLen: 4,
14568 symEffect: SymWrite,
14569 asm: x86.AMOVBEL,
14570 scale: 8,
14571 reg: regInfo{
14572 inputs: []inputInfo{
14573 {1, 49151},
14574 {2, 49151},
14575 {0, 4295032831},
14576 },
14577 },
14578 },
14579 {
14580 name: "MOVBEQstoreidx1",
14581 auxType: auxSymOff,
14582 argLen: 4,
14583 commutative: true,
14584 symEffect: SymWrite,
14585 asm: x86.AMOVBEQ,
14586 scale: 1,
14587 reg: regInfo{
14588 inputs: []inputInfo{
14589 {1, 49151},
14590 {2, 49151},
14591 {0, 4295032831},
14592 },
14593 },
14594 },
14595 {
14596 name: "MOVBEQstoreidx8",
14597 auxType: auxSymOff,
14598 argLen: 4,
14599 symEffect: SymWrite,
14600 asm: x86.AMOVBEQ,
14601 scale: 8,
14602 reg: regInfo{
14603 inputs: []inputInfo{
14604 {1, 49151},
14605 {2, 49151},
14606 {0, 4295032831},
14607 },
14608 },
14609 },
14610 {
14611 name: "SARXQ",
14612 argLen: 2,
14613 asm: x86.ASARXQ,
14614 reg: regInfo{
14615 inputs: []inputInfo{
14616 {0, 49135},
14617 {1, 49135},
14618 },
14619 outputs: []outputInfo{
14620 {0, 49135},
14621 },
14622 },
14623 },
14624 {
14625 name: "SARXL",
14626 argLen: 2,
14627 asm: x86.ASARXL,
14628 reg: regInfo{
14629 inputs: []inputInfo{
14630 {0, 49135},
14631 {1, 49135},
14632 },
14633 outputs: []outputInfo{
14634 {0, 49135},
14635 },
14636 },
14637 },
14638 {
14639 name: "SHLXQ",
14640 argLen: 2,
14641 asm: x86.ASHLXQ,
14642 reg: regInfo{
14643 inputs: []inputInfo{
14644 {0, 49135},
14645 {1, 49135},
14646 },
14647 outputs: []outputInfo{
14648 {0, 49135},
14649 },
14650 },
14651 },
14652 {
14653 name: "SHLXL",
14654 argLen: 2,
14655 asm: x86.ASHLXL,
14656 reg: regInfo{
14657 inputs: []inputInfo{
14658 {0, 49135},
14659 {1, 49135},
14660 },
14661 outputs: []outputInfo{
14662 {0, 49135},
14663 },
14664 },
14665 },
14666 {
14667 name: "SHRXQ",
14668 argLen: 2,
14669 asm: x86.ASHRXQ,
14670 reg: regInfo{
14671 inputs: []inputInfo{
14672 {0, 49135},
14673 {1, 49135},
14674 },
14675 outputs: []outputInfo{
14676 {0, 49135},
14677 },
14678 },
14679 },
14680 {
14681 name: "SHRXL",
14682 argLen: 2,
14683 asm: x86.ASHRXL,
14684 reg: regInfo{
14685 inputs: []inputInfo{
14686 {0, 49135},
14687 {1, 49135},
14688 },
14689 outputs: []outputInfo{
14690 {0, 49135},
14691 },
14692 },
14693 },
14694 {
14695 name: "SARXLload",
14696 auxType: auxSymOff,
14697 argLen: 3,
14698 faultOnNilArg0: true,
14699 symEffect: SymRead,
14700 asm: x86.ASARXL,
14701 reg: regInfo{
14702 inputs: []inputInfo{
14703 {1, 49135},
14704 {0, 4295032831},
14705 },
14706 outputs: []outputInfo{
14707 {0, 49135},
14708 },
14709 },
14710 },
14711 {
14712 name: "SARXQload",
14713 auxType: auxSymOff,
14714 argLen: 3,
14715 faultOnNilArg0: true,
14716 symEffect: SymRead,
14717 asm: x86.ASARXQ,
14718 reg: regInfo{
14719 inputs: []inputInfo{
14720 {1, 49135},
14721 {0, 4295032831},
14722 },
14723 outputs: []outputInfo{
14724 {0, 49135},
14725 },
14726 },
14727 },
14728 {
14729 name: "SHLXLload",
14730 auxType: auxSymOff,
14731 argLen: 3,
14732 faultOnNilArg0: true,
14733 symEffect: SymRead,
14734 asm: x86.ASHLXL,
14735 reg: regInfo{
14736 inputs: []inputInfo{
14737 {1, 49135},
14738 {0, 4295032831},
14739 },
14740 outputs: []outputInfo{
14741 {0, 49135},
14742 },
14743 },
14744 },
14745 {
14746 name: "SHLXQload",
14747 auxType: auxSymOff,
14748 argLen: 3,
14749 faultOnNilArg0: true,
14750 symEffect: SymRead,
14751 asm: x86.ASHLXQ,
14752 reg: regInfo{
14753 inputs: []inputInfo{
14754 {1, 49135},
14755 {0, 4295032831},
14756 },
14757 outputs: []outputInfo{
14758 {0, 49135},
14759 },
14760 },
14761 },
14762 {
14763 name: "SHRXLload",
14764 auxType: auxSymOff,
14765 argLen: 3,
14766 faultOnNilArg0: true,
14767 symEffect: SymRead,
14768 asm: x86.ASHRXL,
14769 reg: regInfo{
14770 inputs: []inputInfo{
14771 {1, 49135},
14772 {0, 4295032831},
14773 },
14774 outputs: []outputInfo{
14775 {0, 49135},
14776 },
14777 },
14778 },
14779 {
14780 name: "SHRXQload",
14781 auxType: auxSymOff,
14782 argLen: 3,
14783 faultOnNilArg0: true,
14784 symEffect: SymRead,
14785 asm: x86.ASHRXQ,
14786 reg: regInfo{
14787 inputs: []inputInfo{
14788 {1, 49135},
14789 {0, 4295032831},
14790 },
14791 outputs: []outputInfo{
14792 {0, 49135},
14793 },
14794 },
14795 },
14796 {
14797 name: "SARXLloadidx1",
14798 auxType: auxSymOff,
14799 argLen: 4,
14800 faultOnNilArg0: true,
14801 symEffect: SymRead,
14802 asm: x86.ASARXL,
14803 scale: 1,
14804 reg: regInfo{
14805 inputs: []inputInfo{
14806 {2, 49135},
14807 {1, 49151},
14808 {0, 4295032831},
14809 },
14810 outputs: []outputInfo{
14811 {0, 49135},
14812 },
14813 },
14814 },
14815 {
14816 name: "SARXLloadidx4",
14817 auxType: auxSymOff,
14818 argLen: 4,
14819 faultOnNilArg0: true,
14820 symEffect: SymRead,
14821 asm: x86.ASARXL,
14822 scale: 4,
14823 reg: regInfo{
14824 inputs: []inputInfo{
14825 {2, 49135},
14826 {1, 49151},
14827 {0, 4295032831},
14828 },
14829 outputs: []outputInfo{
14830 {0, 49135},
14831 },
14832 },
14833 },
14834 {
14835 name: "SARXLloadidx8",
14836 auxType: auxSymOff,
14837 argLen: 4,
14838 faultOnNilArg0: true,
14839 symEffect: SymRead,
14840 asm: x86.ASARXL,
14841 scale: 8,
14842 reg: regInfo{
14843 inputs: []inputInfo{
14844 {2, 49135},
14845 {1, 49151},
14846 {0, 4295032831},
14847 },
14848 outputs: []outputInfo{
14849 {0, 49135},
14850 },
14851 },
14852 },
14853 {
14854 name: "SARXQloadidx1",
14855 auxType: auxSymOff,
14856 argLen: 4,
14857 faultOnNilArg0: true,
14858 symEffect: SymRead,
14859 asm: x86.ASARXQ,
14860 scale: 1,
14861 reg: regInfo{
14862 inputs: []inputInfo{
14863 {2, 49135},
14864 {1, 49151},
14865 {0, 4295032831},
14866 },
14867 outputs: []outputInfo{
14868 {0, 49135},
14869 },
14870 },
14871 },
14872 {
14873 name: "SARXQloadidx8",
14874 auxType: auxSymOff,
14875 argLen: 4,
14876 faultOnNilArg0: true,
14877 symEffect: SymRead,
14878 asm: x86.ASARXQ,
14879 scale: 8,
14880 reg: regInfo{
14881 inputs: []inputInfo{
14882 {2, 49135},
14883 {1, 49151},
14884 {0, 4295032831},
14885 },
14886 outputs: []outputInfo{
14887 {0, 49135},
14888 },
14889 },
14890 },
14891 {
14892 name: "SHLXLloadidx1",
14893 auxType: auxSymOff,
14894 argLen: 4,
14895 faultOnNilArg0: true,
14896 symEffect: SymRead,
14897 asm: x86.ASHLXL,
14898 scale: 1,
14899 reg: regInfo{
14900 inputs: []inputInfo{
14901 {2, 49135},
14902 {1, 49151},
14903 {0, 4295032831},
14904 },
14905 outputs: []outputInfo{
14906 {0, 49135},
14907 },
14908 },
14909 },
14910 {
14911 name: "SHLXLloadidx4",
14912 auxType: auxSymOff,
14913 argLen: 4,
14914 faultOnNilArg0: true,
14915 symEffect: SymRead,
14916 asm: x86.ASHLXL,
14917 scale: 4,
14918 reg: regInfo{
14919 inputs: []inputInfo{
14920 {2, 49135},
14921 {1, 49151},
14922 {0, 4295032831},
14923 },
14924 outputs: []outputInfo{
14925 {0, 49135},
14926 },
14927 },
14928 },
14929 {
14930 name: "SHLXLloadidx8",
14931 auxType: auxSymOff,
14932 argLen: 4,
14933 faultOnNilArg0: true,
14934 symEffect: SymRead,
14935 asm: x86.ASHLXL,
14936 scale: 8,
14937 reg: regInfo{
14938 inputs: []inputInfo{
14939 {2, 49135},
14940 {1, 49151},
14941 {0, 4295032831},
14942 },
14943 outputs: []outputInfo{
14944 {0, 49135},
14945 },
14946 },
14947 },
14948 {
14949 name: "SHLXQloadidx1",
14950 auxType: auxSymOff,
14951 argLen: 4,
14952 faultOnNilArg0: true,
14953 symEffect: SymRead,
14954 asm: x86.ASHLXQ,
14955 scale: 1,
14956 reg: regInfo{
14957 inputs: []inputInfo{
14958 {2, 49135},
14959 {1, 49151},
14960 {0, 4295032831},
14961 },
14962 outputs: []outputInfo{
14963 {0, 49135},
14964 },
14965 },
14966 },
14967 {
14968 name: "SHLXQloadidx8",
14969 auxType: auxSymOff,
14970 argLen: 4,
14971 faultOnNilArg0: true,
14972 symEffect: SymRead,
14973 asm: x86.ASHLXQ,
14974 scale: 8,
14975 reg: regInfo{
14976 inputs: []inputInfo{
14977 {2, 49135},
14978 {1, 49151},
14979 {0, 4295032831},
14980 },
14981 outputs: []outputInfo{
14982 {0, 49135},
14983 },
14984 },
14985 },
14986 {
14987 name: "SHRXLloadidx1",
14988 auxType: auxSymOff,
14989 argLen: 4,
14990 faultOnNilArg0: true,
14991 symEffect: SymRead,
14992 asm: x86.ASHRXL,
14993 scale: 1,
14994 reg: regInfo{
14995 inputs: []inputInfo{
14996 {2, 49135},
14997 {1, 49151},
14998 {0, 4295032831},
14999 },
15000 outputs: []outputInfo{
15001 {0, 49135},
15002 },
15003 },
15004 },
15005 {
15006 name: "SHRXLloadidx4",
15007 auxType: auxSymOff,
15008 argLen: 4,
15009 faultOnNilArg0: true,
15010 symEffect: SymRead,
15011 asm: x86.ASHRXL,
15012 scale: 4,
15013 reg: regInfo{
15014 inputs: []inputInfo{
15015 {2, 49135},
15016 {1, 49151},
15017 {0, 4295032831},
15018 },
15019 outputs: []outputInfo{
15020 {0, 49135},
15021 },
15022 },
15023 },
15024 {
15025 name: "SHRXLloadidx8",
15026 auxType: auxSymOff,
15027 argLen: 4,
15028 faultOnNilArg0: true,
15029 symEffect: SymRead,
15030 asm: x86.ASHRXL,
15031 scale: 8,
15032 reg: regInfo{
15033 inputs: []inputInfo{
15034 {2, 49135},
15035 {1, 49151},
15036 {0, 4295032831},
15037 },
15038 outputs: []outputInfo{
15039 {0, 49135},
15040 },
15041 },
15042 },
15043 {
15044 name: "SHRXQloadidx1",
15045 auxType: auxSymOff,
15046 argLen: 4,
15047 faultOnNilArg0: true,
15048 symEffect: SymRead,
15049 asm: x86.ASHRXQ,
15050 scale: 1,
15051 reg: regInfo{
15052 inputs: []inputInfo{
15053 {2, 49135},
15054 {1, 49151},
15055 {0, 4295032831},
15056 },
15057 outputs: []outputInfo{
15058 {0, 49135},
15059 },
15060 },
15061 },
15062 {
15063 name: "SHRXQloadidx8",
15064 auxType: auxSymOff,
15065 argLen: 4,
15066 faultOnNilArg0: true,
15067 symEffect: SymRead,
15068 asm: x86.ASHRXQ,
15069 scale: 8,
15070 reg: regInfo{
15071 inputs: []inputInfo{
15072 {2, 49135},
15073 {1, 49151},
15074 {0, 4295032831},
15075 },
15076 outputs: []outputInfo{
15077 {0, 49135},
15078 },
15079 },
15080 },
15081
15082 {
15083 name: "ADD",
15084 argLen: 2,
15085 commutative: true,
15086 asm: arm.AADD,
15087 reg: regInfo{
15088 inputs: []inputInfo{
15089 {0, 22527},
15090 {1, 22527},
15091 },
15092 outputs: []outputInfo{
15093 {0, 21503},
15094 },
15095 },
15096 },
15097 {
15098 name: "ADDconst",
15099 auxType: auxInt32,
15100 argLen: 1,
15101 asm: arm.AADD,
15102 reg: regInfo{
15103 inputs: []inputInfo{
15104 {0, 30719},
15105 },
15106 outputs: []outputInfo{
15107 {0, 21503},
15108 },
15109 },
15110 },
15111 {
15112 name: "SUB",
15113 argLen: 2,
15114 asm: arm.ASUB,
15115 reg: regInfo{
15116 inputs: []inputInfo{
15117 {0, 22527},
15118 {1, 22527},
15119 },
15120 outputs: []outputInfo{
15121 {0, 21503},
15122 },
15123 },
15124 },
15125 {
15126 name: "SUBconst",
15127 auxType: auxInt32,
15128 argLen: 1,
15129 asm: arm.ASUB,
15130 reg: regInfo{
15131 inputs: []inputInfo{
15132 {0, 22527},
15133 },
15134 outputs: []outputInfo{
15135 {0, 21503},
15136 },
15137 },
15138 },
15139 {
15140 name: "RSB",
15141 argLen: 2,
15142 asm: arm.ARSB,
15143 reg: regInfo{
15144 inputs: []inputInfo{
15145 {0, 22527},
15146 {1, 22527},
15147 },
15148 outputs: []outputInfo{
15149 {0, 21503},
15150 },
15151 },
15152 },
15153 {
15154 name: "RSBconst",
15155 auxType: auxInt32,
15156 argLen: 1,
15157 asm: arm.ARSB,
15158 reg: regInfo{
15159 inputs: []inputInfo{
15160 {0, 22527},
15161 },
15162 outputs: []outputInfo{
15163 {0, 21503},
15164 },
15165 },
15166 },
15167 {
15168 name: "MUL",
15169 argLen: 2,
15170 commutative: true,
15171 asm: arm.AMUL,
15172 reg: regInfo{
15173 inputs: []inputInfo{
15174 {0, 22527},
15175 {1, 22527},
15176 },
15177 outputs: []outputInfo{
15178 {0, 21503},
15179 },
15180 },
15181 },
15182 {
15183 name: "HMUL",
15184 argLen: 2,
15185 commutative: true,
15186 asm: arm.AMULL,
15187 reg: regInfo{
15188 inputs: []inputInfo{
15189 {0, 22527},
15190 {1, 22527},
15191 },
15192 outputs: []outputInfo{
15193 {0, 21503},
15194 },
15195 },
15196 },
15197 {
15198 name: "HMULU",
15199 argLen: 2,
15200 commutative: true,
15201 asm: arm.AMULLU,
15202 reg: regInfo{
15203 inputs: []inputInfo{
15204 {0, 22527},
15205 {1, 22527},
15206 },
15207 outputs: []outputInfo{
15208 {0, 21503},
15209 },
15210 },
15211 },
15212 {
15213 name: "CALLudiv",
15214 argLen: 2,
15215 clobberFlags: true,
15216 reg: regInfo{
15217 inputs: []inputInfo{
15218 {0, 2},
15219 {1, 1},
15220 },
15221 clobbers: 20492,
15222 outputs: []outputInfo{
15223 {0, 1},
15224 {1, 2},
15225 },
15226 },
15227 },
15228 {
15229 name: "ADDS",
15230 argLen: 2,
15231 commutative: true,
15232 asm: arm.AADD,
15233 reg: regInfo{
15234 inputs: []inputInfo{
15235 {0, 22527},
15236 {1, 22527},
15237 },
15238 outputs: []outputInfo{
15239 {1, 0},
15240 {0, 21503},
15241 },
15242 },
15243 },
15244 {
15245 name: "ADDSconst",
15246 auxType: auxInt32,
15247 argLen: 1,
15248 asm: arm.AADD,
15249 reg: regInfo{
15250 inputs: []inputInfo{
15251 {0, 22527},
15252 },
15253 outputs: []outputInfo{
15254 {1, 0},
15255 {0, 21503},
15256 },
15257 },
15258 },
15259 {
15260 name: "ADC",
15261 argLen: 3,
15262 commutative: true,
15263 asm: arm.AADC,
15264 reg: regInfo{
15265 inputs: []inputInfo{
15266 {0, 21503},
15267 {1, 21503},
15268 },
15269 outputs: []outputInfo{
15270 {0, 21503},
15271 },
15272 },
15273 },
15274 {
15275 name: "ADCconst",
15276 auxType: auxInt32,
15277 argLen: 2,
15278 asm: arm.AADC,
15279 reg: regInfo{
15280 inputs: []inputInfo{
15281 {0, 21503},
15282 },
15283 outputs: []outputInfo{
15284 {0, 21503},
15285 },
15286 },
15287 },
15288 {
15289 name: "SUBS",
15290 argLen: 2,
15291 asm: arm.ASUB,
15292 reg: regInfo{
15293 inputs: []inputInfo{
15294 {0, 22527},
15295 {1, 22527},
15296 },
15297 outputs: []outputInfo{
15298 {1, 0},
15299 {0, 21503},
15300 },
15301 },
15302 },
15303 {
15304 name: "SUBSconst",
15305 auxType: auxInt32,
15306 argLen: 1,
15307 asm: arm.ASUB,
15308 reg: regInfo{
15309 inputs: []inputInfo{
15310 {0, 22527},
15311 },
15312 outputs: []outputInfo{
15313 {1, 0},
15314 {0, 21503},
15315 },
15316 },
15317 },
15318 {
15319 name: "RSBSconst",
15320 auxType: auxInt32,
15321 argLen: 1,
15322 asm: arm.ARSB,
15323 reg: regInfo{
15324 inputs: []inputInfo{
15325 {0, 22527},
15326 },
15327 outputs: []outputInfo{
15328 {1, 0},
15329 {0, 21503},
15330 },
15331 },
15332 },
15333 {
15334 name: "SBC",
15335 argLen: 3,
15336 asm: arm.ASBC,
15337 reg: regInfo{
15338 inputs: []inputInfo{
15339 {0, 21503},
15340 {1, 21503},
15341 },
15342 outputs: []outputInfo{
15343 {0, 21503},
15344 },
15345 },
15346 },
15347 {
15348 name: "SBCconst",
15349 auxType: auxInt32,
15350 argLen: 2,
15351 asm: arm.ASBC,
15352 reg: regInfo{
15353 inputs: []inputInfo{
15354 {0, 21503},
15355 },
15356 outputs: []outputInfo{
15357 {0, 21503},
15358 },
15359 },
15360 },
15361 {
15362 name: "RSCconst",
15363 auxType: auxInt32,
15364 argLen: 2,
15365 asm: arm.ARSC,
15366 reg: regInfo{
15367 inputs: []inputInfo{
15368 {0, 21503},
15369 },
15370 outputs: []outputInfo{
15371 {0, 21503},
15372 },
15373 },
15374 },
15375 {
15376 name: "MULLU",
15377 argLen: 2,
15378 commutative: true,
15379 asm: arm.AMULLU,
15380 reg: regInfo{
15381 inputs: []inputInfo{
15382 {0, 22527},
15383 {1, 22527},
15384 },
15385 outputs: []outputInfo{
15386 {0, 21503},
15387 {1, 21503},
15388 },
15389 },
15390 },
15391 {
15392 name: "MULA",
15393 argLen: 3,
15394 asm: arm.AMULA,
15395 reg: regInfo{
15396 inputs: []inputInfo{
15397 {0, 21503},
15398 {1, 21503},
15399 {2, 21503},
15400 },
15401 outputs: []outputInfo{
15402 {0, 21503},
15403 },
15404 },
15405 },
15406 {
15407 name: "MULS",
15408 argLen: 3,
15409 asm: arm.AMULS,
15410 reg: regInfo{
15411 inputs: []inputInfo{
15412 {0, 21503},
15413 {1, 21503},
15414 {2, 21503},
15415 },
15416 outputs: []outputInfo{
15417 {0, 21503},
15418 },
15419 },
15420 },
15421 {
15422 name: "ADDF",
15423 argLen: 2,
15424 commutative: true,
15425 asm: arm.AADDF,
15426 reg: regInfo{
15427 inputs: []inputInfo{
15428 {0, 4294901760},
15429 {1, 4294901760},
15430 },
15431 outputs: []outputInfo{
15432 {0, 4294901760},
15433 },
15434 },
15435 },
15436 {
15437 name: "ADDD",
15438 argLen: 2,
15439 commutative: true,
15440 asm: arm.AADDD,
15441 reg: regInfo{
15442 inputs: []inputInfo{
15443 {0, 4294901760},
15444 {1, 4294901760},
15445 },
15446 outputs: []outputInfo{
15447 {0, 4294901760},
15448 },
15449 },
15450 },
15451 {
15452 name: "SUBF",
15453 argLen: 2,
15454 asm: arm.ASUBF,
15455 reg: regInfo{
15456 inputs: []inputInfo{
15457 {0, 4294901760},
15458 {1, 4294901760},
15459 },
15460 outputs: []outputInfo{
15461 {0, 4294901760},
15462 },
15463 },
15464 },
15465 {
15466 name: "SUBD",
15467 argLen: 2,
15468 asm: arm.ASUBD,
15469 reg: regInfo{
15470 inputs: []inputInfo{
15471 {0, 4294901760},
15472 {1, 4294901760},
15473 },
15474 outputs: []outputInfo{
15475 {0, 4294901760},
15476 },
15477 },
15478 },
15479 {
15480 name: "MULF",
15481 argLen: 2,
15482 commutative: true,
15483 asm: arm.AMULF,
15484 reg: regInfo{
15485 inputs: []inputInfo{
15486 {0, 4294901760},
15487 {1, 4294901760},
15488 },
15489 outputs: []outputInfo{
15490 {0, 4294901760},
15491 },
15492 },
15493 },
15494 {
15495 name: "MULD",
15496 argLen: 2,
15497 commutative: true,
15498 asm: arm.AMULD,
15499 reg: regInfo{
15500 inputs: []inputInfo{
15501 {0, 4294901760},
15502 {1, 4294901760},
15503 },
15504 outputs: []outputInfo{
15505 {0, 4294901760},
15506 },
15507 },
15508 },
15509 {
15510 name: "NMULF",
15511 argLen: 2,
15512 commutative: true,
15513 asm: arm.ANMULF,
15514 reg: regInfo{
15515 inputs: []inputInfo{
15516 {0, 4294901760},
15517 {1, 4294901760},
15518 },
15519 outputs: []outputInfo{
15520 {0, 4294901760},
15521 },
15522 },
15523 },
15524 {
15525 name: "NMULD",
15526 argLen: 2,
15527 commutative: true,
15528 asm: arm.ANMULD,
15529 reg: regInfo{
15530 inputs: []inputInfo{
15531 {0, 4294901760},
15532 {1, 4294901760},
15533 },
15534 outputs: []outputInfo{
15535 {0, 4294901760},
15536 },
15537 },
15538 },
15539 {
15540 name: "DIVF",
15541 argLen: 2,
15542 asm: arm.ADIVF,
15543 reg: regInfo{
15544 inputs: []inputInfo{
15545 {0, 4294901760},
15546 {1, 4294901760},
15547 },
15548 outputs: []outputInfo{
15549 {0, 4294901760},
15550 },
15551 },
15552 },
15553 {
15554 name: "DIVD",
15555 argLen: 2,
15556 asm: arm.ADIVD,
15557 reg: regInfo{
15558 inputs: []inputInfo{
15559 {0, 4294901760},
15560 {1, 4294901760},
15561 },
15562 outputs: []outputInfo{
15563 {0, 4294901760},
15564 },
15565 },
15566 },
15567 {
15568 name: "MULAF",
15569 argLen: 3,
15570 resultInArg0: true,
15571 asm: arm.AMULAF,
15572 reg: regInfo{
15573 inputs: []inputInfo{
15574 {0, 4294901760},
15575 {1, 4294901760},
15576 {2, 4294901760},
15577 },
15578 outputs: []outputInfo{
15579 {0, 4294901760},
15580 },
15581 },
15582 },
15583 {
15584 name: "MULAD",
15585 argLen: 3,
15586 resultInArg0: true,
15587 asm: arm.AMULAD,
15588 reg: regInfo{
15589 inputs: []inputInfo{
15590 {0, 4294901760},
15591 {1, 4294901760},
15592 {2, 4294901760},
15593 },
15594 outputs: []outputInfo{
15595 {0, 4294901760},
15596 },
15597 },
15598 },
15599 {
15600 name: "MULSF",
15601 argLen: 3,
15602 resultInArg0: true,
15603 asm: arm.AMULSF,
15604 reg: regInfo{
15605 inputs: []inputInfo{
15606 {0, 4294901760},
15607 {1, 4294901760},
15608 {2, 4294901760},
15609 },
15610 outputs: []outputInfo{
15611 {0, 4294901760},
15612 },
15613 },
15614 },
15615 {
15616 name: "MULSD",
15617 argLen: 3,
15618 resultInArg0: true,
15619 asm: arm.AMULSD,
15620 reg: regInfo{
15621 inputs: []inputInfo{
15622 {0, 4294901760},
15623 {1, 4294901760},
15624 {2, 4294901760},
15625 },
15626 outputs: []outputInfo{
15627 {0, 4294901760},
15628 },
15629 },
15630 },
15631 {
15632 name: "FMULAD",
15633 argLen: 3,
15634 resultInArg0: true,
15635 asm: arm.AFMULAD,
15636 reg: regInfo{
15637 inputs: []inputInfo{
15638 {0, 4294901760},
15639 {1, 4294901760},
15640 {2, 4294901760},
15641 },
15642 outputs: []outputInfo{
15643 {0, 4294901760},
15644 },
15645 },
15646 },
15647 {
15648 name: "AND",
15649 argLen: 2,
15650 commutative: true,
15651 asm: arm.AAND,
15652 reg: regInfo{
15653 inputs: []inputInfo{
15654 {0, 22527},
15655 {1, 22527},
15656 },
15657 outputs: []outputInfo{
15658 {0, 21503},
15659 },
15660 },
15661 },
15662 {
15663 name: "ANDconst",
15664 auxType: auxInt32,
15665 argLen: 1,
15666 asm: arm.AAND,
15667 reg: regInfo{
15668 inputs: []inputInfo{
15669 {0, 22527},
15670 },
15671 outputs: []outputInfo{
15672 {0, 21503},
15673 },
15674 },
15675 },
15676 {
15677 name: "OR",
15678 argLen: 2,
15679 commutative: true,
15680 asm: arm.AORR,
15681 reg: regInfo{
15682 inputs: []inputInfo{
15683 {0, 22527},
15684 {1, 22527},
15685 },
15686 outputs: []outputInfo{
15687 {0, 21503},
15688 },
15689 },
15690 },
15691 {
15692 name: "ORconst",
15693 auxType: auxInt32,
15694 argLen: 1,
15695 asm: arm.AORR,
15696 reg: regInfo{
15697 inputs: []inputInfo{
15698 {0, 22527},
15699 },
15700 outputs: []outputInfo{
15701 {0, 21503},
15702 },
15703 },
15704 },
15705 {
15706 name: "XOR",
15707 argLen: 2,
15708 commutative: true,
15709 asm: arm.AEOR,
15710 reg: regInfo{
15711 inputs: []inputInfo{
15712 {0, 22527},
15713 {1, 22527},
15714 },
15715 outputs: []outputInfo{
15716 {0, 21503},
15717 },
15718 },
15719 },
15720 {
15721 name: "XORconst",
15722 auxType: auxInt32,
15723 argLen: 1,
15724 asm: arm.AEOR,
15725 reg: regInfo{
15726 inputs: []inputInfo{
15727 {0, 22527},
15728 },
15729 outputs: []outputInfo{
15730 {0, 21503},
15731 },
15732 },
15733 },
15734 {
15735 name: "BIC",
15736 argLen: 2,
15737 asm: arm.ABIC,
15738 reg: regInfo{
15739 inputs: []inputInfo{
15740 {0, 22527},
15741 {1, 22527},
15742 },
15743 outputs: []outputInfo{
15744 {0, 21503},
15745 },
15746 },
15747 },
15748 {
15749 name: "BICconst",
15750 auxType: auxInt32,
15751 argLen: 1,
15752 asm: arm.ABIC,
15753 reg: regInfo{
15754 inputs: []inputInfo{
15755 {0, 22527},
15756 },
15757 outputs: []outputInfo{
15758 {0, 21503},
15759 },
15760 },
15761 },
15762 {
15763 name: "BFX",
15764 auxType: auxInt32,
15765 argLen: 1,
15766 asm: arm.ABFX,
15767 reg: regInfo{
15768 inputs: []inputInfo{
15769 {0, 22527},
15770 },
15771 outputs: []outputInfo{
15772 {0, 21503},
15773 },
15774 },
15775 },
15776 {
15777 name: "BFXU",
15778 auxType: auxInt32,
15779 argLen: 1,
15780 asm: arm.ABFXU,
15781 reg: regInfo{
15782 inputs: []inputInfo{
15783 {0, 22527},
15784 },
15785 outputs: []outputInfo{
15786 {0, 21503},
15787 },
15788 },
15789 },
15790 {
15791 name: "MVN",
15792 argLen: 1,
15793 asm: arm.AMVN,
15794 reg: regInfo{
15795 inputs: []inputInfo{
15796 {0, 22527},
15797 },
15798 outputs: []outputInfo{
15799 {0, 21503},
15800 },
15801 },
15802 },
15803 {
15804 name: "NEGF",
15805 argLen: 1,
15806 asm: arm.ANEGF,
15807 reg: regInfo{
15808 inputs: []inputInfo{
15809 {0, 4294901760},
15810 },
15811 outputs: []outputInfo{
15812 {0, 4294901760},
15813 },
15814 },
15815 },
15816 {
15817 name: "NEGD",
15818 argLen: 1,
15819 asm: arm.ANEGD,
15820 reg: regInfo{
15821 inputs: []inputInfo{
15822 {0, 4294901760},
15823 },
15824 outputs: []outputInfo{
15825 {0, 4294901760},
15826 },
15827 },
15828 },
15829 {
15830 name: "SQRTD",
15831 argLen: 1,
15832 asm: arm.ASQRTD,
15833 reg: regInfo{
15834 inputs: []inputInfo{
15835 {0, 4294901760},
15836 },
15837 outputs: []outputInfo{
15838 {0, 4294901760},
15839 },
15840 },
15841 },
15842 {
15843 name: "SQRTF",
15844 argLen: 1,
15845 asm: arm.ASQRTF,
15846 reg: regInfo{
15847 inputs: []inputInfo{
15848 {0, 4294901760},
15849 },
15850 outputs: []outputInfo{
15851 {0, 4294901760},
15852 },
15853 },
15854 },
15855 {
15856 name: "ABSD",
15857 argLen: 1,
15858 asm: arm.AABSD,
15859 reg: regInfo{
15860 inputs: []inputInfo{
15861 {0, 4294901760},
15862 },
15863 outputs: []outputInfo{
15864 {0, 4294901760},
15865 },
15866 },
15867 },
15868 {
15869 name: "CLZ",
15870 argLen: 1,
15871 asm: arm.ACLZ,
15872 reg: regInfo{
15873 inputs: []inputInfo{
15874 {0, 22527},
15875 },
15876 outputs: []outputInfo{
15877 {0, 21503},
15878 },
15879 },
15880 },
15881 {
15882 name: "REV",
15883 argLen: 1,
15884 asm: arm.AREV,
15885 reg: regInfo{
15886 inputs: []inputInfo{
15887 {0, 22527},
15888 },
15889 outputs: []outputInfo{
15890 {0, 21503},
15891 },
15892 },
15893 },
15894 {
15895 name: "REV16",
15896 argLen: 1,
15897 asm: arm.AREV16,
15898 reg: regInfo{
15899 inputs: []inputInfo{
15900 {0, 22527},
15901 },
15902 outputs: []outputInfo{
15903 {0, 21503},
15904 },
15905 },
15906 },
15907 {
15908 name: "RBIT",
15909 argLen: 1,
15910 asm: arm.ARBIT,
15911 reg: regInfo{
15912 inputs: []inputInfo{
15913 {0, 22527},
15914 },
15915 outputs: []outputInfo{
15916 {0, 21503},
15917 },
15918 },
15919 },
15920 {
15921 name: "SLL",
15922 argLen: 2,
15923 asm: arm.ASLL,
15924 reg: regInfo{
15925 inputs: []inputInfo{
15926 {0, 22527},
15927 {1, 22527},
15928 },
15929 outputs: []outputInfo{
15930 {0, 21503},
15931 },
15932 },
15933 },
15934 {
15935 name: "SLLconst",
15936 auxType: auxInt32,
15937 argLen: 1,
15938 asm: arm.ASLL,
15939 reg: regInfo{
15940 inputs: []inputInfo{
15941 {0, 22527},
15942 },
15943 outputs: []outputInfo{
15944 {0, 21503},
15945 },
15946 },
15947 },
15948 {
15949 name: "SRL",
15950 argLen: 2,
15951 asm: arm.ASRL,
15952 reg: regInfo{
15953 inputs: []inputInfo{
15954 {0, 22527},
15955 {1, 22527},
15956 },
15957 outputs: []outputInfo{
15958 {0, 21503},
15959 },
15960 },
15961 },
15962 {
15963 name: "SRLconst",
15964 auxType: auxInt32,
15965 argLen: 1,
15966 asm: arm.ASRL,
15967 reg: regInfo{
15968 inputs: []inputInfo{
15969 {0, 22527},
15970 },
15971 outputs: []outputInfo{
15972 {0, 21503},
15973 },
15974 },
15975 },
15976 {
15977 name: "SRA",
15978 argLen: 2,
15979 asm: arm.ASRA,
15980 reg: regInfo{
15981 inputs: []inputInfo{
15982 {0, 22527},
15983 {1, 22527},
15984 },
15985 outputs: []outputInfo{
15986 {0, 21503},
15987 },
15988 },
15989 },
15990 {
15991 name: "SRAconst",
15992 auxType: auxInt32,
15993 argLen: 1,
15994 asm: arm.ASRA,
15995 reg: regInfo{
15996 inputs: []inputInfo{
15997 {0, 22527},
15998 },
15999 outputs: []outputInfo{
16000 {0, 21503},
16001 },
16002 },
16003 },
16004 {
16005 name: "SRR",
16006 argLen: 2,
16007 reg: regInfo{
16008 inputs: []inputInfo{
16009 {0, 22527},
16010 {1, 22527},
16011 },
16012 outputs: []outputInfo{
16013 {0, 21503},
16014 },
16015 },
16016 },
16017 {
16018 name: "SRRconst",
16019 auxType: auxInt32,
16020 argLen: 1,
16021 reg: regInfo{
16022 inputs: []inputInfo{
16023 {0, 22527},
16024 },
16025 outputs: []outputInfo{
16026 {0, 21503},
16027 },
16028 },
16029 },
16030 {
16031 name: "ADDshiftLL",
16032 auxType: auxInt32,
16033 argLen: 2,
16034 asm: arm.AADD,
16035 reg: regInfo{
16036 inputs: []inputInfo{
16037 {0, 22527},
16038 {1, 22527},
16039 },
16040 outputs: []outputInfo{
16041 {0, 21503},
16042 },
16043 },
16044 },
16045 {
16046 name: "ADDshiftRL",
16047 auxType: auxInt32,
16048 argLen: 2,
16049 asm: arm.AADD,
16050 reg: regInfo{
16051 inputs: []inputInfo{
16052 {0, 22527},
16053 {1, 22527},
16054 },
16055 outputs: []outputInfo{
16056 {0, 21503},
16057 },
16058 },
16059 },
16060 {
16061 name: "ADDshiftRA",
16062 auxType: auxInt32,
16063 argLen: 2,
16064 asm: arm.AADD,
16065 reg: regInfo{
16066 inputs: []inputInfo{
16067 {0, 22527},
16068 {1, 22527},
16069 },
16070 outputs: []outputInfo{
16071 {0, 21503},
16072 },
16073 },
16074 },
16075 {
16076 name: "SUBshiftLL",
16077 auxType: auxInt32,
16078 argLen: 2,
16079 asm: arm.ASUB,
16080 reg: regInfo{
16081 inputs: []inputInfo{
16082 {0, 22527},
16083 {1, 22527},
16084 },
16085 outputs: []outputInfo{
16086 {0, 21503},
16087 },
16088 },
16089 },
16090 {
16091 name: "SUBshiftRL",
16092 auxType: auxInt32,
16093 argLen: 2,
16094 asm: arm.ASUB,
16095 reg: regInfo{
16096 inputs: []inputInfo{
16097 {0, 22527},
16098 {1, 22527},
16099 },
16100 outputs: []outputInfo{
16101 {0, 21503},
16102 },
16103 },
16104 },
16105 {
16106 name: "SUBshiftRA",
16107 auxType: auxInt32,
16108 argLen: 2,
16109 asm: arm.ASUB,
16110 reg: regInfo{
16111 inputs: []inputInfo{
16112 {0, 22527},
16113 {1, 22527},
16114 },
16115 outputs: []outputInfo{
16116 {0, 21503},
16117 },
16118 },
16119 },
16120 {
16121 name: "RSBshiftLL",
16122 auxType: auxInt32,
16123 argLen: 2,
16124 asm: arm.ARSB,
16125 reg: regInfo{
16126 inputs: []inputInfo{
16127 {0, 22527},
16128 {1, 22527},
16129 },
16130 outputs: []outputInfo{
16131 {0, 21503},
16132 },
16133 },
16134 },
16135 {
16136 name: "RSBshiftRL",
16137 auxType: auxInt32,
16138 argLen: 2,
16139 asm: arm.ARSB,
16140 reg: regInfo{
16141 inputs: []inputInfo{
16142 {0, 22527},
16143 {1, 22527},
16144 },
16145 outputs: []outputInfo{
16146 {0, 21503},
16147 },
16148 },
16149 },
16150 {
16151 name: "RSBshiftRA",
16152 auxType: auxInt32,
16153 argLen: 2,
16154 asm: arm.ARSB,
16155 reg: regInfo{
16156 inputs: []inputInfo{
16157 {0, 22527},
16158 {1, 22527},
16159 },
16160 outputs: []outputInfo{
16161 {0, 21503},
16162 },
16163 },
16164 },
16165 {
16166 name: "ANDshiftLL",
16167 auxType: auxInt32,
16168 argLen: 2,
16169 asm: arm.AAND,
16170 reg: regInfo{
16171 inputs: []inputInfo{
16172 {0, 22527},
16173 {1, 22527},
16174 },
16175 outputs: []outputInfo{
16176 {0, 21503},
16177 },
16178 },
16179 },
16180 {
16181 name: "ANDshiftRL",
16182 auxType: auxInt32,
16183 argLen: 2,
16184 asm: arm.AAND,
16185 reg: regInfo{
16186 inputs: []inputInfo{
16187 {0, 22527},
16188 {1, 22527},
16189 },
16190 outputs: []outputInfo{
16191 {0, 21503},
16192 },
16193 },
16194 },
16195 {
16196 name: "ANDshiftRA",
16197 auxType: auxInt32,
16198 argLen: 2,
16199 asm: arm.AAND,
16200 reg: regInfo{
16201 inputs: []inputInfo{
16202 {0, 22527},
16203 {1, 22527},
16204 },
16205 outputs: []outputInfo{
16206 {0, 21503},
16207 },
16208 },
16209 },
16210 {
16211 name: "ORshiftLL",
16212 auxType: auxInt32,
16213 argLen: 2,
16214 asm: arm.AORR,
16215 reg: regInfo{
16216 inputs: []inputInfo{
16217 {0, 22527},
16218 {1, 22527},
16219 },
16220 outputs: []outputInfo{
16221 {0, 21503},
16222 },
16223 },
16224 },
16225 {
16226 name: "ORshiftRL",
16227 auxType: auxInt32,
16228 argLen: 2,
16229 asm: arm.AORR,
16230 reg: regInfo{
16231 inputs: []inputInfo{
16232 {0, 22527},
16233 {1, 22527},
16234 },
16235 outputs: []outputInfo{
16236 {0, 21503},
16237 },
16238 },
16239 },
16240 {
16241 name: "ORshiftRA",
16242 auxType: auxInt32,
16243 argLen: 2,
16244 asm: arm.AORR,
16245 reg: regInfo{
16246 inputs: []inputInfo{
16247 {0, 22527},
16248 {1, 22527},
16249 },
16250 outputs: []outputInfo{
16251 {0, 21503},
16252 },
16253 },
16254 },
16255 {
16256 name: "XORshiftLL",
16257 auxType: auxInt32,
16258 argLen: 2,
16259 asm: arm.AEOR,
16260 reg: regInfo{
16261 inputs: []inputInfo{
16262 {0, 22527},
16263 {1, 22527},
16264 },
16265 outputs: []outputInfo{
16266 {0, 21503},
16267 },
16268 },
16269 },
16270 {
16271 name: "XORshiftRL",
16272 auxType: auxInt32,
16273 argLen: 2,
16274 asm: arm.AEOR,
16275 reg: regInfo{
16276 inputs: []inputInfo{
16277 {0, 22527},
16278 {1, 22527},
16279 },
16280 outputs: []outputInfo{
16281 {0, 21503},
16282 },
16283 },
16284 },
16285 {
16286 name: "XORshiftRA",
16287 auxType: auxInt32,
16288 argLen: 2,
16289 asm: arm.AEOR,
16290 reg: regInfo{
16291 inputs: []inputInfo{
16292 {0, 22527},
16293 {1, 22527},
16294 },
16295 outputs: []outputInfo{
16296 {0, 21503},
16297 },
16298 },
16299 },
16300 {
16301 name: "XORshiftRR",
16302 auxType: auxInt32,
16303 argLen: 2,
16304 asm: arm.AEOR,
16305 reg: regInfo{
16306 inputs: []inputInfo{
16307 {0, 22527},
16308 {1, 22527},
16309 },
16310 outputs: []outputInfo{
16311 {0, 21503},
16312 },
16313 },
16314 },
16315 {
16316 name: "BICshiftLL",
16317 auxType: auxInt32,
16318 argLen: 2,
16319 asm: arm.ABIC,
16320 reg: regInfo{
16321 inputs: []inputInfo{
16322 {0, 22527},
16323 {1, 22527},
16324 },
16325 outputs: []outputInfo{
16326 {0, 21503},
16327 },
16328 },
16329 },
16330 {
16331 name: "BICshiftRL",
16332 auxType: auxInt32,
16333 argLen: 2,
16334 asm: arm.ABIC,
16335 reg: regInfo{
16336 inputs: []inputInfo{
16337 {0, 22527},
16338 {1, 22527},
16339 },
16340 outputs: []outputInfo{
16341 {0, 21503},
16342 },
16343 },
16344 },
16345 {
16346 name: "BICshiftRA",
16347 auxType: auxInt32,
16348 argLen: 2,
16349 asm: arm.ABIC,
16350 reg: regInfo{
16351 inputs: []inputInfo{
16352 {0, 22527},
16353 {1, 22527},
16354 },
16355 outputs: []outputInfo{
16356 {0, 21503},
16357 },
16358 },
16359 },
16360 {
16361 name: "MVNshiftLL",
16362 auxType: auxInt32,
16363 argLen: 1,
16364 asm: arm.AMVN,
16365 reg: regInfo{
16366 inputs: []inputInfo{
16367 {0, 22527},
16368 },
16369 outputs: []outputInfo{
16370 {0, 21503},
16371 },
16372 },
16373 },
16374 {
16375 name: "MVNshiftRL",
16376 auxType: auxInt32,
16377 argLen: 1,
16378 asm: arm.AMVN,
16379 reg: regInfo{
16380 inputs: []inputInfo{
16381 {0, 22527},
16382 },
16383 outputs: []outputInfo{
16384 {0, 21503},
16385 },
16386 },
16387 },
16388 {
16389 name: "MVNshiftRA",
16390 auxType: auxInt32,
16391 argLen: 1,
16392 asm: arm.AMVN,
16393 reg: regInfo{
16394 inputs: []inputInfo{
16395 {0, 22527},
16396 },
16397 outputs: []outputInfo{
16398 {0, 21503},
16399 },
16400 },
16401 },
16402 {
16403 name: "ADCshiftLL",
16404 auxType: auxInt32,
16405 argLen: 3,
16406 asm: arm.AADC,
16407 reg: regInfo{
16408 inputs: []inputInfo{
16409 {0, 21503},
16410 {1, 21503},
16411 },
16412 outputs: []outputInfo{
16413 {0, 21503},
16414 },
16415 },
16416 },
16417 {
16418 name: "ADCshiftRL",
16419 auxType: auxInt32,
16420 argLen: 3,
16421 asm: arm.AADC,
16422 reg: regInfo{
16423 inputs: []inputInfo{
16424 {0, 21503},
16425 {1, 21503},
16426 },
16427 outputs: []outputInfo{
16428 {0, 21503},
16429 },
16430 },
16431 },
16432 {
16433 name: "ADCshiftRA",
16434 auxType: auxInt32,
16435 argLen: 3,
16436 asm: arm.AADC,
16437 reg: regInfo{
16438 inputs: []inputInfo{
16439 {0, 21503},
16440 {1, 21503},
16441 },
16442 outputs: []outputInfo{
16443 {0, 21503},
16444 },
16445 },
16446 },
16447 {
16448 name: "SBCshiftLL",
16449 auxType: auxInt32,
16450 argLen: 3,
16451 asm: arm.ASBC,
16452 reg: regInfo{
16453 inputs: []inputInfo{
16454 {0, 21503},
16455 {1, 21503},
16456 },
16457 outputs: []outputInfo{
16458 {0, 21503},
16459 },
16460 },
16461 },
16462 {
16463 name: "SBCshiftRL",
16464 auxType: auxInt32,
16465 argLen: 3,
16466 asm: arm.ASBC,
16467 reg: regInfo{
16468 inputs: []inputInfo{
16469 {0, 21503},
16470 {1, 21503},
16471 },
16472 outputs: []outputInfo{
16473 {0, 21503},
16474 },
16475 },
16476 },
16477 {
16478 name: "SBCshiftRA",
16479 auxType: auxInt32,
16480 argLen: 3,
16481 asm: arm.ASBC,
16482 reg: regInfo{
16483 inputs: []inputInfo{
16484 {0, 21503},
16485 {1, 21503},
16486 },
16487 outputs: []outputInfo{
16488 {0, 21503},
16489 },
16490 },
16491 },
16492 {
16493 name: "RSCshiftLL",
16494 auxType: auxInt32,
16495 argLen: 3,
16496 asm: arm.ARSC,
16497 reg: regInfo{
16498 inputs: []inputInfo{
16499 {0, 21503},
16500 {1, 21503},
16501 },
16502 outputs: []outputInfo{
16503 {0, 21503},
16504 },
16505 },
16506 },
16507 {
16508 name: "RSCshiftRL",
16509 auxType: auxInt32,
16510 argLen: 3,
16511 asm: arm.ARSC,
16512 reg: regInfo{
16513 inputs: []inputInfo{
16514 {0, 21503},
16515 {1, 21503},
16516 },
16517 outputs: []outputInfo{
16518 {0, 21503},
16519 },
16520 },
16521 },
16522 {
16523 name: "RSCshiftRA",
16524 auxType: auxInt32,
16525 argLen: 3,
16526 asm: arm.ARSC,
16527 reg: regInfo{
16528 inputs: []inputInfo{
16529 {0, 21503},
16530 {1, 21503},
16531 },
16532 outputs: []outputInfo{
16533 {0, 21503},
16534 },
16535 },
16536 },
16537 {
16538 name: "ADDSshiftLL",
16539 auxType: auxInt32,
16540 argLen: 2,
16541 asm: arm.AADD,
16542 reg: regInfo{
16543 inputs: []inputInfo{
16544 {0, 22527},
16545 {1, 22527},
16546 },
16547 outputs: []outputInfo{
16548 {1, 0},
16549 {0, 21503},
16550 },
16551 },
16552 },
16553 {
16554 name: "ADDSshiftRL",
16555 auxType: auxInt32,
16556 argLen: 2,
16557 asm: arm.AADD,
16558 reg: regInfo{
16559 inputs: []inputInfo{
16560 {0, 22527},
16561 {1, 22527},
16562 },
16563 outputs: []outputInfo{
16564 {1, 0},
16565 {0, 21503},
16566 },
16567 },
16568 },
16569 {
16570 name: "ADDSshiftRA",
16571 auxType: auxInt32,
16572 argLen: 2,
16573 asm: arm.AADD,
16574 reg: regInfo{
16575 inputs: []inputInfo{
16576 {0, 22527},
16577 {1, 22527},
16578 },
16579 outputs: []outputInfo{
16580 {1, 0},
16581 {0, 21503},
16582 },
16583 },
16584 },
16585 {
16586 name: "SUBSshiftLL",
16587 auxType: auxInt32,
16588 argLen: 2,
16589 asm: arm.ASUB,
16590 reg: regInfo{
16591 inputs: []inputInfo{
16592 {0, 22527},
16593 {1, 22527},
16594 },
16595 outputs: []outputInfo{
16596 {1, 0},
16597 {0, 21503},
16598 },
16599 },
16600 },
16601 {
16602 name: "SUBSshiftRL",
16603 auxType: auxInt32,
16604 argLen: 2,
16605 asm: arm.ASUB,
16606 reg: regInfo{
16607 inputs: []inputInfo{
16608 {0, 22527},
16609 {1, 22527},
16610 },
16611 outputs: []outputInfo{
16612 {1, 0},
16613 {0, 21503},
16614 },
16615 },
16616 },
16617 {
16618 name: "SUBSshiftRA",
16619 auxType: auxInt32,
16620 argLen: 2,
16621 asm: arm.ASUB,
16622 reg: regInfo{
16623 inputs: []inputInfo{
16624 {0, 22527},
16625 {1, 22527},
16626 },
16627 outputs: []outputInfo{
16628 {1, 0},
16629 {0, 21503},
16630 },
16631 },
16632 },
16633 {
16634 name: "RSBSshiftLL",
16635 auxType: auxInt32,
16636 argLen: 2,
16637 asm: arm.ARSB,
16638 reg: regInfo{
16639 inputs: []inputInfo{
16640 {0, 22527},
16641 {1, 22527},
16642 },
16643 outputs: []outputInfo{
16644 {1, 0},
16645 {0, 21503},
16646 },
16647 },
16648 },
16649 {
16650 name: "RSBSshiftRL",
16651 auxType: auxInt32,
16652 argLen: 2,
16653 asm: arm.ARSB,
16654 reg: regInfo{
16655 inputs: []inputInfo{
16656 {0, 22527},
16657 {1, 22527},
16658 },
16659 outputs: []outputInfo{
16660 {1, 0},
16661 {0, 21503},
16662 },
16663 },
16664 },
16665 {
16666 name: "RSBSshiftRA",
16667 auxType: auxInt32,
16668 argLen: 2,
16669 asm: arm.ARSB,
16670 reg: regInfo{
16671 inputs: []inputInfo{
16672 {0, 22527},
16673 {1, 22527},
16674 },
16675 outputs: []outputInfo{
16676 {1, 0},
16677 {0, 21503},
16678 },
16679 },
16680 },
16681 {
16682 name: "ADDshiftLLreg",
16683 argLen: 3,
16684 asm: arm.AADD,
16685 reg: regInfo{
16686 inputs: []inputInfo{
16687 {0, 21503},
16688 {1, 21503},
16689 {2, 21503},
16690 },
16691 outputs: []outputInfo{
16692 {0, 21503},
16693 },
16694 },
16695 },
16696 {
16697 name: "ADDshiftRLreg",
16698 argLen: 3,
16699 asm: arm.AADD,
16700 reg: regInfo{
16701 inputs: []inputInfo{
16702 {0, 21503},
16703 {1, 21503},
16704 {2, 21503},
16705 },
16706 outputs: []outputInfo{
16707 {0, 21503},
16708 },
16709 },
16710 },
16711 {
16712 name: "ADDshiftRAreg",
16713 argLen: 3,
16714 asm: arm.AADD,
16715 reg: regInfo{
16716 inputs: []inputInfo{
16717 {0, 21503},
16718 {1, 21503},
16719 {2, 21503},
16720 },
16721 outputs: []outputInfo{
16722 {0, 21503},
16723 },
16724 },
16725 },
16726 {
16727 name: "SUBshiftLLreg",
16728 argLen: 3,
16729 asm: arm.ASUB,
16730 reg: regInfo{
16731 inputs: []inputInfo{
16732 {0, 21503},
16733 {1, 21503},
16734 {2, 21503},
16735 },
16736 outputs: []outputInfo{
16737 {0, 21503},
16738 },
16739 },
16740 },
16741 {
16742 name: "SUBshiftRLreg",
16743 argLen: 3,
16744 asm: arm.ASUB,
16745 reg: regInfo{
16746 inputs: []inputInfo{
16747 {0, 21503},
16748 {1, 21503},
16749 {2, 21503},
16750 },
16751 outputs: []outputInfo{
16752 {0, 21503},
16753 },
16754 },
16755 },
16756 {
16757 name: "SUBshiftRAreg",
16758 argLen: 3,
16759 asm: arm.ASUB,
16760 reg: regInfo{
16761 inputs: []inputInfo{
16762 {0, 21503},
16763 {1, 21503},
16764 {2, 21503},
16765 },
16766 outputs: []outputInfo{
16767 {0, 21503},
16768 },
16769 },
16770 },
16771 {
16772 name: "RSBshiftLLreg",
16773 argLen: 3,
16774 asm: arm.ARSB,
16775 reg: regInfo{
16776 inputs: []inputInfo{
16777 {0, 21503},
16778 {1, 21503},
16779 {2, 21503},
16780 },
16781 outputs: []outputInfo{
16782 {0, 21503},
16783 },
16784 },
16785 },
16786 {
16787 name: "RSBshiftRLreg",
16788 argLen: 3,
16789 asm: arm.ARSB,
16790 reg: regInfo{
16791 inputs: []inputInfo{
16792 {0, 21503},
16793 {1, 21503},
16794 {2, 21503},
16795 },
16796 outputs: []outputInfo{
16797 {0, 21503},
16798 },
16799 },
16800 },
16801 {
16802 name: "RSBshiftRAreg",
16803 argLen: 3,
16804 asm: arm.ARSB,
16805 reg: regInfo{
16806 inputs: []inputInfo{
16807 {0, 21503},
16808 {1, 21503},
16809 {2, 21503},
16810 },
16811 outputs: []outputInfo{
16812 {0, 21503},
16813 },
16814 },
16815 },
16816 {
16817 name: "ANDshiftLLreg",
16818 argLen: 3,
16819 asm: arm.AAND,
16820 reg: regInfo{
16821 inputs: []inputInfo{
16822 {0, 21503},
16823 {1, 21503},
16824 {2, 21503},
16825 },
16826 outputs: []outputInfo{
16827 {0, 21503},
16828 },
16829 },
16830 },
16831 {
16832 name: "ANDshiftRLreg",
16833 argLen: 3,
16834 asm: arm.AAND,
16835 reg: regInfo{
16836 inputs: []inputInfo{
16837 {0, 21503},
16838 {1, 21503},
16839 {2, 21503},
16840 },
16841 outputs: []outputInfo{
16842 {0, 21503},
16843 },
16844 },
16845 },
16846 {
16847 name: "ANDshiftRAreg",
16848 argLen: 3,
16849 asm: arm.AAND,
16850 reg: regInfo{
16851 inputs: []inputInfo{
16852 {0, 21503},
16853 {1, 21503},
16854 {2, 21503},
16855 },
16856 outputs: []outputInfo{
16857 {0, 21503},
16858 },
16859 },
16860 },
16861 {
16862 name: "ORshiftLLreg",
16863 argLen: 3,
16864 asm: arm.AORR,
16865 reg: regInfo{
16866 inputs: []inputInfo{
16867 {0, 21503},
16868 {1, 21503},
16869 {2, 21503},
16870 },
16871 outputs: []outputInfo{
16872 {0, 21503},
16873 },
16874 },
16875 },
16876 {
16877 name: "ORshiftRLreg",
16878 argLen: 3,
16879 asm: arm.AORR,
16880 reg: regInfo{
16881 inputs: []inputInfo{
16882 {0, 21503},
16883 {1, 21503},
16884 {2, 21503},
16885 },
16886 outputs: []outputInfo{
16887 {0, 21503},
16888 },
16889 },
16890 },
16891 {
16892 name: "ORshiftRAreg",
16893 argLen: 3,
16894 asm: arm.AORR,
16895 reg: regInfo{
16896 inputs: []inputInfo{
16897 {0, 21503},
16898 {1, 21503},
16899 {2, 21503},
16900 },
16901 outputs: []outputInfo{
16902 {0, 21503},
16903 },
16904 },
16905 },
16906 {
16907 name: "XORshiftLLreg",
16908 argLen: 3,
16909 asm: arm.AEOR,
16910 reg: regInfo{
16911 inputs: []inputInfo{
16912 {0, 21503},
16913 {1, 21503},
16914 {2, 21503},
16915 },
16916 outputs: []outputInfo{
16917 {0, 21503},
16918 },
16919 },
16920 },
16921 {
16922 name: "XORshiftRLreg",
16923 argLen: 3,
16924 asm: arm.AEOR,
16925 reg: regInfo{
16926 inputs: []inputInfo{
16927 {0, 21503},
16928 {1, 21503},
16929 {2, 21503},
16930 },
16931 outputs: []outputInfo{
16932 {0, 21503},
16933 },
16934 },
16935 },
16936 {
16937 name: "XORshiftRAreg",
16938 argLen: 3,
16939 asm: arm.AEOR,
16940 reg: regInfo{
16941 inputs: []inputInfo{
16942 {0, 21503},
16943 {1, 21503},
16944 {2, 21503},
16945 },
16946 outputs: []outputInfo{
16947 {0, 21503},
16948 },
16949 },
16950 },
16951 {
16952 name: "BICshiftLLreg",
16953 argLen: 3,
16954 asm: arm.ABIC,
16955 reg: regInfo{
16956 inputs: []inputInfo{
16957 {0, 21503},
16958 {1, 21503},
16959 {2, 21503},
16960 },
16961 outputs: []outputInfo{
16962 {0, 21503},
16963 },
16964 },
16965 },
16966 {
16967 name: "BICshiftRLreg",
16968 argLen: 3,
16969 asm: arm.ABIC,
16970 reg: regInfo{
16971 inputs: []inputInfo{
16972 {0, 21503},
16973 {1, 21503},
16974 {2, 21503},
16975 },
16976 outputs: []outputInfo{
16977 {0, 21503},
16978 },
16979 },
16980 },
16981 {
16982 name: "BICshiftRAreg",
16983 argLen: 3,
16984 asm: arm.ABIC,
16985 reg: regInfo{
16986 inputs: []inputInfo{
16987 {0, 21503},
16988 {1, 21503},
16989 {2, 21503},
16990 },
16991 outputs: []outputInfo{
16992 {0, 21503},
16993 },
16994 },
16995 },
16996 {
16997 name: "MVNshiftLLreg",
16998 argLen: 2,
16999 asm: arm.AMVN,
17000 reg: regInfo{
17001 inputs: []inputInfo{
17002 {0, 22527},
17003 {1, 22527},
17004 },
17005 outputs: []outputInfo{
17006 {0, 21503},
17007 },
17008 },
17009 },
17010 {
17011 name: "MVNshiftRLreg",
17012 argLen: 2,
17013 asm: arm.AMVN,
17014 reg: regInfo{
17015 inputs: []inputInfo{
17016 {0, 22527},
17017 {1, 22527},
17018 },
17019 outputs: []outputInfo{
17020 {0, 21503},
17021 },
17022 },
17023 },
17024 {
17025 name: "MVNshiftRAreg",
17026 argLen: 2,
17027 asm: arm.AMVN,
17028 reg: regInfo{
17029 inputs: []inputInfo{
17030 {0, 22527},
17031 {1, 22527},
17032 },
17033 outputs: []outputInfo{
17034 {0, 21503},
17035 },
17036 },
17037 },
17038 {
17039 name: "ADCshiftLLreg",
17040 argLen: 4,
17041 asm: arm.AADC,
17042 reg: regInfo{
17043 inputs: []inputInfo{
17044 {0, 21503},
17045 {1, 21503},
17046 {2, 21503},
17047 },
17048 outputs: []outputInfo{
17049 {0, 21503},
17050 },
17051 },
17052 },
17053 {
17054 name: "ADCshiftRLreg",
17055 argLen: 4,
17056 asm: arm.AADC,
17057 reg: regInfo{
17058 inputs: []inputInfo{
17059 {0, 21503},
17060 {1, 21503},
17061 {2, 21503},
17062 },
17063 outputs: []outputInfo{
17064 {0, 21503},
17065 },
17066 },
17067 },
17068 {
17069 name: "ADCshiftRAreg",
17070 argLen: 4,
17071 asm: arm.AADC,
17072 reg: regInfo{
17073 inputs: []inputInfo{
17074 {0, 21503},
17075 {1, 21503},
17076 {2, 21503},
17077 },
17078 outputs: []outputInfo{
17079 {0, 21503},
17080 },
17081 },
17082 },
17083 {
17084 name: "SBCshiftLLreg",
17085 argLen: 4,
17086 asm: arm.ASBC,
17087 reg: regInfo{
17088 inputs: []inputInfo{
17089 {0, 21503},
17090 {1, 21503},
17091 {2, 21503},
17092 },
17093 outputs: []outputInfo{
17094 {0, 21503},
17095 },
17096 },
17097 },
17098 {
17099 name: "SBCshiftRLreg",
17100 argLen: 4,
17101 asm: arm.ASBC,
17102 reg: regInfo{
17103 inputs: []inputInfo{
17104 {0, 21503},
17105 {1, 21503},
17106 {2, 21503},
17107 },
17108 outputs: []outputInfo{
17109 {0, 21503},
17110 },
17111 },
17112 },
17113 {
17114 name: "SBCshiftRAreg",
17115 argLen: 4,
17116 asm: arm.ASBC,
17117 reg: regInfo{
17118 inputs: []inputInfo{
17119 {0, 21503},
17120 {1, 21503},
17121 {2, 21503},
17122 },
17123 outputs: []outputInfo{
17124 {0, 21503},
17125 },
17126 },
17127 },
17128 {
17129 name: "RSCshiftLLreg",
17130 argLen: 4,
17131 asm: arm.ARSC,
17132 reg: regInfo{
17133 inputs: []inputInfo{
17134 {0, 21503},
17135 {1, 21503},
17136 {2, 21503},
17137 },
17138 outputs: []outputInfo{
17139 {0, 21503},
17140 },
17141 },
17142 },
17143 {
17144 name: "RSCshiftRLreg",
17145 argLen: 4,
17146 asm: arm.ARSC,
17147 reg: regInfo{
17148 inputs: []inputInfo{
17149 {0, 21503},
17150 {1, 21503},
17151 {2, 21503},
17152 },
17153 outputs: []outputInfo{
17154 {0, 21503},
17155 },
17156 },
17157 },
17158 {
17159 name: "RSCshiftRAreg",
17160 argLen: 4,
17161 asm: arm.ARSC,
17162 reg: regInfo{
17163 inputs: []inputInfo{
17164 {0, 21503},
17165 {1, 21503},
17166 {2, 21503},
17167 },
17168 outputs: []outputInfo{
17169 {0, 21503},
17170 },
17171 },
17172 },
17173 {
17174 name: "ADDSshiftLLreg",
17175 argLen: 3,
17176 asm: arm.AADD,
17177 reg: regInfo{
17178 inputs: []inputInfo{
17179 {0, 21503},
17180 {1, 21503},
17181 {2, 21503},
17182 },
17183 outputs: []outputInfo{
17184 {1, 0},
17185 {0, 21503},
17186 },
17187 },
17188 },
17189 {
17190 name: "ADDSshiftRLreg",
17191 argLen: 3,
17192 asm: arm.AADD,
17193 reg: regInfo{
17194 inputs: []inputInfo{
17195 {0, 21503},
17196 {1, 21503},
17197 {2, 21503},
17198 },
17199 outputs: []outputInfo{
17200 {1, 0},
17201 {0, 21503},
17202 },
17203 },
17204 },
17205 {
17206 name: "ADDSshiftRAreg",
17207 argLen: 3,
17208 asm: arm.AADD,
17209 reg: regInfo{
17210 inputs: []inputInfo{
17211 {0, 21503},
17212 {1, 21503},
17213 {2, 21503},
17214 },
17215 outputs: []outputInfo{
17216 {1, 0},
17217 {0, 21503},
17218 },
17219 },
17220 },
17221 {
17222 name: "SUBSshiftLLreg",
17223 argLen: 3,
17224 asm: arm.ASUB,
17225 reg: regInfo{
17226 inputs: []inputInfo{
17227 {0, 21503},
17228 {1, 21503},
17229 {2, 21503},
17230 },
17231 outputs: []outputInfo{
17232 {1, 0},
17233 {0, 21503},
17234 },
17235 },
17236 },
17237 {
17238 name: "SUBSshiftRLreg",
17239 argLen: 3,
17240 asm: arm.ASUB,
17241 reg: regInfo{
17242 inputs: []inputInfo{
17243 {0, 21503},
17244 {1, 21503},
17245 {2, 21503},
17246 },
17247 outputs: []outputInfo{
17248 {1, 0},
17249 {0, 21503},
17250 },
17251 },
17252 },
17253 {
17254 name: "SUBSshiftRAreg",
17255 argLen: 3,
17256 asm: arm.ASUB,
17257 reg: regInfo{
17258 inputs: []inputInfo{
17259 {0, 21503},
17260 {1, 21503},
17261 {2, 21503},
17262 },
17263 outputs: []outputInfo{
17264 {1, 0},
17265 {0, 21503},
17266 },
17267 },
17268 },
17269 {
17270 name: "RSBSshiftLLreg",
17271 argLen: 3,
17272 asm: arm.ARSB,
17273 reg: regInfo{
17274 inputs: []inputInfo{
17275 {0, 21503},
17276 {1, 21503},
17277 {2, 21503},
17278 },
17279 outputs: []outputInfo{
17280 {1, 0},
17281 {0, 21503},
17282 },
17283 },
17284 },
17285 {
17286 name: "RSBSshiftRLreg",
17287 argLen: 3,
17288 asm: arm.ARSB,
17289 reg: regInfo{
17290 inputs: []inputInfo{
17291 {0, 21503},
17292 {1, 21503},
17293 {2, 21503},
17294 },
17295 outputs: []outputInfo{
17296 {1, 0},
17297 {0, 21503},
17298 },
17299 },
17300 },
17301 {
17302 name: "RSBSshiftRAreg",
17303 argLen: 3,
17304 asm: arm.ARSB,
17305 reg: regInfo{
17306 inputs: []inputInfo{
17307 {0, 21503},
17308 {1, 21503},
17309 {2, 21503},
17310 },
17311 outputs: []outputInfo{
17312 {1, 0},
17313 {0, 21503},
17314 },
17315 },
17316 },
17317 {
17318 name: "CMP",
17319 argLen: 2,
17320 asm: arm.ACMP,
17321 reg: regInfo{
17322 inputs: []inputInfo{
17323 {0, 22527},
17324 {1, 22527},
17325 },
17326 },
17327 },
17328 {
17329 name: "CMPconst",
17330 auxType: auxInt32,
17331 argLen: 1,
17332 asm: arm.ACMP,
17333 reg: regInfo{
17334 inputs: []inputInfo{
17335 {0, 22527},
17336 },
17337 },
17338 },
17339 {
17340 name: "CMN",
17341 argLen: 2,
17342 commutative: true,
17343 asm: arm.ACMN,
17344 reg: regInfo{
17345 inputs: []inputInfo{
17346 {0, 22527},
17347 {1, 22527},
17348 },
17349 },
17350 },
17351 {
17352 name: "CMNconst",
17353 auxType: auxInt32,
17354 argLen: 1,
17355 asm: arm.ACMN,
17356 reg: regInfo{
17357 inputs: []inputInfo{
17358 {0, 22527},
17359 },
17360 },
17361 },
17362 {
17363 name: "TST",
17364 argLen: 2,
17365 commutative: true,
17366 asm: arm.ATST,
17367 reg: regInfo{
17368 inputs: []inputInfo{
17369 {0, 22527},
17370 {1, 22527},
17371 },
17372 },
17373 },
17374 {
17375 name: "TSTconst",
17376 auxType: auxInt32,
17377 argLen: 1,
17378 asm: arm.ATST,
17379 reg: regInfo{
17380 inputs: []inputInfo{
17381 {0, 22527},
17382 },
17383 },
17384 },
17385 {
17386 name: "TEQ",
17387 argLen: 2,
17388 commutative: true,
17389 asm: arm.ATEQ,
17390 reg: regInfo{
17391 inputs: []inputInfo{
17392 {0, 22527},
17393 {1, 22527},
17394 },
17395 },
17396 },
17397 {
17398 name: "TEQconst",
17399 auxType: auxInt32,
17400 argLen: 1,
17401 asm: arm.ATEQ,
17402 reg: regInfo{
17403 inputs: []inputInfo{
17404 {0, 22527},
17405 },
17406 },
17407 },
17408 {
17409 name: "CMPF",
17410 argLen: 2,
17411 asm: arm.ACMPF,
17412 reg: regInfo{
17413 inputs: []inputInfo{
17414 {0, 4294901760},
17415 {1, 4294901760},
17416 },
17417 },
17418 },
17419 {
17420 name: "CMPD",
17421 argLen: 2,
17422 asm: arm.ACMPD,
17423 reg: regInfo{
17424 inputs: []inputInfo{
17425 {0, 4294901760},
17426 {1, 4294901760},
17427 },
17428 },
17429 },
17430 {
17431 name: "CMPshiftLL",
17432 auxType: auxInt32,
17433 argLen: 2,
17434 asm: arm.ACMP,
17435 reg: regInfo{
17436 inputs: []inputInfo{
17437 {0, 22527},
17438 {1, 22527},
17439 },
17440 },
17441 },
17442 {
17443 name: "CMPshiftRL",
17444 auxType: auxInt32,
17445 argLen: 2,
17446 asm: arm.ACMP,
17447 reg: regInfo{
17448 inputs: []inputInfo{
17449 {0, 22527},
17450 {1, 22527},
17451 },
17452 },
17453 },
17454 {
17455 name: "CMPshiftRA",
17456 auxType: auxInt32,
17457 argLen: 2,
17458 asm: arm.ACMP,
17459 reg: regInfo{
17460 inputs: []inputInfo{
17461 {0, 22527},
17462 {1, 22527},
17463 },
17464 },
17465 },
17466 {
17467 name: "CMNshiftLL",
17468 auxType: auxInt32,
17469 argLen: 2,
17470 asm: arm.ACMN,
17471 reg: regInfo{
17472 inputs: []inputInfo{
17473 {0, 22527},
17474 {1, 22527},
17475 },
17476 },
17477 },
17478 {
17479 name: "CMNshiftRL",
17480 auxType: auxInt32,
17481 argLen: 2,
17482 asm: arm.ACMN,
17483 reg: regInfo{
17484 inputs: []inputInfo{
17485 {0, 22527},
17486 {1, 22527},
17487 },
17488 },
17489 },
17490 {
17491 name: "CMNshiftRA",
17492 auxType: auxInt32,
17493 argLen: 2,
17494 asm: arm.ACMN,
17495 reg: regInfo{
17496 inputs: []inputInfo{
17497 {0, 22527},
17498 {1, 22527},
17499 },
17500 },
17501 },
17502 {
17503 name: "TSTshiftLL",
17504 auxType: auxInt32,
17505 argLen: 2,
17506 asm: arm.ATST,
17507 reg: regInfo{
17508 inputs: []inputInfo{
17509 {0, 22527},
17510 {1, 22527},
17511 },
17512 },
17513 },
17514 {
17515 name: "TSTshiftRL",
17516 auxType: auxInt32,
17517 argLen: 2,
17518 asm: arm.ATST,
17519 reg: regInfo{
17520 inputs: []inputInfo{
17521 {0, 22527},
17522 {1, 22527},
17523 },
17524 },
17525 },
17526 {
17527 name: "TSTshiftRA",
17528 auxType: auxInt32,
17529 argLen: 2,
17530 asm: arm.ATST,
17531 reg: regInfo{
17532 inputs: []inputInfo{
17533 {0, 22527},
17534 {1, 22527},
17535 },
17536 },
17537 },
17538 {
17539 name: "TEQshiftLL",
17540 auxType: auxInt32,
17541 argLen: 2,
17542 asm: arm.ATEQ,
17543 reg: regInfo{
17544 inputs: []inputInfo{
17545 {0, 22527},
17546 {1, 22527},
17547 },
17548 },
17549 },
17550 {
17551 name: "TEQshiftRL",
17552 auxType: auxInt32,
17553 argLen: 2,
17554 asm: arm.ATEQ,
17555 reg: regInfo{
17556 inputs: []inputInfo{
17557 {0, 22527},
17558 {1, 22527},
17559 },
17560 },
17561 },
17562 {
17563 name: "TEQshiftRA",
17564 auxType: auxInt32,
17565 argLen: 2,
17566 asm: arm.ATEQ,
17567 reg: regInfo{
17568 inputs: []inputInfo{
17569 {0, 22527},
17570 {1, 22527},
17571 },
17572 },
17573 },
17574 {
17575 name: "CMPshiftLLreg",
17576 argLen: 3,
17577 asm: arm.ACMP,
17578 reg: regInfo{
17579 inputs: []inputInfo{
17580 {0, 21503},
17581 {1, 21503},
17582 {2, 21503},
17583 },
17584 },
17585 },
17586 {
17587 name: "CMPshiftRLreg",
17588 argLen: 3,
17589 asm: arm.ACMP,
17590 reg: regInfo{
17591 inputs: []inputInfo{
17592 {0, 21503},
17593 {1, 21503},
17594 {2, 21503},
17595 },
17596 },
17597 },
17598 {
17599 name: "CMPshiftRAreg",
17600 argLen: 3,
17601 asm: arm.ACMP,
17602 reg: regInfo{
17603 inputs: []inputInfo{
17604 {0, 21503},
17605 {1, 21503},
17606 {2, 21503},
17607 },
17608 },
17609 },
17610 {
17611 name: "CMNshiftLLreg",
17612 argLen: 3,
17613 asm: arm.ACMN,
17614 reg: regInfo{
17615 inputs: []inputInfo{
17616 {0, 21503},
17617 {1, 21503},
17618 {2, 21503},
17619 },
17620 },
17621 },
17622 {
17623 name: "CMNshiftRLreg",
17624 argLen: 3,
17625 asm: arm.ACMN,
17626 reg: regInfo{
17627 inputs: []inputInfo{
17628 {0, 21503},
17629 {1, 21503},
17630 {2, 21503},
17631 },
17632 },
17633 },
17634 {
17635 name: "CMNshiftRAreg",
17636 argLen: 3,
17637 asm: arm.ACMN,
17638 reg: regInfo{
17639 inputs: []inputInfo{
17640 {0, 21503},
17641 {1, 21503},
17642 {2, 21503},
17643 },
17644 },
17645 },
17646 {
17647 name: "TSTshiftLLreg",
17648 argLen: 3,
17649 asm: arm.ATST,
17650 reg: regInfo{
17651 inputs: []inputInfo{
17652 {0, 21503},
17653 {1, 21503},
17654 {2, 21503},
17655 },
17656 },
17657 },
17658 {
17659 name: "TSTshiftRLreg",
17660 argLen: 3,
17661 asm: arm.ATST,
17662 reg: regInfo{
17663 inputs: []inputInfo{
17664 {0, 21503},
17665 {1, 21503},
17666 {2, 21503},
17667 },
17668 },
17669 },
17670 {
17671 name: "TSTshiftRAreg",
17672 argLen: 3,
17673 asm: arm.ATST,
17674 reg: regInfo{
17675 inputs: []inputInfo{
17676 {0, 21503},
17677 {1, 21503},
17678 {2, 21503},
17679 },
17680 },
17681 },
17682 {
17683 name: "TEQshiftLLreg",
17684 argLen: 3,
17685 asm: arm.ATEQ,
17686 reg: regInfo{
17687 inputs: []inputInfo{
17688 {0, 21503},
17689 {1, 21503},
17690 {2, 21503},
17691 },
17692 },
17693 },
17694 {
17695 name: "TEQshiftRLreg",
17696 argLen: 3,
17697 asm: arm.ATEQ,
17698 reg: regInfo{
17699 inputs: []inputInfo{
17700 {0, 21503},
17701 {1, 21503},
17702 {2, 21503},
17703 },
17704 },
17705 },
17706 {
17707 name: "TEQshiftRAreg",
17708 argLen: 3,
17709 asm: arm.ATEQ,
17710 reg: regInfo{
17711 inputs: []inputInfo{
17712 {0, 21503},
17713 {1, 21503},
17714 {2, 21503},
17715 },
17716 },
17717 },
17718 {
17719 name: "CMPF0",
17720 argLen: 1,
17721 asm: arm.ACMPF,
17722 reg: regInfo{
17723 inputs: []inputInfo{
17724 {0, 4294901760},
17725 },
17726 },
17727 },
17728 {
17729 name: "CMPD0",
17730 argLen: 1,
17731 asm: arm.ACMPD,
17732 reg: regInfo{
17733 inputs: []inputInfo{
17734 {0, 4294901760},
17735 },
17736 },
17737 },
17738 {
17739 name: "MOVWconst",
17740 auxType: auxInt32,
17741 argLen: 0,
17742 rematerializeable: true,
17743 asm: arm.AMOVW,
17744 reg: regInfo{
17745 outputs: []outputInfo{
17746 {0, 21503},
17747 },
17748 },
17749 },
17750 {
17751 name: "MOVFconst",
17752 auxType: auxFloat64,
17753 argLen: 0,
17754 rematerializeable: true,
17755 asm: arm.AMOVF,
17756 reg: regInfo{
17757 outputs: []outputInfo{
17758 {0, 4294901760},
17759 },
17760 },
17761 },
17762 {
17763 name: "MOVDconst",
17764 auxType: auxFloat64,
17765 argLen: 0,
17766 rematerializeable: true,
17767 asm: arm.AMOVD,
17768 reg: regInfo{
17769 outputs: []outputInfo{
17770 {0, 4294901760},
17771 },
17772 },
17773 },
17774 {
17775 name: "MOVWaddr",
17776 auxType: auxSymOff,
17777 argLen: 1,
17778 rematerializeable: true,
17779 symEffect: SymAddr,
17780 asm: arm.AMOVW,
17781 reg: regInfo{
17782 inputs: []inputInfo{
17783 {0, 4294975488},
17784 },
17785 outputs: []outputInfo{
17786 {0, 21503},
17787 },
17788 },
17789 },
17790 {
17791 name: "MOVBload",
17792 auxType: auxSymOff,
17793 argLen: 2,
17794 faultOnNilArg0: true,
17795 symEffect: SymRead,
17796 asm: arm.AMOVB,
17797 reg: regInfo{
17798 inputs: []inputInfo{
17799 {0, 4294998015},
17800 },
17801 outputs: []outputInfo{
17802 {0, 21503},
17803 },
17804 },
17805 },
17806 {
17807 name: "MOVBUload",
17808 auxType: auxSymOff,
17809 argLen: 2,
17810 faultOnNilArg0: true,
17811 symEffect: SymRead,
17812 asm: arm.AMOVBU,
17813 reg: regInfo{
17814 inputs: []inputInfo{
17815 {0, 4294998015},
17816 },
17817 outputs: []outputInfo{
17818 {0, 21503},
17819 },
17820 },
17821 },
17822 {
17823 name: "MOVHload",
17824 auxType: auxSymOff,
17825 argLen: 2,
17826 faultOnNilArg0: true,
17827 symEffect: SymRead,
17828 asm: arm.AMOVH,
17829 reg: regInfo{
17830 inputs: []inputInfo{
17831 {0, 4294998015},
17832 },
17833 outputs: []outputInfo{
17834 {0, 21503},
17835 },
17836 },
17837 },
17838 {
17839 name: "MOVHUload",
17840 auxType: auxSymOff,
17841 argLen: 2,
17842 faultOnNilArg0: true,
17843 symEffect: SymRead,
17844 asm: arm.AMOVHU,
17845 reg: regInfo{
17846 inputs: []inputInfo{
17847 {0, 4294998015},
17848 },
17849 outputs: []outputInfo{
17850 {0, 21503},
17851 },
17852 },
17853 },
17854 {
17855 name: "MOVWload",
17856 auxType: auxSymOff,
17857 argLen: 2,
17858 faultOnNilArg0: true,
17859 symEffect: SymRead,
17860 asm: arm.AMOVW,
17861 reg: regInfo{
17862 inputs: []inputInfo{
17863 {0, 4294998015},
17864 },
17865 outputs: []outputInfo{
17866 {0, 21503},
17867 },
17868 },
17869 },
17870 {
17871 name: "MOVFload",
17872 auxType: auxSymOff,
17873 argLen: 2,
17874 faultOnNilArg0: true,
17875 symEffect: SymRead,
17876 asm: arm.AMOVF,
17877 reg: regInfo{
17878 inputs: []inputInfo{
17879 {0, 4294998015},
17880 },
17881 outputs: []outputInfo{
17882 {0, 4294901760},
17883 },
17884 },
17885 },
17886 {
17887 name: "MOVDload",
17888 auxType: auxSymOff,
17889 argLen: 2,
17890 faultOnNilArg0: true,
17891 symEffect: SymRead,
17892 asm: arm.AMOVD,
17893 reg: regInfo{
17894 inputs: []inputInfo{
17895 {0, 4294998015},
17896 },
17897 outputs: []outputInfo{
17898 {0, 4294901760},
17899 },
17900 },
17901 },
17902 {
17903 name: "MOVBstore",
17904 auxType: auxSymOff,
17905 argLen: 3,
17906 faultOnNilArg0: true,
17907 symEffect: SymWrite,
17908 asm: arm.AMOVB,
17909 reg: regInfo{
17910 inputs: []inputInfo{
17911 {1, 22527},
17912 {0, 4294998015},
17913 },
17914 },
17915 },
17916 {
17917 name: "MOVHstore",
17918 auxType: auxSymOff,
17919 argLen: 3,
17920 faultOnNilArg0: true,
17921 symEffect: SymWrite,
17922 asm: arm.AMOVH,
17923 reg: regInfo{
17924 inputs: []inputInfo{
17925 {1, 22527},
17926 {0, 4294998015},
17927 },
17928 },
17929 },
17930 {
17931 name: "MOVWstore",
17932 auxType: auxSymOff,
17933 argLen: 3,
17934 faultOnNilArg0: true,
17935 symEffect: SymWrite,
17936 asm: arm.AMOVW,
17937 reg: regInfo{
17938 inputs: []inputInfo{
17939 {1, 22527},
17940 {0, 4294998015},
17941 },
17942 },
17943 },
17944 {
17945 name: "MOVFstore",
17946 auxType: auxSymOff,
17947 argLen: 3,
17948 faultOnNilArg0: true,
17949 symEffect: SymWrite,
17950 asm: arm.AMOVF,
17951 reg: regInfo{
17952 inputs: []inputInfo{
17953 {0, 4294998015},
17954 {1, 4294901760},
17955 },
17956 },
17957 },
17958 {
17959 name: "MOVDstore",
17960 auxType: auxSymOff,
17961 argLen: 3,
17962 faultOnNilArg0: true,
17963 symEffect: SymWrite,
17964 asm: arm.AMOVD,
17965 reg: regInfo{
17966 inputs: []inputInfo{
17967 {0, 4294998015},
17968 {1, 4294901760},
17969 },
17970 },
17971 },
17972 {
17973 name: "MOVWloadidx",
17974 argLen: 3,
17975 asm: arm.AMOVW,
17976 reg: regInfo{
17977 inputs: []inputInfo{
17978 {1, 22527},
17979 {0, 4294998015},
17980 },
17981 outputs: []outputInfo{
17982 {0, 21503},
17983 },
17984 },
17985 },
17986 {
17987 name: "MOVWloadshiftLL",
17988 auxType: auxInt32,
17989 argLen: 3,
17990 asm: arm.AMOVW,
17991 reg: regInfo{
17992 inputs: []inputInfo{
17993 {1, 22527},
17994 {0, 4294998015},
17995 },
17996 outputs: []outputInfo{
17997 {0, 21503},
17998 },
17999 },
18000 },
18001 {
18002 name: "MOVWloadshiftRL",
18003 auxType: auxInt32,
18004 argLen: 3,
18005 asm: arm.AMOVW,
18006 reg: regInfo{
18007 inputs: []inputInfo{
18008 {1, 22527},
18009 {0, 4294998015},
18010 },
18011 outputs: []outputInfo{
18012 {0, 21503},
18013 },
18014 },
18015 },
18016 {
18017 name: "MOVWloadshiftRA",
18018 auxType: auxInt32,
18019 argLen: 3,
18020 asm: arm.AMOVW,
18021 reg: regInfo{
18022 inputs: []inputInfo{
18023 {1, 22527},
18024 {0, 4294998015},
18025 },
18026 outputs: []outputInfo{
18027 {0, 21503},
18028 },
18029 },
18030 },
18031 {
18032 name: "MOVBUloadidx",
18033 argLen: 3,
18034 asm: arm.AMOVBU,
18035 reg: regInfo{
18036 inputs: []inputInfo{
18037 {1, 22527},
18038 {0, 4294998015},
18039 },
18040 outputs: []outputInfo{
18041 {0, 21503},
18042 },
18043 },
18044 },
18045 {
18046 name: "MOVBloadidx",
18047 argLen: 3,
18048 asm: arm.AMOVB,
18049 reg: regInfo{
18050 inputs: []inputInfo{
18051 {1, 22527},
18052 {0, 4294998015},
18053 },
18054 outputs: []outputInfo{
18055 {0, 21503},
18056 },
18057 },
18058 },
18059 {
18060 name: "MOVHUloadidx",
18061 argLen: 3,
18062 asm: arm.AMOVHU,
18063 reg: regInfo{
18064 inputs: []inputInfo{
18065 {1, 22527},
18066 {0, 4294998015},
18067 },
18068 outputs: []outputInfo{
18069 {0, 21503},
18070 },
18071 },
18072 },
18073 {
18074 name: "MOVHloadidx",
18075 argLen: 3,
18076 asm: arm.AMOVH,
18077 reg: regInfo{
18078 inputs: []inputInfo{
18079 {1, 22527},
18080 {0, 4294998015},
18081 },
18082 outputs: []outputInfo{
18083 {0, 21503},
18084 },
18085 },
18086 },
18087 {
18088 name: "MOVWstoreidx",
18089 argLen: 4,
18090 asm: arm.AMOVW,
18091 reg: regInfo{
18092 inputs: []inputInfo{
18093 {1, 22527},
18094 {2, 22527},
18095 {0, 4294998015},
18096 },
18097 },
18098 },
18099 {
18100 name: "MOVWstoreshiftLL",
18101 auxType: auxInt32,
18102 argLen: 4,
18103 asm: arm.AMOVW,
18104 reg: regInfo{
18105 inputs: []inputInfo{
18106 {1, 22527},
18107 {2, 22527},
18108 {0, 4294998015},
18109 },
18110 },
18111 },
18112 {
18113 name: "MOVWstoreshiftRL",
18114 auxType: auxInt32,
18115 argLen: 4,
18116 asm: arm.AMOVW,
18117 reg: regInfo{
18118 inputs: []inputInfo{
18119 {1, 22527},
18120 {2, 22527},
18121 {0, 4294998015},
18122 },
18123 },
18124 },
18125 {
18126 name: "MOVWstoreshiftRA",
18127 auxType: auxInt32,
18128 argLen: 4,
18129 asm: arm.AMOVW,
18130 reg: regInfo{
18131 inputs: []inputInfo{
18132 {1, 22527},
18133 {2, 22527},
18134 {0, 4294998015},
18135 },
18136 },
18137 },
18138 {
18139 name: "MOVBstoreidx",
18140 argLen: 4,
18141 asm: arm.AMOVB,
18142 reg: regInfo{
18143 inputs: []inputInfo{
18144 {1, 22527},
18145 {2, 22527},
18146 {0, 4294998015},
18147 },
18148 },
18149 },
18150 {
18151 name: "MOVHstoreidx",
18152 argLen: 4,
18153 asm: arm.AMOVH,
18154 reg: regInfo{
18155 inputs: []inputInfo{
18156 {1, 22527},
18157 {2, 22527},
18158 {0, 4294998015},
18159 },
18160 },
18161 },
18162 {
18163 name: "MOVBreg",
18164 argLen: 1,
18165 asm: arm.AMOVBS,
18166 reg: regInfo{
18167 inputs: []inputInfo{
18168 {0, 22527},
18169 },
18170 outputs: []outputInfo{
18171 {0, 21503},
18172 },
18173 },
18174 },
18175 {
18176 name: "MOVBUreg",
18177 argLen: 1,
18178 asm: arm.AMOVBU,
18179 reg: regInfo{
18180 inputs: []inputInfo{
18181 {0, 22527},
18182 },
18183 outputs: []outputInfo{
18184 {0, 21503},
18185 },
18186 },
18187 },
18188 {
18189 name: "MOVHreg",
18190 argLen: 1,
18191 asm: arm.AMOVHS,
18192 reg: regInfo{
18193 inputs: []inputInfo{
18194 {0, 22527},
18195 },
18196 outputs: []outputInfo{
18197 {0, 21503},
18198 },
18199 },
18200 },
18201 {
18202 name: "MOVHUreg",
18203 argLen: 1,
18204 asm: arm.AMOVHU,
18205 reg: regInfo{
18206 inputs: []inputInfo{
18207 {0, 22527},
18208 },
18209 outputs: []outputInfo{
18210 {0, 21503},
18211 },
18212 },
18213 },
18214 {
18215 name: "MOVWreg",
18216 argLen: 1,
18217 asm: arm.AMOVW,
18218 reg: regInfo{
18219 inputs: []inputInfo{
18220 {0, 22527},
18221 },
18222 outputs: []outputInfo{
18223 {0, 21503},
18224 },
18225 },
18226 },
18227 {
18228 name: "MOVWnop",
18229 argLen: 1,
18230 resultInArg0: true,
18231 reg: regInfo{
18232 inputs: []inputInfo{
18233 {0, 21503},
18234 },
18235 outputs: []outputInfo{
18236 {0, 21503},
18237 },
18238 },
18239 },
18240 {
18241 name: "MOVWF",
18242 argLen: 1,
18243 asm: arm.AMOVWF,
18244 reg: regInfo{
18245 inputs: []inputInfo{
18246 {0, 21503},
18247 },
18248 clobbers: 2147483648,
18249 outputs: []outputInfo{
18250 {0, 4294901760},
18251 },
18252 },
18253 },
18254 {
18255 name: "MOVWD",
18256 argLen: 1,
18257 asm: arm.AMOVWD,
18258 reg: regInfo{
18259 inputs: []inputInfo{
18260 {0, 21503},
18261 },
18262 clobbers: 2147483648,
18263 outputs: []outputInfo{
18264 {0, 4294901760},
18265 },
18266 },
18267 },
18268 {
18269 name: "MOVWUF",
18270 argLen: 1,
18271 asm: arm.AMOVWF,
18272 reg: regInfo{
18273 inputs: []inputInfo{
18274 {0, 21503},
18275 },
18276 clobbers: 2147483648,
18277 outputs: []outputInfo{
18278 {0, 4294901760},
18279 },
18280 },
18281 },
18282 {
18283 name: "MOVWUD",
18284 argLen: 1,
18285 asm: arm.AMOVWD,
18286 reg: regInfo{
18287 inputs: []inputInfo{
18288 {0, 21503},
18289 },
18290 clobbers: 2147483648,
18291 outputs: []outputInfo{
18292 {0, 4294901760},
18293 },
18294 },
18295 },
18296 {
18297 name: "MOVFW",
18298 argLen: 1,
18299 asm: arm.AMOVFW,
18300 reg: regInfo{
18301 inputs: []inputInfo{
18302 {0, 4294901760},
18303 },
18304 clobbers: 2147483648,
18305 outputs: []outputInfo{
18306 {0, 21503},
18307 },
18308 },
18309 },
18310 {
18311 name: "MOVDW",
18312 argLen: 1,
18313 asm: arm.AMOVDW,
18314 reg: regInfo{
18315 inputs: []inputInfo{
18316 {0, 4294901760},
18317 },
18318 clobbers: 2147483648,
18319 outputs: []outputInfo{
18320 {0, 21503},
18321 },
18322 },
18323 },
18324 {
18325 name: "MOVFWU",
18326 argLen: 1,
18327 asm: arm.AMOVFW,
18328 reg: regInfo{
18329 inputs: []inputInfo{
18330 {0, 4294901760},
18331 },
18332 clobbers: 2147483648,
18333 outputs: []outputInfo{
18334 {0, 21503},
18335 },
18336 },
18337 },
18338 {
18339 name: "MOVDWU",
18340 argLen: 1,
18341 asm: arm.AMOVDW,
18342 reg: regInfo{
18343 inputs: []inputInfo{
18344 {0, 4294901760},
18345 },
18346 clobbers: 2147483648,
18347 outputs: []outputInfo{
18348 {0, 21503},
18349 },
18350 },
18351 },
18352 {
18353 name: "MOVFD",
18354 argLen: 1,
18355 asm: arm.AMOVFD,
18356 reg: regInfo{
18357 inputs: []inputInfo{
18358 {0, 4294901760},
18359 },
18360 outputs: []outputInfo{
18361 {0, 4294901760},
18362 },
18363 },
18364 },
18365 {
18366 name: "MOVDF",
18367 argLen: 1,
18368 asm: arm.AMOVDF,
18369 reg: regInfo{
18370 inputs: []inputInfo{
18371 {0, 4294901760},
18372 },
18373 outputs: []outputInfo{
18374 {0, 4294901760},
18375 },
18376 },
18377 },
18378 {
18379 name: "CMOVWHSconst",
18380 auxType: auxInt32,
18381 argLen: 2,
18382 resultInArg0: true,
18383 asm: arm.AMOVW,
18384 reg: regInfo{
18385 inputs: []inputInfo{
18386 {0, 21503},
18387 },
18388 outputs: []outputInfo{
18389 {0, 21503},
18390 },
18391 },
18392 },
18393 {
18394 name: "CMOVWLSconst",
18395 auxType: auxInt32,
18396 argLen: 2,
18397 resultInArg0: true,
18398 asm: arm.AMOVW,
18399 reg: regInfo{
18400 inputs: []inputInfo{
18401 {0, 21503},
18402 },
18403 outputs: []outputInfo{
18404 {0, 21503},
18405 },
18406 },
18407 },
18408 {
18409 name: "SRAcond",
18410 argLen: 3,
18411 asm: arm.ASRA,
18412 reg: regInfo{
18413 inputs: []inputInfo{
18414 {0, 21503},
18415 {1, 21503},
18416 },
18417 outputs: []outputInfo{
18418 {0, 21503},
18419 },
18420 },
18421 },
18422 {
18423 name: "CALLstatic",
18424 auxType: auxCallOff,
18425 argLen: 1,
18426 clobberFlags: true,
18427 call: true,
18428 reg: regInfo{
18429 clobbers: 4294924287,
18430 },
18431 },
18432 {
18433 name: "CALLtail",
18434 auxType: auxCallOff,
18435 argLen: 1,
18436 clobberFlags: true,
18437 call: true,
18438 tailCall: true,
18439 reg: regInfo{
18440 clobbers: 4294924287,
18441 },
18442 },
18443 {
18444 name: "CALLclosure",
18445 auxType: auxCallOff,
18446 argLen: 3,
18447 clobberFlags: true,
18448 call: true,
18449 reg: regInfo{
18450 inputs: []inputInfo{
18451 {1, 128},
18452 {0, 29695},
18453 },
18454 clobbers: 4294924287,
18455 },
18456 },
18457 {
18458 name: "CALLinter",
18459 auxType: auxCallOff,
18460 argLen: 2,
18461 clobberFlags: true,
18462 call: true,
18463 reg: regInfo{
18464 inputs: []inputInfo{
18465 {0, 21503},
18466 },
18467 clobbers: 4294924287,
18468 },
18469 },
18470 {
18471 name: "LoweredNilCheck",
18472 argLen: 2,
18473 nilCheck: true,
18474 faultOnNilArg0: true,
18475 reg: regInfo{
18476 inputs: []inputInfo{
18477 {0, 22527},
18478 },
18479 },
18480 },
18481 {
18482 name: "Equal",
18483 argLen: 1,
18484 reg: regInfo{
18485 outputs: []outputInfo{
18486 {0, 21503},
18487 },
18488 },
18489 },
18490 {
18491 name: "NotEqual",
18492 argLen: 1,
18493 reg: regInfo{
18494 outputs: []outputInfo{
18495 {0, 21503},
18496 },
18497 },
18498 },
18499 {
18500 name: "LessThan",
18501 argLen: 1,
18502 reg: regInfo{
18503 outputs: []outputInfo{
18504 {0, 21503},
18505 },
18506 },
18507 },
18508 {
18509 name: "LessEqual",
18510 argLen: 1,
18511 reg: regInfo{
18512 outputs: []outputInfo{
18513 {0, 21503},
18514 },
18515 },
18516 },
18517 {
18518 name: "GreaterThan",
18519 argLen: 1,
18520 reg: regInfo{
18521 outputs: []outputInfo{
18522 {0, 21503},
18523 },
18524 },
18525 },
18526 {
18527 name: "GreaterEqual",
18528 argLen: 1,
18529 reg: regInfo{
18530 outputs: []outputInfo{
18531 {0, 21503},
18532 },
18533 },
18534 },
18535 {
18536 name: "LessThanU",
18537 argLen: 1,
18538 reg: regInfo{
18539 outputs: []outputInfo{
18540 {0, 21503},
18541 },
18542 },
18543 },
18544 {
18545 name: "LessEqualU",
18546 argLen: 1,
18547 reg: regInfo{
18548 outputs: []outputInfo{
18549 {0, 21503},
18550 },
18551 },
18552 },
18553 {
18554 name: "GreaterThanU",
18555 argLen: 1,
18556 reg: regInfo{
18557 outputs: []outputInfo{
18558 {0, 21503},
18559 },
18560 },
18561 },
18562 {
18563 name: "GreaterEqualU",
18564 argLen: 1,
18565 reg: regInfo{
18566 outputs: []outputInfo{
18567 {0, 21503},
18568 },
18569 },
18570 },
18571 {
18572 name: "DUFFZERO",
18573 auxType: auxInt64,
18574 argLen: 3,
18575 faultOnNilArg0: true,
18576 reg: regInfo{
18577 inputs: []inputInfo{
18578 {0, 2},
18579 {1, 1},
18580 },
18581 clobbers: 20482,
18582 },
18583 },
18584 {
18585 name: "DUFFCOPY",
18586 auxType: auxInt64,
18587 argLen: 3,
18588 faultOnNilArg0: true,
18589 faultOnNilArg1: true,
18590 reg: regInfo{
18591 inputs: []inputInfo{
18592 {0, 4},
18593 {1, 2},
18594 },
18595 clobbers: 20487,
18596 },
18597 },
18598 {
18599 name: "LoweredZero",
18600 auxType: auxInt64,
18601 argLen: 4,
18602 clobberFlags: true,
18603 faultOnNilArg0: true,
18604 reg: regInfo{
18605 inputs: []inputInfo{
18606 {0, 2},
18607 {1, 21503},
18608 {2, 21503},
18609 },
18610 clobbers: 2,
18611 },
18612 },
18613 {
18614 name: "LoweredMove",
18615 auxType: auxInt64,
18616 argLen: 4,
18617 clobberFlags: true,
18618 faultOnNilArg0: true,
18619 faultOnNilArg1: true,
18620 reg: regInfo{
18621 inputs: []inputInfo{
18622 {0, 4},
18623 {1, 2},
18624 {2, 21503},
18625 },
18626 clobbers: 6,
18627 },
18628 },
18629 {
18630 name: "LoweredGetClosurePtr",
18631 argLen: 0,
18632 zeroWidth: true,
18633 reg: regInfo{
18634 outputs: []outputInfo{
18635 {0, 128},
18636 },
18637 },
18638 },
18639 {
18640 name: "LoweredGetCallerSP",
18641 argLen: 1,
18642 rematerializeable: true,
18643 reg: regInfo{
18644 outputs: []outputInfo{
18645 {0, 21503},
18646 },
18647 },
18648 },
18649 {
18650 name: "LoweredGetCallerPC",
18651 argLen: 0,
18652 rematerializeable: true,
18653 reg: regInfo{
18654 outputs: []outputInfo{
18655 {0, 21503},
18656 },
18657 },
18658 },
18659 {
18660 name: "LoweredPanicBoundsA",
18661 auxType: auxInt64,
18662 argLen: 3,
18663 call: true,
18664 reg: regInfo{
18665 inputs: []inputInfo{
18666 {0, 4},
18667 {1, 8},
18668 },
18669 },
18670 },
18671 {
18672 name: "LoweredPanicBoundsB",
18673 auxType: auxInt64,
18674 argLen: 3,
18675 call: true,
18676 reg: regInfo{
18677 inputs: []inputInfo{
18678 {0, 2},
18679 {1, 4},
18680 },
18681 },
18682 },
18683 {
18684 name: "LoweredPanicBoundsC",
18685 auxType: auxInt64,
18686 argLen: 3,
18687 call: true,
18688 reg: regInfo{
18689 inputs: []inputInfo{
18690 {0, 1},
18691 {1, 2},
18692 },
18693 },
18694 },
18695 {
18696 name: "LoweredPanicExtendA",
18697 auxType: auxInt64,
18698 argLen: 4,
18699 call: true,
18700 reg: regInfo{
18701 inputs: []inputInfo{
18702 {0, 16},
18703 {1, 4},
18704 {2, 8},
18705 },
18706 },
18707 },
18708 {
18709 name: "LoweredPanicExtendB",
18710 auxType: auxInt64,
18711 argLen: 4,
18712 call: true,
18713 reg: regInfo{
18714 inputs: []inputInfo{
18715 {0, 16},
18716 {1, 2},
18717 {2, 4},
18718 },
18719 },
18720 },
18721 {
18722 name: "LoweredPanicExtendC",
18723 auxType: auxInt64,
18724 argLen: 4,
18725 call: true,
18726 reg: regInfo{
18727 inputs: []inputInfo{
18728 {0, 16},
18729 {1, 1},
18730 {2, 2},
18731 },
18732 },
18733 },
18734 {
18735 name: "FlagConstant",
18736 auxType: auxFlagConstant,
18737 argLen: 0,
18738 reg: regInfo{},
18739 },
18740 {
18741 name: "InvertFlags",
18742 argLen: 1,
18743 reg: regInfo{},
18744 },
18745 {
18746 name: "LoweredWB",
18747 auxType: auxInt64,
18748 argLen: 1,
18749 clobberFlags: true,
18750 reg: regInfo{
18751 clobbers: 4294922240,
18752 outputs: []outputInfo{
18753 {0, 256},
18754 },
18755 },
18756 },
18757
18758 {
18759 name: "ADCSflags",
18760 argLen: 3,
18761 commutative: true,
18762 asm: arm64.AADCS,
18763 reg: regInfo{
18764 inputs: []inputInfo{
18765 {0, 670826495},
18766 {1, 670826495},
18767 },
18768 outputs: []outputInfo{
18769 {1, 0},
18770 {0, 670826495},
18771 },
18772 },
18773 },
18774 {
18775 name: "ADCzerocarry",
18776 argLen: 1,
18777 asm: arm64.AADC,
18778 reg: regInfo{
18779 outputs: []outputInfo{
18780 {0, 670826495},
18781 },
18782 },
18783 },
18784 {
18785 name: "ADD",
18786 argLen: 2,
18787 commutative: true,
18788 asm: arm64.AADD,
18789 reg: regInfo{
18790 inputs: []inputInfo{
18791 {0, 805044223},
18792 {1, 805044223},
18793 },
18794 outputs: []outputInfo{
18795 {0, 670826495},
18796 },
18797 },
18798 },
18799 {
18800 name: "ADDconst",
18801 auxType: auxInt64,
18802 argLen: 1,
18803 asm: arm64.AADD,
18804 reg: regInfo{
18805 inputs: []inputInfo{
18806 {0, 1878786047},
18807 },
18808 outputs: []outputInfo{
18809 {0, 670826495},
18810 },
18811 },
18812 },
18813 {
18814 name: "ADDSconstflags",
18815 auxType: auxInt64,
18816 argLen: 1,
18817 asm: arm64.AADDS,
18818 reg: regInfo{
18819 inputs: []inputInfo{
18820 {0, 805044223},
18821 },
18822 outputs: []outputInfo{
18823 {1, 0},
18824 {0, 670826495},
18825 },
18826 },
18827 },
18828 {
18829 name: "ADDSflags",
18830 argLen: 2,
18831 commutative: true,
18832 asm: arm64.AADDS,
18833 reg: regInfo{
18834 inputs: []inputInfo{
18835 {0, 670826495},
18836 {1, 670826495},
18837 },
18838 outputs: []outputInfo{
18839 {1, 0},
18840 {0, 670826495},
18841 },
18842 },
18843 },
18844 {
18845 name: "SUB",
18846 argLen: 2,
18847 asm: arm64.ASUB,
18848 reg: regInfo{
18849 inputs: []inputInfo{
18850 {0, 805044223},
18851 {1, 805044223},
18852 },
18853 outputs: []outputInfo{
18854 {0, 670826495},
18855 },
18856 },
18857 },
18858 {
18859 name: "SUBconst",
18860 auxType: auxInt64,
18861 argLen: 1,
18862 asm: arm64.ASUB,
18863 reg: regInfo{
18864 inputs: []inputInfo{
18865 {0, 805044223},
18866 },
18867 outputs: []outputInfo{
18868 {0, 670826495},
18869 },
18870 },
18871 },
18872 {
18873 name: "SBCSflags",
18874 argLen: 3,
18875 asm: arm64.ASBCS,
18876 reg: regInfo{
18877 inputs: []inputInfo{
18878 {0, 670826495},
18879 {1, 670826495},
18880 },
18881 outputs: []outputInfo{
18882 {1, 0},
18883 {0, 670826495},
18884 },
18885 },
18886 },
18887 {
18888 name: "SUBSflags",
18889 argLen: 2,
18890 asm: arm64.ASUBS,
18891 reg: regInfo{
18892 inputs: []inputInfo{
18893 {0, 670826495},
18894 {1, 670826495},
18895 },
18896 outputs: []outputInfo{
18897 {1, 0},
18898 {0, 670826495},
18899 },
18900 },
18901 },
18902 {
18903 name: "MUL",
18904 argLen: 2,
18905 commutative: true,
18906 asm: arm64.AMUL,
18907 reg: regInfo{
18908 inputs: []inputInfo{
18909 {0, 805044223},
18910 {1, 805044223},
18911 },
18912 outputs: []outputInfo{
18913 {0, 670826495},
18914 },
18915 },
18916 },
18917 {
18918 name: "MULW",
18919 argLen: 2,
18920 commutative: true,
18921 asm: arm64.AMULW,
18922 reg: regInfo{
18923 inputs: []inputInfo{
18924 {0, 805044223},
18925 {1, 805044223},
18926 },
18927 outputs: []outputInfo{
18928 {0, 670826495},
18929 },
18930 },
18931 },
18932 {
18933 name: "MNEG",
18934 argLen: 2,
18935 commutative: true,
18936 asm: arm64.AMNEG,
18937 reg: regInfo{
18938 inputs: []inputInfo{
18939 {0, 805044223},
18940 {1, 805044223},
18941 },
18942 outputs: []outputInfo{
18943 {0, 670826495},
18944 },
18945 },
18946 },
18947 {
18948 name: "MNEGW",
18949 argLen: 2,
18950 commutative: true,
18951 asm: arm64.AMNEGW,
18952 reg: regInfo{
18953 inputs: []inputInfo{
18954 {0, 805044223},
18955 {1, 805044223},
18956 },
18957 outputs: []outputInfo{
18958 {0, 670826495},
18959 },
18960 },
18961 },
18962 {
18963 name: "MULH",
18964 argLen: 2,
18965 commutative: true,
18966 asm: arm64.ASMULH,
18967 reg: regInfo{
18968 inputs: []inputInfo{
18969 {0, 805044223},
18970 {1, 805044223},
18971 },
18972 outputs: []outputInfo{
18973 {0, 670826495},
18974 },
18975 },
18976 },
18977 {
18978 name: "UMULH",
18979 argLen: 2,
18980 commutative: true,
18981 asm: arm64.AUMULH,
18982 reg: regInfo{
18983 inputs: []inputInfo{
18984 {0, 805044223},
18985 {1, 805044223},
18986 },
18987 outputs: []outputInfo{
18988 {0, 670826495},
18989 },
18990 },
18991 },
18992 {
18993 name: "MULL",
18994 argLen: 2,
18995 commutative: true,
18996 asm: arm64.ASMULL,
18997 reg: regInfo{
18998 inputs: []inputInfo{
18999 {0, 805044223},
19000 {1, 805044223},
19001 },
19002 outputs: []outputInfo{
19003 {0, 670826495},
19004 },
19005 },
19006 },
19007 {
19008 name: "UMULL",
19009 argLen: 2,
19010 commutative: true,
19011 asm: arm64.AUMULL,
19012 reg: regInfo{
19013 inputs: []inputInfo{
19014 {0, 805044223},
19015 {1, 805044223},
19016 },
19017 outputs: []outputInfo{
19018 {0, 670826495},
19019 },
19020 },
19021 },
19022 {
19023 name: "DIV",
19024 argLen: 2,
19025 asm: arm64.ASDIV,
19026 reg: regInfo{
19027 inputs: []inputInfo{
19028 {0, 805044223},
19029 {1, 805044223},
19030 },
19031 outputs: []outputInfo{
19032 {0, 670826495},
19033 },
19034 },
19035 },
19036 {
19037 name: "UDIV",
19038 argLen: 2,
19039 asm: arm64.AUDIV,
19040 reg: regInfo{
19041 inputs: []inputInfo{
19042 {0, 805044223},
19043 {1, 805044223},
19044 },
19045 outputs: []outputInfo{
19046 {0, 670826495},
19047 },
19048 },
19049 },
19050 {
19051 name: "DIVW",
19052 argLen: 2,
19053 asm: arm64.ASDIVW,
19054 reg: regInfo{
19055 inputs: []inputInfo{
19056 {0, 805044223},
19057 {1, 805044223},
19058 },
19059 outputs: []outputInfo{
19060 {0, 670826495},
19061 },
19062 },
19063 },
19064 {
19065 name: "UDIVW",
19066 argLen: 2,
19067 asm: arm64.AUDIVW,
19068 reg: regInfo{
19069 inputs: []inputInfo{
19070 {0, 805044223},
19071 {1, 805044223},
19072 },
19073 outputs: []outputInfo{
19074 {0, 670826495},
19075 },
19076 },
19077 },
19078 {
19079 name: "MOD",
19080 argLen: 2,
19081 asm: arm64.AREM,
19082 reg: regInfo{
19083 inputs: []inputInfo{
19084 {0, 805044223},
19085 {1, 805044223},
19086 },
19087 outputs: []outputInfo{
19088 {0, 670826495},
19089 },
19090 },
19091 },
19092 {
19093 name: "UMOD",
19094 argLen: 2,
19095 asm: arm64.AUREM,
19096 reg: regInfo{
19097 inputs: []inputInfo{
19098 {0, 805044223},
19099 {1, 805044223},
19100 },
19101 outputs: []outputInfo{
19102 {0, 670826495},
19103 },
19104 },
19105 },
19106 {
19107 name: "MODW",
19108 argLen: 2,
19109 asm: arm64.AREMW,
19110 reg: regInfo{
19111 inputs: []inputInfo{
19112 {0, 805044223},
19113 {1, 805044223},
19114 },
19115 outputs: []outputInfo{
19116 {0, 670826495},
19117 },
19118 },
19119 },
19120 {
19121 name: "UMODW",
19122 argLen: 2,
19123 asm: arm64.AUREMW,
19124 reg: regInfo{
19125 inputs: []inputInfo{
19126 {0, 805044223},
19127 {1, 805044223},
19128 },
19129 outputs: []outputInfo{
19130 {0, 670826495},
19131 },
19132 },
19133 },
19134 {
19135 name: "FADDS",
19136 argLen: 2,
19137 commutative: true,
19138 asm: arm64.AFADDS,
19139 reg: regInfo{
19140 inputs: []inputInfo{
19141 {0, 9223372034707292160},
19142 {1, 9223372034707292160},
19143 },
19144 outputs: []outputInfo{
19145 {0, 9223372034707292160},
19146 },
19147 },
19148 },
19149 {
19150 name: "FADDD",
19151 argLen: 2,
19152 commutative: true,
19153 asm: arm64.AFADDD,
19154 reg: regInfo{
19155 inputs: []inputInfo{
19156 {0, 9223372034707292160},
19157 {1, 9223372034707292160},
19158 },
19159 outputs: []outputInfo{
19160 {0, 9223372034707292160},
19161 },
19162 },
19163 },
19164 {
19165 name: "FSUBS",
19166 argLen: 2,
19167 asm: arm64.AFSUBS,
19168 reg: regInfo{
19169 inputs: []inputInfo{
19170 {0, 9223372034707292160},
19171 {1, 9223372034707292160},
19172 },
19173 outputs: []outputInfo{
19174 {0, 9223372034707292160},
19175 },
19176 },
19177 },
19178 {
19179 name: "FSUBD",
19180 argLen: 2,
19181 asm: arm64.AFSUBD,
19182 reg: regInfo{
19183 inputs: []inputInfo{
19184 {0, 9223372034707292160},
19185 {1, 9223372034707292160},
19186 },
19187 outputs: []outputInfo{
19188 {0, 9223372034707292160},
19189 },
19190 },
19191 },
19192 {
19193 name: "FMULS",
19194 argLen: 2,
19195 commutative: true,
19196 asm: arm64.AFMULS,
19197 reg: regInfo{
19198 inputs: []inputInfo{
19199 {0, 9223372034707292160},
19200 {1, 9223372034707292160},
19201 },
19202 outputs: []outputInfo{
19203 {0, 9223372034707292160},
19204 },
19205 },
19206 },
19207 {
19208 name: "FMULD",
19209 argLen: 2,
19210 commutative: true,
19211 asm: arm64.AFMULD,
19212 reg: regInfo{
19213 inputs: []inputInfo{
19214 {0, 9223372034707292160},
19215 {1, 9223372034707292160},
19216 },
19217 outputs: []outputInfo{
19218 {0, 9223372034707292160},
19219 },
19220 },
19221 },
19222 {
19223 name: "FNMULS",
19224 argLen: 2,
19225 commutative: true,
19226 asm: arm64.AFNMULS,
19227 reg: regInfo{
19228 inputs: []inputInfo{
19229 {0, 9223372034707292160},
19230 {1, 9223372034707292160},
19231 },
19232 outputs: []outputInfo{
19233 {0, 9223372034707292160},
19234 },
19235 },
19236 },
19237 {
19238 name: "FNMULD",
19239 argLen: 2,
19240 commutative: true,
19241 asm: arm64.AFNMULD,
19242 reg: regInfo{
19243 inputs: []inputInfo{
19244 {0, 9223372034707292160},
19245 {1, 9223372034707292160},
19246 },
19247 outputs: []outputInfo{
19248 {0, 9223372034707292160},
19249 },
19250 },
19251 },
19252 {
19253 name: "FDIVS",
19254 argLen: 2,
19255 asm: arm64.AFDIVS,
19256 reg: regInfo{
19257 inputs: []inputInfo{
19258 {0, 9223372034707292160},
19259 {1, 9223372034707292160},
19260 },
19261 outputs: []outputInfo{
19262 {0, 9223372034707292160},
19263 },
19264 },
19265 },
19266 {
19267 name: "FDIVD",
19268 argLen: 2,
19269 asm: arm64.AFDIVD,
19270 reg: regInfo{
19271 inputs: []inputInfo{
19272 {0, 9223372034707292160},
19273 {1, 9223372034707292160},
19274 },
19275 outputs: []outputInfo{
19276 {0, 9223372034707292160},
19277 },
19278 },
19279 },
19280 {
19281 name: "AND",
19282 argLen: 2,
19283 commutative: true,
19284 asm: arm64.AAND,
19285 reg: regInfo{
19286 inputs: []inputInfo{
19287 {0, 805044223},
19288 {1, 805044223},
19289 },
19290 outputs: []outputInfo{
19291 {0, 670826495},
19292 },
19293 },
19294 },
19295 {
19296 name: "ANDconst",
19297 auxType: auxInt64,
19298 argLen: 1,
19299 asm: arm64.AAND,
19300 reg: regInfo{
19301 inputs: []inputInfo{
19302 {0, 805044223},
19303 },
19304 outputs: []outputInfo{
19305 {0, 670826495},
19306 },
19307 },
19308 },
19309 {
19310 name: "OR",
19311 argLen: 2,
19312 commutative: true,
19313 asm: arm64.AORR,
19314 reg: regInfo{
19315 inputs: []inputInfo{
19316 {0, 805044223},
19317 {1, 805044223},
19318 },
19319 outputs: []outputInfo{
19320 {0, 670826495},
19321 },
19322 },
19323 },
19324 {
19325 name: "ORconst",
19326 auxType: auxInt64,
19327 argLen: 1,
19328 asm: arm64.AORR,
19329 reg: regInfo{
19330 inputs: []inputInfo{
19331 {0, 805044223},
19332 },
19333 outputs: []outputInfo{
19334 {0, 670826495},
19335 },
19336 },
19337 },
19338 {
19339 name: "XOR",
19340 argLen: 2,
19341 commutative: true,
19342 asm: arm64.AEOR,
19343 reg: regInfo{
19344 inputs: []inputInfo{
19345 {0, 805044223},
19346 {1, 805044223},
19347 },
19348 outputs: []outputInfo{
19349 {0, 670826495},
19350 },
19351 },
19352 },
19353 {
19354 name: "XORconst",
19355 auxType: auxInt64,
19356 argLen: 1,
19357 asm: arm64.AEOR,
19358 reg: regInfo{
19359 inputs: []inputInfo{
19360 {0, 805044223},
19361 },
19362 outputs: []outputInfo{
19363 {0, 670826495},
19364 },
19365 },
19366 },
19367 {
19368 name: "BIC",
19369 argLen: 2,
19370 asm: arm64.ABIC,
19371 reg: regInfo{
19372 inputs: []inputInfo{
19373 {0, 805044223},
19374 {1, 805044223},
19375 },
19376 outputs: []outputInfo{
19377 {0, 670826495},
19378 },
19379 },
19380 },
19381 {
19382 name: "EON",
19383 argLen: 2,
19384 asm: arm64.AEON,
19385 reg: regInfo{
19386 inputs: []inputInfo{
19387 {0, 805044223},
19388 {1, 805044223},
19389 },
19390 outputs: []outputInfo{
19391 {0, 670826495},
19392 },
19393 },
19394 },
19395 {
19396 name: "ORN",
19397 argLen: 2,
19398 asm: arm64.AORN,
19399 reg: regInfo{
19400 inputs: []inputInfo{
19401 {0, 805044223},
19402 {1, 805044223},
19403 },
19404 outputs: []outputInfo{
19405 {0, 670826495},
19406 },
19407 },
19408 },
19409 {
19410 name: "MVN",
19411 argLen: 1,
19412 asm: arm64.AMVN,
19413 reg: regInfo{
19414 inputs: []inputInfo{
19415 {0, 805044223},
19416 },
19417 outputs: []outputInfo{
19418 {0, 670826495},
19419 },
19420 },
19421 },
19422 {
19423 name: "NEG",
19424 argLen: 1,
19425 asm: arm64.ANEG,
19426 reg: regInfo{
19427 inputs: []inputInfo{
19428 {0, 805044223},
19429 },
19430 outputs: []outputInfo{
19431 {0, 670826495},
19432 },
19433 },
19434 },
19435 {
19436 name: "NEGSflags",
19437 argLen: 1,
19438 asm: arm64.ANEGS,
19439 reg: regInfo{
19440 inputs: []inputInfo{
19441 {0, 805044223},
19442 },
19443 outputs: []outputInfo{
19444 {1, 0},
19445 {0, 670826495},
19446 },
19447 },
19448 },
19449 {
19450 name: "NGCzerocarry",
19451 argLen: 1,
19452 asm: arm64.ANGC,
19453 reg: regInfo{
19454 outputs: []outputInfo{
19455 {0, 670826495},
19456 },
19457 },
19458 },
19459 {
19460 name: "FABSD",
19461 argLen: 1,
19462 asm: arm64.AFABSD,
19463 reg: regInfo{
19464 inputs: []inputInfo{
19465 {0, 9223372034707292160},
19466 },
19467 outputs: []outputInfo{
19468 {0, 9223372034707292160},
19469 },
19470 },
19471 },
19472 {
19473 name: "FNEGS",
19474 argLen: 1,
19475 asm: arm64.AFNEGS,
19476 reg: regInfo{
19477 inputs: []inputInfo{
19478 {0, 9223372034707292160},
19479 },
19480 outputs: []outputInfo{
19481 {0, 9223372034707292160},
19482 },
19483 },
19484 },
19485 {
19486 name: "FNEGD",
19487 argLen: 1,
19488 asm: arm64.AFNEGD,
19489 reg: regInfo{
19490 inputs: []inputInfo{
19491 {0, 9223372034707292160},
19492 },
19493 outputs: []outputInfo{
19494 {0, 9223372034707292160},
19495 },
19496 },
19497 },
19498 {
19499 name: "FSQRTD",
19500 argLen: 1,
19501 asm: arm64.AFSQRTD,
19502 reg: regInfo{
19503 inputs: []inputInfo{
19504 {0, 9223372034707292160},
19505 },
19506 outputs: []outputInfo{
19507 {0, 9223372034707292160},
19508 },
19509 },
19510 },
19511 {
19512 name: "FSQRTS",
19513 argLen: 1,
19514 asm: arm64.AFSQRTS,
19515 reg: regInfo{
19516 inputs: []inputInfo{
19517 {0, 9223372034707292160},
19518 },
19519 outputs: []outputInfo{
19520 {0, 9223372034707292160},
19521 },
19522 },
19523 },
19524 {
19525 name: "FMIND",
19526 argLen: 2,
19527 asm: arm64.AFMIND,
19528 reg: regInfo{
19529 inputs: []inputInfo{
19530 {0, 9223372034707292160},
19531 {1, 9223372034707292160},
19532 },
19533 outputs: []outputInfo{
19534 {0, 9223372034707292160},
19535 },
19536 },
19537 },
19538 {
19539 name: "FMINS",
19540 argLen: 2,
19541 asm: arm64.AFMINS,
19542 reg: regInfo{
19543 inputs: []inputInfo{
19544 {0, 9223372034707292160},
19545 {1, 9223372034707292160},
19546 },
19547 outputs: []outputInfo{
19548 {0, 9223372034707292160},
19549 },
19550 },
19551 },
19552 {
19553 name: "FMAXD",
19554 argLen: 2,
19555 asm: arm64.AFMAXD,
19556 reg: regInfo{
19557 inputs: []inputInfo{
19558 {0, 9223372034707292160},
19559 {1, 9223372034707292160},
19560 },
19561 outputs: []outputInfo{
19562 {0, 9223372034707292160},
19563 },
19564 },
19565 },
19566 {
19567 name: "FMAXS",
19568 argLen: 2,
19569 asm: arm64.AFMAXS,
19570 reg: regInfo{
19571 inputs: []inputInfo{
19572 {0, 9223372034707292160},
19573 {1, 9223372034707292160},
19574 },
19575 outputs: []outputInfo{
19576 {0, 9223372034707292160},
19577 },
19578 },
19579 },
19580 {
19581 name: "REV",
19582 argLen: 1,
19583 asm: arm64.AREV,
19584 reg: regInfo{
19585 inputs: []inputInfo{
19586 {0, 805044223},
19587 },
19588 outputs: []outputInfo{
19589 {0, 670826495},
19590 },
19591 },
19592 },
19593 {
19594 name: "REVW",
19595 argLen: 1,
19596 asm: arm64.AREVW,
19597 reg: regInfo{
19598 inputs: []inputInfo{
19599 {0, 805044223},
19600 },
19601 outputs: []outputInfo{
19602 {0, 670826495},
19603 },
19604 },
19605 },
19606 {
19607 name: "REV16",
19608 argLen: 1,
19609 asm: arm64.AREV16,
19610 reg: regInfo{
19611 inputs: []inputInfo{
19612 {0, 805044223},
19613 },
19614 outputs: []outputInfo{
19615 {0, 670826495},
19616 },
19617 },
19618 },
19619 {
19620 name: "REV16W",
19621 argLen: 1,
19622 asm: arm64.AREV16W,
19623 reg: regInfo{
19624 inputs: []inputInfo{
19625 {0, 805044223},
19626 },
19627 outputs: []outputInfo{
19628 {0, 670826495},
19629 },
19630 },
19631 },
19632 {
19633 name: "RBIT",
19634 argLen: 1,
19635 asm: arm64.ARBIT,
19636 reg: regInfo{
19637 inputs: []inputInfo{
19638 {0, 805044223},
19639 },
19640 outputs: []outputInfo{
19641 {0, 670826495},
19642 },
19643 },
19644 },
19645 {
19646 name: "RBITW",
19647 argLen: 1,
19648 asm: arm64.ARBITW,
19649 reg: regInfo{
19650 inputs: []inputInfo{
19651 {0, 805044223},
19652 },
19653 outputs: []outputInfo{
19654 {0, 670826495},
19655 },
19656 },
19657 },
19658 {
19659 name: "CLZ",
19660 argLen: 1,
19661 asm: arm64.ACLZ,
19662 reg: regInfo{
19663 inputs: []inputInfo{
19664 {0, 805044223},
19665 },
19666 outputs: []outputInfo{
19667 {0, 670826495},
19668 },
19669 },
19670 },
19671 {
19672 name: "CLZW",
19673 argLen: 1,
19674 asm: arm64.ACLZW,
19675 reg: regInfo{
19676 inputs: []inputInfo{
19677 {0, 805044223},
19678 },
19679 outputs: []outputInfo{
19680 {0, 670826495},
19681 },
19682 },
19683 },
19684 {
19685 name: "VCNT",
19686 argLen: 1,
19687 asm: arm64.AVCNT,
19688 reg: regInfo{
19689 inputs: []inputInfo{
19690 {0, 9223372034707292160},
19691 },
19692 outputs: []outputInfo{
19693 {0, 9223372034707292160},
19694 },
19695 },
19696 },
19697 {
19698 name: "VUADDLV",
19699 argLen: 1,
19700 asm: arm64.AVUADDLV,
19701 reg: regInfo{
19702 inputs: []inputInfo{
19703 {0, 9223372034707292160},
19704 },
19705 outputs: []outputInfo{
19706 {0, 9223372034707292160},
19707 },
19708 },
19709 },
19710 {
19711 name: "LoweredRound32F",
19712 argLen: 1,
19713 resultInArg0: true,
19714 zeroWidth: true,
19715 reg: regInfo{
19716 inputs: []inputInfo{
19717 {0, 9223372034707292160},
19718 },
19719 outputs: []outputInfo{
19720 {0, 9223372034707292160},
19721 },
19722 },
19723 },
19724 {
19725 name: "LoweredRound64F",
19726 argLen: 1,
19727 resultInArg0: true,
19728 zeroWidth: true,
19729 reg: regInfo{
19730 inputs: []inputInfo{
19731 {0, 9223372034707292160},
19732 },
19733 outputs: []outputInfo{
19734 {0, 9223372034707292160},
19735 },
19736 },
19737 },
19738 {
19739 name: "FMADDS",
19740 argLen: 3,
19741 asm: arm64.AFMADDS,
19742 reg: regInfo{
19743 inputs: []inputInfo{
19744 {0, 9223372034707292160},
19745 {1, 9223372034707292160},
19746 {2, 9223372034707292160},
19747 },
19748 outputs: []outputInfo{
19749 {0, 9223372034707292160},
19750 },
19751 },
19752 },
19753 {
19754 name: "FMADDD",
19755 argLen: 3,
19756 asm: arm64.AFMADDD,
19757 reg: regInfo{
19758 inputs: []inputInfo{
19759 {0, 9223372034707292160},
19760 {1, 9223372034707292160},
19761 {2, 9223372034707292160},
19762 },
19763 outputs: []outputInfo{
19764 {0, 9223372034707292160},
19765 },
19766 },
19767 },
19768 {
19769 name: "FNMADDS",
19770 argLen: 3,
19771 asm: arm64.AFNMADDS,
19772 reg: regInfo{
19773 inputs: []inputInfo{
19774 {0, 9223372034707292160},
19775 {1, 9223372034707292160},
19776 {2, 9223372034707292160},
19777 },
19778 outputs: []outputInfo{
19779 {0, 9223372034707292160},
19780 },
19781 },
19782 },
19783 {
19784 name: "FNMADDD",
19785 argLen: 3,
19786 asm: arm64.AFNMADDD,
19787 reg: regInfo{
19788 inputs: []inputInfo{
19789 {0, 9223372034707292160},
19790 {1, 9223372034707292160},
19791 {2, 9223372034707292160},
19792 },
19793 outputs: []outputInfo{
19794 {0, 9223372034707292160},
19795 },
19796 },
19797 },
19798 {
19799 name: "FMSUBS",
19800 argLen: 3,
19801 asm: arm64.AFMSUBS,
19802 reg: regInfo{
19803 inputs: []inputInfo{
19804 {0, 9223372034707292160},
19805 {1, 9223372034707292160},
19806 {2, 9223372034707292160},
19807 },
19808 outputs: []outputInfo{
19809 {0, 9223372034707292160},
19810 },
19811 },
19812 },
19813 {
19814 name: "FMSUBD",
19815 argLen: 3,
19816 asm: arm64.AFMSUBD,
19817 reg: regInfo{
19818 inputs: []inputInfo{
19819 {0, 9223372034707292160},
19820 {1, 9223372034707292160},
19821 {2, 9223372034707292160},
19822 },
19823 outputs: []outputInfo{
19824 {0, 9223372034707292160},
19825 },
19826 },
19827 },
19828 {
19829 name: "FNMSUBS",
19830 argLen: 3,
19831 asm: arm64.AFNMSUBS,
19832 reg: regInfo{
19833 inputs: []inputInfo{
19834 {0, 9223372034707292160},
19835 {1, 9223372034707292160},
19836 {2, 9223372034707292160},
19837 },
19838 outputs: []outputInfo{
19839 {0, 9223372034707292160},
19840 },
19841 },
19842 },
19843 {
19844 name: "FNMSUBD",
19845 argLen: 3,
19846 asm: arm64.AFNMSUBD,
19847 reg: regInfo{
19848 inputs: []inputInfo{
19849 {0, 9223372034707292160},
19850 {1, 9223372034707292160},
19851 {2, 9223372034707292160},
19852 },
19853 outputs: []outputInfo{
19854 {0, 9223372034707292160},
19855 },
19856 },
19857 },
19858 {
19859 name: "MADD",
19860 argLen: 3,
19861 asm: arm64.AMADD,
19862 reg: regInfo{
19863 inputs: []inputInfo{
19864 {0, 805044223},
19865 {1, 805044223},
19866 {2, 805044223},
19867 },
19868 outputs: []outputInfo{
19869 {0, 670826495},
19870 },
19871 },
19872 },
19873 {
19874 name: "MADDW",
19875 argLen: 3,
19876 asm: arm64.AMADDW,
19877 reg: regInfo{
19878 inputs: []inputInfo{
19879 {0, 805044223},
19880 {1, 805044223},
19881 {2, 805044223},
19882 },
19883 outputs: []outputInfo{
19884 {0, 670826495},
19885 },
19886 },
19887 },
19888 {
19889 name: "MSUB",
19890 argLen: 3,
19891 asm: arm64.AMSUB,
19892 reg: regInfo{
19893 inputs: []inputInfo{
19894 {0, 805044223},
19895 {1, 805044223},
19896 {2, 805044223},
19897 },
19898 outputs: []outputInfo{
19899 {0, 670826495},
19900 },
19901 },
19902 },
19903 {
19904 name: "MSUBW",
19905 argLen: 3,
19906 asm: arm64.AMSUBW,
19907 reg: regInfo{
19908 inputs: []inputInfo{
19909 {0, 805044223},
19910 {1, 805044223},
19911 {2, 805044223},
19912 },
19913 outputs: []outputInfo{
19914 {0, 670826495},
19915 },
19916 },
19917 },
19918 {
19919 name: "SLL",
19920 argLen: 2,
19921 asm: arm64.ALSL,
19922 reg: regInfo{
19923 inputs: []inputInfo{
19924 {0, 805044223},
19925 {1, 805044223},
19926 },
19927 outputs: []outputInfo{
19928 {0, 670826495},
19929 },
19930 },
19931 },
19932 {
19933 name: "SLLconst",
19934 auxType: auxInt64,
19935 argLen: 1,
19936 asm: arm64.ALSL,
19937 reg: regInfo{
19938 inputs: []inputInfo{
19939 {0, 805044223},
19940 },
19941 outputs: []outputInfo{
19942 {0, 670826495},
19943 },
19944 },
19945 },
19946 {
19947 name: "SRL",
19948 argLen: 2,
19949 asm: arm64.ALSR,
19950 reg: regInfo{
19951 inputs: []inputInfo{
19952 {0, 805044223},
19953 {1, 805044223},
19954 },
19955 outputs: []outputInfo{
19956 {0, 670826495},
19957 },
19958 },
19959 },
19960 {
19961 name: "SRLconst",
19962 auxType: auxInt64,
19963 argLen: 1,
19964 asm: arm64.ALSR,
19965 reg: regInfo{
19966 inputs: []inputInfo{
19967 {0, 805044223},
19968 },
19969 outputs: []outputInfo{
19970 {0, 670826495},
19971 },
19972 },
19973 },
19974 {
19975 name: "SRA",
19976 argLen: 2,
19977 asm: arm64.AASR,
19978 reg: regInfo{
19979 inputs: []inputInfo{
19980 {0, 805044223},
19981 {1, 805044223},
19982 },
19983 outputs: []outputInfo{
19984 {0, 670826495},
19985 },
19986 },
19987 },
19988 {
19989 name: "SRAconst",
19990 auxType: auxInt64,
19991 argLen: 1,
19992 asm: arm64.AASR,
19993 reg: regInfo{
19994 inputs: []inputInfo{
19995 {0, 805044223},
19996 },
19997 outputs: []outputInfo{
19998 {0, 670826495},
19999 },
20000 },
20001 },
20002 {
20003 name: "ROR",
20004 argLen: 2,
20005 asm: arm64.AROR,
20006 reg: regInfo{
20007 inputs: []inputInfo{
20008 {0, 805044223},
20009 {1, 805044223},
20010 },
20011 outputs: []outputInfo{
20012 {0, 670826495},
20013 },
20014 },
20015 },
20016 {
20017 name: "RORW",
20018 argLen: 2,
20019 asm: arm64.ARORW,
20020 reg: regInfo{
20021 inputs: []inputInfo{
20022 {0, 805044223},
20023 {1, 805044223},
20024 },
20025 outputs: []outputInfo{
20026 {0, 670826495},
20027 },
20028 },
20029 },
20030 {
20031 name: "RORconst",
20032 auxType: auxInt64,
20033 argLen: 1,
20034 asm: arm64.AROR,
20035 reg: regInfo{
20036 inputs: []inputInfo{
20037 {0, 805044223},
20038 },
20039 outputs: []outputInfo{
20040 {0, 670826495},
20041 },
20042 },
20043 },
20044 {
20045 name: "RORWconst",
20046 auxType: auxInt64,
20047 argLen: 1,
20048 asm: arm64.ARORW,
20049 reg: regInfo{
20050 inputs: []inputInfo{
20051 {0, 805044223},
20052 },
20053 outputs: []outputInfo{
20054 {0, 670826495},
20055 },
20056 },
20057 },
20058 {
20059 name: "EXTRconst",
20060 auxType: auxInt64,
20061 argLen: 2,
20062 asm: arm64.AEXTR,
20063 reg: regInfo{
20064 inputs: []inputInfo{
20065 {0, 805044223},
20066 {1, 805044223},
20067 },
20068 outputs: []outputInfo{
20069 {0, 670826495},
20070 },
20071 },
20072 },
20073 {
20074 name: "EXTRWconst",
20075 auxType: auxInt64,
20076 argLen: 2,
20077 asm: arm64.AEXTRW,
20078 reg: regInfo{
20079 inputs: []inputInfo{
20080 {0, 805044223},
20081 {1, 805044223},
20082 },
20083 outputs: []outputInfo{
20084 {0, 670826495},
20085 },
20086 },
20087 },
20088 {
20089 name: "CMP",
20090 argLen: 2,
20091 asm: arm64.ACMP,
20092 reg: regInfo{
20093 inputs: []inputInfo{
20094 {0, 805044223},
20095 {1, 805044223},
20096 },
20097 },
20098 },
20099 {
20100 name: "CMPconst",
20101 auxType: auxInt64,
20102 argLen: 1,
20103 asm: arm64.ACMP,
20104 reg: regInfo{
20105 inputs: []inputInfo{
20106 {0, 805044223},
20107 },
20108 },
20109 },
20110 {
20111 name: "CMPW",
20112 argLen: 2,
20113 asm: arm64.ACMPW,
20114 reg: regInfo{
20115 inputs: []inputInfo{
20116 {0, 805044223},
20117 {1, 805044223},
20118 },
20119 },
20120 },
20121 {
20122 name: "CMPWconst",
20123 auxType: auxInt32,
20124 argLen: 1,
20125 asm: arm64.ACMPW,
20126 reg: regInfo{
20127 inputs: []inputInfo{
20128 {0, 805044223},
20129 },
20130 },
20131 },
20132 {
20133 name: "CMN",
20134 argLen: 2,
20135 commutative: true,
20136 asm: arm64.ACMN,
20137 reg: regInfo{
20138 inputs: []inputInfo{
20139 {0, 805044223},
20140 {1, 805044223},
20141 },
20142 },
20143 },
20144 {
20145 name: "CMNconst",
20146 auxType: auxInt64,
20147 argLen: 1,
20148 asm: arm64.ACMN,
20149 reg: regInfo{
20150 inputs: []inputInfo{
20151 {0, 805044223},
20152 },
20153 },
20154 },
20155 {
20156 name: "CMNW",
20157 argLen: 2,
20158 commutative: true,
20159 asm: arm64.ACMNW,
20160 reg: regInfo{
20161 inputs: []inputInfo{
20162 {0, 805044223},
20163 {1, 805044223},
20164 },
20165 },
20166 },
20167 {
20168 name: "CMNWconst",
20169 auxType: auxInt32,
20170 argLen: 1,
20171 asm: arm64.ACMNW,
20172 reg: regInfo{
20173 inputs: []inputInfo{
20174 {0, 805044223},
20175 },
20176 },
20177 },
20178 {
20179 name: "TST",
20180 argLen: 2,
20181 commutative: true,
20182 asm: arm64.ATST,
20183 reg: regInfo{
20184 inputs: []inputInfo{
20185 {0, 805044223},
20186 {1, 805044223},
20187 },
20188 },
20189 },
20190 {
20191 name: "TSTconst",
20192 auxType: auxInt64,
20193 argLen: 1,
20194 asm: arm64.ATST,
20195 reg: regInfo{
20196 inputs: []inputInfo{
20197 {0, 805044223},
20198 },
20199 },
20200 },
20201 {
20202 name: "TSTW",
20203 argLen: 2,
20204 commutative: true,
20205 asm: arm64.ATSTW,
20206 reg: regInfo{
20207 inputs: []inputInfo{
20208 {0, 805044223},
20209 {1, 805044223},
20210 },
20211 },
20212 },
20213 {
20214 name: "TSTWconst",
20215 auxType: auxInt32,
20216 argLen: 1,
20217 asm: arm64.ATSTW,
20218 reg: regInfo{
20219 inputs: []inputInfo{
20220 {0, 805044223},
20221 },
20222 },
20223 },
20224 {
20225 name: "FCMPS",
20226 argLen: 2,
20227 asm: arm64.AFCMPS,
20228 reg: regInfo{
20229 inputs: []inputInfo{
20230 {0, 9223372034707292160},
20231 {1, 9223372034707292160},
20232 },
20233 },
20234 },
20235 {
20236 name: "FCMPD",
20237 argLen: 2,
20238 asm: arm64.AFCMPD,
20239 reg: regInfo{
20240 inputs: []inputInfo{
20241 {0, 9223372034707292160},
20242 {1, 9223372034707292160},
20243 },
20244 },
20245 },
20246 {
20247 name: "FCMPS0",
20248 argLen: 1,
20249 asm: arm64.AFCMPS,
20250 reg: regInfo{
20251 inputs: []inputInfo{
20252 {0, 9223372034707292160},
20253 },
20254 },
20255 },
20256 {
20257 name: "FCMPD0",
20258 argLen: 1,
20259 asm: arm64.AFCMPD,
20260 reg: regInfo{
20261 inputs: []inputInfo{
20262 {0, 9223372034707292160},
20263 },
20264 },
20265 },
20266 {
20267 name: "MVNshiftLL",
20268 auxType: auxInt64,
20269 argLen: 1,
20270 asm: arm64.AMVN,
20271 reg: regInfo{
20272 inputs: []inputInfo{
20273 {0, 805044223},
20274 },
20275 outputs: []outputInfo{
20276 {0, 670826495},
20277 },
20278 },
20279 },
20280 {
20281 name: "MVNshiftRL",
20282 auxType: auxInt64,
20283 argLen: 1,
20284 asm: arm64.AMVN,
20285 reg: regInfo{
20286 inputs: []inputInfo{
20287 {0, 805044223},
20288 },
20289 outputs: []outputInfo{
20290 {0, 670826495},
20291 },
20292 },
20293 },
20294 {
20295 name: "MVNshiftRA",
20296 auxType: auxInt64,
20297 argLen: 1,
20298 asm: arm64.AMVN,
20299 reg: regInfo{
20300 inputs: []inputInfo{
20301 {0, 805044223},
20302 },
20303 outputs: []outputInfo{
20304 {0, 670826495},
20305 },
20306 },
20307 },
20308 {
20309 name: "MVNshiftRO",
20310 auxType: auxInt64,
20311 argLen: 1,
20312 asm: arm64.AMVN,
20313 reg: regInfo{
20314 inputs: []inputInfo{
20315 {0, 805044223},
20316 },
20317 outputs: []outputInfo{
20318 {0, 670826495},
20319 },
20320 },
20321 },
20322 {
20323 name: "NEGshiftLL",
20324 auxType: auxInt64,
20325 argLen: 1,
20326 asm: arm64.ANEG,
20327 reg: regInfo{
20328 inputs: []inputInfo{
20329 {0, 805044223},
20330 },
20331 outputs: []outputInfo{
20332 {0, 670826495},
20333 },
20334 },
20335 },
20336 {
20337 name: "NEGshiftRL",
20338 auxType: auxInt64,
20339 argLen: 1,
20340 asm: arm64.ANEG,
20341 reg: regInfo{
20342 inputs: []inputInfo{
20343 {0, 805044223},
20344 },
20345 outputs: []outputInfo{
20346 {0, 670826495},
20347 },
20348 },
20349 },
20350 {
20351 name: "NEGshiftRA",
20352 auxType: auxInt64,
20353 argLen: 1,
20354 asm: arm64.ANEG,
20355 reg: regInfo{
20356 inputs: []inputInfo{
20357 {0, 805044223},
20358 },
20359 outputs: []outputInfo{
20360 {0, 670826495},
20361 },
20362 },
20363 },
20364 {
20365 name: "ADDshiftLL",
20366 auxType: auxInt64,
20367 argLen: 2,
20368 asm: arm64.AADD,
20369 reg: regInfo{
20370 inputs: []inputInfo{
20371 {0, 805044223},
20372 {1, 805044223},
20373 },
20374 outputs: []outputInfo{
20375 {0, 670826495},
20376 },
20377 },
20378 },
20379 {
20380 name: "ADDshiftRL",
20381 auxType: auxInt64,
20382 argLen: 2,
20383 asm: arm64.AADD,
20384 reg: regInfo{
20385 inputs: []inputInfo{
20386 {0, 805044223},
20387 {1, 805044223},
20388 },
20389 outputs: []outputInfo{
20390 {0, 670826495},
20391 },
20392 },
20393 },
20394 {
20395 name: "ADDshiftRA",
20396 auxType: auxInt64,
20397 argLen: 2,
20398 asm: arm64.AADD,
20399 reg: regInfo{
20400 inputs: []inputInfo{
20401 {0, 805044223},
20402 {1, 805044223},
20403 },
20404 outputs: []outputInfo{
20405 {0, 670826495},
20406 },
20407 },
20408 },
20409 {
20410 name: "SUBshiftLL",
20411 auxType: auxInt64,
20412 argLen: 2,
20413 asm: arm64.ASUB,
20414 reg: regInfo{
20415 inputs: []inputInfo{
20416 {0, 805044223},
20417 {1, 805044223},
20418 },
20419 outputs: []outputInfo{
20420 {0, 670826495},
20421 },
20422 },
20423 },
20424 {
20425 name: "SUBshiftRL",
20426 auxType: auxInt64,
20427 argLen: 2,
20428 asm: arm64.ASUB,
20429 reg: regInfo{
20430 inputs: []inputInfo{
20431 {0, 805044223},
20432 {1, 805044223},
20433 },
20434 outputs: []outputInfo{
20435 {0, 670826495},
20436 },
20437 },
20438 },
20439 {
20440 name: "SUBshiftRA",
20441 auxType: auxInt64,
20442 argLen: 2,
20443 asm: arm64.ASUB,
20444 reg: regInfo{
20445 inputs: []inputInfo{
20446 {0, 805044223},
20447 {1, 805044223},
20448 },
20449 outputs: []outputInfo{
20450 {0, 670826495},
20451 },
20452 },
20453 },
20454 {
20455 name: "ANDshiftLL",
20456 auxType: auxInt64,
20457 argLen: 2,
20458 asm: arm64.AAND,
20459 reg: regInfo{
20460 inputs: []inputInfo{
20461 {0, 805044223},
20462 {1, 805044223},
20463 },
20464 outputs: []outputInfo{
20465 {0, 670826495},
20466 },
20467 },
20468 },
20469 {
20470 name: "ANDshiftRL",
20471 auxType: auxInt64,
20472 argLen: 2,
20473 asm: arm64.AAND,
20474 reg: regInfo{
20475 inputs: []inputInfo{
20476 {0, 805044223},
20477 {1, 805044223},
20478 },
20479 outputs: []outputInfo{
20480 {0, 670826495},
20481 },
20482 },
20483 },
20484 {
20485 name: "ANDshiftRA",
20486 auxType: auxInt64,
20487 argLen: 2,
20488 asm: arm64.AAND,
20489 reg: regInfo{
20490 inputs: []inputInfo{
20491 {0, 805044223},
20492 {1, 805044223},
20493 },
20494 outputs: []outputInfo{
20495 {0, 670826495},
20496 },
20497 },
20498 },
20499 {
20500 name: "ANDshiftRO",
20501 auxType: auxInt64,
20502 argLen: 2,
20503 asm: arm64.AAND,
20504 reg: regInfo{
20505 inputs: []inputInfo{
20506 {0, 805044223},
20507 {1, 805044223},
20508 },
20509 outputs: []outputInfo{
20510 {0, 670826495},
20511 },
20512 },
20513 },
20514 {
20515 name: "ORshiftLL",
20516 auxType: auxInt64,
20517 argLen: 2,
20518 asm: arm64.AORR,
20519 reg: regInfo{
20520 inputs: []inputInfo{
20521 {0, 805044223},
20522 {1, 805044223},
20523 },
20524 outputs: []outputInfo{
20525 {0, 670826495},
20526 },
20527 },
20528 },
20529 {
20530 name: "ORshiftRL",
20531 auxType: auxInt64,
20532 argLen: 2,
20533 asm: arm64.AORR,
20534 reg: regInfo{
20535 inputs: []inputInfo{
20536 {0, 805044223},
20537 {1, 805044223},
20538 },
20539 outputs: []outputInfo{
20540 {0, 670826495},
20541 },
20542 },
20543 },
20544 {
20545 name: "ORshiftRA",
20546 auxType: auxInt64,
20547 argLen: 2,
20548 asm: arm64.AORR,
20549 reg: regInfo{
20550 inputs: []inputInfo{
20551 {0, 805044223},
20552 {1, 805044223},
20553 },
20554 outputs: []outputInfo{
20555 {0, 670826495},
20556 },
20557 },
20558 },
20559 {
20560 name: "ORshiftRO",
20561 auxType: auxInt64,
20562 argLen: 2,
20563 asm: arm64.AORR,
20564 reg: regInfo{
20565 inputs: []inputInfo{
20566 {0, 805044223},
20567 {1, 805044223},
20568 },
20569 outputs: []outputInfo{
20570 {0, 670826495},
20571 },
20572 },
20573 },
20574 {
20575 name: "XORshiftLL",
20576 auxType: auxInt64,
20577 argLen: 2,
20578 asm: arm64.AEOR,
20579 reg: regInfo{
20580 inputs: []inputInfo{
20581 {0, 805044223},
20582 {1, 805044223},
20583 },
20584 outputs: []outputInfo{
20585 {0, 670826495},
20586 },
20587 },
20588 },
20589 {
20590 name: "XORshiftRL",
20591 auxType: auxInt64,
20592 argLen: 2,
20593 asm: arm64.AEOR,
20594 reg: regInfo{
20595 inputs: []inputInfo{
20596 {0, 805044223},
20597 {1, 805044223},
20598 },
20599 outputs: []outputInfo{
20600 {0, 670826495},
20601 },
20602 },
20603 },
20604 {
20605 name: "XORshiftRA",
20606 auxType: auxInt64,
20607 argLen: 2,
20608 asm: arm64.AEOR,
20609 reg: regInfo{
20610 inputs: []inputInfo{
20611 {0, 805044223},
20612 {1, 805044223},
20613 },
20614 outputs: []outputInfo{
20615 {0, 670826495},
20616 },
20617 },
20618 },
20619 {
20620 name: "XORshiftRO",
20621 auxType: auxInt64,
20622 argLen: 2,
20623 asm: arm64.AEOR,
20624 reg: regInfo{
20625 inputs: []inputInfo{
20626 {0, 805044223},
20627 {1, 805044223},
20628 },
20629 outputs: []outputInfo{
20630 {0, 670826495},
20631 },
20632 },
20633 },
20634 {
20635 name: "BICshiftLL",
20636 auxType: auxInt64,
20637 argLen: 2,
20638 asm: arm64.ABIC,
20639 reg: regInfo{
20640 inputs: []inputInfo{
20641 {0, 805044223},
20642 {1, 805044223},
20643 },
20644 outputs: []outputInfo{
20645 {0, 670826495},
20646 },
20647 },
20648 },
20649 {
20650 name: "BICshiftRL",
20651 auxType: auxInt64,
20652 argLen: 2,
20653 asm: arm64.ABIC,
20654 reg: regInfo{
20655 inputs: []inputInfo{
20656 {0, 805044223},
20657 {1, 805044223},
20658 },
20659 outputs: []outputInfo{
20660 {0, 670826495},
20661 },
20662 },
20663 },
20664 {
20665 name: "BICshiftRA",
20666 auxType: auxInt64,
20667 argLen: 2,
20668 asm: arm64.ABIC,
20669 reg: regInfo{
20670 inputs: []inputInfo{
20671 {0, 805044223},
20672 {1, 805044223},
20673 },
20674 outputs: []outputInfo{
20675 {0, 670826495},
20676 },
20677 },
20678 },
20679 {
20680 name: "BICshiftRO",
20681 auxType: auxInt64,
20682 argLen: 2,
20683 asm: arm64.ABIC,
20684 reg: regInfo{
20685 inputs: []inputInfo{
20686 {0, 805044223},
20687 {1, 805044223},
20688 },
20689 outputs: []outputInfo{
20690 {0, 670826495},
20691 },
20692 },
20693 },
20694 {
20695 name: "EONshiftLL",
20696 auxType: auxInt64,
20697 argLen: 2,
20698 asm: arm64.AEON,
20699 reg: regInfo{
20700 inputs: []inputInfo{
20701 {0, 805044223},
20702 {1, 805044223},
20703 },
20704 outputs: []outputInfo{
20705 {0, 670826495},
20706 },
20707 },
20708 },
20709 {
20710 name: "EONshiftRL",
20711 auxType: auxInt64,
20712 argLen: 2,
20713 asm: arm64.AEON,
20714 reg: regInfo{
20715 inputs: []inputInfo{
20716 {0, 805044223},
20717 {1, 805044223},
20718 },
20719 outputs: []outputInfo{
20720 {0, 670826495},
20721 },
20722 },
20723 },
20724 {
20725 name: "EONshiftRA",
20726 auxType: auxInt64,
20727 argLen: 2,
20728 asm: arm64.AEON,
20729 reg: regInfo{
20730 inputs: []inputInfo{
20731 {0, 805044223},
20732 {1, 805044223},
20733 },
20734 outputs: []outputInfo{
20735 {0, 670826495},
20736 },
20737 },
20738 },
20739 {
20740 name: "EONshiftRO",
20741 auxType: auxInt64,
20742 argLen: 2,
20743 asm: arm64.AEON,
20744 reg: regInfo{
20745 inputs: []inputInfo{
20746 {0, 805044223},
20747 {1, 805044223},
20748 },
20749 outputs: []outputInfo{
20750 {0, 670826495},
20751 },
20752 },
20753 },
20754 {
20755 name: "ORNshiftLL",
20756 auxType: auxInt64,
20757 argLen: 2,
20758 asm: arm64.AORN,
20759 reg: regInfo{
20760 inputs: []inputInfo{
20761 {0, 805044223},
20762 {1, 805044223},
20763 },
20764 outputs: []outputInfo{
20765 {0, 670826495},
20766 },
20767 },
20768 },
20769 {
20770 name: "ORNshiftRL",
20771 auxType: auxInt64,
20772 argLen: 2,
20773 asm: arm64.AORN,
20774 reg: regInfo{
20775 inputs: []inputInfo{
20776 {0, 805044223},
20777 {1, 805044223},
20778 },
20779 outputs: []outputInfo{
20780 {0, 670826495},
20781 },
20782 },
20783 },
20784 {
20785 name: "ORNshiftRA",
20786 auxType: auxInt64,
20787 argLen: 2,
20788 asm: arm64.AORN,
20789 reg: regInfo{
20790 inputs: []inputInfo{
20791 {0, 805044223},
20792 {1, 805044223},
20793 },
20794 outputs: []outputInfo{
20795 {0, 670826495},
20796 },
20797 },
20798 },
20799 {
20800 name: "ORNshiftRO",
20801 auxType: auxInt64,
20802 argLen: 2,
20803 asm: arm64.AORN,
20804 reg: regInfo{
20805 inputs: []inputInfo{
20806 {0, 805044223},
20807 {1, 805044223},
20808 },
20809 outputs: []outputInfo{
20810 {0, 670826495},
20811 },
20812 },
20813 },
20814 {
20815 name: "CMPshiftLL",
20816 auxType: auxInt64,
20817 argLen: 2,
20818 asm: arm64.ACMP,
20819 reg: regInfo{
20820 inputs: []inputInfo{
20821 {0, 805044223},
20822 {1, 805044223},
20823 },
20824 },
20825 },
20826 {
20827 name: "CMPshiftRL",
20828 auxType: auxInt64,
20829 argLen: 2,
20830 asm: arm64.ACMP,
20831 reg: regInfo{
20832 inputs: []inputInfo{
20833 {0, 805044223},
20834 {1, 805044223},
20835 },
20836 },
20837 },
20838 {
20839 name: "CMPshiftRA",
20840 auxType: auxInt64,
20841 argLen: 2,
20842 asm: arm64.ACMP,
20843 reg: regInfo{
20844 inputs: []inputInfo{
20845 {0, 805044223},
20846 {1, 805044223},
20847 },
20848 },
20849 },
20850 {
20851 name: "CMNshiftLL",
20852 auxType: auxInt64,
20853 argLen: 2,
20854 asm: arm64.ACMN,
20855 reg: regInfo{
20856 inputs: []inputInfo{
20857 {0, 805044223},
20858 {1, 805044223},
20859 },
20860 },
20861 },
20862 {
20863 name: "CMNshiftRL",
20864 auxType: auxInt64,
20865 argLen: 2,
20866 asm: arm64.ACMN,
20867 reg: regInfo{
20868 inputs: []inputInfo{
20869 {0, 805044223},
20870 {1, 805044223},
20871 },
20872 },
20873 },
20874 {
20875 name: "CMNshiftRA",
20876 auxType: auxInt64,
20877 argLen: 2,
20878 asm: arm64.ACMN,
20879 reg: regInfo{
20880 inputs: []inputInfo{
20881 {0, 805044223},
20882 {1, 805044223},
20883 },
20884 },
20885 },
20886 {
20887 name: "TSTshiftLL",
20888 auxType: auxInt64,
20889 argLen: 2,
20890 asm: arm64.ATST,
20891 reg: regInfo{
20892 inputs: []inputInfo{
20893 {0, 805044223},
20894 {1, 805044223},
20895 },
20896 },
20897 },
20898 {
20899 name: "TSTshiftRL",
20900 auxType: auxInt64,
20901 argLen: 2,
20902 asm: arm64.ATST,
20903 reg: regInfo{
20904 inputs: []inputInfo{
20905 {0, 805044223},
20906 {1, 805044223},
20907 },
20908 },
20909 },
20910 {
20911 name: "TSTshiftRA",
20912 auxType: auxInt64,
20913 argLen: 2,
20914 asm: arm64.ATST,
20915 reg: regInfo{
20916 inputs: []inputInfo{
20917 {0, 805044223},
20918 {1, 805044223},
20919 },
20920 },
20921 },
20922 {
20923 name: "TSTshiftRO",
20924 auxType: auxInt64,
20925 argLen: 2,
20926 asm: arm64.ATST,
20927 reg: regInfo{
20928 inputs: []inputInfo{
20929 {0, 805044223},
20930 {1, 805044223},
20931 },
20932 },
20933 },
20934 {
20935 name: "BFI",
20936 auxType: auxARM64BitField,
20937 argLen: 2,
20938 resultInArg0: true,
20939 asm: arm64.ABFI,
20940 reg: regInfo{
20941 inputs: []inputInfo{
20942 {0, 670826495},
20943 {1, 670826495},
20944 },
20945 outputs: []outputInfo{
20946 {0, 670826495},
20947 },
20948 },
20949 },
20950 {
20951 name: "BFXIL",
20952 auxType: auxARM64BitField,
20953 argLen: 2,
20954 resultInArg0: true,
20955 asm: arm64.ABFXIL,
20956 reg: regInfo{
20957 inputs: []inputInfo{
20958 {0, 670826495},
20959 {1, 670826495},
20960 },
20961 outputs: []outputInfo{
20962 {0, 670826495},
20963 },
20964 },
20965 },
20966 {
20967 name: "SBFIZ",
20968 auxType: auxARM64BitField,
20969 argLen: 1,
20970 asm: arm64.ASBFIZ,
20971 reg: regInfo{
20972 inputs: []inputInfo{
20973 {0, 805044223},
20974 },
20975 outputs: []outputInfo{
20976 {0, 670826495},
20977 },
20978 },
20979 },
20980 {
20981 name: "SBFX",
20982 auxType: auxARM64BitField,
20983 argLen: 1,
20984 asm: arm64.ASBFX,
20985 reg: regInfo{
20986 inputs: []inputInfo{
20987 {0, 805044223},
20988 },
20989 outputs: []outputInfo{
20990 {0, 670826495},
20991 },
20992 },
20993 },
20994 {
20995 name: "UBFIZ",
20996 auxType: auxARM64BitField,
20997 argLen: 1,
20998 asm: arm64.AUBFIZ,
20999 reg: regInfo{
21000 inputs: []inputInfo{
21001 {0, 805044223},
21002 },
21003 outputs: []outputInfo{
21004 {0, 670826495},
21005 },
21006 },
21007 },
21008 {
21009 name: "UBFX",
21010 auxType: auxARM64BitField,
21011 argLen: 1,
21012 asm: arm64.AUBFX,
21013 reg: regInfo{
21014 inputs: []inputInfo{
21015 {0, 805044223},
21016 },
21017 outputs: []outputInfo{
21018 {0, 670826495},
21019 },
21020 },
21021 },
21022 {
21023 name: "MOVDconst",
21024 auxType: auxInt64,
21025 argLen: 0,
21026 rematerializeable: true,
21027 asm: arm64.AMOVD,
21028 reg: regInfo{
21029 outputs: []outputInfo{
21030 {0, 670826495},
21031 },
21032 },
21033 },
21034 {
21035 name: "FMOVSconst",
21036 auxType: auxFloat64,
21037 argLen: 0,
21038 rematerializeable: true,
21039 asm: arm64.AFMOVS,
21040 reg: regInfo{
21041 outputs: []outputInfo{
21042 {0, 9223372034707292160},
21043 },
21044 },
21045 },
21046 {
21047 name: "FMOVDconst",
21048 auxType: auxFloat64,
21049 argLen: 0,
21050 rematerializeable: true,
21051 asm: arm64.AFMOVD,
21052 reg: regInfo{
21053 outputs: []outputInfo{
21054 {0, 9223372034707292160},
21055 },
21056 },
21057 },
21058 {
21059 name: "MOVDaddr",
21060 auxType: auxSymOff,
21061 argLen: 1,
21062 rematerializeable: true,
21063 symEffect: SymAddr,
21064 asm: arm64.AMOVD,
21065 reg: regInfo{
21066 inputs: []inputInfo{
21067 {0, 9223372037928517632},
21068 },
21069 outputs: []outputInfo{
21070 {0, 670826495},
21071 },
21072 },
21073 },
21074 {
21075 name: "MOVBload",
21076 auxType: auxSymOff,
21077 argLen: 2,
21078 faultOnNilArg0: true,
21079 symEffect: SymRead,
21080 asm: arm64.AMOVB,
21081 reg: regInfo{
21082 inputs: []inputInfo{
21083 {0, 9223372038733561855},
21084 },
21085 outputs: []outputInfo{
21086 {0, 670826495},
21087 },
21088 },
21089 },
21090 {
21091 name: "MOVBUload",
21092 auxType: auxSymOff,
21093 argLen: 2,
21094 faultOnNilArg0: true,
21095 symEffect: SymRead,
21096 asm: arm64.AMOVBU,
21097 reg: regInfo{
21098 inputs: []inputInfo{
21099 {0, 9223372038733561855},
21100 },
21101 outputs: []outputInfo{
21102 {0, 670826495},
21103 },
21104 },
21105 },
21106 {
21107 name: "MOVHload",
21108 auxType: auxSymOff,
21109 argLen: 2,
21110 faultOnNilArg0: true,
21111 symEffect: SymRead,
21112 asm: arm64.AMOVH,
21113 reg: regInfo{
21114 inputs: []inputInfo{
21115 {0, 9223372038733561855},
21116 },
21117 outputs: []outputInfo{
21118 {0, 670826495},
21119 },
21120 },
21121 },
21122 {
21123 name: "MOVHUload",
21124 auxType: auxSymOff,
21125 argLen: 2,
21126 faultOnNilArg0: true,
21127 symEffect: SymRead,
21128 asm: arm64.AMOVHU,
21129 reg: regInfo{
21130 inputs: []inputInfo{
21131 {0, 9223372038733561855},
21132 },
21133 outputs: []outputInfo{
21134 {0, 670826495},
21135 },
21136 },
21137 },
21138 {
21139 name: "MOVWload",
21140 auxType: auxSymOff,
21141 argLen: 2,
21142 faultOnNilArg0: true,
21143 symEffect: SymRead,
21144 asm: arm64.AMOVW,
21145 reg: regInfo{
21146 inputs: []inputInfo{
21147 {0, 9223372038733561855},
21148 },
21149 outputs: []outputInfo{
21150 {0, 670826495},
21151 },
21152 },
21153 },
21154 {
21155 name: "MOVWUload",
21156 auxType: auxSymOff,
21157 argLen: 2,
21158 faultOnNilArg0: true,
21159 symEffect: SymRead,
21160 asm: arm64.AMOVWU,
21161 reg: regInfo{
21162 inputs: []inputInfo{
21163 {0, 9223372038733561855},
21164 },
21165 outputs: []outputInfo{
21166 {0, 670826495},
21167 },
21168 },
21169 },
21170 {
21171 name: "MOVDload",
21172 auxType: auxSymOff,
21173 argLen: 2,
21174 faultOnNilArg0: true,
21175 symEffect: SymRead,
21176 asm: arm64.AMOVD,
21177 reg: regInfo{
21178 inputs: []inputInfo{
21179 {0, 9223372038733561855},
21180 },
21181 outputs: []outputInfo{
21182 {0, 670826495},
21183 },
21184 },
21185 },
21186 {
21187 name: "LDP",
21188 auxType: auxSymOff,
21189 argLen: 2,
21190 faultOnNilArg0: true,
21191 symEffect: SymRead,
21192 asm: arm64.ALDP,
21193 reg: regInfo{
21194 inputs: []inputInfo{
21195 {0, 9223372038733561855},
21196 },
21197 outputs: []outputInfo{
21198 {0, 805044223},
21199 {1, 805044223},
21200 },
21201 },
21202 },
21203 {
21204 name: "FMOVSload",
21205 auxType: auxSymOff,
21206 argLen: 2,
21207 faultOnNilArg0: true,
21208 symEffect: SymRead,
21209 asm: arm64.AFMOVS,
21210 reg: regInfo{
21211 inputs: []inputInfo{
21212 {0, 9223372038733561855},
21213 },
21214 outputs: []outputInfo{
21215 {0, 9223372034707292160},
21216 },
21217 },
21218 },
21219 {
21220 name: "FMOVDload",
21221 auxType: auxSymOff,
21222 argLen: 2,
21223 faultOnNilArg0: true,
21224 symEffect: SymRead,
21225 asm: arm64.AFMOVD,
21226 reg: regInfo{
21227 inputs: []inputInfo{
21228 {0, 9223372038733561855},
21229 },
21230 outputs: []outputInfo{
21231 {0, 9223372034707292160},
21232 },
21233 },
21234 },
21235 {
21236 name: "MOVDloadidx",
21237 argLen: 3,
21238 asm: arm64.AMOVD,
21239 reg: regInfo{
21240 inputs: []inputInfo{
21241 {1, 805044223},
21242 {0, 9223372038733561855},
21243 },
21244 outputs: []outputInfo{
21245 {0, 670826495},
21246 },
21247 },
21248 },
21249 {
21250 name: "MOVWloadidx",
21251 argLen: 3,
21252 asm: arm64.AMOVW,
21253 reg: regInfo{
21254 inputs: []inputInfo{
21255 {1, 805044223},
21256 {0, 9223372038733561855},
21257 },
21258 outputs: []outputInfo{
21259 {0, 670826495},
21260 },
21261 },
21262 },
21263 {
21264 name: "MOVWUloadidx",
21265 argLen: 3,
21266 asm: arm64.AMOVWU,
21267 reg: regInfo{
21268 inputs: []inputInfo{
21269 {1, 805044223},
21270 {0, 9223372038733561855},
21271 },
21272 outputs: []outputInfo{
21273 {0, 670826495},
21274 },
21275 },
21276 },
21277 {
21278 name: "MOVHloadidx",
21279 argLen: 3,
21280 asm: arm64.AMOVH,
21281 reg: regInfo{
21282 inputs: []inputInfo{
21283 {1, 805044223},
21284 {0, 9223372038733561855},
21285 },
21286 outputs: []outputInfo{
21287 {0, 670826495},
21288 },
21289 },
21290 },
21291 {
21292 name: "MOVHUloadidx",
21293 argLen: 3,
21294 asm: arm64.AMOVHU,
21295 reg: regInfo{
21296 inputs: []inputInfo{
21297 {1, 805044223},
21298 {0, 9223372038733561855},
21299 },
21300 outputs: []outputInfo{
21301 {0, 670826495},
21302 },
21303 },
21304 },
21305 {
21306 name: "MOVBloadidx",
21307 argLen: 3,
21308 asm: arm64.AMOVB,
21309 reg: regInfo{
21310 inputs: []inputInfo{
21311 {1, 805044223},
21312 {0, 9223372038733561855},
21313 },
21314 outputs: []outputInfo{
21315 {0, 670826495},
21316 },
21317 },
21318 },
21319 {
21320 name: "MOVBUloadidx",
21321 argLen: 3,
21322 asm: arm64.AMOVBU,
21323 reg: regInfo{
21324 inputs: []inputInfo{
21325 {1, 805044223},
21326 {0, 9223372038733561855},
21327 },
21328 outputs: []outputInfo{
21329 {0, 670826495},
21330 },
21331 },
21332 },
21333 {
21334 name: "FMOVSloadidx",
21335 argLen: 3,
21336 asm: arm64.AFMOVS,
21337 reg: regInfo{
21338 inputs: []inputInfo{
21339 {1, 805044223},
21340 {0, 9223372038733561855},
21341 },
21342 outputs: []outputInfo{
21343 {0, 9223372034707292160},
21344 },
21345 },
21346 },
21347 {
21348 name: "FMOVDloadidx",
21349 argLen: 3,
21350 asm: arm64.AFMOVD,
21351 reg: regInfo{
21352 inputs: []inputInfo{
21353 {1, 805044223},
21354 {0, 9223372038733561855},
21355 },
21356 outputs: []outputInfo{
21357 {0, 9223372034707292160},
21358 },
21359 },
21360 },
21361 {
21362 name: "MOVHloadidx2",
21363 argLen: 3,
21364 asm: arm64.AMOVH,
21365 reg: regInfo{
21366 inputs: []inputInfo{
21367 {1, 805044223},
21368 {0, 9223372038733561855},
21369 },
21370 outputs: []outputInfo{
21371 {0, 670826495},
21372 },
21373 },
21374 },
21375 {
21376 name: "MOVHUloadidx2",
21377 argLen: 3,
21378 asm: arm64.AMOVHU,
21379 reg: regInfo{
21380 inputs: []inputInfo{
21381 {1, 805044223},
21382 {0, 9223372038733561855},
21383 },
21384 outputs: []outputInfo{
21385 {0, 670826495},
21386 },
21387 },
21388 },
21389 {
21390 name: "MOVWloadidx4",
21391 argLen: 3,
21392 asm: arm64.AMOVW,
21393 reg: regInfo{
21394 inputs: []inputInfo{
21395 {1, 805044223},
21396 {0, 9223372038733561855},
21397 },
21398 outputs: []outputInfo{
21399 {0, 670826495},
21400 },
21401 },
21402 },
21403 {
21404 name: "MOVWUloadidx4",
21405 argLen: 3,
21406 asm: arm64.AMOVWU,
21407 reg: regInfo{
21408 inputs: []inputInfo{
21409 {1, 805044223},
21410 {0, 9223372038733561855},
21411 },
21412 outputs: []outputInfo{
21413 {0, 670826495},
21414 },
21415 },
21416 },
21417 {
21418 name: "MOVDloadidx8",
21419 argLen: 3,
21420 asm: arm64.AMOVD,
21421 reg: regInfo{
21422 inputs: []inputInfo{
21423 {1, 805044223},
21424 {0, 9223372038733561855},
21425 },
21426 outputs: []outputInfo{
21427 {0, 670826495},
21428 },
21429 },
21430 },
21431 {
21432 name: "FMOVSloadidx4",
21433 argLen: 3,
21434 asm: arm64.AFMOVS,
21435 reg: regInfo{
21436 inputs: []inputInfo{
21437 {1, 805044223},
21438 {0, 9223372038733561855},
21439 },
21440 outputs: []outputInfo{
21441 {0, 9223372034707292160},
21442 },
21443 },
21444 },
21445 {
21446 name: "FMOVDloadidx8",
21447 argLen: 3,
21448 asm: arm64.AFMOVD,
21449 reg: regInfo{
21450 inputs: []inputInfo{
21451 {1, 805044223},
21452 {0, 9223372038733561855},
21453 },
21454 outputs: []outputInfo{
21455 {0, 9223372034707292160},
21456 },
21457 },
21458 },
21459 {
21460 name: "MOVBstore",
21461 auxType: auxSymOff,
21462 argLen: 3,
21463 faultOnNilArg0: true,
21464 symEffect: SymWrite,
21465 asm: arm64.AMOVB,
21466 reg: regInfo{
21467 inputs: []inputInfo{
21468 {1, 805044223},
21469 {0, 9223372038733561855},
21470 },
21471 },
21472 },
21473 {
21474 name: "MOVHstore",
21475 auxType: auxSymOff,
21476 argLen: 3,
21477 faultOnNilArg0: true,
21478 symEffect: SymWrite,
21479 asm: arm64.AMOVH,
21480 reg: regInfo{
21481 inputs: []inputInfo{
21482 {1, 805044223},
21483 {0, 9223372038733561855},
21484 },
21485 },
21486 },
21487 {
21488 name: "MOVWstore",
21489 auxType: auxSymOff,
21490 argLen: 3,
21491 faultOnNilArg0: true,
21492 symEffect: SymWrite,
21493 asm: arm64.AMOVW,
21494 reg: regInfo{
21495 inputs: []inputInfo{
21496 {1, 805044223},
21497 {0, 9223372038733561855},
21498 },
21499 },
21500 },
21501 {
21502 name: "MOVDstore",
21503 auxType: auxSymOff,
21504 argLen: 3,
21505 faultOnNilArg0: true,
21506 symEffect: SymWrite,
21507 asm: arm64.AMOVD,
21508 reg: regInfo{
21509 inputs: []inputInfo{
21510 {1, 805044223},
21511 {0, 9223372038733561855},
21512 },
21513 },
21514 },
21515 {
21516 name: "STP",
21517 auxType: auxSymOff,
21518 argLen: 4,
21519 faultOnNilArg0: true,
21520 symEffect: SymWrite,
21521 asm: arm64.ASTP,
21522 reg: regInfo{
21523 inputs: []inputInfo{
21524 {1, 805044223},
21525 {2, 805044223},
21526 {0, 9223372038733561855},
21527 },
21528 },
21529 },
21530 {
21531 name: "FMOVSstore",
21532 auxType: auxSymOff,
21533 argLen: 3,
21534 faultOnNilArg0: true,
21535 symEffect: SymWrite,
21536 asm: arm64.AFMOVS,
21537 reg: regInfo{
21538 inputs: []inputInfo{
21539 {0, 9223372038733561855},
21540 {1, 9223372034707292160},
21541 },
21542 },
21543 },
21544 {
21545 name: "FMOVDstore",
21546 auxType: auxSymOff,
21547 argLen: 3,
21548 faultOnNilArg0: true,
21549 symEffect: SymWrite,
21550 asm: arm64.AFMOVD,
21551 reg: regInfo{
21552 inputs: []inputInfo{
21553 {0, 9223372038733561855},
21554 {1, 9223372034707292160},
21555 },
21556 },
21557 },
21558 {
21559 name: "MOVBstoreidx",
21560 argLen: 4,
21561 asm: arm64.AMOVB,
21562 reg: regInfo{
21563 inputs: []inputInfo{
21564 {1, 805044223},
21565 {2, 805044223},
21566 {0, 9223372038733561855},
21567 },
21568 },
21569 },
21570 {
21571 name: "MOVHstoreidx",
21572 argLen: 4,
21573 asm: arm64.AMOVH,
21574 reg: regInfo{
21575 inputs: []inputInfo{
21576 {1, 805044223},
21577 {2, 805044223},
21578 {0, 9223372038733561855},
21579 },
21580 },
21581 },
21582 {
21583 name: "MOVWstoreidx",
21584 argLen: 4,
21585 asm: arm64.AMOVW,
21586 reg: regInfo{
21587 inputs: []inputInfo{
21588 {1, 805044223},
21589 {2, 805044223},
21590 {0, 9223372038733561855},
21591 },
21592 },
21593 },
21594 {
21595 name: "MOVDstoreidx",
21596 argLen: 4,
21597 asm: arm64.AMOVD,
21598 reg: regInfo{
21599 inputs: []inputInfo{
21600 {1, 805044223},
21601 {2, 805044223},
21602 {0, 9223372038733561855},
21603 },
21604 },
21605 },
21606 {
21607 name: "FMOVSstoreidx",
21608 argLen: 4,
21609 asm: arm64.AFMOVS,
21610 reg: regInfo{
21611 inputs: []inputInfo{
21612 {1, 805044223},
21613 {0, 9223372038733561855},
21614 {2, 9223372034707292160},
21615 },
21616 },
21617 },
21618 {
21619 name: "FMOVDstoreidx",
21620 argLen: 4,
21621 asm: arm64.AFMOVD,
21622 reg: regInfo{
21623 inputs: []inputInfo{
21624 {1, 805044223},
21625 {0, 9223372038733561855},
21626 {2, 9223372034707292160},
21627 },
21628 },
21629 },
21630 {
21631 name: "MOVHstoreidx2",
21632 argLen: 4,
21633 asm: arm64.AMOVH,
21634 reg: regInfo{
21635 inputs: []inputInfo{
21636 {1, 805044223},
21637 {2, 805044223},
21638 {0, 9223372038733561855},
21639 },
21640 },
21641 },
21642 {
21643 name: "MOVWstoreidx4",
21644 argLen: 4,
21645 asm: arm64.AMOVW,
21646 reg: regInfo{
21647 inputs: []inputInfo{
21648 {1, 805044223},
21649 {2, 805044223},
21650 {0, 9223372038733561855},
21651 },
21652 },
21653 },
21654 {
21655 name: "MOVDstoreidx8",
21656 argLen: 4,
21657 asm: arm64.AMOVD,
21658 reg: regInfo{
21659 inputs: []inputInfo{
21660 {1, 805044223},
21661 {2, 805044223},
21662 {0, 9223372038733561855},
21663 },
21664 },
21665 },
21666 {
21667 name: "FMOVSstoreidx4",
21668 argLen: 4,
21669 asm: arm64.AFMOVS,
21670 reg: regInfo{
21671 inputs: []inputInfo{
21672 {1, 805044223},
21673 {0, 9223372038733561855},
21674 {2, 9223372034707292160},
21675 },
21676 },
21677 },
21678 {
21679 name: "FMOVDstoreidx8",
21680 argLen: 4,
21681 asm: arm64.AFMOVD,
21682 reg: regInfo{
21683 inputs: []inputInfo{
21684 {1, 805044223},
21685 {0, 9223372038733561855},
21686 {2, 9223372034707292160},
21687 },
21688 },
21689 },
21690 {
21691 name: "MOVBstorezero",
21692 auxType: auxSymOff,
21693 argLen: 2,
21694 faultOnNilArg0: true,
21695 symEffect: SymWrite,
21696 asm: arm64.AMOVB,
21697 reg: regInfo{
21698 inputs: []inputInfo{
21699 {0, 9223372038733561855},
21700 },
21701 },
21702 },
21703 {
21704 name: "MOVHstorezero",
21705 auxType: auxSymOff,
21706 argLen: 2,
21707 faultOnNilArg0: true,
21708 symEffect: SymWrite,
21709 asm: arm64.AMOVH,
21710 reg: regInfo{
21711 inputs: []inputInfo{
21712 {0, 9223372038733561855},
21713 },
21714 },
21715 },
21716 {
21717 name: "MOVWstorezero",
21718 auxType: auxSymOff,
21719 argLen: 2,
21720 faultOnNilArg0: true,
21721 symEffect: SymWrite,
21722 asm: arm64.AMOVW,
21723 reg: regInfo{
21724 inputs: []inputInfo{
21725 {0, 9223372038733561855},
21726 },
21727 },
21728 },
21729 {
21730 name: "MOVDstorezero",
21731 auxType: auxSymOff,
21732 argLen: 2,
21733 faultOnNilArg0: true,
21734 symEffect: SymWrite,
21735 asm: arm64.AMOVD,
21736 reg: regInfo{
21737 inputs: []inputInfo{
21738 {0, 9223372038733561855},
21739 },
21740 },
21741 },
21742 {
21743 name: "MOVQstorezero",
21744 auxType: auxSymOff,
21745 argLen: 2,
21746 faultOnNilArg0: true,
21747 symEffect: SymWrite,
21748 asm: arm64.ASTP,
21749 reg: regInfo{
21750 inputs: []inputInfo{
21751 {0, 9223372038733561855},
21752 },
21753 },
21754 },
21755 {
21756 name: "MOVBstorezeroidx",
21757 argLen: 3,
21758 asm: arm64.AMOVB,
21759 reg: regInfo{
21760 inputs: []inputInfo{
21761 {1, 805044223},
21762 {0, 9223372038733561855},
21763 },
21764 },
21765 },
21766 {
21767 name: "MOVHstorezeroidx",
21768 argLen: 3,
21769 asm: arm64.AMOVH,
21770 reg: regInfo{
21771 inputs: []inputInfo{
21772 {1, 805044223},
21773 {0, 9223372038733561855},
21774 },
21775 },
21776 },
21777 {
21778 name: "MOVWstorezeroidx",
21779 argLen: 3,
21780 asm: arm64.AMOVW,
21781 reg: regInfo{
21782 inputs: []inputInfo{
21783 {1, 805044223},
21784 {0, 9223372038733561855},
21785 },
21786 },
21787 },
21788 {
21789 name: "MOVDstorezeroidx",
21790 argLen: 3,
21791 asm: arm64.AMOVD,
21792 reg: regInfo{
21793 inputs: []inputInfo{
21794 {1, 805044223},
21795 {0, 9223372038733561855},
21796 },
21797 },
21798 },
21799 {
21800 name: "MOVHstorezeroidx2",
21801 argLen: 3,
21802 asm: arm64.AMOVH,
21803 reg: regInfo{
21804 inputs: []inputInfo{
21805 {1, 805044223},
21806 {0, 9223372038733561855},
21807 },
21808 },
21809 },
21810 {
21811 name: "MOVWstorezeroidx4",
21812 argLen: 3,
21813 asm: arm64.AMOVW,
21814 reg: regInfo{
21815 inputs: []inputInfo{
21816 {1, 805044223},
21817 {0, 9223372038733561855},
21818 },
21819 },
21820 },
21821 {
21822 name: "MOVDstorezeroidx8",
21823 argLen: 3,
21824 asm: arm64.AMOVD,
21825 reg: regInfo{
21826 inputs: []inputInfo{
21827 {1, 805044223},
21828 {0, 9223372038733561855},
21829 },
21830 },
21831 },
21832 {
21833 name: "FMOVDgpfp",
21834 argLen: 1,
21835 asm: arm64.AFMOVD,
21836 reg: regInfo{
21837 inputs: []inputInfo{
21838 {0, 670826495},
21839 },
21840 outputs: []outputInfo{
21841 {0, 9223372034707292160},
21842 },
21843 },
21844 },
21845 {
21846 name: "FMOVDfpgp",
21847 argLen: 1,
21848 asm: arm64.AFMOVD,
21849 reg: regInfo{
21850 inputs: []inputInfo{
21851 {0, 9223372034707292160},
21852 },
21853 outputs: []outputInfo{
21854 {0, 670826495},
21855 },
21856 },
21857 },
21858 {
21859 name: "FMOVSgpfp",
21860 argLen: 1,
21861 asm: arm64.AFMOVS,
21862 reg: regInfo{
21863 inputs: []inputInfo{
21864 {0, 670826495},
21865 },
21866 outputs: []outputInfo{
21867 {0, 9223372034707292160},
21868 },
21869 },
21870 },
21871 {
21872 name: "FMOVSfpgp",
21873 argLen: 1,
21874 asm: arm64.AFMOVS,
21875 reg: regInfo{
21876 inputs: []inputInfo{
21877 {0, 9223372034707292160},
21878 },
21879 outputs: []outputInfo{
21880 {0, 670826495},
21881 },
21882 },
21883 },
21884 {
21885 name: "MOVBreg",
21886 argLen: 1,
21887 asm: arm64.AMOVB,
21888 reg: regInfo{
21889 inputs: []inputInfo{
21890 {0, 805044223},
21891 },
21892 outputs: []outputInfo{
21893 {0, 670826495},
21894 },
21895 },
21896 },
21897 {
21898 name: "MOVBUreg",
21899 argLen: 1,
21900 asm: arm64.AMOVBU,
21901 reg: regInfo{
21902 inputs: []inputInfo{
21903 {0, 805044223},
21904 },
21905 outputs: []outputInfo{
21906 {0, 670826495},
21907 },
21908 },
21909 },
21910 {
21911 name: "MOVHreg",
21912 argLen: 1,
21913 asm: arm64.AMOVH,
21914 reg: regInfo{
21915 inputs: []inputInfo{
21916 {0, 805044223},
21917 },
21918 outputs: []outputInfo{
21919 {0, 670826495},
21920 },
21921 },
21922 },
21923 {
21924 name: "MOVHUreg",
21925 argLen: 1,
21926 asm: arm64.AMOVHU,
21927 reg: regInfo{
21928 inputs: []inputInfo{
21929 {0, 805044223},
21930 },
21931 outputs: []outputInfo{
21932 {0, 670826495},
21933 },
21934 },
21935 },
21936 {
21937 name: "MOVWreg",
21938 argLen: 1,
21939 asm: arm64.AMOVW,
21940 reg: regInfo{
21941 inputs: []inputInfo{
21942 {0, 805044223},
21943 },
21944 outputs: []outputInfo{
21945 {0, 670826495},
21946 },
21947 },
21948 },
21949 {
21950 name: "MOVWUreg",
21951 argLen: 1,
21952 asm: arm64.AMOVWU,
21953 reg: regInfo{
21954 inputs: []inputInfo{
21955 {0, 805044223},
21956 },
21957 outputs: []outputInfo{
21958 {0, 670826495},
21959 },
21960 },
21961 },
21962 {
21963 name: "MOVDreg",
21964 argLen: 1,
21965 asm: arm64.AMOVD,
21966 reg: regInfo{
21967 inputs: []inputInfo{
21968 {0, 805044223},
21969 },
21970 outputs: []outputInfo{
21971 {0, 670826495},
21972 },
21973 },
21974 },
21975 {
21976 name: "MOVDnop",
21977 argLen: 1,
21978 resultInArg0: true,
21979 reg: regInfo{
21980 inputs: []inputInfo{
21981 {0, 670826495},
21982 },
21983 outputs: []outputInfo{
21984 {0, 670826495},
21985 },
21986 },
21987 },
21988 {
21989 name: "SCVTFWS",
21990 argLen: 1,
21991 asm: arm64.ASCVTFWS,
21992 reg: regInfo{
21993 inputs: []inputInfo{
21994 {0, 670826495},
21995 },
21996 outputs: []outputInfo{
21997 {0, 9223372034707292160},
21998 },
21999 },
22000 },
22001 {
22002 name: "SCVTFWD",
22003 argLen: 1,
22004 asm: arm64.ASCVTFWD,
22005 reg: regInfo{
22006 inputs: []inputInfo{
22007 {0, 670826495},
22008 },
22009 outputs: []outputInfo{
22010 {0, 9223372034707292160},
22011 },
22012 },
22013 },
22014 {
22015 name: "UCVTFWS",
22016 argLen: 1,
22017 asm: arm64.AUCVTFWS,
22018 reg: regInfo{
22019 inputs: []inputInfo{
22020 {0, 670826495},
22021 },
22022 outputs: []outputInfo{
22023 {0, 9223372034707292160},
22024 },
22025 },
22026 },
22027 {
22028 name: "UCVTFWD",
22029 argLen: 1,
22030 asm: arm64.AUCVTFWD,
22031 reg: regInfo{
22032 inputs: []inputInfo{
22033 {0, 670826495},
22034 },
22035 outputs: []outputInfo{
22036 {0, 9223372034707292160},
22037 },
22038 },
22039 },
22040 {
22041 name: "SCVTFS",
22042 argLen: 1,
22043 asm: arm64.ASCVTFS,
22044 reg: regInfo{
22045 inputs: []inputInfo{
22046 {0, 670826495},
22047 },
22048 outputs: []outputInfo{
22049 {0, 9223372034707292160},
22050 },
22051 },
22052 },
22053 {
22054 name: "SCVTFD",
22055 argLen: 1,
22056 asm: arm64.ASCVTFD,
22057 reg: regInfo{
22058 inputs: []inputInfo{
22059 {0, 670826495},
22060 },
22061 outputs: []outputInfo{
22062 {0, 9223372034707292160},
22063 },
22064 },
22065 },
22066 {
22067 name: "UCVTFS",
22068 argLen: 1,
22069 asm: arm64.AUCVTFS,
22070 reg: regInfo{
22071 inputs: []inputInfo{
22072 {0, 670826495},
22073 },
22074 outputs: []outputInfo{
22075 {0, 9223372034707292160},
22076 },
22077 },
22078 },
22079 {
22080 name: "UCVTFD",
22081 argLen: 1,
22082 asm: arm64.AUCVTFD,
22083 reg: regInfo{
22084 inputs: []inputInfo{
22085 {0, 670826495},
22086 },
22087 outputs: []outputInfo{
22088 {0, 9223372034707292160},
22089 },
22090 },
22091 },
22092 {
22093 name: "FCVTZSSW",
22094 argLen: 1,
22095 asm: arm64.AFCVTZSSW,
22096 reg: regInfo{
22097 inputs: []inputInfo{
22098 {0, 9223372034707292160},
22099 },
22100 outputs: []outputInfo{
22101 {0, 670826495},
22102 },
22103 },
22104 },
22105 {
22106 name: "FCVTZSDW",
22107 argLen: 1,
22108 asm: arm64.AFCVTZSDW,
22109 reg: regInfo{
22110 inputs: []inputInfo{
22111 {0, 9223372034707292160},
22112 },
22113 outputs: []outputInfo{
22114 {0, 670826495},
22115 },
22116 },
22117 },
22118 {
22119 name: "FCVTZUSW",
22120 argLen: 1,
22121 asm: arm64.AFCVTZUSW,
22122 reg: regInfo{
22123 inputs: []inputInfo{
22124 {0, 9223372034707292160},
22125 },
22126 outputs: []outputInfo{
22127 {0, 670826495},
22128 },
22129 },
22130 },
22131 {
22132 name: "FCVTZUDW",
22133 argLen: 1,
22134 asm: arm64.AFCVTZUDW,
22135 reg: regInfo{
22136 inputs: []inputInfo{
22137 {0, 9223372034707292160},
22138 },
22139 outputs: []outputInfo{
22140 {0, 670826495},
22141 },
22142 },
22143 },
22144 {
22145 name: "FCVTZSS",
22146 argLen: 1,
22147 asm: arm64.AFCVTZSS,
22148 reg: regInfo{
22149 inputs: []inputInfo{
22150 {0, 9223372034707292160},
22151 },
22152 outputs: []outputInfo{
22153 {0, 670826495},
22154 },
22155 },
22156 },
22157 {
22158 name: "FCVTZSD",
22159 argLen: 1,
22160 asm: arm64.AFCVTZSD,
22161 reg: regInfo{
22162 inputs: []inputInfo{
22163 {0, 9223372034707292160},
22164 },
22165 outputs: []outputInfo{
22166 {0, 670826495},
22167 },
22168 },
22169 },
22170 {
22171 name: "FCVTZUS",
22172 argLen: 1,
22173 asm: arm64.AFCVTZUS,
22174 reg: regInfo{
22175 inputs: []inputInfo{
22176 {0, 9223372034707292160},
22177 },
22178 outputs: []outputInfo{
22179 {0, 670826495},
22180 },
22181 },
22182 },
22183 {
22184 name: "FCVTZUD",
22185 argLen: 1,
22186 asm: arm64.AFCVTZUD,
22187 reg: regInfo{
22188 inputs: []inputInfo{
22189 {0, 9223372034707292160},
22190 },
22191 outputs: []outputInfo{
22192 {0, 670826495},
22193 },
22194 },
22195 },
22196 {
22197 name: "FCVTSD",
22198 argLen: 1,
22199 asm: arm64.AFCVTSD,
22200 reg: regInfo{
22201 inputs: []inputInfo{
22202 {0, 9223372034707292160},
22203 },
22204 outputs: []outputInfo{
22205 {0, 9223372034707292160},
22206 },
22207 },
22208 },
22209 {
22210 name: "FCVTDS",
22211 argLen: 1,
22212 asm: arm64.AFCVTDS,
22213 reg: regInfo{
22214 inputs: []inputInfo{
22215 {0, 9223372034707292160},
22216 },
22217 outputs: []outputInfo{
22218 {0, 9223372034707292160},
22219 },
22220 },
22221 },
22222 {
22223 name: "FRINTAD",
22224 argLen: 1,
22225 asm: arm64.AFRINTAD,
22226 reg: regInfo{
22227 inputs: []inputInfo{
22228 {0, 9223372034707292160},
22229 },
22230 outputs: []outputInfo{
22231 {0, 9223372034707292160},
22232 },
22233 },
22234 },
22235 {
22236 name: "FRINTMD",
22237 argLen: 1,
22238 asm: arm64.AFRINTMD,
22239 reg: regInfo{
22240 inputs: []inputInfo{
22241 {0, 9223372034707292160},
22242 },
22243 outputs: []outputInfo{
22244 {0, 9223372034707292160},
22245 },
22246 },
22247 },
22248 {
22249 name: "FRINTND",
22250 argLen: 1,
22251 asm: arm64.AFRINTND,
22252 reg: regInfo{
22253 inputs: []inputInfo{
22254 {0, 9223372034707292160},
22255 },
22256 outputs: []outputInfo{
22257 {0, 9223372034707292160},
22258 },
22259 },
22260 },
22261 {
22262 name: "FRINTPD",
22263 argLen: 1,
22264 asm: arm64.AFRINTPD,
22265 reg: regInfo{
22266 inputs: []inputInfo{
22267 {0, 9223372034707292160},
22268 },
22269 outputs: []outputInfo{
22270 {0, 9223372034707292160},
22271 },
22272 },
22273 },
22274 {
22275 name: "FRINTZD",
22276 argLen: 1,
22277 asm: arm64.AFRINTZD,
22278 reg: regInfo{
22279 inputs: []inputInfo{
22280 {0, 9223372034707292160},
22281 },
22282 outputs: []outputInfo{
22283 {0, 9223372034707292160},
22284 },
22285 },
22286 },
22287 {
22288 name: "CSEL",
22289 auxType: auxCCop,
22290 argLen: 3,
22291 asm: arm64.ACSEL,
22292 reg: regInfo{
22293 inputs: []inputInfo{
22294 {0, 670826495},
22295 {1, 670826495},
22296 },
22297 outputs: []outputInfo{
22298 {0, 670826495},
22299 },
22300 },
22301 },
22302 {
22303 name: "CSEL0",
22304 auxType: auxCCop,
22305 argLen: 2,
22306 asm: arm64.ACSEL,
22307 reg: regInfo{
22308 inputs: []inputInfo{
22309 {0, 805044223},
22310 },
22311 outputs: []outputInfo{
22312 {0, 670826495},
22313 },
22314 },
22315 },
22316 {
22317 name: "CSINC",
22318 auxType: auxCCop,
22319 argLen: 3,
22320 asm: arm64.ACSINC,
22321 reg: regInfo{
22322 inputs: []inputInfo{
22323 {0, 670826495},
22324 {1, 670826495},
22325 },
22326 outputs: []outputInfo{
22327 {0, 670826495},
22328 },
22329 },
22330 },
22331 {
22332 name: "CSINV",
22333 auxType: auxCCop,
22334 argLen: 3,
22335 asm: arm64.ACSINV,
22336 reg: regInfo{
22337 inputs: []inputInfo{
22338 {0, 670826495},
22339 {1, 670826495},
22340 },
22341 outputs: []outputInfo{
22342 {0, 670826495},
22343 },
22344 },
22345 },
22346 {
22347 name: "CSNEG",
22348 auxType: auxCCop,
22349 argLen: 3,
22350 asm: arm64.ACSNEG,
22351 reg: regInfo{
22352 inputs: []inputInfo{
22353 {0, 670826495},
22354 {1, 670826495},
22355 },
22356 outputs: []outputInfo{
22357 {0, 670826495},
22358 },
22359 },
22360 },
22361 {
22362 name: "CSETM",
22363 auxType: auxCCop,
22364 argLen: 1,
22365 asm: arm64.ACSETM,
22366 reg: regInfo{
22367 outputs: []outputInfo{
22368 {0, 670826495},
22369 },
22370 },
22371 },
22372 {
22373 name: "CALLstatic",
22374 auxType: auxCallOff,
22375 argLen: -1,
22376 clobberFlags: true,
22377 call: true,
22378 reg: regInfo{
22379 clobbers: 9223372035512336383,
22380 },
22381 },
22382 {
22383 name: "CALLtail",
22384 auxType: auxCallOff,
22385 argLen: -1,
22386 clobberFlags: true,
22387 call: true,
22388 tailCall: true,
22389 reg: regInfo{
22390 clobbers: 9223372035512336383,
22391 },
22392 },
22393 {
22394 name: "CALLclosure",
22395 auxType: auxCallOff,
22396 argLen: -1,
22397 clobberFlags: true,
22398 call: true,
22399 reg: regInfo{
22400 inputs: []inputInfo{
22401 {1, 67108864},
22402 {0, 1744568319},
22403 },
22404 clobbers: 9223372035512336383,
22405 },
22406 },
22407 {
22408 name: "CALLinter",
22409 auxType: auxCallOff,
22410 argLen: -1,
22411 clobberFlags: true,
22412 call: true,
22413 reg: regInfo{
22414 inputs: []inputInfo{
22415 {0, 670826495},
22416 },
22417 clobbers: 9223372035512336383,
22418 },
22419 },
22420 {
22421 name: "LoweredNilCheck",
22422 argLen: 2,
22423 nilCheck: true,
22424 faultOnNilArg0: true,
22425 reg: regInfo{
22426 inputs: []inputInfo{
22427 {0, 805044223},
22428 },
22429 },
22430 },
22431 {
22432 name: "Equal",
22433 argLen: 1,
22434 reg: regInfo{
22435 outputs: []outputInfo{
22436 {0, 670826495},
22437 },
22438 },
22439 },
22440 {
22441 name: "NotEqual",
22442 argLen: 1,
22443 reg: regInfo{
22444 outputs: []outputInfo{
22445 {0, 670826495},
22446 },
22447 },
22448 },
22449 {
22450 name: "LessThan",
22451 argLen: 1,
22452 reg: regInfo{
22453 outputs: []outputInfo{
22454 {0, 670826495},
22455 },
22456 },
22457 },
22458 {
22459 name: "LessEqual",
22460 argLen: 1,
22461 reg: regInfo{
22462 outputs: []outputInfo{
22463 {0, 670826495},
22464 },
22465 },
22466 },
22467 {
22468 name: "GreaterThan",
22469 argLen: 1,
22470 reg: regInfo{
22471 outputs: []outputInfo{
22472 {0, 670826495},
22473 },
22474 },
22475 },
22476 {
22477 name: "GreaterEqual",
22478 argLen: 1,
22479 reg: regInfo{
22480 outputs: []outputInfo{
22481 {0, 670826495},
22482 },
22483 },
22484 },
22485 {
22486 name: "LessThanU",
22487 argLen: 1,
22488 reg: regInfo{
22489 outputs: []outputInfo{
22490 {0, 670826495},
22491 },
22492 },
22493 },
22494 {
22495 name: "LessEqualU",
22496 argLen: 1,
22497 reg: regInfo{
22498 outputs: []outputInfo{
22499 {0, 670826495},
22500 },
22501 },
22502 },
22503 {
22504 name: "GreaterThanU",
22505 argLen: 1,
22506 reg: regInfo{
22507 outputs: []outputInfo{
22508 {0, 670826495},
22509 },
22510 },
22511 },
22512 {
22513 name: "GreaterEqualU",
22514 argLen: 1,
22515 reg: regInfo{
22516 outputs: []outputInfo{
22517 {0, 670826495},
22518 },
22519 },
22520 },
22521 {
22522 name: "LessThanF",
22523 argLen: 1,
22524 reg: regInfo{
22525 outputs: []outputInfo{
22526 {0, 670826495},
22527 },
22528 },
22529 },
22530 {
22531 name: "LessEqualF",
22532 argLen: 1,
22533 reg: regInfo{
22534 outputs: []outputInfo{
22535 {0, 670826495},
22536 },
22537 },
22538 },
22539 {
22540 name: "GreaterThanF",
22541 argLen: 1,
22542 reg: regInfo{
22543 outputs: []outputInfo{
22544 {0, 670826495},
22545 },
22546 },
22547 },
22548 {
22549 name: "GreaterEqualF",
22550 argLen: 1,
22551 reg: regInfo{
22552 outputs: []outputInfo{
22553 {0, 670826495},
22554 },
22555 },
22556 },
22557 {
22558 name: "NotLessThanF",
22559 argLen: 1,
22560 reg: regInfo{
22561 outputs: []outputInfo{
22562 {0, 670826495},
22563 },
22564 },
22565 },
22566 {
22567 name: "NotLessEqualF",
22568 argLen: 1,
22569 reg: regInfo{
22570 outputs: []outputInfo{
22571 {0, 670826495},
22572 },
22573 },
22574 },
22575 {
22576 name: "NotGreaterThanF",
22577 argLen: 1,
22578 reg: regInfo{
22579 outputs: []outputInfo{
22580 {0, 670826495},
22581 },
22582 },
22583 },
22584 {
22585 name: "NotGreaterEqualF",
22586 argLen: 1,
22587 reg: regInfo{
22588 outputs: []outputInfo{
22589 {0, 670826495},
22590 },
22591 },
22592 },
22593 {
22594 name: "LessThanNoov",
22595 argLen: 1,
22596 reg: regInfo{
22597 outputs: []outputInfo{
22598 {0, 670826495},
22599 },
22600 },
22601 },
22602 {
22603 name: "GreaterEqualNoov",
22604 argLen: 1,
22605 reg: regInfo{
22606 outputs: []outputInfo{
22607 {0, 670826495},
22608 },
22609 },
22610 },
22611 {
22612 name: "DUFFZERO",
22613 auxType: auxInt64,
22614 argLen: 2,
22615 faultOnNilArg0: true,
22616 unsafePoint: true,
22617 reg: regInfo{
22618 inputs: []inputInfo{
22619 {0, 1048576},
22620 },
22621 clobbers: 538116096,
22622 },
22623 },
22624 {
22625 name: "LoweredZero",
22626 argLen: 3,
22627 clobberFlags: true,
22628 faultOnNilArg0: true,
22629 reg: regInfo{
22630 inputs: []inputInfo{
22631 {0, 65536},
22632 {1, 670826495},
22633 },
22634 clobbers: 65536,
22635 },
22636 },
22637 {
22638 name: "DUFFCOPY",
22639 auxType: auxInt64,
22640 argLen: 3,
22641 faultOnNilArg0: true,
22642 faultOnNilArg1: true,
22643 unsafePoint: true,
22644 reg: regInfo{
22645 inputs: []inputInfo{
22646 {0, 2097152},
22647 {1, 1048576},
22648 },
22649 clobbers: 607322112,
22650 },
22651 },
22652 {
22653 name: "LoweredMove",
22654 argLen: 4,
22655 clobberFlags: true,
22656 faultOnNilArg0: true,
22657 faultOnNilArg1: true,
22658 reg: regInfo{
22659 inputs: []inputInfo{
22660 {0, 131072},
22661 {1, 65536},
22662 {2, 637272063},
22663 },
22664 clobbers: 33751040,
22665 },
22666 },
22667 {
22668 name: "LoweredGetClosurePtr",
22669 argLen: 0,
22670 zeroWidth: true,
22671 reg: regInfo{
22672 outputs: []outputInfo{
22673 {0, 67108864},
22674 },
22675 },
22676 },
22677 {
22678 name: "LoweredGetCallerSP",
22679 argLen: 1,
22680 rematerializeable: true,
22681 reg: regInfo{
22682 outputs: []outputInfo{
22683 {0, 670826495},
22684 },
22685 },
22686 },
22687 {
22688 name: "LoweredGetCallerPC",
22689 argLen: 0,
22690 rematerializeable: true,
22691 reg: regInfo{
22692 outputs: []outputInfo{
22693 {0, 670826495},
22694 },
22695 },
22696 },
22697 {
22698 name: "FlagConstant",
22699 auxType: auxFlagConstant,
22700 argLen: 0,
22701 reg: regInfo{},
22702 },
22703 {
22704 name: "InvertFlags",
22705 argLen: 1,
22706 reg: regInfo{},
22707 },
22708 {
22709 name: "LDAR",
22710 argLen: 2,
22711 faultOnNilArg0: true,
22712 asm: arm64.ALDAR,
22713 reg: regInfo{
22714 inputs: []inputInfo{
22715 {0, 9223372038733561855},
22716 },
22717 outputs: []outputInfo{
22718 {0, 670826495},
22719 },
22720 },
22721 },
22722 {
22723 name: "LDARB",
22724 argLen: 2,
22725 faultOnNilArg0: true,
22726 asm: arm64.ALDARB,
22727 reg: regInfo{
22728 inputs: []inputInfo{
22729 {0, 9223372038733561855},
22730 },
22731 outputs: []outputInfo{
22732 {0, 670826495},
22733 },
22734 },
22735 },
22736 {
22737 name: "LDARW",
22738 argLen: 2,
22739 faultOnNilArg0: true,
22740 asm: arm64.ALDARW,
22741 reg: regInfo{
22742 inputs: []inputInfo{
22743 {0, 9223372038733561855},
22744 },
22745 outputs: []outputInfo{
22746 {0, 670826495},
22747 },
22748 },
22749 },
22750 {
22751 name: "STLRB",
22752 argLen: 3,
22753 faultOnNilArg0: true,
22754 hasSideEffects: true,
22755 asm: arm64.ASTLRB,
22756 reg: regInfo{
22757 inputs: []inputInfo{
22758 {1, 805044223},
22759 {0, 9223372038733561855},
22760 },
22761 },
22762 },
22763 {
22764 name: "STLR",
22765 argLen: 3,
22766 faultOnNilArg0: true,
22767 hasSideEffects: true,
22768 asm: arm64.ASTLR,
22769 reg: regInfo{
22770 inputs: []inputInfo{
22771 {1, 805044223},
22772 {0, 9223372038733561855},
22773 },
22774 },
22775 },
22776 {
22777 name: "STLRW",
22778 argLen: 3,
22779 faultOnNilArg0: true,
22780 hasSideEffects: true,
22781 asm: arm64.ASTLRW,
22782 reg: regInfo{
22783 inputs: []inputInfo{
22784 {1, 805044223},
22785 {0, 9223372038733561855},
22786 },
22787 },
22788 },
22789 {
22790 name: "LoweredAtomicExchange64",
22791 argLen: 3,
22792 resultNotInArgs: true,
22793 faultOnNilArg0: true,
22794 hasSideEffects: true,
22795 unsafePoint: true,
22796 reg: regInfo{
22797 inputs: []inputInfo{
22798 {1, 805044223},
22799 {0, 9223372038733561855},
22800 },
22801 outputs: []outputInfo{
22802 {0, 670826495},
22803 },
22804 },
22805 },
22806 {
22807 name: "LoweredAtomicExchange32",
22808 argLen: 3,
22809 resultNotInArgs: true,
22810 faultOnNilArg0: true,
22811 hasSideEffects: true,
22812 unsafePoint: true,
22813 reg: regInfo{
22814 inputs: []inputInfo{
22815 {1, 805044223},
22816 {0, 9223372038733561855},
22817 },
22818 outputs: []outputInfo{
22819 {0, 670826495},
22820 },
22821 },
22822 },
22823 {
22824 name: "LoweredAtomicExchange64Variant",
22825 argLen: 3,
22826 resultNotInArgs: true,
22827 faultOnNilArg0: true,
22828 hasSideEffects: true,
22829 reg: regInfo{
22830 inputs: []inputInfo{
22831 {1, 805044223},
22832 {0, 9223372038733561855},
22833 },
22834 outputs: []outputInfo{
22835 {0, 670826495},
22836 },
22837 },
22838 },
22839 {
22840 name: "LoweredAtomicExchange32Variant",
22841 argLen: 3,
22842 resultNotInArgs: true,
22843 faultOnNilArg0: true,
22844 hasSideEffects: true,
22845 reg: regInfo{
22846 inputs: []inputInfo{
22847 {1, 805044223},
22848 {0, 9223372038733561855},
22849 },
22850 outputs: []outputInfo{
22851 {0, 670826495},
22852 },
22853 },
22854 },
22855 {
22856 name: "LoweredAtomicAdd64",
22857 argLen: 3,
22858 resultNotInArgs: true,
22859 faultOnNilArg0: true,
22860 hasSideEffects: true,
22861 unsafePoint: true,
22862 reg: regInfo{
22863 inputs: []inputInfo{
22864 {1, 805044223},
22865 {0, 9223372038733561855},
22866 },
22867 outputs: []outputInfo{
22868 {0, 670826495},
22869 },
22870 },
22871 },
22872 {
22873 name: "LoweredAtomicAdd32",
22874 argLen: 3,
22875 resultNotInArgs: true,
22876 faultOnNilArg0: true,
22877 hasSideEffects: true,
22878 unsafePoint: true,
22879 reg: regInfo{
22880 inputs: []inputInfo{
22881 {1, 805044223},
22882 {0, 9223372038733561855},
22883 },
22884 outputs: []outputInfo{
22885 {0, 670826495},
22886 },
22887 },
22888 },
22889 {
22890 name: "LoweredAtomicAdd64Variant",
22891 argLen: 3,
22892 resultNotInArgs: true,
22893 faultOnNilArg0: true,
22894 hasSideEffects: true,
22895 reg: regInfo{
22896 inputs: []inputInfo{
22897 {1, 805044223},
22898 {0, 9223372038733561855},
22899 },
22900 outputs: []outputInfo{
22901 {0, 670826495},
22902 },
22903 },
22904 },
22905 {
22906 name: "LoweredAtomicAdd32Variant",
22907 argLen: 3,
22908 resultNotInArgs: true,
22909 faultOnNilArg0: true,
22910 hasSideEffects: true,
22911 reg: regInfo{
22912 inputs: []inputInfo{
22913 {1, 805044223},
22914 {0, 9223372038733561855},
22915 },
22916 outputs: []outputInfo{
22917 {0, 670826495},
22918 },
22919 },
22920 },
22921 {
22922 name: "LoweredAtomicCas64",
22923 argLen: 4,
22924 resultNotInArgs: true,
22925 clobberFlags: true,
22926 faultOnNilArg0: true,
22927 hasSideEffects: true,
22928 unsafePoint: true,
22929 reg: regInfo{
22930 inputs: []inputInfo{
22931 {1, 805044223},
22932 {2, 805044223},
22933 {0, 9223372038733561855},
22934 },
22935 outputs: []outputInfo{
22936 {0, 670826495},
22937 },
22938 },
22939 },
22940 {
22941 name: "LoweredAtomicCas32",
22942 argLen: 4,
22943 resultNotInArgs: true,
22944 clobberFlags: true,
22945 faultOnNilArg0: true,
22946 hasSideEffects: true,
22947 unsafePoint: true,
22948 reg: regInfo{
22949 inputs: []inputInfo{
22950 {1, 805044223},
22951 {2, 805044223},
22952 {0, 9223372038733561855},
22953 },
22954 outputs: []outputInfo{
22955 {0, 670826495},
22956 },
22957 },
22958 },
22959 {
22960 name: "LoweredAtomicCas64Variant",
22961 argLen: 4,
22962 resultNotInArgs: true,
22963 clobberFlags: true,
22964 faultOnNilArg0: true,
22965 hasSideEffects: true,
22966 unsafePoint: true,
22967 reg: regInfo{
22968 inputs: []inputInfo{
22969 {1, 805044223},
22970 {2, 805044223},
22971 {0, 9223372038733561855},
22972 },
22973 outputs: []outputInfo{
22974 {0, 670826495},
22975 },
22976 },
22977 },
22978 {
22979 name: "LoweredAtomicCas32Variant",
22980 argLen: 4,
22981 resultNotInArgs: true,
22982 clobberFlags: true,
22983 faultOnNilArg0: true,
22984 hasSideEffects: true,
22985 unsafePoint: true,
22986 reg: regInfo{
22987 inputs: []inputInfo{
22988 {1, 805044223},
22989 {2, 805044223},
22990 {0, 9223372038733561855},
22991 },
22992 outputs: []outputInfo{
22993 {0, 670826495},
22994 },
22995 },
22996 },
22997 {
22998 name: "LoweredAtomicAnd8",
22999 argLen: 3,
23000 resultNotInArgs: true,
23001 faultOnNilArg0: true,
23002 hasSideEffects: true,
23003 unsafePoint: true,
23004 asm: arm64.AAND,
23005 reg: regInfo{
23006 inputs: []inputInfo{
23007 {1, 805044223},
23008 {0, 9223372038733561855},
23009 },
23010 outputs: []outputInfo{
23011 {0, 670826495},
23012 },
23013 },
23014 },
23015 {
23016 name: "LoweredAtomicAnd32",
23017 argLen: 3,
23018 resultNotInArgs: true,
23019 faultOnNilArg0: true,
23020 hasSideEffects: true,
23021 unsafePoint: true,
23022 asm: arm64.AAND,
23023 reg: regInfo{
23024 inputs: []inputInfo{
23025 {1, 805044223},
23026 {0, 9223372038733561855},
23027 },
23028 outputs: []outputInfo{
23029 {0, 670826495},
23030 },
23031 },
23032 },
23033 {
23034 name: "LoweredAtomicOr8",
23035 argLen: 3,
23036 resultNotInArgs: true,
23037 faultOnNilArg0: true,
23038 hasSideEffects: true,
23039 unsafePoint: true,
23040 asm: arm64.AORR,
23041 reg: regInfo{
23042 inputs: []inputInfo{
23043 {1, 805044223},
23044 {0, 9223372038733561855},
23045 },
23046 outputs: []outputInfo{
23047 {0, 670826495},
23048 },
23049 },
23050 },
23051 {
23052 name: "LoweredAtomicOr32",
23053 argLen: 3,
23054 resultNotInArgs: true,
23055 faultOnNilArg0: true,
23056 hasSideEffects: true,
23057 unsafePoint: true,
23058 asm: arm64.AORR,
23059 reg: regInfo{
23060 inputs: []inputInfo{
23061 {1, 805044223},
23062 {0, 9223372038733561855},
23063 },
23064 outputs: []outputInfo{
23065 {0, 670826495},
23066 },
23067 },
23068 },
23069 {
23070 name: "LoweredAtomicAnd8Variant",
23071 argLen: 3,
23072 resultNotInArgs: true,
23073 faultOnNilArg0: true,
23074 hasSideEffects: true,
23075 unsafePoint: true,
23076 reg: regInfo{
23077 inputs: []inputInfo{
23078 {1, 805044223},
23079 {0, 9223372038733561855},
23080 },
23081 outputs: []outputInfo{
23082 {0, 670826495},
23083 },
23084 },
23085 },
23086 {
23087 name: "LoweredAtomicAnd32Variant",
23088 argLen: 3,
23089 resultNotInArgs: true,
23090 faultOnNilArg0: true,
23091 hasSideEffects: true,
23092 unsafePoint: true,
23093 reg: regInfo{
23094 inputs: []inputInfo{
23095 {1, 805044223},
23096 {0, 9223372038733561855},
23097 },
23098 outputs: []outputInfo{
23099 {0, 670826495},
23100 },
23101 },
23102 },
23103 {
23104 name: "LoweredAtomicOr8Variant",
23105 argLen: 3,
23106 resultNotInArgs: true,
23107 faultOnNilArg0: true,
23108 hasSideEffects: true,
23109 reg: regInfo{
23110 inputs: []inputInfo{
23111 {1, 805044223},
23112 {0, 9223372038733561855},
23113 },
23114 outputs: []outputInfo{
23115 {0, 670826495},
23116 },
23117 },
23118 },
23119 {
23120 name: "LoweredAtomicOr32Variant",
23121 argLen: 3,
23122 resultNotInArgs: true,
23123 faultOnNilArg0: true,
23124 hasSideEffects: true,
23125 reg: regInfo{
23126 inputs: []inputInfo{
23127 {1, 805044223},
23128 {0, 9223372038733561855},
23129 },
23130 outputs: []outputInfo{
23131 {0, 670826495},
23132 },
23133 },
23134 },
23135 {
23136 name: "LoweredWB",
23137 auxType: auxInt64,
23138 argLen: 1,
23139 clobberFlags: true,
23140 reg: regInfo{
23141 clobbers: 9223372035244359680,
23142 outputs: []outputInfo{
23143 {0, 33554432},
23144 },
23145 },
23146 },
23147 {
23148 name: "LoweredPanicBoundsA",
23149 auxType: auxInt64,
23150 argLen: 3,
23151 call: true,
23152 reg: regInfo{
23153 inputs: []inputInfo{
23154 {0, 4},
23155 {1, 8},
23156 },
23157 },
23158 },
23159 {
23160 name: "LoweredPanicBoundsB",
23161 auxType: auxInt64,
23162 argLen: 3,
23163 call: true,
23164 reg: regInfo{
23165 inputs: []inputInfo{
23166 {0, 2},
23167 {1, 4},
23168 },
23169 },
23170 },
23171 {
23172 name: "LoweredPanicBoundsC",
23173 auxType: auxInt64,
23174 argLen: 3,
23175 call: true,
23176 reg: regInfo{
23177 inputs: []inputInfo{
23178 {0, 1},
23179 {1, 2},
23180 },
23181 },
23182 },
23183 {
23184 name: "PRFM",
23185 auxType: auxInt64,
23186 argLen: 2,
23187 hasSideEffects: true,
23188 asm: arm64.APRFM,
23189 reg: regInfo{
23190 inputs: []inputInfo{
23191 {0, 9223372038733561855},
23192 },
23193 },
23194 },
23195 {
23196 name: "DMB",
23197 auxType: auxInt64,
23198 argLen: 1,
23199 hasSideEffects: true,
23200 asm: arm64.ADMB,
23201 reg: regInfo{},
23202 },
23203
23204 {
23205 name: "ADDV",
23206 argLen: 2,
23207 commutative: true,
23208 asm: loong64.AADDVU,
23209 reg: regInfo{
23210 inputs: []inputInfo{
23211 {0, 1073741816},
23212 {1, 1073741816},
23213 },
23214 outputs: []outputInfo{
23215 {0, 1071644664},
23216 },
23217 },
23218 },
23219 {
23220 name: "ADDVconst",
23221 auxType: auxInt64,
23222 argLen: 1,
23223 asm: loong64.AADDVU,
23224 reg: regInfo{
23225 inputs: []inputInfo{
23226 {0, 1073741820},
23227 },
23228 outputs: []outputInfo{
23229 {0, 1071644664},
23230 },
23231 },
23232 },
23233 {
23234 name: "SUBV",
23235 argLen: 2,
23236 asm: loong64.ASUBVU,
23237 reg: regInfo{
23238 inputs: []inputInfo{
23239 {0, 1073741816},
23240 {1, 1073741816},
23241 },
23242 outputs: []outputInfo{
23243 {0, 1071644664},
23244 },
23245 },
23246 },
23247 {
23248 name: "SUBVconst",
23249 auxType: auxInt64,
23250 argLen: 1,
23251 asm: loong64.ASUBVU,
23252 reg: regInfo{
23253 inputs: []inputInfo{
23254 {0, 1073741816},
23255 },
23256 outputs: []outputInfo{
23257 {0, 1071644664},
23258 },
23259 },
23260 },
23261 {
23262 name: "MULV",
23263 argLen: 2,
23264 commutative: true,
23265 asm: loong64.AMULV,
23266 reg: regInfo{
23267 inputs: []inputInfo{
23268 {0, 1073741816},
23269 {1, 1073741816},
23270 },
23271 outputs: []outputInfo{
23272 {0, 1071644664},
23273 },
23274 },
23275 },
23276 {
23277 name: "MULHV",
23278 argLen: 2,
23279 commutative: true,
23280 asm: loong64.AMULHV,
23281 reg: regInfo{
23282 inputs: []inputInfo{
23283 {0, 1073741816},
23284 {1, 1073741816},
23285 },
23286 outputs: []outputInfo{
23287 {0, 1071644664},
23288 },
23289 },
23290 },
23291 {
23292 name: "MULHVU",
23293 argLen: 2,
23294 commutative: true,
23295 asm: loong64.AMULHVU,
23296 reg: regInfo{
23297 inputs: []inputInfo{
23298 {0, 1073741816},
23299 {1, 1073741816},
23300 },
23301 outputs: []outputInfo{
23302 {0, 1071644664},
23303 },
23304 },
23305 },
23306 {
23307 name: "DIVV",
23308 argLen: 2,
23309 asm: loong64.ADIVV,
23310 reg: regInfo{
23311 inputs: []inputInfo{
23312 {0, 1073741816},
23313 {1, 1073741816},
23314 },
23315 outputs: []outputInfo{
23316 {0, 1071644664},
23317 },
23318 },
23319 },
23320 {
23321 name: "DIVVU",
23322 argLen: 2,
23323 asm: loong64.ADIVVU,
23324 reg: regInfo{
23325 inputs: []inputInfo{
23326 {0, 1073741816},
23327 {1, 1073741816},
23328 },
23329 outputs: []outputInfo{
23330 {0, 1071644664},
23331 },
23332 },
23333 },
23334 {
23335 name: "REMV",
23336 argLen: 2,
23337 asm: loong64.AREMV,
23338 reg: regInfo{
23339 inputs: []inputInfo{
23340 {0, 1073741816},
23341 {1, 1073741816},
23342 },
23343 outputs: []outputInfo{
23344 {0, 1071644664},
23345 },
23346 },
23347 },
23348 {
23349 name: "REMVU",
23350 argLen: 2,
23351 asm: loong64.AREMVU,
23352 reg: regInfo{
23353 inputs: []inputInfo{
23354 {0, 1073741816},
23355 {1, 1073741816},
23356 },
23357 outputs: []outputInfo{
23358 {0, 1071644664},
23359 },
23360 },
23361 },
23362 {
23363 name: "ADDF",
23364 argLen: 2,
23365 commutative: true,
23366 asm: loong64.AADDF,
23367 reg: regInfo{
23368 inputs: []inputInfo{
23369 {0, 4611686017353646080},
23370 {1, 4611686017353646080},
23371 },
23372 outputs: []outputInfo{
23373 {0, 4611686017353646080},
23374 },
23375 },
23376 },
23377 {
23378 name: "ADDD",
23379 argLen: 2,
23380 commutative: true,
23381 asm: loong64.AADDD,
23382 reg: regInfo{
23383 inputs: []inputInfo{
23384 {0, 4611686017353646080},
23385 {1, 4611686017353646080},
23386 },
23387 outputs: []outputInfo{
23388 {0, 4611686017353646080},
23389 },
23390 },
23391 },
23392 {
23393 name: "SUBF",
23394 argLen: 2,
23395 asm: loong64.ASUBF,
23396 reg: regInfo{
23397 inputs: []inputInfo{
23398 {0, 4611686017353646080},
23399 {1, 4611686017353646080},
23400 },
23401 outputs: []outputInfo{
23402 {0, 4611686017353646080},
23403 },
23404 },
23405 },
23406 {
23407 name: "SUBD",
23408 argLen: 2,
23409 asm: loong64.ASUBD,
23410 reg: regInfo{
23411 inputs: []inputInfo{
23412 {0, 4611686017353646080},
23413 {1, 4611686017353646080},
23414 },
23415 outputs: []outputInfo{
23416 {0, 4611686017353646080},
23417 },
23418 },
23419 },
23420 {
23421 name: "MULF",
23422 argLen: 2,
23423 commutative: true,
23424 asm: loong64.AMULF,
23425 reg: regInfo{
23426 inputs: []inputInfo{
23427 {0, 4611686017353646080},
23428 {1, 4611686017353646080},
23429 },
23430 outputs: []outputInfo{
23431 {0, 4611686017353646080},
23432 },
23433 },
23434 },
23435 {
23436 name: "MULD",
23437 argLen: 2,
23438 commutative: true,
23439 asm: loong64.AMULD,
23440 reg: regInfo{
23441 inputs: []inputInfo{
23442 {0, 4611686017353646080},
23443 {1, 4611686017353646080},
23444 },
23445 outputs: []outputInfo{
23446 {0, 4611686017353646080},
23447 },
23448 },
23449 },
23450 {
23451 name: "DIVF",
23452 argLen: 2,
23453 asm: loong64.ADIVF,
23454 reg: regInfo{
23455 inputs: []inputInfo{
23456 {0, 4611686017353646080},
23457 {1, 4611686017353646080},
23458 },
23459 outputs: []outputInfo{
23460 {0, 4611686017353646080},
23461 },
23462 },
23463 },
23464 {
23465 name: "DIVD",
23466 argLen: 2,
23467 asm: loong64.ADIVD,
23468 reg: regInfo{
23469 inputs: []inputInfo{
23470 {0, 4611686017353646080},
23471 {1, 4611686017353646080},
23472 },
23473 outputs: []outputInfo{
23474 {0, 4611686017353646080},
23475 },
23476 },
23477 },
23478 {
23479 name: "AND",
23480 argLen: 2,
23481 commutative: true,
23482 asm: loong64.AAND,
23483 reg: regInfo{
23484 inputs: []inputInfo{
23485 {0, 1073741816},
23486 {1, 1073741816},
23487 },
23488 outputs: []outputInfo{
23489 {0, 1071644664},
23490 },
23491 },
23492 },
23493 {
23494 name: "ANDconst",
23495 auxType: auxInt64,
23496 argLen: 1,
23497 asm: loong64.AAND,
23498 reg: regInfo{
23499 inputs: []inputInfo{
23500 {0, 1073741816},
23501 },
23502 outputs: []outputInfo{
23503 {0, 1071644664},
23504 },
23505 },
23506 },
23507 {
23508 name: "OR",
23509 argLen: 2,
23510 commutative: true,
23511 asm: loong64.AOR,
23512 reg: regInfo{
23513 inputs: []inputInfo{
23514 {0, 1073741816},
23515 {1, 1073741816},
23516 },
23517 outputs: []outputInfo{
23518 {0, 1071644664},
23519 },
23520 },
23521 },
23522 {
23523 name: "ORconst",
23524 auxType: auxInt64,
23525 argLen: 1,
23526 asm: loong64.AOR,
23527 reg: regInfo{
23528 inputs: []inputInfo{
23529 {0, 1073741816},
23530 },
23531 outputs: []outputInfo{
23532 {0, 1071644664},
23533 },
23534 },
23535 },
23536 {
23537 name: "XOR",
23538 argLen: 2,
23539 commutative: true,
23540 asm: loong64.AXOR,
23541 reg: regInfo{
23542 inputs: []inputInfo{
23543 {0, 1073741816},
23544 {1, 1073741816},
23545 },
23546 outputs: []outputInfo{
23547 {0, 1071644664},
23548 },
23549 },
23550 },
23551 {
23552 name: "XORconst",
23553 auxType: auxInt64,
23554 argLen: 1,
23555 asm: loong64.AXOR,
23556 reg: regInfo{
23557 inputs: []inputInfo{
23558 {0, 1073741816},
23559 },
23560 outputs: []outputInfo{
23561 {0, 1071644664},
23562 },
23563 },
23564 },
23565 {
23566 name: "NOR",
23567 argLen: 2,
23568 commutative: true,
23569 asm: loong64.ANOR,
23570 reg: regInfo{
23571 inputs: []inputInfo{
23572 {0, 1073741816},
23573 {1, 1073741816},
23574 },
23575 outputs: []outputInfo{
23576 {0, 1071644664},
23577 },
23578 },
23579 },
23580 {
23581 name: "NORconst",
23582 auxType: auxInt64,
23583 argLen: 1,
23584 asm: loong64.ANOR,
23585 reg: regInfo{
23586 inputs: []inputInfo{
23587 {0, 1073741816},
23588 },
23589 outputs: []outputInfo{
23590 {0, 1071644664},
23591 },
23592 },
23593 },
23594 {
23595 name: "NEGV",
23596 argLen: 1,
23597 reg: regInfo{
23598 inputs: []inputInfo{
23599 {0, 1073741816},
23600 },
23601 outputs: []outputInfo{
23602 {0, 1071644664},
23603 },
23604 },
23605 },
23606 {
23607 name: "NEGF",
23608 argLen: 1,
23609 asm: loong64.ANEGF,
23610 reg: regInfo{
23611 inputs: []inputInfo{
23612 {0, 4611686017353646080},
23613 },
23614 outputs: []outputInfo{
23615 {0, 4611686017353646080},
23616 },
23617 },
23618 },
23619 {
23620 name: "NEGD",
23621 argLen: 1,
23622 asm: loong64.ANEGD,
23623 reg: regInfo{
23624 inputs: []inputInfo{
23625 {0, 4611686017353646080},
23626 },
23627 outputs: []outputInfo{
23628 {0, 4611686017353646080},
23629 },
23630 },
23631 },
23632 {
23633 name: "SQRTD",
23634 argLen: 1,
23635 asm: loong64.ASQRTD,
23636 reg: regInfo{
23637 inputs: []inputInfo{
23638 {0, 4611686017353646080},
23639 },
23640 outputs: []outputInfo{
23641 {0, 4611686017353646080},
23642 },
23643 },
23644 },
23645 {
23646 name: "SQRTF",
23647 argLen: 1,
23648 asm: loong64.ASQRTF,
23649 reg: regInfo{
23650 inputs: []inputInfo{
23651 {0, 4611686017353646080},
23652 },
23653 outputs: []outputInfo{
23654 {0, 4611686017353646080},
23655 },
23656 },
23657 },
23658 {
23659 name: "MASKEQZ",
23660 argLen: 2,
23661 asm: loong64.AMASKEQZ,
23662 reg: regInfo{
23663 inputs: []inputInfo{
23664 {0, 1073741816},
23665 {1, 1073741816},
23666 },
23667 outputs: []outputInfo{
23668 {0, 1071644664},
23669 },
23670 },
23671 },
23672 {
23673 name: "MASKNEZ",
23674 argLen: 2,
23675 asm: loong64.AMASKNEZ,
23676 reg: regInfo{
23677 inputs: []inputInfo{
23678 {0, 1073741816},
23679 {1, 1073741816},
23680 },
23681 outputs: []outputInfo{
23682 {0, 1071644664},
23683 },
23684 },
23685 },
23686 {
23687 name: "SLLV",
23688 argLen: 2,
23689 asm: loong64.ASLLV,
23690 reg: regInfo{
23691 inputs: []inputInfo{
23692 {0, 1073741816},
23693 {1, 1073741816},
23694 },
23695 outputs: []outputInfo{
23696 {0, 1071644664},
23697 },
23698 },
23699 },
23700 {
23701 name: "SLLVconst",
23702 auxType: auxInt64,
23703 argLen: 1,
23704 asm: loong64.ASLLV,
23705 reg: regInfo{
23706 inputs: []inputInfo{
23707 {0, 1073741816},
23708 },
23709 outputs: []outputInfo{
23710 {0, 1071644664},
23711 },
23712 },
23713 },
23714 {
23715 name: "SRLV",
23716 argLen: 2,
23717 asm: loong64.ASRLV,
23718 reg: regInfo{
23719 inputs: []inputInfo{
23720 {0, 1073741816},
23721 {1, 1073741816},
23722 },
23723 outputs: []outputInfo{
23724 {0, 1071644664},
23725 },
23726 },
23727 },
23728 {
23729 name: "SRLVconst",
23730 auxType: auxInt64,
23731 argLen: 1,
23732 asm: loong64.ASRLV,
23733 reg: regInfo{
23734 inputs: []inputInfo{
23735 {0, 1073741816},
23736 },
23737 outputs: []outputInfo{
23738 {0, 1071644664},
23739 },
23740 },
23741 },
23742 {
23743 name: "SRAV",
23744 argLen: 2,
23745 asm: loong64.ASRAV,
23746 reg: regInfo{
23747 inputs: []inputInfo{
23748 {0, 1073741816},
23749 {1, 1073741816},
23750 },
23751 outputs: []outputInfo{
23752 {0, 1071644664},
23753 },
23754 },
23755 },
23756 {
23757 name: "SRAVconst",
23758 auxType: auxInt64,
23759 argLen: 1,
23760 asm: loong64.ASRAV,
23761 reg: regInfo{
23762 inputs: []inputInfo{
23763 {0, 1073741816},
23764 },
23765 outputs: []outputInfo{
23766 {0, 1071644664},
23767 },
23768 },
23769 },
23770 {
23771 name: "ROTR",
23772 argLen: 2,
23773 asm: loong64.AROTR,
23774 reg: regInfo{
23775 inputs: []inputInfo{
23776 {0, 1073741816},
23777 {1, 1073741816},
23778 },
23779 outputs: []outputInfo{
23780 {0, 1071644664},
23781 },
23782 },
23783 },
23784 {
23785 name: "ROTRV",
23786 argLen: 2,
23787 asm: loong64.AROTRV,
23788 reg: regInfo{
23789 inputs: []inputInfo{
23790 {0, 1073741816},
23791 {1, 1073741816},
23792 },
23793 outputs: []outputInfo{
23794 {0, 1071644664},
23795 },
23796 },
23797 },
23798 {
23799 name: "ROTRconst",
23800 auxType: auxInt64,
23801 argLen: 1,
23802 asm: loong64.AROTR,
23803 reg: regInfo{
23804 inputs: []inputInfo{
23805 {0, 1073741816},
23806 },
23807 outputs: []outputInfo{
23808 {0, 1071644664},
23809 },
23810 },
23811 },
23812 {
23813 name: "ROTRVconst",
23814 auxType: auxInt64,
23815 argLen: 1,
23816 asm: loong64.AROTRV,
23817 reg: regInfo{
23818 inputs: []inputInfo{
23819 {0, 1073741816},
23820 },
23821 outputs: []outputInfo{
23822 {0, 1071644664},
23823 },
23824 },
23825 },
23826 {
23827 name: "SGT",
23828 argLen: 2,
23829 asm: loong64.ASGT,
23830 reg: regInfo{
23831 inputs: []inputInfo{
23832 {0, 1073741816},
23833 {1, 1073741816},
23834 },
23835 outputs: []outputInfo{
23836 {0, 1071644664},
23837 },
23838 },
23839 },
23840 {
23841 name: "SGTconst",
23842 auxType: auxInt64,
23843 argLen: 1,
23844 asm: loong64.ASGT,
23845 reg: regInfo{
23846 inputs: []inputInfo{
23847 {0, 1073741816},
23848 },
23849 outputs: []outputInfo{
23850 {0, 1071644664},
23851 },
23852 },
23853 },
23854 {
23855 name: "SGTU",
23856 argLen: 2,
23857 asm: loong64.ASGTU,
23858 reg: regInfo{
23859 inputs: []inputInfo{
23860 {0, 1073741816},
23861 {1, 1073741816},
23862 },
23863 outputs: []outputInfo{
23864 {0, 1071644664},
23865 },
23866 },
23867 },
23868 {
23869 name: "SGTUconst",
23870 auxType: auxInt64,
23871 argLen: 1,
23872 asm: loong64.ASGTU,
23873 reg: regInfo{
23874 inputs: []inputInfo{
23875 {0, 1073741816},
23876 },
23877 outputs: []outputInfo{
23878 {0, 1071644664},
23879 },
23880 },
23881 },
23882 {
23883 name: "CMPEQF",
23884 argLen: 2,
23885 asm: loong64.ACMPEQF,
23886 reg: regInfo{
23887 inputs: []inputInfo{
23888 {0, 4611686017353646080},
23889 {1, 4611686017353646080},
23890 },
23891 },
23892 },
23893 {
23894 name: "CMPEQD",
23895 argLen: 2,
23896 asm: loong64.ACMPEQD,
23897 reg: regInfo{
23898 inputs: []inputInfo{
23899 {0, 4611686017353646080},
23900 {1, 4611686017353646080},
23901 },
23902 },
23903 },
23904 {
23905 name: "CMPGEF",
23906 argLen: 2,
23907 asm: loong64.ACMPGEF,
23908 reg: regInfo{
23909 inputs: []inputInfo{
23910 {0, 4611686017353646080},
23911 {1, 4611686017353646080},
23912 },
23913 },
23914 },
23915 {
23916 name: "CMPGED",
23917 argLen: 2,
23918 asm: loong64.ACMPGED,
23919 reg: regInfo{
23920 inputs: []inputInfo{
23921 {0, 4611686017353646080},
23922 {1, 4611686017353646080},
23923 },
23924 },
23925 },
23926 {
23927 name: "CMPGTF",
23928 argLen: 2,
23929 asm: loong64.ACMPGTF,
23930 reg: regInfo{
23931 inputs: []inputInfo{
23932 {0, 4611686017353646080},
23933 {1, 4611686017353646080},
23934 },
23935 },
23936 },
23937 {
23938 name: "CMPGTD",
23939 argLen: 2,
23940 asm: loong64.ACMPGTD,
23941 reg: regInfo{
23942 inputs: []inputInfo{
23943 {0, 4611686017353646080},
23944 {1, 4611686017353646080},
23945 },
23946 },
23947 },
23948 {
23949 name: "MOVVconst",
23950 auxType: auxInt64,
23951 argLen: 0,
23952 rematerializeable: true,
23953 asm: loong64.AMOVV,
23954 reg: regInfo{
23955 outputs: []outputInfo{
23956 {0, 1071644664},
23957 },
23958 },
23959 },
23960 {
23961 name: "MOVFconst",
23962 auxType: auxFloat64,
23963 argLen: 0,
23964 rematerializeable: true,
23965 asm: loong64.AMOVF,
23966 reg: regInfo{
23967 outputs: []outputInfo{
23968 {0, 4611686017353646080},
23969 },
23970 },
23971 },
23972 {
23973 name: "MOVDconst",
23974 auxType: auxFloat64,
23975 argLen: 0,
23976 rematerializeable: true,
23977 asm: loong64.AMOVD,
23978 reg: regInfo{
23979 outputs: []outputInfo{
23980 {0, 4611686017353646080},
23981 },
23982 },
23983 },
23984 {
23985 name: "MOVVaddr",
23986 auxType: auxSymOff,
23987 argLen: 1,
23988 rematerializeable: true,
23989 symEffect: SymAddr,
23990 asm: loong64.AMOVV,
23991 reg: regInfo{
23992 inputs: []inputInfo{
23993 {0, 4611686018427387908},
23994 },
23995 outputs: []outputInfo{
23996 {0, 1071644664},
23997 },
23998 },
23999 },
24000 {
24001 name: "MOVBload",
24002 auxType: auxSymOff,
24003 argLen: 2,
24004 faultOnNilArg0: true,
24005 symEffect: SymRead,
24006 asm: loong64.AMOVB,
24007 reg: regInfo{
24008 inputs: []inputInfo{
24009 {0, 4611686019501129724},
24010 },
24011 outputs: []outputInfo{
24012 {0, 1071644664},
24013 },
24014 },
24015 },
24016 {
24017 name: "MOVBUload",
24018 auxType: auxSymOff,
24019 argLen: 2,
24020 faultOnNilArg0: true,
24021 symEffect: SymRead,
24022 asm: loong64.AMOVBU,
24023 reg: regInfo{
24024 inputs: []inputInfo{
24025 {0, 4611686019501129724},
24026 },
24027 outputs: []outputInfo{
24028 {0, 1071644664},
24029 },
24030 },
24031 },
24032 {
24033 name: "MOVHload",
24034 auxType: auxSymOff,
24035 argLen: 2,
24036 faultOnNilArg0: true,
24037 symEffect: SymRead,
24038 asm: loong64.AMOVH,
24039 reg: regInfo{
24040 inputs: []inputInfo{
24041 {0, 4611686019501129724},
24042 },
24043 outputs: []outputInfo{
24044 {0, 1071644664},
24045 },
24046 },
24047 },
24048 {
24049 name: "MOVHUload",
24050 auxType: auxSymOff,
24051 argLen: 2,
24052 faultOnNilArg0: true,
24053 symEffect: SymRead,
24054 asm: loong64.AMOVHU,
24055 reg: regInfo{
24056 inputs: []inputInfo{
24057 {0, 4611686019501129724},
24058 },
24059 outputs: []outputInfo{
24060 {0, 1071644664},
24061 },
24062 },
24063 },
24064 {
24065 name: "MOVWload",
24066 auxType: auxSymOff,
24067 argLen: 2,
24068 faultOnNilArg0: true,
24069 symEffect: SymRead,
24070 asm: loong64.AMOVW,
24071 reg: regInfo{
24072 inputs: []inputInfo{
24073 {0, 4611686019501129724},
24074 },
24075 outputs: []outputInfo{
24076 {0, 1071644664},
24077 },
24078 },
24079 },
24080 {
24081 name: "MOVWUload",
24082 auxType: auxSymOff,
24083 argLen: 2,
24084 faultOnNilArg0: true,
24085 symEffect: SymRead,
24086 asm: loong64.AMOVWU,
24087 reg: regInfo{
24088 inputs: []inputInfo{
24089 {0, 4611686019501129724},
24090 },
24091 outputs: []outputInfo{
24092 {0, 1071644664},
24093 },
24094 },
24095 },
24096 {
24097 name: "MOVVload",
24098 auxType: auxSymOff,
24099 argLen: 2,
24100 faultOnNilArg0: true,
24101 symEffect: SymRead,
24102 asm: loong64.AMOVV,
24103 reg: regInfo{
24104 inputs: []inputInfo{
24105 {0, 4611686019501129724},
24106 },
24107 outputs: []outputInfo{
24108 {0, 1071644664},
24109 },
24110 },
24111 },
24112 {
24113 name: "MOVFload",
24114 auxType: auxSymOff,
24115 argLen: 2,
24116 faultOnNilArg0: true,
24117 symEffect: SymRead,
24118 asm: loong64.AMOVF,
24119 reg: regInfo{
24120 inputs: []inputInfo{
24121 {0, 4611686019501129724},
24122 },
24123 outputs: []outputInfo{
24124 {0, 4611686017353646080},
24125 },
24126 },
24127 },
24128 {
24129 name: "MOVDload",
24130 auxType: auxSymOff,
24131 argLen: 2,
24132 faultOnNilArg0: true,
24133 symEffect: SymRead,
24134 asm: loong64.AMOVD,
24135 reg: regInfo{
24136 inputs: []inputInfo{
24137 {0, 4611686019501129724},
24138 },
24139 outputs: []outputInfo{
24140 {0, 4611686017353646080},
24141 },
24142 },
24143 },
24144 {
24145 name: "MOVBstore",
24146 auxType: auxSymOff,
24147 argLen: 3,
24148 faultOnNilArg0: true,
24149 symEffect: SymWrite,
24150 asm: loong64.AMOVB,
24151 reg: regInfo{
24152 inputs: []inputInfo{
24153 {1, 1073741816},
24154 {0, 4611686019501129724},
24155 },
24156 },
24157 },
24158 {
24159 name: "MOVHstore",
24160 auxType: auxSymOff,
24161 argLen: 3,
24162 faultOnNilArg0: true,
24163 symEffect: SymWrite,
24164 asm: loong64.AMOVH,
24165 reg: regInfo{
24166 inputs: []inputInfo{
24167 {1, 1073741816},
24168 {0, 4611686019501129724},
24169 },
24170 },
24171 },
24172 {
24173 name: "MOVWstore",
24174 auxType: auxSymOff,
24175 argLen: 3,
24176 faultOnNilArg0: true,
24177 symEffect: SymWrite,
24178 asm: loong64.AMOVW,
24179 reg: regInfo{
24180 inputs: []inputInfo{
24181 {1, 1073741816},
24182 {0, 4611686019501129724},
24183 },
24184 },
24185 },
24186 {
24187 name: "MOVVstore",
24188 auxType: auxSymOff,
24189 argLen: 3,
24190 faultOnNilArg0: true,
24191 symEffect: SymWrite,
24192 asm: loong64.AMOVV,
24193 reg: regInfo{
24194 inputs: []inputInfo{
24195 {1, 1073741816},
24196 {0, 4611686019501129724},
24197 },
24198 },
24199 },
24200 {
24201 name: "MOVFstore",
24202 auxType: auxSymOff,
24203 argLen: 3,
24204 faultOnNilArg0: true,
24205 symEffect: SymWrite,
24206 asm: loong64.AMOVF,
24207 reg: regInfo{
24208 inputs: []inputInfo{
24209 {0, 4611686019501129724},
24210 {1, 4611686017353646080},
24211 },
24212 },
24213 },
24214 {
24215 name: "MOVDstore",
24216 auxType: auxSymOff,
24217 argLen: 3,
24218 faultOnNilArg0: true,
24219 symEffect: SymWrite,
24220 asm: loong64.AMOVD,
24221 reg: regInfo{
24222 inputs: []inputInfo{
24223 {0, 4611686019501129724},
24224 {1, 4611686017353646080},
24225 },
24226 },
24227 },
24228 {
24229 name: "MOVBstorezero",
24230 auxType: auxSymOff,
24231 argLen: 2,
24232 faultOnNilArg0: true,
24233 symEffect: SymWrite,
24234 asm: loong64.AMOVB,
24235 reg: regInfo{
24236 inputs: []inputInfo{
24237 {0, 4611686019501129724},
24238 },
24239 },
24240 },
24241 {
24242 name: "MOVHstorezero",
24243 auxType: auxSymOff,
24244 argLen: 2,
24245 faultOnNilArg0: true,
24246 symEffect: SymWrite,
24247 asm: loong64.AMOVH,
24248 reg: regInfo{
24249 inputs: []inputInfo{
24250 {0, 4611686019501129724},
24251 },
24252 },
24253 },
24254 {
24255 name: "MOVWstorezero",
24256 auxType: auxSymOff,
24257 argLen: 2,
24258 faultOnNilArg0: true,
24259 symEffect: SymWrite,
24260 asm: loong64.AMOVW,
24261 reg: regInfo{
24262 inputs: []inputInfo{
24263 {0, 4611686019501129724},
24264 },
24265 },
24266 },
24267 {
24268 name: "MOVVstorezero",
24269 auxType: auxSymOff,
24270 argLen: 2,
24271 faultOnNilArg0: true,
24272 symEffect: SymWrite,
24273 asm: loong64.AMOVV,
24274 reg: regInfo{
24275 inputs: []inputInfo{
24276 {0, 4611686019501129724},
24277 },
24278 },
24279 },
24280 {
24281 name: "MOVBreg",
24282 argLen: 1,
24283 asm: loong64.AMOVB,
24284 reg: regInfo{
24285 inputs: []inputInfo{
24286 {0, 1073741816},
24287 },
24288 outputs: []outputInfo{
24289 {0, 1071644664},
24290 },
24291 },
24292 },
24293 {
24294 name: "MOVBUreg",
24295 argLen: 1,
24296 asm: loong64.AMOVBU,
24297 reg: regInfo{
24298 inputs: []inputInfo{
24299 {0, 1073741816},
24300 },
24301 outputs: []outputInfo{
24302 {0, 1071644664},
24303 },
24304 },
24305 },
24306 {
24307 name: "MOVHreg",
24308 argLen: 1,
24309 asm: loong64.AMOVH,
24310 reg: regInfo{
24311 inputs: []inputInfo{
24312 {0, 1073741816},
24313 },
24314 outputs: []outputInfo{
24315 {0, 1071644664},
24316 },
24317 },
24318 },
24319 {
24320 name: "MOVHUreg",
24321 argLen: 1,
24322 asm: loong64.AMOVHU,
24323 reg: regInfo{
24324 inputs: []inputInfo{
24325 {0, 1073741816},
24326 },
24327 outputs: []outputInfo{
24328 {0, 1071644664},
24329 },
24330 },
24331 },
24332 {
24333 name: "MOVWreg",
24334 argLen: 1,
24335 asm: loong64.AMOVW,
24336 reg: regInfo{
24337 inputs: []inputInfo{
24338 {0, 1073741816},
24339 },
24340 outputs: []outputInfo{
24341 {0, 1071644664},
24342 },
24343 },
24344 },
24345 {
24346 name: "MOVWUreg",
24347 argLen: 1,
24348 asm: loong64.AMOVWU,
24349 reg: regInfo{
24350 inputs: []inputInfo{
24351 {0, 1073741816},
24352 },
24353 outputs: []outputInfo{
24354 {0, 1071644664},
24355 },
24356 },
24357 },
24358 {
24359 name: "MOVVreg",
24360 argLen: 1,
24361 asm: loong64.AMOVV,
24362 reg: regInfo{
24363 inputs: []inputInfo{
24364 {0, 1073741816},
24365 },
24366 outputs: []outputInfo{
24367 {0, 1071644664},
24368 },
24369 },
24370 },
24371 {
24372 name: "MOVVnop",
24373 argLen: 1,
24374 resultInArg0: true,
24375 reg: regInfo{
24376 inputs: []inputInfo{
24377 {0, 1071644664},
24378 },
24379 outputs: []outputInfo{
24380 {0, 1071644664},
24381 },
24382 },
24383 },
24384 {
24385 name: "MOVWF",
24386 argLen: 1,
24387 asm: loong64.AMOVWF,
24388 reg: regInfo{
24389 inputs: []inputInfo{
24390 {0, 4611686017353646080},
24391 },
24392 outputs: []outputInfo{
24393 {0, 4611686017353646080},
24394 },
24395 },
24396 },
24397 {
24398 name: "MOVWD",
24399 argLen: 1,
24400 asm: loong64.AMOVWD,
24401 reg: regInfo{
24402 inputs: []inputInfo{
24403 {0, 4611686017353646080},
24404 },
24405 outputs: []outputInfo{
24406 {0, 4611686017353646080},
24407 },
24408 },
24409 },
24410 {
24411 name: "MOVVF",
24412 argLen: 1,
24413 asm: loong64.AMOVVF,
24414 reg: regInfo{
24415 inputs: []inputInfo{
24416 {0, 4611686017353646080},
24417 },
24418 outputs: []outputInfo{
24419 {0, 4611686017353646080},
24420 },
24421 },
24422 },
24423 {
24424 name: "MOVVD",
24425 argLen: 1,
24426 asm: loong64.AMOVVD,
24427 reg: regInfo{
24428 inputs: []inputInfo{
24429 {0, 4611686017353646080},
24430 },
24431 outputs: []outputInfo{
24432 {0, 4611686017353646080},
24433 },
24434 },
24435 },
24436 {
24437 name: "TRUNCFW",
24438 argLen: 1,
24439 asm: loong64.ATRUNCFW,
24440 reg: regInfo{
24441 inputs: []inputInfo{
24442 {0, 4611686017353646080},
24443 },
24444 outputs: []outputInfo{
24445 {0, 4611686017353646080},
24446 },
24447 },
24448 },
24449 {
24450 name: "TRUNCDW",
24451 argLen: 1,
24452 asm: loong64.ATRUNCDW,
24453 reg: regInfo{
24454 inputs: []inputInfo{
24455 {0, 4611686017353646080},
24456 },
24457 outputs: []outputInfo{
24458 {0, 4611686017353646080},
24459 },
24460 },
24461 },
24462 {
24463 name: "TRUNCFV",
24464 argLen: 1,
24465 asm: loong64.ATRUNCFV,
24466 reg: regInfo{
24467 inputs: []inputInfo{
24468 {0, 4611686017353646080},
24469 },
24470 outputs: []outputInfo{
24471 {0, 4611686017353646080},
24472 },
24473 },
24474 },
24475 {
24476 name: "TRUNCDV",
24477 argLen: 1,
24478 asm: loong64.ATRUNCDV,
24479 reg: regInfo{
24480 inputs: []inputInfo{
24481 {0, 4611686017353646080},
24482 },
24483 outputs: []outputInfo{
24484 {0, 4611686017353646080},
24485 },
24486 },
24487 },
24488 {
24489 name: "MOVFD",
24490 argLen: 1,
24491 asm: loong64.AMOVFD,
24492 reg: regInfo{
24493 inputs: []inputInfo{
24494 {0, 4611686017353646080},
24495 },
24496 outputs: []outputInfo{
24497 {0, 4611686017353646080},
24498 },
24499 },
24500 },
24501 {
24502 name: "MOVDF",
24503 argLen: 1,
24504 asm: loong64.AMOVDF,
24505 reg: regInfo{
24506 inputs: []inputInfo{
24507 {0, 4611686017353646080},
24508 },
24509 outputs: []outputInfo{
24510 {0, 4611686017353646080},
24511 },
24512 },
24513 },
24514 {
24515 name: "CALLstatic",
24516 auxType: auxCallOff,
24517 argLen: -1,
24518 clobberFlags: true,
24519 call: true,
24520 reg: regInfo{
24521 clobbers: 4611686018427387896,
24522 },
24523 },
24524 {
24525 name: "CALLtail",
24526 auxType: auxCallOff,
24527 argLen: -1,
24528 clobberFlags: true,
24529 call: true,
24530 tailCall: true,
24531 reg: regInfo{
24532 clobbers: 4611686018427387896,
24533 },
24534 },
24535 {
24536 name: "CALLclosure",
24537 auxType: auxCallOff,
24538 argLen: -1,
24539 clobberFlags: true,
24540 call: true,
24541 reg: regInfo{
24542 inputs: []inputInfo{
24543 {1, 268435456},
24544 {0, 1071644668},
24545 },
24546 clobbers: 4611686018427387896,
24547 },
24548 },
24549 {
24550 name: "CALLinter",
24551 auxType: auxCallOff,
24552 argLen: -1,
24553 clobberFlags: true,
24554 call: true,
24555 reg: regInfo{
24556 inputs: []inputInfo{
24557 {0, 1071644664},
24558 },
24559 clobbers: 4611686018427387896,
24560 },
24561 },
24562 {
24563 name: "DUFFZERO",
24564 auxType: auxInt64,
24565 argLen: 2,
24566 faultOnNilArg0: true,
24567 reg: regInfo{
24568 inputs: []inputInfo{
24569 {0, 524288},
24570 },
24571 clobbers: 524290,
24572 },
24573 },
24574 {
24575 name: "DUFFCOPY",
24576 auxType: auxInt64,
24577 argLen: 3,
24578 faultOnNilArg0: true,
24579 faultOnNilArg1: true,
24580 reg: regInfo{
24581 inputs: []inputInfo{
24582 {0, 1048576},
24583 {1, 524288},
24584 },
24585 clobbers: 1572866,
24586 },
24587 },
24588 {
24589 name: "LoweredZero",
24590 auxType: auxInt64,
24591 argLen: 3,
24592 faultOnNilArg0: true,
24593 reg: regInfo{
24594 inputs: []inputInfo{
24595 {0, 524288},
24596 {1, 1071644664},
24597 },
24598 clobbers: 524288,
24599 },
24600 },
24601 {
24602 name: "LoweredMove",
24603 auxType: auxInt64,
24604 argLen: 4,
24605 faultOnNilArg0: true,
24606 faultOnNilArg1: true,
24607 reg: regInfo{
24608 inputs: []inputInfo{
24609 {0, 1048576},
24610 {1, 524288},
24611 {2, 1071644664},
24612 },
24613 clobbers: 1572864,
24614 },
24615 },
24616 {
24617 name: "LoweredAtomicLoad8",
24618 argLen: 2,
24619 faultOnNilArg0: true,
24620 reg: regInfo{
24621 inputs: []inputInfo{
24622 {0, 4611686019501129724},
24623 },
24624 outputs: []outputInfo{
24625 {0, 1071644664},
24626 },
24627 },
24628 },
24629 {
24630 name: "LoweredAtomicLoad32",
24631 argLen: 2,
24632 faultOnNilArg0: true,
24633 reg: regInfo{
24634 inputs: []inputInfo{
24635 {0, 4611686019501129724},
24636 },
24637 outputs: []outputInfo{
24638 {0, 1071644664},
24639 },
24640 },
24641 },
24642 {
24643 name: "LoweredAtomicLoad64",
24644 argLen: 2,
24645 faultOnNilArg0: true,
24646 reg: regInfo{
24647 inputs: []inputInfo{
24648 {0, 4611686019501129724},
24649 },
24650 outputs: []outputInfo{
24651 {0, 1071644664},
24652 },
24653 },
24654 },
24655 {
24656 name: "LoweredAtomicStore8",
24657 argLen: 3,
24658 faultOnNilArg0: true,
24659 hasSideEffects: true,
24660 reg: regInfo{
24661 inputs: []inputInfo{
24662 {1, 1073741816},
24663 {0, 4611686019501129724},
24664 },
24665 },
24666 },
24667 {
24668 name: "LoweredAtomicStore32",
24669 argLen: 3,
24670 faultOnNilArg0: true,
24671 hasSideEffects: true,
24672 reg: regInfo{
24673 inputs: []inputInfo{
24674 {1, 1073741816},
24675 {0, 4611686019501129724},
24676 },
24677 },
24678 },
24679 {
24680 name: "LoweredAtomicStore64",
24681 argLen: 3,
24682 faultOnNilArg0: true,
24683 hasSideEffects: true,
24684 reg: regInfo{
24685 inputs: []inputInfo{
24686 {1, 1073741816},
24687 {0, 4611686019501129724},
24688 },
24689 },
24690 },
24691 {
24692 name: "LoweredAtomicStorezero32",
24693 argLen: 2,
24694 faultOnNilArg0: true,
24695 hasSideEffects: true,
24696 reg: regInfo{
24697 inputs: []inputInfo{
24698 {0, 4611686019501129724},
24699 },
24700 },
24701 },
24702 {
24703 name: "LoweredAtomicStorezero64",
24704 argLen: 2,
24705 faultOnNilArg0: true,
24706 hasSideEffects: true,
24707 reg: regInfo{
24708 inputs: []inputInfo{
24709 {0, 4611686019501129724},
24710 },
24711 },
24712 },
24713 {
24714 name: "LoweredAtomicExchange32",
24715 argLen: 3,
24716 resultNotInArgs: true,
24717 faultOnNilArg0: true,
24718 hasSideEffects: true,
24719 unsafePoint: true,
24720 reg: regInfo{
24721 inputs: []inputInfo{
24722 {1, 1073741816},
24723 {0, 4611686019501129724},
24724 },
24725 outputs: []outputInfo{
24726 {0, 1071644664},
24727 },
24728 },
24729 },
24730 {
24731 name: "LoweredAtomicExchange64",
24732 argLen: 3,
24733 resultNotInArgs: true,
24734 faultOnNilArg0: true,
24735 hasSideEffects: true,
24736 unsafePoint: true,
24737 reg: regInfo{
24738 inputs: []inputInfo{
24739 {1, 1073741816},
24740 {0, 4611686019501129724},
24741 },
24742 outputs: []outputInfo{
24743 {0, 1071644664},
24744 },
24745 },
24746 },
24747 {
24748 name: "LoweredAtomicAdd32",
24749 argLen: 3,
24750 resultNotInArgs: true,
24751 faultOnNilArg0: true,
24752 hasSideEffects: true,
24753 unsafePoint: true,
24754 reg: regInfo{
24755 inputs: []inputInfo{
24756 {1, 1073741816},
24757 {0, 4611686019501129724},
24758 },
24759 outputs: []outputInfo{
24760 {0, 1071644664},
24761 },
24762 },
24763 },
24764 {
24765 name: "LoweredAtomicAdd64",
24766 argLen: 3,
24767 resultNotInArgs: true,
24768 faultOnNilArg0: true,
24769 hasSideEffects: true,
24770 unsafePoint: true,
24771 reg: regInfo{
24772 inputs: []inputInfo{
24773 {1, 1073741816},
24774 {0, 4611686019501129724},
24775 },
24776 outputs: []outputInfo{
24777 {0, 1071644664},
24778 },
24779 },
24780 },
24781 {
24782 name: "LoweredAtomicAddconst32",
24783 auxType: auxInt32,
24784 argLen: 2,
24785 resultNotInArgs: true,
24786 faultOnNilArg0: true,
24787 hasSideEffects: true,
24788 unsafePoint: true,
24789 reg: regInfo{
24790 inputs: []inputInfo{
24791 {0, 4611686019501129724},
24792 },
24793 outputs: []outputInfo{
24794 {0, 1071644664},
24795 },
24796 },
24797 },
24798 {
24799 name: "LoweredAtomicAddconst64",
24800 auxType: auxInt64,
24801 argLen: 2,
24802 resultNotInArgs: true,
24803 faultOnNilArg0: true,
24804 hasSideEffects: true,
24805 unsafePoint: true,
24806 reg: regInfo{
24807 inputs: []inputInfo{
24808 {0, 4611686019501129724},
24809 },
24810 outputs: []outputInfo{
24811 {0, 1071644664},
24812 },
24813 },
24814 },
24815 {
24816 name: "LoweredAtomicCas32",
24817 argLen: 4,
24818 resultNotInArgs: true,
24819 faultOnNilArg0: true,
24820 hasSideEffects: true,
24821 unsafePoint: true,
24822 reg: regInfo{
24823 inputs: []inputInfo{
24824 {1, 1073741816},
24825 {2, 1073741816},
24826 {0, 4611686019501129724},
24827 },
24828 outputs: []outputInfo{
24829 {0, 1071644664},
24830 },
24831 },
24832 },
24833 {
24834 name: "LoweredAtomicCas64",
24835 argLen: 4,
24836 resultNotInArgs: true,
24837 faultOnNilArg0: true,
24838 hasSideEffects: true,
24839 unsafePoint: true,
24840 reg: regInfo{
24841 inputs: []inputInfo{
24842 {1, 1073741816},
24843 {2, 1073741816},
24844 {0, 4611686019501129724},
24845 },
24846 outputs: []outputInfo{
24847 {0, 1071644664},
24848 },
24849 },
24850 },
24851 {
24852 name: "LoweredNilCheck",
24853 argLen: 2,
24854 nilCheck: true,
24855 faultOnNilArg0: true,
24856 reg: regInfo{
24857 inputs: []inputInfo{
24858 {0, 1073741816},
24859 },
24860 },
24861 },
24862 {
24863 name: "FPFlagTrue",
24864 argLen: 1,
24865 reg: regInfo{
24866 outputs: []outputInfo{
24867 {0, 1071644664},
24868 },
24869 },
24870 },
24871 {
24872 name: "FPFlagFalse",
24873 argLen: 1,
24874 reg: regInfo{
24875 outputs: []outputInfo{
24876 {0, 1071644664},
24877 },
24878 },
24879 },
24880 {
24881 name: "LoweredGetClosurePtr",
24882 argLen: 0,
24883 zeroWidth: true,
24884 reg: regInfo{
24885 outputs: []outputInfo{
24886 {0, 268435456},
24887 },
24888 },
24889 },
24890 {
24891 name: "LoweredGetCallerSP",
24892 argLen: 1,
24893 rematerializeable: true,
24894 reg: regInfo{
24895 outputs: []outputInfo{
24896 {0, 1071644664},
24897 },
24898 },
24899 },
24900 {
24901 name: "LoweredGetCallerPC",
24902 argLen: 0,
24903 rematerializeable: true,
24904 reg: regInfo{
24905 outputs: []outputInfo{
24906 {0, 1071644664},
24907 },
24908 },
24909 },
24910 {
24911 name: "LoweredWB",
24912 auxType: auxInt64,
24913 argLen: 1,
24914 clobberFlags: true,
24915 reg: regInfo{
24916 clobbers: 4611686017353646082,
24917 outputs: []outputInfo{
24918 {0, 268435456},
24919 },
24920 },
24921 },
24922 {
24923 name: "LoweredPanicBoundsA",
24924 auxType: auxInt64,
24925 argLen: 3,
24926 call: true,
24927 reg: regInfo{
24928 inputs: []inputInfo{
24929 {0, 4194304},
24930 {1, 8388608},
24931 },
24932 },
24933 },
24934 {
24935 name: "LoweredPanicBoundsB",
24936 auxType: auxInt64,
24937 argLen: 3,
24938 call: true,
24939 reg: regInfo{
24940 inputs: []inputInfo{
24941 {0, 1048576},
24942 {1, 4194304},
24943 },
24944 },
24945 },
24946 {
24947 name: "LoweredPanicBoundsC",
24948 auxType: auxInt64,
24949 argLen: 3,
24950 call: true,
24951 reg: regInfo{
24952 inputs: []inputInfo{
24953 {0, 524288},
24954 {1, 1048576},
24955 },
24956 },
24957 },
24958
24959 {
24960 name: "ADD",
24961 argLen: 2,
24962 commutative: true,
24963 asm: mips.AADDU,
24964 reg: regInfo{
24965 inputs: []inputInfo{
24966 {0, 469762046},
24967 {1, 469762046},
24968 },
24969 outputs: []outputInfo{
24970 {0, 335544318},
24971 },
24972 },
24973 },
24974 {
24975 name: "ADDconst",
24976 auxType: auxInt32,
24977 argLen: 1,
24978 asm: mips.AADDU,
24979 reg: regInfo{
24980 inputs: []inputInfo{
24981 {0, 536870910},
24982 },
24983 outputs: []outputInfo{
24984 {0, 335544318},
24985 },
24986 },
24987 },
24988 {
24989 name: "SUB",
24990 argLen: 2,
24991 asm: mips.ASUBU,
24992 reg: regInfo{
24993 inputs: []inputInfo{
24994 {0, 469762046},
24995 {1, 469762046},
24996 },
24997 outputs: []outputInfo{
24998 {0, 335544318},
24999 },
25000 },
25001 },
25002 {
25003 name: "SUBconst",
25004 auxType: auxInt32,
25005 argLen: 1,
25006 asm: mips.ASUBU,
25007 reg: regInfo{
25008 inputs: []inputInfo{
25009 {0, 469762046},
25010 },
25011 outputs: []outputInfo{
25012 {0, 335544318},
25013 },
25014 },
25015 },
25016 {
25017 name: "MUL",
25018 argLen: 2,
25019 commutative: true,
25020 asm: mips.AMUL,
25021 reg: regInfo{
25022 inputs: []inputInfo{
25023 {0, 469762046},
25024 {1, 469762046},
25025 },
25026 clobbers: 105553116266496,
25027 outputs: []outputInfo{
25028 {0, 335544318},
25029 },
25030 },
25031 },
25032 {
25033 name: "MULT",
25034 argLen: 2,
25035 commutative: true,
25036 asm: mips.AMUL,
25037 reg: regInfo{
25038 inputs: []inputInfo{
25039 {0, 469762046},
25040 {1, 469762046},
25041 },
25042 outputs: []outputInfo{
25043 {0, 35184372088832},
25044 {1, 70368744177664},
25045 },
25046 },
25047 },
25048 {
25049 name: "MULTU",
25050 argLen: 2,
25051 commutative: true,
25052 asm: mips.AMULU,
25053 reg: regInfo{
25054 inputs: []inputInfo{
25055 {0, 469762046},
25056 {1, 469762046},
25057 },
25058 outputs: []outputInfo{
25059 {0, 35184372088832},
25060 {1, 70368744177664},
25061 },
25062 },
25063 },
25064 {
25065 name: "DIV",
25066 argLen: 2,
25067 asm: mips.ADIV,
25068 reg: regInfo{
25069 inputs: []inputInfo{
25070 {0, 469762046},
25071 {1, 469762046},
25072 },
25073 outputs: []outputInfo{
25074 {0, 35184372088832},
25075 {1, 70368744177664},
25076 },
25077 },
25078 },
25079 {
25080 name: "DIVU",
25081 argLen: 2,
25082 asm: mips.ADIVU,
25083 reg: regInfo{
25084 inputs: []inputInfo{
25085 {0, 469762046},
25086 {1, 469762046},
25087 },
25088 outputs: []outputInfo{
25089 {0, 35184372088832},
25090 {1, 70368744177664},
25091 },
25092 },
25093 },
25094 {
25095 name: "ADDF",
25096 argLen: 2,
25097 commutative: true,
25098 asm: mips.AADDF,
25099 reg: regInfo{
25100 inputs: []inputInfo{
25101 {0, 35183835217920},
25102 {1, 35183835217920},
25103 },
25104 outputs: []outputInfo{
25105 {0, 35183835217920},
25106 },
25107 },
25108 },
25109 {
25110 name: "ADDD",
25111 argLen: 2,
25112 commutative: true,
25113 asm: mips.AADDD,
25114 reg: regInfo{
25115 inputs: []inputInfo{
25116 {0, 35183835217920},
25117 {1, 35183835217920},
25118 },
25119 outputs: []outputInfo{
25120 {0, 35183835217920},
25121 },
25122 },
25123 },
25124 {
25125 name: "SUBF",
25126 argLen: 2,
25127 asm: mips.ASUBF,
25128 reg: regInfo{
25129 inputs: []inputInfo{
25130 {0, 35183835217920},
25131 {1, 35183835217920},
25132 },
25133 outputs: []outputInfo{
25134 {0, 35183835217920},
25135 },
25136 },
25137 },
25138 {
25139 name: "SUBD",
25140 argLen: 2,
25141 asm: mips.ASUBD,
25142 reg: regInfo{
25143 inputs: []inputInfo{
25144 {0, 35183835217920},
25145 {1, 35183835217920},
25146 },
25147 outputs: []outputInfo{
25148 {0, 35183835217920},
25149 },
25150 },
25151 },
25152 {
25153 name: "MULF",
25154 argLen: 2,
25155 commutative: true,
25156 asm: mips.AMULF,
25157 reg: regInfo{
25158 inputs: []inputInfo{
25159 {0, 35183835217920},
25160 {1, 35183835217920},
25161 },
25162 outputs: []outputInfo{
25163 {0, 35183835217920},
25164 },
25165 },
25166 },
25167 {
25168 name: "MULD",
25169 argLen: 2,
25170 commutative: true,
25171 asm: mips.AMULD,
25172 reg: regInfo{
25173 inputs: []inputInfo{
25174 {0, 35183835217920},
25175 {1, 35183835217920},
25176 },
25177 outputs: []outputInfo{
25178 {0, 35183835217920},
25179 },
25180 },
25181 },
25182 {
25183 name: "DIVF",
25184 argLen: 2,
25185 asm: mips.ADIVF,
25186 reg: regInfo{
25187 inputs: []inputInfo{
25188 {0, 35183835217920},
25189 {1, 35183835217920},
25190 },
25191 outputs: []outputInfo{
25192 {0, 35183835217920},
25193 },
25194 },
25195 },
25196 {
25197 name: "DIVD",
25198 argLen: 2,
25199 asm: mips.ADIVD,
25200 reg: regInfo{
25201 inputs: []inputInfo{
25202 {0, 35183835217920},
25203 {1, 35183835217920},
25204 },
25205 outputs: []outputInfo{
25206 {0, 35183835217920},
25207 },
25208 },
25209 },
25210 {
25211 name: "AND",
25212 argLen: 2,
25213 commutative: true,
25214 asm: mips.AAND,
25215 reg: regInfo{
25216 inputs: []inputInfo{
25217 {0, 469762046},
25218 {1, 469762046},
25219 },
25220 outputs: []outputInfo{
25221 {0, 335544318},
25222 },
25223 },
25224 },
25225 {
25226 name: "ANDconst",
25227 auxType: auxInt32,
25228 argLen: 1,
25229 asm: mips.AAND,
25230 reg: regInfo{
25231 inputs: []inputInfo{
25232 {0, 469762046},
25233 },
25234 outputs: []outputInfo{
25235 {0, 335544318},
25236 },
25237 },
25238 },
25239 {
25240 name: "OR",
25241 argLen: 2,
25242 commutative: true,
25243 asm: mips.AOR,
25244 reg: regInfo{
25245 inputs: []inputInfo{
25246 {0, 469762046},
25247 {1, 469762046},
25248 },
25249 outputs: []outputInfo{
25250 {0, 335544318},
25251 },
25252 },
25253 },
25254 {
25255 name: "ORconst",
25256 auxType: auxInt32,
25257 argLen: 1,
25258 asm: mips.AOR,
25259 reg: regInfo{
25260 inputs: []inputInfo{
25261 {0, 469762046},
25262 },
25263 outputs: []outputInfo{
25264 {0, 335544318},
25265 },
25266 },
25267 },
25268 {
25269 name: "XOR",
25270 argLen: 2,
25271 commutative: true,
25272 asm: mips.AXOR,
25273 reg: regInfo{
25274 inputs: []inputInfo{
25275 {0, 469762046},
25276 {1, 469762046},
25277 },
25278 outputs: []outputInfo{
25279 {0, 335544318},
25280 },
25281 },
25282 },
25283 {
25284 name: "XORconst",
25285 auxType: auxInt32,
25286 argLen: 1,
25287 asm: mips.AXOR,
25288 reg: regInfo{
25289 inputs: []inputInfo{
25290 {0, 469762046},
25291 },
25292 outputs: []outputInfo{
25293 {0, 335544318},
25294 },
25295 },
25296 },
25297 {
25298 name: "NOR",
25299 argLen: 2,
25300 commutative: true,
25301 asm: mips.ANOR,
25302 reg: regInfo{
25303 inputs: []inputInfo{
25304 {0, 469762046},
25305 {1, 469762046},
25306 },
25307 outputs: []outputInfo{
25308 {0, 335544318},
25309 },
25310 },
25311 },
25312 {
25313 name: "NORconst",
25314 auxType: auxInt32,
25315 argLen: 1,
25316 asm: mips.ANOR,
25317 reg: regInfo{
25318 inputs: []inputInfo{
25319 {0, 469762046},
25320 },
25321 outputs: []outputInfo{
25322 {0, 335544318},
25323 },
25324 },
25325 },
25326 {
25327 name: "NEG",
25328 argLen: 1,
25329 reg: regInfo{
25330 inputs: []inputInfo{
25331 {0, 469762046},
25332 },
25333 outputs: []outputInfo{
25334 {0, 335544318},
25335 },
25336 },
25337 },
25338 {
25339 name: "NEGF",
25340 argLen: 1,
25341 asm: mips.ANEGF,
25342 reg: regInfo{
25343 inputs: []inputInfo{
25344 {0, 35183835217920},
25345 },
25346 outputs: []outputInfo{
25347 {0, 35183835217920},
25348 },
25349 },
25350 },
25351 {
25352 name: "NEGD",
25353 argLen: 1,
25354 asm: mips.ANEGD,
25355 reg: regInfo{
25356 inputs: []inputInfo{
25357 {0, 35183835217920},
25358 },
25359 outputs: []outputInfo{
25360 {0, 35183835217920},
25361 },
25362 },
25363 },
25364 {
25365 name: "ABSD",
25366 argLen: 1,
25367 asm: mips.AABSD,
25368 reg: regInfo{
25369 inputs: []inputInfo{
25370 {0, 35183835217920},
25371 },
25372 outputs: []outputInfo{
25373 {0, 35183835217920},
25374 },
25375 },
25376 },
25377 {
25378 name: "SQRTD",
25379 argLen: 1,
25380 asm: mips.ASQRTD,
25381 reg: regInfo{
25382 inputs: []inputInfo{
25383 {0, 35183835217920},
25384 },
25385 outputs: []outputInfo{
25386 {0, 35183835217920},
25387 },
25388 },
25389 },
25390 {
25391 name: "SQRTF",
25392 argLen: 1,
25393 asm: mips.ASQRTF,
25394 reg: regInfo{
25395 inputs: []inputInfo{
25396 {0, 35183835217920},
25397 },
25398 outputs: []outputInfo{
25399 {0, 35183835217920},
25400 },
25401 },
25402 },
25403 {
25404 name: "SLL",
25405 argLen: 2,
25406 asm: mips.ASLL,
25407 reg: regInfo{
25408 inputs: []inputInfo{
25409 {0, 469762046},
25410 {1, 469762046},
25411 },
25412 outputs: []outputInfo{
25413 {0, 335544318},
25414 },
25415 },
25416 },
25417 {
25418 name: "SLLconst",
25419 auxType: auxInt32,
25420 argLen: 1,
25421 asm: mips.ASLL,
25422 reg: regInfo{
25423 inputs: []inputInfo{
25424 {0, 469762046},
25425 },
25426 outputs: []outputInfo{
25427 {0, 335544318},
25428 },
25429 },
25430 },
25431 {
25432 name: "SRL",
25433 argLen: 2,
25434 asm: mips.ASRL,
25435 reg: regInfo{
25436 inputs: []inputInfo{
25437 {0, 469762046},
25438 {1, 469762046},
25439 },
25440 outputs: []outputInfo{
25441 {0, 335544318},
25442 },
25443 },
25444 },
25445 {
25446 name: "SRLconst",
25447 auxType: auxInt32,
25448 argLen: 1,
25449 asm: mips.ASRL,
25450 reg: regInfo{
25451 inputs: []inputInfo{
25452 {0, 469762046},
25453 },
25454 outputs: []outputInfo{
25455 {0, 335544318},
25456 },
25457 },
25458 },
25459 {
25460 name: "SRA",
25461 argLen: 2,
25462 asm: mips.ASRA,
25463 reg: regInfo{
25464 inputs: []inputInfo{
25465 {0, 469762046},
25466 {1, 469762046},
25467 },
25468 outputs: []outputInfo{
25469 {0, 335544318},
25470 },
25471 },
25472 },
25473 {
25474 name: "SRAconst",
25475 auxType: auxInt32,
25476 argLen: 1,
25477 asm: mips.ASRA,
25478 reg: regInfo{
25479 inputs: []inputInfo{
25480 {0, 469762046},
25481 },
25482 outputs: []outputInfo{
25483 {0, 335544318},
25484 },
25485 },
25486 },
25487 {
25488 name: "CLZ",
25489 argLen: 1,
25490 asm: mips.ACLZ,
25491 reg: regInfo{
25492 inputs: []inputInfo{
25493 {0, 469762046},
25494 },
25495 outputs: []outputInfo{
25496 {0, 335544318},
25497 },
25498 },
25499 },
25500 {
25501 name: "SGT",
25502 argLen: 2,
25503 asm: mips.ASGT,
25504 reg: regInfo{
25505 inputs: []inputInfo{
25506 {0, 469762046},
25507 {1, 469762046},
25508 },
25509 outputs: []outputInfo{
25510 {0, 335544318},
25511 },
25512 },
25513 },
25514 {
25515 name: "SGTconst",
25516 auxType: auxInt32,
25517 argLen: 1,
25518 asm: mips.ASGT,
25519 reg: regInfo{
25520 inputs: []inputInfo{
25521 {0, 469762046},
25522 },
25523 outputs: []outputInfo{
25524 {0, 335544318},
25525 },
25526 },
25527 },
25528 {
25529 name: "SGTzero",
25530 argLen: 1,
25531 asm: mips.ASGT,
25532 reg: regInfo{
25533 inputs: []inputInfo{
25534 {0, 469762046},
25535 },
25536 outputs: []outputInfo{
25537 {0, 335544318},
25538 },
25539 },
25540 },
25541 {
25542 name: "SGTU",
25543 argLen: 2,
25544 asm: mips.ASGTU,
25545 reg: regInfo{
25546 inputs: []inputInfo{
25547 {0, 469762046},
25548 {1, 469762046},
25549 },
25550 outputs: []outputInfo{
25551 {0, 335544318},
25552 },
25553 },
25554 },
25555 {
25556 name: "SGTUconst",
25557 auxType: auxInt32,
25558 argLen: 1,
25559 asm: mips.ASGTU,
25560 reg: regInfo{
25561 inputs: []inputInfo{
25562 {0, 469762046},
25563 },
25564 outputs: []outputInfo{
25565 {0, 335544318},
25566 },
25567 },
25568 },
25569 {
25570 name: "SGTUzero",
25571 argLen: 1,
25572 asm: mips.ASGTU,
25573 reg: regInfo{
25574 inputs: []inputInfo{
25575 {0, 469762046},
25576 },
25577 outputs: []outputInfo{
25578 {0, 335544318},
25579 },
25580 },
25581 },
25582 {
25583 name: "CMPEQF",
25584 argLen: 2,
25585 asm: mips.ACMPEQF,
25586 reg: regInfo{
25587 inputs: []inputInfo{
25588 {0, 35183835217920},
25589 {1, 35183835217920},
25590 },
25591 },
25592 },
25593 {
25594 name: "CMPEQD",
25595 argLen: 2,
25596 asm: mips.ACMPEQD,
25597 reg: regInfo{
25598 inputs: []inputInfo{
25599 {0, 35183835217920},
25600 {1, 35183835217920},
25601 },
25602 },
25603 },
25604 {
25605 name: "CMPGEF",
25606 argLen: 2,
25607 asm: mips.ACMPGEF,
25608 reg: regInfo{
25609 inputs: []inputInfo{
25610 {0, 35183835217920},
25611 {1, 35183835217920},
25612 },
25613 },
25614 },
25615 {
25616 name: "CMPGED",
25617 argLen: 2,
25618 asm: mips.ACMPGED,
25619 reg: regInfo{
25620 inputs: []inputInfo{
25621 {0, 35183835217920},
25622 {1, 35183835217920},
25623 },
25624 },
25625 },
25626 {
25627 name: "CMPGTF",
25628 argLen: 2,
25629 asm: mips.ACMPGTF,
25630 reg: regInfo{
25631 inputs: []inputInfo{
25632 {0, 35183835217920},
25633 {1, 35183835217920},
25634 },
25635 },
25636 },
25637 {
25638 name: "CMPGTD",
25639 argLen: 2,
25640 asm: mips.ACMPGTD,
25641 reg: regInfo{
25642 inputs: []inputInfo{
25643 {0, 35183835217920},
25644 {1, 35183835217920},
25645 },
25646 },
25647 },
25648 {
25649 name: "MOVWconst",
25650 auxType: auxInt32,
25651 argLen: 0,
25652 rematerializeable: true,
25653 asm: mips.AMOVW,
25654 reg: regInfo{
25655 outputs: []outputInfo{
25656 {0, 335544318},
25657 },
25658 },
25659 },
25660 {
25661 name: "MOVFconst",
25662 auxType: auxFloat32,
25663 argLen: 0,
25664 rematerializeable: true,
25665 asm: mips.AMOVF,
25666 reg: regInfo{
25667 outputs: []outputInfo{
25668 {0, 35183835217920},
25669 },
25670 },
25671 },
25672 {
25673 name: "MOVDconst",
25674 auxType: auxFloat64,
25675 argLen: 0,
25676 rematerializeable: true,
25677 asm: mips.AMOVD,
25678 reg: regInfo{
25679 outputs: []outputInfo{
25680 {0, 35183835217920},
25681 },
25682 },
25683 },
25684 {
25685 name: "MOVWaddr",
25686 auxType: auxSymOff,
25687 argLen: 1,
25688 rematerializeable: true,
25689 symEffect: SymAddr,
25690 asm: mips.AMOVW,
25691 reg: regInfo{
25692 inputs: []inputInfo{
25693 {0, 140737555464192},
25694 },
25695 outputs: []outputInfo{
25696 {0, 335544318},
25697 },
25698 },
25699 },
25700 {
25701 name: "MOVBload",
25702 auxType: auxSymOff,
25703 argLen: 2,
25704 faultOnNilArg0: true,
25705 symEffect: SymRead,
25706 asm: mips.AMOVB,
25707 reg: regInfo{
25708 inputs: []inputInfo{
25709 {0, 140738025226238},
25710 },
25711 outputs: []outputInfo{
25712 {0, 335544318},
25713 },
25714 },
25715 },
25716 {
25717 name: "MOVBUload",
25718 auxType: auxSymOff,
25719 argLen: 2,
25720 faultOnNilArg0: true,
25721 symEffect: SymRead,
25722 asm: mips.AMOVBU,
25723 reg: regInfo{
25724 inputs: []inputInfo{
25725 {0, 140738025226238},
25726 },
25727 outputs: []outputInfo{
25728 {0, 335544318},
25729 },
25730 },
25731 },
25732 {
25733 name: "MOVHload",
25734 auxType: auxSymOff,
25735 argLen: 2,
25736 faultOnNilArg0: true,
25737 symEffect: SymRead,
25738 asm: mips.AMOVH,
25739 reg: regInfo{
25740 inputs: []inputInfo{
25741 {0, 140738025226238},
25742 },
25743 outputs: []outputInfo{
25744 {0, 335544318},
25745 },
25746 },
25747 },
25748 {
25749 name: "MOVHUload",
25750 auxType: auxSymOff,
25751 argLen: 2,
25752 faultOnNilArg0: true,
25753 symEffect: SymRead,
25754 asm: mips.AMOVHU,
25755 reg: regInfo{
25756 inputs: []inputInfo{
25757 {0, 140738025226238},
25758 },
25759 outputs: []outputInfo{
25760 {0, 335544318},
25761 },
25762 },
25763 },
25764 {
25765 name: "MOVWload",
25766 auxType: auxSymOff,
25767 argLen: 2,
25768 faultOnNilArg0: true,
25769 symEffect: SymRead,
25770 asm: mips.AMOVW,
25771 reg: regInfo{
25772 inputs: []inputInfo{
25773 {0, 140738025226238},
25774 },
25775 outputs: []outputInfo{
25776 {0, 335544318},
25777 },
25778 },
25779 },
25780 {
25781 name: "MOVFload",
25782 auxType: auxSymOff,
25783 argLen: 2,
25784 faultOnNilArg0: true,
25785 symEffect: SymRead,
25786 asm: mips.AMOVF,
25787 reg: regInfo{
25788 inputs: []inputInfo{
25789 {0, 140738025226238},
25790 },
25791 outputs: []outputInfo{
25792 {0, 35183835217920},
25793 },
25794 },
25795 },
25796 {
25797 name: "MOVDload",
25798 auxType: auxSymOff,
25799 argLen: 2,
25800 faultOnNilArg0: true,
25801 symEffect: SymRead,
25802 asm: mips.AMOVD,
25803 reg: regInfo{
25804 inputs: []inputInfo{
25805 {0, 140738025226238},
25806 },
25807 outputs: []outputInfo{
25808 {0, 35183835217920},
25809 },
25810 },
25811 },
25812 {
25813 name: "MOVBstore",
25814 auxType: auxSymOff,
25815 argLen: 3,
25816 faultOnNilArg0: true,
25817 symEffect: SymWrite,
25818 asm: mips.AMOVB,
25819 reg: regInfo{
25820 inputs: []inputInfo{
25821 {1, 469762046},
25822 {0, 140738025226238},
25823 },
25824 },
25825 },
25826 {
25827 name: "MOVHstore",
25828 auxType: auxSymOff,
25829 argLen: 3,
25830 faultOnNilArg0: true,
25831 symEffect: SymWrite,
25832 asm: mips.AMOVH,
25833 reg: regInfo{
25834 inputs: []inputInfo{
25835 {1, 469762046},
25836 {0, 140738025226238},
25837 },
25838 },
25839 },
25840 {
25841 name: "MOVWstore",
25842 auxType: auxSymOff,
25843 argLen: 3,
25844 faultOnNilArg0: true,
25845 symEffect: SymWrite,
25846 asm: mips.AMOVW,
25847 reg: regInfo{
25848 inputs: []inputInfo{
25849 {1, 469762046},
25850 {0, 140738025226238},
25851 },
25852 },
25853 },
25854 {
25855 name: "MOVFstore",
25856 auxType: auxSymOff,
25857 argLen: 3,
25858 faultOnNilArg0: true,
25859 symEffect: SymWrite,
25860 asm: mips.AMOVF,
25861 reg: regInfo{
25862 inputs: []inputInfo{
25863 {1, 35183835217920},
25864 {0, 140738025226238},
25865 },
25866 },
25867 },
25868 {
25869 name: "MOVDstore",
25870 auxType: auxSymOff,
25871 argLen: 3,
25872 faultOnNilArg0: true,
25873 symEffect: SymWrite,
25874 asm: mips.AMOVD,
25875 reg: regInfo{
25876 inputs: []inputInfo{
25877 {1, 35183835217920},
25878 {0, 140738025226238},
25879 },
25880 },
25881 },
25882 {
25883 name: "MOVBstorezero",
25884 auxType: auxSymOff,
25885 argLen: 2,
25886 faultOnNilArg0: true,
25887 symEffect: SymWrite,
25888 asm: mips.AMOVB,
25889 reg: regInfo{
25890 inputs: []inputInfo{
25891 {0, 140738025226238},
25892 },
25893 },
25894 },
25895 {
25896 name: "MOVHstorezero",
25897 auxType: auxSymOff,
25898 argLen: 2,
25899 faultOnNilArg0: true,
25900 symEffect: SymWrite,
25901 asm: mips.AMOVH,
25902 reg: regInfo{
25903 inputs: []inputInfo{
25904 {0, 140738025226238},
25905 },
25906 },
25907 },
25908 {
25909 name: "MOVWstorezero",
25910 auxType: auxSymOff,
25911 argLen: 2,
25912 faultOnNilArg0: true,
25913 symEffect: SymWrite,
25914 asm: mips.AMOVW,
25915 reg: regInfo{
25916 inputs: []inputInfo{
25917 {0, 140738025226238},
25918 },
25919 },
25920 },
25921 {
25922 name: "MOVWfpgp",
25923 argLen: 1,
25924 asm: mips.AMOVW,
25925 reg: regInfo{
25926 inputs: []inputInfo{
25927 {0, 35183835217920},
25928 },
25929 outputs: []outputInfo{
25930 {0, 335544318},
25931 },
25932 },
25933 },
25934 {
25935 name: "MOVWgpfp",
25936 argLen: 1,
25937 asm: mips.AMOVW,
25938 reg: regInfo{
25939 inputs: []inputInfo{
25940 {0, 335544318},
25941 },
25942 outputs: []outputInfo{
25943 {0, 35183835217920},
25944 },
25945 },
25946 },
25947 {
25948 name: "MOVBreg",
25949 argLen: 1,
25950 asm: mips.AMOVB,
25951 reg: regInfo{
25952 inputs: []inputInfo{
25953 {0, 469762046},
25954 },
25955 outputs: []outputInfo{
25956 {0, 335544318},
25957 },
25958 },
25959 },
25960 {
25961 name: "MOVBUreg",
25962 argLen: 1,
25963 asm: mips.AMOVBU,
25964 reg: regInfo{
25965 inputs: []inputInfo{
25966 {0, 469762046},
25967 },
25968 outputs: []outputInfo{
25969 {0, 335544318},
25970 },
25971 },
25972 },
25973 {
25974 name: "MOVHreg",
25975 argLen: 1,
25976 asm: mips.AMOVH,
25977 reg: regInfo{
25978 inputs: []inputInfo{
25979 {0, 469762046},
25980 },
25981 outputs: []outputInfo{
25982 {0, 335544318},
25983 },
25984 },
25985 },
25986 {
25987 name: "MOVHUreg",
25988 argLen: 1,
25989 asm: mips.AMOVHU,
25990 reg: regInfo{
25991 inputs: []inputInfo{
25992 {0, 469762046},
25993 },
25994 outputs: []outputInfo{
25995 {0, 335544318},
25996 },
25997 },
25998 },
25999 {
26000 name: "MOVWreg",
26001 argLen: 1,
26002 asm: mips.AMOVW,
26003 reg: regInfo{
26004 inputs: []inputInfo{
26005 {0, 469762046},
26006 },
26007 outputs: []outputInfo{
26008 {0, 335544318},
26009 },
26010 },
26011 },
26012 {
26013 name: "MOVWnop",
26014 argLen: 1,
26015 resultInArg0: true,
26016 reg: regInfo{
26017 inputs: []inputInfo{
26018 {0, 335544318},
26019 },
26020 outputs: []outputInfo{
26021 {0, 335544318},
26022 },
26023 },
26024 },
26025 {
26026 name: "CMOVZ",
26027 argLen: 3,
26028 resultInArg0: true,
26029 asm: mips.ACMOVZ,
26030 reg: regInfo{
26031 inputs: []inputInfo{
26032 {0, 335544318},
26033 {1, 335544318},
26034 {2, 335544318},
26035 },
26036 outputs: []outputInfo{
26037 {0, 335544318},
26038 },
26039 },
26040 },
26041 {
26042 name: "CMOVZzero",
26043 argLen: 2,
26044 resultInArg0: true,
26045 asm: mips.ACMOVZ,
26046 reg: regInfo{
26047 inputs: []inputInfo{
26048 {0, 335544318},
26049 {1, 469762046},
26050 },
26051 outputs: []outputInfo{
26052 {0, 335544318},
26053 },
26054 },
26055 },
26056 {
26057 name: "MOVWF",
26058 argLen: 1,
26059 asm: mips.AMOVWF,
26060 reg: regInfo{
26061 inputs: []inputInfo{
26062 {0, 35183835217920},
26063 },
26064 outputs: []outputInfo{
26065 {0, 35183835217920},
26066 },
26067 },
26068 },
26069 {
26070 name: "MOVWD",
26071 argLen: 1,
26072 asm: mips.AMOVWD,
26073 reg: regInfo{
26074 inputs: []inputInfo{
26075 {0, 35183835217920},
26076 },
26077 outputs: []outputInfo{
26078 {0, 35183835217920},
26079 },
26080 },
26081 },
26082 {
26083 name: "TRUNCFW",
26084 argLen: 1,
26085 asm: mips.ATRUNCFW,
26086 reg: regInfo{
26087 inputs: []inputInfo{
26088 {0, 35183835217920},
26089 },
26090 outputs: []outputInfo{
26091 {0, 35183835217920},
26092 },
26093 },
26094 },
26095 {
26096 name: "TRUNCDW",
26097 argLen: 1,
26098 asm: mips.ATRUNCDW,
26099 reg: regInfo{
26100 inputs: []inputInfo{
26101 {0, 35183835217920},
26102 },
26103 outputs: []outputInfo{
26104 {0, 35183835217920},
26105 },
26106 },
26107 },
26108 {
26109 name: "MOVFD",
26110 argLen: 1,
26111 asm: mips.AMOVFD,
26112 reg: regInfo{
26113 inputs: []inputInfo{
26114 {0, 35183835217920},
26115 },
26116 outputs: []outputInfo{
26117 {0, 35183835217920},
26118 },
26119 },
26120 },
26121 {
26122 name: "MOVDF",
26123 argLen: 1,
26124 asm: mips.AMOVDF,
26125 reg: regInfo{
26126 inputs: []inputInfo{
26127 {0, 35183835217920},
26128 },
26129 outputs: []outputInfo{
26130 {0, 35183835217920},
26131 },
26132 },
26133 },
26134 {
26135 name: "CALLstatic",
26136 auxType: auxCallOff,
26137 argLen: 1,
26138 clobberFlags: true,
26139 call: true,
26140 reg: regInfo{
26141 clobbers: 140737421246462,
26142 },
26143 },
26144 {
26145 name: "CALLtail",
26146 auxType: auxCallOff,
26147 argLen: 1,
26148 clobberFlags: true,
26149 call: true,
26150 tailCall: true,
26151 reg: regInfo{
26152 clobbers: 140737421246462,
26153 },
26154 },
26155 {
26156 name: "CALLclosure",
26157 auxType: auxCallOff,
26158 argLen: 3,
26159 clobberFlags: true,
26160 call: true,
26161 reg: regInfo{
26162 inputs: []inputInfo{
26163 {1, 4194304},
26164 {0, 402653182},
26165 },
26166 clobbers: 140737421246462,
26167 },
26168 },
26169 {
26170 name: "CALLinter",
26171 auxType: auxCallOff,
26172 argLen: 2,
26173 clobberFlags: true,
26174 call: true,
26175 reg: regInfo{
26176 inputs: []inputInfo{
26177 {0, 335544318},
26178 },
26179 clobbers: 140737421246462,
26180 },
26181 },
26182 {
26183 name: "LoweredAtomicLoad8",
26184 argLen: 2,
26185 faultOnNilArg0: true,
26186 reg: regInfo{
26187 inputs: []inputInfo{
26188 {0, 140738025226238},
26189 },
26190 outputs: []outputInfo{
26191 {0, 335544318},
26192 },
26193 },
26194 },
26195 {
26196 name: "LoweredAtomicLoad32",
26197 argLen: 2,
26198 faultOnNilArg0: true,
26199 reg: regInfo{
26200 inputs: []inputInfo{
26201 {0, 140738025226238},
26202 },
26203 outputs: []outputInfo{
26204 {0, 335544318},
26205 },
26206 },
26207 },
26208 {
26209 name: "LoweredAtomicStore8",
26210 argLen: 3,
26211 faultOnNilArg0: true,
26212 hasSideEffects: true,
26213 reg: regInfo{
26214 inputs: []inputInfo{
26215 {1, 469762046},
26216 {0, 140738025226238},
26217 },
26218 },
26219 },
26220 {
26221 name: "LoweredAtomicStore32",
26222 argLen: 3,
26223 faultOnNilArg0: true,
26224 hasSideEffects: true,
26225 reg: regInfo{
26226 inputs: []inputInfo{
26227 {1, 469762046},
26228 {0, 140738025226238},
26229 },
26230 },
26231 },
26232 {
26233 name: "LoweredAtomicStorezero",
26234 argLen: 2,
26235 faultOnNilArg0: true,
26236 hasSideEffects: true,
26237 reg: regInfo{
26238 inputs: []inputInfo{
26239 {0, 140738025226238},
26240 },
26241 },
26242 },
26243 {
26244 name: "LoweredAtomicExchange",
26245 argLen: 3,
26246 resultNotInArgs: true,
26247 faultOnNilArg0: true,
26248 hasSideEffects: true,
26249 unsafePoint: true,
26250 reg: regInfo{
26251 inputs: []inputInfo{
26252 {1, 469762046},
26253 {0, 140738025226238},
26254 },
26255 outputs: []outputInfo{
26256 {0, 335544318},
26257 },
26258 },
26259 },
26260 {
26261 name: "LoweredAtomicAdd",
26262 argLen: 3,
26263 resultNotInArgs: true,
26264 faultOnNilArg0: true,
26265 hasSideEffects: true,
26266 unsafePoint: true,
26267 reg: regInfo{
26268 inputs: []inputInfo{
26269 {1, 469762046},
26270 {0, 140738025226238},
26271 },
26272 outputs: []outputInfo{
26273 {0, 335544318},
26274 },
26275 },
26276 },
26277 {
26278 name: "LoweredAtomicAddconst",
26279 auxType: auxInt32,
26280 argLen: 2,
26281 resultNotInArgs: true,
26282 faultOnNilArg0: true,
26283 hasSideEffects: true,
26284 unsafePoint: true,
26285 reg: regInfo{
26286 inputs: []inputInfo{
26287 {0, 140738025226238},
26288 },
26289 outputs: []outputInfo{
26290 {0, 335544318},
26291 },
26292 },
26293 },
26294 {
26295 name: "LoweredAtomicCas",
26296 argLen: 4,
26297 resultNotInArgs: true,
26298 faultOnNilArg0: true,
26299 hasSideEffects: true,
26300 unsafePoint: true,
26301 reg: regInfo{
26302 inputs: []inputInfo{
26303 {1, 469762046},
26304 {2, 469762046},
26305 {0, 140738025226238},
26306 },
26307 outputs: []outputInfo{
26308 {0, 335544318},
26309 },
26310 },
26311 },
26312 {
26313 name: "LoweredAtomicAnd",
26314 argLen: 3,
26315 faultOnNilArg0: true,
26316 hasSideEffects: true,
26317 unsafePoint: true,
26318 asm: mips.AAND,
26319 reg: regInfo{
26320 inputs: []inputInfo{
26321 {1, 469762046},
26322 {0, 140738025226238},
26323 },
26324 },
26325 },
26326 {
26327 name: "LoweredAtomicOr",
26328 argLen: 3,
26329 faultOnNilArg0: true,
26330 hasSideEffects: true,
26331 unsafePoint: true,
26332 asm: mips.AOR,
26333 reg: regInfo{
26334 inputs: []inputInfo{
26335 {1, 469762046},
26336 {0, 140738025226238},
26337 },
26338 },
26339 },
26340 {
26341 name: "LoweredZero",
26342 auxType: auxInt32,
26343 argLen: 3,
26344 faultOnNilArg0: true,
26345 reg: regInfo{
26346 inputs: []inputInfo{
26347 {0, 2},
26348 {1, 335544318},
26349 },
26350 clobbers: 2,
26351 },
26352 },
26353 {
26354 name: "LoweredMove",
26355 auxType: auxInt32,
26356 argLen: 4,
26357 faultOnNilArg0: true,
26358 faultOnNilArg1: true,
26359 reg: regInfo{
26360 inputs: []inputInfo{
26361 {0, 4},
26362 {1, 2},
26363 {2, 335544318},
26364 },
26365 clobbers: 6,
26366 },
26367 },
26368 {
26369 name: "LoweredNilCheck",
26370 argLen: 2,
26371 nilCheck: true,
26372 faultOnNilArg0: true,
26373 reg: regInfo{
26374 inputs: []inputInfo{
26375 {0, 469762046},
26376 },
26377 },
26378 },
26379 {
26380 name: "FPFlagTrue",
26381 argLen: 1,
26382 reg: regInfo{
26383 outputs: []outputInfo{
26384 {0, 335544318},
26385 },
26386 },
26387 },
26388 {
26389 name: "FPFlagFalse",
26390 argLen: 1,
26391 reg: regInfo{
26392 outputs: []outputInfo{
26393 {0, 335544318},
26394 },
26395 },
26396 },
26397 {
26398 name: "LoweredGetClosurePtr",
26399 argLen: 0,
26400 zeroWidth: true,
26401 reg: regInfo{
26402 outputs: []outputInfo{
26403 {0, 4194304},
26404 },
26405 },
26406 },
26407 {
26408 name: "LoweredGetCallerSP",
26409 argLen: 1,
26410 rematerializeable: true,
26411 reg: regInfo{
26412 outputs: []outputInfo{
26413 {0, 335544318},
26414 },
26415 },
26416 },
26417 {
26418 name: "LoweredGetCallerPC",
26419 argLen: 0,
26420 rematerializeable: true,
26421 reg: regInfo{
26422 outputs: []outputInfo{
26423 {0, 335544318},
26424 },
26425 },
26426 },
26427 {
26428 name: "LoweredWB",
26429 auxType: auxInt64,
26430 argLen: 1,
26431 clobberFlags: true,
26432 reg: regInfo{
26433 clobbers: 140737219919872,
26434 outputs: []outputInfo{
26435 {0, 16777216},
26436 },
26437 },
26438 },
26439 {
26440 name: "LoweredPanicBoundsA",
26441 auxType: auxInt64,
26442 argLen: 3,
26443 call: true,
26444 reg: regInfo{
26445 inputs: []inputInfo{
26446 {0, 8},
26447 {1, 16},
26448 },
26449 },
26450 },
26451 {
26452 name: "LoweredPanicBoundsB",
26453 auxType: auxInt64,
26454 argLen: 3,
26455 call: true,
26456 reg: regInfo{
26457 inputs: []inputInfo{
26458 {0, 4},
26459 {1, 8},
26460 },
26461 },
26462 },
26463 {
26464 name: "LoweredPanicBoundsC",
26465 auxType: auxInt64,
26466 argLen: 3,
26467 call: true,
26468 reg: regInfo{
26469 inputs: []inputInfo{
26470 {0, 2},
26471 {1, 4},
26472 },
26473 },
26474 },
26475 {
26476 name: "LoweredPanicExtendA",
26477 auxType: auxInt64,
26478 argLen: 4,
26479 call: true,
26480 reg: regInfo{
26481 inputs: []inputInfo{
26482 {0, 32},
26483 {1, 8},
26484 {2, 16},
26485 },
26486 },
26487 },
26488 {
26489 name: "LoweredPanicExtendB",
26490 auxType: auxInt64,
26491 argLen: 4,
26492 call: true,
26493 reg: regInfo{
26494 inputs: []inputInfo{
26495 {0, 32},
26496 {1, 4},
26497 {2, 8},
26498 },
26499 },
26500 },
26501 {
26502 name: "LoweredPanicExtendC",
26503 auxType: auxInt64,
26504 argLen: 4,
26505 call: true,
26506 reg: regInfo{
26507 inputs: []inputInfo{
26508 {0, 32},
26509 {1, 2},
26510 {2, 4},
26511 },
26512 },
26513 },
26514
26515 {
26516 name: "ADDV",
26517 argLen: 2,
26518 commutative: true,
26519 asm: mips.AADDVU,
26520 reg: regInfo{
26521 inputs: []inputInfo{
26522 {0, 234881022},
26523 {1, 234881022},
26524 },
26525 outputs: []outputInfo{
26526 {0, 167772158},
26527 },
26528 },
26529 },
26530 {
26531 name: "ADDVconst",
26532 auxType: auxInt64,
26533 argLen: 1,
26534 asm: mips.AADDVU,
26535 reg: regInfo{
26536 inputs: []inputInfo{
26537 {0, 268435454},
26538 },
26539 outputs: []outputInfo{
26540 {0, 167772158},
26541 },
26542 },
26543 },
26544 {
26545 name: "SUBV",
26546 argLen: 2,
26547 asm: mips.ASUBVU,
26548 reg: regInfo{
26549 inputs: []inputInfo{
26550 {0, 234881022},
26551 {1, 234881022},
26552 },
26553 outputs: []outputInfo{
26554 {0, 167772158},
26555 },
26556 },
26557 },
26558 {
26559 name: "SUBVconst",
26560 auxType: auxInt64,
26561 argLen: 1,
26562 asm: mips.ASUBVU,
26563 reg: regInfo{
26564 inputs: []inputInfo{
26565 {0, 234881022},
26566 },
26567 outputs: []outputInfo{
26568 {0, 167772158},
26569 },
26570 },
26571 },
26572 {
26573 name: "MULV",
26574 argLen: 2,
26575 commutative: true,
26576 asm: mips.AMULV,
26577 reg: regInfo{
26578 inputs: []inputInfo{
26579 {0, 234881022},
26580 {1, 234881022},
26581 },
26582 outputs: []outputInfo{
26583 {0, 1152921504606846976},
26584 {1, 2305843009213693952},
26585 },
26586 },
26587 },
26588 {
26589 name: "MULVU",
26590 argLen: 2,
26591 commutative: true,
26592 asm: mips.AMULVU,
26593 reg: regInfo{
26594 inputs: []inputInfo{
26595 {0, 234881022},
26596 {1, 234881022},
26597 },
26598 outputs: []outputInfo{
26599 {0, 1152921504606846976},
26600 {1, 2305843009213693952},
26601 },
26602 },
26603 },
26604 {
26605 name: "DIVV",
26606 argLen: 2,
26607 asm: mips.ADIVV,
26608 reg: regInfo{
26609 inputs: []inputInfo{
26610 {0, 234881022},
26611 {1, 234881022},
26612 },
26613 outputs: []outputInfo{
26614 {0, 1152921504606846976},
26615 {1, 2305843009213693952},
26616 },
26617 },
26618 },
26619 {
26620 name: "DIVVU",
26621 argLen: 2,
26622 asm: mips.ADIVVU,
26623 reg: regInfo{
26624 inputs: []inputInfo{
26625 {0, 234881022},
26626 {1, 234881022},
26627 },
26628 outputs: []outputInfo{
26629 {0, 1152921504606846976},
26630 {1, 2305843009213693952},
26631 },
26632 },
26633 },
26634 {
26635 name: "ADDF",
26636 argLen: 2,
26637 commutative: true,
26638 asm: mips.AADDF,
26639 reg: regInfo{
26640 inputs: []inputInfo{
26641 {0, 1152921504338411520},
26642 {1, 1152921504338411520},
26643 },
26644 outputs: []outputInfo{
26645 {0, 1152921504338411520},
26646 },
26647 },
26648 },
26649 {
26650 name: "ADDD",
26651 argLen: 2,
26652 commutative: true,
26653 asm: mips.AADDD,
26654 reg: regInfo{
26655 inputs: []inputInfo{
26656 {0, 1152921504338411520},
26657 {1, 1152921504338411520},
26658 },
26659 outputs: []outputInfo{
26660 {0, 1152921504338411520},
26661 },
26662 },
26663 },
26664 {
26665 name: "SUBF",
26666 argLen: 2,
26667 asm: mips.ASUBF,
26668 reg: regInfo{
26669 inputs: []inputInfo{
26670 {0, 1152921504338411520},
26671 {1, 1152921504338411520},
26672 },
26673 outputs: []outputInfo{
26674 {0, 1152921504338411520},
26675 },
26676 },
26677 },
26678 {
26679 name: "SUBD",
26680 argLen: 2,
26681 asm: mips.ASUBD,
26682 reg: regInfo{
26683 inputs: []inputInfo{
26684 {0, 1152921504338411520},
26685 {1, 1152921504338411520},
26686 },
26687 outputs: []outputInfo{
26688 {0, 1152921504338411520},
26689 },
26690 },
26691 },
26692 {
26693 name: "MULF",
26694 argLen: 2,
26695 commutative: true,
26696 asm: mips.AMULF,
26697 reg: regInfo{
26698 inputs: []inputInfo{
26699 {0, 1152921504338411520},
26700 {1, 1152921504338411520},
26701 },
26702 outputs: []outputInfo{
26703 {0, 1152921504338411520},
26704 },
26705 },
26706 },
26707 {
26708 name: "MULD",
26709 argLen: 2,
26710 commutative: true,
26711 asm: mips.AMULD,
26712 reg: regInfo{
26713 inputs: []inputInfo{
26714 {0, 1152921504338411520},
26715 {1, 1152921504338411520},
26716 },
26717 outputs: []outputInfo{
26718 {0, 1152921504338411520},
26719 },
26720 },
26721 },
26722 {
26723 name: "DIVF",
26724 argLen: 2,
26725 asm: mips.ADIVF,
26726 reg: regInfo{
26727 inputs: []inputInfo{
26728 {0, 1152921504338411520},
26729 {1, 1152921504338411520},
26730 },
26731 outputs: []outputInfo{
26732 {0, 1152921504338411520},
26733 },
26734 },
26735 },
26736 {
26737 name: "DIVD",
26738 argLen: 2,
26739 asm: mips.ADIVD,
26740 reg: regInfo{
26741 inputs: []inputInfo{
26742 {0, 1152921504338411520},
26743 {1, 1152921504338411520},
26744 },
26745 outputs: []outputInfo{
26746 {0, 1152921504338411520},
26747 },
26748 },
26749 },
26750 {
26751 name: "AND",
26752 argLen: 2,
26753 commutative: true,
26754 asm: mips.AAND,
26755 reg: regInfo{
26756 inputs: []inputInfo{
26757 {0, 234881022},
26758 {1, 234881022},
26759 },
26760 outputs: []outputInfo{
26761 {0, 167772158},
26762 },
26763 },
26764 },
26765 {
26766 name: "ANDconst",
26767 auxType: auxInt64,
26768 argLen: 1,
26769 asm: mips.AAND,
26770 reg: regInfo{
26771 inputs: []inputInfo{
26772 {0, 234881022},
26773 },
26774 outputs: []outputInfo{
26775 {0, 167772158},
26776 },
26777 },
26778 },
26779 {
26780 name: "OR",
26781 argLen: 2,
26782 commutative: true,
26783 asm: mips.AOR,
26784 reg: regInfo{
26785 inputs: []inputInfo{
26786 {0, 234881022},
26787 {1, 234881022},
26788 },
26789 outputs: []outputInfo{
26790 {0, 167772158},
26791 },
26792 },
26793 },
26794 {
26795 name: "ORconst",
26796 auxType: auxInt64,
26797 argLen: 1,
26798 asm: mips.AOR,
26799 reg: regInfo{
26800 inputs: []inputInfo{
26801 {0, 234881022},
26802 },
26803 outputs: []outputInfo{
26804 {0, 167772158},
26805 },
26806 },
26807 },
26808 {
26809 name: "XOR",
26810 argLen: 2,
26811 commutative: true,
26812 asm: mips.AXOR,
26813 reg: regInfo{
26814 inputs: []inputInfo{
26815 {0, 234881022},
26816 {1, 234881022},
26817 },
26818 outputs: []outputInfo{
26819 {0, 167772158},
26820 },
26821 },
26822 },
26823 {
26824 name: "XORconst",
26825 auxType: auxInt64,
26826 argLen: 1,
26827 asm: mips.AXOR,
26828 reg: regInfo{
26829 inputs: []inputInfo{
26830 {0, 234881022},
26831 },
26832 outputs: []outputInfo{
26833 {0, 167772158},
26834 },
26835 },
26836 },
26837 {
26838 name: "NOR",
26839 argLen: 2,
26840 commutative: true,
26841 asm: mips.ANOR,
26842 reg: regInfo{
26843 inputs: []inputInfo{
26844 {0, 234881022},
26845 {1, 234881022},
26846 },
26847 outputs: []outputInfo{
26848 {0, 167772158},
26849 },
26850 },
26851 },
26852 {
26853 name: "NORconst",
26854 auxType: auxInt64,
26855 argLen: 1,
26856 asm: mips.ANOR,
26857 reg: regInfo{
26858 inputs: []inputInfo{
26859 {0, 234881022},
26860 },
26861 outputs: []outputInfo{
26862 {0, 167772158},
26863 },
26864 },
26865 },
26866 {
26867 name: "NEGV",
26868 argLen: 1,
26869 reg: regInfo{
26870 inputs: []inputInfo{
26871 {0, 234881022},
26872 },
26873 outputs: []outputInfo{
26874 {0, 167772158},
26875 },
26876 },
26877 },
26878 {
26879 name: "NEGF",
26880 argLen: 1,
26881 asm: mips.ANEGF,
26882 reg: regInfo{
26883 inputs: []inputInfo{
26884 {0, 1152921504338411520},
26885 },
26886 outputs: []outputInfo{
26887 {0, 1152921504338411520},
26888 },
26889 },
26890 },
26891 {
26892 name: "NEGD",
26893 argLen: 1,
26894 asm: mips.ANEGD,
26895 reg: regInfo{
26896 inputs: []inputInfo{
26897 {0, 1152921504338411520},
26898 },
26899 outputs: []outputInfo{
26900 {0, 1152921504338411520},
26901 },
26902 },
26903 },
26904 {
26905 name: "ABSD",
26906 argLen: 1,
26907 asm: mips.AABSD,
26908 reg: regInfo{
26909 inputs: []inputInfo{
26910 {0, 1152921504338411520},
26911 },
26912 outputs: []outputInfo{
26913 {0, 1152921504338411520},
26914 },
26915 },
26916 },
26917 {
26918 name: "SQRTD",
26919 argLen: 1,
26920 asm: mips.ASQRTD,
26921 reg: regInfo{
26922 inputs: []inputInfo{
26923 {0, 1152921504338411520},
26924 },
26925 outputs: []outputInfo{
26926 {0, 1152921504338411520},
26927 },
26928 },
26929 },
26930 {
26931 name: "SQRTF",
26932 argLen: 1,
26933 asm: mips.ASQRTF,
26934 reg: regInfo{
26935 inputs: []inputInfo{
26936 {0, 1152921504338411520},
26937 },
26938 outputs: []outputInfo{
26939 {0, 1152921504338411520},
26940 },
26941 },
26942 },
26943 {
26944 name: "SLLV",
26945 argLen: 2,
26946 asm: mips.ASLLV,
26947 reg: regInfo{
26948 inputs: []inputInfo{
26949 {0, 234881022},
26950 {1, 234881022},
26951 },
26952 outputs: []outputInfo{
26953 {0, 167772158},
26954 },
26955 },
26956 },
26957 {
26958 name: "SLLVconst",
26959 auxType: auxInt64,
26960 argLen: 1,
26961 asm: mips.ASLLV,
26962 reg: regInfo{
26963 inputs: []inputInfo{
26964 {0, 234881022},
26965 },
26966 outputs: []outputInfo{
26967 {0, 167772158},
26968 },
26969 },
26970 },
26971 {
26972 name: "SRLV",
26973 argLen: 2,
26974 asm: mips.ASRLV,
26975 reg: regInfo{
26976 inputs: []inputInfo{
26977 {0, 234881022},
26978 {1, 234881022},
26979 },
26980 outputs: []outputInfo{
26981 {0, 167772158},
26982 },
26983 },
26984 },
26985 {
26986 name: "SRLVconst",
26987 auxType: auxInt64,
26988 argLen: 1,
26989 asm: mips.ASRLV,
26990 reg: regInfo{
26991 inputs: []inputInfo{
26992 {0, 234881022},
26993 },
26994 outputs: []outputInfo{
26995 {0, 167772158},
26996 },
26997 },
26998 },
26999 {
27000 name: "SRAV",
27001 argLen: 2,
27002 asm: mips.ASRAV,
27003 reg: regInfo{
27004 inputs: []inputInfo{
27005 {0, 234881022},
27006 {1, 234881022},
27007 },
27008 outputs: []outputInfo{
27009 {0, 167772158},
27010 },
27011 },
27012 },
27013 {
27014 name: "SRAVconst",
27015 auxType: auxInt64,
27016 argLen: 1,
27017 asm: mips.ASRAV,
27018 reg: regInfo{
27019 inputs: []inputInfo{
27020 {0, 234881022},
27021 },
27022 outputs: []outputInfo{
27023 {0, 167772158},
27024 },
27025 },
27026 },
27027 {
27028 name: "SGT",
27029 argLen: 2,
27030 asm: mips.ASGT,
27031 reg: regInfo{
27032 inputs: []inputInfo{
27033 {0, 234881022},
27034 {1, 234881022},
27035 },
27036 outputs: []outputInfo{
27037 {0, 167772158},
27038 },
27039 },
27040 },
27041 {
27042 name: "SGTconst",
27043 auxType: auxInt64,
27044 argLen: 1,
27045 asm: mips.ASGT,
27046 reg: regInfo{
27047 inputs: []inputInfo{
27048 {0, 234881022},
27049 },
27050 outputs: []outputInfo{
27051 {0, 167772158},
27052 },
27053 },
27054 },
27055 {
27056 name: "SGTU",
27057 argLen: 2,
27058 asm: mips.ASGTU,
27059 reg: regInfo{
27060 inputs: []inputInfo{
27061 {0, 234881022},
27062 {1, 234881022},
27063 },
27064 outputs: []outputInfo{
27065 {0, 167772158},
27066 },
27067 },
27068 },
27069 {
27070 name: "SGTUconst",
27071 auxType: auxInt64,
27072 argLen: 1,
27073 asm: mips.ASGTU,
27074 reg: regInfo{
27075 inputs: []inputInfo{
27076 {0, 234881022},
27077 },
27078 outputs: []outputInfo{
27079 {0, 167772158},
27080 },
27081 },
27082 },
27083 {
27084 name: "CMPEQF",
27085 argLen: 2,
27086 asm: mips.ACMPEQF,
27087 reg: regInfo{
27088 inputs: []inputInfo{
27089 {0, 1152921504338411520},
27090 {1, 1152921504338411520},
27091 },
27092 },
27093 },
27094 {
27095 name: "CMPEQD",
27096 argLen: 2,
27097 asm: mips.ACMPEQD,
27098 reg: regInfo{
27099 inputs: []inputInfo{
27100 {0, 1152921504338411520},
27101 {1, 1152921504338411520},
27102 },
27103 },
27104 },
27105 {
27106 name: "CMPGEF",
27107 argLen: 2,
27108 asm: mips.ACMPGEF,
27109 reg: regInfo{
27110 inputs: []inputInfo{
27111 {0, 1152921504338411520},
27112 {1, 1152921504338411520},
27113 },
27114 },
27115 },
27116 {
27117 name: "CMPGED",
27118 argLen: 2,
27119 asm: mips.ACMPGED,
27120 reg: regInfo{
27121 inputs: []inputInfo{
27122 {0, 1152921504338411520},
27123 {1, 1152921504338411520},
27124 },
27125 },
27126 },
27127 {
27128 name: "CMPGTF",
27129 argLen: 2,
27130 asm: mips.ACMPGTF,
27131 reg: regInfo{
27132 inputs: []inputInfo{
27133 {0, 1152921504338411520},
27134 {1, 1152921504338411520},
27135 },
27136 },
27137 },
27138 {
27139 name: "CMPGTD",
27140 argLen: 2,
27141 asm: mips.ACMPGTD,
27142 reg: regInfo{
27143 inputs: []inputInfo{
27144 {0, 1152921504338411520},
27145 {1, 1152921504338411520},
27146 },
27147 },
27148 },
27149 {
27150 name: "MOVVconst",
27151 auxType: auxInt64,
27152 argLen: 0,
27153 rematerializeable: true,
27154 asm: mips.AMOVV,
27155 reg: regInfo{
27156 outputs: []outputInfo{
27157 {0, 167772158},
27158 },
27159 },
27160 },
27161 {
27162 name: "MOVFconst",
27163 auxType: auxFloat64,
27164 argLen: 0,
27165 rematerializeable: true,
27166 asm: mips.AMOVF,
27167 reg: regInfo{
27168 outputs: []outputInfo{
27169 {0, 1152921504338411520},
27170 },
27171 },
27172 },
27173 {
27174 name: "MOVDconst",
27175 auxType: auxFloat64,
27176 argLen: 0,
27177 rematerializeable: true,
27178 asm: mips.AMOVD,
27179 reg: regInfo{
27180 outputs: []outputInfo{
27181 {0, 1152921504338411520},
27182 },
27183 },
27184 },
27185 {
27186 name: "MOVVaddr",
27187 auxType: auxSymOff,
27188 argLen: 1,
27189 rematerializeable: true,
27190 symEffect: SymAddr,
27191 asm: mips.AMOVV,
27192 reg: regInfo{
27193 inputs: []inputInfo{
27194 {0, 4611686018460942336},
27195 },
27196 outputs: []outputInfo{
27197 {0, 167772158},
27198 },
27199 },
27200 },
27201 {
27202 name: "MOVBload",
27203 auxType: auxSymOff,
27204 argLen: 2,
27205 faultOnNilArg0: true,
27206 symEffect: SymRead,
27207 asm: mips.AMOVB,
27208 reg: regInfo{
27209 inputs: []inputInfo{
27210 {0, 4611686018695823358},
27211 },
27212 outputs: []outputInfo{
27213 {0, 167772158},
27214 },
27215 },
27216 },
27217 {
27218 name: "MOVBUload",
27219 auxType: auxSymOff,
27220 argLen: 2,
27221 faultOnNilArg0: true,
27222 symEffect: SymRead,
27223 asm: mips.AMOVBU,
27224 reg: regInfo{
27225 inputs: []inputInfo{
27226 {0, 4611686018695823358},
27227 },
27228 outputs: []outputInfo{
27229 {0, 167772158},
27230 },
27231 },
27232 },
27233 {
27234 name: "MOVHload",
27235 auxType: auxSymOff,
27236 argLen: 2,
27237 faultOnNilArg0: true,
27238 symEffect: SymRead,
27239 asm: mips.AMOVH,
27240 reg: regInfo{
27241 inputs: []inputInfo{
27242 {0, 4611686018695823358},
27243 },
27244 outputs: []outputInfo{
27245 {0, 167772158},
27246 },
27247 },
27248 },
27249 {
27250 name: "MOVHUload",
27251 auxType: auxSymOff,
27252 argLen: 2,
27253 faultOnNilArg0: true,
27254 symEffect: SymRead,
27255 asm: mips.AMOVHU,
27256 reg: regInfo{
27257 inputs: []inputInfo{
27258 {0, 4611686018695823358},
27259 },
27260 outputs: []outputInfo{
27261 {0, 167772158},
27262 },
27263 },
27264 },
27265 {
27266 name: "MOVWload",
27267 auxType: auxSymOff,
27268 argLen: 2,
27269 faultOnNilArg0: true,
27270 symEffect: SymRead,
27271 asm: mips.AMOVW,
27272 reg: regInfo{
27273 inputs: []inputInfo{
27274 {0, 4611686018695823358},
27275 },
27276 outputs: []outputInfo{
27277 {0, 167772158},
27278 },
27279 },
27280 },
27281 {
27282 name: "MOVWUload",
27283 auxType: auxSymOff,
27284 argLen: 2,
27285 faultOnNilArg0: true,
27286 symEffect: SymRead,
27287 asm: mips.AMOVWU,
27288 reg: regInfo{
27289 inputs: []inputInfo{
27290 {0, 4611686018695823358},
27291 },
27292 outputs: []outputInfo{
27293 {0, 167772158},
27294 },
27295 },
27296 },
27297 {
27298 name: "MOVVload",
27299 auxType: auxSymOff,
27300 argLen: 2,
27301 faultOnNilArg0: true,
27302 symEffect: SymRead,
27303 asm: mips.AMOVV,
27304 reg: regInfo{
27305 inputs: []inputInfo{
27306 {0, 4611686018695823358},
27307 },
27308 outputs: []outputInfo{
27309 {0, 167772158},
27310 },
27311 },
27312 },
27313 {
27314 name: "MOVFload",
27315 auxType: auxSymOff,
27316 argLen: 2,
27317 faultOnNilArg0: true,
27318 symEffect: SymRead,
27319 asm: mips.AMOVF,
27320 reg: regInfo{
27321 inputs: []inputInfo{
27322 {0, 4611686018695823358},
27323 },
27324 outputs: []outputInfo{
27325 {0, 1152921504338411520},
27326 },
27327 },
27328 },
27329 {
27330 name: "MOVDload",
27331 auxType: auxSymOff,
27332 argLen: 2,
27333 faultOnNilArg0: true,
27334 symEffect: SymRead,
27335 asm: mips.AMOVD,
27336 reg: regInfo{
27337 inputs: []inputInfo{
27338 {0, 4611686018695823358},
27339 },
27340 outputs: []outputInfo{
27341 {0, 1152921504338411520},
27342 },
27343 },
27344 },
27345 {
27346 name: "MOVBstore",
27347 auxType: auxSymOff,
27348 argLen: 3,
27349 faultOnNilArg0: true,
27350 symEffect: SymWrite,
27351 asm: mips.AMOVB,
27352 reg: regInfo{
27353 inputs: []inputInfo{
27354 {1, 234881022},
27355 {0, 4611686018695823358},
27356 },
27357 },
27358 },
27359 {
27360 name: "MOVHstore",
27361 auxType: auxSymOff,
27362 argLen: 3,
27363 faultOnNilArg0: true,
27364 symEffect: SymWrite,
27365 asm: mips.AMOVH,
27366 reg: regInfo{
27367 inputs: []inputInfo{
27368 {1, 234881022},
27369 {0, 4611686018695823358},
27370 },
27371 },
27372 },
27373 {
27374 name: "MOVWstore",
27375 auxType: auxSymOff,
27376 argLen: 3,
27377 faultOnNilArg0: true,
27378 symEffect: SymWrite,
27379 asm: mips.AMOVW,
27380 reg: regInfo{
27381 inputs: []inputInfo{
27382 {1, 234881022},
27383 {0, 4611686018695823358},
27384 },
27385 },
27386 },
27387 {
27388 name: "MOVVstore",
27389 auxType: auxSymOff,
27390 argLen: 3,
27391 faultOnNilArg0: true,
27392 symEffect: SymWrite,
27393 asm: mips.AMOVV,
27394 reg: regInfo{
27395 inputs: []inputInfo{
27396 {1, 234881022},
27397 {0, 4611686018695823358},
27398 },
27399 },
27400 },
27401 {
27402 name: "MOVFstore",
27403 auxType: auxSymOff,
27404 argLen: 3,
27405 faultOnNilArg0: true,
27406 symEffect: SymWrite,
27407 asm: mips.AMOVF,
27408 reg: regInfo{
27409 inputs: []inputInfo{
27410 {0, 4611686018695823358},
27411 {1, 1152921504338411520},
27412 },
27413 },
27414 },
27415 {
27416 name: "MOVDstore",
27417 auxType: auxSymOff,
27418 argLen: 3,
27419 faultOnNilArg0: true,
27420 symEffect: SymWrite,
27421 asm: mips.AMOVD,
27422 reg: regInfo{
27423 inputs: []inputInfo{
27424 {0, 4611686018695823358},
27425 {1, 1152921504338411520},
27426 },
27427 },
27428 },
27429 {
27430 name: "MOVBstorezero",
27431 auxType: auxSymOff,
27432 argLen: 2,
27433 faultOnNilArg0: true,
27434 symEffect: SymWrite,
27435 asm: mips.AMOVB,
27436 reg: regInfo{
27437 inputs: []inputInfo{
27438 {0, 4611686018695823358},
27439 },
27440 },
27441 },
27442 {
27443 name: "MOVHstorezero",
27444 auxType: auxSymOff,
27445 argLen: 2,
27446 faultOnNilArg0: true,
27447 symEffect: SymWrite,
27448 asm: mips.AMOVH,
27449 reg: regInfo{
27450 inputs: []inputInfo{
27451 {0, 4611686018695823358},
27452 },
27453 },
27454 },
27455 {
27456 name: "MOVWstorezero",
27457 auxType: auxSymOff,
27458 argLen: 2,
27459 faultOnNilArg0: true,
27460 symEffect: SymWrite,
27461 asm: mips.AMOVW,
27462 reg: regInfo{
27463 inputs: []inputInfo{
27464 {0, 4611686018695823358},
27465 },
27466 },
27467 },
27468 {
27469 name: "MOVVstorezero",
27470 auxType: auxSymOff,
27471 argLen: 2,
27472 faultOnNilArg0: true,
27473 symEffect: SymWrite,
27474 asm: mips.AMOVV,
27475 reg: regInfo{
27476 inputs: []inputInfo{
27477 {0, 4611686018695823358},
27478 },
27479 },
27480 },
27481 {
27482 name: "MOVWfpgp",
27483 argLen: 1,
27484 asm: mips.AMOVW,
27485 reg: regInfo{
27486 inputs: []inputInfo{
27487 {0, 1152921504338411520},
27488 },
27489 outputs: []outputInfo{
27490 {0, 167772158},
27491 },
27492 },
27493 },
27494 {
27495 name: "MOVWgpfp",
27496 argLen: 1,
27497 asm: mips.AMOVW,
27498 reg: regInfo{
27499 inputs: []inputInfo{
27500 {0, 167772158},
27501 },
27502 outputs: []outputInfo{
27503 {0, 1152921504338411520},
27504 },
27505 },
27506 },
27507 {
27508 name: "MOVVfpgp",
27509 argLen: 1,
27510 asm: mips.AMOVV,
27511 reg: regInfo{
27512 inputs: []inputInfo{
27513 {0, 1152921504338411520},
27514 },
27515 outputs: []outputInfo{
27516 {0, 167772158},
27517 },
27518 },
27519 },
27520 {
27521 name: "MOVVgpfp",
27522 argLen: 1,
27523 asm: mips.AMOVV,
27524 reg: regInfo{
27525 inputs: []inputInfo{
27526 {0, 167772158},
27527 },
27528 outputs: []outputInfo{
27529 {0, 1152921504338411520},
27530 },
27531 },
27532 },
27533 {
27534 name: "MOVBreg",
27535 argLen: 1,
27536 asm: mips.AMOVB,
27537 reg: regInfo{
27538 inputs: []inputInfo{
27539 {0, 234881022},
27540 },
27541 outputs: []outputInfo{
27542 {0, 167772158},
27543 },
27544 },
27545 },
27546 {
27547 name: "MOVBUreg",
27548 argLen: 1,
27549 asm: mips.AMOVBU,
27550 reg: regInfo{
27551 inputs: []inputInfo{
27552 {0, 234881022},
27553 },
27554 outputs: []outputInfo{
27555 {0, 167772158},
27556 },
27557 },
27558 },
27559 {
27560 name: "MOVHreg",
27561 argLen: 1,
27562 asm: mips.AMOVH,
27563 reg: regInfo{
27564 inputs: []inputInfo{
27565 {0, 234881022},
27566 },
27567 outputs: []outputInfo{
27568 {0, 167772158},
27569 },
27570 },
27571 },
27572 {
27573 name: "MOVHUreg",
27574 argLen: 1,
27575 asm: mips.AMOVHU,
27576 reg: regInfo{
27577 inputs: []inputInfo{
27578 {0, 234881022},
27579 },
27580 outputs: []outputInfo{
27581 {0, 167772158},
27582 },
27583 },
27584 },
27585 {
27586 name: "MOVWreg",
27587 argLen: 1,
27588 asm: mips.AMOVW,
27589 reg: regInfo{
27590 inputs: []inputInfo{
27591 {0, 234881022},
27592 },
27593 outputs: []outputInfo{
27594 {0, 167772158},
27595 },
27596 },
27597 },
27598 {
27599 name: "MOVWUreg",
27600 argLen: 1,
27601 asm: mips.AMOVWU,
27602 reg: regInfo{
27603 inputs: []inputInfo{
27604 {0, 234881022},
27605 },
27606 outputs: []outputInfo{
27607 {0, 167772158},
27608 },
27609 },
27610 },
27611 {
27612 name: "MOVVreg",
27613 argLen: 1,
27614 asm: mips.AMOVV,
27615 reg: regInfo{
27616 inputs: []inputInfo{
27617 {0, 234881022},
27618 },
27619 outputs: []outputInfo{
27620 {0, 167772158},
27621 },
27622 },
27623 },
27624 {
27625 name: "MOVVnop",
27626 argLen: 1,
27627 resultInArg0: true,
27628 reg: regInfo{
27629 inputs: []inputInfo{
27630 {0, 167772158},
27631 },
27632 outputs: []outputInfo{
27633 {0, 167772158},
27634 },
27635 },
27636 },
27637 {
27638 name: "MOVWF",
27639 argLen: 1,
27640 asm: mips.AMOVWF,
27641 reg: regInfo{
27642 inputs: []inputInfo{
27643 {0, 1152921504338411520},
27644 },
27645 outputs: []outputInfo{
27646 {0, 1152921504338411520},
27647 },
27648 },
27649 },
27650 {
27651 name: "MOVWD",
27652 argLen: 1,
27653 asm: mips.AMOVWD,
27654 reg: regInfo{
27655 inputs: []inputInfo{
27656 {0, 1152921504338411520},
27657 },
27658 outputs: []outputInfo{
27659 {0, 1152921504338411520},
27660 },
27661 },
27662 },
27663 {
27664 name: "MOVVF",
27665 argLen: 1,
27666 asm: mips.AMOVVF,
27667 reg: regInfo{
27668 inputs: []inputInfo{
27669 {0, 1152921504338411520},
27670 },
27671 outputs: []outputInfo{
27672 {0, 1152921504338411520},
27673 },
27674 },
27675 },
27676 {
27677 name: "MOVVD",
27678 argLen: 1,
27679 asm: mips.AMOVVD,
27680 reg: regInfo{
27681 inputs: []inputInfo{
27682 {0, 1152921504338411520},
27683 },
27684 outputs: []outputInfo{
27685 {0, 1152921504338411520},
27686 },
27687 },
27688 },
27689 {
27690 name: "TRUNCFW",
27691 argLen: 1,
27692 asm: mips.ATRUNCFW,
27693 reg: regInfo{
27694 inputs: []inputInfo{
27695 {0, 1152921504338411520},
27696 },
27697 outputs: []outputInfo{
27698 {0, 1152921504338411520},
27699 },
27700 },
27701 },
27702 {
27703 name: "TRUNCDW",
27704 argLen: 1,
27705 asm: mips.ATRUNCDW,
27706 reg: regInfo{
27707 inputs: []inputInfo{
27708 {0, 1152921504338411520},
27709 },
27710 outputs: []outputInfo{
27711 {0, 1152921504338411520},
27712 },
27713 },
27714 },
27715 {
27716 name: "TRUNCFV",
27717 argLen: 1,
27718 asm: mips.ATRUNCFV,
27719 reg: regInfo{
27720 inputs: []inputInfo{
27721 {0, 1152921504338411520},
27722 },
27723 outputs: []outputInfo{
27724 {0, 1152921504338411520},
27725 },
27726 },
27727 },
27728 {
27729 name: "TRUNCDV",
27730 argLen: 1,
27731 asm: mips.ATRUNCDV,
27732 reg: regInfo{
27733 inputs: []inputInfo{
27734 {0, 1152921504338411520},
27735 },
27736 outputs: []outputInfo{
27737 {0, 1152921504338411520},
27738 },
27739 },
27740 },
27741 {
27742 name: "MOVFD",
27743 argLen: 1,
27744 asm: mips.AMOVFD,
27745 reg: regInfo{
27746 inputs: []inputInfo{
27747 {0, 1152921504338411520},
27748 },
27749 outputs: []outputInfo{
27750 {0, 1152921504338411520},
27751 },
27752 },
27753 },
27754 {
27755 name: "MOVDF",
27756 argLen: 1,
27757 asm: mips.AMOVDF,
27758 reg: regInfo{
27759 inputs: []inputInfo{
27760 {0, 1152921504338411520},
27761 },
27762 outputs: []outputInfo{
27763 {0, 1152921504338411520},
27764 },
27765 },
27766 },
27767 {
27768 name: "CALLstatic",
27769 auxType: auxCallOff,
27770 argLen: 1,
27771 clobberFlags: true,
27772 call: true,
27773 reg: regInfo{
27774 clobbers: 4611686018393833470,
27775 },
27776 },
27777 {
27778 name: "CALLtail",
27779 auxType: auxCallOff,
27780 argLen: 1,
27781 clobberFlags: true,
27782 call: true,
27783 tailCall: true,
27784 reg: regInfo{
27785 clobbers: 4611686018393833470,
27786 },
27787 },
27788 {
27789 name: "CALLclosure",
27790 auxType: auxCallOff,
27791 argLen: 3,
27792 clobberFlags: true,
27793 call: true,
27794 reg: regInfo{
27795 inputs: []inputInfo{
27796 {1, 4194304},
27797 {0, 201326590},
27798 },
27799 clobbers: 4611686018393833470,
27800 },
27801 },
27802 {
27803 name: "CALLinter",
27804 auxType: auxCallOff,
27805 argLen: 2,
27806 clobberFlags: true,
27807 call: true,
27808 reg: regInfo{
27809 inputs: []inputInfo{
27810 {0, 167772158},
27811 },
27812 clobbers: 4611686018393833470,
27813 },
27814 },
27815 {
27816 name: "DUFFZERO",
27817 auxType: auxInt64,
27818 argLen: 2,
27819 faultOnNilArg0: true,
27820 reg: regInfo{
27821 inputs: []inputInfo{
27822 {0, 167772158},
27823 },
27824 clobbers: 134217730,
27825 },
27826 },
27827 {
27828 name: "DUFFCOPY",
27829 auxType: auxInt64,
27830 argLen: 3,
27831 faultOnNilArg0: true,
27832 faultOnNilArg1: true,
27833 reg: regInfo{
27834 inputs: []inputInfo{
27835 {0, 4},
27836 {1, 2},
27837 },
27838 clobbers: 134217734,
27839 },
27840 },
27841 {
27842 name: "LoweredZero",
27843 auxType: auxInt64,
27844 argLen: 3,
27845 clobberFlags: true,
27846 faultOnNilArg0: true,
27847 reg: regInfo{
27848 inputs: []inputInfo{
27849 {0, 2},
27850 {1, 167772158},
27851 },
27852 clobbers: 2,
27853 },
27854 },
27855 {
27856 name: "LoweredMove",
27857 auxType: auxInt64,
27858 argLen: 4,
27859 clobberFlags: true,
27860 faultOnNilArg0: true,
27861 faultOnNilArg1: true,
27862 reg: regInfo{
27863 inputs: []inputInfo{
27864 {0, 4},
27865 {1, 2},
27866 {2, 167772158},
27867 },
27868 clobbers: 6,
27869 },
27870 },
27871 {
27872 name: "LoweredAtomicAnd32",
27873 argLen: 3,
27874 faultOnNilArg0: true,
27875 hasSideEffects: true,
27876 unsafePoint: true,
27877 asm: mips.AAND,
27878 reg: regInfo{
27879 inputs: []inputInfo{
27880 {1, 234881022},
27881 {0, 4611686018695823358},
27882 },
27883 },
27884 },
27885 {
27886 name: "LoweredAtomicOr32",
27887 argLen: 3,
27888 faultOnNilArg0: true,
27889 hasSideEffects: true,
27890 unsafePoint: true,
27891 asm: mips.AOR,
27892 reg: regInfo{
27893 inputs: []inputInfo{
27894 {1, 234881022},
27895 {0, 4611686018695823358},
27896 },
27897 },
27898 },
27899 {
27900 name: "LoweredAtomicLoad8",
27901 argLen: 2,
27902 faultOnNilArg0: true,
27903 reg: regInfo{
27904 inputs: []inputInfo{
27905 {0, 4611686018695823358},
27906 },
27907 outputs: []outputInfo{
27908 {0, 167772158},
27909 },
27910 },
27911 },
27912 {
27913 name: "LoweredAtomicLoad32",
27914 argLen: 2,
27915 faultOnNilArg0: true,
27916 reg: regInfo{
27917 inputs: []inputInfo{
27918 {0, 4611686018695823358},
27919 },
27920 outputs: []outputInfo{
27921 {0, 167772158},
27922 },
27923 },
27924 },
27925 {
27926 name: "LoweredAtomicLoad64",
27927 argLen: 2,
27928 faultOnNilArg0: true,
27929 reg: regInfo{
27930 inputs: []inputInfo{
27931 {0, 4611686018695823358},
27932 },
27933 outputs: []outputInfo{
27934 {0, 167772158},
27935 },
27936 },
27937 },
27938 {
27939 name: "LoweredAtomicStore8",
27940 argLen: 3,
27941 faultOnNilArg0: true,
27942 hasSideEffects: true,
27943 reg: regInfo{
27944 inputs: []inputInfo{
27945 {1, 234881022},
27946 {0, 4611686018695823358},
27947 },
27948 },
27949 },
27950 {
27951 name: "LoweredAtomicStore32",
27952 argLen: 3,
27953 faultOnNilArg0: true,
27954 hasSideEffects: true,
27955 reg: regInfo{
27956 inputs: []inputInfo{
27957 {1, 234881022},
27958 {0, 4611686018695823358},
27959 },
27960 },
27961 },
27962 {
27963 name: "LoweredAtomicStore64",
27964 argLen: 3,
27965 faultOnNilArg0: true,
27966 hasSideEffects: true,
27967 reg: regInfo{
27968 inputs: []inputInfo{
27969 {1, 234881022},
27970 {0, 4611686018695823358},
27971 },
27972 },
27973 },
27974 {
27975 name: "LoweredAtomicStorezero32",
27976 argLen: 2,
27977 faultOnNilArg0: true,
27978 hasSideEffects: true,
27979 reg: regInfo{
27980 inputs: []inputInfo{
27981 {0, 4611686018695823358},
27982 },
27983 },
27984 },
27985 {
27986 name: "LoweredAtomicStorezero64",
27987 argLen: 2,
27988 faultOnNilArg0: true,
27989 hasSideEffects: true,
27990 reg: regInfo{
27991 inputs: []inputInfo{
27992 {0, 4611686018695823358},
27993 },
27994 },
27995 },
27996 {
27997 name: "LoweredAtomicExchange32",
27998 argLen: 3,
27999 resultNotInArgs: true,
28000 faultOnNilArg0: true,
28001 hasSideEffects: true,
28002 unsafePoint: true,
28003 reg: regInfo{
28004 inputs: []inputInfo{
28005 {1, 234881022},
28006 {0, 4611686018695823358},
28007 },
28008 outputs: []outputInfo{
28009 {0, 167772158},
28010 },
28011 },
28012 },
28013 {
28014 name: "LoweredAtomicExchange64",
28015 argLen: 3,
28016 resultNotInArgs: true,
28017 faultOnNilArg0: true,
28018 hasSideEffects: true,
28019 unsafePoint: true,
28020 reg: regInfo{
28021 inputs: []inputInfo{
28022 {1, 234881022},
28023 {0, 4611686018695823358},
28024 },
28025 outputs: []outputInfo{
28026 {0, 167772158},
28027 },
28028 },
28029 },
28030 {
28031 name: "LoweredAtomicAdd32",
28032 argLen: 3,
28033 resultNotInArgs: true,
28034 faultOnNilArg0: true,
28035 hasSideEffects: true,
28036 unsafePoint: true,
28037 reg: regInfo{
28038 inputs: []inputInfo{
28039 {1, 234881022},
28040 {0, 4611686018695823358},
28041 },
28042 outputs: []outputInfo{
28043 {0, 167772158},
28044 },
28045 },
28046 },
28047 {
28048 name: "LoweredAtomicAdd64",
28049 argLen: 3,
28050 resultNotInArgs: true,
28051 faultOnNilArg0: true,
28052 hasSideEffects: true,
28053 unsafePoint: true,
28054 reg: regInfo{
28055 inputs: []inputInfo{
28056 {1, 234881022},
28057 {0, 4611686018695823358},
28058 },
28059 outputs: []outputInfo{
28060 {0, 167772158},
28061 },
28062 },
28063 },
28064 {
28065 name: "LoweredAtomicAddconst32",
28066 auxType: auxInt32,
28067 argLen: 2,
28068 resultNotInArgs: true,
28069 faultOnNilArg0: true,
28070 hasSideEffects: true,
28071 unsafePoint: true,
28072 reg: regInfo{
28073 inputs: []inputInfo{
28074 {0, 4611686018695823358},
28075 },
28076 outputs: []outputInfo{
28077 {0, 167772158},
28078 },
28079 },
28080 },
28081 {
28082 name: "LoweredAtomicAddconst64",
28083 auxType: auxInt64,
28084 argLen: 2,
28085 resultNotInArgs: true,
28086 faultOnNilArg0: true,
28087 hasSideEffects: true,
28088 unsafePoint: true,
28089 reg: regInfo{
28090 inputs: []inputInfo{
28091 {0, 4611686018695823358},
28092 },
28093 outputs: []outputInfo{
28094 {0, 167772158},
28095 },
28096 },
28097 },
28098 {
28099 name: "LoweredAtomicCas32",
28100 argLen: 4,
28101 resultNotInArgs: true,
28102 faultOnNilArg0: true,
28103 hasSideEffects: true,
28104 unsafePoint: true,
28105 reg: regInfo{
28106 inputs: []inputInfo{
28107 {1, 234881022},
28108 {2, 234881022},
28109 {0, 4611686018695823358},
28110 },
28111 outputs: []outputInfo{
28112 {0, 167772158},
28113 },
28114 },
28115 },
28116 {
28117 name: "LoweredAtomicCas64",
28118 argLen: 4,
28119 resultNotInArgs: true,
28120 faultOnNilArg0: true,
28121 hasSideEffects: true,
28122 unsafePoint: true,
28123 reg: regInfo{
28124 inputs: []inputInfo{
28125 {1, 234881022},
28126 {2, 234881022},
28127 {0, 4611686018695823358},
28128 },
28129 outputs: []outputInfo{
28130 {0, 167772158},
28131 },
28132 },
28133 },
28134 {
28135 name: "LoweredNilCheck",
28136 argLen: 2,
28137 nilCheck: true,
28138 faultOnNilArg0: true,
28139 reg: regInfo{
28140 inputs: []inputInfo{
28141 {0, 234881022},
28142 },
28143 },
28144 },
28145 {
28146 name: "FPFlagTrue",
28147 argLen: 1,
28148 reg: regInfo{
28149 outputs: []outputInfo{
28150 {0, 167772158},
28151 },
28152 },
28153 },
28154 {
28155 name: "FPFlagFalse",
28156 argLen: 1,
28157 reg: regInfo{
28158 outputs: []outputInfo{
28159 {0, 167772158},
28160 },
28161 },
28162 },
28163 {
28164 name: "LoweredGetClosurePtr",
28165 argLen: 0,
28166 zeroWidth: true,
28167 reg: regInfo{
28168 outputs: []outputInfo{
28169 {0, 4194304},
28170 },
28171 },
28172 },
28173 {
28174 name: "LoweredGetCallerSP",
28175 argLen: 1,
28176 rematerializeable: true,
28177 reg: regInfo{
28178 outputs: []outputInfo{
28179 {0, 167772158},
28180 },
28181 },
28182 },
28183 {
28184 name: "LoweredGetCallerPC",
28185 argLen: 0,
28186 rematerializeable: true,
28187 reg: regInfo{
28188 outputs: []outputInfo{
28189 {0, 167772158},
28190 },
28191 },
28192 },
28193 {
28194 name: "LoweredWB",
28195 auxType: auxInt64,
28196 argLen: 1,
28197 clobberFlags: true,
28198 reg: regInfo{
28199 clobbers: 4611686018293170176,
28200 outputs: []outputInfo{
28201 {0, 16777216},
28202 },
28203 },
28204 },
28205 {
28206 name: "LoweredPanicBoundsA",
28207 auxType: auxInt64,
28208 argLen: 3,
28209 call: true,
28210 reg: regInfo{
28211 inputs: []inputInfo{
28212 {0, 8},
28213 {1, 16},
28214 },
28215 },
28216 },
28217 {
28218 name: "LoweredPanicBoundsB",
28219 auxType: auxInt64,
28220 argLen: 3,
28221 call: true,
28222 reg: regInfo{
28223 inputs: []inputInfo{
28224 {0, 4},
28225 {1, 8},
28226 },
28227 },
28228 },
28229 {
28230 name: "LoweredPanicBoundsC",
28231 auxType: auxInt64,
28232 argLen: 3,
28233 call: true,
28234 reg: regInfo{
28235 inputs: []inputInfo{
28236 {0, 2},
28237 {1, 4},
28238 },
28239 },
28240 },
28241
28242 {
28243 name: "ADD",
28244 argLen: 2,
28245 commutative: true,
28246 asm: ppc64.AADD,
28247 reg: regInfo{
28248 inputs: []inputInfo{
28249 {0, 1073733630},
28250 {1, 1073733630},
28251 },
28252 outputs: []outputInfo{
28253 {0, 1073733624},
28254 },
28255 },
28256 },
28257 {
28258 name: "ADDCC",
28259 argLen: 2,
28260 commutative: true,
28261 asm: ppc64.AADDCC,
28262 reg: regInfo{
28263 inputs: []inputInfo{
28264 {0, 1073733630},
28265 {1, 1073733630},
28266 },
28267 outputs: []outputInfo{
28268 {0, 1073733624},
28269 },
28270 },
28271 },
28272 {
28273 name: "ADDconst",
28274 auxType: auxInt64,
28275 argLen: 1,
28276 asm: ppc64.AADD,
28277 reg: regInfo{
28278 inputs: []inputInfo{
28279 {0, 1073733630},
28280 },
28281 outputs: []outputInfo{
28282 {0, 1073733624},
28283 },
28284 },
28285 },
28286 {
28287 name: "ADDCCconst",
28288 auxType: auxInt64,
28289 argLen: 1,
28290 asm: ppc64.AADDCCC,
28291 reg: regInfo{
28292 inputs: []inputInfo{
28293 {0, 1073733630},
28294 },
28295 clobbers: 9223372036854775808,
28296 outputs: []outputInfo{
28297 {0, 1073733624},
28298 },
28299 },
28300 },
28301 {
28302 name: "FADD",
28303 argLen: 2,
28304 commutative: true,
28305 asm: ppc64.AFADD,
28306 reg: regInfo{
28307 inputs: []inputInfo{
28308 {0, 9223372032559808512},
28309 {1, 9223372032559808512},
28310 },
28311 outputs: []outputInfo{
28312 {0, 9223372032559808512},
28313 },
28314 },
28315 },
28316 {
28317 name: "FADDS",
28318 argLen: 2,
28319 commutative: true,
28320 asm: ppc64.AFADDS,
28321 reg: regInfo{
28322 inputs: []inputInfo{
28323 {0, 9223372032559808512},
28324 {1, 9223372032559808512},
28325 },
28326 outputs: []outputInfo{
28327 {0, 9223372032559808512},
28328 },
28329 },
28330 },
28331 {
28332 name: "SUB",
28333 argLen: 2,
28334 asm: ppc64.ASUB,
28335 reg: regInfo{
28336 inputs: []inputInfo{
28337 {0, 1073733630},
28338 {1, 1073733630},
28339 },
28340 outputs: []outputInfo{
28341 {0, 1073733624},
28342 },
28343 },
28344 },
28345 {
28346 name: "SUBCC",
28347 argLen: 2,
28348 asm: ppc64.ASUBCC,
28349 reg: regInfo{
28350 inputs: []inputInfo{
28351 {0, 1073733630},
28352 {1, 1073733630},
28353 },
28354 outputs: []outputInfo{
28355 {0, 1073733624},
28356 },
28357 },
28358 },
28359 {
28360 name: "SUBFCconst",
28361 auxType: auxInt64,
28362 argLen: 1,
28363 asm: ppc64.ASUBC,
28364 reg: regInfo{
28365 inputs: []inputInfo{
28366 {0, 1073733630},
28367 },
28368 clobbers: 9223372036854775808,
28369 outputs: []outputInfo{
28370 {0, 1073733624},
28371 },
28372 },
28373 },
28374 {
28375 name: "FSUB",
28376 argLen: 2,
28377 asm: ppc64.AFSUB,
28378 reg: regInfo{
28379 inputs: []inputInfo{
28380 {0, 9223372032559808512},
28381 {1, 9223372032559808512},
28382 },
28383 outputs: []outputInfo{
28384 {0, 9223372032559808512},
28385 },
28386 },
28387 },
28388 {
28389 name: "FSUBS",
28390 argLen: 2,
28391 asm: ppc64.AFSUBS,
28392 reg: regInfo{
28393 inputs: []inputInfo{
28394 {0, 9223372032559808512},
28395 {1, 9223372032559808512},
28396 },
28397 outputs: []outputInfo{
28398 {0, 9223372032559808512},
28399 },
28400 },
28401 },
28402 {
28403 name: "XSMINJDP",
28404 argLen: 2,
28405 asm: ppc64.AXSMINJDP,
28406 reg: regInfo{
28407 inputs: []inputInfo{
28408 {0, 9223372032559808512},
28409 {1, 9223372032559808512},
28410 },
28411 outputs: []outputInfo{
28412 {0, 9223372032559808512},
28413 },
28414 },
28415 },
28416 {
28417 name: "XSMAXJDP",
28418 argLen: 2,
28419 asm: ppc64.AXSMAXJDP,
28420 reg: regInfo{
28421 inputs: []inputInfo{
28422 {0, 9223372032559808512},
28423 {1, 9223372032559808512},
28424 },
28425 outputs: []outputInfo{
28426 {0, 9223372032559808512},
28427 },
28428 },
28429 },
28430 {
28431 name: "MULLD",
28432 argLen: 2,
28433 commutative: true,
28434 asm: ppc64.AMULLD,
28435 reg: regInfo{
28436 inputs: []inputInfo{
28437 {0, 1073733630},
28438 {1, 1073733630},
28439 },
28440 outputs: []outputInfo{
28441 {0, 1073733624},
28442 },
28443 },
28444 },
28445 {
28446 name: "MULLW",
28447 argLen: 2,
28448 commutative: true,
28449 asm: ppc64.AMULLW,
28450 reg: regInfo{
28451 inputs: []inputInfo{
28452 {0, 1073733630},
28453 {1, 1073733630},
28454 },
28455 outputs: []outputInfo{
28456 {0, 1073733624},
28457 },
28458 },
28459 },
28460 {
28461 name: "MULLDconst",
28462 auxType: auxInt32,
28463 argLen: 1,
28464 asm: ppc64.AMULLD,
28465 reg: regInfo{
28466 inputs: []inputInfo{
28467 {0, 1073733630},
28468 },
28469 outputs: []outputInfo{
28470 {0, 1073733624},
28471 },
28472 },
28473 },
28474 {
28475 name: "MULLWconst",
28476 auxType: auxInt32,
28477 argLen: 1,
28478 asm: ppc64.AMULLW,
28479 reg: regInfo{
28480 inputs: []inputInfo{
28481 {0, 1073733630},
28482 },
28483 outputs: []outputInfo{
28484 {0, 1073733624},
28485 },
28486 },
28487 },
28488 {
28489 name: "MADDLD",
28490 argLen: 3,
28491 asm: ppc64.AMADDLD,
28492 reg: regInfo{
28493 inputs: []inputInfo{
28494 {0, 1073733630},
28495 {1, 1073733630},
28496 {2, 1073733630},
28497 },
28498 outputs: []outputInfo{
28499 {0, 1073733624},
28500 },
28501 },
28502 },
28503 {
28504 name: "MULHD",
28505 argLen: 2,
28506 commutative: true,
28507 asm: ppc64.AMULHD,
28508 reg: regInfo{
28509 inputs: []inputInfo{
28510 {0, 1073733630},
28511 {1, 1073733630},
28512 },
28513 outputs: []outputInfo{
28514 {0, 1073733624},
28515 },
28516 },
28517 },
28518 {
28519 name: "MULHW",
28520 argLen: 2,
28521 commutative: true,
28522 asm: ppc64.AMULHW,
28523 reg: regInfo{
28524 inputs: []inputInfo{
28525 {0, 1073733630},
28526 {1, 1073733630},
28527 },
28528 outputs: []outputInfo{
28529 {0, 1073733624},
28530 },
28531 },
28532 },
28533 {
28534 name: "MULHDU",
28535 argLen: 2,
28536 commutative: true,
28537 asm: ppc64.AMULHDU,
28538 reg: regInfo{
28539 inputs: []inputInfo{
28540 {0, 1073733630},
28541 {1, 1073733630},
28542 },
28543 outputs: []outputInfo{
28544 {0, 1073733624},
28545 },
28546 },
28547 },
28548 {
28549 name: "MULHWU",
28550 argLen: 2,
28551 commutative: true,
28552 asm: ppc64.AMULHWU,
28553 reg: regInfo{
28554 inputs: []inputInfo{
28555 {0, 1073733630},
28556 {1, 1073733630},
28557 },
28558 outputs: []outputInfo{
28559 {0, 1073733624},
28560 },
28561 },
28562 },
28563 {
28564 name: "FMUL",
28565 argLen: 2,
28566 commutative: true,
28567 asm: ppc64.AFMUL,
28568 reg: regInfo{
28569 inputs: []inputInfo{
28570 {0, 9223372032559808512},
28571 {1, 9223372032559808512},
28572 },
28573 outputs: []outputInfo{
28574 {0, 9223372032559808512},
28575 },
28576 },
28577 },
28578 {
28579 name: "FMULS",
28580 argLen: 2,
28581 commutative: true,
28582 asm: ppc64.AFMULS,
28583 reg: regInfo{
28584 inputs: []inputInfo{
28585 {0, 9223372032559808512},
28586 {1, 9223372032559808512},
28587 },
28588 outputs: []outputInfo{
28589 {0, 9223372032559808512},
28590 },
28591 },
28592 },
28593 {
28594 name: "FMADD",
28595 argLen: 3,
28596 asm: ppc64.AFMADD,
28597 reg: regInfo{
28598 inputs: []inputInfo{
28599 {0, 9223372032559808512},
28600 {1, 9223372032559808512},
28601 {2, 9223372032559808512},
28602 },
28603 outputs: []outputInfo{
28604 {0, 9223372032559808512},
28605 },
28606 },
28607 },
28608 {
28609 name: "FMADDS",
28610 argLen: 3,
28611 asm: ppc64.AFMADDS,
28612 reg: regInfo{
28613 inputs: []inputInfo{
28614 {0, 9223372032559808512},
28615 {1, 9223372032559808512},
28616 {2, 9223372032559808512},
28617 },
28618 outputs: []outputInfo{
28619 {0, 9223372032559808512},
28620 },
28621 },
28622 },
28623 {
28624 name: "FMSUB",
28625 argLen: 3,
28626 asm: ppc64.AFMSUB,
28627 reg: regInfo{
28628 inputs: []inputInfo{
28629 {0, 9223372032559808512},
28630 {1, 9223372032559808512},
28631 {2, 9223372032559808512},
28632 },
28633 outputs: []outputInfo{
28634 {0, 9223372032559808512},
28635 },
28636 },
28637 },
28638 {
28639 name: "FMSUBS",
28640 argLen: 3,
28641 asm: ppc64.AFMSUBS,
28642 reg: regInfo{
28643 inputs: []inputInfo{
28644 {0, 9223372032559808512},
28645 {1, 9223372032559808512},
28646 {2, 9223372032559808512},
28647 },
28648 outputs: []outputInfo{
28649 {0, 9223372032559808512},
28650 },
28651 },
28652 },
28653 {
28654 name: "SRAD",
28655 argLen: 2,
28656 asm: ppc64.ASRAD,
28657 reg: regInfo{
28658 inputs: []inputInfo{
28659 {0, 1073733630},
28660 {1, 1073733630},
28661 },
28662 clobbers: 9223372036854775808,
28663 outputs: []outputInfo{
28664 {0, 1073733624},
28665 },
28666 },
28667 },
28668 {
28669 name: "SRAW",
28670 argLen: 2,
28671 asm: ppc64.ASRAW,
28672 reg: regInfo{
28673 inputs: []inputInfo{
28674 {0, 1073733630},
28675 {1, 1073733630},
28676 },
28677 clobbers: 9223372036854775808,
28678 outputs: []outputInfo{
28679 {0, 1073733624},
28680 },
28681 },
28682 },
28683 {
28684 name: "SRD",
28685 argLen: 2,
28686 asm: ppc64.ASRD,
28687 reg: regInfo{
28688 inputs: []inputInfo{
28689 {0, 1073733630},
28690 {1, 1073733630},
28691 },
28692 outputs: []outputInfo{
28693 {0, 1073733624},
28694 },
28695 },
28696 },
28697 {
28698 name: "SRW",
28699 argLen: 2,
28700 asm: ppc64.ASRW,
28701 reg: regInfo{
28702 inputs: []inputInfo{
28703 {0, 1073733630},
28704 {1, 1073733630},
28705 },
28706 outputs: []outputInfo{
28707 {0, 1073733624},
28708 },
28709 },
28710 },
28711 {
28712 name: "SLD",
28713 argLen: 2,
28714 asm: ppc64.ASLD,
28715 reg: regInfo{
28716 inputs: []inputInfo{
28717 {0, 1073733630},
28718 {1, 1073733630},
28719 },
28720 outputs: []outputInfo{
28721 {0, 1073733624},
28722 },
28723 },
28724 },
28725 {
28726 name: "SLW",
28727 argLen: 2,
28728 asm: ppc64.ASLW,
28729 reg: regInfo{
28730 inputs: []inputInfo{
28731 {0, 1073733630},
28732 {1, 1073733630},
28733 },
28734 outputs: []outputInfo{
28735 {0, 1073733624},
28736 },
28737 },
28738 },
28739 {
28740 name: "ROTL",
28741 argLen: 2,
28742 asm: ppc64.AROTL,
28743 reg: regInfo{
28744 inputs: []inputInfo{
28745 {0, 1073733630},
28746 {1, 1073733630},
28747 },
28748 outputs: []outputInfo{
28749 {0, 1073733624},
28750 },
28751 },
28752 },
28753 {
28754 name: "ROTLW",
28755 argLen: 2,
28756 asm: ppc64.AROTLW,
28757 reg: regInfo{
28758 inputs: []inputInfo{
28759 {0, 1073733630},
28760 {1, 1073733630},
28761 },
28762 outputs: []outputInfo{
28763 {0, 1073733624},
28764 },
28765 },
28766 },
28767 {
28768 name: "CLRLSLWI",
28769 auxType: auxInt32,
28770 argLen: 1,
28771 asm: ppc64.ACLRLSLWI,
28772 reg: regInfo{
28773 inputs: []inputInfo{
28774 {0, 1073733630},
28775 },
28776 outputs: []outputInfo{
28777 {0, 1073733624},
28778 },
28779 },
28780 },
28781 {
28782 name: "CLRLSLDI",
28783 auxType: auxInt32,
28784 argLen: 1,
28785 asm: ppc64.ACLRLSLDI,
28786 reg: regInfo{
28787 inputs: []inputInfo{
28788 {0, 1073733630},
28789 },
28790 outputs: []outputInfo{
28791 {0, 1073733624},
28792 },
28793 },
28794 },
28795 {
28796 name: "ADDC",
28797 argLen: 2,
28798 commutative: true,
28799 asm: ppc64.AADDC,
28800 reg: regInfo{
28801 inputs: []inputInfo{
28802 {0, 1073733630},
28803 {1, 1073733630},
28804 },
28805 clobbers: 9223372036854775808,
28806 outputs: []outputInfo{
28807 {1, 9223372036854775808},
28808 {0, 1073733624},
28809 },
28810 },
28811 },
28812 {
28813 name: "SUBC",
28814 argLen: 2,
28815 asm: ppc64.ASUBC,
28816 reg: regInfo{
28817 inputs: []inputInfo{
28818 {0, 1073733630},
28819 {1, 1073733630},
28820 },
28821 clobbers: 9223372036854775808,
28822 outputs: []outputInfo{
28823 {1, 9223372036854775808},
28824 {0, 1073733624},
28825 },
28826 },
28827 },
28828 {
28829 name: "ADDCconst",
28830 auxType: auxInt64,
28831 argLen: 1,
28832 asm: ppc64.AADDC,
28833 reg: regInfo{
28834 inputs: []inputInfo{
28835 {0, 1073733630},
28836 },
28837 outputs: []outputInfo{
28838 {1, 9223372036854775808},
28839 {0, 1073733624},
28840 },
28841 },
28842 },
28843 {
28844 name: "SUBCconst",
28845 auxType: auxInt64,
28846 argLen: 1,
28847 asm: ppc64.ASUBC,
28848 reg: regInfo{
28849 inputs: []inputInfo{
28850 {0, 1073733630},
28851 },
28852 outputs: []outputInfo{
28853 {1, 9223372036854775808},
28854 {0, 1073733624},
28855 },
28856 },
28857 },
28858 {
28859 name: "ADDE",
28860 argLen: 3,
28861 commutative: true,
28862 asm: ppc64.AADDE,
28863 reg: regInfo{
28864 inputs: []inputInfo{
28865 {2, 9223372036854775808},
28866 {0, 1073733630},
28867 {1, 1073733630},
28868 },
28869 clobbers: 9223372036854775808,
28870 outputs: []outputInfo{
28871 {1, 9223372036854775808},
28872 {0, 1073733624},
28873 },
28874 },
28875 },
28876 {
28877 name: "ADDZE",
28878 argLen: 2,
28879 asm: ppc64.AADDZE,
28880 reg: regInfo{
28881 inputs: []inputInfo{
28882 {1, 9223372036854775808},
28883 {0, 1073733630},
28884 },
28885 clobbers: 9223372036854775808,
28886 outputs: []outputInfo{
28887 {1, 9223372036854775808},
28888 {0, 1073733624},
28889 },
28890 },
28891 },
28892 {
28893 name: "SUBE",
28894 argLen: 3,
28895 asm: ppc64.ASUBE,
28896 reg: regInfo{
28897 inputs: []inputInfo{
28898 {2, 9223372036854775808},
28899 {0, 1073733630},
28900 {1, 1073733630},
28901 },
28902 clobbers: 9223372036854775808,
28903 outputs: []outputInfo{
28904 {1, 9223372036854775808},
28905 {0, 1073733624},
28906 },
28907 },
28908 },
28909 {
28910 name: "ADDZEzero",
28911 argLen: 1,
28912 asm: ppc64.AADDZE,
28913 reg: regInfo{
28914 inputs: []inputInfo{
28915 {0, 9223372036854775808},
28916 },
28917 clobbers: 9223372036854775808,
28918 outputs: []outputInfo{
28919 {0, 1073733624},
28920 },
28921 },
28922 },
28923 {
28924 name: "SUBZEzero",
28925 argLen: 1,
28926 asm: ppc64.ASUBZE,
28927 reg: regInfo{
28928 inputs: []inputInfo{
28929 {0, 9223372036854775808},
28930 },
28931 clobbers: 9223372036854775808,
28932 outputs: []outputInfo{
28933 {0, 1073733624},
28934 },
28935 },
28936 },
28937 {
28938 name: "SRADconst",
28939 auxType: auxInt64,
28940 argLen: 1,
28941 asm: ppc64.ASRAD,
28942 reg: regInfo{
28943 inputs: []inputInfo{
28944 {0, 1073733630},
28945 },
28946 clobbers: 9223372036854775808,
28947 outputs: []outputInfo{
28948 {0, 1073733624},
28949 },
28950 },
28951 },
28952 {
28953 name: "SRAWconst",
28954 auxType: auxInt64,
28955 argLen: 1,
28956 asm: ppc64.ASRAW,
28957 reg: regInfo{
28958 inputs: []inputInfo{
28959 {0, 1073733630},
28960 },
28961 clobbers: 9223372036854775808,
28962 outputs: []outputInfo{
28963 {0, 1073733624},
28964 },
28965 },
28966 },
28967 {
28968 name: "SRDconst",
28969 auxType: auxInt64,
28970 argLen: 1,
28971 asm: ppc64.ASRD,
28972 reg: regInfo{
28973 inputs: []inputInfo{
28974 {0, 1073733630},
28975 },
28976 outputs: []outputInfo{
28977 {0, 1073733624},
28978 },
28979 },
28980 },
28981 {
28982 name: "SRWconst",
28983 auxType: auxInt64,
28984 argLen: 1,
28985 asm: ppc64.ASRW,
28986 reg: regInfo{
28987 inputs: []inputInfo{
28988 {0, 1073733630},
28989 },
28990 outputs: []outputInfo{
28991 {0, 1073733624},
28992 },
28993 },
28994 },
28995 {
28996 name: "SLDconst",
28997 auxType: auxInt64,
28998 argLen: 1,
28999 asm: ppc64.ASLD,
29000 reg: regInfo{
29001 inputs: []inputInfo{
29002 {0, 1073733630},
29003 },
29004 outputs: []outputInfo{
29005 {0, 1073733624},
29006 },
29007 },
29008 },
29009 {
29010 name: "SLWconst",
29011 auxType: auxInt64,
29012 argLen: 1,
29013 asm: ppc64.ASLW,
29014 reg: regInfo{
29015 inputs: []inputInfo{
29016 {0, 1073733630},
29017 },
29018 outputs: []outputInfo{
29019 {0, 1073733624},
29020 },
29021 },
29022 },
29023 {
29024 name: "ROTLconst",
29025 auxType: auxInt64,
29026 argLen: 1,
29027 asm: ppc64.AROTL,
29028 reg: regInfo{
29029 inputs: []inputInfo{
29030 {0, 1073733630},
29031 },
29032 outputs: []outputInfo{
29033 {0, 1073733624},
29034 },
29035 },
29036 },
29037 {
29038 name: "ROTLWconst",
29039 auxType: auxInt64,
29040 argLen: 1,
29041 asm: ppc64.AROTLW,
29042 reg: regInfo{
29043 inputs: []inputInfo{
29044 {0, 1073733630},
29045 },
29046 outputs: []outputInfo{
29047 {0, 1073733624},
29048 },
29049 },
29050 },
29051 {
29052 name: "EXTSWSLconst",
29053 auxType: auxInt64,
29054 argLen: 1,
29055 asm: ppc64.AEXTSWSLI,
29056 reg: regInfo{
29057 inputs: []inputInfo{
29058 {0, 1073733630},
29059 },
29060 outputs: []outputInfo{
29061 {0, 1073733624},
29062 },
29063 },
29064 },
29065 {
29066 name: "RLWINM",
29067 auxType: auxInt64,
29068 argLen: 1,
29069 asm: ppc64.ARLWNM,
29070 reg: regInfo{
29071 inputs: []inputInfo{
29072 {0, 1073733630},
29073 },
29074 outputs: []outputInfo{
29075 {0, 1073733624},
29076 },
29077 },
29078 },
29079 {
29080 name: "RLWNM",
29081 auxType: auxInt64,
29082 argLen: 2,
29083 asm: ppc64.ARLWNM,
29084 reg: regInfo{
29085 inputs: []inputInfo{
29086 {0, 1073733630},
29087 {1, 1073733630},
29088 },
29089 outputs: []outputInfo{
29090 {0, 1073733624},
29091 },
29092 },
29093 },
29094 {
29095 name: "RLWMI",
29096 auxType: auxInt64,
29097 argLen: 2,
29098 resultInArg0: true,
29099 asm: ppc64.ARLWMI,
29100 reg: regInfo{
29101 inputs: []inputInfo{
29102 {0, 1073733624},
29103 {1, 1073733630},
29104 },
29105 outputs: []outputInfo{
29106 {0, 1073733624},
29107 },
29108 },
29109 },
29110 {
29111 name: "RLDICL",
29112 auxType: auxInt64,
29113 argLen: 1,
29114 asm: ppc64.ARLDICL,
29115 reg: regInfo{
29116 inputs: []inputInfo{
29117 {0, 1073733630},
29118 },
29119 outputs: []outputInfo{
29120 {0, 1073733624},
29121 },
29122 },
29123 },
29124 {
29125 name: "RLDICR",
29126 auxType: auxInt64,
29127 argLen: 1,
29128 asm: ppc64.ARLDICR,
29129 reg: regInfo{
29130 inputs: []inputInfo{
29131 {0, 1073733630},
29132 },
29133 outputs: []outputInfo{
29134 {0, 1073733624},
29135 },
29136 },
29137 },
29138 {
29139 name: "CNTLZD",
29140 argLen: 1,
29141 asm: ppc64.ACNTLZD,
29142 reg: regInfo{
29143 inputs: []inputInfo{
29144 {0, 1073733630},
29145 },
29146 outputs: []outputInfo{
29147 {0, 1073733624},
29148 },
29149 },
29150 },
29151 {
29152 name: "CNTLZDCC",
29153 argLen: 1,
29154 asm: ppc64.ACNTLZDCC,
29155 reg: regInfo{
29156 inputs: []inputInfo{
29157 {0, 1073733630},
29158 },
29159 outputs: []outputInfo{
29160 {0, 1073733624},
29161 },
29162 },
29163 },
29164 {
29165 name: "CNTLZW",
29166 argLen: 1,
29167 asm: ppc64.ACNTLZW,
29168 reg: regInfo{
29169 inputs: []inputInfo{
29170 {0, 1073733630},
29171 },
29172 outputs: []outputInfo{
29173 {0, 1073733624},
29174 },
29175 },
29176 },
29177 {
29178 name: "CNTTZD",
29179 argLen: 1,
29180 asm: ppc64.ACNTTZD,
29181 reg: regInfo{
29182 inputs: []inputInfo{
29183 {0, 1073733630},
29184 },
29185 outputs: []outputInfo{
29186 {0, 1073733624},
29187 },
29188 },
29189 },
29190 {
29191 name: "CNTTZW",
29192 argLen: 1,
29193 asm: ppc64.ACNTTZW,
29194 reg: regInfo{
29195 inputs: []inputInfo{
29196 {0, 1073733630},
29197 },
29198 outputs: []outputInfo{
29199 {0, 1073733624},
29200 },
29201 },
29202 },
29203 {
29204 name: "POPCNTD",
29205 argLen: 1,
29206 asm: ppc64.APOPCNTD,
29207 reg: regInfo{
29208 inputs: []inputInfo{
29209 {0, 1073733630},
29210 },
29211 outputs: []outputInfo{
29212 {0, 1073733624},
29213 },
29214 },
29215 },
29216 {
29217 name: "POPCNTW",
29218 argLen: 1,
29219 asm: ppc64.APOPCNTW,
29220 reg: regInfo{
29221 inputs: []inputInfo{
29222 {0, 1073733630},
29223 },
29224 outputs: []outputInfo{
29225 {0, 1073733624},
29226 },
29227 },
29228 },
29229 {
29230 name: "POPCNTB",
29231 argLen: 1,
29232 asm: ppc64.APOPCNTB,
29233 reg: regInfo{
29234 inputs: []inputInfo{
29235 {0, 1073733630},
29236 },
29237 outputs: []outputInfo{
29238 {0, 1073733624},
29239 },
29240 },
29241 },
29242 {
29243 name: "FDIV",
29244 argLen: 2,
29245 asm: ppc64.AFDIV,
29246 reg: regInfo{
29247 inputs: []inputInfo{
29248 {0, 9223372032559808512},
29249 {1, 9223372032559808512},
29250 },
29251 outputs: []outputInfo{
29252 {0, 9223372032559808512},
29253 },
29254 },
29255 },
29256 {
29257 name: "FDIVS",
29258 argLen: 2,
29259 asm: ppc64.AFDIVS,
29260 reg: regInfo{
29261 inputs: []inputInfo{
29262 {0, 9223372032559808512},
29263 {1, 9223372032559808512},
29264 },
29265 outputs: []outputInfo{
29266 {0, 9223372032559808512},
29267 },
29268 },
29269 },
29270 {
29271 name: "DIVD",
29272 argLen: 2,
29273 asm: ppc64.ADIVD,
29274 reg: regInfo{
29275 inputs: []inputInfo{
29276 {0, 1073733630},
29277 {1, 1073733630},
29278 },
29279 outputs: []outputInfo{
29280 {0, 1073733624},
29281 },
29282 },
29283 },
29284 {
29285 name: "DIVW",
29286 argLen: 2,
29287 asm: ppc64.ADIVW,
29288 reg: regInfo{
29289 inputs: []inputInfo{
29290 {0, 1073733630},
29291 {1, 1073733630},
29292 },
29293 outputs: []outputInfo{
29294 {0, 1073733624},
29295 },
29296 },
29297 },
29298 {
29299 name: "DIVDU",
29300 argLen: 2,
29301 asm: ppc64.ADIVDU,
29302 reg: regInfo{
29303 inputs: []inputInfo{
29304 {0, 1073733630},
29305 {1, 1073733630},
29306 },
29307 outputs: []outputInfo{
29308 {0, 1073733624},
29309 },
29310 },
29311 },
29312 {
29313 name: "DIVWU",
29314 argLen: 2,
29315 asm: ppc64.ADIVWU,
29316 reg: regInfo{
29317 inputs: []inputInfo{
29318 {0, 1073733630},
29319 {1, 1073733630},
29320 },
29321 outputs: []outputInfo{
29322 {0, 1073733624},
29323 },
29324 },
29325 },
29326 {
29327 name: "MODUD",
29328 argLen: 2,
29329 asm: ppc64.AMODUD,
29330 reg: regInfo{
29331 inputs: []inputInfo{
29332 {0, 1073733630},
29333 {1, 1073733630},
29334 },
29335 outputs: []outputInfo{
29336 {0, 1073733624},
29337 },
29338 },
29339 },
29340 {
29341 name: "MODSD",
29342 argLen: 2,
29343 asm: ppc64.AMODSD,
29344 reg: regInfo{
29345 inputs: []inputInfo{
29346 {0, 1073733630},
29347 {1, 1073733630},
29348 },
29349 outputs: []outputInfo{
29350 {0, 1073733624},
29351 },
29352 },
29353 },
29354 {
29355 name: "MODUW",
29356 argLen: 2,
29357 asm: ppc64.AMODUW,
29358 reg: regInfo{
29359 inputs: []inputInfo{
29360 {0, 1073733630},
29361 {1, 1073733630},
29362 },
29363 outputs: []outputInfo{
29364 {0, 1073733624},
29365 },
29366 },
29367 },
29368 {
29369 name: "MODSW",
29370 argLen: 2,
29371 asm: ppc64.AMODSW,
29372 reg: regInfo{
29373 inputs: []inputInfo{
29374 {0, 1073733630},
29375 {1, 1073733630},
29376 },
29377 outputs: []outputInfo{
29378 {0, 1073733624},
29379 },
29380 },
29381 },
29382 {
29383 name: "FCTIDZ",
29384 argLen: 1,
29385 asm: ppc64.AFCTIDZ,
29386 reg: regInfo{
29387 inputs: []inputInfo{
29388 {0, 9223372032559808512},
29389 },
29390 outputs: []outputInfo{
29391 {0, 9223372032559808512},
29392 },
29393 },
29394 },
29395 {
29396 name: "FCTIWZ",
29397 argLen: 1,
29398 asm: ppc64.AFCTIWZ,
29399 reg: regInfo{
29400 inputs: []inputInfo{
29401 {0, 9223372032559808512},
29402 },
29403 outputs: []outputInfo{
29404 {0, 9223372032559808512},
29405 },
29406 },
29407 },
29408 {
29409 name: "FCFID",
29410 argLen: 1,
29411 asm: ppc64.AFCFID,
29412 reg: regInfo{
29413 inputs: []inputInfo{
29414 {0, 9223372032559808512},
29415 },
29416 outputs: []outputInfo{
29417 {0, 9223372032559808512},
29418 },
29419 },
29420 },
29421 {
29422 name: "FCFIDS",
29423 argLen: 1,
29424 asm: ppc64.AFCFIDS,
29425 reg: regInfo{
29426 inputs: []inputInfo{
29427 {0, 9223372032559808512},
29428 },
29429 outputs: []outputInfo{
29430 {0, 9223372032559808512},
29431 },
29432 },
29433 },
29434 {
29435 name: "FRSP",
29436 argLen: 1,
29437 asm: ppc64.AFRSP,
29438 reg: regInfo{
29439 inputs: []inputInfo{
29440 {0, 9223372032559808512},
29441 },
29442 outputs: []outputInfo{
29443 {0, 9223372032559808512},
29444 },
29445 },
29446 },
29447 {
29448 name: "MFVSRD",
29449 argLen: 1,
29450 asm: ppc64.AMFVSRD,
29451 reg: regInfo{
29452 inputs: []inputInfo{
29453 {0, 9223372032559808512},
29454 },
29455 outputs: []outputInfo{
29456 {0, 1073733624},
29457 },
29458 },
29459 },
29460 {
29461 name: "MTVSRD",
29462 argLen: 1,
29463 asm: ppc64.AMTVSRD,
29464 reg: regInfo{
29465 inputs: []inputInfo{
29466 {0, 1073733624},
29467 },
29468 outputs: []outputInfo{
29469 {0, 9223372032559808512},
29470 },
29471 },
29472 },
29473 {
29474 name: "AND",
29475 argLen: 2,
29476 commutative: true,
29477 asm: ppc64.AAND,
29478 reg: regInfo{
29479 inputs: []inputInfo{
29480 {0, 1073733630},
29481 {1, 1073733630},
29482 },
29483 outputs: []outputInfo{
29484 {0, 1073733624},
29485 },
29486 },
29487 },
29488 {
29489 name: "ANDN",
29490 argLen: 2,
29491 asm: ppc64.AANDN,
29492 reg: regInfo{
29493 inputs: []inputInfo{
29494 {0, 1073733630},
29495 {1, 1073733630},
29496 },
29497 outputs: []outputInfo{
29498 {0, 1073733624},
29499 },
29500 },
29501 },
29502 {
29503 name: "ANDNCC",
29504 argLen: 2,
29505 asm: ppc64.AANDNCC,
29506 reg: regInfo{
29507 inputs: []inputInfo{
29508 {0, 1073733630},
29509 {1, 1073733630},
29510 },
29511 outputs: []outputInfo{
29512 {0, 1073733624},
29513 },
29514 },
29515 },
29516 {
29517 name: "ANDCC",
29518 argLen: 2,
29519 commutative: true,
29520 asm: ppc64.AANDCC,
29521 reg: regInfo{
29522 inputs: []inputInfo{
29523 {0, 1073733630},
29524 {1, 1073733630},
29525 },
29526 outputs: []outputInfo{
29527 {0, 1073733624},
29528 },
29529 },
29530 },
29531 {
29532 name: "OR",
29533 argLen: 2,
29534 commutative: true,
29535 asm: ppc64.AOR,
29536 reg: regInfo{
29537 inputs: []inputInfo{
29538 {0, 1073733630},
29539 {1, 1073733630},
29540 },
29541 outputs: []outputInfo{
29542 {0, 1073733624},
29543 },
29544 },
29545 },
29546 {
29547 name: "ORN",
29548 argLen: 2,
29549 asm: ppc64.AORN,
29550 reg: regInfo{
29551 inputs: []inputInfo{
29552 {0, 1073733630},
29553 {1, 1073733630},
29554 },
29555 outputs: []outputInfo{
29556 {0, 1073733624},
29557 },
29558 },
29559 },
29560 {
29561 name: "ORCC",
29562 argLen: 2,
29563 commutative: true,
29564 asm: ppc64.AORCC,
29565 reg: regInfo{
29566 inputs: []inputInfo{
29567 {0, 1073733630},
29568 {1, 1073733630},
29569 },
29570 outputs: []outputInfo{
29571 {0, 1073733624},
29572 },
29573 },
29574 },
29575 {
29576 name: "NOR",
29577 argLen: 2,
29578 commutative: true,
29579 asm: ppc64.ANOR,
29580 reg: regInfo{
29581 inputs: []inputInfo{
29582 {0, 1073733630},
29583 {1, 1073733630},
29584 },
29585 outputs: []outputInfo{
29586 {0, 1073733624},
29587 },
29588 },
29589 },
29590 {
29591 name: "NORCC",
29592 argLen: 2,
29593 commutative: true,
29594 asm: ppc64.ANORCC,
29595 reg: regInfo{
29596 inputs: []inputInfo{
29597 {0, 1073733630},
29598 {1, 1073733630},
29599 },
29600 outputs: []outputInfo{
29601 {0, 1073733624},
29602 },
29603 },
29604 },
29605 {
29606 name: "XOR",
29607 argLen: 2,
29608 commutative: true,
29609 asm: ppc64.AXOR,
29610 reg: regInfo{
29611 inputs: []inputInfo{
29612 {0, 1073733630},
29613 {1, 1073733630},
29614 },
29615 outputs: []outputInfo{
29616 {0, 1073733624},
29617 },
29618 },
29619 },
29620 {
29621 name: "XORCC",
29622 argLen: 2,
29623 commutative: true,
29624 asm: ppc64.AXORCC,
29625 reg: regInfo{
29626 inputs: []inputInfo{
29627 {0, 1073733630},
29628 {1, 1073733630},
29629 },
29630 outputs: []outputInfo{
29631 {0, 1073733624},
29632 },
29633 },
29634 },
29635 {
29636 name: "EQV",
29637 argLen: 2,
29638 commutative: true,
29639 asm: ppc64.AEQV,
29640 reg: regInfo{
29641 inputs: []inputInfo{
29642 {0, 1073733630},
29643 {1, 1073733630},
29644 },
29645 outputs: []outputInfo{
29646 {0, 1073733624},
29647 },
29648 },
29649 },
29650 {
29651 name: "NEG",
29652 argLen: 1,
29653 asm: ppc64.ANEG,
29654 reg: regInfo{
29655 inputs: []inputInfo{
29656 {0, 1073733630},
29657 },
29658 outputs: []outputInfo{
29659 {0, 1073733624},
29660 },
29661 },
29662 },
29663 {
29664 name: "NEGCC",
29665 argLen: 1,
29666 asm: ppc64.ANEGCC,
29667 reg: regInfo{
29668 inputs: []inputInfo{
29669 {0, 1073733630},
29670 },
29671 outputs: []outputInfo{
29672 {0, 1073733624},
29673 },
29674 },
29675 },
29676 {
29677 name: "BRD",
29678 argLen: 1,
29679 asm: ppc64.ABRD,
29680 reg: regInfo{
29681 inputs: []inputInfo{
29682 {0, 1073733630},
29683 },
29684 outputs: []outputInfo{
29685 {0, 1073733624},
29686 },
29687 },
29688 },
29689 {
29690 name: "BRW",
29691 argLen: 1,
29692 asm: ppc64.ABRW,
29693 reg: regInfo{
29694 inputs: []inputInfo{
29695 {0, 1073733630},
29696 },
29697 outputs: []outputInfo{
29698 {0, 1073733624},
29699 },
29700 },
29701 },
29702 {
29703 name: "BRH",
29704 argLen: 1,
29705 asm: ppc64.ABRH,
29706 reg: regInfo{
29707 inputs: []inputInfo{
29708 {0, 1073733630},
29709 },
29710 outputs: []outputInfo{
29711 {0, 1073733624},
29712 },
29713 },
29714 },
29715 {
29716 name: "FNEG",
29717 argLen: 1,
29718 asm: ppc64.AFNEG,
29719 reg: regInfo{
29720 inputs: []inputInfo{
29721 {0, 9223372032559808512},
29722 },
29723 outputs: []outputInfo{
29724 {0, 9223372032559808512},
29725 },
29726 },
29727 },
29728 {
29729 name: "FSQRT",
29730 argLen: 1,
29731 asm: ppc64.AFSQRT,
29732 reg: regInfo{
29733 inputs: []inputInfo{
29734 {0, 9223372032559808512},
29735 },
29736 outputs: []outputInfo{
29737 {0, 9223372032559808512},
29738 },
29739 },
29740 },
29741 {
29742 name: "FSQRTS",
29743 argLen: 1,
29744 asm: ppc64.AFSQRTS,
29745 reg: regInfo{
29746 inputs: []inputInfo{
29747 {0, 9223372032559808512},
29748 },
29749 outputs: []outputInfo{
29750 {0, 9223372032559808512},
29751 },
29752 },
29753 },
29754 {
29755 name: "FFLOOR",
29756 argLen: 1,
29757 asm: ppc64.AFRIM,
29758 reg: regInfo{
29759 inputs: []inputInfo{
29760 {0, 9223372032559808512},
29761 },
29762 outputs: []outputInfo{
29763 {0, 9223372032559808512},
29764 },
29765 },
29766 },
29767 {
29768 name: "FCEIL",
29769 argLen: 1,
29770 asm: ppc64.AFRIP,
29771 reg: regInfo{
29772 inputs: []inputInfo{
29773 {0, 9223372032559808512},
29774 },
29775 outputs: []outputInfo{
29776 {0, 9223372032559808512},
29777 },
29778 },
29779 },
29780 {
29781 name: "FTRUNC",
29782 argLen: 1,
29783 asm: ppc64.AFRIZ,
29784 reg: regInfo{
29785 inputs: []inputInfo{
29786 {0, 9223372032559808512},
29787 },
29788 outputs: []outputInfo{
29789 {0, 9223372032559808512},
29790 },
29791 },
29792 },
29793 {
29794 name: "FROUND",
29795 argLen: 1,
29796 asm: ppc64.AFRIN,
29797 reg: regInfo{
29798 inputs: []inputInfo{
29799 {0, 9223372032559808512},
29800 },
29801 outputs: []outputInfo{
29802 {0, 9223372032559808512},
29803 },
29804 },
29805 },
29806 {
29807 name: "FABS",
29808 argLen: 1,
29809 asm: ppc64.AFABS,
29810 reg: regInfo{
29811 inputs: []inputInfo{
29812 {0, 9223372032559808512},
29813 },
29814 outputs: []outputInfo{
29815 {0, 9223372032559808512},
29816 },
29817 },
29818 },
29819 {
29820 name: "FNABS",
29821 argLen: 1,
29822 asm: ppc64.AFNABS,
29823 reg: regInfo{
29824 inputs: []inputInfo{
29825 {0, 9223372032559808512},
29826 },
29827 outputs: []outputInfo{
29828 {0, 9223372032559808512},
29829 },
29830 },
29831 },
29832 {
29833 name: "FCPSGN",
29834 argLen: 2,
29835 asm: ppc64.AFCPSGN,
29836 reg: regInfo{
29837 inputs: []inputInfo{
29838 {0, 9223372032559808512},
29839 {1, 9223372032559808512},
29840 },
29841 outputs: []outputInfo{
29842 {0, 9223372032559808512},
29843 },
29844 },
29845 },
29846 {
29847 name: "ORconst",
29848 auxType: auxInt64,
29849 argLen: 1,
29850 asm: ppc64.AOR,
29851 reg: regInfo{
29852 inputs: []inputInfo{
29853 {0, 1073733630},
29854 },
29855 outputs: []outputInfo{
29856 {0, 1073733624},
29857 },
29858 },
29859 },
29860 {
29861 name: "XORconst",
29862 auxType: auxInt64,
29863 argLen: 1,
29864 asm: ppc64.AXOR,
29865 reg: regInfo{
29866 inputs: []inputInfo{
29867 {0, 1073733630},
29868 },
29869 outputs: []outputInfo{
29870 {0, 1073733624},
29871 },
29872 },
29873 },
29874 {
29875 name: "ANDCCconst",
29876 auxType: auxInt64,
29877 argLen: 1,
29878 asm: ppc64.AANDCC,
29879 reg: regInfo{
29880 inputs: []inputInfo{
29881 {0, 1073733630},
29882 },
29883 outputs: []outputInfo{
29884 {0, 1073733624},
29885 },
29886 },
29887 },
29888 {
29889 name: "MOVBreg",
29890 argLen: 1,
29891 asm: ppc64.AMOVB,
29892 reg: regInfo{
29893 inputs: []inputInfo{
29894 {0, 1073733630},
29895 },
29896 outputs: []outputInfo{
29897 {0, 1073733624},
29898 },
29899 },
29900 },
29901 {
29902 name: "MOVBZreg",
29903 argLen: 1,
29904 asm: ppc64.AMOVBZ,
29905 reg: regInfo{
29906 inputs: []inputInfo{
29907 {0, 1073733630},
29908 },
29909 outputs: []outputInfo{
29910 {0, 1073733624},
29911 },
29912 },
29913 },
29914 {
29915 name: "MOVHreg",
29916 argLen: 1,
29917 asm: ppc64.AMOVH,
29918 reg: regInfo{
29919 inputs: []inputInfo{
29920 {0, 1073733630},
29921 },
29922 outputs: []outputInfo{
29923 {0, 1073733624},
29924 },
29925 },
29926 },
29927 {
29928 name: "MOVHZreg",
29929 argLen: 1,
29930 asm: ppc64.AMOVHZ,
29931 reg: regInfo{
29932 inputs: []inputInfo{
29933 {0, 1073733630},
29934 },
29935 outputs: []outputInfo{
29936 {0, 1073733624},
29937 },
29938 },
29939 },
29940 {
29941 name: "MOVWreg",
29942 argLen: 1,
29943 asm: ppc64.AMOVW,
29944 reg: regInfo{
29945 inputs: []inputInfo{
29946 {0, 1073733630},
29947 },
29948 outputs: []outputInfo{
29949 {0, 1073733624},
29950 },
29951 },
29952 },
29953 {
29954 name: "MOVWZreg",
29955 argLen: 1,
29956 asm: ppc64.AMOVWZ,
29957 reg: regInfo{
29958 inputs: []inputInfo{
29959 {0, 1073733630},
29960 },
29961 outputs: []outputInfo{
29962 {0, 1073733624},
29963 },
29964 },
29965 },
29966 {
29967 name: "MOVBZload",
29968 auxType: auxSymOff,
29969 argLen: 2,
29970 faultOnNilArg0: true,
29971 symEffect: SymRead,
29972 asm: ppc64.AMOVBZ,
29973 reg: regInfo{
29974 inputs: []inputInfo{
29975 {0, 1073733630},
29976 },
29977 outputs: []outputInfo{
29978 {0, 1073733624},
29979 },
29980 },
29981 },
29982 {
29983 name: "MOVHload",
29984 auxType: auxSymOff,
29985 argLen: 2,
29986 faultOnNilArg0: true,
29987 symEffect: SymRead,
29988 asm: ppc64.AMOVH,
29989 reg: regInfo{
29990 inputs: []inputInfo{
29991 {0, 1073733630},
29992 },
29993 outputs: []outputInfo{
29994 {0, 1073733624},
29995 },
29996 },
29997 },
29998 {
29999 name: "MOVHZload",
30000 auxType: auxSymOff,
30001 argLen: 2,
30002 faultOnNilArg0: true,
30003 symEffect: SymRead,
30004 asm: ppc64.AMOVHZ,
30005 reg: regInfo{
30006 inputs: []inputInfo{
30007 {0, 1073733630},
30008 },
30009 outputs: []outputInfo{
30010 {0, 1073733624},
30011 },
30012 },
30013 },
30014 {
30015 name: "MOVWload",
30016 auxType: auxSymOff,
30017 argLen: 2,
30018 faultOnNilArg0: true,
30019 symEffect: SymRead,
30020 asm: ppc64.AMOVW,
30021 reg: regInfo{
30022 inputs: []inputInfo{
30023 {0, 1073733630},
30024 },
30025 outputs: []outputInfo{
30026 {0, 1073733624},
30027 },
30028 },
30029 },
30030 {
30031 name: "MOVWZload",
30032 auxType: auxSymOff,
30033 argLen: 2,
30034 faultOnNilArg0: true,
30035 symEffect: SymRead,
30036 asm: ppc64.AMOVWZ,
30037 reg: regInfo{
30038 inputs: []inputInfo{
30039 {0, 1073733630},
30040 },
30041 outputs: []outputInfo{
30042 {0, 1073733624},
30043 },
30044 },
30045 },
30046 {
30047 name: "MOVDload",
30048 auxType: auxSymOff,
30049 argLen: 2,
30050 faultOnNilArg0: true,
30051 symEffect: SymRead,
30052 asm: ppc64.AMOVD,
30053 reg: regInfo{
30054 inputs: []inputInfo{
30055 {0, 1073733630},
30056 },
30057 outputs: []outputInfo{
30058 {0, 1073733624},
30059 },
30060 },
30061 },
30062 {
30063 name: "MOVDBRload",
30064 argLen: 2,
30065 faultOnNilArg0: true,
30066 asm: ppc64.AMOVDBR,
30067 reg: regInfo{
30068 inputs: []inputInfo{
30069 {0, 1073733630},
30070 },
30071 outputs: []outputInfo{
30072 {0, 1073733624},
30073 },
30074 },
30075 },
30076 {
30077 name: "MOVWBRload",
30078 argLen: 2,
30079 faultOnNilArg0: true,
30080 asm: ppc64.AMOVWBR,
30081 reg: regInfo{
30082 inputs: []inputInfo{
30083 {0, 1073733630},
30084 },
30085 outputs: []outputInfo{
30086 {0, 1073733624},
30087 },
30088 },
30089 },
30090 {
30091 name: "MOVHBRload",
30092 argLen: 2,
30093 faultOnNilArg0: true,
30094 asm: ppc64.AMOVHBR,
30095 reg: regInfo{
30096 inputs: []inputInfo{
30097 {0, 1073733630},
30098 },
30099 outputs: []outputInfo{
30100 {0, 1073733624},
30101 },
30102 },
30103 },
30104 {
30105 name: "MOVBZloadidx",
30106 argLen: 3,
30107 asm: ppc64.AMOVBZ,
30108 reg: regInfo{
30109 inputs: []inputInfo{
30110 {1, 1073733624},
30111 {0, 1073733630},
30112 },
30113 outputs: []outputInfo{
30114 {0, 1073733624},
30115 },
30116 },
30117 },
30118 {
30119 name: "MOVHloadidx",
30120 argLen: 3,
30121 asm: ppc64.AMOVH,
30122 reg: regInfo{
30123 inputs: []inputInfo{
30124 {1, 1073733624},
30125 {0, 1073733630},
30126 },
30127 outputs: []outputInfo{
30128 {0, 1073733624},
30129 },
30130 },
30131 },
30132 {
30133 name: "MOVHZloadidx",
30134 argLen: 3,
30135 asm: ppc64.AMOVHZ,
30136 reg: regInfo{
30137 inputs: []inputInfo{
30138 {1, 1073733624},
30139 {0, 1073733630},
30140 },
30141 outputs: []outputInfo{
30142 {0, 1073733624},
30143 },
30144 },
30145 },
30146 {
30147 name: "MOVWloadidx",
30148 argLen: 3,
30149 asm: ppc64.AMOVW,
30150 reg: regInfo{
30151 inputs: []inputInfo{
30152 {1, 1073733624},
30153 {0, 1073733630},
30154 },
30155 outputs: []outputInfo{
30156 {0, 1073733624},
30157 },
30158 },
30159 },
30160 {
30161 name: "MOVWZloadidx",
30162 argLen: 3,
30163 asm: ppc64.AMOVWZ,
30164 reg: regInfo{
30165 inputs: []inputInfo{
30166 {1, 1073733624},
30167 {0, 1073733630},
30168 },
30169 outputs: []outputInfo{
30170 {0, 1073733624},
30171 },
30172 },
30173 },
30174 {
30175 name: "MOVDloadidx",
30176 argLen: 3,
30177 asm: ppc64.AMOVD,
30178 reg: regInfo{
30179 inputs: []inputInfo{
30180 {1, 1073733624},
30181 {0, 1073733630},
30182 },
30183 outputs: []outputInfo{
30184 {0, 1073733624},
30185 },
30186 },
30187 },
30188 {
30189 name: "MOVHBRloadidx",
30190 argLen: 3,
30191 asm: ppc64.AMOVHBR,
30192 reg: regInfo{
30193 inputs: []inputInfo{
30194 {1, 1073733624},
30195 {0, 1073733630},
30196 },
30197 outputs: []outputInfo{
30198 {0, 1073733624},
30199 },
30200 },
30201 },
30202 {
30203 name: "MOVWBRloadidx",
30204 argLen: 3,
30205 asm: ppc64.AMOVWBR,
30206 reg: regInfo{
30207 inputs: []inputInfo{
30208 {1, 1073733624},
30209 {0, 1073733630},
30210 },
30211 outputs: []outputInfo{
30212 {0, 1073733624},
30213 },
30214 },
30215 },
30216 {
30217 name: "MOVDBRloadidx",
30218 argLen: 3,
30219 asm: ppc64.AMOVDBR,
30220 reg: regInfo{
30221 inputs: []inputInfo{
30222 {1, 1073733624},
30223 {0, 1073733630},
30224 },
30225 outputs: []outputInfo{
30226 {0, 1073733624},
30227 },
30228 },
30229 },
30230 {
30231 name: "FMOVDloadidx",
30232 argLen: 3,
30233 asm: ppc64.AFMOVD,
30234 reg: regInfo{
30235 inputs: []inputInfo{
30236 {0, 1073733630},
30237 {1, 1073733630},
30238 },
30239 outputs: []outputInfo{
30240 {0, 9223372032559808512},
30241 },
30242 },
30243 },
30244 {
30245 name: "FMOVSloadidx",
30246 argLen: 3,
30247 asm: ppc64.AFMOVS,
30248 reg: regInfo{
30249 inputs: []inputInfo{
30250 {0, 1073733630},
30251 {1, 1073733630},
30252 },
30253 outputs: []outputInfo{
30254 {0, 9223372032559808512},
30255 },
30256 },
30257 },
30258 {
30259 name: "DCBT",
30260 auxType: auxInt64,
30261 argLen: 2,
30262 hasSideEffects: true,
30263 asm: ppc64.ADCBT,
30264 reg: regInfo{
30265 inputs: []inputInfo{
30266 {0, 1073733630},
30267 },
30268 },
30269 },
30270 {
30271 name: "MOVDBRstore",
30272 argLen: 3,
30273 faultOnNilArg0: true,
30274 asm: ppc64.AMOVDBR,
30275 reg: regInfo{
30276 inputs: []inputInfo{
30277 {0, 1073733630},
30278 {1, 1073733630},
30279 },
30280 },
30281 },
30282 {
30283 name: "MOVWBRstore",
30284 argLen: 3,
30285 faultOnNilArg0: true,
30286 asm: ppc64.AMOVWBR,
30287 reg: regInfo{
30288 inputs: []inputInfo{
30289 {0, 1073733630},
30290 {1, 1073733630},
30291 },
30292 },
30293 },
30294 {
30295 name: "MOVHBRstore",
30296 argLen: 3,
30297 faultOnNilArg0: true,
30298 asm: ppc64.AMOVHBR,
30299 reg: regInfo{
30300 inputs: []inputInfo{
30301 {0, 1073733630},
30302 {1, 1073733630},
30303 },
30304 },
30305 },
30306 {
30307 name: "FMOVDload",
30308 auxType: auxSymOff,
30309 argLen: 2,
30310 faultOnNilArg0: true,
30311 symEffect: SymRead,
30312 asm: ppc64.AFMOVD,
30313 reg: regInfo{
30314 inputs: []inputInfo{
30315 {0, 1073733630},
30316 },
30317 outputs: []outputInfo{
30318 {0, 9223372032559808512},
30319 },
30320 },
30321 },
30322 {
30323 name: "FMOVSload",
30324 auxType: auxSymOff,
30325 argLen: 2,
30326 faultOnNilArg0: true,
30327 symEffect: SymRead,
30328 asm: ppc64.AFMOVS,
30329 reg: regInfo{
30330 inputs: []inputInfo{
30331 {0, 1073733630},
30332 },
30333 outputs: []outputInfo{
30334 {0, 9223372032559808512},
30335 },
30336 },
30337 },
30338 {
30339 name: "MOVBstore",
30340 auxType: auxSymOff,
30341 argLen: 3,
30342 faultOnNilArg0: true,
30343 symEffect: SymWrite,
30344 asm: ppc64.AMOVB,
30345 reg: regInfo{
30346 inputs: []inputInfo{
30347 {0, 1073733630},
30348 {1, 1073733630},
30349 },
30350 },
30351 },
30352 {
30353 name: "MOVHstore",
30354 auxType: auxSymOff,
30355 argLen: 3,
30356 faultOnNilArg0: true,
30357 symEffect: SymWrite,
30358 asm: ppc64.AMOVH,
30359 reg: regInfo{
30360 inputs: []inputInfo{
30361 {0, 1073733630},
30362 {1, 1073733630},
30363 },
30364 },
30365 },
30366 {
30367 name: "MOVWstore",
30368 auxType: auxSymOff,
30369 argLen: 3,
30370 faultOnNilArg0: true,
30371 symEffect: SymWrite,
30372 asm: ppc64.AMOVW,
30373 reg: regInfo{
30374 inputs: []inputInfo{
30375 {0, 1073733630},
30376 {1, 1073733630},
30377 },
30378 },
30379 },
30380 {
30381 name: "MOVDstore",
30382 auxType: auxSymOff,
30383 argLen: 3,
30384 faultOnNilArg0: true,
30385 symEffect: SymWrite,
30386 asm: ppc64.AMOVD,
30387 reg: regInfo{
30388 inputs: []inputInfo{
30389 {0, 1073733630},
30390 {1, 1073733630},
30391 },
30392 },
30393 },
30394 {
30395 name: "FMOVDstore",
30396 auxType: auxSymOff,
30397 argLen: 3,
30398 faultOnNilArg0: true,
30399 symEffect: SymWrite,
30400 asm: ppc64.AFMOVD,
30401 reg: regInfo{
30402 inputs: []inputInfo{
30403 {0, 1073733630},
30404 {1, 9223372032559808512},
30405 },
30406 },
30407 },
30408 {
30409 name: "FMOVSstore",
30410 auxType: auxSymOff,
30411 argLen: 3,
30412 faultOnNilArg0: true,
30413 symEffect: SymWrite,
30414 asm: ppc64.AFMOVS,
30415 reg: regInfo{
30416 inputs: []inputInfo{
30417 {0, 1073733630},
30418 {1, 9223372032559808512},
30419 },
30420 },
30421 },
30422 {
30423 name: "MOVBstoreidx",
30424 argLen: 4,
30425 asm: ppc64.AMOVB,
30426 reg: regInfo{
30427 inputs: []inputInfo{
30428 {0, 1073733630},
30429 {1, 1073733630},
30430 {2, 1073733630},
30431 },
30432 },
30433 },
30434 {
30435 name: "MOVHstoreidx",
30436 argLen: 4,
30437 asm: ppc64.AMOVH,
30438 reg: regInfo{
30439 inputs: []inputInfo{
30440 {0, 1073733630},
30441 {1, 1073733630},
30442 {2, 1073733630},
30443 },
30444 },
30445 },
30446 {
30447 name: "MOVWstoreidx",
30448 argLen: 4,
30449 asm: ppc64.AMOVW,
30450 reg: regInfo{
30451 inputs: []inputInfo{
30452 {0, 1073733630},
30453 {1, 1073733630},
30454 {2, 1073733630},
30455 },
30456 },
30457 },
30458 {
30459 name: "MOVDstoreidx",
30460 argLen: 4,
30461 asm: ppc64.AMOVD,
30462 reg: regInfo{
30463 inputs: []inputInfo{
30464 {0, 1073733630},
30465 {1, 1073733630},
30466 {2, 1073733630},
30467 },
30468 },
30469 },
30470 {
30471 name: "FMOVDstoreidx",
30472 argLen: 4,
30473 asm: ppc64.AFMOVD,
30474 reg: regInfo{
30475 inputs: []inputInfo{
30476 {0, 1073733630},
30477 {1, 1073733630},
30478 {2, 9223372032559808512},
30479 },
30480 },
30481 },
30482 {
30483 name: "FMOVSstoreidx",
30484 argLen: 4,
30485 asm: ppc64.AFMOVS,
30486 reg: regInfo{
30487 inputs: []inputInfo{
30488 {0, 1073733630},
30489 {1, 1073733630},
30490 {2, 9223372032559808512},
30491 },
30492 },
30493 },
30494 {
30495 name: "MOVHBRstoreidx",
30496 argLen: 4,
30497 asm: ppc64.AMOVHBR,
30498 reg: regInfo{
30499 inputs: []inputInfo{
30500 {0, 1073733630},
30501 {1, 1073733630},
30502 {2, 1073733630},
30503 },
30504 },
30505 },
30506 {
30507 name: "MOVWBRstoreidx",
30508 argLen: 4,
30509 asm: ppc64.AMOVWBR,
30510 reg: regInfo{
30511 inputs: []inputInfo{
30512 {0, 1073733630},
30513 {1, 1073733630},
30514 {2, 1073733630},
30515 },
30516 },
30517 },
30518 {
30519 name: "MOVDBRstoreidx",
30520 argLen: 4,
30521 asm: ppc64.AMOVDBR,
30522 reg: regInfo{
30523 inputs: []inputInfo{
30524 {0, 1073733630},
30525 {1, 1073733630},
30526 {2, 1073733630},
30527 },
30528 },
30529 },
30530 {
30531 name: "MOVBstorezero",
30532 auxType: auxSymOff,
30533 argLen: 2,
30534 faultOnNilArg0: true,
30535 symEffect: SymWrite,
30536 asm: ppc64.AMOVB,
30537 reg: regInfo{
30538 inputs: []inputInfo{
30539 {0, 1073733630},
30540 },
30541 },
30542 },
30543 {
30544 name: "MOVHstorezero",
30545 auxType: auxSymOff,
30546 argLen: 2,
30547 faultOnNilArg0: true,
30548 symEffect: SymWrite,
30549 asm: ppc64.AMOVH,
30550 reg: regInfo{
30551 inputs: []inputInfo{
30552 {0, 1073733630},
30553 },
30554 },
30555 },
30556 {
30557 name: "MOVWstorezero",
30558 auxType: auxSymOff,
30559 argLen: 2,
30560 faultOnNilArg0: true,
30561 symEffect: SymWrite,
30562 asm: ppc64.AMOVW,
30563 reg: regInfo{
30564 inputs: []inputInfo{
30565 {0, 1073733630},
30566 },
30567 },
30568 },
30569 {
30570 name: "MOVDstorezero",
30571 auxType: auxSymOff,
30572 argLen: 2,
30573 faultOnNilArg0: true,
30574 symEffect: SymWrite,
30575 asm: ppc64.AMOVD,
30576 reg: regInfo{
30577 inputs: []inputInfo{
30578 {0, 1073733630},
30579 },
30580 },
30581 },
30582 {
30583 name: "MOVDaddr",
30584 auxType: auxSymOff,
30585 argLen: 1,
30586 rematerializeable: true,
30587 symEffect: SymAddr,
30588 asm: ppc64.AMOVD,
30589 reg: regInfo{
30590 inputs: []inputInfo{
30591 {0, 1073733630},
30592 },
30593 outputs: []outputInfo{
30594 {0, 1073733624},
30595 },
30596 },
30597 },
30598 {
30599 name: "MOVDconst",
30600 auxType: auxInt64,
30601 argLen: 0,
30602 rematerializeable: true,
30603 asm: ppc64.AMOVD,
30604 reg: regInfo{
30605 outputs: []outputInfo{
30606 {0, 1073733624},
30607 },
30608 },
30609 },
30610 {
30611 name: "FMOVDconst",
30612 auxType: auxFloat64,
30613 argLen: 0,
30614 rematerializeable: true,
30615 asm: ppc64.AFMOVD,
30616 reg: regInfo{
30617 outputs: []outputInfo{
30618 {0, 9223372032559808512},
30619 },
30620 },
30621 },
30622 {
30623 name: "FMOVSconst",
30624 auxType: auxFloat32,
30625 argLen: 0,
30626 rematerializeable: true,
30627 asm: ppc64.AFMOVS,
30628 reg: regInfo{
30629 outputs: []outputInfo{
30630 {0, 9223372032559808512},
30631 },
30632 },
30633 },
30634 {
30635 name: "FCMPU",
30636 argLen: 2,
30637 asm: ppc64.AFCMPU,
30638 reg: regInfo{
30639 inputs: []inputInfo{
30640 {0, 9223372032559808512},
30641 {1, 9223372032559808512},
30642 },
30643 },
30644 },
30645 {
30646 name: "CMP",
30647 argLen: 2,
30648 asm: ppc64.ACMP,
30649 reg: regInfo{
30650 inputs: []inputInfo{
30651 {0, 1073733630},
30652 {1, 1073733630},
30653 },
30654 },
30655 },
30656 {
30657 name: "CMPU",
30658 argLen: 2,
30659 asm: ppc64.ACMPU,
30660 reg: regInfo{
30661 inputs: []inputInfo{
30662 {0, 1073733630},
30663 {1, 1073733630},
30664 },
30665 },
30666 },
30667 {
30668 name: "CMPW",
30669 argLen: 2,
30670 asm: ppc64.ACMPW,
30671 reg: regInfo{
30672 inputs: []inputInfo{
30673 {0, 1073733630},
30674 {1, 1073733630},
30675 },
30676 },
30677 },
30678 {
30679 name: "CMPWU",
30680 argLen: 2,
30681 asm: ppc64.ACMPWU,
30682 reg: regInfo{
30683 inputs: []inputInfo{
30684 {0, 1073733630},
30685 {1, 1073733630},
30686 },
30687 },
30688 },
30689 {
30690 name: "CMPconst",
30691 auxType: auxInt64,
30692 argLen: 1,
30693 asm: ppc64.ACMP,
30694 reg: regInfo{
30695 inputs: []inputInfo{
30696 {0, 1073733630},
30697 },
30698 },
30699 },
30700 {
30701 name: "CMPUconst",
30702 auxType: auxInt64,
30703 argLen: 1,
30704 asm: ppc64.ACMPU,
30705 reg: regInfo{
30706 inputs: []inputInfo{
30707 {0, 1073733630},
30708 },
30709 },
30710 },
30711 {
30712 name: "CMPWconst",
30713 auxType: auxInt32,
30714 argLen: 1,
30715 asm: ppc64.ACMPW,
30716 reg: regInfo{
30717 inputs: []inputInfo{
30718 {0, 1073733630},
30719 },
30720 },
30721 },
30722 {
30723 name: "CMPWUconst",
30724 auxType: auxInt32,
30725 argLen: 1,
30726 asm: ppc64.ACMPWU,
30727 reg: regInfo{
30728 inputs: []inputInfo{
30729 {0, 1073733630},
30730 },
30731 },
30732 },
30733 {
30734 name: "ISEL",
30735 auxType: auxInt32,
30736 argLen: 3,
30737 asm: ppc64.AISEL,
30738 reg: regInfo{
30739 inputs: []inputInfo{
30740 {0, 1073733624},
30741 {1, 1073733624},
30742 },
30743 outputs: []outputInfo{
30744 {0, 1073733624},
30745 },
30746 },
30747 },
30748 {
30749 name: "ISELZ",
30750 auxType: auxInt32,
30751 argLen: 2,
30752 asm: ppc64.AISEL,
30753 reg: regInfo{
30754 inputs: []inputInfo{
30755 {0, 1073733624},
30756 },
30757 outputs: []outputInfo{
30758 {0, 1073733624},
30759 },
30760 },
30761 },
30762 {
30763 name: "SETBC",
30764 auxType: auxInt32,
30765 argLen: 1,
30766 asm: ppc64.ASETBC,
30767 reg: regInfo{
30768 outputs: []outputInfo{
30769 {0, 1073733624},
30770 },
30771 },
30772 },
30773 {
30774 name: "SETBCR",
30775 auxType: auxInt32,
30776 argLen: 1,
30777 asm: ppc64.ASETBCR,
30778 reg: regInfo{
30779 outputs: []outputInfo{
30780 {0, 1073733624},
30781 },
30782 },
30783 },
30784 {
30785 name: "Equal",
30786 argLen: 1,
30787 reg: regInfo{
30788 outputs: []outputInfo{
30789 {0, 1073733624},
30790 },
30791 },
30792 },
30793 {
30794 name: "NotEqual",
30795 argLen: 1,
30796 reg: regInfo{
30797 outputs: []outputInfo{
30798 {0, 1073733624},
30799 },
30800 },
30801 },
30802 {
30803 name: "LessThan",
30804 argLen: 1,
30805 reg: regInfo{
30806 outputs: []outputInfo{
30807 {0, 1073733624},
30808 },
30809 },
30810 },
30811 {
30812 name: "FLessThan",
30813 argLen: 1,
30814 reg: regInfo{
30815 outputs: []outputInfo{
30816 {0, 1073733624},
30817 },
30818 },
30819 },
30820 {
30821 name: "LessEqual",
30822 argLen: 1,
30823 reg: regInfo{
30824 outputs: []outputInfo{
30825 {0, 1073733624},
30826 },
30827 },
30828 },
30829 {
30830 name: "FLessEqual",
30831 argLen: 1,
30832 reg: regInfo{
30833 outputs: []outputInfo{
30834 {0, 1073733624},
30835 },
30836 },
30837 },
30838 {
30839 name: "GreaterThan",
30840 argLen: 1,
30841 reg: regInfo{
30842 outputs: []outputInfo{
30843 {0, 1073733624},
30844 },
30845 },
30846 },
30847 {
30848 name: "FGreaterThan",
30849 argLen: 1,
30850 reg: regInfo{
30851 outputs: []outputInfo{
30852 {0, 1073733624},
30853 },
30854 },
30855 },
30856 {
30857 name: "GreaterEqual",
30858 argLen: 1,
30859 reg: regInfo{
30860 outputs: []outputInfo{
30861 {0, 1073733624},
30862 },
30863 },
30864 },
30865 {
30866 name: "FGreaterEqual",
30867 argLen: 1,
30868 reg: regInfo{
30869 outputs: []outputInfo{
30870 {0, 1073733624},
30871 },
30872 },
30873 },
30874 {
30875 name: "LoweredGetClosurePtr",
30876 argLen: 0,
30877 zeroWidth: true,
30878 reg: regInfo{
30879 outputs: []outputInfo{
30880 {0, 2048},
30881 },
30882 },
30883 },
30884 {
30885 name: "LoweredGetCallerSP",
30886 argLen: 1,
30887 rematerializeable: true,
30888 reg: regInfo{
30889 outputs: []outputInfo{
30890 {0, 1073733624},
30891 },
30892 },
30893 },
30894 {
30895 name: "LoweredGetCallerPC",
30896 argLen: 0,
30897 rematerializeable: true,
30898 reg: regInfo{
30899 outputs: []outputInfo{
30900 {0, 1073733624},
30901 },
30902 },
30903 },
30904 {
30905 name: "LoweredNilCheck",
30906 argLen: 2,
30907 clobberFlags: true,
30908 nilCheck: true,
30909 faultOnNilArg0: true,
30910 reg: regInfo{
30911 inputs: []inputInfo{
30912 {0, 1073733630},
30913 },
30914 clobbers: 2147483648,
30915 },
30916 },
30917 {
30918 name: "LoweredRound32F",
30919 argLen: 1,
30920 resultInArg0: true,
30921 zeroWidth: true,
30922 reg: regInfo{
30923 inputs: []inputInfo{
30924 {0, 9223372032559808512},
30925 },
30926 outputs: []outputInfo{
30927 {0, 9223372032559808512},
30928 },
30929 },
30930 },
30931 {
30932 name: "LoweredRound64F",
30933 argLen: 1,
30934 resultInArg0: true,
30935 zeroWidth: true,
30936 reg: regInfo{
30937 inputs: []inputInfo{
30938 {0, 9223372032559808512},
30939 },
30940 outputs: []outputInfo{
30941 {0, 9223372032559808512},
30942 },
30943 },
30944 },
30945 {
30946 name: "CALLstatic",
30947 auxType: auxCallOff,
30948 argLen: -1,
30949 clobberFlags: true,
30950 call: true,
30951 reg: regInfo{
30952 clobbers: 18446744071562059768,
30953 },
30954 },
30955 {
30956 name: "CALLtail",
30957 auxType: auxCallOff,
30958 argLen: -1,
30959 clobberFlags: true,
30960 call: true,
30961 tailCall: true,
30962 reg: regInfo{
30963 clobbers: 18446744071562059768,
30964 },
30965 },
30966 {
30967 name: "CALLclosure",
30968 auxType: auxCallOff,
30969 argLen: -1,
30970 clobberFlags: true,
30971 call: true,
30972 reg: regInfo{
30973 inputs: []inputInfo{
30974 {0, 4096},
30975 {1, 2048},
30976 },
30977 clobbers: 18446744071562059768,
30978 },
30979 },
30980 {
30981 name: "CALLinter",
30982 auxType: auxCallOff,
30983 argLen: -1,
30984 clobberFlags: true,
30985 call: true,
30986 reg: regInfo{
30987 inputs: []inputInfo{
30988 {0, 4096},
30989 },
30990 clobbers: 18446744071562059768,
30991 },
30992 },
30993 {
30994 name: "LoweredZero",
30995 auxType: auxInt64,
30996 argLen: 2,
30997 clobberFlags: true,
30998 faultOnNilArg0: true,
30999 unsafePoint: true,
31000 reg: regInfo{
31001 inputs: []inputInfo{
31002 {0, 1048576},
31003 },
31004 clobbers: 1048576,
31005 },
31006 },
31007 {
31008 name: "LoweredZeroShort",
31009 auxType: auxInt64,
31010 argLen: 2,
31011 faultOnNilArg0: true,
31012 unsafePoint: true,
31013 reg: regInfo{
31014 inputs: []inputInfo{
31015 {0, 1073733624},
31016 },
31017 },
31018 },
31019 {
31020 name: "LoweredQuadZeroShort",
31021 auxType: auxInt64,
31022 argLen: 2,
31023 faultOnNilArg0: true,
31024 unsafePoint: true,
31025 reg: regInfo{
31026 inputs: []inputInfo{
31027 {0, 1073733624},
31028 },
31029 },
31030 },
31031 {
31032 name: "LoweredQuadZero",
31033 auxType: auxInt64,
31034 argLen: 2,
31035 clobberFlags: true,
31036 faultOnNilArg0: true,
31037 unsafePoint: true,
31038 reg: regInfo{
31039 inputs: []inputInfo{
31040 {0, 1048576},
31041 },
31042 clobbers: 1048576,
31043 },
31044 },
31045 {
31046 name: "LoweredMove",
31047 auxType: auxInt64,
31048 argLen: 3,
31049 clobberFlags: true,
31050 faultOnNilArg0: true,
31051 faultOnNilArg1: true,
31052 unsafePoint: true,
31053 reg: regInfo{
31054 inputs: []inputInfo{
31055 {0, 1048576},
31056 {1, 2097152},
31057 },
31058 clobbers: 3145728,
31059 },
31060 },
31061 {
31062 name: "LoweredMoveShort",
31063 auxType: auxInt64,
31064 argLen: 3,
31065 faultOnNilArg0: true,
31066 faultOnNilArg1: true,
31067 unsafePoint: true,
31068 reg: regInfo{
31069 inputs: []inputInfo{
31070 {0, 1073733624},
31071 {1, 1073733624},
31072 },
31073 },
31074 },
31075 {
31076 name: "LoweredQuadMove",
31077 auxType: auxInt64,
31078 argLen: 3,
31079 clobberFlags: true,
31080 faultOnNilArg0: true,
31081 faultOnNilArg1: true,
31082 unsafePoint: true,
31083 reg: regInfo{
31084 inputs: []inputInfo{
31085 {0, 1048576},
31086 {1, 2097152},
31087 },
31088 clobbers: 3145728,
31089 },
31090 },
31091 {
31092 name: "LoweredQuadMoveShort",
31093 auxType: auxInt64,
31094 argLen: 3,
31095 faultOnNilArg0: true,
31096 faultOnNilArg1: true,
31097 unsafePoint: true,
31098 reg: regInfo{
31099 inputs: []inputInfo{
31100 {0, 1073733624},
31101 {1, 1073733624},
31102 },
31103 },
31104 },
31105 {
31106 name: "LoweredAtomicStore8",
31107 auxType: auxInt64,
31108 argLen: 3,
31109 faultOnNilArg0: true,
31110 hasSideEffects: true,
31111 reg: regInfo{
31112 inputs: []inputInfo{
31113 {0, 1073733630},
31114 {1, 1073733630},
31115 },
31116 },
31117 },
31118 {
31119 name: "LoweredAtomicStore32",
31120 auxType: auxInt64,
31121 argLen: 3,
31122 faultOnNilArg0: true,
31123 hasSideEffects: true,
31124 reg: regInfo{
31125 inputs: []inputInfo{
31126 {0, 1073733630},
31127 {1, 1073733630},
31128 },
31129 },
31130 },
31131 {
31132 name: "LoweredAtomicStore64",
31133 auxType: auxInt64,
31134 argLen: 3,
31135 faultOnNilArg0: true,
31136 hasSideEffects: true,
31137 reg: regInfo{
31138 inputs: []inputInfo{
31139 {0, 1073733630},
31140 {1, 1073733630},
31141 },
31142 },
31143 },
31144 {
31145 name: "LoweredAtomicLoad8",
31146 auxType: auxInt64,
31147 argLen: 2,
31148 clobberFlags: true,
31149 faultOnNilArg0: true,
31150 reg: regInfo{
31151 inputs: []inputInfo{
31152 {0, 1073733630},
31153 },
31154 outputs: []outputInfo{
31155 {0, 1073733624},
31156 },
31157 },
31158 },
31159 {
31160 name: "LoweredAtomicLoad32",
31161 auxType: auxInt64,
31162 argLen: 2,
31163 clobberFlags: true,
31164 faultOnNilArg0: true,
31165 reg: regInfo{
31166 inputs: []inputInfo{
31167 {0, 1073733630},
31168 },
31169 outputs: []outputInfo{
31170 {0, 1073733624},
31171 },
31172 },
31173 },
31174 {
31175 name: "LoweredAtomicLoad64",
31176 auxType: auxInt64,
31177 argLen: 2,
31178 clobberFlags: true,
31179 faultOnNilArg0: true,
31180 reg: regInfo{
31181 inputs: []inputInfo{
31182 {0, 1073733630},
31183 },
31184 outputs: []outputInfo{
31185 {0, 1073733624},
31186 },
31187 },
31188 },
31189 {
31190 name: "LoweredAtomicLoadPtr",
31191 auxType: auxInt64,
31192 argLen: 2,
31193 clobberFlags: true,
31194 faultOnNilArg0: true,
31195 reg: regInfo{
31196 inputs: []inputInfo{
31197 {0, 1073733630},
31198 },
31199 outputs: []outputInfo{
31200 {0, 1073733624},
31201 },
31202 },
31203 },
31204 {
31205 name: "LoweredAtomicAdd32",
31206 argLen: 3,
31207 resultNotInArgs: true,
31208 clobberFlags: true,
31209 faultOnNilArg0: true,
31210 hasSideEffects: true,
31211 reg: regInfo{
31212 inputs: []inputInfo{
31213 {1, 1073733624},
31214 {0, 1073733630},
31215 },
31216 outputs: []outputInfo{
31217 {0, 1073733624},
31218 },
31219 },
31220 },
31221 {
31222 name: "LoweredAtomicAdd64",
31223 argLen: 3,
31224 resultNotInArgs: true,
31225 clobberFlags: true,
31226 faultOnNilArg0: true,
31227 hasSideEffects: true,
31228 reg: regInfo{
31229 inputs: []inputInfo{
31230 {1, 1073733624},
31231 {0, 1073733630},
31232 },
31233 outputs: []outputInfo{
31234 {0, 1073733624},
31235 },
31236 },
31237 },
31238 {
31239 name: "LoweredAtomicExchange32",
31240 argLen: 3,
31241 resultNotInArgs: true,
31242 clobberFlags: true,
31243 faultOnNilArg0: true,
31244 hasSideEffects: true,
31245 reg: regInfo{
31246 inputs: []inputInfo{
31247 {1, 1073733624},
31248 {0, 1073733630},
31249 },
31250 outputs: []outputInfo{
31251 {0, 1073733624},
31252 },
31253 },
31254 },
31255 {
31256 name: "LoweredAtomicExchange64",
31257 argLen: 3,
31258 resultNotInArgs: true,
31259 clobberFlags: true,
31260 faultOnNilArg0: true,
31261 hasSideEffects: true,
31262 reg: regInfo{
31263 inputs: []inputInfo{
31264 {1, 1073733624},
31265 {0, 1073733630},
31266 },
31267 outputs: []outputInfo{
31268 {0, 1073733624},
31269 },
31270 },
31271 },
31272 {
31273 name: "LoweredAtomicCas64",
31274 auxType: auxInt64,
31275 argLen: 4,
31276 resultNotInArgs: true,
31277 clobberFlags: true,
31278 faultOnNilArg0: true,
31279 hasSideEffects: true,
31280 reg: regInfo{
31281 inputs: []inputInfo{
31282 {1, 1073733624},
31283 {2, 1073733624},
31284 {0, 1073733630},
31285 },
31286 outputs: []outputInfo{
31287 {0, 1073733624},
31288 },
31289 },
31290 },
31291 {
31292 name: "LoweredAtomicCas32",
31293 auxType: auxInt64,
31294 argLen: 4,
31295 resultNotInArgs: true,
31296 clobberFlags: true,
31297 faultOnNilArg0: true,
31298 hasSideEffects: true,
31299 reg: regInfo{
31300 inputs: []inputInfo{
31301 {1, 1073733624},
31302 {2, 1073733624},
31303 {0, 1073733630},
31304 },
31305 outputs: []outputInfo{
31306 {0, 1073733624},
31307 },
31308 },
31309 },
31310 {
31311 name: "LoweredAtomicAnd8",
31312 argLen: 3,
31313 faultOnNilArg0: true,
31314 hasSideEffects: true,
31315 asm: ppc64.AAND,
31316 reg: regInfo{
31317 inputs: []inputInfo{
31318 {0, 1073733630},
31319 {1, 1073733630},
31320 },
31321 },
31322 },
31323 {
31324 name: "LoweredAtomicAnd32",
31325 argLen: 3,
31326 faultOnNilArg0: true,
31327 hasSideEffects: true,
31328 asm: ppc64.AAND,
31329 reg: regInfo{
31330 inputs: []inputInfo{
31331 {0, 1073733630},
31332 {1, 1073733630},
31333 },
31334 },
31335 },
31336 {
31337 name: "LoweredAtomicOr8",
31338 argLen: 3,
31339 faultOnNilArg0: true,
31340 hasSideEffects: true,
31341 asm: ppc64.AOR,
31342 reg: regInfo{
31343 inputs: []inputInfo{
31344 {0, 1073733630},
31345 {1, 1073733630},
31346 },
31347 },
31348 },
31349 {
31350 name: "LoweredAtomicOr32",
31351 argLen: 3,
31352 faultOnNilArg0: true,
31353 hasSideEffects: true,
31354 asm: ppc64.AOR,
31355 reg: regInfo{
31356 inputs: []inputInfo{
31357 {0, 1073733630},
31358 {1, 1073733630},
31359 },
31360 },
31361 },
31362 {
31363 name: "LoweredWB",
31364 auxType: auxInt64,
31365 argLen: 1,
31366 clobberFlags: true,
31367 reg: regInfo{
31368 clobbers: 18446744072632408064,
31369 outputs: []outputInfo{
31370 {0, 536870912},
31371 },
31372 },
31373 },
31374 {
31375 name: "LoweredPubBarrier",
31376 argLen: 1,
31377 hasSideEffects: true,
31378 asm: ppc64.ALWSYNC,
31379 reg: regInfo{},
31380 },
31381 {
31382 name: "LoweredPanicBoundsA",
31383 auxType: auxInt64,
31384 argLen: 3,
31385 call: true,
31386 reg: regInfo{
31387 inputs: []inputInfo{
31388 {0, 32},
31389 {1, 64},
31390 },
31391 },
31392 },
31393 {
31394 name: "LoweredPanicBoundsB",
31395 auxType: auxInt64,
31396 argLen: 3,
31397 call: true,
31398 reg: regInfo{
31399 inputs: []inputInfo{
31400 {0, 16},
31401 {1, 32},
31402 },
31403 },
31404 },
31405 {
31406 name: "LoweredPanicBoundsC",
31407 auxType: auxInt64,
31408 argLen: 3,
31409 call: true,
31410 reg: regInfo{
31411 inputs: []inputInfo{
31412 {0, 8},
31413 {1, 16},
31414 },
31415 },
31416 },
31417 {
31418 name: "InvertFlags",
31419 argLen: 1,
31420 reg: regInfo{},
31421 },
31422 {
31423 name: "FlagEQ",
31424 argLen: 0,
31425 reg: regInfo{},
31426 },
31427 {
31428 name: "FlagLT",
31429 argLen: 0,
31430 reg: regInfo{},
31431 },
31432 {
31433 name: "FlagGT",
31434 argLen: 0,
31435 reg: regInfo{},
31436 },
31437
31438 {
31439 name: "ADD",
31440 argLen: 2,
31441 commutative: true,
31442 asm: riscv.AADD,
31443 reg: regInfo{
31444 inputs: []inputInfo{
31445 {0, 1006632944},
31446 {1, 1006632944},
31447 },
31448 outputs: []outputInfo{
31449 {0, 1006632944},
31450 },
31451 },
31452 },
31453 {
31454 name: "ADDI",
31455 auxType: auxInt64,
31456 argLen: 1,
31457 asm: riscv.AADDI,
31458 reg: regInfo{
31459 inputs: []inputInfo{
31460 {0, 9223372037861408754},
31461 },
31462 outputs: []outputInfo{
31463 {0, 1006632944},
31464 },
31465 },
31466 },
31467 {
31468 name: "ADDIW",
31469 auxType: auxInt64,
31470 argLen: 1,
31471 asm: riscv.AADDIW,
31472 reg: regInfo{
31473 inputs: []inputInfo{
31474 {0, 1006632944},
31475 },
31476 outputs: []outputInfo{
31477 {0, 1006632944},
31478 },
31479 },
31480 },
31481 {
31482 name: "NEG",
31483 argLen: 1,
31484 asm: riscv.ANEG,
31485 reg: regInfo{
31486 inputs: []inputInfo{
31487 {0, 1006632944},
31488 },
31489 outputs: []outputInfo{
31490 {0, 1006632944},
31491 },
31492 },
31493 },
31494 {
31495 name: "NEGW",
31496 argLen: 1,
31497 asm: riscv.ANEGW,
31498 reg: regInfo{
31499 inputs: []inputInfo{
31500 {0, 1006632944},
31501 },
31502 outputs: []outputInfo{
31503 {0, 1006632944},
31504 },
31505 },
31506 },
31507 {
31508 name: "SUB",
31509 argLen: 2,
31510 asm: riscv.ASUB,
31511 reg: regInfo{
31512 inputs: []inputInfo{
31513 {0, 1006632944},
31514 {1, 1006632944},
31515 },
31516 outputs: []outputInfo{
31517 {0, 1006632944},
31518 },
31519 },
31520 },
31521 {
31522 name: "SUBW",
31523 argLen: 2,
31524 asm: riscv.ASUBW,
31525 reg: regInfo{
31526 inputs: []inputInfo{
31527 {0, 1006632944},
31528 {1, 1006632944},
31529 },
31530 outputs: []outputInfo{
31531 {0, 1006632944},
31532 },
31533 },
31534 },
31535 {
31536 name: "MUL",
31537 argLen: 2,
31538 commutative: true,
31539 asm: riscv.AMUL,
31540 reg: regInfo{
31541 inputs: []inputInfo{
31542 {0, 1006632944},
31543 {1, 1006632944},
31544 },
31545 outputs: []outputInfo{
31546 {0, 1006632944},
31547 },
31548 },
31549 },
31550 {
31551 name: "MULW",
31552 argLen: 2,
31553 commutative: true,
31554 asm: riscv.AMULW,
31555 reg: regInfo{
31556 inputs: []inputInfo{
31557 {0, 1006632944},
31558 {1, 1006632944},
31559 },
31560 outputs: []outputInfo{
31561 {0, 1006632944},
31562 },
31563 },
31564 },
31565 {
31566 name: "MULH",
31567 argLen: 2,
31568 commutative: true,
31569 asm: riscv.AMULH,
31570 reg: regInfo{
31571 inputs: []inputInfo{
31572 {0, 1006632944},
31573 {1, 1006632944},
31574 },
31575 outputs: []outputInfo{
31576 {0, 1006632944},
31577 },
31578 },
31579 },
31580 {
31581 name: "MULHU",
31582 argLen: 2,
31583 commutative: true,
31584 asm: riscv.AMULHU,
31585 reg: regInfo{
31586 inputs: []inputInfo{
31587 {0, 1006632944},
31588 {1, 1006632944},
31589 },
31590 outputs: []outputInfo{
31591 {0, 1006632944},
31592 },
31593 },
31594 },
31595 {
31596 name: "LoweredMuluhilo",
31597 argLen: 2,
31598 resultNotInArgs: true,
31599 reg: regInfo{
31600 inputs: []inputInfo{
31601 {0, 1006632944},
31602 {1, 1006632944},
31603 },
31604 outputs: []outputInfo{
31605 {0, 1006632944},
31606 {1, 1006632944},
31607 },
31608 },
31609 },
31610 {
31611 name: "LoweredMuluover",
31612 argLen: 2,
31613 resultNotInArgs: true,
31614 reg: regInfo{
31615 inputs: []inputInfo{
31616 {0, 1006632944},
31617 {1, 1006632944},
31618 },
31619 outputs: []outputInfo{
31620 {0, 1006632944},
31621 {1, 1006632944},
31622 },
31623 },
31624 },
31625 {
31626 name: "DIV",
31627 argLen: 2,
31628 asm: riscv.ADIV,
31629 reg: regInfo{
31630 inputs: []inputInfo{
31631 {0, 1006632944},
31632 {1, 1006632944},
31633 },
31634 outputs: []outputInfo{
31635 {0, 1006632944},
31636 },
31637 },
31638 },
31639 {
31640 name: "DIVU",
31641 argLen: 2,
31642 asm: riscv.ADIVU,
31643 reg: regInfo{
31644 inputs: []inputInfo{
31645 {0, 1006632944},
31646 {1, 1006632944},
31647 },
31648 outputs: []outputInfo{
31649 {0, 1006632944},
31650 },
31651 },
31652 },
31653 {
31654 name: "DIVW",
31655 argLen: 2,
31656 asm: riscv.ADIVW,
31657 reg: regInfo{
31658 inputs: []inputInfo{
31659 {0, 1006632944},
31660 {1, 1006632944},
31661 },
31662 outputs: []outputInfo{
31663 {0, 1006632944},
31664 },
31665 },
31666 },
31667 {
31668 name: "DIVUW",
31669 argLen: 2,
31670 asm: riscv.ADIVUW,
31671 reg: regInfo{
31672 inputs: []inputInfo{
31673 {0, 1006632944},
31674 {1, 1006632944},
31675 },
31676 outputs: []outputInfo{
31677 {0, 1006632944},
31678 },
31679 },
31680 },
31681 {
31682 name: "REM",
31683 argLen: 2,
31684 asm: riscv.AREM,
31685 reg: regInfo{
31686 inputs: []inputInfo{
31687 {0, 1006632944},
31688 {1, 1006632944},
31689 },
31690 outputs: []outputInfo{
31691 {0, 1006632944},
31692 },
31693 },
31694 },
31695 {
31696 name: "REMU",
31697 argLen: 2,
31698 asm: riscv.AREMU,
31699 reg: regInfo{
31700 inputs: []inputInfo{
31701 {0, 1006632944},
31702 {1, 1006632944},
31703 },
31704 outputs: []outputInfo{
31705 {0, 1006632944},
31706 },
31707 },
31708 },
31709 {
31710 name: "REMW",
31711 argLen: 2,
31712 asm: riscv.AREMW,
31713 reg: regInfo{
31714 inputs: []inputInfo{
31715 {0, 1006632944},
31716 {1, 1006632944},
31717 },
31718 outputs: []outputInfo{
31719 {0, 1006632944},
31720 },
31721 },
31722 },
31723 {
31724 name: "REMUW",
31725 argLen: 2,
31726 asm: riscv.AREMUW,
31727 reg: regInfo{
31728 inputs: []inputInfo{
31729 {0, 1006632944},
31730 {1, 1006632944},
31731 },
31732 outputs: []outputInfo{
31733 {0, 1006632944},
31734 },
31735 },
31736 },
31737 {
31738 name: "MOVaddr",
31739 auxType: auxSymOff,
31740 argLen: 1,
31741 rematerializeable: true,
31742 symEffect: SymAddr,
31743 asm: riscv.AMOV,
31744 reg: regInfo{
31745 inputs: []inputInfo{
31746 {0, 9223372037861408754},
31747 },
31748 outputs: []outputInfo{
31749 {0, 1006632944},
31750 },
31751 },
31752 },
31753 {
31754 name: "MOVDconst",
31755 auxType: auxInt64,
31756 argLen: 0,
31757 rematerializeable: true,
31758 asm: riscv.AMOV,
31759 reg: regInfo{
31760 outputs: []outputInfo{
31761 {0, 1006632944},
31762 },
31763 },
31764 },
31765 {
31766 name: "MOVBload",
31767 auxType: auxSymOff,
31768 argLen: 2,
31769 faultOnNilArg0: true,
31770 symEffect: SymRead,
31771 asm: riscv.AMOVB,
31772 reg: regInfo{
31773 inputs: []inputInfo{
31774 {0, 9223372037861408754},
31775 },
31776 outputs: []outputInfo{
31777 {0, 1006632944},
31778 },
31779 },
31780 },
31781 {
31782 name: "MOVHload",
31783 auxType: auxSymOff,
31784 argLen: 2,
31785 faultOnNilArg0: true,
31786 symEffect: SymRead,
31787 asm: riscv.AMOVH,
31788 reg: regInfo{
31789 inputs: []inputInfo{
31790 {0, 9223372037861408754},
31791 },
31792 outputs: []outputInfo{
31793 {0, 1006632944},
31794 },
31795 },
31796 },
31797 {
31798 name: "MOVWload",
31799 auxType: auxSymOff,
31800 argLen: 2,
31801 faultOnNilArg0: true,
31802 symEffect: SymRead,
31803 asm: riscv.AMOVW,
31804 reg: regInfo{
31805 inputs: []inputInfo{
31806 {0, 9223372037861408754},
31807 },
31808 outputs: []outputInfo{
31809 {0, 1006632944},
31810 },
31811 },
31812 },
31813 {
31814 name: "MOVDload",
31815 auxType: auxSymOff,
31816 argLen: 2,
31817 faultOnNilArg0: true,
31818 symEffect: SymRead,
31819 asm: riscv.AMOV,
31820 reg: regInfo{
31821 inputs: []inputInfo{
31822 {0, 9223372037861408754},
31823 },
31824 outputs: []outputInfo{
31825 {0, 1006632944},
31826 },
31827 },
31828 },
31829 {
31830 name: "MOVBUload",
31831 auxType: auxSymOff,
31832 argLen: 2,
31833 faultOnNilArg0: true,
31834 symEffect: SymRead,
31835 asm: riscv.AMOVBU,
31836 reg: regInfo{
31837 inputs: []inputInfo{
31838 {0, 9223372037861408754},
31839 },
31840 outputs: []outputInfo{
31841 {0, 1006632944},
31842 },
31843 },
31844 },
31845 {
31846 name: "MOVHUload",
31847 auxType: auxSymOff,
31848 argLen: 2,
31849 faultOnNilArg0: true,
31850 symEffect: SymRead,
31851 asm: riscv.AMOVHU,
31852 reg: regInfo{
31853 inputs: []inputInfo{
31854 {0, 9223372037861408754},
31855 },
31856 outputs: []outputInfo{
31857 {0, 1006632944},
31858 },
31859 },
31860 },
31861 {
31862 name: "MOVWUload",
31863 auxType: auxSymOff,
31864 argLen: 2,
31865 faultOnNilArg0: true,
31866 symEffect: SymRead,
31867 asm: riscv.AMOVWU,
31868 reg: regInfo{
31869 inputs: []inputInfo{
31870 {0, 9223372037861408754},
31871 },
31872 outputs: []outputInfo{
31873 {0, 1006632944},
31874 },
31875 },
31876 },
31877 {
31878 name: "MOVBstore",
31879 auxType: auxSymOff,
31880 argLen: 3,
31881 faultOnNilArg0: true,
31882 symEffect: SymWrite,
31883 asm: riscv.AMOVB,
31884 reg: regInfo{
31885 inputs: []inputInfo{
31886 {1, 1006632946},
31887 {0, 9223372037861408754},
31888 },
31889 },
31890 },
31891 {
31892 name: "MOVHstore",
31893 auxType: auxSymOff,
31894 argLen: 3,
31895 faultOnNilArg0: true,
31896 symEffect: SymWrite,
31897 asm: riscv.AMOVH,
31898 reg: regInfo{
31899 inputs: []inputInfo{
31900 {1, 1006632946},
31901 {0, 9223372037861408754},
31902 },
31903 },
31904 },
31905 {
31906 name: "MOVWstore",
31907 auxType: auxSymOff,
31908 argLen: 3,
31909 faultOnNilArg0: true,
31910 symEffect: SymWrite,
31911 asm: riscv.AMOVW,
31912 reg: regInfo{
31913 inputs: []inputInfo{
31914 {1, 1006632946},
31915 {0, 9223372037861408754},
31916 },
31917 },
31918 },
31919 {
31920 name: "MOVDstore",
31921 auxType: auxSymOff,
31922 argLen: 3,
31923 faultOnNilArg0: true,
31924 symEffect: SymWrite,
31925 asm: riscv.AMOV,
31926 reg: regInfo{
31927 inputs: []inputInfo{
31928 {1, 1006632946},
31929 {0, 9223372037861408754},
31930 },
31931 },
31932 },
31933 {
31934 name: "MOVBstorezero",
31935 auxType: auxSymOff,
31936 argLen: 2,
31937 faultOnNilArg0: true,
31938 symEffect: SymWrite,
31939 asm: riscv.AMOVB,
31940 reg: regInfo{
31941 inputs: []inputInfo{
31942 {0, 9223372037861408754},
31943 },
31944 },
31945 },
31946 {
31947 name: "MOVHstorezero",
31948 auxType: auxSymOff,
31949 argLen: 2,
31950 faultOnNilArg0: true,
31951 symEffect: SymWrite,
31952 asm: riscv.AMOVH,
31953 reg: regInfo{
31954 inputs: []inputInfo{
31955 {0, 9223372037861408754},
31956 },
31957 },
31958 },
31959 {
31960 name: "MOVWstorezero",
31961 auxType: auxSymOff,
31962 argLen: 2,
31963 faultOnNilArg0: true,
31964 symEffect: SymWrite,
31965 asm: riscv.AMOVW,
31966 reg: regInfo{
31967 inputs: []inputInfo{
31968 {0, 9223372037861408754},
31969 },
31970 },
31971 },
31972 {
31973 name: "MOVDstorezero",
31974 auxType: auxSymOff,
31975 argLen: 2,
31976 faultOnNilArg0: true,
31977 symEffect: SymWrite,
31978 asm: riscv.AMOV,
31979 reg: regInfo{
31980 inputs: []inputInfo{
31981 {0, 9223372037861408754},
31982 },
31983 },
31984 },
31985 {
31986 name: "MOVBreg",
31987 argLen: 1,
31988 asm: riscv.AMOVB,
31989 reg: regInfo{
31990 inputs: []inputInfo{
31991 {0, 1006632944},
31992 },
31993 outputs: []outputInfo{
31994 {0, 1006632944},
31995 },
31996 },
31997 },
31998 {
31999 name: "MOVHreg",
32000 argLen: 1,
32001 asm: riscv.AMOVH,
32002 reg: regInfo{
32003 inputs: []inputInfo{
32004 {0, 1006632944},
32005 },
32006 outputs: []outputInfo{
32007 {0, 1006632944},
32008 },
32009 },
32010 },
32011 {
32012 name: "MOVWreg",
32013 argLen: 1,
32014 asm: riscv.AMOVW,
32015 reg: regInfo{
32016 inputs: []inputInfo{
32017 {0, 1006632944},
32018 },
32019 outputs: []outputInfo{
32020 {0, 1006632944},
32021 },
32022 },
32023 },
32024 {
32025 name: "MOVDreg",
32026 argLen: 1,
32027 asm: riscv.AMOV,
32028 reg: regInfo{
32029 inputs: []inputInfo{
32030 {0, 1006632944},
32031 },
32032 outputs: []outputInfo{
32033 {0, 1006632944},
32034 },
32035 },
32036 },
32037 {
32038 name: "MOVBUreg",
32039 argLen: 1,
32040 asm: riscv.AMOVBU,
32041 reg: regInfo{
32042 inputs: []inputInfo{
32043 {0, 1006632944},
32044 },
32045 outputs: []outputInfo{
32046 {0, 1006632944},
32047 },
32048 },
32049 },
32050 {
32051 name: "MOVHUreg",
32052 argLen: 1,
32053 asm: riscv.AMOVHU,
32054 reg: regInfo{
32055 inputs: []inputInfo{
32056 {0, 1006632944},
32057 },
32058 outputs: []outputInfo{
32059 {0, 1006632944},
32060 },
32061 },
32062 },
32063 {
32064 name: "MOVWUreg",
32065 argLen: 1,
32066 asm: riscv.AMOVWU,
32067 reg: regInfo{
32068 inputs: []inputInfo{
32069 {0, 1006632944},
32070 },
32071 outputs: []outputInfo{
32072 {0, 1006632944},
32073 },
32074 },
32075 },
32076 {
32077 name: "MOVDnop",
32078 argLen: 1,
32079 resultInArg0: true,
32080 reg: regInfo{
32081 inputs: []inputInfo{
32082 {0, 1006632944},
32083 },
32084 outputs: []outputInfo{
32085 {0, 1006632944},
32086 },
32087 },
32088 },
32089 {
32090 name: "SLL",
32091 argLen: 2,
32092 asm: riscv.ASLL,
32093 reg: regInfo{
32094 inputs: []inputInfo{
32095 {0, 1006632944},
32096 {1, 1006632944},
32097 },
32098 outputs: []outputInfo{
32099 {0, 1006632944},
32100 },
32101 },
32102 },
32103 {
32104 name: "SLLW",
32105 argLen: 2,
32106 asm: riscv.ASLLW,
32107 reg: regInfo{
32108 inputs: []inputInfo{
32109 {0, 1006632944},
32110 {1, 1006632944},
32111 },
32112 outputs: []outputInfo{
32113 {0, 1006632944},
32114 },
32115 },
32116 },
32117 {
32118 name: "SRA",
32119 argLen: 2,
32120 asm: riscv.ASRA,
32121 reg: regInfo{
32122 inputs: []inputInfo{
32123 {0, 1006632944},
32124 {1, 1006632944},
32125 },
32126 outputs: []outputInfo{
32127 {0, 1006632944},
32128 },
32129 },
32130 },
32131 {
32132 name: "SRAW",
32133 argLen: 2,
32134 asm: riscv.ASRAW,
32135 reg: regInfo{
32136 inputs: []inputInfo{
32137 {0, 1006632944},
32138 {1, 1006632944},
32139 },
32140 outputs: []outputInfo{
32141 {0, 1006632944},
32142 },
32143 },
32144 },
32145 {
32146 name: "SRL",
32147 argLen: 2,
32148 asm: riscv.ASRL,
32149 reg: regInfo{
32150 inputs: []inputInfo{
32151 {0, 1006632944},
32152 {1, 1006632944},
32153 },
32154 outputs: []outputInfo{
32155 {0, 1006632944},
32156 },
32157 },
32158 },
32159 {
32160 name: "SRLW",
32161 argLen: 2,
32162 asm: riscv.ASRLW,
32163 reg: regInfo{
32164 inputs: []inputInfo{
32165 {0, 1006632944},
32166 {1, 1006632944},
32167 },
32168 outputs: []outputInfo{
32169 {0, 1006632944},
32170 },
32171 },
32172 },
32173 {
32174 name: "SLLI",
32175 auxType: auxInt64,
32176 argLen: 1,
32177 asm: riscv.ASLLI,
32178 reg: regInfo{
32179 inputs: []inputInfo{
32180 {0, 1006632944},
32181 },
32182 outputs: []outputInfo{
32183 {0, 1006632944},
32184 },
32185 },
32186 },
32187 {
32188 name: "SLLIW",
32189 auxType: auxInt64,
32190 argLen: 1,
32191 asm: riscv.ASLLIW,
32192 reg: regInfo{
32193 inputs: []inputInfo{
32194 {0, 1006632944},
32195 },
32196 outputs: []outputInfo{
32197 {0, 1006632944},
32198 },
32199 },
32200 },
32201 {
32202 name: "SRAI",
32203 auxType: auxInt64,
32204 argLen: 1,
32205 asm: riscv.ASRAI,
32206 reg: regInfo{
32207 inputs: []inputInfo{
32208 {0, 1006632944},
32209 },
32210 outputs: []outputInfo{
32211 {0, 1006632944},
32212 },
32213 },
32214 },
32215 {
32216 name: "SRAIW",
32217 auxType: auxInt64,
32218 argLen: 1,
32219 asm: riscv.ASRAIW,
32220 reg: regInfo{
32221 inputs: []inputInfo{
32222 {0, 1006632944},
32223 },
32224 outputs: []outputInfo{
32225 {0, 1006632944},
32226 },
32227 },
32228 },
32229 {
32230 name: "SRLI",
32231 auxType: auxInt64,
32232 argLen: 1,
32233 asm: riscv.ASRLI,
32234 reg: regInfo{
32235 inputs: []inputInfo{
32236 {0, 1006632944},
32237 },
32238 outputs: []outputInfo{
32239 {0, 1006632944},
32240 },
32241 },
32242 },
32243 {
32244 name: "SRLIW",
32245 auxType: auxInt64,
32246 argLen: 1,
32247 asm: riscv.ASRLIW,
32248 reg: regInfo{
32249 inputs: []inputInfo{
32250 {0, 1006632944},
32251 },
32252 outputs: []outputInfo{
32253 {0, 1006632944},
32254 },
32255 },
32256 },
32257 {
32258 name: "AND",
32259 argLen: 2,
32260 commutative: true,
32261 asm: riscv.AAND,
32262 reg: regInfo{
32263 inputs: []inputInfo{
32264 {0, 1006632944},
32265 {1, 1006632944},
32266 },
32267 outputs: []outputInfo{
32268 {0, 1006632944},
32269 },
32270 },
32271 },
32272 {
32273 name: "ANDI",
32274 auxType: auxInt64,
32275 argLen: 1,
32276 asm: riscv.AANDI,
32277 reg: regInfo{
32278 inputs: []inputInfo{
32279 {0, 1006632944},
32280 },
32281 outputs: []outputInfo{
32282 {0, 1006632944},
32283 },
32284 },
32285 },
32286 {
32287 name: "NOT",
32288 argLen: 1,
32289 asm: riscv.ANOT,
32290 reg: regInfo{
32291 inputs: []inputInfo{
32292 {0, 1006632944},
32293 },
32294 outputs: []outputInfo{
32295 {0, 1006632944},
32296 },
32297 },
32298 },
32299 {
32300 name: "OR",
32301 argLen: 2,
32302 commutative: true,
32303 asm: riscv.AOR,
32304 reg: regInfo{
32305 inputs: []inputInfo{
32306 {0, 1006632944},
32307 {1, 1006632944},
32308 },
32309 outputs: []outputInfo{
32310 {0, 1006632944},
32311 },
32312 },
32313 },
32314 {
32315 name: "ORI",
32316 auxType: auxInt64,
32317 argLen: 1,
32318 asm: riscv.AORI,
32319 reg: regInfo{
32320 inputs: []inputInfo{
32321 {0, 1006632944},
32322 },
32323 outputs: []outputInfo{
32324 {0, 1006632944},
32325 },
32326 },
32327 },
32328 {
32329 name: "ROL",
32330 argLen: 2,
32331 asm: riscv.AROL,
32332 reg: regInfo{
32333 inputs: []inputInfo{
32334 {0, 1006632944},
32335 {1, 1006632944},
32336 },
32337 outputs: []outputInfo{
32338 {0, 1006632944},
32339 },
32340 },
32341 },
32342 {
32343 name: "ROLW",
32344 argLen: 2,
32345 asm: riscv.AROLW,
32346 reg: regInfo{
32347 inputs: []inputInfo{
32348 {0, 1006632944},
32349 {1, 1006632944},
32350 },
32351 outputs: []outputInfo{
32352 {0, 1006632944},
32353 },
32354 },
32355 },
32356 {
32357 name: "ROR",
32358 argLen: 2,
32359 asm: riscv.AROR,
32360 reg: regInfo{
32361 inputs: []inputInfo{
32362 {0, 1006632944},
32363 {1, 1006632944},
32364 },
32365 outputs: []outputInfo{
32366 {0, 1006632944},
32367 },
32368 },
32369 },
32370 {
32371 name: "RORI",
32372 auxType: auxInt64,
32373 argLen: 1,
32374 asm: riscv.ARORI,
32375 reg: regInfo{
32376 inputs: []inputInfo{
32377 {0, 1006632944},
32378 },
32379 outputs: []outputInfo{
32380 {0, 1006632944},
32381 },
32382 },
32383 },
32384 {
32385 name: "RORIW",
32386 auxType: auxInt64,
32387 argLen: 1,
32388 asm: riscv.ARORIW,
32389 reg: regInfo{
32390 inputs: []inputInfo{
32391 {0, 1006632944},
32392 },
32393 outputs: []outputInfo{
32394 {0, 1006632944},
32395 },
32396 },
32397 },
32398 {
32399 name: "RORW",
32400 argLen: 2,
32401 asm: riscv.ARORW,
32402 reg: regInfo{
32403 inputs: []inputInfo{
32404 {0, 1006632944},
32405 {1, 1006632944},
32406 },
32407 outputs: []outputInfo{
32408 {0, 1006632944},
32409 },
32410 },
32411 },
32412 {
32413 name: "XOR",
32414 argLen: 2,
32415 commutative: true,
32416 asm: riscv.AXOR,
32417 reg: regInfo{
32418 inputs: []inputInfo{
32419 {0, 1006632944},
32420 {1, 1006632944},
32421 },
32422 outputs: []outputInfo{
32423 {0, 1006632944},
32424 },
32425 },
32426 },
32427 {
32428 name: "XORI",
32429 auxType: auxInt64,
32430 argLen: 1,
32431 asm: riscv.AXORI,
32432 reg: regInfo{
32433 inputs: []inputInfo{
32434 {0, 1006632944},
32435 },
32436 outputs: []outputInfo{
32437 {0, 1006632944},
32438 },
32439 },
32440 },
32441 {
32442 name: "SEQZ",
32443 argLen: 1,
32444 asm: riscv.ASEQZ,
32445 reg: regInfo{
32446 inputs: []inputInfo{
32447 {0, 1006632944},
32448 },
32449 outputs: []outputInfo{
32450 {0, 1006632944},
32451 },
32452 },
32453 },
32454 {
32455 name: "SNEZ",
32456 argLen: 1,
32457 asm: riscv.ASNEZ,
32458 reg: regInfo{
32459 inputs: []inputInfo{
32460 {0, 1006632944},
32461 },
32462 outputs: []outputInfo{
32463 {0, 1006632944},
32464 },
32465 },
32466 },
32467 {
32468 name: "SLT",
32469 argLen: 2,
32470 asm: riscv.ASLT,
32471 reg: regInfo{
32472 inputs: []inputInfo{
32473 {0, 1006632944},
32474 {1, 1006632944},
32475 },
32476 outputs: []outputInfo{
32477 {0, 1006632944},
32478 },
32479 },
32480 },
32481 {
32482 name: "SLTI",
32483 auxType: auxInt64,
32484 argLen: 1,
32485 asm: riscv.ASLTI,
32486 reg: regInfo{
32487 inputs: []inputInfo{
32488 {0, 1006632944},
32489 },
32490 outputs: []outputInfo{
32491 {0, 1006632944},
32492 },
32493 },
32494 },
32495 {
32496 name: "SLTU",
32497 argLen: 2,
32498 asm: riscv.ASLTU,
32499 reg: regInfo{
32500 inputs: []inputInfo{
32501 {0, 1006632944},
32502 {1, 1006632944},
32503 },
32504 outputs: []outputInfo{
32505 {0, 1006632944},
32506 },
32507 },
32508 },
32509 {
32510 name: "SLTIU",
32511 auxType: auxInt64,
32512 argLen: 1,
32513 asm: riscv.ASLTIU,
32514 reg: regInfo{
32515 inputs: []inputInfo{
32516 {0, 1006632944},
32517 },
32518 outputs: []outputInfo{
32519 {0, 1006632944},
32520 },
32521 },
32522 },
32523 {
32524 name: "LoweredRound32F",
32525 argLen: 1,
32526 resultInArg0: true,
32527 reg: regInfo{
32528 inputs: []inputInfo{
32529 {0, 9223372034707292160},
32530 },
32531 outputs: []outputInfo{
32532 {0, 9223372034707292160},
32533 },
32534 },
32535 },
32536 {
32537 name: "LoweredRound64F",
32538 argLen: 1,
32539 resultInArg0: true,
32540 reg: regInfo{
32541 inputs: []inputInfo{
32542 {0, 9223372034707292160},
32543 },
32544 outputs: []outputInfo{
32545 {0, 9223372034707292160},
32546 },
32547 },
32548 },
32549 {
32550 name: "CALLstatic",
32551 auxType: auxCallOff,
32552 argLen: -1,
32553 call: true,
32554 reg: regInfo{
32555 clobbers: 9223372035781033968,
32556 },
32557 },
32558 {
32559 name: "CALLtail",
32560 auxType: auxCallOff,
32561 argLen: -1,
32562 call: true,
32563 tailCall: true,
32564 reg: regInfo{
32565 clobbers: 9223372035781033968,
32566 },
32567 },
32568 {
32569 name: "CALLclosure",
32570 auxType: auxCallOff,
32571 argLen: -1,
32572 call: true,
32573 reg: regInfo{
32574 inputs: []inputInfo{
32575 {1, 33554432},
32576 {0, 1006632946},
32577 },
32578 clobbers: 9223372035781033968,
32579 },
32580 },
32581 {
32582 name: "CALLinter",
32583 auxType: auxCallOff,
32584 argLen: -1,
32585 call: true,
32586 reg: regInfo{
32587 inputs: []inputInfo{
32588 {0, 1006632944},
32589 },
32590 clobbers: 9223372035781033968,
32591 },
32592 },
32593 {
32594 name: "DUFFZERO",
32595 auxType: auxInt64,
32596 argLen: 2,
32597 faultOnNilArg0: true,
32598 reg: regInfo{
32599 inputs: []inputInfo{
32600 {0, 16777216},
32601 },
32602 clobbers: 16777216,
32603 },
32604 },
32605 {
32606 name: "DUFFCOPY",
32607 auxType: auxInt64,
32608 argLen: 3,
32609 faultOnNilArg0: true,
32610 faultOnNilArg1: true,
32611 reg: regInfo{
32612 inputs: []inputInfo{
32613 {0, 16777216},
32614 {1, 8388608},
32615 },
32616 clobbers: 25165824,
32617 },
32618 },
32619 {
32620 name: "LoweredZero",
32621 auxType: auxInt64,
32622 argLen: 3,
32623 faultOnNilArg0: true,
32624 reg: regInfo{
32625 inputs: []inputInfo{
32626 {0, 16},
32627 {1, 1006632944},
32628 },
32629 clobbers: 16,
32630 },
32631 },
32632 {
32633 name: "LoweredMove",
32634 auxType: auxInt64,
32635 argLen: 4,
32636 faultOnNilArg0: true,
32637 faultOnNilArg1: true,
32638 reg: regInfo{
32639 inputs: []inputInfo{
32640 {0, 16},
32641 {1, 32},
32642 {2, 1006632880},
32643 },
32644 clobbers: 112,
32645 },
32646 },
32647 {
32648 name: "LoweredAtomicLoad8",
32649 argLen: 2,
32650 faultOnNilArg0: true,
32651 reg: regInfo{
32652 inputs: []inputInfo{
32653 {0, 9223372037861408754},
32654 },
32655 outputs: []outputInfo{
32656 {0, 1006632944},
32657 },
32658 },
32659 },
32660 {
32661 name: "LoweredAtomicLoad32",
32662 argLen: 2,
32663 faultOnNilArg0: true,
32664 reg: regInfo{
32665 inputs: []inputInfo{
32666 {0, 9223372037861408754},
32667 },
32668 outputs: []outputInfo{
32669 {0, 1006632944},
32670 },
32671 },
32672 },
32673 {
32674 name: "LoweredAtomicLoad64",
32675 argLen: 2,
32676 faultOnNilArg0: true,
32677 reg: regInfo{
32678 inputs: []inputInfo{
32679 {0, 9223372037861408754},
32680 },
32681 outputs: []outputInfo{
32682 {0, 1006632944},
32683 },
32684 },
32685 },
32686 {
32687 name: "LoweredAtomicStore8",
32688 argLen: 3,
32689 faultOnNilArg0: true,
32690 hasSideEffects: true,
32691 reg: regInfo{
32692 inputs: []inputInfo{
32693 {1, 1006632946},
32694 {0, 9223372037861408754},
32695 },
32696 },
32697 },
32698 {
32699 name: "LoweredAtomicStore32",
32700 argLen: 3,
32701 faultOnNilArg0: true,
32702 hasSideEffects: true,
32703 reg: regInfo{
32704 inputs: []inputInfo{
32705 {1, 1006632946},
32706 {0, 9223372037861408754},
32707 },
32708 },
32709 },
32710 {
32711 name: "LoweredAtomicStore64",
32712 argLen: 3,
32713 faultOnNilArg0: true,
32714 hasSideEffects: true,
32715 reg: regInfo{
32716 inputs: []inputInfo{
32717 {1, 1006632946},
32718 {0, 9223372037861408754},
32719 },
32720 },
32721 },
32722 {
32723 name: "LoweredAtomicExchange32",
32724 argLen: 3,
32725 resultNotInArgs: true,
32726 faultOnNilArg0: true,
32727 hasSideEffects: true,
32728 reg: regInfo{
32729 inputs: []inputInfo{
32730 {1, 1073741808},
32731 {0, 9223372037928517618},
32732 },
32733 outputs: []outputInfo{
32734 {0, 1006632944},
32735 },
32736 },
32737 },
32738 {
32739 name: "LoweredAtomicExchange64",
32740 argLen: 3,
32741 resultNotInArgs: true,
32742 faultOnNilArg0: true,
32743 hasSideEffects: true,
32744 reg: regInfo{
32745 inputs: []inputInfo{
32746 {1, 1073741808},
32747 {0, 9223372037928517618},
32748 },
32749 outputs: []outputInfo{
32750 {0, 1006632944},
32751 },
32752 },
32753 },
32754 {
32755 name: "LoweredAtomicAdd32",
32756 argLen: 3,
32757 resultNotInArgs: true,
32758 faultOnNilArg0: true,
32759 hasSideEffects: true,
32760 unsafePoint: true,
32761 reg: regInfo{
32762 inputs: []inputInfo{
32763 {1, 1073741808},
32764 {0, 9223372037928517618},
32765 },
32766 outputs: []outputInfo{
32767 {0, 1006632944},
32768 },
32769 },
32770 },
32771 {
32772 name: "LoweredAtomicAdd64",
32773 argLen: 3,
32774 resultNotInArgs: true,
32775 faultOnNilArg0: true,
32776 hasSideEffects: true,
32777 unsafePoint: true,
32778 reg: regInfo{
32779 inputs: []inputInfo{
32780 {1, 1073741808},
32781 {0, 9223372037928517618},
32782 },
32783 outputs: []outputInfo{
32784 {0, 1006632944},
32785 },
32786 },
32787 },
32788 {
32789 name: "LoweredAtomicCas32",
32790 argLen: 4,
32791 resultNotInArgs: true,
32792 faultOnNilArg0: true,
32793 hasSideEffects: true,
32794 unsafePoint: true,
32795 reg: regInfo{
32796 inputs: []inputInfo{
32797 {1, 1073741808},
32798 {2, 1073741808},
32799 {0, 9223372037928517618},
32800 },
32801 outputs: []outputInfo{
32802 {0, 1006632944},
32803 },
32804 },
32805 },
32806 {
32807 name: "LoweredAtomicCas64",
32808 argLen: 4,
32809 resultNotInArgs: true,
32810 faultOnNilArg0: true,
32811 hasSideEffects: true,
32812 unsafePoint: true,
32813 reg: regInfo{
32814 inputs: []inputInfo{
32815 {1, 1073741808},
32816 {2, 1073741808},
32817 {0, 9223372037928517618},
32818 },
32819 outputs: []outputInfo{
32820 {0, 1006632944},
32821 },
32822 },
32823 },
32824 {
32825 name: "LoweredAtomicAnd32",
32826 argLen: 3,
32827 faultOnNilArg0: true,
32828 hasSideEffects: true,
32829 asm: riscv.AAMOANDW,
32830 reg: regInfo{
32831 inputs: []inputInfo{
32832 {1, 1073741808},
32833 {0, 9223372037928517618},
32834 },
32835 },
32836 },
32837 {
32838 name: "LoweredAtomicOr32",
32839 argLen: 3,
32840 faultOnNilArg0: true,
32841 hasSideEffects: true,
32842 asm: riscv.AAMOORW,
32843 reg: regInfo{
32844 inputs: []inputInfo{
32845 {1, 1073741808},
32846 {0, 9223372037928517618},
32847 },
32848 },
32849 },
32850 {
32851 name: "LoweredNilCheck",
32852 argLen: 2,
32853 nilCheck: true,
32854 faultOnNilArg0: true,
32855 reg: regInfo{
32856 inputs: []inputInfo{
32857 {0, 1006632946},
32858 },
32859 },
32860 },
32861 {
32862 name: "LoweredGetClosurePtr",
32863 argLen: 0,
32864 reg: regInfo{
32865 outputs: []outputInfo{
32866 {0, 33554432},
32867 },
32868 },
32869 },
32870 {
32871 name: "LoweredGetCallerSP",
32872 argLen: 1,
32873 rematerializeable: true,
32874 reg: regInfo{
32875 outputs: []outputInfo{
32876 {0, 1006632944},
32877 },
32878 },
32879 },
32880 {
32881 name: "LoweredGetCallerPC",
32882 argLen: 0,
32883 rematerializeable: true,
32884 reg: regInfo{
32885 outputs: []outputInfo{
32886 {0, 1006632944},
32887 },
32888 },
32889 },
32890 {
32891 name: "LoweredWB",
32892 auxType: auxInt64,
32893 argLen: 1,
32894 clobberFlags: true,
32895 reg: regInfo{
32896 clobbers: 9223372034707292160,
32897 outputs: []outputInfo{
32898 {0, 8388608},
32899 },
32900 },
32901 },
32902 {
32903 name: "LoweredPubBarrier",
32904 argLen: 1,
32905 hasSideEffects: true,
32906 asm: riscv.AFENCE,
32907 reg: regInfo{},
32908 },
32909 {
32910 name: "LoweredPanicBoundsA",
32911 auxType: auxInt64,
32912 argLen: 3,
32913 call: true,
32914 reg: regInfo{
32915 inputs: []inputInfo{
32916 {0, 64},
32917 {1, 134217728},
32918 },
32919 },
32920 },
32921 {
32922 name: "LoweredPanicBoundsB",
32923 auxType: auxInt64,
32924 argLen: 3,
32925 call: true,
32926 reg: regInfo{
32927 inputs: []inputInfo{
32928 {0, 32},
32929 {1, 64},
32930 },
32931 },
32932 },
32933 {
32934 name: "LoweredPanicBoundsC",
32935 auxType: auxInt64,
32936 argLen: 3,
32937 call: true,
32938 reg: regInfo{
32939 inputs: []inputInfo{
32940 {0, 16},
32941 {1, 32},
32942 },
32943 },
32944 },
32945 {
32946 name: "FADDS",
32947 argLen: 2,
32948 commutative: true,
32949 asm: riscv.AFADDS,
32950 reg: regInfo{
32951 inputs: []inputInfo{
32952 {0, 9223372034707292160},
32953 {1, 9223372034707292160},
32954 },
32955 outputs: []outputInfo{
32956 {0, 9223372034707292160},
32957 },
32958 },
32959 },
32960 {
32961 name: "FSUBS",
32962 argLen: 2,
32963 asm: riscv.AFSUBS,
32964 reg: regInfo{
32965 inputs: []inputInfo{
32966 {0, 9223372034707292160},
32967 {1, 9223372034707292160},
32968 },
32969 outputs: []outputInfo{
32970 {0, 9223372034707292160},
32971 },
32972 },
32973 },
32974 {
32975 name: "FMULS",
32976 argLen: 2,
32977 commutative: true,
32978 asm: riscv.AFMULS,
32979 reg: regInfo{
32980 inputs: []inputInfo{
32981 {0, 9223372034707292160},
32982 {1, 9223372034707292160},
32983 },
32984 outputs: []outputInfo{
32985 {0, 9223372034707292160},
32986 },
32987 },
32988 },
32989 {
32990 name: "FDIVS",
32991 argLen: 2,
32992 asm: riscv.AFDIVS,
32993 reg: regInfo{
32994 inputs: []inputInfo{
32995 {0, 9223372034707292160},
32996 {1, 9223372034707292160},
32997 },
32998 outputs: []outputInfo{
32999 {0, 9223372034707292160},
33000 },
33001 },
33002 },
33003 {
33004 name: "FMADDS",
33005 argLen: 3,
33006 commutative: true,
33007 asm: riscv.AFMADDS,
33008 reg: regInfo{
33009 inputs: []inputInfo{
33010 {0, 9223372034707292160},
33011 {1, 9223372034707292160},
33012 {2, 9223372034707292160},
33013 },
33014 outputs: []outputInfo{
33015 {0, 9223372034707292160},
33016 },
33017 },
33018 },
33019 {
33020 name: "FMSUBS",
33021 argLen: 3,
33022 commutative: true,
33023 asm: riscv.AFMSUBS,
33024 reg: regInfo{
33025 inputs: []inputInfo{
33026 {0, 9223372034707292160},
33027 {1, 9223372034707292160},
33028 {2, 9223372034707292160},
33029 },
33030 outputs: []outputInfo{
33031 {0, 9223372034707292160},
33032 },
33033 },
33034 },
33035 {
33036 name: "FNMADDS",
33037 argLen: 3,
33038 commutative: true,
33039 asm: riscv.AFNMADDS,
33040 reg: regInfo{
33041 inputs: []inputInfo{
33042 {0, 9223372034707292160},
33043 {1, 9223372034707292160},
33044 {2, 9223372034707292160},
33045 },
33046 outputs: []outputInfo{
33047 {0, 9223372034707292160},
33048 },
33049 },
33050 },
33051 {
33052 name: "FNMSUBS",
33053 argLen: 3,
33054 commutative: true,
33055 asm: riscv.AFNMSUBS,
33056 reg: regInfo{
33057 inputs: []inputInfo{
33058 {0, 9223372034707292160},
33059 {1, 9223372034707292160},
33060 {2, 9223372034707292160},
33061 },
33062 outputs: []outputInfo{
33063 {0, 9223372034707292160},
33064 },
33065 },
33066 },
33067 {
33068 name: "FSQRTS",
33069 argLen: 1,
33070 asm: riscv.AFSQRTS,
33071 reg: regInfo{
33072 inputs: []inputInfo{
33073 {0, 9223372034707292160},
33074 },
33075 outputs: []outputInfo{
33076 {0, 9223372034707292160},
33077 },
33078 },
33079 },
33080 {
33081 name: "FNEGS",
33082 argLen: 1,
33083 asm: riscv.AFNEGS,
33084 reg: regInfo{
33085 inputs: []inputInfo{
33086 {0, 9223372034707292160},
33087 },
33088 outputs: []outputInfo{
33089 {0, 9223372034707292160},
33090 },
33091 },
33092 },
33093 {
33094 name: "FMVSX",
33095 argLen: 1,
33096 asm: riscv.AFMVSX,
33097 reg: regInfo{
33098 inputs: []inputInfo{
33099 {0, 1006632944},
33100 },
33101 outputs: []outputInfo{
33102 {0, 9223372034707292160},
33103 },
33104 },
33105 },
33106 {
33107 name: "FCVTSW",
33108 argLen: 1,
33109 asm: riscv.AFCVTSW,
33110 reg: regInfo{
33111 inputs: []inputInfo{
33112 {0, 1006632944},
33113 },
33114 outputs: []outputInfo{
33115 {0, 9223372034707292160},
33116 },
33117 },
33118 },
33119 {
33120 name: "FCVTSL",
33121 argLen: 1,
33122 asm: riscv.AFCVTSL,
33123 reg: regInfo{
33124 inputs: []inputInfo{
33125 {0, 1006632944},
33126 },
33127 outputs: []outputInfo{
33128 {0, 9223372034707292160},
33129 },
33130 },
33131 },
33132 {
33133 name: "FCVTWS",
33134 argLen: 1,
33135 asm: riscv.AFCVTWS,
33136 reg: regInfo{
33137 inputs: []inputInfo{
33138 {0, 9223372034707292160},
33139 },
33140 outputs: []outputInfo{
33141 {0, 1006632944},
33142 },
33143 },
33144 },
33145 {
33146 name: "FCVTLS",
33147 argLen: 1,
33148 asm: riscv.AFCVTLS,
33149 reg: regInfo{
33150 inputs: []inputInfo{
33151 {0, 9223372034707292160},
33152 },
33153 outputs: []outputInfo{
33154 {0, 1006632944},
33155 },
33156 },
33157 },
33158 {
33159 name: "FMOVWload",
33160 auxType: auxSymOff,
33161 argLen: 2,
33162 faultOnNilArg0: true,
33163 symEffect: SymRead,
33164 asm: riscv.AMOVF,
33165 reg: regInfo{
33166 inputs: []inputInfo{
33167 {0, 9223372037861408754},
33168 },
33169 outputs: []outputInfo{
33170 {0, 9223372034707292160},
33171 },
33172 },
33173 },
33174 {
33175 name: "FMOVWstore",
33176 auxType: auxSymOff,
33177 argLen: 3,
33178 faultOnNilArg0: true,
33179 symEffect: SymWrite,
33180 asm: riscv.AMOVF,
33181 reg: regInfo{
33182 inputs: []inputInfo{
33183 {0, 9223372037861408754},
33184 {1, 9223372034707292160},
33185 },
33186 },
33187 },
33188 {
33189 name: "FEQS",
33190 argLen: 2,
33191 commutative: true,
33192 asm: riscv.AFEQS,
33193 reg: regInfo{
33194 inputs: []inputInfo{
33195 {0, 9223372034707292160},
33196 {1, 9223372034707292160},
33197 },
33198 outputs: []outputInfo{
33199 {0, 1006632944},
33200 },
33201 },
33202 },
33203 {
33204 name: "FNES",
33205 argLen: 2,
33206 commutative: true,
33207 asm: riscv.AFNES,
33208 reg: regInfo{
33209 inputs: []inputInfo{
33210 {0, 9223372034707292160},
33211 {1, 9223372034707292160},
33212 },
33213 outputs: []outputInfo{
33214 {0, 1006632944},
33215 },
33216 },
33217 },
33218 {
33219 name: "FLTS",
33220 argLen: 2,
33221 asm: riscv.AFLTS,
33222 reg: regInfo{
33223 inputs: []inputInfo{
33224 {0, 9223372034707292160},
33225 {1, 9223372034707292160},
33226 },
33227 outputs: []outputInfo{
33228 {0, 1006632944},
33229 },
33230 },
33231 },
33232 {
33233 name: "FLES",
33234 argLen: 2,
33235 asm: riscv.AFLES,
33236 reg: regInfo{
33237 inputs: []inputInfo{
33238 {0, 9223372034707292160},
33239 {1, 9223372034707292160},
33240 },
33241 outputs: []outputInfo{
33242 {0, 1006632944},
33243 },
33244 },
33245 },
33246 {
33247 name: "LoweredFMAXS",
33248 argLen: 2,
33249 commutative: true,
33250 resultNotInArgs: true,
33251 asm: riscv.AFMAXS,
33252 reg: regInfo{
33253 inputs: []inputInfo{
33254 {0, 9223372034707292160},
33255 {1, 9223372034707292160},
33256 },
33257 outputs: []outputInfo{
33258 {0, 9223372034707292160},
33259 },
33260 },
33261 },
33262 {
33263 name: "LoweredFMINS",
33264 argLen: 2,
33265 commutative: true,
33266 resultNotInArgs: true,
33267 asm: riscv.AFMINS,
33268 reg: regInfo{
33269 inputs: []inputInfo{
33270 {0, 9223372034707292160},
33271 {1, 9223372034707292160},
33272 },
33273 outputs: []outputInfo{
33274 {0, 9223372034707292160},
33275 },
33276 },
33277 },
33278 {
33279 name: "FADDD",
33280 argLen: 2,
33281 commutative: true,
33282 asm: riscv.AFADDD,
33283 reg: regInfo{
33284 inputs: []inputInfo{
33285 {0, 9223372034707292160},
33286 {1, 9223372034707292160},
33287 },
33288 outputs: []outputInfo{
33289 {0, 9223372034707292160},
33290 },
33291 },
33292 },
33293 {
33294 name: "FSUBD",
33295 argLen: 2,
33296 asm: riscv.AFSUBD,
33297 reg: regInfo{
33298 inputs: []inputInfo{
33299 {0, 9223372034707292160},
33300 {1, 9223372034707292160},
33301 },
33302 outputs: []outputInfo{
33303 {0, 9223372034707292160},
33304 },
33305 },
33306 },
33307 {
33308 name: "FMULD",
33309 argLen: 2,
33310 commutative: true,
33311 asm: riscv.AFMULD,
33312 reg: regInfo{
33313 inputs: []inputInfo{
33314 {0, 9223372034707292160},
33315 {1, 9223372034707292160},
33316 },
33317 outputs: []outputInfo{
33318 {0, 9223372034707292160},
33319 },
33320 },
33321 },
33322 {
33323 name: "FDIVD",
33324 argLen: 2,
33325 asm: riscv.AFDIVD,
33326 reg: regInfo{
33327 inputs: []inputInfo{
33328 {0, 9223372034707292160},
33329 {1, 9223372034707292160},
33330 },
33331 outputs: []outputInfo{
33332 {0, 9223372034707292160},
33333 },
33334 },
33335 },
33336 {
33337 name: "FMADDD",
33338 argLen: 3,
33339 commutative: true,
33340 asm: riscv.AFMADDD,
33341 reg: regInfo{
33342 inputs: []inputInfo{
33343 {0, 9223372034707292160},
33344 {1, 9223372034707292160},
33345 {2, 9223372034707292160},
33346 },
33347 outputs: []outputInfo{
33348 {0, 9223372034707292160},
33349 },
33350 },
33351 },
33352 {
33353 name: "FMSUBD",
33354 argLen: 3,
33355 commutative: true,
33356 asm: riscv.AFMSUBD,
33357 reg: regInfo{
33358 inputs: []inputInfo{
33359 {0, 9223372034707292160},
33360 {1, 9223372034707292160},
33361 {2, 9223372034707292160},
33362 },
33363 outputs: []outputInfo{
33364 {0, 9223372034707292160},
33365 },
33366 },
33367 },
33368 {
33369 name: "FNMADDD",
33370 argLen: 3,
33371 commutative: true,
33372 asm: riscv.AFNMADDD,
33373 reg: regInfo{
33374 inputs: []inputInfo{
33375 {0, 9223372034707292160},
33376 {1, 9223372034707292160},
33377 {2, 9223372034707292160},
33378 },
33379 outputs: []outputInfo{
33380 {0, 9223372034707292160},
33381 },
33382 },
33383 },
33384 {
33385 name: "FNMSUBD",
33386 argLen: 3,
33387 commutative: true,
33388 asm: riscv.AFNMSUBD,
33389 reg: regInfo{
33390 inputs: []inputInfo{
33391 {0, 9223372034707292160},
33392 {1, 9223372034707292160},
33393 {2, 9223372034707292160},
33394 },
33395 outputs: []outputInfo{
33396 {0, 9223372034707292160},
33397 },
33398 },
33399 },
33400 {
33401 name: "FSQRTD",
33402 argLen: 1,
33403 asm: riscv.AFSQRTD,
33404 reg: regInfo{
33405 inputs: []inputInfo{
33406 {0, 9223372034707292160},
33407 },
33408 outputs: []outputInfo{
33409 {0, 9223372034707292160},
33410 },
33411 },
33412 },
33413 {
33414 name: "FNEGD",
33415 argLen: 1,
33416 asm: riscv.AFNEGD,
33417 reg: regInfo{
33418 inputs: []inputInfo{
33419 {0, 9223372034707292160},
33420 },
33421 outputs: []outputInfo{
33422 {0, 9223372034707292160},
33423 },
33424 },
33425 },
33426 {
33427 name: "FABSD",
33428 argLen: 1,
33429 asm: riscv.AFABSD,
33430 reg: regInfo{
33431 inputs: []inputInfo{
33432 {0, 9223372034707292160},
33433 },
33434 outputs: []outputInfo{
33435 {0, 9223372034707292160},
33436 },
33437 },
33438 },
33439 {
33440 name: "FSGNJD",
33441 argLen: 2,
33442 asm: riscv.AFSGNJD,
33443 reg: regInfo{
33444 inputs: []inputInfo{
33445 {0, 9223372034707292160},
33446 {1, 9223372034707292160},
33447 },
33448 outputs: []outputInfo{
33449 {0, 9223372034707292160},
33450 },
33451 },
33452 },
33453 {
33454 name: "FMVDX",
33455 argLen: 1,
33456 asm: riscv.AFMVDX,
33457 reg: regInfo{
33458 inputs: []inputInfo{
33459 {0, 1006632944},
33460 },
33461 outputs: []outputInfo{
33462 {0, 9223372034707292160},
33463 },
33464 },
33465 },
33466 {
33467 name: "FCVTDW",
33468 argLen: 1,
33469 asm: riscv.AFCVTDW,
33470 reg: regInfo{
33471 inputs: []inputInfo{
33472 {0, 1006632944},
33473 },
33474 outputs: []outputInfo{
33475 {0, 9223372034707292160},
33476 },
33477 },
33478 },
33479 {
33480 name: "FCVTDL",
33481 argLen: 1,
33482 asm: riscv.AFCVTDL,
33483 reg: regInfo{
33484 inputs: []inputInfo{
33485 {0, 1006632944},
33486 },
33487 outputs: []outputInfo{
33488 {0, 9223372034707292160},
33489 },
33490 },
33491 },
33492 {
33493 name: "FCVTWD",
33494 argLen: 1,
33495 asm: riscv.AFCVTWD,
33496 reg: regInfo{
33497 inputs: []inputInfo{
33498 {0, 9223372034707292160},
33499 },
33500 outputs: []outputInfo{
33501 {0, 1006632944},
33502 },
33503 },
33504 },
33505 {
33506 name: "FCVTLD",
33507 argLen: 1,
33508 asm: riscv.AFCVTLD,
33509 reg: regInfo{
33510 inputs: []inputInfo{
33511 {0, 9223372034707292160},
33512 },
33513 outputs: []outputInfo{
33514 {0, 1006632944},
33515 },
33516 },
33517 },
33518 {
33519 name: "FCVTDS",
33520 argLen: 1,
33521 asm: riscv.AFCVTDS,
33522 reg: regInfo{
33523 inputs: []inputInfo{
33524 {0, 9223372034707292160},
33525 },
33526 outputs: []outputInfo{
33527 {0, 9223372034707292160},
33528 },
33529 },
33530 },
33531 {
33532 name: "FCVTSD",
33533 argLen: 1,
33534 asm: riscv.AFCVTSD,
33535 reg: regInfo{
33536 inputs: []inputInfo{
33537 {0, 9223372034707292160},
33538 },
33539 outputs: []outputInfo{
33540 {0, 9223372034707292160},
33541 },
33542 },
33543 },
33544 {
33545 name: "FMOVDload",
33546 auxType: auxSymOff,
33547 argLen: 2,
33548 faultOnNilArg0: true,
33549 symEffect: SymRead,
33550 asm: riscv.AMOVD,
33551 reg: regInfo{
33552 inputs: []inputInfo{
33553 {0, 9223372037861408754},
33554 },
33555 outputs: []outputInfo{
33556 {0, 9223372034707292160},
33557 },
33558 },
33559 },
33560 {
33561 name: "FMOVDstore",
33562 auxType: auxSymOff,
33563 argLen: 3,
33564 faultOnNilArg0: true,
33565 symEffect: SymWrite,
33566 asm: riscv.AMOVD,
33567 reg: regInfo{
33568 inputs: []inputInfo{
33569 {0, 9223372037861408754},
33570 {1, 9223372034707292160},
33571 },
33572 },
33573 },
33574 {
33575 name: "FEQD",
33576 argLen: 2,
33577 commutative: true,
33578 asm: riscv.AFEQD,
33579 reg: regInfo{
33580 inputs: []inputInfo{
33581 {0, 9223372034707292160},
33582 {1, 9223372034707292160},
33583 },
33584 outputs: []outputInfo{
33585 {0, 1006632944},
33586 },
33587 },
33588 },
33589 {
33590 name: "FNED",
33591 argLen: 2,
33592 commutative: true,
33593 asm: riscv.AFNED,
33594 reg: regInfo{
33595 inputs: []inputInfo{
33596 {0, 9223372034707292160},
33597 {1, 9223372034707292160},
33598 },
33599 outputs: []outputInfo{
33600 {0, 1006632944},
33601 },
33602 },
33603 },
33604 {
33605 name: "FLTD",
33606 argLen: 2,
33607 asm: riscv.AFLTD,
33608 reg: regInfo{
33609 inputs: []inputInfo{
33610 {0, 9223372034707292160},
33611 {1, 9223372034707292160},
33612 },
33613 outputs: []outputInfo{
33614 {0, 1006632944},
33615 },
33616 },
33617 },
33618 {
33619 name: "FLED",
33620 argLen: 2,
33621 asm: riscv.AFLED,
33622 reg: regInfo{
33623 inputs: []inputInfo{
33624 {0, 9223372034707292160},
33625 {1, 9223372034707292160},
33626 },
33627 outputs: []outputInfo{
33628 {0, 1006632944},
33629 },
33630 },
33631 },
33632 {
33633 name: "LoweredFMIND",
33634 argLen: 2,
33635 commutative: true,
33636 resultNotInArgs: true,
33637 asm: riscv.AFMIND,
33638 reg: regInfo{
33639 inputs: []inputInfo{
33640 {0, 9223372034707292160},
33641 {1, 9223372034707292160},
33642 },
33643 outputs: []outputInfo{
33644 {0, 9223372034707292160},
33645 },
33646 },
33647 },
33648 {
33649 name: "LoweredFMAXD",
33650 argLen: 2,
33651 commutative: true,
33652 resultNotInArgs: true,
33653 asm: riscv.AFMAXD,
33654 reg: regInfo{
33655 inputs: []inputInfo{
33656 {0, 9223372034707292160},
33657 {1, 9223372034707292160},
33658 },
33659 outputs: []outputInfo{
33660 {0, 9223372034707292160},
33661 },
33662 },
33663 },
33664
33665 {
33666 name: "FADDS",
33667 argLen: 2,
33668 commutative: true,
33669 resultInArg0: true,
33670 asm: s390x.AFADDS,
33671 reg: regInfo{
33672 inputs: []inputInfo{
33673 {0, 4294901760},
33674 {1, 4294901760},
33675 },
33676 outputs: []outputInfo{
33677 {0, 4294901760},
33678 },
33679 },
33680 },
33681 {
33682 name: "FADD",
33683 argLen: 2,
33684 commutative: true,
33685 resultInArg0: true,
33686 asm: s390x.AFADD,
33687 reg: regInfo{
33688 inputs: []inputInfo{
33689 {0, 4294901760},
33690 {1, 4294901760},
33691 },
33692 outputs: []outputInfo{
33693 {0, 4294901760},
33694 },
33695 },
33696 },
33697 {
33698 name: "FSUBS",
33699 argLen: 2,
33700 resultInArg0: true,
33701 asm: s390x.AFSUBS,
33702 reg: regInfo{
33703 inputs: []inputInfo{
33704 {0, 4294901760},
33705 {1, 4294901760},
33706 },
33707 outputs: []outputInfo{
33708 {0, 4294901760},
33709 },
33710 },
33711 },
33712 {
33713 name: "FSUB",
33714 argLen: 2,
33715 resultInArg0: true,
33716 asm: s390x.AFSUB,
33717 reg: regInfo{
33718 inputs: []inputInfo{
33719 {0, 4294901760},
33720 {1, 4294901760},
33721 },
33722 outputs: []outputInfo{
33723 {0, 4294901760},
33724 },
33725 },
33726 },
33727 {
33728 name: "FMULS",
33729 argLen: 2,
33730 commutative: true,
33731 resultInArg0: true,
33732 asm: s390x.AFMULS,
33733 reg: regInfo{
33734 inputs: []inputInfo{
33735 {0, 4294901760},
33736 {1, 4294901760},
33737 },
33738 outputs: []outputInfo{
33739 {0, 4294901760},
33740 },
33741 },
33742 },
33743 {
33744 name: "FMUL",
33745 argLen: 2,
33746 commutative: true,
33747 resultInArg0: true,
33748 asm: s390x.AFMUL,
33749 reg: regInfo{
33750 inputs: []inputInfo{
33751 {0, 4294901760},
33752 {1, 4294901760},
33753 },
33754 outputs: []outputInfo{
33755 {0, 4294901760},
33756 },
33757 },
33758 },
33759 {
33760 name: "FDIVS",
33761 argLen: 2,
33762 resultInArg0: true,
33763 asm: s390x.AFDIVS,
33764 reg: regInfo{
33765 inputs: []inputInfo{
33766 {0, 4294901760},
33767 {1, 4294901760},
33768 },
33769 outputs: []outputInfo{
33770 {0, 4294901760},
33771 },
33772 },
33773 },
33774 {
33775 name: "FDIV",
33776 argLen: 2,
33777 resultInArg0: true,
33778 asm: s390x.AFDIV,
33779 reg: regInfo{
33780 inputs: []inputInfo{
33781 {0, 4294901760},
33782 {1, 4294901760},
33783 },
33784 outputs: []outputInfo{
33785 {0, 4294901760},
33786 },
33787 },
33788 },
33789 {
33790 name: "FNEGS",
33791 argLen: 1,
33792 clobberFlags: true,
33793 asm: s390x.AFNEGS,
33794 reg: regInfo{
33795 inputs: []inputInfo{
33796 {0, 4294901760},
33797 },
33798 outputs: []outputInfo{
33799 {0, 4294901760},
33800 },
33801 },
33802 },
33803 {
33804 name: "FNEG",
33805 argLen: 1,
33806 clobberFlags: true,
33807 asm: s390x.AFNEG,
33808 reg: regInfo{
33809 inputs: []inputInfo{
33810 {0, 4294901760},
33811 },
33812 outputs: []outputInfo{
33813 {0, 4294901760},
33814 },
33815 },
33816 },
33817 {
33818 name: "FMADDS",
33819 argLen: 3,
33820 resultInArg0: true,
33821 asm: s390x.AFMADDS,
33822 reg: regInfo{
33823 inputs: []inputInfo{
33824 {0, 4294901760},
33825 {1, 4294901760},
33826 {2, 4294901760},
33827 },
33828 outputs: []outputInfo{
33829 {0, 4294901760},
33830 },
33831 },
33832 },
33833 {
33834 name: "FMADD",
33835 argLen: 3,
33836 resultInArg0: true,
33837 asm: s390x.AFMADD,
33838 reg: regInfo{
33839 inputs: []inputInfo{
33840 {0, 4294901760},
33841 {1, 4294901760},
33842 {2, 4294901760},
33843 },
33844 outputs: []outputInfo{
33845 {0, 4294901760},
33846 },
33847 },
33848 },
33849 {
33850 name: "FMSUBS",
33851 argLen: 3,
33852 resultInArg0: true,
33853 asm: s390x.AFMSUBS,
33854 reg: regInfo{
33855 inputs: []inputInfo{
33856 {0, 4294901760},
33857 {1, 4294901760},
33858 {2, 4294901760},
33859 },
33860 outputs: []outputInfo{
33861 {0, 4294901760},
33862 },
33863 },
33864 },
33865 {
33866 name: "FMSUB",
33867 argLen: 3,
33868 resultInArg0: true,
33869 asm: s390x.AFMSUB,
33870 reg: regInfo{
33871 inputs: []inputInfo{
33872 {0, 4294901760},
33873 {1, 4294901760},
33874 {2, 4294901760},
33875 },
33876 outputs: []outputInfo{
33877 {0, 4294901760},
33878 },
33879 },
33880 },
33881 {
33882 name: "LPDFR",
33883 argLen: 1,
33884 asm: s390x.ALPDFR,
33885 reg: regInfo{
33886 inputs: []inputInfo{
33887 {0, 4294901760},
33888 },
33889 outputs: []outputInfo{
33890 {0, 4294901760},
33891 },
33892 },
33893 },
33894 {
33895 name: "LNDFR",
33896 argLen: 1,
33897 asm: s390x.ALNDFR,
33898 reg: regInfo{
33899 inputs: []inputInfo{
33900 {0, 4294901760},
33901 },
33902 outputs: []outputInfo{
33903 {0, 4294901760},
33904 },
33905 },
33906 },
33907 {
33908 name: "CPSDR",
33909 argLen: 2,
33910 asm: s390x.ACPSDR,
33911 reg: regInfo{
33912 inputs: []inputInfo{
33913 {0, 4294901760},
33914 {1, 4294901760},
33915 },
33916 outputs: []outputInfo{
33917 {0, 4294901760},
33918 },
33919 },
33920 },
33921 {
33922 name: "FIDBR",
33923 auxType: auxInt8,
33924 argLen: 1,
33925 asm: s390x.AFIDBR,
33926 reg: regInfo{
33927 inputs: []inputInfo{
33928 {0, 4294901760},
33929 },
33930 outputs: []outputInfo{
33931 {0, 4294901760},
33932 },
33933 },
33934 },
33935 {
33936 name: "FMOVSload",
33937 auxType: auxSymOff,
33938 argLen: 2,
33939 faultOnNilArg0: true,
33940 symEffect: SymRead,
33941 asm: s390x.AFMOVS,
33942 reg: regInfo{
33943 inputs: []inputInfo{
33944 {0, 4295023614},
33945 },
33946 outputs: []outputInfo{
33947 {0, 4294901760},
33948 },
33949 },
33950 },
33951 {
33952 name: "FMOVDload",
33953 auxType: auxSymOff,
33954 argLen: 2,
33955 faultOnNilArg0: true,
33956 symEffect: SymRead,
33957 asm: s390x.AFMOVD,
33958 reg: regInfo{
33959 inputs: []inputInfo{
33960 {0, 4295023614},
33961 },
33962 outputs: []outputInfo{
33963 {0, 4294901760},
33964 },
33965 },
33966 },
33967 {
33968 name: "FMOVSconst",
33969 auxType: auxFloat32,
33970 argLen: 0,
33971 rematerializeable: true,
33972 asm: s390x.AFMOVS,
33973 reg: regInfo{
33974 outputs: []outputInfo{
33975 {0, 4294901760},
33976 },
33977 },
33978 },
33979 {
33980 name: "FMOVDconst",
33981 auxType: auxFloat64,
33982 argLen: 0,
33983 rematerializeable: true,
33984 asm: s390x.AFMOVD,
33985 reg: regInfo{
33986 outputs: []outputInfo{
33987 {0, 4294901760},
33988 },
33989 },
33990 },
33991 {
33992 name: "FMOVSloadidx",
33993 auxType: auxSymOff,
33994 argLen: 3,
33995 symEffect: SymRead,
33996 asm: s390x.AFMOVS,
33997 reg: regInfo{
33998 inputs: []inputInfo{
33999 {0, 56318},
34000 {1, 56318},
34001 },
34002 outputs: []outputInfo{
34003 {0, 4294901760},
34004 },
34005 },
34006 },
34007 {
34008 name: "FMOVDloadidx",
34009 auxType: auxSymOff,
34010 argLen: 3,
34011 symEffect: SymRead,
34012 asm: s390x.AFMOVD,
34013 reg: regInfo{
34014 inputs: []inputInfo{
34015 {0, 56318},
34016 {1, 56318},
34017 },
34018 outputs: []outputInfo{
34019 {0, 4294901760},
34020 },
34021 },
34022 },
34023 {
34024 name: "FMOVSstore",
34025 auxType: auxSymOff,
34026 argLen: 3,
34027 faultOnNilArg0: true,
34028 symEffect: SymWrite,
34029 asm: s390x.AFMOVS,
34030 reg: regInfo{
34031 inputs: []inputInfo{
34032 {0, 4295023614},
34033 {1, 4294901760},
34034 },
34035 },
34036 },
34037 {
34038 name: "FMOVDstore",
34039 auxType: auxSymOff,
34040 argLen: 3,
34041 faultOnNilArg0: true,
34042 symEffect: SymWrite,
34043 asm: s390x.AFMOVD,
34044 reg: regInfo{
34045 inputs: []inputInfo{
34046 {0, 4295023614},
34047 {1, 4294901760},
34048 },
34049 },
34050 },
34051 {
34052 name: "FMOVSstoreidx",
34053 auxType: auxSymOff,
34054 argLen: 4,
34055 symEffect: SymWrite,
34056 asm: s390x.AFMOVS,
34057 reg: regInfo{
34058 inputs: []inputInfo{
34059 {0, 56318},
34060 {1, 56318},
34061 {2, 4294901760},
34062 },
34063 },
34064 },
34065 {
34066 name: "FMOVDstoreidx",
34067 auxType: auxSymOff,
34068 argLen: 4,
34069 symEffect: SymWrite,
34070 asm: s390x.AFMOVD,
34071 reg: regInfo{
34072 inputs: []inputInfo{
34073 {0, 56318},
34074 {1, 56318},
34075 {2, 4294901760},
34076 },
34077 },
34078 },
34079 {
34080 name: "ADD",
34081 argLen: 2,
34082 commutative: true,
34083 clobberFlags: true,
34084 asm: s390x.AADD,
34085 reg: regInfo{
34086 inputs: []inputInfo{
34087 {1, 23551},
34088 {0, 56319},
34089 },
34090 outputs: []outputInfo{
34091 {0, 23551},
34092 },
34093 },
34094 },
34095 {
34096 name: "ADDW",
34097 argLen: 2,
34098 commutative: true,
34099 clobberFlags: true,
34100 asm: s390x.AADDW,
34101 reg: regInfo{
34102 inputs: []inputInfo{
34103 {1, 23551},
34104 {0, 56319},
34105 },
34106 outputs: []outputInfo{
34107 {0, 23551},
34108 },
34109 },
34110 },
34111 {
34112 name: "ADDconst",
34113 auxType: auxInt32,
34114 argLen: 1,
34115 clobberFlags: true,
34116 asm: s390x.AADD,
34117 reg: regInfo{
34118 inputs: []inputInfo{
34119 {0, 56319},
34120 },
34121 outputs: []outputInfo{
34122 {0, 23551},
34123 },
34124 },
34125 },
34126 {
34127 name: "ADDWconst",
34128 auxType: auxInt32,
34129 argLen: 1,
34130 clobberFlags: true,
34131 asm: s390x.AADDW,
34132 reg: regInfo{
34133 inputs: []inputInfo{
34134 {0, 56319},
34135 },
34136 outputs: []outputInfo{
34137 {0, 23551},
34138 },
34139 },
34140 },
34141 {
34142 name: "ADDload",
34143 auxType: auxSymOff,
34144 argLen: 3,
34145 resultInArg0: true,
34146 clobberFlags: true,
34147 faultOnNilArg1: true,
34148 symEffect: SymRead,
34149 asm: s390x.AADD,
34150 reg: regInfo{
34151 inputs: []inputInfo{
34152 {0, 23551},
34153 {1, 56318},
34154 },
34155 outputs: []outputInfo{
34156 {0, 23551},
34157 },
34158 },
34159 },
34160 {
34161 name: "ADDWload",
34162 auxType: auxSymOff,
34163 argLen: 3,
34164 resultInArg0: true,
34165 clobberFlags: true,
34166 faultOnNilArg1: true,
34167 symEffect: SymRead,
34168 asm: s390x.AADDW,
34169 reg: regInfo{
34170 inputs: []inputInfo{
34171 {0, 23551},
34172 {1, 56318},
34173 },
34174 outputs: []outputInfo{
34175 {0, 23551},
34176 },
34177 },
34178 },
34179 {
34180 name: "SUB",
34181 argLen: 2,
34182 clobberFlags: true,
34183 asm: s390x.ASUB,
34184 reg: regInfo{
34185 inputs: []inputInfo{
34186 {0, 23551},
34187 {1, 23551},
34188 },
34189 outputs: []outputInfo{
34190 {0, 23551},
34191 },
34192 },
34193 },
34194 {
34195 name: "SUBW",
34196 argLen: 2,
34197 clobberFlags: true,
34198 asm: s390x.ASUBW,
34199 reg: regInfo{
34200 inputs: []inputInfo{
34201 {0, 23551},
34202 {1, 23551},
34203 },
34204 outputs: []outputInfo{
34205 {0, 23551},
34206 },
34207 },
34208 },
34209 {
34210 name: "SUBconst",
34211 auxType: auxInt32,
34212 argLen: 1,
34213 resultInArg0: true,
34214 clobberFlags: true,
34215 asm: s390x.ASUB,
34216 reg: regInfo{
34217 inputs: []inputInfo{
34218 {0, 23551},
34219 },
34220 outputs: []outputInfo{
34221 {0, 23551},
34222 },
34223 },
34224 },
34225 {
34226 name: "SUBWconst",
34227 auxType: auxInt32,
34228 argLen: 1,
34229 resultInArg0: true,
34230 clobberFlags: true,
34231 asm: s390x.ASUBW,
34232 reg: regInfo{
34233 inputs: []inputInfo{
34234 {0, 23551},
34235 },
34236 outputs: []outputInfo{
34237 {0, 23551},
34238 },
34239 },
34240 },
34241 {
34242 name: "SUBload",
34243 auxType: auxSymOff,
34244 argLen: 3,
34245 resultInArg0: true,
34246 clobberFlags: true,
34247 faultOnNilArg1: true,
34248 symEffect: SymRead,
34249 asm: s390x.ASUB,
34250 reg: regInfo{
34251 inputs: []inputInfo{
34252 {0, 23551},
34253 {1, 56318},
34254 },
34255 outputs: []outputInfo{
34256 {0, 23551},
34257 },
34258 },
34259 },
34260 {
34261 name: "SUBWload",
34262 auxType: auxSymOff,
34263 argLen: 3,
34264 resultInArg0: true,
34265 clobberFlags: true,
34266 faultOnNilArg1: true,
34267 symEffect: SymRead,
34268 asm: s390x.ASUBW,
34269 reg: regInfo{
34270 inputs: []inputInfo{
34271 {0, 23551},
34272 {1, 56318},
34273 },
34274 outputs: []outputInfo{
34275 {0, 23551},
34276 },
34277 },
34278 },
34279 {
34280 name: "MULLD",
34281 argLen: 2,
34282 commutative: true,
34283 resultInArg0: true,
34284 clobberFlags: true,
34285 asm: s390x.AMULLD,
34286 reg: regInfo{
34287 inputs: []inputInfo{
34288 {0, 23551},
34289 {1, 23551},
34290 },
34291 outputs: []outputInfo{
34292 {0, 23551},
34293 },
34294 },
34295 },
34296 {
34297 name: "MULLW",
34298 argLen: 2,
34299 commutative: true,
34300 resultInArg0: true,
34301 clobberFlags: true,
34302 asm: s390x.AMULLW,
34303 reg: regInfo{
34304 inputs: []inputInfo{
34305 {0, 23551},
34306 {1, 23551},
34307 },
34308 outputs: []outputInfo{
34309 {0, 23551},
34310 },
34311 },
34312 },
34313 {
34314 name: "MULLDconst",
34315 auxType: auxInt32,
34316 argLen: 1,
34317 resultInArg0: true,
34318 clobberFlags: true,
34319 asm: s390x.AMULLD,
34320 reg: regInfo{
34321 inputs: []inputInfo{
34322 {0, 23551},
34323 },
34324 outputs: []outputInfo{
34325 {0, 23551},
34326 },
34327 },
34328 },
34329 {
34330 name: "MULLWconst",
34331 auxType: auxInt32,
34332 argLen: 1,
34333 resultInArg0: true,
34334 clobberFlags: true,
34335 asm: s390x.AMULLW,
34336 reg: regInfo{
34337 inputs: []inputInfo{
34338 {0, 23551},
34339 },
34340 outputs: []outputInfo{
34341 {0, 23551},
34342 },
34343 },
34344 },
34345 {
34346 name: "MULLDload",
34347 auxType: auxSymOff,
34348 argLen: 3,
34349 resultInArg0: true,
34350 clobberFlags: true,
34351 faultOnNilArg1: true,
34352 symEffect: SymRead,
34353 asm: s390x.AMULLD,
34354 reg: regInfo{
34355 inputs: []inputInfo{
34356 {0, 23551},
34357 {1, 56318},
34358 },
34359 outputs: []outputInfo{
34360 {0, 23551},
34361 },
34362 },
34363 },
34364 {
34365 name: "MULLWload",
34366 auxType: auxSymOff,
34367 argLen: 3,
34368 resultInArg0: true,
34369 clobberFlags: true,
34370 faultOnNilArg1: true,
34371 symEffect: SymRead,
34372 asm: s390x.AMULLW,
34373 reg: regInfo{
34374 inputs: []inputInfo{
34375 {0, 23551},
34376 {1, 56318},
34377 },
34378 outputs: []outputInfo{
34379 {0, 23551},
34380 },
34381 },
34382 },
34383 {
34384 name: "MULHD",
34385 argLen: 2,
34386 commutative: true,
34387 resultInArg0: true,
34388 clobberFlags: true,
34389 asm: s390x.AMULHD,
34390 reg: regInfo{
34391 inputs: []inputInfo{
34392 {0, 21503},
34393 {1, 21503},
34394 },
34395 clobbers: 2048,
34396 outputs: []outputInfo{
34397 {0, 21503},
34398 },
34399 },
34400 },
34401 {
34402 name: "MULHDU",
34403 argLen: 2,
34404 commutative: true,
34405 resultInArg0: true,
34406 clobberFlags: true,
34407 asm: s390x.AMULHDU,
34408 reg: regInfo{
34409 inputs: []inputInfo{
34410 {0, 21503},
34411 {1, 21503},
34412 },
34413 clobbers: 2048,
34414 outputs: []outputInfo{
34415 {0, 21503},
34416 },
34417 },
34418 },
34419 {
34420 name: "DIVD",
34421 argLen: 2,
34422 resultInArg0: true,
34423 clobberFlags: true,
34424 asm: s390x.ADIVD,
34425 reg: regInfo{
34426 inputs: []inputInfo{
34427 {0, 21503},
34428 {1, 21503},
34429 },
34430 clobbers: 2048,
34431 outputs: []outputInfo{
34432 {0, 21503},
34433 },
34434 },
34435 },
34436 {
34437 name: "DIVW",
34438 argLen: 2,
34439 resultInArg0: true,
34440 clobberFlags: true,
34441 asm: s390x.ADIVW,
34442 reg: regInfo{
34443 inputs: []inputInfo{
34444 {0, 21503},
34445 {1, 21503},
34446 },
34447 clobbers: 2048,
34448 outputs: []outputInfo{
34449 {0, 21503},
34450 },
34451 },
34452 },
34453 {
34454 name: "DIVDU",
34455 argLen: 2,
34456 resultInArg0: true,
34457 clobberFlags: true,
34458 asm: s390x.ADIVDU,
34459 reg: regInfo{
34460 inputs: []inputInfo{
34461 {0, 21503},
34462 {1, 21503},
34463 },
34464 clobbers: 2048,
34465 outputs: []outputInfo{
34466 {0, 21503},
34467 },
34468 },
34469 },
34470 {
34471 name: "DIVWU",
34472 argLen: 2,
34473 resultInArg0: true,
34474 clobberFlags: true,
34475 asm: s390x.ADIVWU,
34476 reg: regInfo{
34477 inputs: []inputInfo{
34478 {0, 21503},
34479 {1, 21503},
34480 },
34481 clobbers: 2048,
34482 outputs: []outputInfo{
34483 {0, 21503},
34484 },
34485 },
34486 },
34487 {
34488 name: "MODD",
34489 argLen: 2,
34490 resultInArg0: true,
34491 clobberFlags: true,
34492 asm: s390x.AMODD,
34493 reg: regInfo{
34494 inputs: []inputInfo{
34495 {0, 21503},
34496 {1, 21503},
34497 },
34498 clobbers: 2048,
34499 outputs: []outputInfo{
34500 {0, 21503},
34501 },
34502 },
34503 },
34504 {
34505 name: "MODW",
34506 argLen: 2,
34507 resultInArg0: true,
34508 clobberFlags: true,
34509 asm: s390x.AMODW,
34510 reg: regInfo{
34511 inputs: []inputInfo{
34512 {0, 21503},
34513 {1, 21503},
34514 },
34515 clobbers: 2048,
34516 outputs: []outputInfo{
34517 {0, 21503},
34518 },
34519 },
34520 },
34521 {
34522 name: "MODDU",
34523 argLen: 2,
34524 resultInArg0: true,
34525 clobberFlags: true,
34526 asm: s390x.AMODDU,
34527 reg: regInfo{
34528 inputs: []inputInfo{
34529 {0, 21503},
34530 {1, 21503},
34531 },
34532 clobbers: 2048,
34533 outputs: []outputInfo{
34534 {0, 21503},
34535 },
34536 },
34537 },
34538 {
34539 name: "MODWU",
34540 argLen: 2,
34541 resultInArg0: true,
34542 clobberFlags: true,
34543 asm: s390x.AMODWU,
34544 reg: regInfo{
34545 inputs: []inputInfo{
34546 {0, 21503},
34547 {1, 21503},
34548 },
34549 clobbers: 2048,
34550 outputs: []outputInfo{
34551 {0, 21503},
34552 },
34553 },
34554 },
34555 {
34556 name: "AND",
34557 argLen: 2,
34558 commutative: true,
34559 clobberFlags: true,
34560 asm: s390x.AAND,
34561 reg: regInfo{
34562 inputs: []inputInfo{
34563 {0, 23551},
34564 {1, 23551},
34565 },
34566 outputs: []outputInfo{
34567 {0, 23551},
34568 },
34569 },
34570 },
34571 {
34572 name: "ANDW",
34573 argLen: 2,
34574 commutative: true,
34575 clobberFlags: true,
34576 asm: s390x.AANDW,
34577 reg: regInfo{
34578 inputs: []inputInfo{
34579 {0, 23551},
34580 {1, 23551},
34581 },
34582 outputs: []outputInfo{
34583 {0, 23551},
34584 },
34585 },
34586 },
34587 {
34588 name: "ANDconst",
34589 auxType: auxInt64,
34590 argLen: 1,
34591 resultInArg0: true,
34592 clobberFlags: true,
34593 asm: s390x.AAND,
34594 reg: regInfo{
34595 inputs: []inputInfo{
34596 {0, 23551},
34597 },
34598 outputs: []outputInfo{
34599 {0, 23551},
34600 },
34601 },
34602 },
34603 {
34604 name: "ANDWconst",
34605 auxType: auxInt32,
34606 argLen: 1,
34607 resultInArg0: true,
34608 clobberFlags: true,
34609 asm: s390x.AANDW,
34610 reg: regInfo{
34611 inputs: []inputInfo{
34612 {0, 23551},
34613 },
34614 outputs: []outputInfo{
34615 {0, 23551},
34616 },
34617 },
34618 },
34619 {
34620 name: "ANDload",
34621 auxType: auxSymOff,
34622 argLen: 3,
34623 resultInArg0: true,
34624 clobberFlags: true,
34625 faultOnNilArg1: true,
34626 symEffect: SymRead,
34627 asm: s390x.AAND,
34628 reg: regInfo{
34629 inputs: []inputInfo{
34630 {0, 23551},
34631 {1, 56318},
34632 },
34633 outputs: []outputInfo{
34634 {0, 23551},
34635 },
34636 },
34637 },
34638 {
34639 name: "ANDWload",
34640 auxType: auxSymOff,
34641 argLen: 3,
34642 resultInArg0: true,
34643 clobberFlags: true,
34644 faultOnNilArg1: true,
34645 symEffect: SymRead,
34646 asm: s390x.AANDW,
34647 reg: regInfo{
34648 inputs: []inputInfo{
34649 {0, 23551},
34650 {1, 56318},
34651 },
34652 outputs: []outputInfo{
34653 {0, 23551},
34654 },
34655 },
34656 },
34657 {
34658 name: "OR",
34659 argLen: 2,
34660 commutative: true,
34661 clobberFlags: true,
34662 asm: s390x.AOR,
34663 reg: regInfo{
34664 inputs: []inputInfo{
34665 {0, 23551},
34666 {1, 23551},
34667 },
34668 outputs: []outputInfo{
34669 {0, 23551},
34670 },
34671 },
34672 },
34673 {
34674 name: "ORW",
34675 argLen: 2,
34676 commutative: true,
34677 clobberFlags: true,
34678 asm: s390x.AORW,
34679 reg: regInfo{
34680 inputs: []inputInfo{
34681 {0, 23551},
34682 {1, 23551},
34683 },
34684 outputs: []outputInfo{
34685 {0, 23551},
34686 },
34687 },
34688 },
34689 {
34690 name: "ORconst",
34691 auxType: auxInt64,
34692 argLen: 1,
34693 resultInArg0: true,
34694 clobberFlags: true,
34695 asm: s390x.AOR,
34696 reg: regInfo{
34697 inputs: []inputInfo{
34698 {0, 23551},
34699 },
34700 outputs: []outputInfo{
34701 {0, 23551},
34702 },
34703 },
34704 },
34705 {
34706 name: "ORWconst",
34707 auxType: auxInt32,
34708 argLen: 1,
34709 resultInArg0: true,
34710 clobberFlags: true,
34711 asm: s390x.AORW,
34712 reg: regInfo{
34713 inputs: []inputInfo{
34714 {0, 23551},
34715 },
34716 outputs: []outputInfo{
34717 {0, 23551},
34718 },
34719 },
34720 },
34721 {
34722 name: "ORload",
34723 auxType: auxSymOff,
34724 argLen: 3,
34725 resultInArg0: true,
34726 clobberFlags: true,
34727 faultOnNilArg1: true,
34728 symEffect: SymRead,
34729 asm: s390x.AOR,
34730 reg: regInfo{
34731 inputs: []inputInfo{
34732 {0, 23551},
34733 {1, 56318},
34734 },
34735 outputs: []outputInfo{
34736 {0, 23551},
34737 },
34738 },
34739 },
34740 {
34741 name: "ORWload",
34742 auxType: auxSymOff,
34743 argLen: 3,
34744 resultInArg0: true,
34745 clobberFlags: true,
34746 faultOnNilArg1: true,
34747 symEffect: SymRead,
34748 asm: s390x.AORW,
34749 reg: regInfo{
34750 inputs: []inputInfo{
34751 {0, 23551},
34752 {1, 56318},
34753 },
34754 outputs: []outputInfo{
34755 {0, 23551},
34756 },
34757 },
34758 },
34759 {
34760 name: "XOR",
34761 argLen: 2,
34762 commutative: true,
34763 clobberFlags: true,
34764 asm: s390x.AXOR,
34765 reg: regInfo{
34766 inputs: []inputInfo{
34767 {0, 23551},
34768 {1, 23551},
34769 },
34770 outputs: []outputInfo{
34771 {0, 23551},
34772 },
34773 },
34774 },
34775 {
34776 name: "XORW",
34777 argLen: 2,
34778 commutative: true,
34779 clobberFlags: true,
34780 asm: s390x.AXORW,
34781 reg: regInfo{
34782 inputs: []inputInfo{
34783 {0, 23551},
34784 {1, 23551},
34785 },
34786 outputs: []outputInfo{
34787 {0, 23551},
34788 },
34789 },
34790 },
34791 {
34792 name: "XORconst",
34793 auxType: auxInt64,
34794 argLen: 1,
34795 resultInArg0: true,
34796 clobberFlags: true,
34797 asm: s390x.AXOR,
34798 reg: regInfo{
34799 inputs: []inputInfo{
34800 {0, 23551},
34801 },
34802 outputs: []outputInfo{
34803 {0, 23551},
34804 },
34805 },
34806 },
34807 {
34808 name: "XORWconst",
34809 auxType: auxInt32,
34810 argLen: 1,
34811 resultInArg0: true,
34812 clobberFlags: true,
34813 asm: s390x.AXORW,
34814 reg: regInfo{
34815 inputs: []inputInfo{
34816 {0, 23551},
34817 },
34818 outputs: []outputInfo{
34819 {0, 23551},
34820 },
34821 },
34822 },
34823 {
34824 name: "XORload",
34825 auxType: auxSymOff,
34826 argLen: 3,
34827 resultInArg0: true,
34828 clobberFlags: true,
34829 faultOnNilArg1: true,
34830 symEffect: SymRead,
34831 asm: s390x.AXOR,
34832 reg: regInfo{
34833 inputs: []inputInfo{
34834 {0, 23551},
34835 {1, 56318},
34836 },
34837 outputs: []outputInfo{
34838 {0, 23551},
34839 },
34840 },
34841 },
34842 {
34843 name: "XORWload",
34844 auxType: auxSymOff,
34845 argLen: 3,
34846 resultInArg0: true,
34847 clobberFlags: true,
34848 faultOnNilArg1: true,
34849 symEffect: SymRead,
34850 asm: s390x.AXORW,
34851 reg: regInfo{
34852 inputs: []inputInfo{
34853 {0, 23551},
34854 {1, 56318},
34855 },
34856 outputs: []outputInfo{
34857 {0, 23551},
34858 },
34859 },
34860 },
34861 {
34862 name: "ADDC",
34863 argLen: 2,
34864 commutative: true,
34865 asm: s390x.AADDC,
34866 reg: regInfo{
34867 inputs: []inputInfo{
34868 {0, 23551},
34869 {1, 23551},
34870 },
34871 outputs: []outputInfo{
34872 {0, 23551},
34873 },
34874 },
34875 },
34876 {
34877 name: "ADDCconst",
34878 auxType: auxInt16,
34879 argLen: 1,
34880 asm: s390x.AADDC,
34881 reg: regInfo{
34882 inputs: []inputInfo{
34883 {0, 23551},
34884 },
34885 outputs: []outputInfo{
34886 {0, 23551},
34887 },
34888 },
34889 },
34890 {
34891 name: "ADDE",
34892 argLen: 3,
34893 commutative: true,
34894 resultInArg0: true,
34895 asm: s390x.AADDE,
34896 reg: regInfo{
34897 inputs: []inputInfo{
34898 {0, 23551},
34899 {1, 23551},
34900 },
34901 outputs: []outputInfo{
34902 {0, 23551},
34903 },
34904 },
34905 },
34906 {
34907 name: "SUBC",
34908 argLen: 2,
34909 asm: s390x.ASUBC,
34910 reg: regInfo{
34911 inputs: []inputInfo{
34912 {0, 23551},
34913 {1, 23551},
34914 },
34915 outputs: []outputInfo{
34916 {0, 23551},
34917 },
34918 },
34919 },
34920 {
34921 name: "SUBE",
34922 argLen: 3,
34923 resultInArg0: true,
34924 asm: s390x.ASUBE,
34925 reg: regInfo{
34926 inputs: []inputInfo{
34927 {0, 23551},
34928 {1, 23551},
34929 },
34930 outputs: []outputInfo{
34931 {0, 23551},
34932 },
34933 },
34934 },
34935 {
34936 name: "CMP",
34937 argLen: 2,
34938 asm: s390x.ACMP,
34939 reg: regInfo{
34940 inputs: []inputInfo{
34941 {0, 56319},
34942 {1, 56319},
34943 },
34944 },
34945 },
34946 {
34947 name: "CMPW",
34948 argLen: 2,
34949 asm: s390x.ACMPW,
34950 reg: regInfo{
34951 inputs: []inputInfo{
34952 {0, 56319},
34953 {1, 56319},
34954 },
34955 },
34956 },
34957 {
34958 name: "CMPU",
34959 argLen: 2,
34960 asm: s390x.ACMPU,
34961 reg: regInfo{
34962 inputs: []inputInfo{
34963 {0, 56319},
34964 {1, 56319},
34965 },
34966 },
34967 },
34968 {
34969 name: "CMPWU",
34970 argLen: 2,
34971 asm: s390x.ACMPWU,
34972 reg: regInfo{
34973 inputs: []inputInfo{
34974 {0, 56319},
34975 {1, 56319},
34976 },
34977 },
34978 },
34979 {
34980 name: "CMPconst",
34981 auxType: auxInt32,
34982 argLen: 1,
34983 asm: s390x.ACMP,
34984 reg: regInfo{
34985 inputs: []inputInfo{
34986 {0, 56319},
34987 },
34988 },
34989 },
34990 {
34991 name: "CMPWconst",
34992 auxType: auxInt32,
34993 argLen: 1,
34994 asm: s390x.ACMPW,
34995 reg: regInfo{
34996 inputs: []inputInfo{
34997 {0, 56319},
34998 },
34999 },
35000 },
35001 {
35002 name: "CMPUconst",
35003 auxType: auxInt32,
35004 argLen: 1,
35005 asm: s390x.ACMPU,
35006 reg: regInfo{
35007 inputs: []inputInfo{
35008 {0, 56319},
35009 },
35010 },
35011 },
35012 {
35013 name: "CMPWUconst",
35014 auxType: auxInt32,
35015 argLen: 1,
35016 asm: s390x.ACMPWU,
35017 reg: regInfo{
35018 inputs: []inputInfo{
35019 {0, 56319},
35020 },
35021 },
35022 },
35023 {
35024 name: "FCMPS",
35025 argLen: 2,
35026 asm: s390x.ACEBR,
35027 reg: regInfo{
35028 inputs: []inputInfo{
35029 {0, 4294901760},
35030 {1, 4294901760},
35031 },
35032 },
35033 },
35034 {
35035 name: "FCMP",
35036 argLen: 2,
35037 asm: s390x.AFCMPU,
35038 reg: regInfo{
35039 inputs: []inputInfo{
35040 {0, 4294901760},
35041 {1, 4294901760},
35042 },
35043 },
35044 },
35045 {
35046 name: "LTDBR",
35047 argLen: 1,
35048 asm: s390x.ALTDBR,
35049 reg: regInfo{
35050 inputs: []inputInfo{
35051 {0, 4294901760},
35052 },
35053 },
35054 },
35055 {
35056 name: "LTEBR",
35057 argLen: 1,
35058 asm: s390x.ALTEBR,
35059 reg: regInfo{
35060 inputs: []inputInfo{
35061 {0, 4294901760},
35062 },
35063 },
35064 },
35065 {
35066 name: "SLD",
35067 argLen: 2,
35068 asm: s390x.ASLD,
35069 reg: regInfo{
35070 inputs: []inputInfo{
35071 {1, 23550},
35072 {0, 23551},
35073 },
35074 outputs: []outputInfo{
35075 {0, 23551},
35076 },
35077 },
35078 },
35079 {
35080 name: "SLW",
35081 argLen: 2,
35082 asm: s390x.ASLW,
35083 reg: regInfo{
35084 inputs: []inputInfo{
35085 {1, 23550},
35086 {0, 23551},
35087 },
35088 outputs: []outputInfo{
35089 {0, 23551},
35090 },
35091 },
35092 },
35093 {
35094 name: "SLDconst",
35095 auxType: auxUInt8,
35096 argLen: 1,
35097 asm: s390x.ASLD,
35098 reg: regInfo{
35099 inputs: []inputInfo{
35100 {0, 23551},
35101 },
35102 outputs: []outputInfo{
35103 {0, 23551},
35104 },
35105 },
35106 },
35107 {
35108 name: "SLWconst",
35109 auxType: auxUInt8,
35110 argLen: 1,
35111 asm: s390x.ASLW,
35112 reg: regInfo{
35113 inputs: []inputInfo{
35114 {0, 23551},
35115 },
35116 outputs: []outputInfo{
35117 {0, 23551},
35118 },
35119 },
35120 },
35121 {
35122 name: "SRD",
35123 argLen: 2,
35124 asm: s390x.ASRD,
35125 reg: regInfo{
35126 inputs: []inputInfo{
35127 {1, 23550},
35128 {0, 23551},
35129 },
35130 outputs: []outputInfo{
35131 {0, 23551},
35132 },
35133 },
35134 },
35135 {
35136 name: "SRW",
35137 argLen: 2,
35138 asm: s390x.ASRW,
35139 reg: regInfo{
35140 inputs: []inputInfo{
35141 {1, 23550},
35142 {0, 23551},
35143 },
35144 outputs: []outputInfo{
35145 {0, 23551},
35146 },
35147 },
35148 },
35149 {
35150 name: "SRDconst",
35151 auxType: auxUInt8,
35152 argLen: 1,
35153 asm: s390x.ASRD,
35154 reg: regInfo{
35155 inputs: []inputInfo{
35156 {0, 23551},
35157 },
35158 outputs: []outputInfo{
35159 {0, 23551},
35160 },
35161 },
35162 },
35163 {
35164 name: "SRWconst",
35165 auxType: auxUInt8,
35166 argLen: 1,
35167 asm: s390x.ASRW,
35168 reg: regInfo{
35169 inputs: []inputInfo{
35170 {0, 23551},
35171 },
35172 outputs: []outputInfo{
35173 {0, 23551},
35174 },
35175 },
35176 },
35177 {
35178 name: "SRAD",
35179 argLen: 2,
35180 clobberFlags: true,
35181 asm: s390x.ASRAD,
35182 reg: regInfo{
35183 inputs: []inputInfo{
35184 {1, 23550},
35185 {0, 23551},
35186 },
35187 outputs: []outputInfo{
35188 {0, 23551},
35189 },
35190 },
35191 },
35192 {
35193 name: "SRAW",
35194 argLen: 2,
35195 clobberFlags: true,
35196 asm: s390x.ASRAW,
35197 reg: regInfo{
35198 inputs: []inputInfo{
35199 {1, 23550},
35200 {0, 23551},
35201 },
35202 outputs: []outputInfo{
35203 {0, 23551},
35204 },
35205 },
35206 },
35207 {
35208 name: "SRADconst",
35209 auxType: auxUInt8,
35210 argLen: 1,
35211 clobberFlags: true,
35212 asm: s390x.ASRAD,
35213 reg: regInfo{
35214 inputs: []inputInfo{
35215 {0, 23551},
35216 },
35217 outputs: []outputInfo{
35218 {0, 23551},
35219 },
35220 },
35221 },
35222 {
35223 name: "SRAWconst",
35224 auxType: auxUInt8,
35225 argLen: 1,
35226 clobberFlags: true,
35227 asm: s390x.ASRAW,
35228 reg: regInfo{
35229 inputs: []inputInfo{
35230 {0, 23551},
35231 },
35232 outputs: []outputInfo{
35233 {0, 23551},
35234 },
35235 },
35236 },
35237 {
35238 name: "RLLG",
35239 argLen: 2,
35240 asm: s390x.ARLLG,
35241 reg: regInfo{
35242 inputs: []inputInfo{
35243 {1, 23550},
35244 {0, 23551},
35245 },
35246 outputs: []outputInfo{
35247 {0, 23551},
35248 },
35249 },
35250 },
35251 {
35252 name: "RLL",
35253 argLen: 2,
35254 asm: s390x.ARLL,
35255 reg: regInfo{
35256 inputs: []inputInfo{
35257 {1, 23550},
35258 {0, 23551},
35259 },
35260 outputs: []outputInfo{
35261 {0, 23551},
35262 },
35263 },
35264 },
35265 {
35266 name: "RLLconst",
35267 auxType: auxUInt8,
35268 argLen: 1,
35269 asm: s390x.ARLL,
35270 reg: regInfo{
35271 inputs: []inputInfo{
35272 {0, 23551},
35273 },
35274 outputs: []outputInfo{
35275 {0, 23551},
35276 },
35277 },
35278 },
35279 {
35280 name: "RXSBG",
35281 auxType: auxS390XRotateParams,
35282 argLen: 2,
35283 resultInArg0: true,
35284 clobberFlags: true,
35285 asm: s390x.ARXSBG,
35286 reg: regInfo{
35287 inputs: []inputInfo{
35288 {0, 23551},
35289 {1, 23551},
35290 },
35291 outputs: []outputInfo{
35292 {0, 23551},
35293 },
35294 },
35295 },
35296 {
35297 name: "RISBGZ",
35298 auxType: auxS390XRotateParams,
35299 argLen: 1,
35300 clobberFlags: true,
35301 asm: s390x.ARISBGZ,
35302 reg: regInfo{
35303 inputs: []inputInfo{
35304 {0, 23551},
35305 },
35306 outputs: []outputInfo{
35307 {0, 23551},
35308 },
35309 },
35310 },
35311 {
35312 name: "NEG",
35313 argLen: 1,
35314 clobberFlags: true,
35315 asm: s390x.ANEG,
35316 reg: regInfo{
35317 inputs: []inputInfo{
35318 {0, 23551},
35319 },
35320 outputs: []outputInfo{
35321 {0, 23551},
35322 },
35323 },
35324 },
35325 {
35326 name: "NEGW",
35327 argLen: 1,
35328 clobberFlags: true,
35329 asm: s390x.ANEGW,
35330 reg: regInfo{
35331 inputs: []inputInfo{
35332 {0, 23551},
35333 },
35334 outputs: []outputInfo{
35335 {0, 23551},
35336 },
35337 },
35338 },
35339 {
35340 name: "NOT",
35341 argLen: 1,
35342 resultInArg0: true,
35343 clobberFlags: true,
35344 reg: regInfo{
35345 inputs: []inputInfo{
35346 {0, 23551},
35347 },
35348 outputs: []outputInfo{
35349 {0, 23551},
35350 },
35351 },
35352 },
35353 {
35354 name: "NOTW",
35355 argLen: 1,
35356 resultInArg0: true,
35357 clobberFlags: true,
35358 reg: regInfo{
35359 inputs: []inputInfo{
35360 {0, 23551},
35361 },
35362 outputs: []outputInfo{
35363 {0, 23551},
35364 },
35365 },
35366 },
35367 {
35368 name: "FSQRT",
35369 argLen: 1,
35370 asm: s390x.AFSQRT,
35371 reg: regInfo{
35372 inputs: []inputInfo{
35373 {0, 4294901760},
35374 },
35375 outputs: []outputInfo{
35376 {0, 4294901760},
35377 },
35378 },
35379 },
35380 {
35381 name: "FSQRTS",
35382 argLen: 1,
35383 asm: s390x.AFSQRTS,
35384 reg: regInfo{
35385 inputs: []inputInfo{
35386 {0, 4294901760},
35387 },
35388 outputs: []outputInfo{
35389 {0, 4294901760},
35390 },
35391 },
35392 },
35393 {
35394 name: "LOCGR",
35395 auxType: auxS390XCCMask,
35396 argLen: 3,
35397 resultInArg0: true,
35398 asm: s390x.ALOCGR,
35399 reg: regInfo{
35400 inputs: []inputInfo{
35401 {0, 23551},
35402 {1, 23551},
35403 },
35404 outputs: []outputInfo{
35405 {0, 23551},
35406 },
35407 },
35408 },
35409 {
35410 name: "MOVBreg",
35411 argLen: 1,
35412 asm: s390x.AMOVB,
35413 reg: regInfo{
35414 inputs: []inputInfo{
35415 {0, 56319},
35416 },
35417 outputs: []outputInfo{
35418 {0, 23551},
35419 },
35420 },
35421 },
35422 {
35423 name: "MOVBZreg",
35424 argLen: 1,
35425 asm: s390x.AMOVBZ,
35426 reg: regInfo{
35427 inputs: []inputInfo{
35428 {0, 56319},
35429 },
35430 outputs: []outputInfo{
35431 {0, 23551},
35432 },
35433 },
35434 },
35435 {
35436 name: "MOVHreg",
35437 argLen: 1,
35438 asm: s390x.AMOVH,
35439 reg: regInfo{
35440 inputs: []inputInfo{
35441 {0, 56319},
35442 },
35443 outputs: []outputInfo{
35444 {0, 23551},
35445 },
35446 },
35447 },
35448 {
35449 name: "MOVHZreg",
35450 argLen: 1,
35451 asm: s390x.AMOVHZ,
35452 reg: regInfo{
35453 inputs: []inputInfo{
35454 {0, 56319},
35455 },
35456 outputs: []outputInfo{
35457 {0, 23551},
35458 },
35459 },
35460 },
35461 {
35462 name: "MOVWreg",
35463 argLen: 1,
35464 asm: s390x.AMOVW,
35465 reg: regInfo{
35466 inputs: []inputInfo{
35467 {0, 56319},
35468 },
35469 outputs: []outputInfo{
35470 {0, 23551},
35471 },
35472 },
35473 },
35474 {
35475 name: "MOVWZreg",
35476 argLen: 1,
35477 asm: s390x.AMOVWZ,
35478 reg: regInfo{
35479 inputs: []inputInfo{
35480 {0, 56319},
35481 },
35482 outputs: []outputInfo{
35483 {0, 23551},
35484 },
35485 },
35486 },
35487 {
35488 name: "MOVDconst",
35489 auxType: auxInt64,
35490 argLen: 0,
35491 rematerializeable: true,
35492 asm: s390x.AMOVD,
35493 reg: regInfo{
35494 outputs: []outputInfo{
35495 {0, 23551},
35496 },
35497 },
35498 },
35499 {
35500 name: "LDGR",
35501 argLen: 1,
35502 asm: s390x.ALDGR,
35503 reg: regInfo{
35504 inputs: []inputInfo{
35505 {0, 23551},
35506 },
35507 outputs: []outputInfo{
35508 {0, 4294901760},
35509 },
35510 },
35511 },
35512 {
35513 name: "LGDR",
35514 argLen: 1,
35515 asm: s390x.ALGDR,
35516 reg: regInfo{
35517 inputs: []inputInfo{
35518 {0, 4294901760},
35519 },
35520 outputs: []outputInfo{
35521 {0, 23551},
35522 },
35523 },
35524 },
35525 {
35526 name: "CFDBRA",
35527 argLen: 1,
35528 clobberFlags: true,
35529 asm: s390x.ACFDBRA,
35530 reg: regInfo{
35531 inputs: []inputInfo{
35532 {0, 4294901760},
35533 },
35534 outputs: []outputInfo{
35535 {0, 23551},
35536 },
35537 },
35538 },
35539 {
35540 name: "CGDBRA",
35541 argLen: 1,
35542 clobberFlags: true,
35543 asm: s390x.ACGDBRA,
35544 reg: regInfo{
35545 inputs: []inputInfo{
35546 {0, 4294901760},
35547 },
35548 outputs: []outputInfo{
35549 {0, 23551},
35550 },
35551 },
35552 },
35553 {
35554 name: "CFEBRA",
35555 argLen: 1,
35556 clobberFlags: true,
35557 asm: s390x.ACFEBRA,
35558 reg: regInfo{
35559 inputs: []inputInfo{
35560 {0, 4294901760},
35561 },
35562 outputs: []outputInfo{
35563 {0, 23551},
35564 },
35565 },
35566 },
35567 {
35568 name: "CGEBRA",
35569 argLen: 1,
35570 clobberFlags: true,
35571 asm: s390x.ACGEBRA,
35572 reg: regInfo{
35573 inputs: []inputInfo{
35574 {0, 4294901760},
35575 },
35576 outputs: []outputInfo{
35577 {0, 23551},
35578 },
35579 },
35580 },
35581 {
35582 name: "CEFBRA",
35583 argLen: 1,
35584 clobberFlags: true,
35585 asm: s390x.ACEFBRA,
35586 reg: regInfo{
35587 inputs: []inputInfo{
35588 {0, 23551},
35589 },
35590 outputs: []outputInfo{
35591 {0, 4294901760},
35592 },
35593 },
35594 },
35595 {
35596 name: "CDFBRA",
35597 argLen: 1,
35598 clobberFlags: true,
35599 asm: s390x.ACDFBRA,
35600 reg: regInfo{
35601 inputs: []inputInfo{
35602 {0, 23551},
35603 },
35604 outputs: []outputInfo{
35605 {0, 4294901760},
35606 },
35607 },
35608 },
35609 {
35610 name: "CEGBRA",
35611 argLen: 1,
35612 clobberFlags: true,
35613 asm: s390x.ACEGBRA,
35614 reg: regInfo{
35615 inputs: []inputInfo{
35616 {0, 23551},
35617 },
35618 outputs: []outputInfo{
35619 {0, 4294901760},
35620 },
35621 },
35622 },
35623 {
35624 name: "CDGBRA",
35625 argLen: 1,
35626 clobberFlags: true,
35627 asm: s390x.ACDGBRA,
35628 reg: regInfo{
35629 inputs: []inputInfo{
35630 {0, 23551},
35631 },
35632 outputs: []outputInfo{
35633 {0, 4294901760},
35634 },
35635 },
35636 },
35637 {
35638 name: "CLFEBR",
35639 argLen: 1,
35640 clobberFlags: true,
35641 asm: s390x.ACLFEBR,
35642 reg: regInfo{
35643 inputs: []inputInfo{
35644 {0, 4294901760},
35645 },
35646 outputs: []outputInfo{
35647 {0, 23551},
35648 },
35649 },
35650 },
35651 {
35652 name: "CLFDBR",
35653 argLen: 1,
35654 clobberFlags: true,
35655 asm: s390x.ACLFDBR,
35656 reg: regInfo{
35657 inputs: []inputInfo{
35658 {0, 4294901760},
35659 },
35660 outputs: []outputInfo{
35661 {0, 23551},
35662 },
35663 },
35664 },
35665 {
35666 name: "CLGEBR",
35667 argLen: 1,
35668 clobberFlags: true,
35669 asm: s390x.ACLGEBR,
35670 reg: regInfo{
35671 inputs: []inputInfo{
35672 {0, 4294901760},
35673 },
35674 outputs: []outputInfo{
35675 {0, 23551},
35676 },
35677 },
35678 },
35679 {
35680 name: "CLGDBR",
35681 argLen: 1,
35682 clobberFlags: true,
35683 asm: s390x.ACLGDBR,
35684 reg: regInfo{
35685 inputs: []inputInfo{
35686 {0, 4294901760},
35687 },
35688 outputs: []outputInfo{
35689 {0, 23551},
35690 },
35691 },
35692 },
35693 {
35694 name: "CELFBR",
35695 argLen: 1,
35696 clobberFlags: true,
35697 asm: s390x.ACELFBR,
35698 reg: regInfo{
35699 inputs: []inputInfo{
35700 {0, 23551},
35701 },
35702 outputs: []outputInfo{
35703 {0, 4294901760},
35704 },
35705 },
35706 },
35707 {
35708 name: "CDLFBR",
35709 argLen: 1,
35710 clobberFlags: true,
35711 asm: s390x.ACDLFBR,
35712 reg: regInfo{
35713 inputs: []inputInfo{
35714 {0, 23551},
35715 },
35716 outputs: []outputInfo{
35717 {0, 4294901760},
35718 },
35719 },
35720 },
35721 {
35722 name: "CELGBR",
35723 argLen: 1,
35724 clobberFlags: true,
35725 asm: s390x.ACELGBR,
35726 reg: regInfo{
35727 inputs: []inputInfo{
35728 {0, 23551},
35729 },
35730 outputs: []outputInfo{
35731 {0, 4294901760},
35732 },
35733 },
35734 },
35735 {
35736 name: "CDLGBR",
35737 argLen: 1,
35738 clobberFlags: true,
35739 asm: s390x.ACDLGBR,
35740 reg: regInfo{
35741 inputs: []inputInfo{
35742 {0, 23551},
35743 },
35744 outputs: []outputInfo{
35745 {0, 4294901760},
35746 },
35747 },
35748 },
35749 {
35750 name: "LEDBR",
35751 argLen: 1,
35752 asm: s390x.ALEDBR,
35753 reg: regInfo{
35754 inputs: []inputInfo{
35755 {0, 4294901760},
35756 },
35757 outputs: []outputInfo{
35758 {0, 4294901760},
35759 },
35760 },
35761 },
35762 {
35763 name: "LDEBR",
35764 argLen: 1,
35765 asm: s390x.ALDEBR,
35766 reg: regInfo{
35767 inputs: []inputInfo{
35768 {0, 4294901760},
35769 },
35770 outputs: []outputInfo{
35771 {0, 4294901760},
35772 },
35773 },
35774 },
35775 {
35776 name: "MOVDaddr",
35777 auxType: auxSymOff,
35778 argLen: 1,
35779 rematerializeable: true,
35780 symEffect: SymAddr,
35781 reg: regInfo{
35782 inputs: []inputInfo{
35783 {0, 4295000064},
35784 },
35785 outputs: []outputInfo{
35786 {0, 23551},
35787 },
35788 },
35789 },
35790 {
35791 name: "MOVDaddridx",
35792 auxType: auxSymOff,
35793 argLen: 2,
35794 symEffect: SymAddr,
35795 reg: regInfo{
35796 inputs: []inputInfo{
35797 {0, 4295000064},
35798 {1, 56318},
35799 },
35800 outputs: []outputInfo{
35801 {0, 23551},
35802 },
35803 },
35804 },
35805 {
35806 name: "MOVBZload",
35807 auxType: auxSymOff,
35808 argLen: 2,
35809 faultOnNilArg0: true,
35810 symEffect: SymRead,
35811 asm: s390x.AMOVBZ,
35812 reg: regInfo{
35813 inputs: []inputInfo{
35814 {0, 4295023614},
35815 },
35816 outputs: []outputInfo{
35817 {0, 23551},
35818 },
35819 },
35820 },
35821 {
35822 name: "MOVBload",
35823 auxType: auxSymOff,
35824 argLen: 2,
35825 faultOnNilArg0: true,
35826 symEffect: SymRead,
35827 asm: s390x.AMOVB,
35828 reg: regInfo{
35829 inputs: []inputInfo{
35830 {0, 4295023614},
35831 },
35832 outputs: []outputInfo{
35833 {0, 23551},
35834 },
35835 },
35836 },
35837 {
35838 name: "MOVHZload",
35839 auxType: auxSymOff,
35840 argLen: 2,
35841 faultOnNilArg0: true,
35842 symEffect: SymRead,
35843 asm: s390x.AMOVHZ,
35844 reg: regInfo{
35845 inputs: []inputInfo{
35846 {0, 4295023614},
35847 },
35848 outputs: []outputInfo{
35849 {0, 23551},
35850 },
35851 },
35852 },
35853 {
35854 name: "MOVHload",
35855 auxType: auxSymOff,
35856 argLen: 2,
35857 faultOnNilArg0: true,
35858 symEffect: SymRead,
35859 asm: s390x.AMOVH,
35860 reg: regInfo{
35861 inputs: []inputInfo{
35862 {0, 4295023614},
35863 },
35864 outputs: []outputInfo{
35865 {0, 23551},
35866 },
35867 },
35868 },
35869 {
35870 name: "MOVWZload",
35871 auxType: auxSymOff,
35872 argLen: 2,
35873 faultOnNilArg0: true,
35874 symEffect: SymRead,
35875 asm: s390x.AMOVWZ,
35876 reg: regInfo{
35877 inputs: []inputInfo{
35878 {0, 4295023614},
35879 },
35880 outputs: []outputInfo{
35881 {0, 23551},
35882 },
35883 },
35884 },
35885 {
35886 name: "MOVWload",
35887 auxType: auxSymOff,
35888 argLen: 2,
35889 faultOnNilArg0: true,
35890 symEffect: SymRead,
35891 asm: s390x.AMOVW,
35892 reg: regInfo{
35893 inputs: []inputInfo{
35894 {0, 4295023614},
35895 },
35896 outputs: []outputInfo{
35897 {0, 23551},
35898 },
35899 },
35900 },
35901 {
35902 name: "MOVDload",
35903 auxType: auxSymOff,
35904 argLen: 2,
35905 faultOnNilArg0: true,
35906 symEffect: SymRead,
35907 asm: s390x.AMOVD,
35908 reg: regInfo{
35909 inputs: []inputInfo{
35910 {0, 4295023614},
35911 },
35912 outputs: []outputInfo{
35913 {0, 23551},
35914 },
35915 },
35916 },
35917 {
35918 name: "MOVWBR",
35919 argLen: 1,
35920 asm: s390x.AMOVWBR,
35921 reg: regInfo{
35922 inputs: []inputInfo{
35923 {0, 23551},
35924 },
35925 outputs: []outputInfo{
35926 {0, 23551},
35927 },
35928 },
35929 },
35930 {
35931 name: "MOVDBR",
35932 argLen: 1,
35933 asm: s390x.AMOVDBR,
35934 reg: regInfo{
35935 inputs: []inputInfo{
35936 {0, 23551},
35937 },
35938 outputs: []outputInfo{
35939 {0, 23551},
35940 },
35941 },
35942 },
35943 {
35944 name: "MOVHBRload",
35945 auxType: auxSymOff,
35946 argLen: 2,
35947 faultOnNilArg0: true,
35948 symEffect: SymRead,
35949 asm: s390x.AMOVHBR,
35950 reg: regInfo{
35951 inputs: []inputInfo{
35952 {0, 4295023614},
35953 },
35954 outputs: []outputInfo{
35955 {0, 23551},
35956 },
35957 },
35958 },
35959 {
35960 name: "MOVWBRload",
35961 auxType: auxSymOff,
35962 argLen: 2,
35963 faultOnNilArg0: true,
35964 symEffect: SymRead,
35965 asm: s390x.AMOVWBR,
35966 reg: regInfo{
35967 inputs: []inputInfo{
35968 {0, 4295023614},
35969 },
35970 outputs: []outputInfo{
35971 {0, 23551},
35972 },
35973 },
35974 },
35975 {
35976 name: "MOVDBRload",
35977 auxType: auxSymOff,
35978 argLen: 2,
35979 faultOnNilArg0: true,
35980 symEffect: SymRead,
35981 asm: s390x.AMOVDBR,
35982 reg: regInfo{
35983 inputs: []inputInfo{
35984 {0, 4295023614},
35985 },
35986 outputs: []outputInfo{
35987 {0, 23551},
35988 },
35989 },
35990 },
35991 {
35992 name: "MOVBstore",
35993 auxType: auxSymOff,
35994 argLen: 3,
35995 faultOnNilArg0: true,
35996 symEffect: SymWrite,
35997 asm: s390x.AMOVB,
35998 reg: regInfo{
35999 inputs: []inputInfo{
36000 {0, 4295023614},
36001 {1, 56319},
36002 },
36003 },
36004 },
36005 {
36006 name: "MOVHstore",
36007 auxType: auxSymOff,
36008 argLen: 3,
36009 faultOnNilArg0: true,
36010 symEffect: SymWrite,
36011 asm: s390x.AMOVH,
36012 reg: regInfo{
36013 inputs: []inputInfo{
36014 {0, 4295023614},
36015 {1, 56319},
36016 },
36017 },
36018 },
36019 {
36020 name: "MOVWstore",
36021 auxType: auxSymOff,
36022 argLen: 3,
36023 faultOnNilArg0: true,
36024 symEffect: SymWrite,
36025 asm: s390x.AMOVW,
36026 reg: regInfo{
36027 inputs: []inputInfo{
36028 {0, 4295023614},
36029 {1, 56319},
36030 },
36031 },
36032 },
36033 {
36034 name: "MOVDstore",
36035 auxType: auxSymOff,
36036 argLen: 3,
36037 faultOnNilArg0: true,
36038 symEffect: SymWrite,
36039 asm: s390x.AMOVD,
36040 reg: regInfo{
36041 inputs: []inputInfo{
36042 {0, 4295023614},
36043 {1, 56319},
36044 },
36045 },
36046 },
36047 {
36048 name: "MOVHBRstore",
36049 auxType: auxSymOff,
36050 argLen: 3,
36051 faultOnNilArg0: true,
36052 symEffect: SymWrite,
36053 asm: s390x.AMOVHBR,
36054 reg: regInfo{
36055 inputs: []inputInfo{
36056 {0, 56318},
36057 {1, 56319},
36058 },
36059 },
36060 },
36061 {
36062 name: "MOVWBRstore",
36063 auxType: auxSymOff,
36064 argLen: 3,
36065 faultOnNilArg0: true,
36066 symEffect: SymWrite,
36067 asm: s390x.AMOVWBR,
36068 reg: regInfo{
36069 inputs: []inputInfo{
36070 {0, 56318},
36071 {1, 56319},
36072 },
36073 },
36074 },
36075 {
36076 name: "MOVDBRstore",
36077 auxType: auxSymOff,
36078 argLen: 3,
36079 faultOnNilArg0: true,
36080 symEffect: SymWrite,
36081 asm: s390x.AMOVDBR,
36082 reg: regInfo{
36083 inputs: []inputInfo{
36084 {0, 56318},
36085 {1, 56319},
36086 },
36087 },
36088 },
36089 {
36090 name: "MVC",
36091 auxType: auxSymValAndOff,
36092 argLen: 3,
36093 clobberFlags: true,
36094 faultOnNilArg0: true,
36095 faultOnNilArg1: true,
36096 symEffect: SymNone,
36097 asm: s390x.AMVC,
36098 reg: regInfo{
36099 inputs: []inputInfo{
36100 {0, 56318},
36101 {1, 56318},
36102 },
36103 },
36104 },
36105 {
36106 name: "MOVBZloadidx",
36107 auxType: auxSymOff,
36108 argLen: 3,
36109 commutative: true,
36110 symEffect: SymRead,
36111 asm: s390x.AMOVBZ,
36112 reg: regInfo{
36113 inputs: []inputInfo{
36114 {1, 56318},
36115 {0, 4295023614},
36116 },
36117 outputs: []outputInfo{
36118 {0, 23551},
36119 },
36120 },
36121 },
36122 {
36123 name: "MOVBloadidx",
36124 auxType: auxSymOff,
36125 argLen: 3,
36126 commutative: true,
36127 symEffect: SymRead,
36128 asm: s390x.AMOVB,
36129 reg: regInfo{
36130 inputs: []inputInfo{
36131 {1, 56318},
36132 {0, 4295023614},
36133 },
36134 outputs: []outputInfo{
36135 {0, 23551},
36136 },
36137 },
36138 },
36139 {
36140 name: "MOVHZloadidx",
36141 auxType: auxSymOff,
36142 argLen: 3,
36143 commutative: true,
36144 symEffect: SymRead,
36145 asm: s390x.AMOVHZ,
36146 reg: regInfo{
36147 inputs: []inputInfo{
36148 {1, 56318},
36149 {0, 4295023614},
36150 },
36151 outputs: []outputInfo{
36152 {0, 23551},
36153 },
36154 },
36155 },
36156 {
36157 name: "MOVHloadidx",
36158 auxType: auxSymOff,
36159 argLen: 3,
36160 commutative: true,
36161 symEffect: SymRead,
36162 asm: s390x.AMOVH,
36163 reg: regInfo{
36164 inputs: []inputInfo{
36165 {1, 56318},
36166 {0, 4295023614},
36167 },
36168 outputs: []outputInfo{
36169 {0, 23551},
36170 },
36171 },
36172 },
36173 {
36174 name: "MOVWZloadidx",
36175 auxType: auxSymOff,
36176 argLen: 3,
36177 commutative: true,
36178 symEffect: SymRead,
36179 asm: s390x.AMOVWZ,
36180 reg: regInfo{
36181 inputs: []inputInfo{
36182 {1, 56318},
36183 {0, 4295023614},
36184 },
36185 outputs: []outputInfo{
36186 {0, 23551},
36187 },
36188 },
36189 },
36190 {
36191 name: "MOVWloadidx",
36192 auxType: auxSymOff,
36193 argLen: 3,
36194 commutative: true,
36195 symEffect: SymRead,
36196 asm: s390x.AMOVW,
36197 reg: regInfo{
36198 inputs: []inputInfo{
36199 {1, 56318},
36200 {0, 4295023614},
36201 },
36202 outputs: []outputInfo{
36203 {0, 23551},
36204 },
36205 },
36206 },
36207 {
36208 name: "MOVDloadidx",
36209 auxType: auxSymOff,
36210 argLen: 3,
36211 commutative: true,
36212 symEffect: SymRead,
36213 asm: s390x.AMOVD,
36214 reg: regInfo{
36215 inputs: []inputInfo{
36216 {1, 56318},
36217 {0, 4295023614},
36218 },
36219 outputs: []outputInfo{
36220 {0, 23551},
36221 },
36222 },
36223 },
36224 {
36225 name: "MOVHBRloadidx",
36226 auxType: auxSymOff,
36227 argLen: 3,
36228 commutative: true,
36229 symEffect: SymRead,
36230 asm: s390x.AMOVHBR,
36231 reg: regInfo{
36232 inputs: []inputInfo{
36233 {1, 56318},
36234 {0, 4295023614},
36235 },
36236 outputs: []outputInfo{
36237 {0, 23551},
36238 },
36239 },
36240 },
36241 {
36242 name: "MOVWBRloadidx",
36243 auxType: auxSymOff,
36244 argLen: 3,
36245 commutative: true,
36246 symEffect: SymRead,
36247 asm: s390x.AMOVWBR,
36248 reg: regInfo{
36249 inputs: []inputInfo{
36250 {1, 56318},
36251 {0, 4295023614},
36252 },
36253 outputs: []outputInfo{
36254 {0, 23551},
36255 },
36256 },
36257 },
36258 {
36259 name: "MOVDBRloadidx",
36260 auxType: auxSymOff,
36261 argLen: 3,
36262 commutative: true,
36263 symEffect: SymRead,
36264 asm: s390x.AMOVDBR,
36265 reg: regInfo{
36266 inputs: []inputInfo{
36267 {1, 56318},
36268 {0, 4295023614},
36269 },
36270 outputs: []outputInfo{
36271 {0, 23551},
36272 },
36273 },
36274 },
36275 {
36276 name: "MOVBstoreidx",
36277 auxType: auxSymOff,
36278 argLen: 4,
36279 commutative: true,
36280 symEffect: SymWrite,
36281 asm: s390x.AMOVB,
36282 reg: regInfo{
36283 inputs: []inputInfo{
36284 {0, 56318},
36285 {1, 56318},
36286 {2, 56319},
36287 },
36288 },
36289 },
36290 {
36291 name: "MOVHstoreidx",
36292 auxType: auxSymOff,
36293 argLen: 4,
36294 commutative: true,
36295 symEffect: SymWrite,
36296 asm: s390x.AMOVH,
36297 reg: regInfo{
36298 inputs: []inputInfo{
36299 {0, 56318},
36300 {1, 56318},
36301 {2, 56319},
36302 },
36303 },
36304 },
36305 {
36306 name: "MOVWstoreidx",
36307 auxType: auxSymOff,
36308 argLen: 4,
36309 commutative: true,
36310 symEffect: SymWrite,
36311 asm: s390x.AMOVW,
36312 reg: regInfo{
36313 inputs: []inputInfo{
36314 {0, 56318},
36315 {1, 56318},
36316 {2, 56319},
36317 },
36318 },
36319 },
36320 {
36321 name: "MOVDstoreidx",
36322 auxType: auxSymOff,
36323 argLen: 4,
36324 commutative: true,
36325 symEffect: SymWrite,
36326 asm: s390x.AMOVD,
36327 reg: regInfo{
36328 inputs: []inputInfo{
36329 {0, 56318},
36330 {1, 56318},
36331 {2, 56319},
36332 },
36333 },
36334 },
36335 {
36336 name: "MOVHBRstoreidx",
36337 auxType: auxSymOff,
36338 argLen: 4,
36339 commutative: true,
36340 symEffect: SymWrite,
36341 asm: s390x.AMOVHBR,
36342 reg: regInfo{
36343 inputs: []inputInfo{
36344 {0, 56318},
36345 {1, 56318},
36346 {2, 56319},
36347 },
36348 },
36349 },
36350 {
36351 name: "MOVWBRstoreidx",
36352 auxType: auxSymOff,
36353 argLen: 4,
36354 commutative: true,
36355 symEffect: SymWrite,
36356 asm: s390x.AMOVWBR,
36357 reg: regInfo{
36358 inputs: []inputInfo{
36359 {0, 56318},
36360 {1, 56318},
36361 {2, 56319},
36362 },
36363 },
36364 },
36365 {
36366 name: "MOVDBRstoreidx",
36367 auxType: auxSymOff,
36368 argLen: 4,
36369 commutative: true,
36370 symEffect: SymWrite,
36371 asm: s390x.AMOVDBR,
36372 reg: regInfo{
36373 inputs: []inputInfo{
36374 {0, 56318},
36375 {1, 56318},
36376 {2, 56319},
36377 },
36378 },
36379 },
36380 {
36381 name: "MOVBstoreconst",
36382 auxType: auxSymValAndOff,
36383 argLen: 2,
36384 faultOnNilArg0: true,
36385 symEffect: SymWrite,
36386 asm: s390x.AMOVB,
36387 reg: regInfo{
36388 inputs: []inputInfo{
36389 {0, 4295023614},
36390 },
36391 },
36392 },
36393 {
36394 name: "MOVHstoreconst",
36395 auxType: auxSymValAndOff,
36396 argLen: 2,
36397 faultOnNilArg0: true,
36398 symEffect: SymWrite,
36399 asm: s390x.AMOVH,
36400 reg: regInfo{
36401 inputs: []inputInfo{
36402 {0, 4295023614},
36403 },
36404 },
36405 },
36406 {
36407 name: "MOVWstoreconst",
36408 auxType: auxSymValAndOff,
36409 argLen: 2,
36410 faultOnNilArg0: true,
36411 symEffect: SymWrite,
36412 asm: s390x.AMOVW,
36413 reg: regInfo{
36414 inputs: []inputInfo{
36415 {0, 4295023614},
36416 },
36417 },
36418 },
36419 {
36420 name: "MOVDstoreconst",
36421 auxType: auxSymValAndOff,
36422 argLen: 2,
36423 faultOnNilArg0: true,
36424 symEffect: SymWrite,
36425 asm: s390x.AMOVD,
36426 reg: regInfo{
36427 inputs: []inputInfo{
36428 {0, 4295023614},
36429 },
36430 },
36431 },
36432 {
36433 name: "CLEAR",
36434 auxType: auxSymValAndOff,
36435 argLen: 2,
36436 clobberFlags: true,
36437 faultOnNilArg0: true,
36438 symEffect: SymWrite,
36439 asm: s390x.ACLEAR,
36440 reg: regInfo{
36441 inputs: []inputInfo{
36442 {0, 23550},
36443 },
36444 },
36445 },
36446 {
36447 name: "CALLstatic",
36448 auxType: auxCallOff,
36449 argLen: 1,
36450 clobberFlags: true,
36451 call: true,
36452 reg: regInfo{
36453 clobbers: 4294933503,
36454 },
36455 },
36456 {
36457 name: "CALLtail",
36458 auxType: auxCallOff,
36459 argLen: 1,
36460 clobberFlags: true,
36461 call: true,
36462 tailCall: true,
36463 reg: regInfo{
36464 clobbers: 4294933503,
36465 },
36466 },
36467 {
36468 name: "CALLclosure",
36469 auxType: auxCallOff,
36470 argLen: 3,
36471 clobberFlags: true,
36472 call: true,
36473 reg: regInfo{
36474 inputs: []inputInfo{
36475 {1, 4096},
36476 {0, 56318},
36477 },
36478 clobbers: 4294933503,
36479 },
36480 },
36481 {
36482 name: "CALLinter",
36483 auxType: auxCallOff,
36484 argLen: 2,
36485 clobberFlags: true,
36486 call: true,
36487 reg: regInfo{
36488 inputs: []inputInfo{
36489 {0, 23550},
36490 },
36491 clobbers: 4294933503,
36492 },
36493 },
36494 {
36495 name: "InvertFlags",
36496 argLen: 1,
36497 reg: regInfo{},
36498 },
36499 {
36500 name: "LoweredGetG",
36501 argLen: 1,
36502 reg: regInfo{
36503 outputs: []outputInfo{
36504 {0, 23551},
36505 },
36506 },
36507 },
36508 {
36509 name: "LoweredGetClosurePtr",
36510 argLen: 0,
36511 zeroWidth: true,
36512 reg: regInfo{
36513 outputs: []outputInfo{
36514 {0, 4096},
36515 },
36516 },
36517 },
36518 {
36519 name: "LoweredGetCallerSP",
36520 argLen: 1,
36521 rematerializeable: true,
36522 reg: regInfo{
36523 outputs: []outputInfo{
36524 {0, 23551},
36525 },
36526 },
36527 },
36528 {
36529 name: "LoweredGetCallerPC",
36530 argLen: 0,
36531 rematerializeable: true,
36532 reg: regInfo{
36533 outputs: []outputInfo{
36534 {0, 23551},
36535 },
36536 },
36537 },
36538 {
36539 name: "LoweredNilCheck",
36540 argLen: 2,
36541 clobberFlags: true,
36542 nilCheck: true,
36543 faultOnNilArg0: true,
36544 reg: regInfo{
36545 inputs: []inputInfo{
36546 {0, 56318},
36547 },
36548 },
36549 },
36550 {
36551 name: "LoweredRound32F",
36552 argLen: 1,
36553 resultInArg0: true,
36554 zeroWidth: true,
36555 reg: regInfo{
36556 inputs: []inputInfo{
36557 {0, 4294901760},
36558 },
36559 outputs: []outputInfo{
36560 {0, 4294901760},
36561 },
36562 },
36563 },
36564 {
36565 name: "LoweredRound64F",
36566 argLen: 1,
36567 resultInArg0: true,
36568 zeroWidth: true,
36569 reg: regInfo{
36570 inputs: []inputInfo{
36571 {0, 4294901760},
36572 },
36573 outputs: []outputInfo{
36574 {0, 4294901760},
36575 },
36576 },
36577 },
36578 {
36579 name: "LoweredWB",
36580 auxType: auxInt64,
36581 argLen: 1,
36582 clobberFlags: true,
36583 reg: regInfo{
36584 clobbers: 4294918146,
36585 outputs: []outputInfo{
36586 {0, 512},
36587 },
36588 },
36589 },
36590 {
36591 name: "LoweredPanicBoundsA",
36592 auxType: auxInt64,
36593 argLen: 3,
36594 call: true,
36595 reg: regInfo{
36596 inputs: []inputInfo{
36597 {0, 4},
36598 {1, 8},
36599 },
36600 },
36601 },
36602 {
36603 name: "LoweredPanicBoundsB",
36604 auxType: auxInt64,
36605 argLen: 3,
36606 call: true,
36607 reg: regInfo{
36608 inputs: []inputInfo{
36609 {0, 2},
36610 {1, 4},
36611 },
36612 },
36613 },
36614 {
36615 name: "LoweredPanicBoundsC",
36616 auxType: auxInt64,
36617 argLen: 3,
36618 call: true,
36619 reg: regInfo{
36620 inputs: []inputInfo{
36621 {0, 1},
36622 {1, 2},
36623 },
36624 },
36625 },
36626 {
36627 name: "FlagEQ",
36628 argLen: 0,
36629 reg: regInfo{},
36630 },
36631 {
36632 name: "FlagLT",
36633 argLen: 0,
36634 reg: regInfo{},
36635 },
36636 {
36637 name: "FlagGT",
36638 argLen: 0,
36639 reg: regInfo{},
36640 },
36641 {
36642 name: "FlagOV",
36643 argLen: 0,
36644 reg: regInfo{},
36645 },
36646 {
36647 name: "SYNC",
36648 argLen: 1,
36649 asm: s390x.ASYNC,
36650 reg: regInfo{},
36651 },
36652 {
36653 name: "MOVBZatomicload",
36654 auxType: auxSymOff,
36655 argLen: 2,
36656 faultOnNilArg0: true,
36657 symEffect: SymRead,
36658 asm: s390x.AMOVBZ,
36659 reg: regInfo{
36660 inputs: []inputInfo{
36661 {0, 4295023614},
36662 },
36663 outputs: []outputInfo{
36664 {0, 23551},
36665 },
36666 },
36667 },
36668 {
36669 name: "MOVWZatomicload",
36670 auxType: auxSymOff,
36671 argLen: 2,
36672 faultOnNilArg0: true,
36673 symEffect: SymRead,
36674 asm: s390x.AMOVWZ,
36675 reg: regInfo{
36676 inputs: []inputInfo{
36677 {0, 4295023614},
36678 },
36679 outputs: []outputInfo{
36680 {0, 23551},
36681 },
36682 },
36683 },
36684 {
36685 name: "MOVDatomicload",
36686 auxType: auxSymOff,
36687 argLen: 2,
36688 faultOnNilArg0: true,
36689 symEffect: SymRead,
36690 asm: s390x.AMOVD,
36691 reg: regInfo{
36692 inputs: []inputInfo{
36693 {0, 4295023614},
36694 },
36695 outputs: []outputInfo{
36696 {0, 23551},
36697 },
36698 },
36699 },
36700 {
36701 name: "MOVBatomicstore",
36702 auxType: auxSymOff,
36703 argLen: 3,
36704 clobberFlags: true,
36705 faultOnNilArg0: true,
36706 hasSideEffects: true,
36707 symEffect: SymWrite,
36708 asm: s390x.AMOVB,
36709 reg: regInfo{
36710 inputs: []inputInfo{
36711 {0, 4295023614},
36712 {1, 56319},
36713 },
36714 },
36715 },
36716 {
36717 name: "MOVWatomicstore",
36718 auxType: auxSymOff,
36719 argLen: 3,
36720 clobberFlags: true,
36721 faultOnNilArg0: true,
36722 hasSideEffects: true,
36723 symEffect: SymWrite,
36724 asm: s390x.AMOVW,
36725 reg: regInfo{
36726 inputs: []inputInfo{
36727 {0, 4295023614},
36728 {1, 56319},
36729 },
36730 },
36731 },
36732 {
36733 name: "MOVDatomicstore",
36734 auxType: auxSymOff,
36735 argLen: 3,
36736 clobberFlags: true,
36737 faultOnNilArg0: true,
36738 hasSideEffects: true,
36739 symEffect: SymWrite,
36740 asm: s390x.AMOVD,
36741 reg: regInfo{
36742 inputs: []inputInfo{
36743 {0, 4295023614},
36744 {1, 56319},
36745 },
36746 },
36747 },
36748 {
36749 name: "LAA",
36750 auxType: auxSymOff,
36751 argLen: 3,
36752 clobberFlags: true,
36753 faultOnNilArg0: true,
36754 hasSideEffects: true,
36755 symEffect: SymRdWr,
36756 asm: s390x.ALAA,
36757 reg: regInfo{
36758 inputs: []inputInfo{
36759 {0, 4295023614},
36760 {1, 56319},
36761 },
36762 outputs: []outputInfo{
36763 {0, 23551},
36764 },
36765 },
36766 },
36767 {
36768 name: "LAAG",
36769 auxType: auxSymOff,
36770 argLen: 3,
36771 clobberFlags: true,
36772 faultOnNilArg0: true,
36773 hasSideEffects: true,
36774 symEffect: SymRdWr,
36775 asm: s390x.ALAAG,
36776 reg: regInfo{
36777 inputs: []inputInfo{
36778 {0, 4295023614},
36779 {1, 56319},
36780 },
36781 outputs: []outputInfo{
36782 {0, 23551},
36783 },
36784 },
36785 },
36786 {
36787 name: "AddTupleFirst32",
36788 argLen: 2,
36789 reg: regInfo{},
36790 },
36791 {
36792 name: "AddTupleFirst64",
36793 argLen: 2,
36794 reg: regInfo{},
36795 },
36796 {
36797 name: "LAN",
36798 argLen: 3,
36799 clobberFlags: true,
36800 hasSideEffects: true,
36801 asm: s390x.ALAN,
36802 reg: regInfo{
36803 inputs: []inputInfo{
36804 {0, 4295023614},
36805 {1, 56319},
36806 },
36807 },
36808 },
36809 {
36810 name: "LANfloor",
36811 argLen: 3,
36812 clobberFlags: true,
36813 hasSideEffects: true,
36814 asm: s390x.ALAN,
36815 reg: regInfo{
36816 inputs: []inputInfo{
36817 {0, 2},
36818 {1, 56319},
36819 },
36820 clobbers: 2,
36821 },
36822 },
36823 {
36824 name: "LAO",
36825 argLen: 3,
36826 clobberFlags: true,
36827 hasSideEffects: true,
36828 asm: s390x.ALAO,
36829 reg: regInfo{
36830 inputs: []inputInfo{
36831 {0, 4295023614},
36832 {1, 56319},
36833 },
36834 },
36835 },
36836 {
36837 name: "LAOfloor",
36838 argLen: 3,
36839 clobberFlags: true,
36840 hasSideEffects: true,
36841 asm: s390x.ALAO,
36842 reg: regInfo{
36843 inputs: []inputInfo{
36844 {0, 2},
36845 {1, 56319},
36846 },
36847 clobbers: 2,
36848 },
36849 },
36850 {
36851 name: "LoweredAtomicCas32",
36852 auxType: auxSymOff,
36853 argLen: 4,
36854 clobberFlags: true,
36855 faultOnNilArg0: true,
36856 hasSideEffects: true,
36857 symEffect: SymRdWr,
36858 asm: s390x.ACS,
36859 reg: regInfo{
36860 inputs: []inputInfo{
36861 {1, 1},
36862 {0, 56318},
36863 {2, 56319},
36864 },
36865 clobbers: 1,
36866 outputs: []outputInfo{
36867 {1, 0},
36868 {0, 23551},
36869 },
36870 },
36871 },
36872 {
36873 name: "LoweredAtomicCas64",
36874 auxType: auxSymOff,
36875 argLen: 4,
36876 clobberFlags: true,
36877 faultOnNilArg0: true,
36878 hasSideEffects: true,
36879 symEffect: SymRdWr,
36880 asm: s390x.ACSG,
36881 reg: regInfo{
36882 inputs: []inputInfo{
36883 {1, 1},
36884 {0, 56318},
36885 {2, 56319},
36886 },
36887 clobbers: 1,
36888 outputs: []outputInfo{
36889 {1, 0},
36890 {0, 23551},
36891 },
36892 },
36893 },
36894 {
36895 name: "LoweredAtomicExchange32",
36896 auxType: auxSymOff,
36897 argLen: 3,
36898 clobberFlags: true,
36899 faultOnNilArg0: true,
36900 hasSideEffects: true,
36901 symEffect: SymRdWr,
36902 asm: s390x.ACS,
36903 reg: regInfo{
36904 inputs: []inputInfo{
36905 {0, 56318},
36906 {1, 56318},
36907 },
36908 outputs: []outputInfo{
36909 {1, 0},
36910 {0, 1},
36911 },
36912 },
36913 },
36914 {
36915 name: "LoweredAtomicExchange64",
36916 auxType: auxSymOff,
36917 argLen: 3,
36918 clobberFlags: true,
36919 faultOnNilArg0: true,
36920 hasSideEffects: true,
36921 symEffect: SymRdWr,
36922 asm: s390x.ACSG,
36923 reg: regInfo{
36924 inputs: []inputInfo{
36925 {0, 56318},
36926 {1, 56318},
36927 },
36928 outputs: []outputInfo{
36929 {1, 0},
36930 {0, 1},
36931 },
36932 },
36933 },
36934 {
36935 name: "FLOGR",
36936 argLen: 1,
36937 clobberFlags: true,
36938 asm: s390x.AFLOGR,
36939 reg: regInfo{
36940 inputs: []inputInfo{
36941 {0, 23551},
36942 },
36943 clobbers: 2,
36944 outputs: []outputInfo{
36945 {0, 1},
36946 },
36947 },
36948 },
36949 {
36950 name: "POPCNT",
36951 argLen: 1,
36952 clobberFlags: true,
36953 asm: s390x.APOPCNT,
36954 reg: regInfo{
36955 inputs: []inputInfo{
36956 {0, 23551},
36957 },
36958 outputs: []outputInfo{
36959 {0, 23551},
36960 },
36961 },
36962 },
36963 {
36964 name: "MLGR",
36965 argLen: 2,
36966 asm: s390x.AMLGR,
36967 reg: regInfo{
36968 inputs: []inputInfo{
36969 {1, 8},
36970 {0, 23551},
36971 },
36972 outputs: []outputInfo{
36973 {0, 4},
36974 {1, 8},
36975 },
36976 },
36977 },
36978 {
36979 name: "SumBytes2",
36980 argLen: 1,
36981 reg: regInfo{},
36982 },
36983 {
36984 name: "SumBytes4",
36985 argLen: 1,
36986 reg: regInfo{},
36987 },
36988 {
36989 name: "SumBytes8",
36990 argLen: 1,
36991 reg: regInfo{},
36992 },
36993 {
36994 name: "STMG2",
36995 auxType: auxSymOff,
36996 argLen: 4,
36997 clobberFlags: true,
36998 faultOnNilArg0: true,
36999 symEffect: SymWrite,
37000 asm: s390x.ASTMG,
37001 reg: regInfo{
37002 inputs: []inputInfo{
37003 {1, 2},
37004 {2, 4},
37005 {0, 56318},
37006 },
37007 },
37008 },
37009 {
37010 name: "STMG3",
37011 auxType: auxSymOff,
37012 argLen: 5,
37013 clobberFlags: true,
37014 faultOnNilArg0: true,
37015 symEffect: SymWrite,
37016 asm: s390x.ASTMG,
37017 reg: regInfo{
37018 inputs: []inputInfo{
37019 {1, 2},
37020 {2, 4},
37021 {3, 8},
37022 {0, 56318},
37023 },
37024 },
37025 },
37026 {
37027 name: "STMG4",
37028 auxType: auxSymOff,
37029 argLen: 6,
37030 clobberFlags: true,
37031 faultOnNilArg0: true,
37032 symEffect: SymWrite,
37033 asm: s390x.ASTMG,
37034 reg: regInfo{
37035 inputs: []inputInfo{
37036 {1, 2},
37037 {2, 4},
37038 {3, 8},
37039 {4, 16},
37040 {0, 56318},
37041 },
37042 },
37043 },
37044 {
37045 name: "STM2",
37046 auxType: auxSymOff,
37047 argLen: 4,
37048 clobberFlags: true,
37049 faultOnNilArg0: true,
37050 symEffect: SymWrite,
37051 asm: s390x.ASTMY,
37052 reg: regInfo{
37053 inputs: []inputInfo{
37054 {1, 2},
37055 {2, 4},
37056 {0, 56318},
37057 },
37058 },
37059 },
37060 {
37061 name: "STM3",
37062 auxType: auxSymOff,
37063 argLen: 5,
37064 clobberFlags: true,
37065 faultOnNilArg0: true,
37066 symEffect: SymWrite,
37067 asm: s390x.ASTMY,
37068 reg: regInfo{
37069 inputs: []inputInfo{
37070 {1, 2},
37071 {2, 4},
37072 {3, 8},
37073 {0, 56318},
37074 },
37075 },
37076 },
37077 {
37078 name: "STM4",
37079 auxType: auxSymOff,
37080 argLen: 6,
37081 clobberFlags: true,
37082 faultOnNilArg0: true,
37083 symEffect: SymWrite,
37084 asm: s390x.ASTMY,
37085 reg: regInfo{
37086 inputs: []inputInfo{
37087 {1, 2},
37088 {2, 4},
37089 {3, 8},
37090 {4, 16},
37091 {0, 56318},
37092 },
37093 },
37094 },
37095 {
37096 name: "LoweredMove",
37097 auxType: auxInt64,
37098 argLen: 4,
37099 clobberFlags: true,
37100 faultOnNilArg0: true,
37101 faultOnNilArg1: true,
37102 reg: regInfo{
37103 inputs: []inputInfo{
37104 {0, 2},
37105 {1, 4},
37106 {2, 56319},
37107 },
37108 clobbers: 6,
37109 },
37110 },
37111 {
37112 name: "LoweredZero",
37113 auxType: auxInt64,
37114 argLen: 3,
37115 clobberFlags: true,
37116 faultOnNilArg0: true,
37117 reg: regInfo{
37118 inputs: []inputInfo{
37119 {0, 2},
37120 {1, 56319},
37121 },
37122 clobbers: 2,
37123 },
37124 },
37125
37126 {
37127 name: "LoweredStaticCall",
37128 auxType: auxCallOff,
37129 argLen: 1,
37130 call: true,
37131 reg: regInfo{
37132 clobbers: 844424930131967,
37133 },
37134 },
37135 {
37136 name: "LoweredTailCall",
37137 auxType: auxCallOff,
37138 argLen: 1,
37139 call: true,
37140 tailCall: true,
37141 reg: regInfo{
37142 clobbers: 844424930131967,
37143 },
37144 },
37145 {
37146 name: "LoweredClosureCall",
37147 auxType: auxCallOff,
37148 argLen: 3,
37149 call: true,
37150 reg: regInfo{
37151 inputs: []inputInfo{
37152 {0, 65535},
37153 {1, 65535},
37154 },
37155 clobbers: 844424930131967,
37156 },
37157 },
37158 {
37159 name: "LoweredInterCall",
37160 auxType: auxCallOff,
37161 argLen: 2,
37162 call: true,
37163 reg: regInfo{
37164 inputs: []inputInfo{
37165 {0, 65535},
37166 },
37167 clobbers: 844424930131967,
37168 },
37169 },
37170 {
37171 name: "LoweredAddr",
37172 auxType: auxSymOff,
37173 argLen: 1,
37174 rematerializeable: true,
37175 symEffect: SymAddr,
37176 reg: regInfo{
37177 inputs: []inputInfo{
37178 {0, 281474976776191},
37179 },
37180 outputs: []outputInfo{
37181 {0, 65535},
37182 },
37183 },
37184 },
37185 {
37186 name: "LoweredMove",
37187 auxType: auxInt64,
37188 argLen: 3,
37189 reg: regInfo{
37190 inputs: []inputInfo{
37191 {0, 65535},
37192 {1, 65535},
37193 },
37194 },
37195 },
37196 {
37197 name: "LoweredZero",
37198 auxType: auxInt64,
37199 argLen: 2,
37200 reg: regInfo{
37201 inputs: []inputInfo{
37202 {0, 65535},
37203 },
37204 },
37205 },
37206 {
37207 name: "LoweredGetClosurePtr",
37208 argLen: 0,
37209 reg: regInfo{
37210 outputs: []outputInfo{
37211 {0, 65535},
37212 },
37213 },
37214 },
37215 {
37216 name: "LoweredGetCallerPC",
37217 argLen: 0,
37218 rematerializeable: true,
37219 reg: regInfo{
37220 outputs: []outputInfo{
37221 {0, 65535},
37222 },
37223 },
37224 },
37225 {
37226 name: "LoweredGetCallerSP",
37227 argLen: 1,
37228 rematerializeable: true,
37229 reg: regInfo{
37230 outputs: []outputInfo{
37231 {0, 65535},
37232 },
37233 },
37234 },
37235 {
37236 name: "LoweredNilCheck",
37237 argLen: 2,
37238 nilCheck: true,
37239 faultOnNilArg0: true,
37240 reg: regInfo{
37241 inputs: []inputInfo{
37242 {0, 65535},
37243 },
37244 },
37245 },
37246 {
37247 name: "LoweredWB",
37248 auxType: auxInt64,
37249 argLen: 1,
37250 reg: regInfo{
37251 clobbers: 844424930131967,
37252 outputs: []outputInfo{
37253 {0, 65535},
37254 },
37255 },
37256 },
37257 {
37258 name: "LoweredConvert",
37259 argLen: 2,
37260 reg: regInfo{
37261 inputs: []inputInfo{
37262 {0, 65535},
37263 },
37264 outputs: []outputInfo{
37265 {0, 65535},
37266 },
37267 },
37268 },
37269 {
37270 name: "Select",
37271 argLen: 3,
37272 asm: wasm.ASelect,
37273 reg: regInfo{
37274 inputs: []inputInfo{
37275 {0, 281474976776191},
37276 {1, 281474976776191},
37277 {2, 281474976776191},
37278 },
37279 outputs: []outputInfo{
37280 {0, 65535},
37281 },
37282 },
37283 },
37284 {
37285 name: "I64Load8U",
37286 auxType: auxInt64,
37287 argLen: 2,
37288 asm: wasm.AI64Load8U,
37289 reg: regInfo{
37290 inputs: []inputInfo{
37291 {0, 1407374883618815},
37292 },
37293 outputs: []outputInfo{
37294 {0, 65535},
37295 },
37296 },
37297 },
37298 {
37299 name: "I64Load8S",
37300 auxType: auxInt64,
37301 argLen: 2,
37302 asm: wasm.AI64Load8S,
37303 reg: regInfo{
37304 inputs: []inputInfo{
37305 {0, 1407374883618815},
37306 },
37307 outputs: []outputInfo{
37308 {0, 65535},
37309 },
37310 },
37311 },
37312 {
37313 name: "I64Load16U",
37314 auxType: auxInt64,
37315 argLen: 2,
37316 asm: wasm.AI64Load16U,
37317 reg: regInfo{
37318 inputs: []inputInfo{
37319 {0, 1407374883618815},
37320 },
37321 outputs: []outputInfo{
37322 {0, 65535},
37323 },
37324 },
37325 },
37326 {
37327 name: "I64Load16S",
37328 auxType: auxInt64,
37329 argLen: 2,
37330 asm: wasm.AI64Load16S,
37331 reg: regInfo{
37332 inputs: []inputInfo{
37333 {0, 1407374883618815},
37334 },
37335 outputs: []outputInfo{
37336 {0, 65535},
37337 },
37338 },
37339 },
37340 {
37341 name: "I64Load32U",
37342 auxType: auxInt64,
37343 argLen: 2,
37344 asm: wasm.AI64Load32U,
37345 reg: regInfo{
37346 inputs: []inputInfo{
37347 {0, 1407374883618815},
37348 },
37349 outputs: []outputInfo{
37350 {0, 65535},
37351 },
37352 },
37353 },
37354 {
37355 name: "I64Load32S",
37356 auxType: auxInt64,
37357 argLen: 2,
37358 asm: wasm.AI64Load32S,
37359 reg: regInfo{
37360 inputs: []inputInfo{
37361 {0, 1407374883618815},
37362 },
37363 outputs: []outputInfo{
37364 {0, 65535},
37365 },
37366 },
37367 },
37368 {
37369 name: "I64Load",
37370 auxType: auxInt64,
37371 argLen: 2,
37372 asm: wasm.AI64Load,
37373 reg: regInfo{
37374 inputs: []inputInfo{
37375 {0, 1407374883618815},
37376 },
37377 outputs: []outputInfo{
37378 {0, 65535},
37379 },
37380 },
37381 },
37382 {
37383 name: "I64Store8",
37384 auxType: auxInt64,
37385 argLen: 3,
37386 asm: wasm.AI64Store8,
37387 reg: regInfo{
37388 inputs: []inputInfo{
37389 {1, 281474976776191},
37390 {0, 1407374883618815},
37391 },
37392 },
37393 },
37394 {
37395 name: "I64Store16",
37396 auxType: auxInt64,
37397 argLen: 3,
37398 asm: wasm.AI64Store16,
37399 reg: regInfo{
37400 inputs: []inputInfo{
37401 {1, 281474976776191},
37402 {0, 1407374883618815},
37403 },
37404 },
37405 },
37406 {
37407 name: "I64Store32",
37408 auxType: auxInt64,
37409 argLen: 3,
37410 asm: wasm.AI64Store32,
37411 reg: regInfo{
37412 inputs: []inputInfo{
37413 {1, 281474976776191},
37414 {0, 1407374883618815},
37415 },
37416 },
37417 },
37418 {
37419 name: "I64Store",
37420 auxType: auxInt64,
37421 argLen: 3,
37422 asm: wasm.AI64Store,
37423 reg: regInfo{
37424 inputs: []inputInfo{
37425 {1, 281474976776191},
37426 {0, 1407374883618815},
37427 },
37428 },
37429 },
37430 {
37431 name: "F32Load",
37432 auxType: auxInt64,
37433 argLen: 2,
37434 asm: wasm.AF32Load,
37435 reg: regInfo{
37436 inputs: []inputInfo{
37437 {0, 1407374883618815},
37438 },
37439 outputs: []outputInfo{
37440 {0, 4294901760},
37441 },
37442 },
37443 },
37444 {
37445 name: "F64Load",
37446 auxType: auxInt64,
37447 argLen: 2,
37448 asm: wasm.AF64Load,
37449 reg: regInfo{
37450 inputs: []inputInfo{
37451 {0, 1407374883618815},
37452 },
37453 outputs: []outputInfo{
37454 {0, 281470681743360},
37455 },
37456 },
37457 },
37458 {
37459 name: "F32Store",
37460 auxType: auxInt64,
37461 argLen: 3,
37462 asm: wasm.AF32Store,
37463 reg: regInfo{
37464 inputs: []inputInfo{
37465 {1, 4294901760},
37466 {0, 1407374883618815},
37467 },
37468 },
37469 },
37470 {
37471 name: "F64Store",
37472 auxType: auxInt64,
37473 argLen: 3,
37474 asm: wasm.AF64Store,
37475 reg: regInfo{
37476 inputs: []inputInfo{
37477 {1, 281470681743360},
37478 {0, 1407374883618815},
37479 },
37480 },
37481 },
37482 {
37483 name: "I64Const",
37484 auxType: auxInt64,
37485 argLen: 0,
37486 rematerializeable: true,
37487 reg: regInfo{
37488 outputs: []outputInfo{
37489 {0, 65535},
37490 },
37491 },
37492 },
37493 {
37494 name: "F32Const",
37495 auxType: auxFloat32,
37496 argLen: 0,
37497 rematerializeable: true,
37498 reg: regInfo{
37499 outputs: []outputInfo{
37500 {0, 4294901760},
37501 },
37502 },
37503 },
37504 {
37505 name: "F64Const",
37506 auxType: auxFloat64,
37507 argLen: 0,
37508 rematerializeable: true,
37509 reg: regInfo{
37510 outputs: []outputInfo{
37511 {0, 281470681743360},
37512 },
37513 },
37514 },
37515 {
37516 name: "I64Eqz",
37517 argLen: 1,
37518 asm: wasm.AI64Eqz,
37519 reg: regInfo{
37520 inputs: []inputInfo{
37521 {0, 281474976776191},
37522 },
37523 outputs: []outputInfo{
37524 {0, 65535},
37525 },
37526 },
37527 },
37528 {
37529 name: "I64Eq",
37530 argLen: 2,
37531 asm: wasm.AI64Eq,
37532 reg: regInfo{
37533 inputs: []inputInfo{
37534 {0, 281474976776191},
37535 {1, 281474976776191},
37536 },
37537 outputs: []outputInfo{
37538 {0, 65535},
37539 },
37540 },
37541 },
37542 {
37543 name: "I64Ne",
37544 argLen: 2,
37545 asm: wasm.AI64Ne,
37546 reg: regInfo{
37547 inputs: []inputInfo{
37548 {0, 281474976776191},
37549 {1, 281474976776191},
37550 },
37551 outputs: []outputInfo{
37552 {0, 65535},
37553 },
37554 },
37555 },
37556 {
37557 name: "I64LtS",
37558 argLen: 2,
37559 asm: wasm.AI64LtS,
37560 reg: regInfo{
37561 inputs: []inputInfo{
37562 {0, 281474976776191},
37563 {1, 281474976776191},
37564 },
37565 outputs: []outputInfo{
37566 {0, 65535},
37567 },
37568 },
37569 },
37570 {
37571 name: "I64LtU",
37572 argLen: 2,
37573 asm: wasm.AI64LtU,
37574 reg: regInfo{
37575 inputs: []inputInfo{
37576 {0, 281474976776191},
37577 {1, 281474976776191},
37578 },
37579 outputs: []outputInfo{
37580 {0, 65535},
37581 },
37582 },
37583 },
37584 {
37585 name: "I64GtS",
37586 argLen: 2,
37587 asm: wasm.AI64GtS,
37588 reg: regInfo{
37589 inputs: []inputInfo{
37590 {0, 281474976776191},
37591 {1, 281474976776191},
37592 },
37593 outputs: []outputInfo{
37594 {0, 65535},
37595 },
37596 },
37597 },
37598 {
37599 name: "I64GtU",
37600 argLen: 2,
37601 asm: wasm.AI64GtU,
37602 reg: regInfo{
37603 inputs: []inputInfo{
37604 {0, 281474976776191},
37605 {1, 281474976776191},
37606 },
37607 outputs: []outputInfo{
37608 {0, 65535},
37609 },
37610 },
37611 },
37612 {
37613 name: "I64LeS",
37614 argLen: 2,
37615 asm: wasm.AI64LeS,
37616 reg: regInfo{
37617 inputs: []inputInfo{
37618 {0, 281474976776191},
37619 {1, 281474976776191},
37620 },
37621 outputs: []outputInfo{
37622 {0, 65535},
37623 },
37624 },
37625 },
37626 {
37627 name: "I64LeU",
37628 argLen: 2,
37629 asm: wasm.AI64LeU,
37630 reg: regInfo{
37631 inputs: []inputInfo{
37632 {0, 281474976776191},
37633 {1, 281474976776191},
37634 },
37635 outputs: []outputInfo{
37636 {0, 65535},
37637 },
37638 },
37639 },
37640 {
37641 name: "I64GeS",
37642 argLen: 2,
37643 asm: wasm.AI64GeS,
37644 reg: regInfo{
37645 inputs: []inputInfo{
37646 {0, 281474976776191},
37647 {1, 281474976776191},
37648 },
37649 outputs: []outputInfo{
37650 {0, 65535},
37651 },
37652 },
37653 },
37654 {
37655 name: "I64GeU",
37656 argLen: 2,
37657 asm: wasm.AI64GeU,
37658 reg: regInfo{
37659 inputs: []inputInfo{
37660 {0, 281474976776191},
37661 {1, 281474976776191},
37662 },
37663 outputs: []outputInfo{
37664 {0, 65535},
37665 },
37666 },
37667 },
37668 {
37669 name: "F32Eq",
37670 argLen: 2,
37671 asm: wasm.AF32Eq,
37672 reg: regInfo{
37673 inputs: []inputInfo{
37674 {0, 4294901760},
37675 {1, 4294901760},
37676 },
37677 outputs: []outputInfo{
37678 {0, 65535},
37679 },
37680 },
37681 },
37682 {
37683 name: "F32Ne",
37684 argLen: 2,
37685 asm: wasm.AF32Ne,
37686 reg: regInfo{
37687 inputs: []inputInfo{
37688 {0, 4294901760},
37689 {1, 4294901760},
37690 },
37691 outputs: []outputInfo{
37692 {0, 65535},
37693 },
37694 },
37695 },
37696 {
37697 name: "F32Lt",
37698 argLen: 2,
37699 asm: wasm.AF32Lt,
37700 reg: regInfo{
37701 inputs: []inputInfo{
37702 {0, 4294901760},
37703 {1, 4294901760},
37704 },
37705 outputs: []outputInfo{
37706 {0, 65535},
37707 },
37708 },
37709 },
37710 {
37711 name: "F32Gt",
37712 argLen: 2,
37713 asm: wasm.AF32Gt,
37714 reg: regInfo{
37715 inputs: []inputInfo{
37716 {0, 4294901760},
37717 {1, 4294901760},
37718 },
37719 outputs: []outputInfo{
37720 {0, 65535},
37721 },
37722 },
37723 },
37724 {
37725 name: "F32Le",
37726 argLen: 2,
37727 asm: wasm.AF32Le,
37728 reg: regInfo{
37729 inputs: []inputInfo{
37730 {0, 4294901760},
37731 {1, 4294901760},
37732 },
37733 outputs: []outputInfo{
37734 {0, 65535},
37735 },
37736 },
37737 },
37738 {
37739 name: "F32Ge",
37740 argLen: 2,
37741 asm: wasm.AF32Ge,
37742 reg: regInfo{
37743 inputs: []inputInfo{
37744 {0, 4294901760},
37745 {1, 4294901760},
37746 },
37747 outputs: []outputInfo{
37748 {0, 65535},
37749 },
37750 },
37751 },
37752 {
37753 name: "F64Eq",
37754 argLen: 2,
37755 asm: wasm.AF64Eq,
37756 reg: regInfo{
37757 inputs: []inputInfo{
37758 {0, 281470681743360},
37759 {1, 281470681743360},
37760 },
37761 outputs: []outputInfo{
37762 {0, 65535},
37763 },
37764 },
37765 },
37766 {
37767 name: "F64Ne",
37768 argLen: 2,
37769 asm: wasm.AF64Ne,
37770 reg: regInfo{
37771 inputs: []inputInfo{
37772 {0, 281470681743360},
37773 {1, 281470681743360},
37774 },
37775 outputs: []outputInfo{
37776 {0, 65535},
37777 },
37778 },
37779 },
37780 {
37781 name: "F64Lt",
37782 argLen: 2,
37783 asm: wasm.AF64Lt,
37784 reg: regInfo{
37785 inputs: []inputInfo{
37786 {0, 281470681743360},
37787 {1, 281470681743360},
37788 },
37789 outputs: []outputInfo{
37790 {0, 65535},
37791 },
37792 },
37793 },
37794 {
37795 name: "F64Gt",
37796 argLen: 2,
37797 asm: wasm.AF64Gt,
37798 reg: regInfo{
37799 inputs: []inputInfo{
37800 {0, 281470681743360},
37801 {1, 281470681743360},
37802 },
37803 outputs: []outputInfo{
37804 {0, 65535},
37805 },
37806 },
37807 },
37808 {
37809 name: "F64Le",
37810 argLen: 2,
37811 asm: wasm.AF64Le,
37812 reg: regInfo{
37813 inputs: []inputInfo{
37814 {0, 281470681743360},
37815 {1, 281470681743360},
37816 },
37817 outputs: []outputInfo{
37818 {0, 65535},
37819 },
37820 },
37821 },
37822 {
37823 name: "F64Ge",
37824 argLen: 2,
37825 asm: wasm.AF64Ge,
37826 reg: regInfo{
37827 inputs: []inputInfo{
37828 {0, 281470681743360},
37829 {1, 281470681743360},
37830 },
37831 outputs: []outputInfo{
37832 {0, 65535},
37833 },
37834 },
37835 },
37836 {
37837 name: "I64Add",
37838 argLen: 2,
37839 asm: wasm.AI64Add,
37840 reg: regInfo{
37841 inputs: []inputInfo{
37842 {0, 281474976776191},
37843 {1, 281474976776191},
37844 },
37845 outputs: []outputInfo{
37846 {0, 65535},
37847 },
37848 },
37849 },
37850 {
37851 name: "I64AddConst",
37852 auxType: auxInt64,
37853 argLen: 1,
37854 asm: wasm.AI64Add,
37855 reg: regInfo{
37856 inputs: []inputInfo{
37857 {0, 281474976776191},
37858 },
37859 outputs: []outputInfo{
37860 {0, 65535},
37861 },
37862 },
37863 },
37864 {
37865 name: "I64Sub",
37866 argLen: 2,
37867 asm: wasm.AI64Sub,
37868 reg: regInfo{
37869 inputs: []inputInfo{
37870 {0, 281474976776191},
37871 {1, 281474976776191},
37872 },
37873 outputs: []outputInfo{
37874 {0, 65535},
37875 },
37876 },
37877 },
37878 {
37879 name: "I64Mul",
37880 argLen: 2,
37881 asm: wasm.AI64Mul,
37882 reg: regInfo{
37883 inputs: []inputInfo{
37884 {0, 281474976776191},
37885 {1, 281474976776191},
37886 },
37887 outputs: []outputInfo{
37888 {0, 65535},
37889 },
37890 },
37891 },
37892 {
37893 name: "I64DivS",
37894 argLen: 2,
37895 asm: wasm.AI64DivS,
37896 reg: regInfo{
37897 inputs: []inputInfo{
37898 {0, 281474976776191},
37899 {1, 281474976776191},
37900 },
37901 outputs: []outputInfo{
37902 {0, 65535},
37903 },
37904 },
37905 },
37906 {
37907 name: "I64DivU",
37908 argLen: 2,
37909 asm: wasm.AI64DivU,
37910 reg: regInfo{
37911 inputs: []inputInfo{
37912 {0, 281474976776191},
37913 {1, 281474976776191},
37914 },
37915 outputs: []outputInfo{
37916 {0, 65535},
37917 },
37918 },
37919 },
37920 {
37921 name: "I64RemS",
37922 argLen: 2,
37923 asm: wasm.AI64RemS,
37924 reg: regInfo{
37925 inputs: []inputInfo{
37926 {0, 281474976776191},
37927 {1, 281474976776191},
37928 },
37929 outputs: []outputInfo{
37930 {0, 65535},
37931 },
37932 },
37933 },
37934 {
37935 name: "I64RemU",
37936 argLen: 2,
37937 asm: wasm.AI64RemU,
37938 reg: regInfo{
37939 inputs: []inputInfo{
37940 {0, 281474976776191},
37941 {1, 281474976776191},
37942 },
37943 outputs: []outputInfo{
37944 {0, 65535},
37945 },
37946 },
37947 },
37948 {
37949 name: "I64And",
37950 argLen: 2,
37951 asm: wasm.AI64And,
37952 reg: regInfo{
37953 inputs: []inputInfo{
37954 {0, 281474976776191},
37955 {1, 281474976776191},
37956 },
37957 outputs: []outputInfo{
37958 {0, 65535},
37959 },
37960 },
37961 },
37962 {
37963 name: "I64Or",
37964 argLen: 2,
37965 asm: wasm.AI64Or,
37966 reg: regInfo{
37967 inputs: []inputInfo{
37968 {0, 281474976776191},
37969 {1, 281474976776191},
37970 },
37971 outputs: []outputInfo{
37972 {0, 65535},
37973 },
37974 },
37975 },
37976 {
37977 name: "I64Xor",
37978 argLen: 2,
37979 asm: wasm.AI64Xor,
37980 reg: regInfo{
37981 inputs: []inputInfo{
37982 {0, 281474976776191},
37983 {1, 281474976776191},
37984 },
37985 outputs: []outputInfo{
37986 {0, 65535},
37987 },
37988 },
37989 },
37990 {
37991 name: "I64Shl",
37992 argLen: 2,
37993 asm: wasm.AI64Shl,
37994 reg: regInfo{
37995 inputs: []inputInfo{
37996 {0, 281474976776191},
37997 {1, 281474976776191},
37998 },
37999 outputs: []outputInfo{
38000 {0, 65535},
38001 },
38002 },
38003 },
38004 {
38005 name: "I64ShrS",
38006 argLen: 2,
38007 asm: wasm.AI64ShrS,
38008 reg: regInfo{
38009 inputs: []inputInfo{
38010 {0, 281474976776191},
38011 {1, 281474976776191},
38012 },
38013 outputs: []outputInfo{
38014 {0, 65535},
38015 },
38016 },
38017 },
38018 {
38019 name: "I64ShrU",
38020 argLen: 2,
38021 asm: wasm.AI64ShrU,
38022 reg: regInfo{
38023 inputs: []inputInfo{
38024 {0, 281474976776191},
38025 {1, 281474976776191},
38026 },
38027 outputs: []outputInfo{
38028 {0, 65535},
38029 },
38030 },
38031 },
38032 {
38033 name: "F32Neg",
38034 argLen: 1,
38035 asm: wasm.AF32Neg,
38036 reg: regInfo{
38037 inputs: []inputInfo{
38038 {0, 4294901760},
38039 },
38040 outputs: []outputInfo{
38041 {0, 4294901760},
38042 },
38043 },
38044 },
38045 {
38046 name: "F32Add",
38047 argLen: 2,
38048 asm: wasm.AF32Add,
38049 reg: regInfo{
38050 inputs: []inputInfo{
38051 {0, 4294901760},
38052 {1, 4294901760},
38053 },
38054 outputs: []outputInfo{
38055 {0, 4294901760},
38056 },
38057 },
38058 },
38059 {
38060 name: "F32Sub",
38061 argLen: 2,
38062 asm: wasm.AF32Sub,
38063 reg: regInfo{
38064 inputs: []inputInfo{
38065 {0, 4294901760},
38066 {1, 4294901760},
38067 },
38068 outputs: []outputInfo{
38069 {0, 4294901760},
38070 },
38071 },
38072 },
38073 {
38074 name: "F32Mul",
38075 argLen: 2,
38076 asm: wasm.AF32Mul,
38077 reg: regInfo{
38078 inputs: []inputInfo{
38079 {0, 4294901760},
38080 {1, 4294901760},
38081 },
38082 outputs: []outputInfo{
38083 {0, 4294901760},
38084 },
38085 },
38086 },
38087 {
38088 name: "F32Div",
38089 argLen: 2,
38090 asm: wasm.AF32Div,
38091 reg: regInfo{
38092 inputs: []inputInfo{
38093 {0, 4294901760},
38094 {1, 4294901760},
38095 },
38096 outputs: []outputInfo{
38097 {0, 4294901760},
38098 },
38099 },
38100 },
38101 {
38102 name: "F64Neg",
38103 argLen: 1,
38104 asm: wasm.AF64Neg,
38105 reg: regInfo{
38106 inputs: []inputInfo{
38107 {0, 281470681743360},
38108 },
38109 outputs: []outputInfo{
38110 {0, 281470681743360},
38111 },
38112 },
38113 },
38114 {
38115 name: "F64Add",
38116 argLen: 2,
38117 asm: wasm.AF64Add,
38118 reg: regInfo{
38119 inputs: []inputInfo{
38120 {0, 281470681743360},
38121 {1, 281470681743360},
38122 },
38123 outputs: []outputInfo{
38124 {0, 281470681743360},
38125 },
38126 },
38127 },
38128 {
38129 name: "F64Sub",
38130 argLen: 2,
38131 asm: wasm.AF64Sub,
38132 reg: regInfo{
38133 inputs: []inputInfo{
38134 {0, 281470681743360},
38135 {1, 281470681743360},
38136 },
38137 outputs: []outputInfo{
38138 {0, 281470681743360},
38139 },
38140 },
38141 },
38142 {
38143 name: "F64Mul",
38144 argLen: 2,
38145 asm: wasm.AF64Mul,
38146 reg: regInfo{
38147 inputs: []inputInfo{
38148 {0, 281470681743360},
38149 {1, 281470681743360},
38150 },
38151 outputs: []outputInfo{
38152 {0, 281470681743360},
38153 },
38154 },
38155 },
38156 {
38157 name: "F64Div",
38158 argLen: 2,
38159 asm: wasm.AF64Div,
38160 reg: regInfo{
38161 inputs: []inputInfo{
38162 {0, 281470681743360},
38163 {1, 281470681743360},
38164 },
38165 outputs: []outputInfo{
38166 {0, 281470681743360},
38167 },
38168 },
38169 },
38170 {
38171 name: "I64TruncSatF64S",
38172 argLen: 1,
38173 asm: wasm.AI64TruncSatF64S,
38174 reg: regInfo{
38175 inputs: []inputInfo{
38176 {0, 281470681743360},
38177 },
38178 outputs: []outputInfo{
38179 {0, 65535},
38180 },
38181 },
38182 },
38183 {
38184 name: "I64TruncSatF64U",
38185 argLen: 1,
38186 asm: wasm.AI64TruncSatF64U,
38187 reg: regInfo{
38188 inputs: []inputInfo{
38189 {0, 281470681743360},
38190 },
38191 outputs: []outputInfo{
38192 {0, 65535},
38193 },
38194 },
38195 },
38196 {
38197 name: "I64TruncSatF32S",
38198 argLen: 1,
38199 asm: wasm.AI64TruncSatF32S,
38200 reg: regInfo{
38201 inputs: []inputInfo{
38202 {0, 4294901760},
38203 },
38204 outputs: []outputInfo{
38205 {0, 65535},
38206 },
38207 },
38208 },
38209 {
38210 name: "I64TruncSatF32U",
38211 argLen: 1,
38212 asm: wasm.AI64TruncSatF32U,
38213 reg: regInfo{
38214 inputs: []inputInfo{
38215 {0, 4294901760},
38216 },
38217 outputs: []outputInfo{
38218 {0, 65535},
38219 },
38220 },
38221 },
38222 {
38223 name: "F32ConvertI64S",
38224 argLen: 1,
38225 asm: wasm.AF32ConvertI64S,
38226 reg: regInfo{
38227 inputs: []inputInfo{
38228 {0, 65535},
38229 },
38230 outputs: []outputInfo{
38231 {0, 4294901760},
38232 },
38233 },
38234 },
38235 {
38236 name: "F32ConvertI64U",
38237 argLen: 1,
38238 asm: wasm.AF32ConvertI64U,
38239 reg: regInfo{
38240 inputs: []inputInfo{
38241 {0, 65535},
38242 },
38243 outputs: []outputInfo{
38244 {0, 4294901760},
38245 },
38246 },
38247 },
38248 {
38249 name: "F64ConvertI64S",
38250 argLen: 1,
38251 asm: wasm.AF64ConvertI64S,
38252 reg: regInfo{
38253 inputs: []inputInfo{
38254 {0, 65535},
38255 },
38256 outputs: []outputInfo{
38257 {0, 281470681743360},
38258 },
38259 },
38260 },
38261 {
38262 name: "F64ConvertI64U",
38263 argLen: 1,
38264 asm: wasm.AF64ConvertI64U,
38265 reg: regInfo{
38266 inputs: []inputInfo{
38267 {0, 65535},
38268 },
38269 outputs: []outputInfo{
38270 {0, 281470681743360},
38271 },
38272 },
38273 },
38274 {
38275 name: "F32DemoteF64",
38276 argLen: 1,
38277 asm: wasm.AF32DemoteF64,
38278 reg: regInfo{
38279 inputs: []inputInfo{
38280 {0, 281470681743360},
38281 },
38282 outputs: []outputInfo{
38283 {0, 4294901760},
38284 },
38285 },
38286 },
38287 {
38288 name: "F64PromoteF32",
38289 argLen: 1,
38290 asm: wasm.AF64PromoteF32,
38291 reg: regInfo{
38292 inputs: []inputInfo{
38293 {0, 4294901760},
38294 },
38295 outputs: []outputInfo{
38296 {0, 281470681743360},
38297 },
38298 },
38299 },
38300 {
38301 name: "I64Extend8S",
38302 argLen: 1,
38303 asm: wasm.AI64Extend8S,
38304 reg: regInfo{
38305 inputs: []inputInfo{
38306 {0, 281474976776191},
38307 },
38308 outputs: []outputInfo{
38309 {0, 65535},
38310 },
38311 },
38312 },
38313 {
38314 name: "I64Extend16S",
38315 argLen: 1,
38316 asm: wasm.AI64Extend16S,
38317 reg: regInfo{
38318 inputs: []inputInfo{
38319 {0, 281474976776191},
38320 },
38321 outputs: []outputInfo{
38322 {0, 65535},
38323 },
38324 },
38325 },
38326 {
38327 name: "I64Extend32S",
38328 argLen: 1,
38329 asm: wasm.AI64Extend32S,
38330 reg: regInfo{
38331 inputs: []inputInfo{
38332 {0, 281474976776191},
38333 },
38334 outputs: []outputInfo{
38335 {0, 65535},
38336 },
38337 },
38338 },
38339 {
38340 name: "F32Sqrt",
38341 argLen: 1,
38342 asm: wasm.AF32Sqrt,
38343 reg: regInfo{
38344 inputs: []inputInfo{
38345 {0, 4294901760},
38346 },
38347 outputs: []outputInfo{
38348 {0, 4294901760},
38349 },
38350 },
38351 },
38352 {
38353 name: "F32Trunc",
38354 argLen: 1,
38355 asm: wasm.AF32Trunc,
38356 reg: regInfo{
38357 inputs: []inputInfo{
38358 {0, 4294901760},
38359 },
38360 outputs: []outputInfo{
38361 {0, 4294901760},
38362 },
38363 },
38364 },
38365 {
38366 name: "F32Ceil",
38367 argLen: 1,
38368 asm: wasm.AF32Ceil,
38369 reg: regInfo{
38370 inputs: []inputInfo{
38371 {0, 4294901760},
38372 },
38373 outputs: []outputInfo{
38374 {0, 4294901760},
38375 },
38376 },
38377 },
38378 {
38379 name: "F32Floor",
38380 argLen: 1,
38381 asm: wasm.AF32Floor,
38382 reg: regInfo{
38383 inputs: []inputInfo{
38384 {0, 4294901760},
38385 },
38386 outputs: []outputInfo{
38387 {0, 4294901760},
38388 },
38389 },
38390 },
38391 {
38392 name: "F32Nearest",
38393 argLen: 1,
38394 asm: wasm.AF32Nearest,
38395 reg: regInfo{
38396 inputs: []inputInfo{
38397 {0, 4294901760},
38398 },
38399 outputs: []outputInfo{
38400 {0, 4294901760},
38401 },
38402 },
38403 },
38404 {
38405 name: "F32Abs",
38406 argLen: 1,
38407 asm: wasm.AF32Abs,
38408 reg: regInfo{
38409 inputs: []inputInfo{
38410 {0, 4294901760},
38411 },
38412 outputs: []outputInfo{
38413 {0, 4294901760},
38414 },
38415 },
38416 },
38417 {
38418 name: "F32Copysign",
38419 argLen: 2,
38420 asm: wasm.AF32Copysign,
38421 reg: regInfo{
38422 inputs: []inputInfo{
38423 {0, 4294901760},
38424 {1, 4294901760},
38425 },
38426 outputs: []outputInfo{
38427 {0, 4294901760},
38428 },
38429 },
38430 },
38431 {
38432 name: "F64Sqrt",
38433 argLen: 1,
38434 asm: wasm.AF64Sqrt,
38435 reg: regInfo{
38436 inputs: []inputInfo{
38437 {0, 281470681743360},
38438 },
38439 outputs: []outputInfo{
38440 {0, 281470681743360},
38441 },
38442 },
38443 },
38444 {
38445 name: "F64Trunc",
38446 argLen: 1,
38447 asm: wasm.AF64Trunc,
38448 reg: regInfo{
38449 inputs: []inputInfo{
38450 {0, 281470681743360},
38451 },
38452 outputs: []outputInfo{
38453 {0, 281470681743360},
38454 },
38455 },
38456 },
38457 {
38458 name: "F64Ceil",
38459 argLen: 1,
38460 asm: wasm.AF64Ceil,
38461 reg: regInfo{
38462 inputs: []inputInfo{
38463 {0, 281470681743360},
38464 },
38465 outputs: []outputInfo{
38466 {0, 281470681743360},
38467 },
38468 },
38469 },
38470 {
38471 name: "F64Floor",
38472 argLen: 1,
38473 asm: wasm.AF64Floor,
38474 reg: regInfo{
38475 inputs: []inputInfo{
38476 {0, 281470681743360},
38477 },
38478 outputs: []outputInfo{
38479 {0, 281470681743360},
38480 },
38481 },
38482 },
38483 {
38484 name: "F64Nearest",
38485 argLen: 1,
38486 asm: wasm.AF64Nearest,
38487 reg: regInfo{
38488 inputs: []inputInfo{
38489 {0, 281470681743360},
38490 },
38491 outputs: []outputInfo{
38492 {0, 281470681743360},
38493 },
38494 },
38495 },
38496 {
38497 name: "F64Abs",
38498 argLen: 1,
38499 asm: wasm.AF64Abs,
38500 reg: regInfo{
38501 inputs: []inputInfo{
38502 {0, 281470681743360},
38503 },
38504 outputs: []outputInfo{
38505 {0, 281470681743360},
38506 },
38507 },
38508 },
38509 {
38510 name: "F64Copysign",
38511 argLen: 2,
38512 asm: wasm.AF64Copysign,
38513 reg: regInfo{
38514 inputs: []inputInfo{
38515 {0, 281470681743360},
38516 {1, 281470681743360},
38517 },
38518 outputs: []outputInfo{
38519 {0, 281470681743360},
38520 },
38521 },
38522 },
38523 {
38524 name: "I64Ctz",
38525 argLen: 1,
38526 asm: wasm.AI64Ctz,
38527 reg: regInfo{
38528 inputs: []inputInfo{
38529 {0, 281474976776191},
38530 },
38531 outputs: []outputInfo{
38532 {0, 65535},
38533 },
38534 },
38535 },
38536 {
38537 name: "I64Clz",
38538 argLen: 1,
38539 asm: wasm.AI64Clz,
38540 reg: regInfo{
38541 inputs: []inputInfo{
38542 {0, 281474976776191},
38543 },
38544 outputs: []outputInfo{
38545 {0, 65535},
38546 },
38547 },
38548 },
38549 {
38550 name: "I32Rotl",
38551 argLen: 2,
38552 asm: wasm.AI32Rotl,
38553 reg: regInfo{
38554 inputs: []inputInfo{
38555 {0, 281474976776191},
38556 {1, 281474976776191},
38557 },
38558 outputs: []outputInfo{
38559 {0, 65535},
38560 },
38561 },
38562 },
38563 {
38564 name: "I64Rotl",
38565 argLen: 2,
38566 asm: wasm.AI64Rotl,
38567 reg: regInfo{
38568 inputs: []inputInfo{
38569 {0, 281474976776191},
38570 {1, 281474976776191},
38571 },
38572 outputs: []outputInfo{
38573 {0, 65535},
38574 },
38575 },
38576 },
38577 {
38578 name: "I64Popcnt",
38579 argLen: 1,
38580 asm: wasm.AI64Popcnt,
38581 reg: regInfo{
38582 inputs: []inputInfo{
38583 {0, 281474976776191},
38584 },
38585 outputs: []outputInfo{
38586 {0, 65535},
38587 },
38588 },
38589 },
38590
38591 {
38592 name: "Add8",
38593 argLen: 2,
38594 commutative: true,
38595 generic: true,
38596 },
38597 {
38598 name: "Add16",
38599 argLen: 2,
38600 commutative: true,
38601 generic: true,
38602 },
38603 {
38604 name: "Add32",
38605 argLen: 2,
38606 commutative: true,
38607 generic: true,
38608 },
38609 {
38610 name: "Add64",
38611 argLen: 2,
38612 commutative: true,
38613 generic: true,
38614 },
38615 {
38616 name: "AddPtr",
38617 argLen: 2,
38618 generic: true,
38619 },
38620 {
38621 name: "Add32F",
38622 argLen: 2,
38623 commutative: true,
38624 generic: true,
38625 },
38626 {
38627 name: "Add64F",
38628 argLen: 2,
38629 commutative: true,
38630 generic: true,
38631 },
38632 {
38633 name: "Sub8",
38634 argLen: 2,
38635 generic: true,
38636 },
38637 {
38638 name: "Sub16",
38639 argLen: 2,
38640 generic: true,
38641 },
38642 {
38643 name: "Sub32",
38644 argLen: 2,
38645 generic: true,
38646 },
38647 {
38648 name: "Sub64",
38649 argLen: 2,
38650 generic: true,
38651 },
38652 {
38653 name: "SubPtr",
38654 argLen: 2,
38655 generic: true,
38656 },
38657 {
38658 name: "Sub32F",
38659 argLen: 2,
38660 generic: true,
38661 },
38662 {
38663 name: "Sub64F",
38664 argLen: 2,
38665 generic: true,
38666 },
38667 {
38668 name: "Mul8",
38669 argLen: 2,
38670 commutative: true,
38671 generic: true,
38672 },
38673 {
38674 name: "Mul16",
38675 argLen: 2,
38676 commutative: true,
38677 generic: true,
38678 },
38679 {
38680 name: "Mul32",
38681 argLen: 2,
38682 commutative: true,
38683 generic: true,
38684 },
38685 {
38686 name: "Mul64",
38687 argLen: 2,
38688 commutative: true,
38689 generic: true,
38690 },
38691 {
38692 name: "Mul32F",
38693 argLen: 2,
38694 commutative: true,
38695 generic: true,
38696 },
38697 {
38698 name: "Mul64F",
38699 argLen: 2,
38700 commutative: true,
38701 generic: true,
38702 },
38703 {
38704 name: "Div32F",
38705 argLen: 2,
38706 generic: true,
38707 },
38708 {
38709 name: "Div64F",
38710 argLen: 2,
38711 generic: true,
38712 },
38713 {
38714 name: "Hmul32",
38715 argLen: 2,
38716 commutative: true,
38717 generic: true,
38718 },
38719 {
38720 name: "Hmul32u",
38721 argLen: 2,
38722 commutative: true,
38723 generic: true,
38724 },
38725 {
38726 name: "Hmul64",
38727 argLen: 2,
38728 commutative: true,
38729 generic: true,
38730 },
38731 {
38732 name: "Hmul64u",
38733 argLen: 2,
38734 commutative: true,
38735 generic: true,
38736 },
38737 {
38738 name: "Mul32uhilo",
38739 argLen: 2,
38740 commutative: true,
38741 generic: true,
38742 },
38743 {
38744 name: "Mul64uhilo",
38745 argLen: 2,
38746 commutative: true,
38747 generic: true,
38748 },
38749 {
38750 name: "Mul32uover",
38751 argLen: 2,
38752 commutative: true,
38753 generic: true,
38754 },
38755 {
38756 name: "Mul64uover",
38757 argLen: 2,
38758 commutative: true,
38759 generic: true,
38760 },
38761 {
38762 name: "Avg32u",
38763 argLen: 2,
38764 generic: true,
38765 },
38766 {
38767 name: "Avg64u",
38768 argLen: 2,
38769 generic: true,
38770 },
38771 {
38772 name: "Div8",
38773 argLen: 2,
38774 generic: true,
38775 },
38776 {
38777 name: "Div8u",
38778 argLen: 2,
38779 generic: true,
38780 },
38781 {
38782 name: "Div16",
38783 auxType: auxBool,
38784 argLen: 2,
38785 generic: true,
38786 },
38787 {
38788 name: "Div16u",
38789 argLen: 2,
38790 generic: true,
38791 },
38792 {
38793 name: "Div32",
38794 auxType: auxBool,
38795 argLen: 2,
38796 generic: true,
38797 },
38798 {
38799 name: "Div32u",
38800 argLen: 2,
38801 generic: true,
38802 },
38803 {
38804 name: "Div64",
38805 auxType: auxBool,
38806 argLen: 2,
38807 generic: true,
38808 },
38809 {
38810 name: "Div64u",
38811 argLen: 2,
38812 generic: true,
38813 },
38814 {
38815 name: "Div128u",
38816 argLen: 3,
38817 generic: true,
38818 },
38819 {
38820 name: "Mod8",
38821 argLen: 2,
38822 generic: true,
38823 },
38824 {
38825 name: "Mod8u",
38826 argLen: 2,
38827 generic: true,
38828 },
38829 {
38830 name: "Mod16",
38831 auxType: auxBool,
38832 argLen: 2,
38833 generic: true,
38834 },
38835 {
38836 name: "Mod16u",
38837 argLen: 2,
38838 generic: true,
38839 },
38840 {
38841 name: "Mod32",
38842 auxType: auxBool,
38843 argLen: 2,
38844 generic: true,
38845 },
38846 {
38847 name: "Mod32u",
38848 argLen: 2,
38849 generic: true,
38850 },
38851 {
38852 name: "Mod64",
38853 auxType: auxBool,
38854 argLen: 2,
38855 generic: true,
38856 },
38857 {
38858 name: "Mod64u",
38859 argLen: 2,
38860 generic: true,
38861 },
38862 {
38863 name: "And8",
38864 argLen: 2,
38865 commutative: true,
38866 generic: true,
38867 },
38868 {
38869 name: "And16",
38870 argLen: 2,
38871 commutative: true,
38872 generic: true,
38873 },
38874 {
38875 name: "And32",
38876 argLen: 2,
38877 commutative: true,
38878 generic: true,
38879 },
38880 {
38881 name: "And64",
38882 argLen: 2,
38883 commutative: true,
38884 generic: true,
38885 },
38886 {
38887 name: "Or8",
38888 argLen: 2,
38889 commutative: true,
38890 generic: true,
38891 },
38892 {
38893 name: "Or16",
38894 argLen: 2,
38895 commutative: true,
38896 generic: true,
38897 },
38898 {
38899 name: "Or32",
38900 argLen: 2,
38901 commutative: true,
38902 generic: true,
38903 },
38904 {
38905 name: "Or64",
38906 argLen: 2,
38907 commutative: true,
38908 generic: true,
38909 },
38910 {
38911 name: "Xor8",
38912 argLen: 2,
38913 commutative: true,
38914 generic: true,
38915 },
38916 {
38917 name: "Xor16",
38918 argLen: 2,
38919 commutative: true,
38920 generic: true,
38921 },
38922 {
38923 name: "Xor32",
38924 argLen: 2,
38925 commutative: true,
38926 generic: true,
38927 },
38928 {
38929 name: "Xor64",
38930 argLen: 2,
38931 commutative: true,
38932 generic: true,
38933 },
38934 {
38935 name: "Lsh8x8",
38936 auxType: auxBool,
38937 argLen: 2,
38938 generic: true,
38939 },
38940 {
38941 name: "Lsh8x16",
38942 auxType: auxBool,
38943 argLen: 2,
38944 generic: true,
38945 },
38946 {
38947 name: "Lsh8x32",
38948 auxType: auxBool,
38949 argLen: 2,
38950 generic: true,
38951 },
38952 {
38953 name: "Lsh8x64",
38954 auxType: auxBool,
38955 argLen: 2,
38956 generic: true,
38957 },
38958 {
38959 name: "Lsh16x8",
38960 auxType: auxBool,
38961 argLen: 2,
38962 generic: true,
38963 },
38964 {
38965 name: "Lsh16x16",
38966 auxType: auxBool,
38967 argLen: 2,
38968 generic: true,
38969 },
38970 {
38971 name: "Lsh16x32",
38972 auxType: auxBool,
38973 argLen: 2,
38974 generic: true,
38975 },
38976 {
38977 name: "Lsh16x64",
38978 auxType: auxBool,
38979 argLen: 2,
38980 generic: true,
38981 },
38982 {
38983 name: "Lsh32x8",
38984 auxType: auxBool,
38985 argLen: 2,
38986 generic: true,
38987 },
38988 {
38989 name: "Lsh32x16",
38990 auxType: auxBool,
38991 argLen: 2,
38992 generic: true,
38993 },
38994 {
38995 name: "Lsh32x32",
38996 auxType: auxBool,
38997 argLen: 2,
38998 generic: true,
38999 },
39000 {
39001 name: "Lsh32x64",
39002 auxType: auxBool,
39003 argLen: 2,
39004 generic: true,
39005 },
39006 {
39007 name: "Lsh64x8",
39008 auxType: auxBool,
39009 argLen: 2,
39010 generic: true,
39011 },
39012 {
39013 name: "Lsh64x16",
39014 auxType: auxBool,
39015 argLen: 2,
39016 generic: true,
39017 },
39018 {
39019 name: "Lsh64x32",
39020 auxType: auxBool,
39021 argLen: 2,
39022 generic: true,
39023 },
39024 {
39025 name: "Lsh64x64",
39026 auxType: auxBool,
39027 argLen: 2,
39028 generic: true,
39029 },
39030 {
39031 name: "Rsh8x8",
39032 auxType: auxBool,
39033 argLen: 2,
39034 generic: true,
39035 },
39036 {
39037 name: "Rsh8x16",
39038 auxType: auxBool,
39039 argLen: 2,
39040 generic: true,
39041 },
39042 {
39043 name: "Rsh8x32",
39044 auxType: auxBool,
39045 argLen: 2,
39046 generic: true,
39047 },
39048 {
39049 name: "Rsh8x64",
39050 auxType: auxBool,
39051 argLen: 2,
39052 generic: true,
39053 },
39054 {
39055 name: "Rsh16x8",
39056 auxType: auxBool,
39057 argLen: 2,
39058 generic: true,
39059 },
39060 {
39061 name: "Rsh16x16",
39062 auxType: auxBool,
39063 argLen: 2,
39064 generic: true,
39065 },
39066 {
39067 name: "Rsh16x32",
39068 auxType: auxBool,
39069 argLen: 2,
39070 generic: true,
39071 },
39072 {
39073 name: "Rsh16x64",
39074 auxType: auxBool,
39075 argLen: 2,
39076 generic: true,
39077 },
39078 {
39079 name: "Rsh32x8",
39080 auxType: auxBool,
39081 argLen: 2,
39082 generic: true,
39083 },
39084 {
39085 name: "Rsh32x16",
39086 auxType: auxBool,
39087 argLen: 2,
39088 generic: true,
39089 },
39090 {
39091 name: "Rsh32x32",
39092 auxType: auxBool,
39093 argLen: 2,
39094 generic: true,
39095 },
39096 {
39097 name: "Rsh32x64",
39098 auxType: auxBool,
39099 argLen: 2,
39100 generic: true,
39101 },
39102 {
39103 name: "Rsh64x8",
39104 auxType: auxBool,
39105 argLen: 2,
39106 generic: true,
39107 },
39108 {
39109 name: "Rsh64x16",
39110 auxType: auxBool,
39111 argLen: 2,
39112 generic: true,
39113 },
39114 {
39115 name: "Rsh64x32",
39116 auxType: auxBool,
39117 argLen: 2,
39118 generic: true,
39119 },
39120 {
39121 name: "Rsh64x64",
39122 auxType: auxBool,
39123 argLen: 2,
39124 generic: true,
39125 },
39126 {
39127 name: "Rsh8Ux8",
39128 auxType: auxBool,
39129 argLen: 2,
39130 generic: true,
39131 },
39132 {
39133 name: "Rsh8Ux16",
39134 auxType: auxBool,
39135 argLen: 2,
39136 generic: true,
39137 },
39138 {
39139 name: "Rsh8Ux32",
39140 auxType: auxBool,
39141 argLen: 2,
39142 generic: true,
39143 },
39144 {
39145 name: "Rsh8Ux64",
39146 auxType: auxBool,
39147 argLen: 2,
39148 generic: true,
39149 },
39150 {
39151 name: "Rsh16Ux8",
39152 auxType: auxBool,
39153 argLen: 2,
39154 generic: true,
39155 },
39156 {
39157 name: "Rsh16Ux16",
39158 auxType: auxBool,
39159 argLen: 2,
39160 generic: true,
39161 },
39162 {
39163 name: "Rsh16Ux32",
39164 auxType: auxBool,
39165 argLen: 2,
39166 generic: true,
39167 },
39168 {
39169 name: "Rsh16Ux64",
39170 auxType: auxBool,
39171 argLen: 2,
39172 generic: true,
39173 },
39174 {
39175 name: "Rsh32Ux8",
39176 auxType: auxBool,
39177 argLen: 2,
39178 generic: true,
39179 },
39180 {
39181 name: "Rsh32Ux16",
39182 auxType: auxBool,
39183 argLen: 2,
39184 generic: true,
39185 },
39186 {
39187 name: "Rsh32Ux32",
39188 auxType: auxBool,
39189 argLen: 2,
39190 generic: true,
39191 },
39192 {
39193 name: "Rsh32Ux64",
39194 auxType: auxBool,
39195 argLen: 2,
39196 generic: true,
39197 },
39198 {
39199 name: "Rsh64Ux8",
39200 auxType: auxBool,
39201 argLen: 2,
39202 generic: true,
39203 },
39204 {
39205 name: "Rsh64Ux16",
39206 auxType: auxBool,
39207 argLen: 2,
39208 generic: true,
39209 },
39210 {
39211 name: "Rsh64Ux32",
39212 auxType: auxBool,
39213 argLen: 2,
39214 generic: true,
39215 },
39216 {
39217 name: "Rsh64Ux64",
39218 auxType: auxBool,
39219 argLen: 2,
39220 generic: true,
39221 },
39222 {
39223 name: "Eq8",
39224 argLen: 2,
39225 commutative: true,
39226 generic: true,
39227 },
39228 {
39229 name: "Eq16",
39230 argLen: 2,
39231 commutative: true,
39232 generic: true,
39233 },
39234 {
39235 name: "Eq32",
39236 argLen: 2,
39237 commutative: true,
39238 generic: true,
39239 },
39240 {
39241 name: "Eq64",
39242 argLen: 2,
39243 commutative: true,
39244 generic: true,
39245 },
39246 {
39247 name: "EqPtr",
39248 argLen: 2,
39249 commutative: true,
39250 generic: true,
39251 },
39252 {
39253 name: "EqInter",
39254 argLen: 2,
39255 generic: true,
39256 },
39257 {
39258 name: "EqSlice",
39259 argLen: 2,
39260 generic: true,
39261 },
39262 {
39263 name: "Eq32F",
39264 argLen: 2,
39265 commutative: true,
39266 generic: true,
39267 },
39268 {
39269 name: "Eq64F",
39270 argLen: 2,
39271 commutative: true,
39272 generic: true,
39273 },
39274 {
39275 name: "Neq8",
39276 argLen: 2,
39277 commutative: true,
39278 generic: true,
39279 },
39280 {
39281 name: "Neq16",
39282 argLen: 2,
39283 commutative: true,
39284 generic: true,
39285 },
39286 {
39287 name: "Neq32",
39288 argLen: 2,
39289 commutative: true,
39290 generic: true,
39291 },
39292 {
39293 name: "Neq64",
39294 argLen: 2,
39295 commutative: true,
39296 generic: true,
39297 },
39298 {
39299 name: "NeqPtr",
39300 argLen: 2,
39301 commutative: true,
39302 generic: true,
39303 },
39304 {
39305 name: "NeqInter",
39306 argLen: 2,
39307 generic: true,
39308 },
39309 {
39310 name: "NeqSlice",
39311 argLen: 2,
39312 generic: true,
39313 },
39314 {
39315 name: "Neq32F",
39316 argLen: 2,
39317 commutative: true,
39318 generic: true,
39319 },
39320 {
39321 name: "Neq64F",
39322 argLen: 2,
39323 commutative: true,
39324 generic: true,
39325 },
39326 {
39327 name: "Less8",
39328 argLen: 2,
39329 generic: true,
39330 },
39331 {
39332 name: "Less8U",
39333 argLen: 2,
39334 generic: true,
39335 },
39336 {
39337 name: "Less16",
39338 argLen: 2,
39339 generic: true,
39340 },
39341 {
39342 name: "Less16U",
39343 argLen: 2,
39344 generic: true,
39345 },
39346 {
39347 name: "Less32",
39348 argLen: 2,
39349 generic: true,
39350 },
39351 {
39352 name: "Less32U",
39353 argLen: 2,
39354 generic: true,
39355 },
39356 {
39357 name: "Less64",
39358 argLen: 2,
39359 generic: true,
39360 },
39361 {
39362 name: "Less64U",
39363 argLen: 2,
39364 generic: true,
39365 },
39366 {
39367 name: "Less32F",
39368 argLen: 2,
39369 generic: true,
39370 },
39371 {
39372 name: "Less64F",
39373 argLen: 2,
39374 generic: true,
39375 },
39376 {
39377 name: "Leq8",
39378 argLen: 2,
39379 generic: true,
39380 },
39381 {
39382 name: "Leq8U",
39383 argLen: 2,
39384 generic: true,
39385 },
39386 {
39387 name: "Leq16",
39388 argLen: 2,
39389 generic: true,
39390 },
39391 {
39392 name: "Leq16U",
39393 argLen: 2,
39394 generic: true,
39395 },
39396 {
39397 name: "Leq32",
39398 argLen: 2,
39399 generic: true,
39400 },
39401 {
39402 name: "Leq32U",
39403 argLen: 2,
39404 generic: true,
39405 },
39406 {
39407 name: "Leq64",
39408 argLen: 2,
39409 generic: true,
39410 },
39411 {
39412 name: "Leq64U",
39413 argLen: 2,
39414 generic: true,
39415 },
39416 {
39417 name: "Leq32F",
39418 argLen: 2,
39419 generic: true,
39420 },
39421 {
39422 name: "Leq64F",
39423 argLen: 2,
39424 generic: true,
39425 },
39426 {
39427 name: "CondSelect",
39428 argLen: 3,
39429 generic: true,
39430 },
39431 {
39432 name: "AndB",
39433 argLen: 2,
39434 commutative: true,
39435 generic: true,
39436 },
39437 {
39438 name: "OrB",
39439 argLen: 2,
39440 commutative: true,
39441 generic: true,
39442 },
39443 {
39444 name: "EqB",
39445 argLen: 2,
39446 commutative: true,
39447 generic: true,
39448 },
39449 {
39450 name: "NeqB",
39451 argLen: 2,
39452 commutative: true,
39453 generic: true,
39454 },
39455 {
39456 name: "Not",
39457 argLen: 1,
39458 generic: true,
39459 },
39460 {
39461 name: "Neg8",
39462 argLen: 1,
39463 generic: true,
39464 },
39465 {
39466 name: "Neg16",
39467 argLen: 1,
39468 generic: true,
39469 },
39470 {
39471 name: "Neg32",
39472 argLen: 1,
39473 generic: true,
39474 },
39475 {
39476 name: "Neg64",
39477 argLen: 1,
39478 generic: true,
39479 },
39480 {
39481 name: "Neg32F",
39482 argLen: 1,
39483 generic: true,
39484 },
39485 {
39486 name: "Neg64F",
39487 argLen: 1,
39488 generic: true,
39489 },
39490 {
39491 name: "Com8",
39492 argLen: 1,
39493 generic: true,
39494 },
39495 {
39496 name: "Com16",
39497 argLen: 1,
39498 generic: true,
39499 },
39500 {
39501 name: "Com32",
39502 argLen: 1,
39503 generic: true,
39504 },
39505 {
39506 name: "Com64",
39507 argLen: 1,
39508 generic: true,
39509 },
39510 {
39511 name: "Ctz8",
39512 argLen: 1,
39513 generic: true,
39514 },
39515 {
39516 name: "Ctz16",
39517 argLen: 1,
39518 generic: true,
39519 },
39520 {
39521 name: "Ctz32",
39522 argLen: 1,
39523 generic: true,
39524 },
39525 {
39526 name: "Ctz64",
39527 argLen: 1,
39528 generic: true,
39529 },
39530 {
39531 name: "Ctz8NonZero",
39532 argLen: 1,
39533 generic: true,
39534 },
39535 {
39536 name: "Ctz16NonZero",
39537 argLen: 1,
39538 generic: true,
39539 },
39540 {
39541 name: "Ctz32NonZero",
39542 argLen: 1,
39543 generic: true,
39544 },
39545 {
39546 name: "Ctz64NonZero",
39547 argLen: 1,
39548 generic: true,
39549 },
39550 {
39551 name: "BitLen8",
39552 argLen: 1,
39553 generic: true,
39554 },
39555 {
39556 name: "BitLen16",
39557 argLen: 1,
39558 generic: true,
39559 },
39560 {
39561 name: "BitLen32",
39562 argLen: 1,
39563 generic: true,
39564 },
39565 {
39566 name: "BitLen64",
39567 argLen: 1,
39568 generic: true,
39569 },
39570 {
39571 name: "Bswap16",
39572 argLen: 1,
39573 generic: true,
39574 },
39575 {
39576 name: "Bswap32",
39577 argLen: 1,
39578 generic: true,
39579 },
39580 {
39581 name: "Bswap64",
39582 argLen: 1,
39583 generic: true,
39584 },
39585 {
39586 name: "BitRev8",
39587 argLen: 1,
39588 generic: true,
39589 },
39590 {
39591 name: "BitRev16",
39592 argLen: 1,
39593 generic: true,
39594 },
39595 {
39596 name: "BitRev32",
39597 argLen: 1,
39598 generic: true,
39599 },
39600 {
39601 name: "BitRev64",
39602 argLen: 1,
39603 generic: true,
39604 },
39605 {
39606 name: "PopCount8",
39607 argLen: 1,
39608 generic: true,
39609 },
39610 {
39611 name: "PopCount16",
39612 argLen: 1,
39613 generic: true,
39614 },
39615 {
39616 name: "PopCount32",
39617 argLen: 1,
39618 generic: true,
39619 },
39620 {
39621 name: "PopCount64",
39622 argLen: 1,
39623 generic: true,
39624 },
39625 {
39626 name: "RotateLeft64",
39627 argLen: 2,
39628 generic: true,
39629 },
39630 {
39631 name: "RotateLeft32",
39632 argLen: 2,
39633 generic: true,
39634 },
39635 {
39636 name: "RotateLeft16",
39637 argLen: 2,
39638 generic: true,
39639 },
39640 {
39641 name: "RotateLeft8",
39642 argLen: 2,
39643 generic: true,
39644 },
39645 {
39646 name: "Sqrt",
39647 argLen: 1,
39648 generic: true,
39649 },
39650 {
39651 name: "Sqrt32",
39652 argLen: 1,
39653 generic: true,
39654 },
39655 {
39656 name: "Floor",
39657 argLen: 1,
39658 generic: true,
39659 },
39660 {
39661 name: "Ceil",
39662 argLen: 1,
39663 generic: true,
39664 },
39665 {
39666 name: "Trunc",
39667 argLen: 1,
39668 generic: true,
39669 },
39670 {
39671 name: "Round",
39672 argLen: 1,
39673 generic: true,
39674 },
39675 {
39676 name: "RoundToEven",
39677 argLen: 1,
39678 generic: true,
39679 },
39680 {
39681 name: "Abs",
39682 argLen: 1,
39683 generic: true,
39684 },
39685 {
39686 name: "Copysign",
39687 argLen: 2,
39688 generic: true,
39689 },
39690 {
39691 name: "Min64F",
39692 argLen: 2,
39693 generic: true,
39694 },
39695 {
39696 name: "Min32F",
39697 argLen: 2,
39698 generic: true,
39699 },
39700 {
39701 name: "Max64F",
39702 argLen: 2,
39703 generic: true,
39704 },
39705 {
39706 name: "Max32F",
39707 argLen: 2,
39708 generic: true,
39709 },
39710 {
39711 name: "FMA",
39712 argLen: 3,
39713 generic: true,
39714 },
39715 {
39716 name: "Phi",
39717 argLen: -1,
39718 zeroWidth: true,
39719 generic: true,
39720 },
39721 {
39722 name: "Copy",
39723 argLen: 1,
39724 generic: true,
39725 },
39726 {
39727 name: "Convert",
39728 argLen: 2,
39729 resultInArg0: true,
39730 zeroWidth: true,
39731 generic: true,
39732 },
39733 {
39734 name: "ConstBool",
39735 auxType: auxBool,
39736 argLen: 0,
39737 generic: true,
39738 },
39739 {
39740 name: "ConstString",
39741 auxType: auxString,
39742 argLen: 0,
39743 generic: true,
39744 },
39745 {
39746 name: "ConstNil",
39747 argLen: 0,
39748 generic: true,
39749 },
39750 {
39751 name: "Const8",
39752 auxType: auxInt8,
39753 argLen: 0,
39754 generic: true,
39755 },
39756 {
39757 name: "Const16",
39758 auxType: auxInt16,
39759 argLen: 0,
39760 generic: true,
39761 },
39762 {
39763 name: "Const32",
39764 auxType: auxInt32,
39765 argLen: 0,
39766 generic: true,
39767 },
39768 {
39769 name: "Const64",
39770 auxType: auxInt64,
39771 argLen: 0,
39772 generic: true,
39773 },
39774 {
39775 name: "Const32F",
39776 auxType: auxFloat32,
39777 argLen: 0,
39778 generic: true,
39779 },
39780 {
39781 name: "Const64F",
39782 auxType: auxFloat64,
39783 argLen: 0,
39784 generic: true,
39785 },
39786 {
39787 name: "ConstInterface",
39788 argLen: 0,
39789 generic: true,
39790 },
39791 {
39792 name: "ConstSlice",
39793 argLen: 0,
39794 generic: true,
39795 },
39796 {
39797 name: "InitMem",
39798 argLen: 0,
39799 zeroWidth: true,
39800 generic: true,
39801 },
39802 {
39803 name: "Arg",
39804 auxType: auxSymOff,
39805 argLen: 0,
39806 zeroWidth: true,
39807 symEffect: SymRead,
39808 generic: true,
39809 },
39810 {
39811 name: "ArgIntReg",
39812 auxType: auxNameOffsetInt8,
39813 argLen: 0,
39814 zeroWidth: true,
39815 generic: true,
39816 },
39817 {
39818 name: "ArgFloatReg",
39819 auxType: auxNameOffsetInt8,
39820 argLen: 0,
39821 zeroWidth: true,
39822 generic: true,
39823 },
39824 {
39825 name: "Addr",
39826 auxType: auxSym,
39827 argLen: 1,
39828 symEffect: SymAddr,
39829 generic: true,
39830 },
39831 {
39832 name: "LocalAddr",
39833 auxType: auxSym,
39834 argLen: 2,
39835 symEffect: SymAddr,
39836 generic: true,
39837 },
39838 {
39839 name: "SP",
39840 argLen: 0,
39841 zeroWidth: true,
39842 generic: true,
39843 },
39844 {
39845 name: "SB",
39846 argLen: 0,
39847 zeroWidth: true,
39848 generic: true,
39849 },
39850 {
39851 name: "SPanchored",
39852 argLen: 2,
39853 zeroWidth: true,
39854 generic: true,
39855 },
39856 {
39857 name: "Load",
39858 argLen: 2,
39859 generic: true,
39860 },
39861 {
39862 name: "Dereference",
39863 argLen: 2,
39864 generic: true,
39865 },
39866 {
39867 name: "Store",
39868 auxType: auxTyp,
39869 argLen: 3,
39870 generic: true,
39871 },
39872 {
39873 name: "Move",
39874 auxType: auxTypSize,
39875 argLen: 3,
39876 generic: true,
39877 },
39878 {
39879 name: "Zero",
39880 auxType: auxTypSize,
39881 argLen: 2,
39882 generic: true,
39883 },
39884 {
39885 name: "StoreWB",
39886 auxType: auxTyp,
39887 argLen: 3,
39888 generic: true,
39889 },
39890 {
39891 name: "MoveWB",
39892 auxType: auxTypSize,
39893 argLen: 3,
39894 generic: true,
39895 },
39896 {
39897 name: "ZeroWB",
39898 auxType: auxTypSize,
39899 argLen: 2,
39900 generic: true,
39901 },
39902 {
39903 name: "WBend",
39904 argLen: 1,
39905 generic: true,
39906 },
39907 {
39908 name: "WB",
39909 auxType: auxInt64,
39910 argLen: 1,
39911 generic: true,
39912 },
39913 {
39914 name: "HasCPUFeature",
39915 auxType: auxSym,
39916 argLen: 0,
39917 symEffect: SymNone,
39918 generic: true,
39919 },
39920 {
39921 name: "PanicBounds",
39922 auxType: auxInt64,
39923 argLen: 3,
39924 call: true,
39925 generic: true,
39926 },
39927 {
39928 name: "PanicExtend",
39929 auxType: auxInt64,
39930 argLen: 4,
39931 call: true,
39932 generic: true,
39933 },
39934 {
39935 name: "ClosureCall",
39936 auxType: auxCallOff,
39937 argLen: -1,
39938 call: true,
39939 generic: true,
39940 },
39941 {
39942 name: "StaticCall",
39943 auxType: auxCallOff,
39944 argLen: -1,
39945 call: true,
39946 generic: true,
39947 },
39948 {
39949 name: "InterCall",
39950 auxType: auxCallOff,
39951 argLen: -1,
39952 call: true,
39953 generic: true,
39954 },
39955 {
39956 name: "TailCall",
39957 auxType: auxCallOff,
39958 argLen: -1,
39959 call: true,
39960 generic: true,
39961 },
39962 {
39963 name: "ClosureLECall",
39964 auxType: auxCallOff,
39965 argLen: -1,
39966 call: true,
39967 generic: true,
39968 },
39969 {
39970 name: "StaticLECall",
39971 auxType: auxCallOff,
39972 argLen: -1,
39973 call: true,
39974 generic: true,
39975 },
39976 {
39977 name: "InterLECall",
39978 auxType: auxCallOff,
39979 argLen: -1,
39980 call: true,
39981 generic: true,
39982 },
39983 {
39984 name: "TailLECall",
39985 auxType: auxCallOff,
39986 argLen: -1,
39987 call: true,
39988 generic: true,
39989 },
39990 {
39991 name: "SignExt8to16",
39992 argLen: 1,
39993 generic: true,
39994 },
39995 {
39996 name: "SignExt8to32",
39997 argLen: 1,
39998 generic: true,
39999 },
40000 {
40001 name: "SignExt8to64",
40002 argLen: 1,
40003 generic: true,
40004 },
40005 {
40006 name: "SignExt16to32",
40007 argLen: 1,
40008 generic: true,
40009 },
40010 {
40011 name: "SignExt16to64",
40012 argLen: 1,
40013 generic: true,
40014 },
40015 {
40016 name: "SignExt32to64",
40017 argLen: 1,
40018 generic: true,
40019 },
40020 {
40021 name: "ZeroExt8to16",
40022 argLen: 1,
40023 generic: true,
40024 },
40025 {
40026 name: "ZeroExt8to32",
40027 argLen: 1,
40028 generic: true,
40029 },
40030 {
40031 name: "ZeroExt8to64",
40032 argLen: 1,
40033 generic: true,
40034 },
40035 {
40036 name: "ZeroExt16to32",
40037 argLen: 1,
40038 generic: true,
40039 },
40040 {
40041 name: "ZeroExt16to64",
40042 argLen: 1,
40043 generic: true,
40044 },
40045 {
40046 name: "ZeroExt32to64",
40047 argLen: 1,
40048 generic: true,
40049 },
40050 {
40051 name: "Trunc16to8",
40052 argLen: 1,
40053 generic: true,
40054 },
40055 {
40056 name: "Trunc32to8",
40057 argLen: 1,
40058 generic: true,
40059 },
40060 {
40061 name: "Trunc32to16",
40062 argLen: 1,
40063 generic: true,
40064 },
40065 {
40066 name: "Trunc64to8",
40067 argLen: 1,
40068 generic: true,
40069 },
40070 {
40071 name: "Trunc64to16",
40072 argLen: 1,
40073 generic: true,
40074 },
40075 {
40076 name: "Trunc64to32",
40077 argLen: 1,
40078 generic: true,
40079 },
40080 {
40081 name: "Cvt32to32F",
40082 argLen: 1,
40083 generic: true,
40084 },
40085 {
40086 name: "Cvt32to64F",
40087 argLen: 1,
40088 generic: true,
40089 },
40090 {
40091 name: "Cvt64to32F",
40092 argLen: 1,
40093 generic: true,
40094 },
40095 {
40096 name: "Cvt64to64F",
40097 argLen: 1,
40098 generic: true,
40099 },
40100 {
40101 name: "Cvt32Fto32",
40102 argLen: 1,
40103 generic: true,
40104 },
40105 {
40106 name: "Cvt32Fto64",
40107 argLen: 1,
40108 generic: true,
40109 },
40110 {
40111 name: "Cvt64Fto32",
40112 argLen: 1,
40113 generic: true,
40114 },
40115 {
40116 name: "Cvt64Fto64",
40117 argLen: 1,
40118 generic: true,
40119 },
40120 {
40121 name: "Cvt32Fto64F",
40122 argLen: 1,
40123 generic: true,
40124 },
40125 {
40126 name: "Cvt64Fto32F",
40127 argLen: 1,
40128 generic: true,
40129 },
40130 {
40131 name: "CvtBoolToUint8",
40132 argLen: 1,
40133 generic: true,
40134 },
40135 {
40136 name: "Round32F",
40137 argLen: 1,
40138 generic: true,
40139 },
40140 {
40141 name: "Round64F",
40142 argLen: 1,
40143 generic: true,
40144 },
40145 {
40146 name: "IsNonNil",
40147 argLen: 1,
40148 generic: true,
40149 },
40150 {
40151 name: "IsInBounds",
40152 argLen: 2,
40153 generic: true,
40154 },
40155 {
40156 name: "IsSliceInBounds",
40157 argLen: 2,
40158 generic: true,
40159 },
40160 {
40161 name: "NilCheck",
40162 argLen: 2,
40163 nilCheck: true,
40164 generic: true,
40165 },
40166 {
40167 name: "GetG",
40168 argLen: 1,
40169 zeroWidth: true,
40170 generic: true,
40171 },
40172 {
40173 name: "GetClosurePtr",
40174 argLen: 0,
40175 generic: true,
40176 },
40177 {
40178 name: "GetCallerPC",
40179 argLen: 0,
40180 generic: true,
40181 },
40182 {
40183 name: "GetCallerSP",
40184 argLen: 1,
40185 generic: true,
40186 },
40187 {
40188 name: "PtrIndex",
40189 argLen: 2,
40190 generic: true,
40191 },
40192 {
40193 name: "OffPtr",
40194 auxType: auxInt64,
40195 argLen: 1,
40196 generic: true,
40197 },
40198 {
40199 name: "SliceMake",
40200 argLen: 3,
40201 generic: true,
40202 },
40203 {
40204 name: "SlicePtr",
40205 argLen: 1,
40206 generic: true,
40207 },
40208 {
40209 name: "SliceLen",
40210 argLen: 1,
40211 generic: true,
40212 },
40213 {
40214 name: "SliceCap",
40215 argLen: 1,
40216 generic: true,
40217 },
40218 {
40219 name: "SlicePtrUnchecked",
40220 argLen: 1,
40221 generic: true,
40222 },
40223 {
40224 name: "ComplexMake",
40225 argLen: 2,
40226 generic: true,
40227 },
40228 {
40229 name: "ComplexReal",
40230 argLen: 1,
40231 generic: true,
40232 },
40233 {
40234 name: "ComplexImag",
40235 argLen: 1,
40236 generic: true,
40237 },
40238 {
40239 name: "StringMake",
40240 argLen: 2,
40241 generic: true,
40242 },
40243 {
40244 name: "StringPtr",
40245 argLen: 1,
40246 generic: true,
40247 },
40248 {
40249 name: "StringLen",
40250 argLen: 1,
40251 generic: true,
40252 },
40253 {
40254 name: "IMake",
40255 argLen: 2,
40256 generic: true,
40257 },
40258 {
40259 name: "ITab",
40260 argLen: 1,
40261 generic: true,
40262 },
40263 {
40264 name: "IData",
40265 argLen: 1,
40266 generic: true,
40267 },
40268 {
40269 name: "StructMake0",
40270 argLen: 0,
40271 generic: true,
40272 },
40273 {
40274 name: "StructMake1",
40275 argLen: 1,
40276 generic: true,
40277 },
40278 {
40279 name: "StructMake2",
40280 argLen: 2,
40281 generic: true,
40282 },
40283 {
40284 name: "StructMake3",
40285 argLen: 3,
40286 generic: true,
40287 },
40288 {
40289 name: "StructMake4",
40290 argLen: 4,
40291 generic: true,
40292 },
40293 {
40294 name: "StructSelect",
40295 auxType: auxInt64,
40296 argLen: 1,
40297 generic: true,
40298 },
40299 {
40300 name: "ArrayMake0",
40301 argLen: 0,
40302 generic: true,
40303 },
40304 {
40305 name: "ArrayMake1",
40306 argLen: 1,
40307 generic: true,
40308 },
40309 {
40310 name: "ArraySelect",
40311 auxType: auxInt64,
40312 argLen: 1,
40313 generic: true,
40314 },
40315 {
40316 name: "StoreReg",
40317 argLen: 1,
40318 generic: true,
40319 },
40320 {
40321 name: "LoadReg",
40322 argLen: 1,
40323 generic: true,
40324 },
40325 {
40326 name: "FwdRef",
40327 auxType: auxSym,
40328 argLen: 0,
40329 symEffect: SymNone,
40330 generic: true,
40331 },
40332 {
40333 name: "Unknown",
40334 argLen: 0,
40335 generic: true,
40336 },
40337 {
40338 name: "VarDef",
40339 auxType: auxSym,
40340 argLen: 1,
40341 zeroWidth: true,
40342 symEffect: SymNone,
40343 generic: true,
40344 },
40345 {
40346 name: "VarLive",
40347 auxType: auxSym,
40348 argLen: 1,
40349 zeroWidth: true,
40350 symEffect: SymRead,
40351 generic: true,
40352 },
40353 {
40354 name: "KeepAlive",
40355 argLen: 2,
40356 zeroWidth: true,
40357 generic: true,
40358 },
40359 {
40360 name: "InlMark",
40361 auxType: auxInt32,
40362 argLen: 1,
40363 generic: true,
40364 },
40365 {
40366 name: "Int64Make",
40367 argLen: 2,
40368 generic: true,
40369 },
40370 {
40371 name: "Int64Hi",
40372 argLen: 1,
40373 generic: true,
40374 },
40375 {
40376 name: "Int64Lo",
40377 argLen: 1,
40378 generic: true,
40379 },
40380 {
40381 name: "Add32carry",
40382 argLen: 2,
40383 commutative: true,
40384 generic: true,
40385 },
40386 {
40387 name: "Add32withcarry",
40388 argLen: 3,
40389 commutative: true,
40390 generic: true,
40391 },
40392 {
40393 name: "Sub32carry",
40394 argLen: 2,
40395 generic: true,
40396 },
40397 {
40398 name: "Sub32withcarry",
40399 argLen: 3,
40400 generic: true,
40401 },
40402 {
40403 name: "Add64carry",
40404 argLen: 3,
40405 commutative: true,
40406 generic: true,
40407 },
40408 {
40409 name: "Sub64borrow",
40410 argLen: 3,
40411 generic: true,
40412 },
40413 {
40414 name: "Signmask",
40415 argLen: 1,
40416 generic: true,
40417 },
40418 {
40419 name: "Zeromask",
40420 argLen: 1,
40421 generic: true,
40422 },
40423 {
40424 name: "Slicemask",
40425 argLen: 1,
40426 generic: true,
40427 },
40428 {
40429 name: "SpectreIndex",
40430 argLen: 2,
40431 generic: true,
40432 },
40433 {
40434 name: "SpectreSliceIndex",
40435 argLen: 2,
40436 generic: true,
40437 },
40438 {
40439 name: "Cvt32Uto32F",
40440 argLen: 1,
40441 generic: true,
40442 },
40443 {
40444 name: "Cvt32Uto64F",
40445 argLen: 1,
40446 generic: true,
40447 },
40448 {
40449 name: "Cvt32Fto32U",
40450 argLen: 1,
40451 generic: true,
40452 },
40453 {
40454 name: "Cvt64Fto32U",
40455 argLen: 1,
40456 generic: true,
40457 },
40458 {
40459 name: "Cvt64Uto32F",
40460 argLen: 1,
40461 generic: true,
40462 },
40463 {
40464 name: "Cvt64Uto64F",
40465 argLen: 1,
40466 generic: true,
40467 },
40468 {
40469 name: "Cvt32Fto64U",
40470 argLen: 1,
40471 generic: true,
40472 },
40473 {
40474 name: "Cvt64Fto64U",
40475 argLen: 1,
40476 generic: true,
40477 },
40478 {
40479 name: "Select0",
40480 argLen: 1,
40481 zeroWidth: true,
40482 generic: true,
40483 },
40484 {
40485 name: "Select1",
40486 argLen: 1,
40487 zeroWidth: true,
40488 generic: true,
40489 },
40490 {
40491 name: "SelectN",
40492 auxType: auxInt64,
40493 argLen: 1,
40494 generic: true,
40495 },
40496 {
40497 name: "SelectNAddr",
40498 auxType: auxInt64,
40499 argLen: 1,
40500 generic: true,
40501 },
40502 {
40503 name: "MakeResult",
40504 argLen: -1,
40505 generic: true,
40506 },
40507 {
40508 name: "AtomicLoad8",
40509 argLen: 2,
40510 generic: true,
40511 },
40512 {
40513 name: "AtomicLoad32",
40514 argLen: 2,
40515 generic: true,
40516 },
40517 {
40518 name: "AtomicLoad64",
40519 argLen: 2,
40520 generic: true,
40521 },
40522 {
40523 name: "AtomicLoadPtr",
40524 argLen: 2,
40525 generic: true,
40526 },
40527 {
40528 name: "AtomicLoadAcq32",
40529 argLen: 2,
40530 generic: true,
40531 },
40532 {
40533 name: "AtomicLoadAcq64",
40534 argLen: 2,
40535 generic: true,
40536 },
40537 {
40538 name: "AtomicStore8",
40539 argLen: 3,
40540 hasSideEffects: true,
40541 generic: true,
40542 },
40543 {
40544 name: "AtomicStore32",
40545 argLen: 3,
40546 hasSideEffects: true,
40547 generic: true,
40548 },
40549 {
40550 name: "AtomicStore64",
40551 argLen: 3,
40552 hasSideEffects: true,
40553 generic: true,
40554 },
40555 {
40556 name: "AtomicStorePtrNoWB",
40557 argLen: 3,
40558 hasSideEffects: true,
40559 generic: true,
40560 },
40561 {
40562 name: "AtomicStoreRel32",
40563 argLen: 3,
40564 hasSideEffects: true,
40565 generic: true,
40566 },
40567 {
40568 name: "AtomicStoreRel64",
40569 argLen: 3,
40570 hasSideEffects: true,
40571 generic: true,
40572 },
40573 {
40574 name: "AtomicExchange32",
40575 argLen: 3,
40576 hasSideEffects: true,
40577 generic: true,
40578 },
40579 {
40580 name: "AtomicExchange64",
40581 argLen: 3,
40582 hasSideEffects: true,
40583 generic: true,
40584 },
40585 {
40586 name: "AtomicAdd32",
40587 argLen: 3,
40588 hasSideEffects: true,
40589 generic: true,
40590 },
40591 {
40592 name: "AtomicAdd64",
40593 argLen: 3,
40594 hasSideEffects: true,
40595 generic: true,
40596 },
40597 {
40598 name: "AtomicCompareAndSwap32",
40599 argLen: 4,
40600 hasSideEffects: true,
40601 generic: true,
40602 },
40603 {
40604 name: "AtomicCompareAndSwap64",
40605 argLen: 4,
40606 hasSideEffects: true,
40607 generic: true,
40608 },
40609 {
40610 name: "AtomicCompareAndSwapRel32",
40611 argLen: 4,
40612 hasSideEffects: true,
40613 generic: true,
40614 },
40615 {
40616 name: "AtomicAnd8",
40617 argLen: 3,
40618 hasSideEffects: true,
40619 generic: true,
40620 },
40621 {
40622 name: "AtomicAnd32",
40623 argLen: 3,
40624 hasSideEffects: true,
40625 generic: true,
40626 },
40627 {
40628 name: "AtomicOr8",
40629 argLen: 3,
40630 hasSideEffects: true,
40631 generic: true,
40632 },
40633 {
40634 name: "AtomicOr32",
40635 argLen: 3,
40636 hasSideEffects: true,
40637 generic: true,
40638 },
40639 {
40640 name: "AtomicAdd32Variant",
40641 argLen: 3,
40642 hasSideEffects: true,
40643 generic: true,
40644 },
40645 {
40646 name: "AtomicAdd64Variant",
40647 argLen: 3,
40648 hasSideEffects: true,
40649 generic: true,
40650 },
40651 {
40652 name: "AtomicExchange32Variant",
40653 argLen: 3,
40654 hasSideEffects: true,
40655 generic: true,
40656 },
40657 {
40658 name: "AtomicExchange64Variant",
40659 argLen: 3,
40660 hasSideEffects: true,
40661 generic: true,
40662 },
40663 {
40664 name: "AtomicCompareAndSwap32Variant",
40665 argLen: 4,
40666 hasSideEffects: true,
40667 generic: true,
40668 },
40669 {
40670 name: "AtomicCompareAndSwap64Variant",
40671 argLen: 4,
40672 hasSideEffects: true,
40673 generic: true,
40674 },
40675 {
40676 name: "AtomicAnd8Variant",
40677 argLen: 3,
40678 hasSideEffects: true,
40679 generic: true,
40680 },
40681 {
40682 name: "AtomicAnd32Variant",
40683 argLen: 3,
40684 hasSideEffects: true,
40685 generic: true,
40686 },
40687 {
40688 name: "AtomicOr8Variant",
40689 argLen: 3,
40690 hasSideEffects: true,
40691 generic: true,
40692 },
40693 {
40694 name: "AtomicOr32Variant",
40695 argLen: 3,
40696 hasSideEffects: true,
40697 generic: true,
40698 },
40699 {
40700 name: "PubBarrier",
40701 argLen: 1,
40702 hasSideEffects: true,
40703 generic: true,
40704 },
40705 {
40706 name: "Clobber",
40707 auxType: auxSymOff,
40708 argLen: 0,
40709 symEffect: SymNone,
40710 generic: true,
40711 },
40712 {
40713 name: "ClobberReg",
40714 argLen: 0,
40715 generic: true,
40716 },
40717 {
40718 name: "PrefetchCache",
40719 argLen: 2,
40720 hasSideEffects: true,
40721 generic: true,
40722 },
40723 {
40724 name: "PrefetchCacheStreamed",
40725 argLen: 2,
40726 hasSideEffects: true,
40727 generic: true,
40728 },
40729 }
40730
40731 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
40732 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
40733 func (o Op) String() string { return opcodeTable[o].name }
40734 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
40735 func (o Op) IsCall() bool { return opcodeTable[o].call }
40736 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
40737 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
40738 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
40739 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
40740
40741 var registers386 = [...]Register{
40742 {0, x86.REG_AX, 0, "AX"},
40743 {1, x86.REG_CX, 1, "CX"},
40744 {2, x86.REG_DX, 2, "DX"},
40745 {3, x86.REG_BX, 3, "BX"},
40746 {4, x86.REGSP, -1, "SP"},
40747 {5, x86.REG_BP, 4, "BP"},
40748 {6, x86.REG_SI, 5, "SI"},
40749 {7, x86.REG_DI, 6, "DI"},
40750 {8, x86.REG_X0, -1, "X0"},
40751 {9, x86.REG_X1, -1, "X1"},
40752 {10, x86.REG_X2, -1, "X2"},
40753 {11, x86.REG_X3, -1, "X3"},
40754 {12, x86.REG_X4, -1, "X4"},
40755 {13, x86.REG_X5, -1, "X5"},
40756 {14, x86.REG_X6, -1, "X6"},
40757 {15, x86.REG_X7, -1, "X7"},
40758 {16, 0, -1, "SB"},
40759 }
40760 var paramIntReg386 = []int8(nil)
40761 var paramFloatReg386 = []int8(nil)
40762 var gpRegMask386 = regMask(239)
40763 var fpRegMask386 = regMask(65280)
40764 var specialRegMask386 = regMask(0)
40765 var framepointerReg386 = int8(5)
40766 var linkReg386 = int8(-1)
40767 var registersAMD64 = [...]Register{
40768 {0, x86.REG_AX, 0, "AX"},
40769 {1, x86.REG_CX, 1, "CX"},
40770 {2, x86.REG_DX, 2, "DX"},
40771 {3, x86.REG_BX, 3, "BX"},
40772 {4, x86.REGSP, -1, "SP"},
40773 {5, x86.REG_BP, 4, "BP"},
40774 {6, x86.REG_SI, 5, "SI"},
40775 {7, x86.REG_DI, 6, "DI"},
40776 {8, x86.REG_R8, 7, "R8"},
40777 {9, x86.REG_R9, 8, "R9"},
40778 {10, x86.REG_R10, 9, "R10"},
40779 {11, x86.REG_R11, 10, "R11"},
40780 {12, x86.REG_R12, 11, "R12"},
40781 {13, x86.REG_R13, 12, "R13"},
40782 {14, x86.REGG, -1, "g"},
40783 {15, x86.REG_R15, 13, "R15"},
40784 {16, x86.REG_X0, -1, "X0"},
40785 {17, x86.REG_X1, -1, "X1"},
40786 {18, x86.REG_X2, -1, "X2"},
40787 {19, x86.REG_X3, -1, "X3"},
40788 {20, x86.REG_X4, -1, "X4"},
40789 {21, x86.REG_X5, -1, "X5"},
40790 {22, x86.REG_X6, -1, "X6"},
40791 {23, x86.REG_X7, -1, "X7"},
40792 {24, x86.REG_X8, -1, "X8"},
40793 {25, x86.REG_X9, -1, "X9"},
40794 {26, x86.REG_X10, -1, "X10"},
40795 {27, x86.REG_X11, -1, "X11"},
40796 {28, x86.REG_X12, -1, "X12"},
40797 {29, x86.REG_X13, -1, "X13"},
40798 {30, x86.REG_X14, -1, "X14"},
40799 {31, x86.REG_X15, -1, "X15"},
40800 {32, 0, -1, "SB"},
40801 }
40802 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
40803 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
40804 var gpRegMaskAMD64 = regMask(49135)
40805 var fpRegMaskAMD64 = regMask(2147418112)
40806 var specialRegMaskAMD64 = regMask(2147483648)
40807 var framepointerRegAMD64 = int8(5)
40808 var linkRegAMD64 = int8(-1)
40809 var registersARM = [...]Register{
40810 {0, arm.REG_R0, 0, "R0"},
40811 {1, arm.REG_R1, 1, "R1"},
40812 {2, arm.REG_R2, 2, "R2"},
40813 {3, arm.REG_R3, 3, "R3"},
40814 {4, arm.REG_R4, 4, "R4"},
40815 {5, arm.REG_R5, 5, "R5"},
40816 {6, arm.REG_R6, 6, "R6"},
40817 {7, arm.REG_R7, 7, "R7"},
40818 {8, arm.REG_R8, 8, "R8"},
40819 {9, arm.REG_R9, 9, "R9"},
40820 {10, arm.REGG, -1, "g"},
40821 {11, arm.REG_R11, -1, "R11"},
40822 {12, arm.REG_R12, 10, "R12"},
40823 {13, arm.REGSP, -1, "SP"},
40824 {14, arm.REG_R14, 11, "R14"},
40825 {15, arm.REG_R15, -1, "R15"},
40826 {16, arm.REG_F0, -1, "F0"},
40827 {17, arm.REG_F1, -1, "F1"},
40828 {18, arm.REG_F2, -1, "F2"},
40829 {19, arm.REG_F3, -1, "F3"},
40830 {20, arm.REG_F4, -1, "F4"},
40831 {21, arm.REG_F5, -1, "F5"},
40832 {22, arm.REG_F6, -1, "F6"},
40833 {23, arm.REG_F7, -1, "F7"},
40834 {24, arm.REG_F8, -1, "F8"},
40835 {25, arm.REG_F9, -1, "F9"},
40836 {26, arm.REG_F10, -1, "F10"},
40837 {27, arm.REG_F11, -1, "F11"},
40838 {28, arm.REG_F12, -1, "F12"},
40839 {29, arm.REG_F13, -1, "F13"},
40840 {30, arm.REG_F14, -1, "F14"},
40841 {31, arm.REG_F15, -1, "F15"},
40842 {32, 0, -1, "SB"},
40843 }
40844 var paramIntRegARM = []int8(nil)
40845 var paramFloatRegARM = []int8(nil)
40846 var gpRegMaskARM = regMask(21503)
40847 var fpRegMaskARM = regMask(4294901760)
40848 var specialRegMaskARM = regMask(0)
40849 var framepointerRegARM = int8(-1)
40850 var linkRegARM = int8(14)
40851 var registersARM64 = [...]Register{
40852 {0, arm64.REG_R0, 0, "R0"},
40853 {1, arm64.REG_R1, 1, "R1"},
40854 {2, arm64.REG_R2, 2, "R2"},
40855 {3, arm64.REG_R3, 3, "R3"},
40856 {4, arm64.REG_R4, 4, "R4"},
40857 {5, arm64.REG_R5, 5, "R5"},
40858 {6, arm64.REG_R6, 6, "R6"},
40859 {7, arm64.REG_R7, 7, "R7"},
40860 {8, arm64.REG_R8, 8, "R8"},
40861 {9, arm64.REG_R9, 9, "R9"},
40862 {10, arm64.REG_R10, 10, "R10"},
40863 {11, arm64.REG_R11, 11, "R11"},
40864 {12, arm64.REG_R12, 12, "R12"},
40865 {13, arm64.REG_R13, 13, "R13"},
40866 {14, arm64.REG_R14, 14, "R14"},
40867 {15, arm64.REG_R15, 15, "R15"},
40868 {16, arm64.REG_R16, 16, "R16"},
40869 {17, arm64.REG_R17, 17, "R17"},
40870 {18, arm64.REG_R18, -1, "R18"},
40871 {19, arm64.REG_R19, 18, "R19"},
40872 {20, arm64.REG_R20, 19, "R20"},
40873 {21, arm64.REG_R21, 20, "R21"},
40874 {22, arm64.REG_R22, 21, "R22"},
40875 {23, arm64.REG_R23, 22, "R23"},
40876 {24, arm64.REG_R24, 23, "R24"},
40877 {25, arm64.REG_R25, 24, "R25"},
40878 {26, arm64.REG_R26, 25, "R26"},
40879 {27, arm64.REGG, -1, "g"},
40880 {28, arm64.REG_R29, -1, "R29"},
40881 {29, arm64.REG_R30, 26, "R30"},
40882 {30, arm64.REGSP, -1, "SP"},
40883 {31, arm64.REG_F0, -1, "F0"},
40884 {32, arm64.REG_F1, -1, "F1"},
40885 {33, arm64.REG_F2, -1, "F2"},
40886 {34, arm64.REG_F3, -1, "F3"},
40887 {35, arm64.REG_F4, -1, "F4"},
40888 {36, arm64.REG_F5, -1, "F5"},
40889 {37, arm64.REG_F6, -1, "F6"},
40890 {38, arm64.REG_F7, -1, "F7"},
40891 {39, arm64.REG_F8, -1, "F8"},
40892 {40, arm64.REG_F9, -1, "F9"},
40893 {41, arm64.REG_F10, -1, "F10"},
40894 {42, arm64.REG_F11, -1, "F11"},
40895 {43, arm64.REG_F12, -1, "F12"},
40896 {44, arm64.REG_F13, -1, "F13"},
40897 {45, arm64.REG_F14, -1, "F14"},
40898 {46, arm64.REG_F15, -1, "F15"},
40899 {47, arm64.REG_F16, -1, "F16"},
40900 {48, arm64.REG_F17, -1, "F17"},
40901 {49, arm64.REG_F18, -1, "F18"},
40902 {50, arm64.REG_F19, -1, "F19"},
40903 {51, arm64.REG_F20, -1, "F20"},
40904 {52, arm64.REG_F21, -1, "F21"},
40905 {53, arm64.REG_F22, -1, "F22"},
40906 {54, arm64.REG_F23, -1, "F23"},
40907 {55, arm64.REG_F24, -1, "F24"},
40908 {56, arm64.REG_F25, -1, "F25"},
40909 {57, arm64.REG_F26, -1, "F26"},
40910 {58, arm64.REG_F27, -1, "F27"},
40911 {59, arm64.REG_F28, -1, "F28"},
40912 {60, arm64.REG_F29, -1, "F29"},
40913 {61, arm64.REG_F30, -1, "F30"},
40914 {62, arm64.REG_F31, -1, "F31"},
40915 {63, 0, -1, "SB"},
40916 }
40917 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
40918 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
40919 var gpRegMaskARM64 = regMask(670826495)
40920 var fpRegMaskARM64 = regMask(9223372034707292160)
40921 var specialRegMaskARM64 = regMask(0)
40922 var framepointerRegARM64 = int8(-1)
40923 var linkRegARM64 = int8(29)
40924 var registersLOONG64 = [...]Register{
40925 {0, loong64.REG_R0, -1, "R0"},
40926 {1, loong64.REG_R1, -1, "R1"},
40927 {2, loong64.REGSP, -1, "SP"},
40928 {3, loong64.REG_R4, 0, "R4"},
40929 {4, loong64.REG_R5, 1, "R5"},
40930 {5, loong64.REG_R6, 2, "R6"},
40931 {6, loong64.REG_R7, 3, "R7"},
40932 {7, loong64.REG_R8, 4, "R8"},
40933 {8, loong64.REG_R9, 5, "R9"},
40934 {9, loong64.REG_R10, 6, "R10"},
40935 {10, loong64.REG_R11, 7, "R11"},
40936 {11, loong64.REG_R12, 8, "R12"},
40937 {12, loong64.REG_R13, 9, "R13"},
40938 {13, loong64.REG_R14, 10, "R14"},
40939 {14, loong64.REG_R15, 11, "R15"},
40940 {15, loong64.REG_R16, 12, "R16"},
40941 {16, loong64.REG_R17, 13, "R17"},
40942 {17, loong64.REG_R18, 14, "R18"},
40943 {18, loong64.REG_R19, 15, "R19"},
40944 {19, loong64.REG_R20, 16, "R20"},
40945 {20, loong64.REG_R21, 17, "R21"},
40946 {21, loong64.REGG, -1, "g"},
40947 {22, loong64.REG_R23, 18, "R23"},
40948 {23, loong64.REG_R24, 19, "R24"},
40949 {24, loong64.REG_R25, 20, "R25"},
40950 {25, loong64.REG_R26, 21, "R26"},
40951 {26, loong64.REG_R27, 22, "R27"},
40952 {27, loong64.REG_R28, 23, "R28"},
40953 {28, loong64.REG_R29, 24, "R29"},
40954 {29, loong64.REG_R31, 25, "R31"},
40955 {30, loong64.REG_F0, -1, "F0"},
40956 {31, loong64.REG_F1, -1, "F1"},
40957 {32, loong64.REG_F2, -1, "F2"},
40958 {33, loong64.REG_F3, -1, "F3"},
40959 {34, loong64.REG_F4, -1, "F4"},
40960 {35, loong64.REG_F5, -1, "F5"},
40961 {36, loong64.REG_F6, -1, "F6"},
40962 {37, loong64.REG_F7, -1, "F7"},
40963 {38, loong64.REG_F8, -1, "F8"},
40964 {39, loong64.REG_F9, -1, "F9"},
40965 {40, loong64.REG_F10, -1, "F10"},
40966 {41, loong64.REG_F11, -1, "F11"},
40967 {42, loong64.REG_F12, -1, "F12"},
40968 {43, loong64.REG_F13, -1, "F13"},
40969 {44, loong64.REG_F14, -1, "F14"},
40970 {45, loong64.REG_F15, -1, "F15"},
40971 {46, loong64.REG_F16, -1, "F16"},
40972 {47, loong64.REG_F17, -1, "F17"},
40973 {48, loong64.REG_F18, -1, "F18"},
40974 {49, loong64.REG_F19, -1, "F19"},
40975 {50, loong64.REG_F20, -1, "F20"},
40976 {51, loong64.REG_F21, -1, "F21"},
40977 {52, loong64.REG_F22, -1, "F22"},
40978 {53, loong64.REG_F23, -1, "F23"},
40979 {54, loong64.REG_F24, -1, "F24"},
40980 {55, loong64.REG_F25, -1, "F25"},
40981 {56, loong64.REG_F26, -1, "F26"},
40982 {57, loong64.REG_F27, -1, "F27"},
40983 {58, loong64.REG_F28, -1, "F28"},
40984 {59, loong64.REG_F29, -1, "F29"},
40985 {60, loong64.REG_F30, -1, "F30"},
40986 {61, loong64.REG_F31, -1, "F31"},
40987 {62, 0, -1, "SB"},
40988 }
40989 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
40990 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
40991 var gpRegMaskLOONG64 = regMask(1071644664)
40992 var fpRegMaskLOONG64 = regMask(4611686017353646080)
40993 var specialRegMaskLOONG64 = regMask(0)
40994 var framepointerRegLOONG64 = int8(-1)
40995 var linkRegLOONG64 = int8(1)
40996 var registersMIPS = [...]Register{
40997 {0, mips.REG_R0, -1, "R0"},
40998 {1, mips.REG_R1, 0, "R1"},
40999 {2, mips.REG_R2, 1, "R2"},
41000 {3, mips.REG_R3, 2, "R3"},
41001 {4, mips.REG_R4, 3, "R4"},
41002 {5, mips.REG_R5, 4, "R5"},
41003 {6, mips.REG_R6, 5, "R6"},
41004 {7, mips.REG_R7, 6, "R7"},
41005 {8, mips.REG_R8, 7, "R8"},
41006 {9, mips.REG_R9, 8, "R9"},
41007 {10, mips.REG_R10, 9, "R10"},
41008 {11, mips.REG_R11, 10, "R11"},
41009 {12, mips.REG_R12, 11, "R12"},
41010 {13, mips.REG_R13, 12, "R13"},
41011 {14, mips.REG_R14, 13, "R14"},
41012 {15, mips.REG_R15, 14, "R15"},
41013 {16, mips.REG_R16, 15, "R16"},
41014 {17, mips.REG_R17, 16, "R17"},
41015 {18, mips.REG_R18, 17, "R18"},
41016 {19, mips.REG_R19, 18, "R19"},
41017 {20, mips.REG_R20, 19, "R20"},
41018 {21, mips.REG_R21, 20, "R21"},
41019 {22, mips.REG_R22, 21, "R22"},
41020 {23, mips.REG_R24, 22, "R24"},
41021 {24, mips.REG_R25, 23, "R25"},
41022 {25, mips.REG_R28, 24, "R28"},
41023 {26, mips.REGSP, -1, "SP"},
41024 {27, mips.REGG, -1, "g"},
41025 {28, mips.REG_R31, 25, "R31"},
41026 {29, mips.REG_F0, -1, "F0"},
41027 {30, mips.REG_F2, -1, "F2"},
41028 {31, mips.REG_F4, -1, "F4"},
41029 {32, mips.REG_F6, -1, "F6"},
41030 {33, mips.REG_F8, -1, "F8"},
41031 {34, mips.REG_F10, -1, "F10"},
41032 {35, mips.REG_F12, -1, "F12"},
41033 {36, mips.REG_F14, -1, "F14"},
41034 {37, mips.REG_F16, -1, "F16"},
41035 {38, mips.REG_F18, -1, "F18"},
41036 {39, mips.REG_F20, -1, "F20"},
41037 {40, mips.REG_F22, -1, "F22"},
41038 {41, mips.REG_F24, -1, "F24"},
41039 {42, mips.REG_F26, -1, "F26"},
41040 {43, mips.REG_F28, -1, "F28"},
41041 {44, mips.REG_F30, -1, "F30"},
41042 {45, mips.REG_HI, -1, "HI"},
41043 {46, mips.REG_LO, -1, "LO"},
41044 {47, 0, -1, "SB"},
41045 }
41046 var paramIntRegMIPS = []int8(nil)
41047 var paramFloatRegMIPS = []int8(nil)
41048 var gpRegMaskMIPS = regMask(335544318)
41049 var fpRegMaskMIPS = regMask(35183835217920)
41050 var specialRegMaskMIPS = regMask(105553116266496)
41051 var framepointerRegMIPS = int8(-1)
41052 var linkRegMIPS = int8(28)
41053 var registersMIPS64 = [...]Register{
41054 {0, mips.REG_R0, -1, "R0"},
41055 {1, mips.REG_R1, 0, "R1"},
41056 {2, mips.REG_R2, 1, "R2"},
41057 {3, mips.REG_R3, 2, "R3"},
41058 {4, mips.REG_R4, 3, "R4"},
41059 {5, mips.REG_R5, 4, "R5"},
41060 {6, mips.REG_R6, 5, "R6"},
41061 {7, mips.REG_R7, 6, "R7"},
41062 {8, mips.REG_R8, 7, "R8"},
41063 {9, mips.REG_R9, 8, "R9"},
41064 {10, mips.REG_R10, 9, "R10"},
41065 {11, mips.REG_R11, 10, "R11"},
41066 {12, mips.REG_R12, 11, "R12"},
41067 {13, mips.REG_R13, 12, "R13"},
41068 {14, mips.REG_R14, 13, "R14"},
41069 {15, mips.REG_R15, 14, "R15"},
41070 {16, mips.REG_R16, 15, "R16"},
41071 {17, mips.REG_R17, 16, "R17"},
41072 {18, mips.REG_R18, 17, "R18"},
41073 {19, mips.REG_R19, 18, "R19"},
41074 {20, mips.REG_R20, 19, "R20"},
41075 {21, mips.REG_R21, 20, "R21"},
41076 {22, mips.REG_R22, 21, "R22"},
41077 {23, mips.REG_R24, 22, "R24"},
41078 {24, mips.REG_R25, 23, "R25"},
41079 {25, mips.REGSP, -1, "SP"},
41080 {26, mips.REGG, -1, "g"},
41081 {27, mips.REG_R31, 24, "R31"},
41082 {28, mips.REG_F0, -1, "F0"},
41083 {29, mips.REG_F1, -1, "F1"},
41084 {30, mips.REG_F2, -1, "F2"},
41085 {31, mips.REG_F3, -1, "F3"},
41086 {32, mips.REG_F4, -1, "F4"},
41087 {33, mips.REG_F5, -1, "F5"},
41088 {34, mips.REG_F6, -1, "F6"},
41089 {35, mips.REG_F7, -1, "F7"},
41090 {36, mips.REG_F8, -1, "F8"},
41091 {37, mips.REG_F9, -1, "F9"},
41092 {38, mips.REG_F10, -1, "F10"},
41093 {39, mips.REG_F11, -1, "F11"},
41094 {40, mips.REG_F12, -1, "F12"},
41095 {41, mips.REG_F13, -1, "F13"},
41096 {42, mips.REG_F14, -1, "F14"},
41097 {43, mips.REG_F15, -1, "F15"},
41098 {44, mips.REG_F16, -1, "F16"},
41099 {45, mips.REG_F17, -1, "F17"},
41100 {46, mips.REG_F18, -1, "F18"},
41101 {47, mips.REG_F19, -1, "F19"},
41102 {48, mips.REG_F20, -1, "F20"},
41103 {49, mips.REG_F21, -1, "F21"},
41104 {50, mips.REG_F22, -1, "F22"},
41105 {51, mips.REG_F23, -1, "F23"},
41106 {52, mips.REG_F24, -1, "F24"},
41107 {53, mips.REG_F25, -1, "F25"},
41108 {54, mips.REG_F26, -1, "F26"},
41109 {55, mips.REG_F27, -1, "F27"},
41110 {56, mips.REG_F28, -1, "F28"},
41111 {57, mips.REG_F29, -1, "F29"},
41112 {58, mips.REG_F30, -1, "F30"},
41113 {59, mips.REG_F31, -1, "F31"},
41114 {60, mips.REG_HI, -1, "HI"},
41115 {61, mips.REG_LO, -1, "LO"},
41116 {62, 0, -1, "SB"},
41117 }
41118 var paramIntRegMIPS64 = []int8(nil)
41119 var paramFloatRegMIPS64 = []int8(nil)
41120 var gpRegMaskMIPS64 = regMask(167772158)
41121 var fpRegMaskMIPS64 = regMask(1152921504338411520)
41122 var specialRegMaskMIPS64 = regMask(3458764513820540928)
41123 var framepointerRegMIPS64 = int8(-1)
41124 var linkRegMIPS64 = int8(27)
41125 var registersPPC64 = [...]Register{
41126 {0, ppc64.REG_R0, -1, "R0"},
41127 {1, ppc64.REGSP, -1, "SP"},
41128 {2, 0, -1, "SB"},
41129 {3, ppc64.REG_R3, 0, "R3"},
41130 {4, ppc64.REG_R4, 1, "R4"},
41131 {5, ppc64.REG_R5, 2, "R5"},
41132 {6, ppc64.REG_R6, 3, "R6"},
41133 {7, ppc64.REG_R7, 4, "R7"},
41134 {8, ppc64.REG_R8, 5, "R8"},
41135 {9, ppc64.REG_R9, 6, "R9"},
41136 {10, ppc64.REG_R10, 7, "R10"},
41137 {11, ppc64.REG_R11, 8, "R11"},
41138 {12, ppc64.REG_R12, 9, "R12"},
41139 {13, ppc64.REG_R13, -1, "R13"},
41140 {14, ppc64.REG_R14, 10, "R14"},
41141 {15, ppc64.REG_R15, 11, "R15"},
41142 {16, ppc64.REG_R16, 12, "R16"},
41143 {17, ppc64.REG_R17, 13, "R17"},
41144 {18, ppc64.REG_R18, 14, "R18"},
41145 {19, ppc64.REG_R19, 15, "R19"},
41146 {20, ppc64.REG_R20, 16, "R20"},
41147 {21, ppc64.REG_R21, 17, "R21"},
41148 {22, ppc64.REG_R22, 18, "R22"},
41149 {23, ppc64.REG_R23, 19, "R23"},
41150 {24, ppc64.REG_R24, 20, "R24"},
41151 {25, ppc64.REG_R25, 21, "R25"},
41152 {26, ppc64.REG_R26, 22, "R26"},
41153 {27, ppc64.REG_R27, 23, "R27"},
41154 {28, ppc64.REG_R28, 24, "R28"},
41155 {29, ppc64.REG_R29, 25, "R29"},
41156 {30, ppc64.REGG, -1, "g"},
41157 {31, ppc64.REG_R31, -1, "R31"},
41158 {32, ppc64.REG_F0, -1, "F0"},
41159 {33, ppc64.REG_F1, -1, "F1"},
41160 {34, ppc64.REG_F2, -1, "F2"},
41161 {35, ppc64.REG_F3, -1, "F3"},
41162 {36, ppc64.REG_F4, -1, "F4"},
41163 {37, ppc64.REG_F5, -1, "F5"},
41164 {38, ppc64.REG_F6, -1, "F6"},
41165 {39, ppc64.REG_F7, -1, "F7"},
41166 {40, ppc64.REG_F8, -1, "F8"},
41167 {41, ppc64.REG_F9, -1, "F9"},
41168 {42, ppc64.REG_F10, -1, "F10"},
41169 {43, ppc64.REG_F11, -1, "F11"},
41170 {44, ppc64.REG_F12, -1, "F12"},
41171 {45, ppc64.REG_F13, -1, "F13"},
41172 {46, ppc64.REG_F14, -1, "F14"},
41173 {47, ppc64.REG_F15, -1, "F15"},
41174 {48, ppc64.REG_F16, -1, "F16"},
41175 {49, ppc64.REG_F17, -1, "F17"},
41176 {50, ppc64.REG_F18, -1, "F18"},
41177 {51, ppc64.REG_F19, -1, "F19"},
41178 {52, ppc64.REG_F20, -1, "F20"},
41179 {53, ppc64.REG_F21, -1, "F21"},
41180 {54, ppc64.REG_F22, -1, "F22"},
41181 {55, ppc64.REG_F23, -1, "F23"},
41182 {56, ppc64.REG_F24, -1, "F24"},
41183 {57, ppc64.REG_F25, -1, "F25"},
41184 {58, ppc64.REG_F26, -1, "F26"},
41185 {59, ppc64.REG_F27, -1, "F27"},
41186 {60, ppc64.REG_F28, -1, "F28"},
41187 {61, ppc64.REG_F29, -1, "F29"},
41188 {62, ppc64.REG_F30, -1, "F30"},
41189 {63, ppc64.REG_XER, -1, "XER"},
41190 }
41191 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
41192 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
41193 var gpRegMaskPPC64 = regMask(1073733624)
41194 var fpRegMaskPPC64 = regMask(9223372032559808512)
41195 var specialRegMaskPPC64 = regMask(9223372036854775808)
41196 var framepointerRegPPC64 = int8(-1)
41197 var linkRegPPC64 = int8(-1)
41198 var registersRISCV64 = [...]Register{
41199 {0, riscv.REG_X0, -1, "X0"},
41200 {1, riscv.REGSP, -1, "SP"},
41201 {2, riscv.REG_X3, -1, "X3"},
41202 {3, riscv.REG_X4, -1, "X4"},
41203 {4, riscv.REG_X5, 0, "X5"},
41204 {5, riscv.REG_X6, 1, "X6"},
41205 {6, riscv.REG_X7, 2, "X7"},
41206 {7, riscv.REG_X8, 3, "X8"},
41207 {8, riscv.REG_X9, 4, "X9"},
41208 {9, riscv.REG_X10, 5, "X10"},
41209 {10, riscv.REG_X11, 6, "X11"},
41210 {11, riscv.REG_X12, 7, "X12"},
41211 {12, riscv.REG_X13, 8, "X13"},
41212 {13, riscv.REG_X14, 9, "X14"},
41213 {14, riscv.REG_X15, 10, "X15"},
41214 {15, riscv.REG_X16, 11, "X16"},
41215 {16, riscv.REG_X17, 12, "X17"},
41216 {17, riscv.REG_X18, 13, "X18"},
41217 {18, riscv.REG_X19, 14, "X19"},
41218 {19, riscv.REG_X20, 15, "X20"},
41219 {20, riscv.REG_X21, 16, "X21"},
41220 {21, riscv.REG_X22, 17, "X22"},
41221 {22, riscv.REG_X23, 18, "X23"},
41222 {23, riscv.REG_X24, 19, "X24"},
41223 {24, riscv.REG_X25, 20, "X25"},
41224 {25, riscv.REG_X26, 21, "X26"},
41225 {26, riscv.REGG, -1, "g"},
41226 {27, riscv.REG_X28, 22, "X28"},
41227 {28, riscv.REG_X29, 23, "X29"},
41228 {29, riscv.REG_X30, 24, "X30"},
41229 {30, riscv.REG_X31, -1, "X31"},
41230 {31, riscv.REG_F0, -1, "F0"},
41231 {32, riscv.REG_F1, -1, "F1"},
41232 {33, riscv.REG_F2, -1, "F2"},
41233 {34, riscv.REG_F3, -1, "F3"},
41234 {35, riscv.REG_F4, -1, "F4"},
41235 {36, riscv.REG_F5, -1, "F5"},
41236 {37, riscv.REG_F6, -1, "F6"},
41237 {38, riscv.REG_F7, -1, "F7"},
41238 {39, riscv.REG_F8, -1, "F8"},
41239 {40, riscv.REG_F9, -1, "F9"},
41240 {41, riscv.REG_F10, -1, "F10"},
41241 {42, riscv.REG_F11, -1, "F11"},
41242 {43, riscv.REG_F12, -1, "F12"},
41243 {44, riscv.REG_F13, -1, "F13"},
41244 {45, riscv.REG_F14, -1, "F14"},
41245 {46, riscv.REG_F15, -1, "F15"},
41246 {47, riscv.REG_F16, -1, "F16"},
41247 {48, riscv.REG_F17, -1, "F17"},
41248 {49, riscv.REG_F18, -1, "F18"},
41249 {50, riscv.REG_F19, -1, "F19"},
41250 {51, riscv.REG_F20, -1, "F20"},
41251 {52, riscv.REG_F21, -1, "F21"},
41252 {53, riscv.REG_F22, -1, "F22"},
41253 {54, riscv.REG_F23, -1, "F23"},
41254 {55, riscv.REG_F24, -1, "F24"},
41255 {56, riscv.REG_F25, -1, "F25"},
41256 {57, riscv.REG_F26, -1, "F26"},
41257 {58, riscv.REG_F27, -1, "F27"},
41258 {59, riscv.REG_F28, -1, "F28"},
41259 {60, riscv.REG_F29, -1, "F29"},
41260 {61, riscv.REG_F30, -1, "F30"},
41261 {62, riscv.REG_F31, -1, "F31"},
41262 {63, 0, -1, "SB"},
41263 }
41264 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
41265 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
41266 var gpRegMaskRISCV64 = regMask(1006632944)
41267 var fpRegMaskRISCV64 = regMask(9223372034707292160)
41268 var specialRegMaskRISCV64 = regMask(0)
41269 var framepointerRegRISCV64 = int8(-1)
41270 var linkRegRISCV64 = int8(0)
41271 var registersS390X = [...]Register{
41272 {0, s390x.REG_R0, 0, "R0"},
41273 {1, s390x.REG_R1, 1, "R1"},
41274 {2, s390x.REG_R2, 2, "R2"},
41275 {3, s390x.REG_R3, 3, "R3"},
41276 {4, s390x.REG_R4, 4, "R4"},
41277 {5, s390x.REG_R5, 5, "R5"},
41278 {6, s390x.REG_R6, 6, "R6"},
41279 {7, s390x.REG_R7, 7, "R7"},
41280 {8, s390x.REG_R8, 8, "R8"},
41281 {9, s390x.REG_R9, 9, "R9"},
41282 {10, s390x.REG_R10, -1, "R10"},
41283 {11, s390x.REG_R11, 10, "R11"},
41284 {12, s390x.REG_R12, 11, "R12"},
41285 {13, s390x.REGG, -1, "g"},
41286 {14, s390x.REG_R14, 12, "R14"},
41287 {15, s390x.REGSP, -1, "SP"},
41288 {16, s390x.REG_F0, -1, "F0"},
41289 {17, s390x.REG_F1, -1, "F1"},
41290 {18, s390x.REG_F2, -1, "F2"},
41291 {19, s390x.REG_F3, -1, "F3"},
41292 {20, s390x.REG_F4, -1, "F4"},
41293 {21, s390x.REG_F5, -1, "F5"},
41294 {22, s390x.REG_F6, -1, "F6"},
41295 {23, s390x.REG_F7, -1, "F7"},
41296 {24, s390x.REG_F8, -1, "F8"},
41297 {25, s390x.REG_F9, -1, "F9"},
41298 {26, s390x.REG_F10, -1, "F10"},
41299 {27, s390x.REG_F11, -1, "F11"},
41300 {28, s390x.REG_F12, -1, "F12"},
41301 {29, s390x.REG_F13, -1, "F13"},
41302 {30, s390x.REG_F14, -1, "F14"},
41303 {31, s390x.REG_F15, -1, "F15"},
41304 {32, 0, -1, "SB"},
41305 }
41306 var paramIntRegS390X = []int8(nil)
41307 var paramFloatRegS390X = []int8(nil)
41308 var gpRegMaskS390X = regMask(23551)
41309 var fpRegMaskS390X = regMask(4294901760)
41310 var specialRegMaskS390X = regMask(0)
41311 var framepointerRegS390X = int8(-1)
41312 var linkRegS390X = int8(14)
41313 var registersWasm = [...]Register{
41314 {0, wasm.REG_R0, 0, "R0"},
41315 {1, wasm.REG_R1, 1, "R1"},
41316 {2, wasm.REG_R2, 2, "R2"},
41317 {3, wasm.REG_R3, 3, "R3"},
41318 {4, wasm.REG_R4, 4, "R4"},
41319 {5, wasm.REG_R5, 5, "R5"},
41320 {6, wasm.REG_R6, 6, "R6"},
41321 {7, wasm.REG_R7, 7, "R7"},
41322 {8, wasm.REG_R8, 8, "R8"},
41323 {9, wasm.REG_R9, 9, "R9"},
41324 {10, wasm.REG_R10, 10, "R10"},
41325 {11, wasm.REG_R11, 11, "R11"},
41326 {12, wasm.REG_R12, 12, "R12"},
41327 {13, wasm.REG_R13, 13, "R13"},
41328 {14, wasm.REG_R14, 14, "R14"},
41329 {15, wasm.REG_R15, 15, "R15"},
41330 {16, wasm.REG_F0, -1, "F0"},
41331 {17, wasm.REG_F1, -1, "F1"},
41332 {18, wasm.REG_F2, -1, "F2"},
41333 {19, wasm.REG_F3, -1, "F3"},
41334 {20, wasm.REG_F4, -1, "F4"},
41335 {21, wasm.REG_F5, -1, "F5"},
41336 {22, wasm.REG_F6, -1, "F6"},
41337 {23, wasm.REG_F7, -1, "F7"},
41338 {24, wasm.REG_F8, -1, "F8"},
41339 {25, wasm.REG_F9, -1, "F9"},
41340 {26, wasm.REG_F10, -1, "F10"},
41341 {27, wasm.REG_F11, -1, "F11"},
41342 {28, wasm.REG_F12, -1, "F12"},
41343 {29, wasm.REG_F13, -1, "F13"},
41344 {30, wasm.REG_F14, -1, "F14"},
41345 {31, wasm.REG_F15, -1, "F15"},
41346 {32, wasm.REG_F16, -1, "F16"},
41347 {33, wasm.REG_F17, -1, "F17"},
41348 {34, wasm.REG_F18, -1, "F18"},
41349 {35, wasm.REG_F19, -1, "F19"},
41350 {36, wasm.REG_F20, -1, "F20"},
41351 {37, wasm.REG_F21, -1, "F21"},
41352 {38, wasm.REG_F22, -1, "F22"},
41353 {39, wasm.REG_F23, -1, "F23"},
41354 {40, wasm.REG_F24, -1, "F24"},
41355 {41, wasm.REG_F25, -1, "F25"},
41356 {42, wasm.REG_F26, -1, "F26"},
41357 {43, wasm.REG_F27, -1, "F27"},
41358 {44, wasm.REG_F28, -1, "F28"},
41359 {45, wasm.REG_F29, -1, "F29"},
41360 {46, wasm.REG_F30, -1, "F30"},
41361 {47, wasm.REG_F31, -1, "F31"},
41362 {48, wasm.REGSP, -1, "SP"},
41363 {49, wasm.REGG, -1, "g"},
41364 {50, 0, -1, "SB"},
41365 }
41366 var paramIntRegWasm = []int8(nil)
41367 var paramFloatRegWasm = []int8(nil)
41368 var gpRegMaskWasm = regMask(65535)
41369 var fpRegMaskWasm = regMask(281474976645120)
41370 var fp32RegMaskWasm = regMask(4294901760)
41371 var fp64RegMaskWasm = regMask(281470681743360)
41372 var specialRegMaskWasm = regMask(0)
41373 var framepointerRegWasm = int8(-1)
41374 var linkRegWasm = int8(-1)
41375
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