Source file src/cmd/compile/internal/ssa/rewrite/arm64/rewriteARM64.go

     1  // Code generated from _gen/ARM64.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package arm64
     4  
     5  import "cmd/compile/internal/types"
     6  import "cmd/compile/internal/ssa/block"
     7  import "cmd/compile/internal/ssa/ssaop"
     8  import "cmd/compile/internal/ssa"
     9  
    10  func RewriteValue(v *ssa.Value) bool {
    11  	switch v.Op {
    12  	case ssaop.OpARM64ADCSflags:
    13  		return rewriteValue_OpARM64ADCSflags(v)
    14  	case ssaop.OpARM64ADD:
    15  		return rewriteValue_OpARM64ADD(v)
    16  	case ssaop.OpARM64ADDSflags:
    17  		return rewriteValue_OpARM64ADDSflags(v)
    18  	case ssaop.OpARM64ADDconst:
    19  		return rewriteValue_OpARM64ADDconst(v)
    20  	case ssaop.OpARM64ADDshiftLL:
    21  		return rewriteValue_OpARM64ADDshiftLL(v)
    22  	case ssaop.OpARM64ADDshiftRA:
    23  		return rewriteValue_OpARM64ADDshiftRA(v)
    24  	case ssaop.OpARM64ADDshiftRL:
    25  		return rewriteValue_OpARM64ADDshiftRL(v)
    26  	case ssaop.OpARM64AND:
    27  		return rewriteValue_OpARM64AND(v)
    28  	case ssaop.OpARM64ANDconst:
    29  		return rewriteValue_OpARM64ANDconst(v)
    30  	case ssaop.OpARM64ANDshiftLL:
    31  		return rewriteValue_OpARM64ANDshiftLL(v)
    32  	case ssaop.OpARM64ANDshiftRA:
    33  		return rewriteValue_OpARM64ANDshiftRA(v)
    34  	case ssaop.OpARM64ANDshiftRL:
    35  		return rewriteValue_OpARM64ANDshiftRL(v)
    36  	case ssaop.OpARM64ANDshiftRO:
    37  		return rewriteValue_OpARM64ANDshiftRO(v)
    38  	case ssaop.OpARM64BIC:
    39  		return rewriteValue_OpARM64BIC(v)
    40  	case ssaop.OpARM64BICshiftLL:
    41  		return rewriteValue_OpARM64BICshiftLL(v)
    42  	case ssaop.OpARM64BICshiftRA:
    43  		return rewriteValue_OpARM64BICshiftRA(v)
    44  	case ssaop.OpARM64BICshiftRL:
    45  		return rewriteValue_OpARM64BICshiftRL(v)
    46  	case ssaop.OpARM64BICshiftRO:
    47  		return rewriteValue_OpARM64BICshiftRO(v)
    48  	case ssaop.OpARM64CMN:
    49  		return rewriteValue_OpARM64CMN(v)
    50  	case ssaop.OpARM64CMNW:
    51  		return rewriteValue_OpARM64CMNW(v)
    52  	case ssaop.OpARM64CMNWconst:
    53  		return rewriteValue_OpARM64CMNWconst(v)
    54  	case ssaop.OpARM64CMNconst:
    55  		return rewriteValue_OpARM64CMNconst(v)
    56  	case ssaop.OpARM64CMNshiftLL:
    57  		return rewriteValue_OpARM64CMNshiftLL(v)
    58  	case ssaop.OpARM64CMNshiftRA:
    59  		return rewriteValue_OpARM64CMNshiftRA(v)
    60  	case ssaop.OpARM64CMNshiftRL:
    61  		return rewriteValue_OpARM64CMNshiftRL(v)
    62  	case ssaop.OpARM64CMP:
    63  		return rewriteValue_OpARM64CMP(v)
    64  	case ssaop.OpARM64CMPW:
    65  		return rewriteValue_OpARM64CMPW(v)
    66  	case ssaop.OpARM64CMPWconst:
    67  		return rewriteValue_OpARM64CMPWconst(v)
    68  	case ssaop.OpARM64CMPconst:
    69  		return rewriteValue_OpARM64CMPconst(v)
    70  	case ssaop.OpARM64CMPshiftLL:
    71  		return rewriteValue_OpARM64CMPshiftLL(v)
    72  	case ssaop.OpARM64CMPshiftRA:
    73  		return rewriteValue_OpARM64CMPshiftRA(v)
    74  	case ssaop.OpARM64CMPshiftRL:
    75  		return rewriteValue_OpARM64CMPshiftRL(v)
    76  	case ssaop.OpARM64CSEL:
    77  		return rewriteValue_OpARM64CSEL(v)
    78  	case ssaop.OpARM64CSEL0:
    79  		return rewriteValue_OpARM64CSEL0(v)
    80  	case ssaop.OpARM64CSETM:
    81  		return rewriteValue_OpARM64CSETM(v)
    82  	case ssaop.OpARM64CSINC:
    83  		return rewriteValue_OpARM64CSINC(v)
    84  	case ssaop.OpARM64CSINV:
    85  		return rewriteValue_OpARM64CSINV(v)
    86  	case ssaop.OpARM64CSNEG:
    87  		return rewriteValue_OpARM64CSNEG(v)
    88  	case ssaop.OpARM64DIV:
    89  		return rewriteValue_OpARM64DIV(v)
    90  	case ssaop.OpARM64DIVW:
    91  		return rewriteValue_OpARM64DIVW(v)
    92  	case ssaop.OpARM64EON:
    93  		return rewriteValue_OpARM64EON(v)
    94  	case ssaop.OpARM64EONshiftLL:
    95  		return rewriteValue_OpARM64EONshiftLL(v)
    96  	case ssaop.OpARM64EONshiftRA:
    97  		return rewriteValue_OpARM64EONshiftRA(v)
    98  	case ssaop.OpARM64EONshiftRL:
    99  		return rewriteValue_OpARM64EONshiftRL(v)
   100  	case ssaop.OpARM64EONshiftRO:
   101  		return rewriteValue_OpARM64EONshiftRO(v)
   102  	case ssaop.OpARM64Equal:
   103  		return rewriteValue_OpARM64Equal(v)
   104  	case ssaop.OpARM64FADDD:
   105  		return rewriteValue_OpARM64FADDD(v)
   106  	case ssaop.OpARM64FADDS:
   107  		return rewriteValue_OpARM64FADDS(v)
   108  	case ssaop.OpARM64FCMPD:
   109  		return rewriteValue_OpARM64FCMPD(v)
   110  	case ssaop.OpARM64FCMPS:
   111  		return rewriteValue_OpARM64FCMPS(v)
   112  	case ssaop.OpARM64FCSELD:
   113  		return rewriteValue_OpARM64FCSELD(v)
   114  	case ssaop.OpARM64FCSELS:
   115  		return rewriteValue_OpARM64FCSELS(v)
   116  	case ssaop.OpARM64FCVTDS:
   117  		return rewriteValue_OpARM64FCVTDS(v)
   118  	case ssaop.OpARM64FLDPQ:
   119  		return rewriteValue_OpARM64FLDPQ(v)
   120  	case ssaop.OpARM64FMOVDfpgp:
   121  		return rewriteValue_OpARM64FMOVDfpgp(v)
   122  	case ssaop.OpARM64FMOVDgpfp:
   123  		return rewriteValue_OpARM64FMOVDgpfp(v)
   124  	case ssaop.OpARM64FMOVDload:
   125  		return rewriteValue_OpARM64FMOVDload(v)
   126  	case ssaop.OpARM64FMOVDloadidx:
   127  		return rewriteValue_OpARM64FMOVDloadidx(v)
   128  	case ssaop.OpARM64FMOVDloadidx8:
   129  		return rewriteValue_OpARM64FMOVDloadidx8(v)
   130  	case ssaop.OpARM64FMOVDstore:
   131  		return rewriteValue_OpARM64FMOVDstore(v)
   132  	case ssaop.OpARM64FMOVDstoreidx:
   133  		return rewriteValue_OpARM64FMOVDstoreidx(v)
   134  	case ssaop.OpARM64FMOVDstoreidx8:
   135  		return rewriteValue_OpARM64FMOVDstoreidx8(v)
   136  	case ssaop.OpARM64FMOVQload:
   137  		return rewriteValue_OpARM64FMOVQload(v)
   138  	case ssaop.OpARM64FMOVQstore:
   139  		return rewriteValue_OpARM64FMOVQstore(v)
   140  	case ssaop.OpARM64FMOVSload:
   141  		return rewriteValue_OpARM64FMOVSload(v)
   142  	case ssaop.OpARM64FMOVSloadidx:
   143  		return rewriteValue_OpARM64FMOVSloadidx(v)
   144  	case ssaop.OpARM64FMOVSloadidx4:
   145  		return rewriteValue_OpARM64FMOVSloadidx4(v)
   146  	case ssaop.OpARM64FMOVSstore:
   147  		return rewriteValue_OpARM64FMOVSstore(v)
   148  	case ssaop.OpARM64FMOVSstoreidx:
   149  		return rewriteValue_OpARM64FMOVSstoreidx(v)
   150  	case ssaop.OpARM64FMOVSstoreidx4:
   151  		return rewriteValue_OpARM64FMOVSstoreidx4(v)
   152  	case ssaop.OpARM64FMULD:
   153  		return rewriteValue_OpARM64FMULD(v)
   154  	case ssaop.OpARM64FMULS:
   155  		return rewriteValue_OpARM64FMULS(v)
   156  	case ssaop.OpARM64FNEGD:
   157  		return rewriteValue_OpARM64FNEGD(v)
   158  	case ssaop.OpARM64FNEGS:
   159  		return rewriteValue_OpARM64FNEGS(v)
   160  	case ssaop.OpARM64FNMULD:
   161  		return rewriteValue_OpARM64FNMULD(v)
   162  	case ssaop.OpARM64FNMULS:
   163  		return rewriteValue_OpARM64FNMULS(v)
   164  	case ssaop.OpARM64FSTPQ:
   165  		return rewriteValue_OpARM64FSTPQ(v)
   166  	case ssaop.OpARM64FSUBD:
   167  		return rewriteValue_OpARM64FSUBD(v)
   168  	case ssaop.OpARM64FSUBS:
   169  		return rewriteValue_OpARM64FSUBS(v)
   170  	case ssaop.OpARM64GreaterEqual:
   171  		return rewriteValue_OpARM64GreaterEqual(v)
   172  	case ssaop.OpARM64GreaterEqualF:
   173  		return rewriteValue_OpARM64GreaterEqualF(v)
   174  	case ssaop.OpARM64GreaterEqualNoov:
   175  		return rewriteValue_OpARM64GreaterEqualNoov(v)
   176  	case ssaop.OpARM64GreaterEqualU:
   177  		return rewriteValue_OpARM64GreaterEqualU(v)
   178  	case ssaop.OpARM64GreaterThan:
   179  		return rewriteValue_OpARM64GreaterThan(v)
   180  	case ssaop.OpARM64GreaterThanF:
   181  		return rewriteValue_OpARM64GreaterThanF(v)
   182  	case ssaop.OpARM64GreaterThanU:
   183  		return rewriteValue_OpARM64GreaterThanU(v)
   184  	case ssaop.OpARM64LDP:
   185  		return rewriteValue_OpARM64LDP(v)
   186  	case ssaop.OpARM64LessEqual:
   187  		return rewriteValue_OpARM64LessEqual(v)
   188  	case ssaop.OpARM64LessEqualF:
   189  		return rewriteValue_OpARM64LessEqualF(v)
   190  	case ssaop.OpARM64LessEqualU:
   191  		return rewriteValue_OpARM64LessEqualU(v)
   192  	case ssaop.OpARM64LessThan:
   193  		return rewriteValue_OpARM64LessThan(v)
   194  	case ssaop.OpARM64LessThanF:
   195  		return rewriteValue_OpARM64LessThanF(v)
   196  	case ssaop.OpARM64LessThanNoov:
   197  		return rewriteValue_OpARM64LessThanNoov(v)
   198  	case ssaop.OpARM64LessThanU:
   199  		return rewriteValue_OpARM64LessThanU(v)
   200  	case ssaop.OpARM64LoweredPanicBoundsCR:
   201  		return rewriteValue_OpARM64LoweredPanicBoundsCR(v)
   202  	case ssaop.OpARM64LoweredPanicBoundsRC:
   203  		return rewriteValue_OpARM64LoweredPanicBoundsRC(v)
   204  	case ssaop.OpARM64LoweredPanicBoundsRR:
   205  		return rewriteValue_OpARM64LoweredPanicBoundsRR(v)
   206  	case ssaop.OpARM64MADD:
   207  		return rewriteValue_OpARM64MADD(v)
   208  	case ssaop.OpARM64MADDW:
   209  		return rewriteValue_OpARM64MADDW(v)
   210  	case ssaop.OpARM64MNEG:
   211  		return rewriteValue_OpARM64MNEG(v)
   212  	case ssaop.OpARM64MNEGW:
   213  		return rewriteValue_OpARM64MNEGW(v)
   214  	case ssaop.OpARM64MOD:
   215  		return rewriteValue_OpARM64MOD(v)
   216  	case ssaop.OpARM64MODW:
   217  		return rewriteValue_OpARM64MODW(v)
   218  	case ssaop.OpARM64MOVBUload:
   219  		return rewriteValue_OpARM64MOVBUload(v)
   220  	case ssaop.OpARM64MOVBUloadidx:
   221  		return rewriteValue_OpARM64MOVBUloadidx(v)
   222  	case ssaop.OpARM64MOVBUreg:
   223  		return rewriteValue_OpARM64MOVBUreg(v)
   224  	case ssaop.OpARM64MOVBload:
   225  		return rewriteValue_OpARM64MOVBload(v)
   226  	case ssaop.OpARM64MOVBloadidx:
   227  		return rewriteValue_OpARM64MOVBloadidx(v)
   228  	case ssaop.OpARM64MOVBreg:
   229  		return rewriteValue_OpARM64MOVBreg(v)
   230  	case ssaop.OpARM64MOVBstore:
   231  		return rewriteValue_OpARM64MOVBstore(v)
   232  	case ssaop.OpARM64MOVBstoreidx:
   233  		return rewriteValue_OpARM64MOVBstoreidx(v)
   234  	case ssaop.OpARM64MOVDload:
   235  		return rewriteValue_OpARM64MOVDload(v)
   236  	case ssaop.OpARM64MOVDloadidx:
   237  		return rewriteValue_OpARM64MOVDloadidx(v)
   238  	case ssaop.OpARM64MOVDloadidx8:
   239  		return rewriteValue_OpARM64MOVDloadidx8(v)
   240  	case ssaop.OpARM64MOVDnop:
   241  		return rewriteValue_OpARM64MOVDnop(v)
   242  	case ssaop.OpARM64MOVDreg:
   243  		return rewriteValue_OpARM64MOVDreg(v)
   244  	case ssaop.OpARM64MOVDstore:
   245  		return rewriteValue_OpARM64MOVDstore(v)
   246  	case ssaop.OpARM64MOVDstoreidx:
   247  		return rewriteValue_OpARM64MOVDstoreidx(v)
   248  	case ssaop.OpARM64MOVDstoreidx8:
   249  		return rewriteValue_OpARM64MOVDstoreidx8(v)
   250  	case ssaop.OpARM64MOVHUload:
   251  		return rewriteValue_OpARM64MOVHUload(v)
   252  	case ssaop.OpARM64MOVHUloadidx:
   253  		return rewriteValue_OpARM64MOVHUloadidx(v)
   254  	case ssaop.OpARM64MOVHUloadidx2:
   255  		return rewriteValue_OpARM64MOVHUloadidx2(v)
   256  	case ssaop.OpARM64MOVHUreg:
   257  		return rewriteValue_OpARM64MOVHUreg(v)
   258  	case ssaop.OpARM64MOVHload:
   259  		return rewriteValue_OpARM64MOVHload(v)
   260  	case ssaop.OpARM64MOVHloadidx:
   261  		return rewriteValue_OpARM64MOVHloadidx(v)
   262  	case ssaop.OpARM64MOVHloadidx2:
   263  		return rewriteValue_OpARM64MOVHloadidx2(v)
   264  	case ssaop.OpARM64MOVHreg:
   265  		return rewriteValue_OpARM64MOVHreg(v)
   266  	case ssaop.OpARM64MOVHstore:
   267  		return rewriteValue_OpARM64MOVHstore(v)
   268  	case ssaop.OpARM64MOVHstoreidx:
   269  		return rewriteValue_OpARM64MOVHstoreidx(v)
   270  	case ssaop.OpARM64MOVHstoreidx2:
   271  		return rewriteValue_OpARM64MOVHstoreidx2(v)
   272  	case ssaop.OpARM64MOVWUload:
   273  		return rewriteValue_OpARM64MOVWUload(v)
   274  	case ssaop.OpARM64MOVWUloadidx:
   275  		return rewriteValue_OpARM64MOVWUloadidx(v)
   276  	case ssaop.OpARM64MOVWUloadidx4:
   277  		return rewriteValue_OpARM64MOVWUloadidx4(v)
   278  	case ssaop.OpARM64MOVWUreg:
   279  		return rewriteValue_OpARM64MOVWUreg(v)
   280  	case ssaop.OpARM64MOVWload:
   281  		return rewriteValue_OpARM64MOVWload(v)
   282  	case ssaop.OpARM64MOVWloadidx:
   283  		return rewriteValue_OpARM64MOVWloadidx(v)
   284  	case ssaop.OpARM64MOVWloadidx4:
   285  		return rewriteValue_OpARM64MOVWloadidx4(v)
   286  	case ssaop.OpARM64MOVWreg:
   287  		return rewriteValue_OpARM64MOVWreg(v)
   288  	case ssaop.OpARM64MOVWstore:
   289  		return rewriteValue_OpARM64MOVWstore(v)
   290  	case ssaop.OpARM64MOVWstoreidx:
   291  		return rewriteValue_OpARM64MOVWstoreidx(v)
   292  	case ssaop.OpARM64MOVWstoreidx4:
   293  		return rewriteValue_OpARM64MOVWstoreidx4(v)
   294  	case ssaop.OpARM64MSUB:
   295  		return rewriteValue_OpARM64MSUB(v)
   296  	case ssaop.OpARM64MSUBW:
   297  		return rewriteValue_OpARM64MSUBW(v)
   298  	case ssaop.OpARM64MUL:
   299  		return rewriteValue_OpARM64MUL(v)
   300  	case ssaop.OpARM64MULW:
   301  		return rewriteValue_OpARM64MULW(v)
   302  	case ssaop.OpARM64MVN:
   303  		return rewriteValue_OpARM64MVN(v)
   304  	case ssaop.OpARM64MVNshiftLL:
   305  		return rewriteValue_OpARM64MVNshiftLL(v)
   306  	case ssaop.OpARM64MVNshiftRA:
   307  		return rewriteValue_OpARM64MVNshiftRA(v)
   308  	case ssaop.OpARM64MVNshiftRL:
   309  		return rewriteValue_OpARM64MVNshiftRL(v)
   310  	case ssaop.OpARM64MVNshiftRO:
   311  		return rewriteValue_OpARM64MVNshiftRO(v)
   312  	case ssaop.OpARM64NEG:
   313  		return rewriteValue_OpARM64NEG(v)
   314  	case ssaop.OpARM64NEGshiftLL:
   315  		return rewriteValue_OpARM64NEGshiftLL(v)
   316  	case ssaop.OpARM64NEGshiftRA:
   317  		return rewriteValue_OpARM64NEGshiftRA(v)
   318  	case ssaop.OpARM64NEGshiftRL:
   319  		return rewriteValue_OpARM64NEGshiftRL(v)
   320  	case ssaop.OpARM64NotEqual:
   321  		return rewriteValue_OpARM64NotEqual(v)
   322  	case ssaop.OpARM64OR:
   323  		return rewriteValue_OpARM64OR(v)
   324  	case ssaop.OpARM64ORN:
   325  		return rewriteValue_OpARM64ORN(v)
   326  	case ssaop.OpARM64ORNshiftLL:
   327  		return rewriteValue_OpARM64ORNshiftLL(v)
   328  	case ssaop.OpARM64ORNshiftRA:
   329  		return rewriteValue_OpARM64ORNshiftRA(v)
   330  	case ssaop.OpARM64ORNshiftRL:
   331  		return rewriteValue_OpARM64ORNshiftRL(v)
   332  	case ssaop.OpARM64ORNshiftRO:
   333  		return rewriteValue_OpARM64ORNshiftRO(v)
   334  	case ssaop.OpARM64ORconst:
   335  		return rewriteValue_OpARM64ORconst(v)
   336  	case ssaop.OpARM64ORshiftLL:
   337  		return rewriteValue_OpARM64ORshiftLL(v)
   338  	case ssaop.OpARM64ORshiftRA:
   339  		return rewriteValue_OpARM64ORshiftRA(v)
   340  	case ssaop.OpARM64ORshiftRL:
   341  		return rewriteValue_OpARM64ORshiftRL(v)
   342  	case ssaop.OpARM64ORshiftRO:
   343  		return rewriteValue_OpARM64ORshiftRO(v)
   344  	case ssaop.OpARM64REV:
   345  		return rewriteValue_OpARM64REV(v)
   346  	case ssaop.OpARM64REV16:
   347  		return rewriteValue_OpARM64REV16(v)
   348  	case ssaop.OpARM64REVW:
   349  		return rewriteValue_OpARM64REVW(v)
   350  	case ssaop.OpARM64ROR:
   351  		return rewriteValue_OpARM64ROR(v)
   352  	case ssaop.OpARM64RORW:
   353  		return rewriteValue_OpARM64RORW(v)
   354  	case ssaop.OpARM64SBCSflags:
   355  		return rewriteValue_OpARM64SBCSflags(v)
   356  	case ssaop.OpARM64SBFX:
   357  		return rewriteValue_OpARM64SBFX(v)
   358  	case ssaop.OpARM64SLL:
   359  		return rewriteValue_OpARM64SLL(v)
   360  	case ssaop.OpARM64SLLconst:
   361  		return rewriteValue_OpARM64SLLconst(v)
   362  	case ssaop.OpARM64SRA:
   363  		return rewriteValue_OpARM64SRA(v)
   364  	case ssaop.OpARM64SRAconst:
   365  		return rewriteValue_OpARM64SRAconst(v)
   366  	case ssaop.OpARM64SRL:
   367  		return rewriteValue_OpARM64SRL(v)
   368  	case ssaop.OpARM64SRLconst:
   369  		return rewriteValue_OpARM64SRLconst(v)
   370  	case ssaop.OpARM64STP:
   371  		return rewriteValue_OpARM64STP(v)
   372  	case ssaop.OpARM64SUB:
   373  		return rewriteValue_OpARM64SUB(v)
   374  	case ssaop.OpARM64SUBconst:
   375  		return rewriteValue_OpARM64SUBconst(v)
   376  	case ssaop.OpARM64SUBshiftLL:
   377  		return rewriteValue_OpARM64SUBshiftLL(v)
   378  	case ssaop.OpARM64SUBshiftRA:
   379  		return rewriteValue_OpARM64SUBshiftRA(v)
   380  	case ssaop.OpARM64SUBshiftRL:
   381  		return rewriteValue_OpARM64SUBshiftRL(v)
   382  	case ssaop.OpARM64TST:
   383  		return rewriteValue_OpARM64TST(v)
   384  	case ssaop.OpARM64TSTW:
   385  		return rewriteValue_OpARM64TSTW(v)
   386  	case ssaop.OpARM64TSTWconst:
   387  		return rewriteValue_OpARM64TSTWconst(v)
   388  	case ssaop.OpARM64TSTconst:
   389  		return rewriteValue_OpARM64TSTconst(v)
   390  	case ssaop.OpARM64TSTshiftLL:
   391  		return rewriteValue_OpARM64TSTshiftLL(v)
   392  	case ssaop.OpARM64TSTshiftRA:
   393  		return rewriteValue_OpARM64TSTshiftRA(v)
   394  	case ssaop.OpARM64TSTshiftRL:
   395  		return rewriteValue_OpARM64TSTshiftRL(v)
   396  	case ssaop.OpARM64TSTshiftRO:
   397  		return rewriteValue_OpARM64TSTshiftRO(v)
   398  	case ssaop.OpARM64UBFIZ:
   399  		return rewriteValue_OpARM64UBFIZ(v)
   400  	case ssaop.OpARM64UBFX:
   401  		return rewriteValue_OpARM64UBFX(v)
   402  	case ssaop.OpARM64UDIV:
   403  		return rewriteValue_OpARM64UDIV(v)
   404  	case ssaop.OpARM64UDIVW:
   405  		return rewriteValue_OpARM64UDIVW(v)
   406  	case ssaop.OpARM64UMOD:
   407  		return rewriteValue_OpARM64UMOD(v)
   408  	case ssaop.OpARM64UMODW:
   409  		return rewriteValue_OpARM64UMODW(v)
   410  	case ssaop.OpARM64VBIF16B:
   411  		return rewriteValue_OpARM64VBIF16B(v)
   412  	case ssaop.OpARM64VBIT16B:
   413  		return rewriteValue_OpARM64VBIT16B(v)
   414  	case ssaop.OpARM64VDUPBbcast:
   415  		return rewriteValue_OpARM64VDUPBbcast(v)
   416  	case ssaop.OpARM64VEOR16B:
   417  		return rewriteValue_OpARM64VEOR16B(v)
   418  	case ssaop.OpARM64VFCVTL4S:
   419  		return rewriteValue_OpARM64VFCVTL4S(v)
   420  	case ssaop.OpARM64VMOVDins0:
   421  		return rewriteValue_OpARM64VMOVDins0(v)
   422  	case ssaop.OpARM64VMOVSins0:
   423  		return rewriteValue_OpARM64VMOVSins0(v)
   424  	case ssaop.OpARM64VNOT16B:
   425  		return rewriteValue_OpARM64VNOT16B(v)
   426  	case ssaop.OpARM64VPMULL2D:
   427  		return rewriteValue_OpARM64VPMULL2D(v)
   428  	case ssaop.OpARM64VSHL16B:
   429  		return rewriteValue_OpARM64VSHL16B(v)
   430  	case ssaop.OpARM64VSHL2D:
   431  		return rewriteValue_OpARM64VSHL2D(v)
   432  	case ssaop.OpARM64VSHL4S:
   433  		return rewriteValue_OpARM64VSHL4S(v)
   434  	case ssaop.OpARM64VSHL8H:
   435  		return rewriteValue_OpARM64VSHL8H(v)
   436  	case ssaop.OpARM64VSHRN2D:
   437  		return rewriteValue_OpARM64VSHRN2D(v)
   438  	case ssaop.OpARM64VSHRN4S:
   439  		return rewriteValue_OpARM64VSHRN4S(v)
   440  	case ssaop.OpARM64VSHRN8H:
   441  		return rewriteValue_OpARM64VSHRN8H(v)
   442  	case ssaop.OpARM64VSMULL16B:
   443  		return rewriteValue_OpARM64VSMULL16B(v)
   444  	case ssaop.OpARM64VSMULL4S:
   445  		return rewriteValue_OpARM64VSMULL4S(v)
   446  	case ssaop.OpARM64VSMULL8H:
   447  		return rewriteValue_OpARM64VSMULL8H(v)
   448  	case ssaop.OpARM64VSQSHL16Bconst:
   449  		return rewriteValue_OpARM64VSQSHL16Bconst(v)
   450  	case ssaop.OpARM64VSQSHL2Dconst:
   451  		return rewriteValue_OpARM64VSQSHL2Dconst(v)
   452  	case ssaop.OpARM64VSQSHL4Sconst:
   453  		return rewriteValue_OpARM64VSQSHL4Sconst(v)
   454  	case ssaop.OpARM64VSQSHL8Hconst:
   455  		return rewriteValue_OpARM64VSQSHL8Hconst(v)
   456  	case ssaop.OpARM64VSSHLL16B:
   457  		return rewriteValue_OpARM64VSSHLL16B(v)
   458  	case ssaop.OpARM64VSSHLL4S:
   459  		return rewriteValue_OpARM64VSSHLL4S(v)
   460  	case ssaop.OpARM64VSSHLL8H:
   461  		return rewriteValue_OpARM64VSSHLL8H(v)
   462  	case ssaop.OpARM64VSSHR16B:
   463  		return rewriteValue_OpARM64VSSHR16B(v)
   464  	case ssaop.OpARM64VSSHR2D:
   465  		return rewriteValue_OpARM64VSSHR2D(v)
   466  	case ssaop.OpARM64VSSHR4S:
   467  		return rewriteValue_OpARM64VSSHR4S(v)
   468  	case ssaop.OpARM64VSSHR8H:
   469  		return rewriteValue_OpARM64VSSHR8H(v)
   470  	case ssaop.OpARM64VSXTL16B:
   471  		return rewriteValue_OpARM64VSXTL16B(v)
   472  	case ssaop.OpARM64VSXTL4S:
   473  		return rewriteValue_OpARM64VSXTL4S(v)
   474  	case ssaop.OpARM64VSXTL8H:
   475  		return rewriteValue_OpARM64VSXTL8H(v)
   476  	case ssaop.OpARM64VUMULL16B:
   477  		return rewriteValue_OpARM64VUMULL16B(v)
   478  	case ssaop.OpARM64VUMULL4S:
   479  		return rewriteValue_OpARM64VUMULL4S(v)
   480  	case ssaop.OpARM64VUMULL8H:
   481  		return rewriteValue_OpARM64VUMULL8H(v)
   482  	case ssaop.OpARM64VUQSHL16Bconst:
   483  		return rewriteValue_OpARM64VUQSHL16Bconst(v)
   484  	case ssaop.OpARM64VUQSHL2Dconst:
   485  		return rewriteValue_OpARM64VUQSHL2Dconst(v)
   486  	case ssaop.OpARM64VUQSHL4Sconst:
   487  		return rewriteValue_OpARM64VUQSHL4Sconst(v)
   488  	case ssaop.OpARM64VUQSHL8Hconst:
   489  		return rewriteValue_OpARM64VUQSHL8Hconst(v)
   490  	case ssaop.OpARM64VUSHLL16B:
   491  		return rewriteValue_OpARM64VUSHLL16B(v)
   492  	case ssaop.OpARM64VUSHLL4S:
   493  		return rewriteValue_OpARM64VUSHLL4S(v)
   494  	case ssaop.OpARM64VUSHLL8H:
   495  		return rewriteValue_OpARM64VUSHLL8H(v)
   496  	case ssaop.OpARM64VUSHR16B:
   497  		return rewriteValue_OpARM64VUSHR16B(v)
   498  	case ssaop.OpARM64VUSHR2D:
   499  		return rewriteValue_OpARM64VUSHR2D(v)
   500  	case ssaop.OpARM64VUSHR4S:
   501  		return rewriteValue_OpARM64VUSHR4S(v)
   502  	case ssaop.OpARM64VUSHR8H:
   503  		return rewriteValue_OpARM64VUSHR8H(v)
   504  	case ssaop.OpARM64VUXTL16B:
   505  		return rewriteValue_OpARM64VUXTL16B(v)
   506  	case ssaop.OpARM64VUXTL4S:
   507  		return rewriteValue_OpARM64VUXTL4S(v)
   508  	case ssaop.OpARM64VUXTL8H:
   509  		return rewriteValue_OpARM64VUXTL8H(v)
   510  	case ssaop.OpARM64XOR:
   511  		return rewriteValue_OpARM64XOR(v)
   512  	case ssaop.OpARM64XORconst:
   513  		return rewriteValue_OpARM64XORconst(v)
   514  	case ssaop.OpARM64XORshiftLL:
   515  		return rewriteValue_OpARM64XORshiftLL(v)
   516  	case ssaop.OpARM64XORshiftRA:
   517  		return rewriteValue_OpARM64XORshiftRA(v)
   518  	case ssaop.OpARM64XORshiftRL:
   519  		return rewriteValue_OpARM64XORshiftRL(v)
   520  	case ssaop.OpARM64XORshiftRO:
   521  		return rewriteValue_OpARM64XORshiftRO(v)
   522  	case ssaop.OpARM64ZSELB:
   523  		return rewriteValue_OpARM64ZSELB(v)
   524  	case ssaop.OpARM64ZSELD:
   525  		return rewriteValue_OpARM64ZSELD(v)
   526  	case ssaop.OpARM64ZSELH:
   527  		return rewriteValue_OpARM64ZSELH(v)
   528  	case ssaop.OpARM64ZSELS:
   529  		return rewriteValue_OpARM64ZSELS(v)
   530  	case ssaop.OpAbs:
   531  		v.Op = ssaop.OpARM64FABSD
   532  		return true
   533  	case ssaop.OpAbsFloat32s:
   534  		return rewriteValue_OpAbsFloat32s(v)
   535  	case ssaop.OpAbsFloat32x4:
   536  		v.Op = ssaop.OpARM64VFABS4S
   537  		return true
   538  	case ssaop.OpAbsFloat64s:
   539  		return rewriteValue_OpAbsFloat64s(v)
   540  	case ssaop.OpAbsFloat64x2:
   541  		v.Op = ssaop.OpARM64VFABS2D
   542  		return true
   543  	case ssaop.OpAbsInt16s:
   544  		return rewriteValue_OpAbsInt16s(v)
   545  	case ssaop.OpAbsInt16x8:
   546  		v.Op = ssaop.OpARM64VABS8H
   547  		return true
   548  	case ssaop.OpAbsInt32s:
   549  		return rewriteValue_OpAbsInt32s(v)
   550  	case ssaop.OpAbsInt32x4:
   551  		v.Op = ssaop.OpARM64VABS4S
   552  		return true
   553  	case ssaop.OpAbsInt64s:
   554  		return rewriteValue_OpAbsInt64s(v)
   555  	case ssaop.OpAbsInt64x2:
   556  		v.Op = ssaop.OpARM64VABS2D
   557  		return true
   558  	case ssaop.OpAbsInt8s:
   559  		return rewriteValue_OpAbsInt8s(v)
   560  	case ssaop.OpAbsInt8x16:
   561  		v.Op = ssaop.OpARM64VABS16B
   562  		return true
   563  	case ssaop.OpAdd16:
   564  		v.Op = ssaop.OpARM64ADD
   565  		return true
   566  	case ssaop.OpAdd32:
   567  		v.Op = ssaop.OpARM64ADD
   568  		return true
   569  	case ssaop.OpAdd32F:
   570  		v.Op = ssaop.OpARM64FADDS
   571  		return true
   572  	case ssaop.OpAdd64:
   573  		v.Op = ssaop.OpARM64ADD
   574  		return true
   575  	case ssaop.OpAdd64F:
   576  		v.Op = ssaop.OpARM64FADDD
   577  		return true
   578  	case ssaop.OpAdd8:
   579  		v.Op = ssaop.OpARM64ADD
   580  		return true
   581  	case ssaop.OpAddFloat32s:
   582  		v.Op = ssaop.OpARM64ZFADDS
   583  		return true
   584  	case ssaop.OpAddFloat32x4:
   585  		v.Op = ssaop.OpARM64VFADD4S
   586  		return true
   587  	case ssaop.OpAddFloat64s:
   588  		v.Op = ssaop.OpARM64ZFADDD
   589  		return true
   590  	case ssaop.OpAddFloat64x2:
   591  		v.Op = ssaop.OpARM64VFADD2D
   592  		return true
   593  	case ssaop.OpAddInt16s:
   594  		v.Op = ssaop.OpARM64ZADDH
   595  		return true
   596  	case ssaop.OpAddInt16x8:
   597  		v.Op = ssaop.OpARM64VADD8H
   598  		return true
   599  	case ssaop.OpAddInt32s:
   600  		v.Op = ssaop.OpARM64ZADDS
   601  		return true
   602  	case ssaop.OpAddInt32x4:
   603  		v.Op = ssaop.OpARM64VADD4S
   604  		return true
   605  	case ssaop.OpAddInt64s:
   606  		v.Op = ssaop.OpARM64ZADDD
   607  		return true
   608  	case ssaop.OpAddInt64x2:
   609  		v.Op = ssaop.OpARM64VADD2D
   610  		return true
   611  	case ssaop.OpAddInt8s:
   612  		v.Op = ssaop.OpARM64ZADDB
   613  		return true
   614  	case ssaop.OpAddInt8x16:
   615  		v.Op = ssaop.OpARM64VADD16B
   616  		return true
   617  	case ssaop.OpAddPtr:
   618  		v.Op = ssaop.OpARM64ADD
   619  		return true
   620  	case ssaop.OpAddSaturatedInt16s:
   621  		v.Op = ssaop.OpARM64ZSQADDH
   622  		return true
   623  	case ssaop.OpAddSaturatedInt16x8:
   624  		v.Op = ssaop.OpARM64VSQADD8H
   625  		return true
   626  	case ssaop.OpAddSaturatedInt32s:
   627  		v.Op = ssaop.OpARM64ZSQADDS
   628  		return true
   629  	case ssaop.OpAddSaturatedInt32x4:
   630  		v.Op = ssaop.OpARM64VSQADD4S
   631  		return true
   632  	case ssaop.OpAddSaturatedInt64s:
   633  		v.Op = ssaop.OpARM64ZSQADDD
   634  		return true
   635  	case ssaop.OpAddSaturatedInt64x2:
   636  		v.Op = ssaop.OpARM64VSQADD2D
   637  		return true
   638  	case ssaop.OpAddSaturatedInt8s:
   639  		v.Op = ssaop.OpARM64ZSQADDB
   640  		return true
   641  	case ssaop.OpAddSaturatedInt8x16:
   642  		v.Op = ssaop.OpARM64VSQADD16B
   643  		return true
   644  	case ssaop.OpAddSaturatedUint16s:
   645  		v.Op = ssaop.OpARM64ZUQADDH
   646  		return true
   647  	case ssaop.OpAddSaturatedUint16x8:
   648  		v.Op = ssaop.OpARM64VUQADD8H
   649  		return true
   650  	case ssaop.OpAddSaturatedUint32s:
   651  		v.Op = ssaop.OpARM64ZUQADDS
   652  		return true
   653  	case ssaop.OpAddSaturatedUint32x4:
   654  		v.Op = ssaop.OpARM64VUQADD4S
   655  		return true
   656  	case ssaop.OpAddSaturatedUint64s:
   657  		v.Op = ssaop.OpARM64ZUQADDD
   658  		return true
   659  	case ssaop.OpAddSaturatedUint64x2:
   660  		v.Op = ssaop.OpARM64VUQADD2D
   661  		return true
   662  	case ssaop.OpAddSaturatedUint8s:
   663  		v.Op = ssaop.OpARM64ZUQADDB
   664  		return true
   665  	case ssaop.OpAddSaturatedUint8x16:
   666  		v.Op = ssaop.OpARM64VUQADD16B
   667  		return true
   668  	case ssaop.OpAddUint16s:
   669  		v.Op = ssaop.OpARM64ZADDH
   670  		return true
   671  	case ssaop.OpAddUint16x8:
   672  		v.Op = ssaop.OpARM64VADD8H
   673  		return true
   674  	case ssaop.OpAddUint32s:
   675  		v.Op = ssaop.OpARM64ZADDS
   676  		return true
   677  	case ssaop.OpAddUint32x4:
   678  		v.Op = ssaop.OpARM64VADD4S
   679  		return true
   680  	case ssaop.OpAddUint64s:
   681  		v.Op = ssaop.OpARM64ZADDD
   682  		return true
   683  	case ssaop.OpAddUint64x2:
   684  		v.Op = ssaop.OpARM64VADD2D
   685  		return true
   686  	case ssaop.OpAddUint8s:
   687  		v.Op = ssaop.OpARM64ZADDB
   688  		return true
   689  	case ssaop.OpAddUint8x16:
   690  		v.Op = ssaop.OpARM64VADD16B
   691  		return true
   692  	case ssaop.OpAddr:
   693  		return rewriteValue_OpAddr(v)
   694  	case ssaop.OpAnd16:
   695  		v.Op = ssaop.OpARM64AND
   696  		return true
   697  	case ssaop.OpAnd32:
   698  		v.Op = ssaop.OpARM64AND
   699  		return true
   700  	case ssaop.OpAnd64:
   701  		v.Op = ssaop.OpARM64AND
   702  		return true
   703  	case ssaop.OpAnd8:
   704  		v.Op = ssaop.OpARM64AND
   705  		return true
   706  	case ssaop.OpAndB:
   707  		v.Op = ssaop.OpARM64AND
   708  		return true
   709  	case ssaop.OpAndInt16s:
   710  		v.Op = ssaop.OpARM64ZANDD
   711  		return true
   712  	case ssaop.OpAndInt16x8:
   713  		v.Op = ssaop.OpARM64VAND16B
   714  		return true
   715  	case ssaop.OpAndInt32s:
   716  		v.Op = ssaop.OpARM64ZANDD
   717  		return true
   718  	case ssaop.OpAndInt32x4:
   719  		v.Op = ssaop.OpARM64VAND16B
   720  		return true
   721  	case ssaop.OpAndInt64s:
   722  		v.Op = ssaop.OpARM64ZANDD
   723  		return true
   724  	case ssaop.OpAndInt64x2:
   725  		v.Op = ssaop.OpARM64VAND16B
   726  		return true
   727  	case ssaop.OpAndInt8s:
   728  		v.Op = ssaop.OpARM64ZANDD
   729  		return true
   730  	case ssaop.OpAndInt8x16:
   731  		v.Op = ssaop.OpARM64VAND16B
   732  		return true
   733  	case ssaop.OpAndNotInt16s:
   734  		v.Op = ssaop.OpARM64ZBICD
   735  		return true
   736  	case ssaop.OpAndNotInt16x8:
   737  		v.Op = ssaop.OpARM64VBIC16B
   738  		return true
   739  	case ssaop.OpAndNotInt32s:
   740  		v.Op = ssaop.OpARM64ZBICD
   741  		return true
   742  	case ssaop.OpAndNotInt32x4:
   743  		v.Op = ssaop.OpARM64VBIC16B
   744  		return true
   745  	case ssaop.OpAndNotInt64s:
   746  		v.Op = ssaop.OpARM64ZBICD
   747  		return true
   748  	case ssaop.OpAndNotInt64x2:
   749  		v.Op = ssaop.OpARM64VBIC16B
   750  		return true
   751  	case ssaop.OpAndNotInt8s:
   752  		v.Op = ssaop.OpARM64ZBICD
   753  		return true
   754  	case ssaop.OpAndNotInt8x16:
   755  		v.Op = ssaop.OpARM64VBIC16B
   756  		return true
   757  	case ssaop.OpAndNotUint16s:
   758  		v.Op = ssaop.OpARM64ZBICD
   759  		return true
   760  	case ssaop.OpAndNotUint16x8:
   761  		v.Op = ssaop.OpARM64VBIC16B
   762  		return true
   763  	case ssaop.OpAndNotUint32s:
   764  		v.Op = ssaop.OpARM64ZBICD
   765  		return true
   766  	case ssaop.OpAndNotUint32x4:
   767  		v.Op = ssaop.OpARM64VBIC16B
   768  		return true
   769  	case ssaop.OpAndNotUint64s:
   770  		v.Op = ssaop.OpARM64ZBICD
   771  		return true
   772  	case ssaop.OpAndNotUint64x2:
   773  		v.Op = ssaop.OpARM64VBIC16B
   774  		return true
   775  	case ssaop.OpAndNotUint8s:
   776  		v.Op = ssaop.OpARM64ZBICD
   777  		return true
   778  	case ssaop.OpAndNotUint8x16:
   779  		v.Op = ssaop.OpARM64VBIC16B
   780  		return true
   781  	case ssaop.OpAndUint16s:
   782  		v.Op = ssaop.OpARM64ZANDD
   783  		return true
   784  	case ssaop.OpAndUint16x8:
   785  		v.Op = ssaop.OpARM64VAND16B
   786  		return true
   787  	case ssaop.OpAndUint32s:
   788  		v.Op = ssaop.OpARM64ZANDD
   789  		return true
   790  	case ssaop.OpAndUint32x4:
   791  		v.Op = ssaop.OpARM64VAND16B
   792  		return true
   793  	case ssaop.OpAndUint64s:
   794  		v.Op = ssaop.OpARM64ZANDD
   795  		return true
   796  	case ssaop.OpAndUint64x2:
   797  		v.Op = ssaop.OpARM64VAND16B
   798  		return true
   799  	case ssaop.OpAndUint8s:
   800  		v.Op = ssaop.OpARM64ZANDD
   801  		return true
   802  	case ssaop.OpAndUint8x16:
   803  		v.Op = ssaop.OpARM64VAND16B
   804  		return true
   805  	case ssaop.OpAtomicAdd32:
   806  		v.Op = ssaop.OpARM64LoweredAtomicAdd32
   807  		return true
   808  	case ssaop.OpAtomicAdd32Variant:
   809  		v.Op = ssaop.OpARM64LoweredAtomicAdd32Variant
   810  		return true
   811  	case ssaop.OpAtomicAdd64:
   812  		v.Op = ssaop.OpARM64LoweredAtomicAdd64
   813  		return true
   814  	case ssaop.OpAtomicAdd64Variant:
   815  		v.Op = ssaop.OpARM64LoweredAtomicAdd64Variant
   816  		return true
   817  	case ssaop.OpAtomicAnd32value:
   818  		v.Op = ssaop.OpARM64LoweredAtomicAnd32
   819  		return true
   820  	case ssaop.OpAtomicAnd32valueVariant:
   821  		v.Op = ssaop.OpARM64LoweredAtomicAnd32Variant
   822  		return true
   823  	case ssaop.OpAtomicAnd64value:
   824  		v.Op = ssaop.OpARM64LoweredAtomicAnd64
   825  		return true
   826  	case ssaop.OpAtomicAnd64valueVariant:
   827  		v.Op = ssaop.OpARM64LoweredAtomicAnd64Variant
   828  		return true
   829  	case ssaop.OpAtomicAnd8value:
   830  		v.Op = ssaop.OpARM64LoweredAtomicAnd8
   831  		return true
   832  	case ssaop.OpAtomicAnd8valueVariant:
   833  		v.Op = ssaop.OpARM64LoweredAtomicAnd8Variant
   834  		return true
   835  	case ssaop.OpAtomicCompareAndSwap32:
   836  		v.Op = ssaop.OpARM64LoweredAtomicCas32
   837  		return true
   838  	case ssaop.OpAtomicCompareAndSwap32Variant:
   839  		v.Op = ssaop.OpARM64LoweredAtomicCas32Variant
   840  		return true
   841  	case ssaop.OpAtomicCompareAndSwap64:
   842  		v.Op = ssaop.OpARM64LoweredAtomicCas64
   843  		return true
   844  	case ssaop.OpAtomicCompareAndSwap64Variant:
   845  		v.Op = ssaop.OpARM64LoweredAtomicCas64Variant
   846  		return true
   847  	case ssaop.OpAtomicExchange32:
   848  		v.Op = ssaop.OpARM64LoweredAtomicExchange32
   849  		return true
   850  	case ssaop.OpAtomicExchange32Variant:
   851  		v.Op = ssaop.OpARM64LoweredAtomicExchange32Variant
   852  		return true
   853  	case ssaop.OpAtomicExchange64:
   854  		v.Op = ssaop.OpARM64LoweredAtomicExchange64
   855  		return true
   856  	case ssaop.OpAtomicExchange64Variant:
   857  		v.Op = ssaop.OpARM64LoweredAtomicExchange64Variant
   858  		return true
   859  	case ssaop.OpAtomicExchange8:
   860  		v.Op = ssaop.OpARM64LoweredAtomicExchange8
   861  		return true
   862  	case ssaop.OpAtomicExchange8Variant:
   863  		v.Op = ssaop.OpARM64LoweredAtomicExchange8Variant
   864  		return true
   865  	case ssaop.OpAtomicLoad32:
   866  		v.Op = ssaop.OpARM64LDARW
   867  		return true
   868  	case ssaop.OpAtomicLoad64:
   869  		v.Op = ssaop.OpARM64LDAR
   870  		return true
   871  	case ssaop.OpAtomicLoad8:
   872  		v.Op = ssaop.OpARM64LDARB
   873  		return true
   874  	case ssaop.OpAtomicLoadPtr:
   875  		v.Op = ssaop.OpARM64LDAR
   876  		return true
   877  	case ssaop.OpAtomicOr32value:
   878  		v.Op = ssaop.OpARM64LoweredAtomicOr32
   879  		return true
   880  	case ssaop.OpAtomicOr32valueVariant:
   881  		v.Op = ssaop.OpARM64LoweredAtomicOr32Variant
   882  		return true
   883  	case ssaop.OpAtomicOr64value:
   884  		v.Op = ssaop.OpARM64LoweredAtomicOr64
   885  		return true
   886  	case ssaop.OpAtomicOr64valueVariant:
   887  		v.Op = ssaop.OpARM64LoweredAtomicOr64Variant
   888  		return true
   889  	case ssaop.OpAtomicOr8value:
   890  		v.Op = ssaop.OpARM64LoweredAtomicOr8
   891  		return true
   892  	case ssaop.OpAtomicOr8valueVariant:
   893  		v.Op = ssaop.OpARM64LoweredAtomicOr8Variant
   894  		return true
   895  	case ssaop.OpAtomicStore32:
   896  		v.Op = ssaop.OpARM64STLRW
   897  		return true
   898  	case ssaop.OpAtomicStore64:
   899  		v.Op = ssaop.OpARM64STLR
   900  		return true
   901  	case ssaop.OpAtomicStore8:
   902  		v.Op = ssaop.OpARM64STLRB
   903  		return true
   904  	case ssaop.OpAtomicStorePtrNoWB:
   905  		v.Op = ssaop.OpARM64STLR
   906  		return true
   907  	case ssaop.OpAverageInt16x8:
   908  		v.Op = ssaop.OpARM64VSRHADD8H
   909  		return true
   910  	case ssaop.OpAverageInt32x4:
   911  		v.Op = ssaop.OpARM64VSRHADD4S
   912  		return true
   913  	case ssaop.OpAverageInt8x16:
   914  		v.Op = ssaop.OpARM64VSRHADD16B
   915  		return true
   916  	case ssaop.OpAverageUint16x8:
   917  		v.Op = ssaop.OpARM64VURHADD8H
   918  		return true
   919  	case ssaop.OpAverageUint32x4:
   920  		v.Op = ssaop.OpARM64VURHADD4S
   921  		return true
   922  	case ssaop.OpAverageUint8x16:
   923  		v.Op = ssaop.OpARM64VURHADD16B
   924  		return true
   925  	case ssaop.OpAvg64u:
   926  		return rewriteValue_OpAvg64u(v)
   927  	case ssaop.OpBitLen16:
   928  		return rewriteValue_OpBitLen16(v)
   929  	case ssaop.OpBitLen32:
   930  		return rewriteValue_OpBitLen32(v)
   931  	case ssaop.OpBitLen64:
   932  		return rewriteValue_OpBitLen64(v)
   933  	case ssaop.OpBitLen8:
   934  		return rewriteValue_OpBitLen8(v)
   935  	case ssaop.OpBitRev16:
   936  		return rewriteValue_OpBitRev16(v)
   937  	case ssaop.OpBitRev32:
   938  		v.Op = ssaop.OpARM64RBITW
   939  		return true
   940  	case ssaop.OpBitRev64:
   941  		v.Op = ssaop.OpARM64RBIT
   942  		return true
   943  	case ssaop.OpBitRev8:
   944  		return rewriteValue_OpBitRev8(v)
   945  	case ssaop.OpBswap16:
   946  		v.Op = ssaop.OpARM64REV16W
   947  		return true
   948  	case ssaop.OpBswap32:
   949  		v.Op = ssaop.OpARM64REVW
   950  		return true
   951  	case ssaop.OpBswap64:
   952  		v.Op = ssaop.OpARM64REV
   953  		return true
   954  	case ssaop.OpCeil:
   955  		v.Op = ssaop.OpARM64FRINTPD
   956  		return true
   957  	case ssaop.OpCeilFloat32s:
   958  		return rewriteValue_OpCeilFloat32s(v)
   959  	case ssaop.OpCeilFloat32x4:
   960  		v.Op = ssaop.OpARM64VFRINTP4S
   961  		return true
   962  	case ssaop.OpCeilFloat64s:
   963  		return rewriteValue_OpCeilFloat64s(v)
   964  	case ssaop.OpCeilFloat64x2:
   965  		v.Op = ssaop.OpARM64VFRINTP2D
   966  		return true
   967  	case ssaop.OpClosureCall:
   968  		v.Op = ssaop.OpARM64CALLclosure
   969  		return true
   970  	case ssaop.OpCom16:
   971  		v.Op = ssaop.OpARM64MVN
   972  		return true
   973  	case ssaop.OpCom32:
   974  		v.Op = ssaop.OpARM64MVN
   975  		return true
   976  	case ssaop.OpCom64:
   977  		v.Op = ssaop.OpARM64MVN
   978  		return true
   979  	case ssaop.OpCom8:
   980  		v.Op = ssaop.OpARM64MVN
   981  		return true
   982  	case ssaop.OpConcatAddPairsFloat32x4:
   983  		v.Op = ssaop.OpARM64VFADDP4S
   984  		return true
   985  	case ssaop.OpConcatAddPairsFloat64x2:
   986  		v.Op = ssaop.OpARM64VFADDP2D
   987  		return true
   988  	case ssaop.OpConcatAddPairsInt16x8:
   989  		v.Op = ssaop.OpARM64VADDP8H
   990  		return true
   991  	case ssaop.OpConcatAddPairsInt32x4:
   992  		v.Op = ssaop.OpARM64VADDP4S
   993  		return true
   994  	case ssaop.OpConcatAddPairsInt64x2:
   995  		v.Op = ssaop.OpARM64VADDP2D
   996  		return true
   997  	case ssaop.OpConcatAddPairsUint16x8:
   998  		v.Op = ssaop.OpARM64VADDP8H
   999  		return true
  1000  	case ssaop.OpConcatAddPairsUint32x4:
  1001  		v.Op = ssaop.OpARM64VADDP4S
  1002  		return true
  1003  	case ssaop.OpConcatAddPairsUint64x2:
  1004  		v.Op = ssaop.OpARM64VADDP2D
  1005  		return true
  1006  	case ssaop.OpConcatEvenInt16x8:
  1007  		v.Op = ssaop.OpARM64VUZP18H
  1008  		return true
  1009  	case ssaop.OpConcatEvenInt32x4:
  1010  		v.Op = ssaop.OpARM64VUZP14S
  1011  		return true
  1012  	case ssaop.OpConcatEvenInt64x2:
  1013  		v.Op = ssaop.OpARM64VUZP12D
  1014  		return true
  1015  	case ssaop.OpConcatEvenInt8x16:
  1016  		v.Op = ssaop.OpARM64VUZP116B
  1017  		return true
  1018  	case ssaop.OpConcatEvenUint16x8:
  1019  		v.Op = ssaop.OpARM64VUZP18H
  1020  		return true
  1021  	case ssaop.OpConcatEvenUint32x4:
  1022  		v.Op = ssaop.OpARM64VUZP14S
  1023  		return true
  1024  	case ssaop.OpConcatEvenUint64x2:
  1025  		v.Op = ssaop.OpARM64VUZP12D
  1026  		return true
  1027  	case ssaop.OpConcatEvenUint8x16:
  1028  		v.Op = ssaop.OpARM64VUZP116B
  1029  		return true
  1030  	case ssaop.OpConcatOddInt16x8:
  1031  		v.Op = ssaop.OpARM64VUZP28H
  1032  		return true
  1033  	case ssaop.OpConcatOddInt32x4:
  1034  		v.Op = ssaop.OpARM64VUZP24S
  1035  		return true
  1036  	case ssaop.OpConcatOddInt64x2:
  1037  		v.Op = ssaop.OpARM64VUZP22D
  1038  		return true
  1039  	case ssaop.OpConcatOddInt8x16:
  1040  		v.Op = ssaop.OpARM64VUZP216B
  1041  		return true
  1042  	case ssaop.OpConcatOddUint16x8:
  1043  		v.Op = ssaop.OpARM64VUZP28H
  1044  		return true
  1045  	case ssaop.OpConcatOddUint32x4:
  1046  		v.Op = ssaop.OpARM64VUZP24S
  1047  		return true
  1048  	case ssaop.OpConcatOddUint64x2:
  1049  		v.Op = ssaop.OpARM64VUZP22D
  1050  		return true
  1051  	case ssaop.OpConcatOddUint8x16:
  1052  		v.Op = ssaop.OpARM64VUZP216B
  1053  		return true
  1054  	case ssaop.OpConcatShiftBytesRightUint8x16:
  1055  		v.Op = ssaop.OpARM64VEXT16B
  1056  		return true
  1057  	case ssaop.OpCondSelect:
  1058  		return rewriteValue_OpCondSelect(v)
  1059  	case ssaop.OpConst16:
  1060  		return rewriteValue_OpConst16(v)
  1061  	case ssaop.OpConst32:
  1062  		return rewriteValue_OpConst32(v)
  1063  	case ssaop.OpConst32F:
  1064  		return rewriteValue_OpConst32F(v)
  1065  	case ssaop.OpConst64:
  1066  		return rewriteValue_OpConst64(v)
  1067  	case ssaop.OpConst64F:
  1068  		return rewriteValue_OpConst64F(v)
  1069  	case ssaop.OpConst8:
  1070  		return rewriteValue_OpConst8(v)
  1071  	case ssaop.OpConstBool:
  1072  		return rewriteValue_OpConstBool(v)
  1073  	case ssaop.OpConstNil:
  1074  		return rewriteValue_OpConstNil(v)
  1075  	case ssaop.OpConvertLo2ToFloat64Float32x4:
  1076  		v.Op = ssaop.OpARM64VFCVTL4S
  1077  		return true
  1078  	case ssaop.OpConvertToFloat32Float64x2:
  1079  		v.Op = ssaop.OpARM64VFCVTN2D
  1080  		return true
  1081  	case ssaop.OpConvertToFloat32Int32x4:
  1082  		v.Op = ssaop.OpARM64VSCVTF4S
  1083  		return true
  1084  	case ssaop.OpConvertToFloat32Uint32x4:
  1085  		v.Op = ssaop.OpARM64VUCVTF4S
  1086  		return true
  1087  	case ssaop.OpConvertToFloat64Int64x2:
  1088  		v.Op = ssaop.OpARM64VSCVTF2D
  1089  		return true
  1090  	case ssaop.OpConvertToFloat64Uint64x2:
  1091  		v.Op = ssaop.OpARM64VUCVTF2D
  1092  		return true
  1093  	case ssaop.OpConvertToInt32Float32x4:
  1094  		v.Op = ssaop.OpARM64VFCVTZS4S
  1095  		return true
  1096  	case ssaop.OpConvertToInt64Float64x2:
  1097  		v.Op = ssaop.OpARM64VFCVTZS2D
  1098  		return true
  1099  	case ssaop.OpConvertToUint32Float32x4:
  1100  		v.Op = ssaop.OpARM64VFCVTZU4S
  1101  		return true
  1102  	case ssaop.OpConvertToUint64Float64x2:
  1103  		v.Op = ssaop.OpARM64VFCVTZU2D
  1104  		return true
  1105  	case ssaop.OpCount8s:
  1106  		return rewriteValue_OpCount8s(v)
  1107  	case ssaop.OpCtz16:
  1108  		return rewriteValue_OpCtz16(v)
  1109  	case ssaop.OpCtz16NonZero:
  1110  		v.Op = ssaop.OpCtz32
  1111  		return true
  1112  	case ssaop.OpCtz32:
  1113  		return rewriteValue_OpCtz32(v)
  1114  	case ssaop.OpCtz32NonZero:
  1115  		v.Op = ssaop.OpCtz32
  1116  		return true
  1117  	case ssaop.OpCtz64:
  1118  		return rewriteValue_OpCtz64(v)
  1119  	case ssaop.OpCtz64NonZero:
  1120  		v.Op = ssaop.OpCtz64
  1121  		return true
  1122  	case ssaop.OpCtz8:
  1123  		return rewriteValue_OpCtz8(v)
  1124  	case ssaop.OpCtz8NonZero:
  1125  		v.Op = ssaop.OpCtz32
  1126  		return true
  1127  	case ssaop.OpCvt32Fto32:
  1128  		v.Op = ssaop.OpARM64FCVTZSSW
  1129  		return true
  1130  	case ssaop.OpCvt32Fto32U:
  1131  		v.Op = ssaop.OpARM64FCVTZUSW
  1132  		return true
  1133  	case ssaop.OpCvt32Fto64:
  1134  		v.Op = ssaop.OpARM64FCVTZSS
  1135  		return true
  1136  	case ssaop.OpCvt32Fto64F:
  1137  		v.Op = ssaop.OpARM64FCVTSD
  1138  		return true
  1139  	case ssaop.OpCvt32Fto64U:
  1140  		v.Op = ssaop.OpARM64FCVTZUS
  1141  		return true
  1142  	case ssaop.OpCvt32Uto32F:
  1143  		v.Op = ssaop.OpARM64UCVTFWS
  1144  		return true
  1145  	case ssaop.OpCvt32Uto64F:
  1146  		v.Op = ssaop.OpARM64UCVTFWD
  1147  		return true
  1148  	case ssaop.OpCvt32to32F:
  1149  		v.Op = ssaop.OpARM64SCVTFWS
  1150  		return true
  1151  	case ssaop.OpCvt32to64F:
  1152  		v.Op = ssaop.OpARM64SCVTFWD
  1153  		return true
  1154  	case ssaop.OpCvt64Fto32:
  1155  		v.Op = ssaop.OpARM64FCVTZSDW
  1156  		return true
  1157  	case ssaop.OpCvt64Fto32F:
  1158  		v.Op = ssaop.OpARM64FCVTDS
  1159  		return true
  1160  	case ssaop.OpCvt64Fto32U:
  1161  		v.Op = ssaop.OpARM64FCVTZUDW
  1162  		return true
  1163  	case ssaop.OpCvt64Fto64:
  1164  		v.Op = ssaop.OpARM64FCVTZSD
  1165  		return true
  1166  	case ssaop.OpCvt64Fto64U:
  1167  		v.Op = ssaop.OpARM64FCVTZUD
  1168  		return true
  1169  	case ssaop.OpCvt64Uto32F:
  1170  		v.Op = ssaop.OpARM64UCVTFS
  1171  		return true
  1172  	case ssaop.OpCvt64Uto64F:
  1173  		v.Op = ssaop.OpARM64UCVTFD
  1174  		return true
  1175  	case ssaop.OpCvt64to32F:
  1176  		v.Op = ssaop.OpARM64SCVTFS
  1177  		return true
  1178  	case ssaop.OpCvt64to64F:
  1179  		v.Op = ssaop.OpARM64SCVTFD
  1180  		return true
  1181  	case ssaop.OpCvtBoolToUint8:
  1182  		v.Op = ssaop.OpCopy
  1183  		return true
  1184  	case ssaop.OpDiv16:
  1185  		return rewriteValue_OpDiv16(v)
  1186  	case ssaop.OpDiv16u:
  1187  		return rewriteValue_OpDiv16u(v)
  1188  	case ssaop.OpDiv32:
  1189  		return rewriteValue_OpDiv32(v)
  1190  	case ssaop.OpDiv32F:
  1191  		v.Op = ssaop.OpARM64FDIVS
  1192  		return true
  1193  	case ssaop.OpDiv32u:
  1194  		v.Op = ssaop.OpARM64UDIVW
  1195  		return true
  1196  	case ssaop.OpDiv64:
  1197  		return rewriteValue_OpDiv64(v)
  1198  	case ssaop.OpDiv64F:
  1199  		v.Op = ssaop.OpARM64FDIVD
  1200  		return true
  1201  	case ssaop.OpDiv64u:
  1202  		v.Op = ssaop.OpARM64UDIV
  1203  		return true
  1204  	case ssaop.OpDiv8:
  1205  		return rewriteValue_OpDiv8(v)
  1206  	case ssaop.OpDiv8u:
  1207  		return rewriteValue_OpDiv8u(v)
  1208  	case ssaop.OpDivFloat32x4:
  1209  		v.Op = ssaop.OpARM64VFDIV4S
  1210  		return true
  1211  	case ssaop.OpDivFloat64x2:
  1212  		v.Op = ssaop.OpARM64VFDIV2D
  1213  		return true
  1214  	case ssaop.OpEq16:
  1215  		return rewriteValue_OpEq16(v)
  1216  	case ssaop.OpEq32:
  1217  		return rewriteValue_OpEq32(v)
  1218  	case ssaop.OpEq32F:
  1219  		return rewriteValue_OpEq32F(v)
  1220  	case ssaop.OpEq64:
  1221  		return rewriteValue_OpEq64(v)
  1222  	case ssaop.OpEq64F:
  1223  		return rewriteValue_OpEq64F(v)
  1224  	case ssaop.OpEq8:
  1225  		return rewriteValue_OpEq8(v)
  1226  	case ssaop.OpEqB:
  1227  		return rewriteValue_OpEqB(v)
  1228  	case ssaop.OpEqPtr:
  1229  		return rewriteValue_OpEqPtr(v)
  1230  	case ssaop.OpEqualFloat32s:
  1231  		return rewriteValue_OpEqualFloat32s(v)
  1232  	case ssaop.OpEqualFloat32x4:
  1233  		v.Op = ssaop.OpARM64VFCMEQ4S
  1234  		return true
  1235  	case ssaop.OpEqualFloat64s:
  1236  		return rewriteValue_OpEqualFloat64s(v)
  1237  	case ssaop.OpEqualFloat64x2:
  1238  		v.Op = ssaop.OpARM64VFCMEQ2D
  1239  		return true
  1240  	case ssaop.OpEqualInt16s:
  1241  		return rewriteValue_OpEqualInt16s(v)
  1242  	case ssaop.OpEqualInt16x8:
  1243  		v.Op = ssaop.OpARM64VCMEQ8H
  1244  		return true
  1245  	case ssaop.OpEqualInt32s:
  1246  		return rewriteValue_OpEqualInt32s(v)
  1247  	case ssaop.OpEqualInt32x4:
  1248  		v.Op = ssaop.OpARM64VCMEQ4S
  1249  		return true
  1250  	case ssaop.OpEqualInt64s:
  1251  		return rewriteValue_OpEqualInt64s(v)
  1252  	case ssaop.OpEqualInt64x2:
  1253  		v.Op = ssaop.OpARM64VCMEQ2D
  1254  		return true
  1255  	case ssaop.OpEqualInt8s:
  1256  		return rewriteValue_OpEqualInt8s(v)
  1257  	case ssaop.OpEqualInt8x16:
  1258  		v.Op = ssaop.OpARM64VCMEQ16B
  1259  		return true
  1260  	case ssaop.OpEqualUint16s:
  1261  		return rewriteValue_OpEqualUint16s(v)
  1262  	case ssaop.OpEqualUint16x8:
  1263  		v.Op = ssaop.OpARM64VCMEQ8H
  1264  		return true
  1265  	case ssaop.OpEqualUint32s:
  1266  		return rewriteValue_OpEqualUint32s(v)
  1267  	case ssaop.OpEqualUint32x4:
  1268  		v.Op = ssaop.OpARM64VCMEQ4S
  1269  		return true
  1270  	case ssaop.OpEqualUint64s:
  1271  		return rewriteValue_OpEqualUint64s(v)
  1272  	case ssaop.OpEqualUint64x2:
  1273  		v.Op = ssaop.OpARM64VCMEQ2D
  1274  		return true
  1275  	case ssaop.OpEqualUint8s:
  1276  		return rewriteValue_OpEqualUint8s(v)
  1277  	case ssaop.OpEqualUint8x16:
  1278  		v.Op = ssaop.OpARM64VCMEQ16B
  1279  		return true
  1280  	case ssaop.OpExtendLo2ToInt64Int32x4:
  1281  		v.Op = ssaop.OpARM64VSXTL4S
  1282  		return true
  1283  	case ssaop.OpExtendLo2ToUint64Uint32x4:
  1284  		v.Op = ssaop.OpARM64VUXTL4S
  1285  		return true
  1286  	case ssaop.OpExtendLo4ToInt32Int16x8:
  1287  		v.Op = ssaop.OpARM64VSXTL8H
  1288  		return true
  1289  	case ssaop.OpExtendLo4ToUint32Uint16x8:
  1290  		v.Op = ssaop.OpARM64VUXTL8H
  1291  		return true
  1292  	case ssaop.OpExtendLo8ToInt16Int8x16:
  1293  		v.Op = ssaop.OpARM64VSXTL16B
  1294  		return true
  1295  	case ssaop.OpExtendLo8ToUint16Uint8x16:
  1296  		v.Op = ssaop.OpARM64VUXTL16B
  1297  		return true
  1298  	case ssaop.OpFMA:
  1299  		return rewriteValue_OpFMA(v)
  1300  	case ssaop.OpFloor:
  1301  		v.Op = ssaop.OpARM64FRINTMD
  1302  		return true
  1303  	case ssaop.OpFloorFloat32s:
  1304  		return rewriteValue_OpFloorFloat32s(v)
  1305  	case ssaop.OpFloorFloat32x4:
  1306  		v.Op = ssaop.OpARM64VFRINTM4S
  1307  		return true
  1308  	case ssaop.OpFloorFloat64s:
  1309  		return rewriteValue_OpFloorFloat64s(v)
  1310  	case ssaop.OpFloorFloat64x2:
  1311  		v.Op = ssaop.OpARM64VFRINTM2D
  1312  		return true
  1313  	case ssaop.OpGetCallerPC:
  1314  		v.Op = ssaop.OpARM64LoweredGetCallerPC
  1315  		return true
  1316  	case ssaop.OpGetCallerSP:
  1317  		v.Op = ssaop.OpARM64LoweredGetCallerSP
  1318  		return true
  1319  	case ssaop.OpGetClosurePtr:
  1320  		v.Op = ssaop.OpARM64LoweredGetClosurePtr
  1321  		return true
  1322  	case ssaop.OpGetElemFloat32x4:
  1323  		v.Op = ssaop.OpARM64VDUPSextr
  1324  		return true
  1325  	case ssaop.OpGetElemFloat64x2:
  1326  		v.Op = ssaop.OpARM64VDUPDextr
  1327  		return true
  1328  	case ssaop.OpGetElemInt16x8:
  1329  		v.Op = ssaop.OpARM64VMOVHextr
  1330  		return true
  1331  	case ssaop.OpGetElemInt32x4:
  1332  		v.Op = ssaop.OpARM64VMOVSextr
  1333  		return true
  1334  	case ssaop.OpGetElemInt64x2:
  1335  		v.Op = ssaop.OpARM64VMOVDextr
  1336  		return true
  1337  	case ssaop.OpGetElemInt8x16:
  1338  		v.Op = ssaop.OpARM64VMOVBextr
  1339  		return true
  1340  	case ssaop.OpGetElemUint16x8:
  1341  		v.Op = ssaop.OpARM64VMOVHextr
  1342  		return true
  1343  	case ssaop.OpGetElemUint32x4:
  1344  		v.Op = ssaop.OpARM64VMOVSextr
  1345  		return true
  1346  	case ssaop.OpGetElemUint64x2:
  1347  		v.Op = ssaop.OpARM64VMOVDextr
  1348  		return true
  1349  	case ssaop.OpGetElemUint8x16:
  1350  		v.Op = ssaop.OpARM64VMOVBextr
  1351  		return true
  1352  	case ssaop.OpGreaterEqualFloat32s:
  1353  		return rewriteValue_OpGreaterEqualFloat32s(v)
  1354  	case ssaop.OpGreaterEqualFloat32x4:
  1355  		v.Op = ssaop.OpARM64VFCMGE4S
  1356  		return true
  1357  	case ssaop.OpGreaterEqualFloat64s:
  1358  		return rewriteValue_OpGreaterEqualFloat64s(v)
  1359  	case ssaop.OpGreaterEqualFloat64x2:
  1360  		v.Op = ssaop.OpARM64VFCMGE2D
  1361  		return true
  1362  	case ssaop.OpGreaterEqualInt16s:
  1363  		return rewriteValue_OpGreaterEqualInt16s(v)
  1364  	case ssaop.OpGreaterEqualInt16x8:
  1365  		v.Op = ssaop.OpARM64VCMGE8H
  1366  		return true
  1367  	case ssaop.OpGreaterEqualInt32s:
  1368  		return rewriteValue_OpGreaterEqualInt32s(v)
  1369  	case ssaop.OpGreaterEqualInt32x4:
  1370  		v.Op = ssaop.OpARM64VCMGE4S
  1371  		return true
  1372  	case ssaop.OpGreaterEqualInt64s:
  1373  		return rewriteValue_OpGreaterEqualInt64s(v)
  1374  	case ssaop.OpGreaterEqualInt64x2:
  1375  		v.Op = ssaop.OpARM64VCMGE2D
  1376  		return true
  1377  	case ssaop.OpGreaterEqualInt8s:
  1378  		return rewriteValue_OpGreaterEqualInt8s(v)
  1379  	case ssaop.OpGreaterEqualInt8x16:
  1380  		v.Op = ssaop.OpARM64VCMGE16B
  1381  		return true
  1382  	case ssaop.OpGreaterEqualUint16s:
  1383  		return rewriteValue_OpGreaterEqualUint16s(v)
  1384  	case ssaop.OpGreaterEqualUint16x8:
  1385  		v.Op = ssaop.OpARM64VCMHS8H
  1386  		return true
  1387  	case ssaop.OpGreaterEqualUint32s:
  1388  		return rewriteValue_OpGreaterEqualUint32s(v)
  1389  	case ssaop.OpGreaterEqualUint32x4:
  1390  		v.Op = ssaop.OpARM64VCMHS4S
  1391  		return true
  1392  	case ssaop.OpGreaterEqualUint64s:
  1393  		return rewriteValue_OpGreaterEqualUint64s(v)
  1394  	case ssaop.OpGreaterEqualUint64x2:
  1395  		v.Op = ssaop.OpARM64VCMHS2D
  1396  		return true
  1397  	case ssaop.OpGreaterEqualUint8s:
  1398  		return rewriteValue_OpGreaterEqualUint8s(v)
  1399  	case ssaop.OpGreaterEqualUint8x16:
  1400  		v.Op = ssaop.OpARM64VCMHS16B
  1401  		return true
  1402  	case ssaop.OpGreaterFloat32s:
  1403  		return rewriteValue_OpGreaterFloat32s(v)
  1404  	case ssaop.OpGreaterFloat32x4:
  1405  		v.Op = ssaop.OpARM64VFCMGT4S
  1406  		return true
  1407  	case ssaop.OpGreaterFloat64s:
  1408  		return rewriteValue_OpGreaterFloat64s(v)
  1409  	case ssaop.OpGreaterFloat64x2:
  1410  		v.Op = ssaop.OpARM64VFCMGT2D
  1411  		return true
  1412  	case ssaop.OpGreaterInt16s:
  1413  		return rewriteValue_OpGreaterInt16s(v)
  1414  	case ssaop.OpGreaterInt16x8:
  1415  		v.Op = ssaop.OpARM64VCMGT8H
  1416  		return true
  1417  	case ssaop.OpGreaterInt32s:
  1418  		return rewriteValue_OpGreaterInt32s(v)
  1419  	case ssaop.OpGreaterInt32x4:
  1420  		v.Op = ssaop.OpARM64VCMGT4S
  1421  		return true
  1422  	case ssaop.OpGreaterInt64s:
  1423  		return rewriteValue_OpGreaterInt64s(v)
  1424  	case ssaop.OpGreaterInt64x2:
  1425  		v.Op = ssaop.OpARM64VCMGT2D
  1426  		return true
  1427  	case ssaop.OpGreaterInt8s:
  1428  		return rewriteValue_OpGreaterInt8s(v)
  1429  	case ssaop.OpGreaterInt8x16:
  1430  		v.Op = ssaop.OpARM64VCMGT16B
  1431  		return true
  1432  	case ssaop.OpGreaterUint16s:
  1433  		return rewriteValue_OpGreaterUint16s(v)
  1434  	case ssaop.OpGreaterUint16x8:
  1435  		v.Op = ssaop.OpARM64VCMHI8H
  1436  		return true
  1437  	case ssaop.OpGreaterUint32s:
  1438  		return rewriteValue_OpGreaterUint32s(v)
  1439  	case ssaop.OpGreaterUint32x4:
  1440  		v.Op = ssaop.OpARM64VCMHI4S
  1441  		return true
  1442  	case ssaop.OpGreaterUint64s:
  1443  		return rewriteValue_OpGreaterUint64s(v)
  1444  	case ssaop.OpGreaterUint64x2:
  1445  		v.Op = ssaop.OpARM64VCMHI2D
  1446  		return true
  1447  	case ssaop.OpGreaterUint8s:
  1448  		return rewriteValue_OpGreaterUint8s(v)
  1449  	case ssaop.OpGreaterUint8x16:
  1450  		v.Op = ssaop.OpARM64VCMHI16B
  1451  		return true
  1452  	case ssaop.OpHmul32:
  1453  		return rewriteValue_OpHmul32(v)
  1454  	case ssaop.OpHmul32u:
  1455  		return rewriteValue_OpHmul32u(v)
  1456  	case ssaop.OpHmul64:
  1457  		v.Op = ssaop.OpARM64MULH
  1458  		return true
  1459  	case ssaop.OpHmul64u:
  1460  		v.Op = ssaop.OpARM64UMULH
  1461  		return true
  1462  	case ssaop.OpIfElseFloat32s:
  1463  		return rewriteValue_OpIfElseFloat32s(v)
  1464  	case ssaop.OpIfElseFloat64s:
  1465  		return rewriteValue_OpIfElseFloat64s(v)
  1466  	case ssaop.OpIfElseInt16s:
  1467  		return rewriteValue_OpIfElseInt16s(v)
  1468  	case ssaop.OpIfElseInt32s:
  1469  		return rewriteValue_OpIfElseInt32s(v)
  1470  	case ssaop.OpIfElseInt64s:
  1471  		return rewriteValue_OpIfElseInt64s(v)
  1472  	case ssaop.OpIfElseInt8s:
  1473  		return rewriteValue_OpIfElseInt8s(v)
  1474  	case ssaop.OpIfElseUint16s:
  1475  		return rewriteValue_OpIfElseUint16s(v)
  1476  	case ssaop.OpIfElseUint32s:
  1477  		return rewriteValue_OpIfElseUint32s(v)
  1478  	case ssaop.OpIfElseUint64s:
  1479  		return rewriteValue_OpIfElseUint64s(v)
  1480  	case ssaop.OpIfElseUint8s:
  1481  		return rewriteValue_OpIfElseUint8s(v)
  1482  	case ssaop.OpInterCall:
  1483  		v.Op = ssaop.OpARM64CALLinter
  1484  		return true
  1485  	case ssaop.OpInterleaveEvenInt16x8:
  1486  		v.Op = ssaop.OpARM64VTRN18H
  1487  		return true
  1488  	case ssaop.OpInterleaveEvenInt32x4:
  1489  		v.Op = ssaop.OpARM64VTRN14S
  1490  		return true
  1491  	case ssaop.OpInterleaveEvenInt64x2:
  1492  		v.Op = ssaop.OpARM64VTRN12D
  1493  		return true
  1494  	case ssaop.OpInterleaveEvenInt8x16:
  1495  		v.Op = ssaop.OpARM64VTRN116B
  1496  		return true
  1497  	case ssaop.OpInterleaveEvenUint16x8:
  1498  		v.Op = ssaop.OpARM64VTRN18H
  1499  		return true
  1500  	case ssaop.OpInterleaveEvenUint32x4:
  1501  		v.Op = ssaop.OpARM64VTRN14S
  1502  		return true
  1503  	case ssaop.OpInterleaveEvenUint64x2:
  1504  		v.Op = ssaop.OpARM64VTRN12D
  1505  		return true
  1506  	case ssaop.OpInterleaveEvenUint8x16:
  1507  		v.Op = ssaop.OpARM64VTRN116B
  1508  		return true
  1509  	case ssaop.OpInterleaveHiInt16x8:
  1510  		v.Op = ssaop.OpARM64VZIP28H
  1511  		return true
  1512  	case ssaop.OpInterleaveHiInt32x4:
  1513  		v.Op = ssaop.OpARM64VZIP24S
  1514  		return true
  1515  	case ssaop.OpInterleaveHiInt64x2:
  1516  		v.Op = ssaop.OpARM64VZIP22D
  1517  		return true
  1518  	case ssaop.OpInterleaveHiInt8x16:
  1519  		v.Op = ssaop.OpARM64VZIP216B
  1520  		return true
  1521  	case ssaop.OpInterleaveHiUint16x8:
  1522  		v.Op = ssaop.OpARM64VZIP28H
  1523  		return true
  1524  	case ssaop.OpInterleaveHiUint32x4:
  1525  		v.Op = ssaop.OpARM64VZIP24S
  1526  		return true
  1527  	case ssaop.OpInterleaveHiUint64x2:
  1528  		v.Op = ssaop.OpARM64VZIP22D
  1529  		return true
  1530  	case ssaop.OpInterleaveHiUint8x16:
  1531  		v.Op = ssaop.OpARM64VZIP216B
  1532  		return true
  1533  	case ssaop.OpInterleaveLoInt16x8:
  1534  		v.Op = ssaop.OpARM64VZIP18H
  1535  		return true
  1536  	case ssaop.OpInterleaveLoInt32x4:
  1537  		v.Op = ssaop.OpARM64VZIP14S
  1538  		return true
  1539  	case ssaop.OpInterleaveLoInt64x2:
  1540  		v.Op = ssaop.OpARM64VZIP12D
  1541  		return true
  1542  	case ssaop.OpInterleaveLoInt8x16:
  1543  		v.Op = ssaop.OpARM64VZIP116B
  1544  		return true
  1545  	case ssaop.OpInterleaveLoUint16x8:
  1546  		v.Op = ssaop.OpARM64VZIP18H
  1547  		return true
  1548  	case ssaop.OpInterleaveLoUint32x4:
  1549  		v.Op = ssaop.OpARM64VZIP14S
  1550  		return true
  1551  	case ssaop.OpInterleaveLoUint64x2:
  1552  		v.Op = ssaop.OpARM64VZIP12D
  1553  		return true
  1554  	case ssaop.OpInterleaveLoUint8x16:
  1555  		v.Op = ssaop.OpARM64VZIP116B
  1556  		return true
  1557  	case ssaop.OpInterleaveOddInt16x8:
  1558  		v.Op = ssaop.OpARM64VTRN28H
  1559  		return true
  1560  	case ssaop.OpInterleaveOddInt32x4:
  1561  		v.Op = ssaop.OpARM64VTRN24S
  1562  		return true
  1563  	case ssaop.OpInterleaveOddInt64x2:
  1564  		v.Op = ssaop.OpARM64VTRN22D
  1565  		return true
  1566  	case ssaop.OpInterleaveOddInt8x16:
  1567  		v.Op = ssaop.OpARM64VTRN216B
  1568  		return true
  1569  	case ssaop.OpInterleaveOddUint16x8:
  1570  		v.Op = ssaop.OpARM64VTRN28H
  1571  		return true
  1572  	case ssaop.OpInterleaveOddUint32x4:
  1573  		v.Op = ssaop.OpARM64VTRN24S
  1574  		return true
  1575  	case ssaop.OpInterleaveOddUint64x2:
  1576  		v.Op = ssaop.OpARM64VTRN22D
  1577  		return true
  1578  	case ssaop.OpInterleaveOddUint8x16:
  1579  		v.Op = ssaop.OpARM64VTRN216B
  1580  		return true
  1581  	case ssaop.OpIsInBounds:
  1582  		return rewriteValue_OpIsInBounds(v)
  1583  	case ssaop.OpIsNonNil:
  1584  		return rewriteValue_OpIsNonNil(v)
  1585  	case ssaop.OpIsSliceInBounds:
  1586  		return rewriteValue_OpIsSliceInBounds(v)
  1587  	case ssaop.OpLeadingSignBitsInt16x8:
  1588  		v.Op = ssaop.OpARM64VCLS8H
  1589  		return true
  1590  	case ssaop.OpLeadingSignBitsInt32x4:
  1591  		v.Op = ssaop.OpARM64VCLS4S
  1592  		return true
  1593  	case ssaop.OpLeadingSignBitsInt8x16:
  1594  		v.Op = ssaop.OpARM64VCLS16B
  1595  		return true
  1596  	case ssaop.OpLeadingSignBitsUint16x8:
  1597  		v.Op = ssaop.OpARM64VCLS8H
  1598  		return true
  1599  	case ssaop.OpLeadingSignBitsUint32x4:
  1600  		v.Op = ssaop.OpARM64VCLS4S
  1601  		return true
  1602  	case ssaop.OpLeadingSignBitsUint8x16:
  1603  		v.Op = ssaop.OpARM64VCLS16B
  1604  		return true
  1605  	case ssaop.OpLeadingZerosInt16x8:
  1606  		v.Op = ssaop.OpARM64VCLZ8H
  1607  		return true
  1608  	case ssaop.OpLeadingZerosInt32x4:
  1609  		v.Op = ssaop.OpARM64VCLZ4S
  1610  		return true
  1611  	case ssaop.OpLeadingZerosInt8x16:
  1612  		v.Op = ssaop.OpARM64VCLZ16B
  1613  		return true
  1614  	case ssaop.OpLeadingZerosUint16x8:
  1615  		v.Op = ssaop.OpARM64VCLZ8H
  1616  		return true
  1617  	case ssaop.OpLeadingZerosUint32x4:
  1618  		v.Op = ssaop.OpARM64VCLZ4S
  1619  		return true
  1620  	case ssaop.OpLeadingZerosUint8x16:
  1621  		v.Op = ssaop.OpARM64VCLZ16B
  1622  		return true
  1623  	case ssaop.OpLeq16:
  1624  		return rewriteValue_OpLeq16(v)
  1625  	case ssaop.OpLeq16U:
  1626  		return rewriteValue_OpLeq16U(v)
  1627  	case ssaop.OpLeq32:
  1628  		return rewriteValue_OpLeq32(v)
  1629  	case ssaop.OpLeq32F:
  1630  		return rewriteValue_OpLeq32F(v)
  1631  	case ssaop.OpLeq32U:
  1632  		return rewriteValue_OpLeq32U(v)
  1633  	case ssaop.OpLeq64:
  1634  		return rewriteValue_OpLeq64(v)
  1635  	case ssaop.OpLeq64F:
  1636  		return rewriteValue_OpLeq64F(v)
  1637  	case ssaop.OpLeq64U:
  1638  		return rewriteValue_OpLeq64U(v)
  1639  	case ssaop.OpLeq8:
  1640  		return rewriteValue_OpLeq8(v)
  1641  	case ssaop.OpLeq8U:
  1642  		return rewriteValue_OpLeq8U(v)
  1643  	case ssaop.OpLess16:
  1644  		return rewriteValue_OpLess16(v)
  1645  	case ssaop.OpLess16U:
  1646  		return rewriteValue_OpLess16U(v)
  1647  	case ssaop.OpLess32:
  1648  		return rewriteValue_OpLess32(v)
  1649  	case ssaop.OpLess32F:
  1650  		return rewriteValue_OpLess32F(v)
  1651  	case ssaop.OpLess32U:
  1652  		return rewriteValue_OpLess32U(v)
  1653  	case ssaop.OpLess64:
  1654  		return rewriteValue_OpLess64(v)
  1655  	case ssaop.OpLess64F:
  1656  		return rewriteValue_OpLess64F(v)
  1657  	case ssaop.OpLess64U:
  1658  		return rewriteValue_OpLess64U(v)
  1659  	case ssaop.OpLess8:
  1660  		return rewriteValue_OpLess8(v)
  1661  	case ssaop.OpLess8U:
  1662  		return rewriteValue_OpLess8U(v)
  1663  	case ssaop.OpLoad:
  1664  		return rewriteValue_OpLoad(v)
  1665  	case ssaop.OpLoadMasked8:
  1666  		return rewriteValue_OpLoadMasked8(v)
  1667  	case ssaop.OpLocalAddr:
  1668  		return rewriteValue_OpLocalAddr(v)
  1669  	case ssaop.OpLookupOrZeroInt8x16:
  1670  		v.Op = ssaop.OpARM64VTBL16B
  1671  		return true
  1672  	case ssaop.OpLookupOrZeroUint8x16:
  1673  		v.Op = ssaop.OpARM64VTBL16B
  1674  		return true
  1675  	case ssaop.OpLsh16x16:
  1676  		v.Op = ssaop.OpLsh64x16
  1677  		return true
  1678  	case ssaop.OpLsh16x32:
  1679  		v.Op = ssaop.OpLsh64x32
  1680  		return true
  1681  	case ssaop.OpLsh16x64:
  1682  		v.Op = ssaop.OpLsh64x64
  1683  		return true
  1684  	case ssaop.OpLsh16x8:
  1685  		v.Op = ssaop.OpLsh64x8
  1686  		return true
  1687  	case ssaop.OpLsh32x16:
  1688  		v.Op = ssaop.OpLsh64x16
  1689  		return true
  1690  	case ssaop.OpLsh32x32:
  1691  		v.Op = ssaop.OpLsh64x32
  1692  		return true
  1693  	case ssaop.OpLsh32x64:
  1694  		v.Op = ssaop.OpLsh64x64
  1695  		return true
  1696  	case ssaop.OpLsh32x8:
  1697  		v.Op = ssaop.OpLsh64x8
  1698  		return true
  1699  	case ssaop.OpLsh64x16:
  1700  		return rewriteValue_OpLsh64x16(v)
  1701  	case ssaop.OpLsh64x32:
  1702  		return rewriteValue_OpLsh64x32(v)
  1703  	case ssaop.OpLsh64x64:
  1704  		return rewriteValue_OpLsh64x64(v)
  1705  	case ssaop.OpLsh64x8:
  1706  		return rewriteValue_OpLsh64x8(v)
  1707  	case ssaop.OpLsh8x16:
  1708  		v.Op = ssaop.OpLsh64x16
  1709  		return true
  1710  	case ssaop.OpLsh8x32:
  1711  		v.Op = ssaop.OpLsh64x32
  1712  		return true
  1713  	case ssaop.OpLsh8x64:
  1714  		v.Op = ssaop.OpLsh64x64
  1715  		return true
  1716  	case ssaop.OpLsh8x8:
  1717  		v.Op = ssaop.OpLsh64x8
  1718  		return true
  1719  	case ssaop.OpMax32F:
  1720  		v.Op = ssaop.OpARM64FMAXS
  1721  		return true
  1722  	case ssaop.OpMax32FSel:
  1723  		return rewriteValue_OpMax32FSel(v)
  1724  	case ssaop.OpMax64F:
  1725  		v.Op = ssaop.OpARM64FMAXD
  1726  		return true
  1727  	case ssaop.OpMax64FSel:
  1728  		return rewriteValue_OpMax64FSel(v)
  1729  	case ssaop.OpMaxFloat32x4:
  1730  		v.Op = ssaop.OpARM64VFMAX4S
  1731  		return true
  1732  	case ssaop.OpMaxFloat64x2:
  1733  		v.Op = ssaop.OpARM64VFMAX2D
  1734  		return true
  1735  	case ssaop.OpMaxInt16x8:
  1736  		v.Op = ssaop.OpARM64VSMAX8H
  1737  		return true
  1738  	case ssaop.OpMaxInt32x4:
  1739  		v.Op = ssaop.OpARM64VSMAX4S
  1740  		return true
  1741  	case ssaop.OpMaxInt8x16:
  1742  		v.Op = ssaop.OpARM64VSMAX16B
  1743  		return true
  1744  	case ssaop.OpMaxUint16x8:
  1745  		v.Op = ssaop.OpARM64VUMAX8H
  1746  		return true
  1747  	case ssaop.OpMaxUint32x4:
  1748  		v.Op = ssaop.OpARM64VUMAX4S
  1749  		return true
  1750  	case ssaop.OpMaxUint8x16:
  1751  		v.Op = ssaop.OpARM64VUMAX16B
  1752  		return true
  1753  	case ssaop.OpMemEq:
  1754  		v.Op = ssaop.OpARM64LoweredMemEq
  1755  		return true
  1756  	case ssaop.OpMin32F:
  1757  		v.Op = ssaop.OpARM64FMINS
  1758  		return true
  1759  	case ssaop.OpMin32FSel:
  1760  		return rewriteValue_OpMin32FSel(v)
  1761  	case ssaop.OpMin64F:
  1762  		v.Op = ssaop.OpARM64FMIND
  1763  		return true
  1764  	case ssaop.OpMin64FSel:
  1765  		return rewriteValue_OpMin64FSel(v)
  1766  	case ssaop.OpMinFloat32x4:
  1767  		v.Op = ssaop.OpARM64VFMIN4S
  1768  		return true
  1769  	case ssaop.OpMinFloat64x2:
  1770  		v.Op = ssaop.OpARM64VFMIN2D
  1771  		return true
  1772  	case ssaop.OpMinInt16x8:
  1773  		v.Op = ssaop.OpARM64VSMIN8H
  1774  		return true
  1775  	case ssaop.OpMinInt32x4:
  1776  		v.Op = ssaop.OpARM64VSMIN4S
  1777  		return true
  1778  	case ssaop.OpMinInt8x16:
  1779  		v.Op = ssaop.OpARM64VSMIN16B
  1780  		return true
  1781  	case ssaop.OpMinUint16x8:
  1782  		v.Op = ssaop.OpARM64VUMIN8H
  1783  		return true
  1784  	case ssaop.OpMinUint32x4:
  1785  		v.Op = ssaop.OpARM64VUMIN4S
  1786  		return true
  1787  	case ssaop.OpMinUint8x16:
  1788  		v.Op = ssaop.OpARM64VUMIN16B
  1789  		return true
  1790  	case ssaop.OpMod16:
  1791  		return rewriteValue_OpMod16(v)
  1792  	case ssaop.OpMod16u:
  1793  		return rewriteValue_OpMod16u(v)
  1794  	case ssaop.OpMod32:
  1795  		return rewriteValue_OpMod32(v)
  1796  	case ssaop.OpMod32u:
  1797  		v.Op = ssaop.OpARM64UMODW
  1798  		return true
  1799  	case ssaop.OpMod64:
  1800  		return rewriteValue_OpMod64(v)
  1801  	case ssaop.OpMod64u:
  1802  		v.Op = ssaop.OpARM64UMOD
  1803  		return true
  1804  	case ssaop.OpMod8:
  1805  		return rewriteValue_OpMod8(v)
  1806  	case ssaop.OpMod8u:
  1807  		return rewriteValue_OpMod8u(v)
  1808  	case ssaop.OpMove:
  1809  		return rewriteValue_OpMove(v)
  1810  	case ssaop.OpMul16:
  1811  		v.Op = ssaop.OpARM64MULW
  1812  		return true
  1813  	case ssaop.OpMul32:
  1814  		v.Op = ssaop.OpARM64MULW
  1815  		return true
  1816  	case ssaop.OpMul32F:
  1817  		v.Op = ssaop.OpARM64FMULS
  1818  		return true
  1819  	case ssaop.OpMul64:
  1820  		v.Op = ssaop.OpARM64MUL
  1821  		return true
  1822  	case ssaop.OpMul64F:
  1823  		v.Op = ssaop.OpARM64FMULD
  1824  		return true
  1825  	case ssaop.OpMul8:
  1826  		v.Op = ssaop.OpARM64MULW
  1827  		return true
  1828  	case ssaop.OpMulAddFloat32x4:
  1829  		return rewriteValue_OpMulAddFloat32x4(v)
  1830  	case ssaop.OpMulAddFloat64x2:
  1831  		return rewriteValue_OpMulAddFloat64x2(v)
  1832  	case ssaop.OpMulAddInt16x8:
  1833  		return rewriteValue_OpMulAddInt16x8(v)
  1834  	case ssaop.OpMulAddInt32x4:
  1835  		return rewriteValue_OpMulAddInt32x4(v)
  1836  	case ssaop.OpMulAddInt8x16:
  1837  		return rewriteValue_OpMulAddInt8x16(v)
  1838  	case ssaop.OpMulAddUint16x8:
  1839  		return rewriteValue_OpMulAddUint16x8(v)
  1840  	case ssaop.OpMulAddUint32x4:
  1841  		return rewriteValue_OpMulAddUint32x4(v)
  1842  	case ssaop.OpMulAddUint8x16:
  1843  		return rewriteValue_OpMulAddUint8x16(v)
  1844  	case ssaop.OpMulFloat32s:
  1845  		v.Op = ssaop.OpARM64ZFMULS
  1846  		return true
  1847  	case ssaop.OpMulFloat32x4:
  1848  		v.Op = ssaop.OpARM64VFMUL4S
  1849  		return true
  1850  	case ssaop.OpMulFloat64s:
  1851  		v.Op = ssaop.OpARM64ZFMULD
  1852  		return true
  1853  	case ssaop.OpMulFloat64x2:
  1854  		v.Op = ssaop.OpARM64VFMUL2D
  1855  		return true
  1856  	case ssaop.OpMulHighInt16s:
  1857  		return rewriteValue_OpMulHighInt16s(v)
  1858  	case ssaop.OpMulHighInt32s:
  1859  		return rewriteValue_OpMulHighInt32s(v)
  1860  	case ssaop.OpMulHighInt64s:
  1861  		return rewriteValue_OpMulHighInt64s(v)
  1862  	case ssaop.OpMulHighInt8s:
  1863  		return rewriteValue_OpMulHighInt8s(v)
  1864  	case ssaop.OpMulHighUint16s:
  1865  		return rewriteValue_OpMulHighUint16s(v)
  1866  	case ssaop.OpMulHighUint32s:
  1867  		return rewriteValue_OpMulHighUint32s(v)
  1868  	case ssaop.OpMulHighUint64s:
  1869  		return rewriteValue_OpMulHighUint64s(v)
  1870  	case ssaop.OpMulHighUint8s:
  1871  		return rewriteValue_OpMulHighUint8s(v)
  1872  	case ssaop.OpMulInt16s:
  1873  		return rewriteValue_OpMulInt16s(v)
  1874  	case ssaop.OpMulInt16x8:
  1875  		v.Op = ssaop.OpARM64VMUL8H
  1876  		return true
  1877  	case ssaop.OpMulInt32s:
  1878  		return rewriteValue_OpMulInt32s(v)
  1879  	case ssaop.OpMulInt32x4:
  1880  		v.Op = ssaop.OpARM64VMUL4S
  1881  		return true
  1882  	case ssaop.OpMulInt64s:
  1883  		return rewriteValue_OpMulInt64s(v)
  1884  	case ssaop.OpMulInt8s:
  1885  		return rewriteValue_OpMulInt8s(v)
  1886  	case ssaop.OpMulInt8x16:
  1887  		v.Op = ssaop.OpARM64VMUL16B
  1888  		return true
  1889  	case ssaop.OpMulUint16s:
  1890  		return rewriteValue_OpMulUint16s(v)
  1891  	case ssaop.OpMulUint16x8:
  1892  		v.Op = ssaop.OpARM64VMUL8H
  1893  		return true
  1894  	case ssaop.OpMulUint32s:
  1895  		return rewriteValue_OpMulUint32s(v)
  1896  	case ssaop.OpMulUint32x4:
  1897  		v.Op = ssaop.OpARM64VMUL4S
  1898  		return true
  1899  	case ssaop.OpMulUint64s:
  1900  		return rewriteValue_OpMulUint64s(v)
  1901  	case ssaop.OpMulUint8s:
  1902  		return rewriteValue_OpMulUint8s(v)
  1903  	case ssaop.OpMulUint8x16:
  1904  		v.Op = ssaop.OpARM64VMUL16B
  1905  		return true
  1906  	case ssaop.OpMulWidenLoInt16x8:
  1907  		v.Op = ssaop.OpARM64VSMULL8H
  1908  		return true
  1909  	case ssaop.OpMulWidenLoInt32x4:
  1910  		v.Op = ssaop.OpARM64VSMULL4S
  1911  		return true
  1912  	case ssaop.OpMulWidenLoInt8x16:
  1913  		v.Op = ssaop.OpARM64VSMULL16B
  1914  		return true
  1915  	case ssaop.OpMulWidenLoUint16x8:
  1916  		v.Op = ssaop.OpARM64VUMULL8H
  1917  		return true
  1918  	case ssaop.OpMulWidenLoUint32x4:
  1919  		v.Op = ssaop.OpARM64VUMULL4S
  1920  		return true
  1921  	case ssaop.OpMulWidenLoUint8x16:
  1922  		v.Op = ssaop.OpARM64VUMULL16B
  1923  		return true
  1924  	case ssaop.OpNeg16:
  1925  		v.Op = ssaop.OpARM64NEG
  1926  		return true
  1927  	case ssaop.OpNeg32:
  1928  		v.Op = ssaop.OpARM64NEG
  1929  		return true
  1930  	case ssaop.OpNeg32F:
  1931  		v.Op = ssaop.OpARM64FNEGS
  1932  		return true
  1933  	case ssaop.OpNeg64:
  1934  		v.Op = ssaop.OpARM64NEG
  1935  		return true
  1936  	case ssaop.OpNeg64F:
  1937  		v.Op = ssaop.OpARM64FNEGD
  1938  		return true
  1939  	case ssaop.OpNeg8:
  1940  		v.Op = ssaop.OpARM64NEG
  1941  		return true
  1942  	case ssaop.OpNegFloat32s:
  1943  		return rewriteValue_OpNegFloat32s(v)
  1944  	case ssaop.OpNegFloat32x4:
  1945  		v.Op = ssaop.OpARM64VFNEG4S
  1946  		return true
  1947  	case ssaop.OpNegFloat64s:
  1948  		return rewriteValue_OpNegFloat64s(v)
  1949  	case ssaop.OpNegFloat64x2:
  1950  		v.Op = ssaop.OpARM64VFNEG2D
  1951  		return true
  1952  	case ssaop.OpNegInt16s:
  1953  		return rewriteValue_OpNegInt16s(v)
  1954  	case ssaop.OpNegInt16x8:
  1955  		v.Op = ssaop.OpARM64VNEG8H
  1956  		return true
  1957  	case ssaop.OpNegInt32s:
  1958  		return rewriteValue_OpNegInt32s(v)
  1959  	case ssaop.OpNegInt32x4:
  1960  		v.Op = ssaop.OpARM64VNEG4S
  1961  		return true
  1962  	case ssaop.OpNegInt64s:
  1963  		return rewriteValue_OpNegInt64s(v)
  1964  	case ssaop.OpNegInt64x2:
  1965  		v.Op = ssaop.OpARM64VNEG2D
  1966  		return true
  1967  	case ssaop.OpNegInt8s:
  1968  		return rewriteValue_OpNegInt8s(v)
  1969  	case ssaop.OpNegInt8x16:
  1970  		v.Op = ssaop.OpARM64VNEG16B
  1971  		return true
  1972  	case ssaop.OpNeq16:
  1973  		return rewriteValue_OpNeq16(v)
  1974  	case ssaop.OpNeq32:
  1975  		return rewriteValue_OpNeq32(v)
  1976  	case ssaop.OpNeq32F:
  1977  		return rewriteValue_OpNeq32F(v)
  1978  	case ssaop.OpNeq64:
  1979  		return rewriteValue_OpNeq64(v)
  1980  	case ssaop.OpNeq64F:
  1981  		return rewriteValue_OpNeq64F(v)
  1982  	case ssaop.OpNeq8:
  1983  		return rewriteValue_OpNeq8(v)
  1984  	case ssaop.OpNeqB:
  1985  		v.Op = ssaop.OpARM64XOR
  1986  		return true
  1987  	case ssaop.OpNeqPtr:
  1988  		return rewriteValue_OpNeqPtr(v)
  1989  	case ssaop.OpNilCheck:
  1990  		v.Op = ssaop.OpARM64LoweredNilCheck
  1991  		return true
  1992  	case ssaop.OpNot:
  1993  		return rewriteValue_OpNot(v)
  1994  	case ssaop.OpNotEqualFloat32s:
  1995  		return rewriteValue_OpNotEqualFloat32s(v)
  1996  	case ssaop.OpNotEqualFloat64s:
  1997  		return rewriteValue_OpNotEqualFloat64s(v)
  1998  	case ssaop.OpNotEqualInt16s:
  1999  		return rewriteValue_OpNotEqualInt16s(v)
  2000  	case ssaop.OpNotEqualInt32s:
  2001  		return rewriteValue_OpNotEqualInt32s(v)
  2002  	case ssaop.OpNotEqualInt64s:
  2003  		return rewriteValue_OpNotEqualInt64s(v)
  2004  	case ssaop.OpNotEqualInt8s:
  2005  		return rewriteValue_OpNotEqualInt8s(v)
  2006  	case ssaop.OpNotEqualUint16s:
  2007  		return rewriteValue_OpNotEqualUint16s(v)
  2008  	case ssaop.OpNotEqualUint32s:
  2009  		return rewriteValue_OpNotEqualUint32s(v)
  2010  	case ssaop.OpNotEqualUint64s:
  2011  		return rewriteValue_OpNotEqualUint64s(v)
  2012  	case ssaop.OpNotEqualUint8s:
  2013  		return rewriteValue_OpNotEqualUint8s(v)
  2014  	case ssaop.OpNotInt16x8:
  2015  		v.Op = ssaop.OpARM64VNOT16B
  2016  		return true
  2017  	case ssaop.OpNotInt32x4:
  2018  		v.Op = ssaop.OpARM64VNOT16B
  2019  		return true
  2020  	case ssaop.OpNotInt64x2:
  2021  		v.Op = ssaop.OpARM64VNOT16B
  2022  		return true
  2023  	case ssaop.OpNotInt8x16:
  2024  		v.Op = ssaop.OpARM64VNOT16B
  2025  		return true
  2026  	case ssaop.OpNotUint16x8:
  2027  		v.Op = ssaop.OpARM64VNOT16B
  2028  		return true
  2029  	case ssaop.OpNotUint32x4:
  2030  		v.Op = ssaop.OpARM64VNOT16B
  2031  		return true
  2032  	case ssaop.OpNotUint64x2:
  2033  		v.Op = ssaop.OpARM64VNOT16B
  2034  		return true
  2035  	case ssaop.OpNotUint8x16:
  2036  		v.Op = ssaop.OpARM64VNOT16B
  2037  		return true
  2038  	case ssaop.OpOffPtr:
  2039  		return rewriteValue_OpOffPtr(v)
  2040  	case ssaop.OpOnesCountInt8x16:
  2041  		v.Op = ssaop.OpARM64VCNT16B
  2042  		return true
  2043  	case ssaop.OpOnesCountUint8x16:
  2044  		v.Op = ssaop.OpARM64VCNT16B
  2045  		return true
  2046  	case ssaop.OpOr16:
  2047  		v.Op = ssaop.OpARM64OR
  2048  		return true
  2049  	case ssaop.OpOr32:
  2050  		v.Op = ssaop.OpARM64OR
  2051  		return true
  2052  	case ssaop.OpOr64:
  2053  		v.Op = ssaop.OpARM64OR
  2054  		return true
  2055  	case ssaop.OpOr8:
  2056  		v.Op = ssaop.OpARM64OR
  2057  		return true
  2058  	case ssaop.OpOrB:
  2059  		v.Op = ssaop.OpARM64OR
  2060  		return true
  2061  	case ssaop.OpOrInt16s:
  2062  		v.Op = ssaop.OpARM64ZORRD
  2063  		return true
  2064  	case ssaop.OpOrInt16x8:
  2065  		v.Op = ssaop.OpARM64VORR16B
  2066  		return true
  2067  	case ssaop.OpOrInt32s:
  2068  		v.Op = ssaop.OpARM64ZORRD
  2069  		return true
  2070  	case ssaop.OpOrInt32x4:
  2071  		v.Op = ssaop.OpARM64VORR16B
  2072  		return true
  2073  	case ssaop.OpOrInt64s:
  2074  		v.Op = ssaop.OpARM64ZORRD
  2075  		return true
  2076  	case ssaop.OpOrInt64x2:
  2077  		v.Op = ssaop.OpARM64VORR16B
  2078  		return true
  2079  	case ssaop.OpOrInt8s:
  2080  		v.Op = ssaop.OpARM64ZORRD
  2081  		return true
  2082  	case ssaop.OpOrInt8x16:
  2083  		v.Op = ssaop.OpARM64VORR16B
  2084  		return true
  2085  	case ssaop.OpOrNotInt16x8:
  2086  		v.Op = ssaop.OpARM64VORN16B
  2087  		return true
  2088  	case ssaop.OpOrNotInt32x4:
  2089  		v.Op = ssaop.OpARM64VORN16B
  2090  		return true
  2091  	case ssaop.OpOrNotInt64x2:
  2092  		v.Op = ssaop.OpARM64VORN16B
  2093  		return true
  2094  	case ssaop.OpOrNotInt8x16:
  2095  		v.Op = ssaop.OpARM64VORN16B
  2096  		return true
  2097  	case ssaop.OpOrNotUint16x8:
  2098  		v.Op = ssaop.OpARM64VORN16B
  2099  		return true
  2100  	case ssaop.OpOrNotUint32x4:
  2101  		v.Op = ssaop.OpARM64VORN16B
  2102  		return true
  2103  	case ssaop.OpOrNotUint64x2:
  2104  		v.Op = ssaop.OpARM64VORN16B
  2105  		return true
  2106  	case ssaop.OpOrNotUint8x16:
  2107  		v.Op = ssaop.OpARM64VORN16B
  2108  		return true
  2109  	case ssaop.OpOrUint16s:
  2110  		v.Op = ssaop.OpARM64ZORRD
  2111  		return true
  2112  	case ssaop.OpOrUint16x8:
  2113  		v.Op = ssaop.OpARM64VORR16B
  2114  		return true
  2115  	case ssaop.OpOrUint32s:
  2116  		v.Op = ssaop.OpARM64ZORRD
  2117  		return true
  2118  	case ssaop.OpOrUint32x4:
  2119  		v.Op = ssaop.OpARM64VORR16B
  2120  		return true
  2121  	case ssaop.OpOrUint64s:
  2122  		v.Op = ssaop.OpARM64ZORRD
  2123  		return true
  2124  	case ssaop.OpOrUint64x2:
  2125  		v.Op = ssaop.OpARM64VORR16B
  2126  		return true
  2127  	case ssaop.OpOrUint8s:
  2128  		v.Op = ssaop.OpARM64ZORRD
  2129  		return true
  2130  	case ssaop.OpOrUint8x16:
  2131  		v.Op = ssaop.OpARM64VORR16B
  2132  		return true
  2133  	case ssaop.OpPanicBounds:
  2134  		v.Op = ssaop.OpARM64LoweredPanicBoundsRR
  2135  		return true
  2136  	case ssaop.OpPopCount16:
  2137  		return rewriteValue_OpPopCount16(v)
  2138  	case ssaop.OpPopCount32:
  2139  		return rewriteValue_OpPopCount32(v)
  2140  	case ssaop.OpPopCount64:
  2141  		return rewriteValue_OpPopCount64(v)
  2142  	case ssaop.OpPrefetchCache:
  2143  		return rewriteValue_OpPrefetchCache(v)
  2144  	case ssaop.OpPrefetchCacheStreamed:
  2145  		return rewriteValue_OpPrefetchCacheStreamed(v)
  2146  	case ssaop.OpPubBarrier:
  2147  		return rewriteValue_OpPubBarrier(v)
  2148  	case ssaop.OpRotateLeft16:
  2149  		return rewriteValue_OpRotateLeft16(v)
  2150  	case ssaop.OpRotateLeft32:
  2151  		return rewriteValue_OpRotateLeft32(v)
  2152  	case ssaop.OpRotateLeft64:
  2153  		return rewriteValue_OpRotateLeft64(v)
  2154  	case ssaop.OpRotateLeft8:
  2155  		return rewriteValue_OpRotateLeft8(v)
  2156  	case ssaop.OpRound:
  2157  		v.Op = ssaop.OpARM64FRINTAD
  2158  		return true
  2159  	case ssaop.OpRound32F:
  2160  		v.Op = ssaop.OpARM64LoweredRound32F
  2161  		return true
  2162  	case ssaop.OpRound64F:
  2163  		v.Op = ssaop.OpARM64LoweredRound64F
  2164  		return true
  2165  	case ssaop.OpRoundFloat32s:
  2166  		return rewriteValue_OpRoundFloat32s(v)
  2167  	case ssaop.OpRoundFloat32x4:
  2168  		v.Op = ssaop.OpARM64VFRINTN4S
  2169  		return true
  2170  	case ssaop.OpRoundFloat64s:
  2171  		return rewriteValue_OpRoundFloat64s(v)
  2172  	case ssaop.OpRoundFloat64x2:
  2173  		v.Op = ssaop.OpARM64VFRINTN2D
  2174  		return true
  2175  	case ssaop.OpRoundToEven:
  2176  		v.Op = ssaop.OpARM64FRINTND
  2177  		return true
  2178  	case ssaop.OpRsh16Ux16:
  2179  		return rewriteValue_OpRsh16Ux16(v)
  2180  	case ssaop.OpRsh16Ux32:
  2181  		return rewriteValue_OpRsh16Ux32(v)
  2182  	case ssaop.OpRsh16Ux64:
  2183  		return rewriteValue_OpRsh16Ux64(v)
  2184  	case ssaop.OpRsh16Ux8:
  2185  		return rewriteValue_OpRsh16Ux8(v)
  2186  	case ssaop.OpRsh16x16:
  2187  		return rewriteValue_OpRsh16x16(v)
  2188  	case ssaop.OpRsh16x32:
  2189  		return rewriteValue_OpRsh16x32(v)
  2190  	case ssaop.OpRsh16x64:
  2191  		return rewriteValue_OpRsh16x64(v)
  2192  	case ssaop.OpRsh16x8:
  2193  		return rewriteValue_OpRsh16x8(v)
  2194  	case ssaop.OpRsh32Ux16:
  2195  		return rewriteValue_OpRsh32Ux16(v)
  2196  	case ssaop.OpRsh32Ux32:
  2197  		return rewriteValue_OpRsh32Ux32(v)
  2198  	case ssaop.OpRsh32Ux64:
  2199  		return rewriteValue_OpRsh32Ux64(v)
  2200  	case ssaop.OpRsh32Ux8:
  2201  		return rewriteValue_OpRsh32Ux8(v)
  2202  	case ssaop.OpRsh32x16:
  2203  		return rewriteValue_OpRsh32x16(v)
  2204  	case ssaop.OpRsh32x32:
  2205  		return rewriteValue_OpRsh32x32(v)
  2206  	case ssaop.OpRsh32x64:
  2207  		return rewriteValue_OpRsh32x64(v)
  2208  	case ssaop.OpRsh32x8:
  2209  		return rewriteValue_OpRsh32x8(v)
  2210  	case ssaop.OpRsh64Ux16:
  2211  		return rewriteValue_OpRsh64Ux16(v)
  2212  	case ssaop.OpRsh64Ux32:
  2213  		return rewriteValue_OpRsh64Ux32(v)
  2214  	case ssaop.OpRsh64Ux64:
  2215  		return rewriteValue_OpRsh64Ux64(v)
  2216  	case ssaop.OpRsh64Ux8:
  2217  		return rewriteValue_OpRsh64Ux8(v)
  2218  	case ssaop.OpRsh64x16:
  2219  		return rewriteValue_OpRsh64x16(v)
  2220  	case ssaop.OpRsh64x32:
  2221  		return rewriteValue_OpRsh64x32(v)
  2222  	case ssaop.OpRsh64x64:
  2223  		return rewriteValue_OpRsh64x64(v)
  2224  	case ssaop.OpRsh64x8:
  2225  		return rewriteValue_OpRsh64x8(v)
  2226  	case ssaop.OpRsh8Ux16:
  2227  		return rewriteValue_OpRsh8Ux16(v)
  2228  	case ssaop.OpRsh8Ux32:
  2229  		return rewriteValue_OpRsh8Ux32(v)
  2230  	case ssaop.OpRsh8Ux64:
  2231  		return rewriteValue_OpRsh8Ux64(v)
  2232  	case ssaop.OpRsh8Ux8:
  2233  		return rewriteValue_OpRsh8Ux8(v)
  2234  	case ssaop.OpRsh8x16:
  2235  		return rewriteValue_OpRsh8x16(v)
  2236  	case ssaop.OpRsh8x32:
  2237  		return rewriteValue_OpRsh8x32(v)
  2238  	case ssaop.OpRsh8x64:
  2239  		return rewriteValue_OpRsh8x64(v)
  2240  	case ssaop.OpRsh8x8:
  2241  		return rewriteValue_OpRsh8x8(v)
  2242  	case ssaop.OpSaturateToInt16Int32x4:
  2243  		v.Op = ssaop.OpARM64VSQXTN4S
  2244  		return true
  2245  	case ssaop.OpSaturateToInt32Int64x2:
  2246  		v.Op = ssaop.OpARM64VSQXTN2D
  2247  		return true
  2248  	case ssaop.OpSaturateToInt8Int16x8:
  2249  		v.Op = ssaop.OpARM64VSQXTN8H
  2250  		return true
  2251  	case ssaop.OpSaturateToUint16Int32x4:
  2252  		v.Op = ssaop.OpARM64VSQXTUN4S
  2253  		return true
  2254  	case ssaop.OpSaturateToUint16Uint32x4:
  2255  		v.Op = ssaop.OpARM64VUQXTN4S
  2256  		return true
  2257  	case ssaop.OpSaturateToUint32Int64x2:
  2258  		v.Op = ssaop.OpARM64VSQXTUN2D
  2259  		return true
  2260  	case ssaop.OpSaturateToUint32Uint64x2:
  2261  		v.Op = ssaop.OpARM64VUQXTN2D
  2262  		return true
  2263  	case ssaop.OpSaturateToUint8Int16x8:
  2264  		v.Op = ssaop.OpARM64VSQXTUN8H
  2265  		return true
  2266  	case ssaop.OpSaturateToUint8Uint16x8:
  2267  		v.Op = ssaop.OpARM64VUQXTN8H
  2268  		return true
  2269  	case ssaop.OpScalableVectorLen:
  2270  		return rewriteValue_OpScalableVectorLen(v)
  2271  	case ssaop.OpSelect0:
  2272  		return rewriteValue_OpSelect0(v)
  2273  	case ssaop.OpSelect1:
  2274  		return rewriteValue_OpSelect1(v)
  2275  	case ssaop.OpSelectN:
  2276  		return rewriteValue_OpSelectN(v)
  2277  	case ssaop.OpSetElemFloat32x4:
  2278  		v.Op = ssaop.OpARM64VMOVSins0
  2279  		return true
  2280  	case ssaop.OpSetElemFloat64x2:
  2281  		v.Op = ssaop.OpARM64VMOVDins0
  2282  		return true
  2283  	case ssaop.OpSetElemInt16x8:
  2284  		v.Op = ssaop.OpARM64VMOVHins
  2285  		return true
  2286  	case ssaop.OpSetElemInt32x4:
  2287  		v.Op = ssaop.OpARM64VMOVSins
  2288  		return true
  2289  	case ssaop.OpSetElemInt64x2:
  2290  		v.Op = ssaop.OpARM64VMOVDins
  2291  		return true
  2292  	case ssaop.OpSetElemInt8x16:
  2293  		v.Op = ssaop.OpARM64VMOVBins
  2294  		return true
  2295  	case ssaop.OpSetElemUint16x8:
  2296  		v.Op = ssaop.OpARM64VMOVHins
  2297  		return true
  2298  	case ssaop.OpSetElemUint32x4:
  2299  		v.Op = ssaop.OpARM64VMOVSins
  2300  		return true
  2301  	case ssaop.OpSetElemUint64x2:
  2302  		v.Op = ssaop.OpARM64VMOVDins
  2303  		return true
  2304  	case ssaop.OpSetElemUint8x16:
  2305  		v.Op = ssaop.OpARM64VMOVBins
  2306  		return true
  2307  	case ssaop.OpShiftAllLeftInt16x8:
  2308  		return rewriteValue_OpShiftAllLeftInt16x8(v)
  2309  	case ssaop.OpShiftAllLeftInt32x4:
  2310  		return rewriteValue_OpShiftAllLeftInt32x4(v)
  2311  	case ssaop.OpShiftAllLeftInt64x2:
  2312  		return rewriteValue_OpShiftAllLeftInt64x2(v)
  2313  	case ssaop.OpShiftAllLeftInt8x16:
  2314  		return rewriteValue_OpShiftAllLeftInt8x16(v)
  2315  	case ssaop.OpShiftAllLeftUint16x8:
  2316  		return rewriteValue_OpShiftAllLeftUint16x8(v)
  2317  	case ssaop.OpShiftAllLeftUint32x4:
  2318  		return rewriteValue_OpShiftAllLeftUint32x4(v)
  2319  	case ssaop.OpShiftAllLeftUint64x2:
  2320  		return rewriteValue_OpShiftAllLeftUint64x2(v)
  2321  	case ssaop.OpShiftAllLeftUint8x16:
  2322  		return rewriteValue_OpShiftAllLeftUint8x16(v)
  2323  	case ssaop.OpShiftAllRightInt16x8:
  2324  		return rewriteValue_OpShiftAllRightInt16x8(v)
  2325  	case ssaop.OpShiftAllRightInt32x4:
  2326  		return rewriteValue_OpShiftAllRightInt32x4(v)
  2327  	case ssaop.OpShiftAllRightInt64x2:
  2328  		return rewriteValue_OpShiftAllRightInt64x2(v)
  2329  	case ssaop.OpShiftAllRightInt8x16:
  2330  		return rewriteValue_OpShiftAllRightInt8x16(v)
  2331  	case ssaop.OpShiftAllRightUint16x8:
  2332  		return rewriteValue_OpShiftAllRightUint16x8(v)
  2333  	case ssaop.OpShiftAllRightUint32x4:
  2334  		return rewriteValue_OpShiftAllRightUint32x4(v)
  2335  	case ssaop.OpShiftAllRightUint64x2:
  2336  		return rewriteValue_OpShiftAllRightUint64x2(v)
  2337  	case ssaop.OpShiftAllRightUint8x16:
  2338  		return rewriteValue_OpShiftAllRightUint8x16(v)
  2339  	case ssaop.OpShiftInt16x8:
  2340  		v.Op = ssaop.OpARM64VSSHL8H
  2341  		return true
  2342  	case ssaop.OpShiftInt32x4:
  2343  		v.Op = ssaop.OpARM64VSSHL4S
  2344  		return true
  2345  	case ssaop.OpShiftInt64x2:
  2346  		v.Op = ssaop.OpARM64VSSHL2D
  2347  		return true
  2348  	case ssaop.OpShiftInt8x16:
  2349  		v.Op = ssaop.OpARM64VSSHL16B
  2350  		return true
  2351  	case ssaop.OpShiftSaturatedInt16x8:
  2352  		v.Op = ssaop.OpARM64VSQSHL8H
  2353  		return true
  2354  	case ssaop.OpShiftSaturatedInt32x4:
  2355  		v.Op = ssaop.OpARM64VSQSHL4S
  2356  		return true
  2357  	case ssaop.OpShiftSaturatedInt64x2:
  2358  		v.Op = ssaop.OpARM64VSQSHL2D
  2359  		return true
  2360  	case ssaop.OpShiftSaturatedInt8x16:
  2361  		v.Op = ssaop.OpARM64VSQSHL16B
  2362  		return true
  2363  	case ssaop.OpShiftSaturatedUint16x8:
  2364  		v.Op = ssaop.OpARM64VUQSHL8H
  2365  		return true
  2366  	case ssaop.OpShiftSaturatedUint32x4:
  2367  		v.Op = ssaop.OpARM64VUQSHL4S
  2368  		return true
  2369  	case ssaop.OpShiftSaturatedUint64x2:
  2370  		v.Op = ssaop.OpARM64VUQSHL2D
  2371  		return true
  2372  	case ssaop.OpShiftSaturatedUint8x16:
  2373  		v.Op = ssaop.OpARM64VUQSHL16B
  2374  		return true
  2375  	case ssaop.OpShiftUint16x8:
  2376  		v.Op = ssaop.OpARM64VUSHL8H
  2377  		return true
  2378  	case ssaop.OpShiftUint32x4:
  2379  		v.Op = ssaop.OpARM64VUSHL4S
  2380  		return true
  2381  	case ssaop.OpShiftUint64x2:
  2382  		v.Op = ssaop.OpARM64VUSHL2D
  2383  		return true
  2384  	case ssaop.OpShiftUint8x16:
  2385  		v.Op = ssaop.OpARM64VUSHL16B
  2386  		return true
  2387  	case ssaop.OpSignExt16to32:
  2388  		v.Op = ssaop.OpARM64MOVHreg
  2389  		return true
  2390  	case ssaop.OpSignExt16to64:
  2391  		v.Op = ssaop.OpARM64MOVHreg
  2392  		return true
  2393  	case ssaop.OpSignExt32to64:
  2394  		v.Op = ssaop.OpARM64MOVWreg
  2395  		return true
  2396  	case ssaop.OpSignExt8to16:
  2397  		v.Op = ssaop.OpARM64MOVBreg
  2398  		return true
  2399  	case ssaop.OpSignExt8to32:
  2400  		v.Op = ssaop.OpARM64MOVBreg
  2401  		return true
  2402  	case ssaop.OpSignExt8to64:
  2403  		v.Op = ssaop.OpARM64MOVBreg
  2404  		return true
  2405  	case ssaop.OpSlicemask:
  2406  		return rewriteValue_OpSlicemask(v)
  2407  	case ssaop.OpSqrt:
  2408  		v.Op = ssaop.OpARM64FSQRTD
  2409  		return true
  2410  	case ssaop.OpSqrt32:
  2411  		v.Op = ssaop.OpARM64FSQRTS
  2412  		return true
  2413  	case ssaop.OpSqrtFloat32s:
  2414  		return rewriteValue_OpSqrtFloat32s(v)
  2415  	case ssaop.OpSqrtFloat32x4:
  2416  		v.Op = ssaop.OpARM64VFSQRT4S
  2417  		return true
  2418  	case ssaop.OpSqrtFloat64s:
  2419  		return rewriteValue_OpSqrtFloat64s(v)
  2420  	case ssaop.OpSqrtFloat64x2:
  2421  		v.Op = ssaop.OpARM64VFSQRT2D
  2422  		return true
  2423  	case ssaop.OpStaticCall:
  2424  		v.Op = ssaop.OpARM64CALLstatic
  2425  		return true
  2426  	case ssaop.OpStore:
  2427  		return rewriteValue_OpStore(v)
  2428  	case ssaop.OpStoreMasked8:
  2429  		return rewriteValue_OpStoreMasked8(v)
  2430  	case ssaop.OpSub16:
  2431  		v.Op = ssaop.OpARM64SUB
  2432  		return true
  2433  	case ssaop.OpSub32:
  2434  		v.Op = ssaop.OpARM64SUB
  2435  		return true
  2436  	case ssaop.OpSub32F:
  2437  		v.Op = ssaop.OpARM64FSUBS
  2438  		return true
  2439  	case ssaop.OpSub64:
  2440  		v.Op = ssaop.OpARM64SUB
  2441  		return true
  2442  	case ssaop.OpSub64F:
  2443  		v.Op = ssaop.OpARM64FSUBD
  2444  		return true
  2445  	case ssaop.OpSub8:
  2446  		v.Op = ssaop.OpARM64SUB
  2447  		return true
  2448  	case ssaop.OpSubFloat32s:
  2449  		v.Op = ssaop.OpARM64ZFSUBS
  2450  		return true
  2451  	case ssaop.OpSubFloat32x4:
  2452  		v.Op = ssaop.OpARM64VFSUB4S
  2453  		return true
  2454  	case ssaop.OpSubFloat64s:
  2455  		v.Op = ssaop.OpARM64ZFSUBD
  2456  		return true
  2457  	case ssaop.OpSubFloat64x2:
  2458  		v.Op = ssaop.OpARM64VFSUB2D
  2459  		return true
  2460  	case ssaop.OpSubInt16s:
  2461  		v.Op = ssaop.OpARM64ZSUBH
  2462  		return true
  2463  	case ssaop.OpSubInt16x8:
  2464  		v.Op = ssaop.OpARM64VSUB8H
  2465  		return true
  2466  	case ssaop.OpSubInt32s:
  2467  		v.Op = ssaop.OpARM64ZSUBS
  2468  		return true
  2469  	case ssaop.OpSubInt32x4:
  2470  		v.Op = ssaop.OpARM64VSUB4S
  2471  		return true
  2472  	case ssaop.OpSubInt64s:
  2473  		v.Op = ssaop.OpARM64ZSUBD
  2474  		return true
  2475  	case ssaop.OpSubInt64x2:
  2476  		v.Op = ssaop.OpARM64VSUB2D
  2477  		return true
  2478  	case ssaop.OpSubInt8s:
  2479  		v.Op = ssaop.OpARM64ZSUBB
  2480  		return true
  2481  	case ssaop.OpSubInt8x16:
  2482  		v.Op = ssaop.OpARM64VSUB16B
  2483  		return true
  2484  	case ssaop.OpSubPtr:
  2485  		v.Op = ssaop.OpARM64SUB
  2486  		return true
  2487  	case ssaop.OpSubSaturatedInt16s:
  2488  		v.Op = ssaop.OpARM64ZSQSUBH
  2489  		return true
  2490  	case ssaop.OpSubSaturatedInt16x8:
  2491  		v.Op = ssaop.OpARM64VSQSUB8H
  2492  		return true
  2493  	case ssaop.OpSubSaturatedInt32s:
  2494  		v.Op = ssaop.OpARM64ZSQSUBS
  2495  		return true
  2496  	case ssaop.OpSubSaturatedInt32x4:
  2497  		v.Op = ssaop.OpARM64VSQSUB4S
  2498  		return true
  2499  	case ssaop.OpSubSaturatedInt64s:
  2500  		v.Op = ssaop.OpARM64ZSQSUBD
  2501  		return true
  2502  	case ssaop.OpSubSaturatedInt64x2:
  2503  		v.Op = ssaop.OpARM64VSQSUB2D
  2504  		return true
  2505  	case ssaop.OpSubSaturatedInt8s:
  2506  		v.Op = ssaop.OpARM64ZSQSUBB
  2507  		return true
  2508  	case ssaop.OpSubSaturatedInt8x16:
  2509  		v.Op = ssaop.OpARM64VSQSUB16B
  2510  		return true
  2511  	case ssaop.OpSubSaturatedUint16s:
  2512  		v.Op = ssaop.OpARM64ZUQSUBH
  2513  		return true
  2514  	case ssaop.OpSubSaturatedUint16x8:
  2515  		v.Op = ssaop.OpARM64VUQSUB8H
  2516  		return true
  2517  	case ssaop.OpSubSaturatedUint32s:
  2518  		v.Op = ssaop.OpARM64ZUQSUBS
  2519  		return true
  2520  	case ssaop.OpSubSaturatedUint32x4:
  2521  		v.Op = ssaop.OpARM64VUQSUB4S
  2522  		return true
  2523  	case ssaop.OpSubSaturatedUint64s:
  2524  		v.Op = ssaop.OpARM64ZUQSUBD
  2525  		return true
  2526  	case ssaop.OpSubSaturatedUint64x2:
  2527  		v.Op = ssaop.OpARM64VUQSUB2D
  2528  		return true
  2529  	case ssaop.OpSubSaturatedUint8s:
  2530  		v.Op = ssaop.OpARM64ZUQSUBB
  2531  		return true
  2532  	case ssaop.OpSubSaturatedUint8x16:
  2533  		v.Op = ssaop.OpARM64VUQSUB16B
  2534  		return true
  2535  	case ssaop.OpSubUint16s:
  2536  		v.Op = ssaop.OpARM64ZSUBH
  2537  		return true
  2538  	case ssaop.OpSubUint16x8:
  2539  		v.Op = ssaop.OpARM64VSUB8H
  2540  		return true
  2541  	case ssaop.OpSubUint32s:
  2542  		v.Op = ssaop.OpARM64ZSUBS
  2543  		return true
  2544  	case ssaop.OpSubUint32x4:
  2545  		v.Op = ssaop.OpARM64VSUB4S
  2546  		return true
  2547  	case ssaop.OpSubUint64s:
  2548  		v.Op = ssaop.OpARM64ZSUBD
  2549  		return true
  2550  	case ssaop.OpSubUint64x2:
  2551  		v.Op = ssaop.OpARM64VSUB2D
  2552  		return true
  2553  	case ssaop.OpSubUint8s:
  2554  		v.Op = ssaop.OpARM64ZSUBB
  2555  		return true
  2556  	case ssaop.OpSubUint8x16:
  2557  		v.Op = ssaop.OpARM64VSUB16B
  2558  		return true
  2559  	case ssaop.OpTailCall:
  2560  		v.Op = ssaop.OpARM64CALLtail
  2561  		return true
  2562  	case ssaop.OpTailCallInter:
  2563  		v.Op = ssaop.OpARM64CALLtailinter
  2564  		return true
  2565  	case ssaop.OpTrunc:
  2566  		v.Op = ssaop.OpARM64FRINTZD
  2567  		return true
  2568  	case ssaop.OpTrunc16to8:
  2569  		v.Op = ssaop.OpCopy
  2570  		return true
  2571  	case ssaop.OpTrunc32to16:
  2572  		v.Op = ssaop.OpCopy
  2573  		return true
  2574  	case ssaop.OpTrunc32to8:
  2575  		v.Op = ssaop.OpCopy
  2576  		return true
  2577  	case ssaop.OpTrunc64to16:
  2578  		v.Op = ssaop.OpCopy
  2579  		return true
  2580  	case ssaop.OpTrunc64to32:
  2581  		v.Op = ssaop.OpCopy
  2582  		return true
  2583  	case ssaop.OpTrunc64to8:
  2584  		v.Op = ssaop.OpCopy
  2585  		return true
  2586  	case ssaop.OpTruncFloat32s:
  2587  		return rewriteValue_OpTruncFloat32s(v)
  2588  	case ssaop.OpTruncFloat32x4:
  2589  		v.Op = ssaop.OpARM64VFRINTZ4S
  2590  		return true
  2591  	case ssaop.OpTruncFloat64s:
  2592  		return rewriteValue_OpTruncFloat64s(v)
  2593  	case ssaop.OpTruncFloat64x2:
  2594  		v.Op = ssaop.OpARM64VFRINTZ2D
  2595  		return true
  2596  	case ssaop.OpTruncToInt16Int32x4:
  2597  		v.Op = ssaop.OpARM64VXTN4S
  2598  		return true
  2599  	case ssaop.OpTruncToInt32Int64x2:
  2600  		v.Op = ssaop.OpARM64VXTN2D
  2601  		return true
  2602  	case ssaop.OpTruncToInt8Int16x8:
  2603  		v.Op = ssaop.OpARM64VXTN8H
  2604  		return true
  2605  	case ssaop.OpTruncToUint16Uint32x4:
  2606  		v.Op = ssaop.OpARM64VXTN4S
  2607  		return true
  2608  	case ssaop.OpTruncToUint32Uint64x2:
  2609  		v.Op = ssaop.OpARM64VXTN2D
  2610  		return true
  2611  	case ssaop.OpTruncToUint8Uint16x8:
  2612  		v.Op = ssaop.OpARM64VXTN8H
  2613  		return true
  2614  	case ssaop.OpWB:
  2615  		v.Op = ssaop.OpARM64LoweredWB
  2616  		return true
  2617  	case ssaop.OpXor16:
  2618  		v.Op = ssaop.OpARM64XOR
  2619  		return true
  2620  	case ssaop.OpXor32:
  2621  		v.Op = ssaop.OpARM64XOR
  2622  		return true
  2623  	case ssaop.OpXor64:
  2624  		v.Op = ssaop.OpARM64XOR
  2625  		return true
  2626  	case ssaop.OpXor8:
  2627  		v.Op = ssaop.OpARM64XOR
  2628  		return true
  2629  	case ssaop.OpXorInt16s:
  2630  		v.Op = ssaop.OpARM64ZEORD
  2631  		return true
  2632  	case ssaop.OpXorInt16x8:
  2633  		v.Op = ssaop.OpARM64VEOR16B
  2634  		return true
  2635  	case ssaop.OpXorInt32s:
  2636  		v.Op = ssaop.OpARM64ZEORD
  2637  		return true
  2638  	case ssaop.OpXorInt32x4:
  2639  		v.Op = ssaop.OpARM64VEOR16B
  2640  		return true
  2641  	case ssaop.OpXorInt64s:
  2642  		v.Op = ssaop.OpARM64ZEORD
  2643  		return true
  2644  	case ssaop.OpXorInt64x2:
  2645  		v.Op = ssaop.OpARM64VEOR16B
  2646  		return true
  2647  	case ssaop.OpXorInt8s:
  2648  		v.Op = ssaop.OpARM64ZEORD
  2649  		return true
  2650  	case ssaop.OpXorInt8x16:
  2651  		v.Op = ssaop.OpARM64VEOR16B
  2652  		return true
  2653  	case ssaop.OpXorUint16s:
  2654  		v.Op = ssaop.OpARM64ZEORD
  2655  		return true
  2656  	case ssaop.OpXorUint16x8:
  2657  		v.Op = ssaop.OpARM64VEOR16B
  2658  		return true
  2659  	case ssaop.OpXorUint32s:
  2660  		v.Op = ssaop.OpARM64ZEORD
  2661  		return true
  2662  	case ssaop.OpXorUint32x4:
  2663  		v.Op = ssaop.OpARM64VEOR16B
  2664  		return true
  2665  	case ssaop.OpXorUint64s:
  2666  		v.Op = ssaop.OpARM64ZEORD
  2667  		return true
  2668  	case ssaop.OpXorUint64x2:
  2669  		v.Op = ssaop.OpARM64VEOR16B
  2670  		return true
  2671  	case ssaop.OpXorUint8s:
  2672  		v.Op = ssaop.OpARM64ZEORD
  2673  		return true
  2674  	case ssaop.OpXorUint8x16:
  2675  		v.Op = ssaop.OpARM64VEOR16B
  2676  		return true
  2677  	case ssaop.OpZero:
  2678  		return rewriteValue_OpZero(v)
  2679  	case ssaop.OpZeroExt16to32:
  2680  		v.Op = ssaop.OpARM64MOVHUreg
  2681  		return true
  2682  	case ssaop.OpZeroExt16to64:
  2683  		v.Op = ssaop.OpARM64MOVHUreg
  2684  		return true
  2685  	case ssaop.OpZeroExt32to64:
  2686  		v.Op = ssaop.OpARM64MOVWUreg
  2687  		return true
  2688  	case ssaop.OpZeroExt8to16:
  2689  		v.Op = ssaop.OpARM64MOVBUreg
  2690  		return true
  2691  	case ssaop.OpZeroExt8to32:
  2692  		v.Op = ssaop.OpARM64MOVBUreg
  2693  		return true
  2694  	case ssaop.OpZeroExt8to64:
  2695  		v.Op = ssaop.OpARM64MOVBUreg
  2696  		return true
  2697  	case ssaop.OpZeroSIMD:
  2698  		return rewriteValue_OpZeroSIMD(v)
  2699  	case ssaop.OpbitSelectInt8x16:
  2700  		v.Op = ssaop.OpARM64VBIF16B
  2701  		return true
  2702  	case ssaop.OpbitSelectNotInt8x16:
  2703  		v.Op = ssaop.OpARM64VBIT16B
  2704  		return true
  2705  	case ssaop.Opbroadcast1To16Int8x16:
  2706  		return rewriteValue_Opbroadcast1To16Int8x16(v)
  2707  	case ssaop.Opbroadcast1To16Uint8x16:
  2708  		return rewriteValue_Opbroadcast1To16Uint8x16(v)
  2709  	case ssaop.Opbroadcast1To2Float64x2:
  2710  		return rewriteValue_Opbroadcast1To2Float64x2(v)
  2711  	case ssaop.Opbroadcast1To2Int64x2:
  2712  		return rewriteValue_Opbroadcast1To2Int64x2(v)
  2713  	case ssaop.Opbroadcast1To2Uint64x2:
  2714  		return rewriteValue_Opbroadcast1To2Uint64x2(v)
  2715  	case ssaop.Opbroadcast1To4Float32x4:
  2716  		return rewriteValue_Opbroadcast1To4Float32x4(v)
  2717  	case ssaop.Opbroadcast1To4Int32x4:
  2718  		return rewriteValue_Opbroadcast1To4Int32x4(v)
  2719  	case ssaop.Opbroadcast1To4Uint32x4:
  2720  		return rewriteValue_Opbroadcast1To4Uint32x4(v)
  2721  	case ssaop.Opbroadcast1To8Int16x8:
  2722  		return rewriteValue_Opbroadcast1To8Int16x8(v)
  2723  	case ssaop.Opbroadcast1To8Uint16x8:
  2724  		return rewriteValue_Opbroadcast1To8Uint16x8(v)
  2725  	case ssaop.OpcarrylessMultiplyWidenLoUint64x2:
  2726  		v.Op = ssaop.OpARM64VPMULL2D
  2727  		return true
  2728  	case ssaop.OpreduceMaxFloat32x4:
  2729  		v.Op = ssaop.OpARM64VFMAXV4S
  2730  		return true
  2731  	case ssaop.OpreduceMaxInt16x8:
  2732  		v.Op = ssaop.OpARM64VSMAXV8H
  2733  		return true
  2734  	case ssaop.OpreduceMaxInt32x4:
  2735  		v.Op = ssaop.OpARM64VSMAXV4S
  2736  		return true
  2737  	case ssaop.OpreduceMaxInt8x16:
  2738  		v.Op = ssaop.OpARM64VSMAXV16B
  2739  		return true
  2740  	case ssaop.OpreduceMaxUint16x8:
  2741  		v.Op = ssaop.OpARM64VUMAXV8H
  2742  		return true
  2743  	case ssaop.OpreduceMaxUint32x4:
  2744  		v.Op = ssaop.OpARM64VUMAXV4S
  2745  		return true
  2746  	case ssaop.OpreduceMaxUint8x16:
  2747  		v.Op = ssaop.OpARM64VUMAXV16B
  2748  		return true
  2749  	case ssaop.OpreduceMinFloat32x4:
  2750  		v.Op = ssaop.OpARM64VFMINV4S
  2751  		return true
  2752  	case ssaop.OpreduceMinInt16x8:
  2753  		v.Op = ssaop.OpARM64VSMINV8H
  2754  		return true
  2755  	case ssaop.OpreduceMinInt32x4:
  2756  		v.Op = ssaop.OpARM64VSMINV4S
  2757  		return true
  2758  	case ssaop.OpreduceMinInt8x16:
  2759  		v.Op = ssaop.OpARM64VSMINV16B
  2760  		return true
  2761  	case ssaop.OpreduceMinUint16x8:
  2762  		v.Op = ssaop.OpARM64VUMINV8H
  2763  		return true
  2764  	case ssaop.OpreduceMinUint32x4:
  2765  		v.Op = ssaop.OpARM64VUMINV4S
  2766  		return true
  2767  	case ssaop.OpreduceMinUint8x16:
  2768  		v.Op = ssaop.OpARM64VUMINV16B
  2769  		return true
  2770  	case ssaop.OpreduceSumInt16x8:
  2771  		v.Op = ssaop.OpARM64VADDV8H
  2772  		return true
  2773  	case ssaop.OpreduceSumInt32x4:
  2774  		v.Op = ssaop.OpARM64VADDV4S
  2775  		return true
  2776  	case ssaop.OpreduceSumInt8x16:
  2777  		v.Op = ssaop.OpARM64VADDV16B
  2778  		return true
  2779  	case ssaop.OpreduceSumUint16x8:
  2780  		v.Op = ssaop.OpARM64VADDV8H
  2781  		return true
  2782  	case ssaop.OpreduceSumUint32x4:
  2783  		v.Op = ssaop.OpARM64VADDV4S
  2784  		return true
  2785  	case ssaop.OpreduceSumUint8x16:
  2786  		v.Op = ssaop.OpARM64VADDV16B
  2787  		return true
  2788  	}
  2789  	return false
  2790  }
  2791  func rewriteValue_OpARM64ADCSflags(v *ssa.Value) bool {
  2792  	v_2 := v.Args[2]
  2793  	v_1 := v.Args[1]
  2794  	v_0 := v.Args[0]
  2795  	b := v.Block
  2796  	typ := &b.Func.Config.Types
  2797  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (ADCzerocarry <typ.UInt64> c))))
  2798  	// result: (ADCSflags x y c)
  2799  	for {
  2800  		x := v_0
  2801  		y := v_1
  2802  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
  2803  			break
  2804  		}
  2805  		v_2_0 := v_2.Args[0]
  2806  		if v_2_0.Op != ssaop.OpARM64ADDSconstflags || ssa.AuxIntToInt64(v_2_0.AuxInt) != -1 {
  2807  			break
  2808  		}
  2809  		v_2_0_0 := v_2_0.Args[0]
  2810  		if v_2_0_0.Op != ssaop.OpARM64ADCzerocarry || v_2_0_0.Type != typ.UInt64 {
  2811  			break
  2812  		}
  2813  		c := v_2_0_0.Args[0]
  2814  		v.Reset(ssaop.OpARM64ADCSflags)
  2815  		v.AddArg3(x, y, c)
  2816  		return true
  2817  	}
  2818  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (MOVDconst [0]))))
  2819  	// result: (ADDSflags x y)
  2820  	for {
  2821  		x := v_0
  2822  		y := v_1
  2823  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
  2824  			break
  2825  		}
  2826  		v_2_0 := v_2.Args[0]
  2827  		if v_2_0.Op != ssaop.OpARM64ADDSconstflags || ssa.AuxIntToInt64(v_2_0.AuxInt) != -1 {
  2828  			break
  2829  		}
  2830  		v_2_0_0 := v_2_0.Args[0]
  2831  		if v_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2_0_0.AuxInt) != 0 {
  2832  			break
  2833  		}
  2834  		v.Reset(ssaop.OpARM64ADDSflags)
  2835  		v.AddArg2(x, y)
  2836  		return true
  2837  	}
  2838  	return false
  2839  }
  2840  func rewriteValue_OpARM64ADD(v *ssa.Value) bool {
  2841  	v_1 := v.Args[1]
  2842  	v_0 := v.Args[0]
  2843  	b := v.Block
  2844  	// match: (ADD x (MOVDconst <t> [c]))
  2845  	// cond: !t.IsPtr()
  2846  	// result: (ADDconst [c] x)
  2847  	for {
  2848  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2849  			x := v_0
  2850  			if v_1.Op != ssaop.OpARM64MOVDconst {
  2851  				continue
  2852  			}
  2853  			t := v_1.Type
  2854  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  2855  			if !(!t.IsPtr()) {
  2856  				continue
  2857  			}
  2858  			v.Reset(ssaop.OpARM64ADDconst)
  2859  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2860  			v.AddArg(x)
  2861  			return true
  2862  		}
  2863  		break
  2864  	}
  2865  	// match: (ADD a l:(MUL x y))
  2866  	// cond: l.Uses==1 && ssa.Clobber(l)
  2867  	// result: (MADD a x y)
  2868  	for {
  2869  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2870  			a := v_0
  2871  			l := v_1
  2872  			if l.Op != ssaop.OpARM64MUL {
  2873  				continue
  2874  			}
  2875  			y := l.Args[1]
  2876  			x := l.Args[0]
  2877  			if !(l.Uses == 1 && ssa.Clobber(l)) {
  2878  				continue
  2879  			}
  2880  			v.Reset(ssaop.OpARM64MADD)
  2881  			v.AddArg3(a, x, y)
  2882  			return true
  2883  		}
  2884  		break
  2885  	}
  2886  	// match: (ADD a l:(MNEG x y))
  2887  	// cond: l.Uses==1 && ssa.Clobber(l)
  2888  	// result: (MSUB a x y)
  2889  	for {
  2890  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2891  			a := v_0
  2892  			l := v_1
  2893  			if l.Op != ssaop.OpARM64MNEG {
  2894  				continue
  2895  			}
  2896  			y := l.Args[1]
  2897  			x := l.Args[0]
  2898  			if !(l.Uses == 1 && ssa.Clobber(l)) {
  2899  				continue
  2900  			}
  2901  			v.Reset(ssaop.OpARM64MSUB)
  2902  			v.AddArg3(a, x, y)
  2903  			return true
  2904  		}
  2905  		break
  2906  	}
  2907  	// match: (ADD a l:(MULW x y))
  2908  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
  2909  	// result: (MADDW a x y)
  2910  	for {
  2911  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2912  			a := v_0
  2913  			l := v_1
  2914  			if l.Op != ssaop.OpARM64MULW {
  2915  				continue
  2916  			}
  2917  			y := l.Args[1]
  2918  			x := l.Args[0]
  2919  			if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
  2920  				continue
  2921  			}
  2922  			v.Reset(ssaop.OpARM64MADDW)
  2923  			v.AddArg3(a, x, y)
  2924  			return true
  2925  		}
  2926  		break
  2927  	}
  2928  	// match: (ADD a l:(MNEGW x y))
  2929  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
  2930  	// result: (MSUBW a x y)
  2931  	for {
  2932  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2933  			a := v_0
  2934  			l := v_1
  2935  			if l.Op != ssaop.OpARM64MNEGW {
  2936  				continue
  2937  			}
  2938  			y := l.Args[1]
  2939  			x := l.Args[0]
  2940  			if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
  2941  				continue
  2942  			}
  2943  			v.Reset(ssaop.OpARM64MSUBW)
  2944  			v.AddArg3(a, x, y)
  2945  			return true
  2946  		}
  2947  		break
  2948  	}
  2949  	// match: (ADD <t> a p:(ADDconst [c] m:(MUL _ _)))
  2950  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2951  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2952  	for {
  2953  		t := v.Type
  2954  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2955  			a := v_0
  2956  			p := v_1
  2957  			if p.Op != ssaop.OpARM64ADDconst {
  2958  				continue
  2959  			}
  2960  			c := ssa.AuxIntToInt64(p.AuxInt)
  2961  			m := p.Args[0]
  2962  			if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2963  				continue
  2964  			}
  2965  			v.Reset(ssaop.OpARM64ADDconst)
  2966  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2967  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2968  			v0.AddArg2(a, m)
  2969  			v.AddArg(v0)
  2970  			return true
  2971  		}
  2972  		break
  2973  	}
  2974  	// match: (ADD <t> a p:(ADDconst [c] m:(MULW _ _)))
  2975  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2976  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2977  	for {
  2978  		t := v.Type
  2979  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2980  			a := v_0
  2981  			p := v_1
  2982  			if p.Op != ssaop.OpARM64ADDconst {
  2983  				continue
  2984  			}
  2985  			c := ssa.AuxIntToInt64(p.AuxInt)
  2986  			m := p.Args[0]
  2987  			if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2988  				continue
  2989  			}
  2990  			v.Reset(ssaop.OpARM64ADDconst)
  2991  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2992  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2993  			v0.AddArg2(a, m)
  2994  			v.AddArg(v0)
  2995  			return true
  2996  		}
  2997  		break
  2998  	}
  2999  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEG _ _)))
  3000  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3001  	// result: (ADDconst [c] (ADD <v.Type> a m))
  3002  	for {
  3003  		t := v.Type
  3004  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3005  			a := v_0
  3006  			p := v_1
  3007  			if p.Op != ssaop.OpARM64ADDconst {
  3008  				continue
  3009  			}
  3010  			c := ssa.AuxIntToInt64(p.AuxInt)
  3011  			m := p.Args[0]
  3012  			if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3013  				continue
  3014  			}
  3015  			v.Reset(ssaop.OpARM64ADDconst)
  3016  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3017  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3018  			v0.AddArg2(a, m)
  3019  			v.AddArg(v0)
  3020  			return true
  3021  		}
  3022  		break
  3023  	}
  3024  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEGW _ _)))
  3025  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3026  	// result: (ADDconst [c] (ADD <v.Type> a m))
  3027  	for {
  3028  		t := v.Type
  3029  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3030  			a := v_0
  3031  			p := v_1
  3032  			if p.Op != ssaop.OpARM64ADDconst {
  3033  				continue
  3034  			}
  3035  			c := ssa.AuxIntToInt64(p.AuxInt)
  3036  			m := p.Args[0]
  3037  			if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3038  				continue
  3039  			}
  3040  			v.Reset(ssaop.OpARM64ADDconst)
  3041  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3042  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3043  			v0.AddArg2(a, m)
  3044  			v.AddArg(v0)
  3045  			return true
  3046  		}
  3047  		break
  3048  	}
  3049  	// match: (ADD <t> a p:(SUBconst [c] m:(MUL _ _)))
  3050  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3051  	// result: (SUBconst [c] (ADD <v.Type> a m))
  3052  	for {
  3053  		t := v.Type
  3054  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3055  			a := v_0
  3056  			p := v_1
  3057  			if p.Op != ssaop.OpARM64SUBconst {
  3058  				continue
  3059  			}
  3060  			c := ssa.AuxIntToInt64(p.AuxInt)
  3061  			m := p.Args[0]
  3062  			if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3063  				continue
  3064  			}
  3065  			v.Reset(ssaop.OpARM64SUBconst)
  3066  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3067  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3068  			v0.AddArg2(a, m)
  3069  			v.AddArg(v0)
  3070  			return true
  3071  		}
  3072  		break
  3073  	}
  3074  	// match: (ADD <t> a p:(SUBconst [c] m:(MULW _ _)))
  3075  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3076  	// result: (SUBconst [c] (ADD <v.Type> a m))
  3077  	for {
  3078  		t := v.Type
  3079  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3080  			a := v_0
  3081  			p := v_1
  3082  			if p.Op != ssaop.OpARM64SUBconst {
  3083  				continue
  3084  			}
  3085  			c := ssa.AuxIntToInt64(p.AuxInt)
  3086  			m := p.Args[0]
  3087  			if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3088  				continue
  3089  			}
  3090  			v.Reset(ssaop.OpARM64SUBconst)
  3091  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3092  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3093  			v0.AddArg2(a, m)
  3094  			v.AddArg(v0)
  3095  			return true
  3096  		}
  3097  		break
  3098  	}
  3099  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEG _ _)))
  3100  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3101  	// result: (SUBconst [c] (ADD <v.Type> a m))
  3102  	for {
  3103  		t := v.Type
  3104  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3105  			a := v_0
  3106  			p := v_1
  3107  			if p.Op != ssaop.OpARM64SUBconst {
  3108  				continue
  3109  			}
  3110  			c := ssa.AuxIntToInt64(p.AuxInt)
  3111  			m := p.Args[0]
  3112  			if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3113  				continue
  3114  			}
  3115  			v.Reset(ssaop.OpARM64SUBconst)
  3116  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3117  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3118  			v0.AddArg2(a, m)
  3119  			v.AddArg(v0)
  3120  			return true
  3121  		}
  3122  		break
  3123  	}
  3124  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEGW _ _)))
  3125  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3126  	// result: (SUBconst [c] (ADD <v.Type> a m))
  3127  	for {
  3128  		t := v.Type
  3129  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3130  			a := v_0
  3131  			p := v_1
  3132  			if p.Op != ssaop.OpARM64SUBconst {
  3133  				continue
  3134  			}
  3135  			c := ssa.AuxIntToInt64(p.AuxInt)
  3136  			m := p.Args[0]
  3137  			if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3138  				continue
  3139  			}
  3140  			v.Reset(ssaop.OpARM64SUBconst)
  3141  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3142  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3143  			v0.AddArg2(a, m)
  3144  			v.AddArg(v0)
  3145  			return true
  3146  		}
  3147  		break
  3148  	}
  3149  	// match: (ADD x (NEG y))
  3150  	// result: (SUB x y)
  3151  	for {
  3152  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3153  			x := v_0
  3154  			if v_1.Op != ssaop.OpARM64NEG {
  3155  				continue
  3156  			}
  3157  			y := v_1.Args[0]
  3158  			v.Reset(ssaop.OpARM64SUB)
  3159  			v.AddArg2(x, y)
  3160  			return true
  3161  		}
  3162  		break
  3163  	}
  3164  	// match: (ADD x0 x1:(SLLconst [c] y))
  3165  	// cond: ssa.ClobberIfDead(x1)
  3166  	// result: (ADDshiftLL x0 y [c])
  3167  	for {
  3168  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3169  			x0 := v_0
  3170  			x1 := v_1
  3171  			if x1.Op != ssaop.OpARM64SLLconst {
  3172  				continue
  3173  			}
  3174  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3175  			y := x1.Args[0]
  3176  			if !(ssa.ClobberIfDead(x1)) {
  3177  				continue
  3178  			}
  3179  			v.Reset(ssaop.OpARM64ADDshiftLL)
  3180  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3181  			v.AddArg2(x0, y)
  3182  			return true
  3183  		}
  3184  		break
  3185  	}
  3186  	// match: (ADD x0 x1:(SRLconst [c] y))
  3187  	// cond: ssa.ClobberIfDead(x1)
  3188  	// result: (ADDshiftRL x0 y [c])
  3189  	for {
  3190  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3191  			x0 := v_0
  3192  			x1 := v_1
  3193  			if x1.Op != ssaop.OpARM64SRLconst {
  3194  				continue
  3195  			}
  3196  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3197  			y := x1.Args[0]
  3198  			if !(ssa.ClobberIfDead(x1)) {
  3199  				continue
  3200  			}
  3201  			v.Reset(ssaop.OpARM64ADDshiftRL)
  3202  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3203  			v.AddArg2(x0, y)
  3204  			return true
  3205  		}
  3206  		break
  3207  	}
  3208  	// match: (ADD x0 x1:(SRAconst [c] y))
  3209  	// cond: ssa.ClobberIfDead(x1)
  3210  	// result: (ADDshiftRA x0 y [c])
  3211  	for {
  3212  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3213  			x0 := v_0
  3214  			x1 := v_1
  3215  			if x1.Op != ssaop.OpARM64SRAconst {
  3216  				continue
  3217  			}
  3218  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3219  			y := x1.Args[0]
  3220  			if !(ssa.ClobberIfDead(x1)) {
  3221  				continue
  3222  			}
  3223  			v.Reset(ssaop.OpARM64ADDshiftRA)
  3224  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3225  			v.AddArg2(x0, y)
  3226  			return true
  3227  		}
  3228  		break
  3229  	}
  3230  	// match: (ADD x0 x1:(ANDshiftRA x2:(SLLconst [sl] y) z [63]))
  3231  	// cond: x1.Uses == 1 && x2.Uses == 1
  3232  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  3233  	for {
  3234  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3235  			x0 := v_0
  3236  			x1 := v_1
  3237  			if x1.Op != ssaop.OpARM64ANDshiftRA || ssa.AuxIntToInt64(x1.AuxInt) != 63 {
  3238  				continue
  3239  			}
  3240  			z := x1.Args[1]
  3241  			x2 := x1.Args[0]
  3242  			if x2.Op != ssaop.OpARM64SLLconst {
  3243  				continue
  3244  			}
  3245  			sl := ssa.AuxIntToInt64(x2.AuxInt)
  3246  			y := x2.Args[0]
  3247  			if !(x1.Uses == 1 && x2.Uses == 1) {
  3248  				continue
  3249  			}
  3250  			v.Reset(ssaop.OpARM64ADDshiftLL)
  3251  			v.AuxInt = ssa.Int64ToAuxInt(sl)
  3252  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDshiftRA, y.Type)
  3253  			v0.AuxInt = ssa.Int64ToAuxInt(63)
  3254  			v0.AddArg2(y, z)
  3255  			v.AddArg2(x0, v0)
  3256  			return true
  3257  		}
  3258  		break
  3259  	}
  3260  	// match: (ADD x0 x1:(ANDshiftLL x2:(SRAconst [63] z) y [sl]))
  3261  	// cond: x1.Uses == 1 && x2.Uses == 1
  3262  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  3263  	for {
  3264  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3265  			x0 := v_0
  3266  			x1 := v_1
  3267  			if x1.Op != ssaop.OpARM64ANDshiftLL {
  3268  				continue
  3269  			}
  3270  			sl := ssa.AuxIntToInt64(x1.AuxInt)
  3271  			y := x1.Args[1]
  3272  			x2 := x1.Args[0]
  3273  			if x2.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(x2.AuxInt) != 63 {
  3274  				continue
  3275  			}
  3276  			z := x2.Args[0]
  3277  			if !(x1.Uses == 1 && x2.Uses == 1) {
  3278  				continue
  3279  			}
  3280  			v.Reset(ssaop.OpARM64ADDshiftLL)
  3281  			v.AuxInt = ssa.Int64ToAuxInt(sl)
  3282  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDshiftRA, y.Type)
  3283  			v0.AuxInt = ssa.Int64ToAuxInt(63)
  3284  			v0.AddArg2(y, z)
  3285  			v.AddArg2(x0, v0)
  3286  			return true
  3287  		}
  3288  		break
  3289  	}
  3290  	return false
  3291  }
  3292  func rewriteValue_OpARM64ADDSflags(v *ssa.Value) bool {
  3293  	v_1 := v.Args[1]
  3294  	v_0 := v.Args[0]
  3295  	// match: (ADDSflags x (MOVDconst [c]))
  3296  	// result: (ADDSconstflags [c] x)
  3297  	for {
  3298  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3299  			x := v_0
  3300  			if v_1.Op != ssaop.OpARM64MOVDconst {
  3301  				continue
  3302  			}
  3303  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  3304  			v.Reset(ssaop.OpARM64ADDSconstflags)
  3305  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3306  			v.AddArg(x)
  3307  			return true
  3308  		}
  3309  		break
  3310  	}
  3311  	return false
  3312  }
  3313  func rewriteValue_OpARM64ADDconst(v *ssa.Value) bool {
  3314  	v_0 := v.Args[0]
  3315  	// match: (ADDconst [off1] (MOVDaddr [off2] {sym} ptr))
  3316  	// cond: ssa.Is32Bit(off1+int64(off2))
  3317  	// result: (MOVDaddr [int32(off1)+off2] {sym} ptr)
  3318  	for {
  3319  		off1 := ssa.AuxIntToInt64(v.AuxInt)
  3320  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  3321  			break
  3322  		}
  3323  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3324  		sym := ssa.AuxToSym(v_0.Aux)
  3325  		ptr := v_0.Args[0]
  3326  		if !(ssa.Is32Bit(off1 + int64(off2))) {
  3327  			break
  3328  		}
  3329  		v.Reset(ssaop.OpARM64MOVDaddr)
  3330  		v.AuxInt = ssa.Int32ToAuxInt(int32(off1) + off2)
  3331  		v.Aux = ssa.SymToAux(sym)
  3332  		v.AddArg(ptr)
  3333  		return true
  3334  	}
  3335  	// match: (ADDconst [c] y)
  3336  	// cond: c < 0
  3337  	// result: (SUBconst [-c] y)
  3338  	for {
  3339  		c := ssa.AuxIntToInt64(v.AuxInt)
  3340  		y := v_0
  3341  		if !(c < 0) {
  3342  			break
  3343  		}
  3344  		v.Reset(ssaop.OpARM64SUBconst)
  3345  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  3346  		v.AddArg(y)
  3347  		return true
  3348  	}
  3349  	// match: (ADDconst [0] x)
  3350  	// result: x
  3351  	for {
  3352  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  3353  			break
  3354  		}
  3355  		x := v_0
  3356  		v.CopyOf(x)
  3357  		return true
  3358  	}
  3359  	// match: (ADDconst [c] (MOVDconst [d]))
  3360  	// result: (MOVDconst [c+d])
  3361  	for {
  3362  		c := ssa.AuxIntToInt64(v.AuxInt)
  3363  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3364  			break
  3365  		}
  3366  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3367  		v.Reset(ssaop.OpARM64MOVDconst)
  3368  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  3369  		return true
  3370  	}
  3371  	// match: (ADDconst [c] (ADDconst [d] x))
  3372  	// result: (ADDconst [c+d] x)
  3373  	for {
  3374  		c := ssa.AuxIntToInt64(v.AuxInt)
  3375  		if v_0.Op != ssaop.OpARM64ADDconst {
  3376  			break
  3377  		}
  3378  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3379  		x := v_0.Args[0]
  3380  		v.Reset(ssaop.OpARM64ADDconst)
  3381  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  3382  		v.AddArg(x)
  3383  		return true
  3384  	}
  3385  	// match: (ADDconst [c] (SUBconst [d] x))
  3386  	// result: (ADDconst [c-d] x)
  3387  	for {
  3388  		c := ssa.AuxIntToInt64(v.AuxInt)
  3389  		if v_0.Op != ssaop.OpARM64SUBconst {
  3390  			break
  3391  		}
  3392  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3393  		x := v_0.Args[0]
  3394  		v.Reset(ssaop.OpARM64ADDconst)
  3395  		v.AuxInt = ssa.Int64ToAuxInt(c - d)
  3396  		v.AddArg(x)
  3397  		return true
  3398  	}
  3399  	return false
  3400  }
  3401  func rewriteValue_OpARM64ADDshiftLL(v *ssa.Value) bool {
  3402  	v_1 := v.Args[1]
  3403  	v_0 := v.Args[0]
  3404  	b := v.Block
  3405  	typ := &b.Func.Config.Types
  3406  	// match: (ADDshiftLL (MOVDconst [c]) x [d])
  3407  	// result: (ADDconst [c] (SLLconst <x.Type> x [d]))
  3408  	for {
  3409  		d := ssa.AuxIntToInt64(v.AuxInt)
  3410  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3411  			break
  3412  		}
  3413  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3414  		x := v_1
  3415  		v.Reset(ssaop.OpARM64ADDconst)
  3416  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3417  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  3418  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3419  		v0.AddArg(x)
  3420  		v.AddArg(v0)
  3421  		return true
  3422  	}
  3423  	// match: (ADDshiftLL x (MOVDconst [c]) [d])
  3424  	// result: (ADDconst x [int64(uint64(c)<<uint64(d))])
  3425  	for {
  3426  		d := ssa.AuxIntToInt64(v.AuxInt)
  3427  		x := v_0
  3428  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3429  			break
  3430  		}
  3431  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3432  		v.Reset(ssaop.OpARM64ADDconst)
  3433  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  3434  		v.AddArg(x)
  3435  		return true
  3436  	}
  3437  	// match: (ADDshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
  3438  	// result: (REV16W x)
  3439  	for {
  3440  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
  3441  			break
  3442  		}
  3443  		x := v_0.Args[0]
  3444  		if x != v_1 {
  3445  			break
  3446  		}
  3447  		v.Reset(ssaop.OpARM64REV16W)
  3448  		v.AddArg(x)
  3449  		return true
  3450  	}
  3451  	// match: (ADDshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
  3452  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
  3453  	// result: (REV16W x)
  3454  	for {
  3455  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
  3456  			break
  3457  		}
  3458  		v_0_0 := v_0.Args[0]
  3459  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3460  			break
  3461  		}
  3462  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3463  		x := v_0_0.Args[0]
  3464  		if v_1.Op != ssaop.OpARM64ANDconst {
  3465  			break
  3466  		}
  3467  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3468  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
  3469  			break
  3470  		}
  3471  		v.Reset(ssaop.OpARM64REV16W)
  3472  		v.AddArg(x)
  3473  		return true
  3474  	}
  3475  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  3476  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
  3477  	// result: (REV16 x)
  3478  	for {
  3479  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
  3480  			break
  3481  		}
  3482  		v_0_0 := v_0.Args[0]
  3483  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3484  			break
  3485  		}
  3486  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3487  		x := v_0_0.Args[0]
  3488  		if v_1.Op != ssaop.OpARM64ANDconst {
  3489  			break
  3490  		}
  3491  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3492  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
  3493  			break
  3494  		}
  3495  		v.Reset(ssaop.OpARM64REV16)
  3496  		v.AddArg(x)
  3497  		return true
  3498  	}
  3499  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  3500  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
  3501  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
  3502  	for {
  3503  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
  3504  			break
  3505  		}
  3506  		v_0_0 := v_0.Args[0]
  3507  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3508  			break
  3509  		}
  3510  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3511  		x := v_0_0.Args[0]
  3512  		if v_1.Op != ssaop.OpARM64ANDconst {
  3513  			break
  3514  		}
  3515  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3516  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
  3517  			break
  3518  		}
  3519  		v.Reset(ssaop.OpARM64REV16)
  3520  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
  3521  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
  3522  		v0.AddArg(x)
  3523  		v.AddArg(v0)
  3524  		return true
  3525  	}
  3526  	// match: (ADDshiftLL [c] (SRLconst x [64-c]) x2)
  3527  	// result: (EXTRconst [64-c] x2 x)
  3528  	for {
  3529  		c := ssa.AuxIntToInt64(v.AuxInt)
  3530  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
  3531  			break
  3532  		}
  3533  		x := v_0.Args[0]
  3534  		x2 := v_1
  3535  		v.Reset(ssaop.OpARM64EXTRconst)
  3536  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
  3537  		v.AddArg2(x2, x)
  3538  		return true
  3539  	}
  3540  	// match: (ADDshiftLL <t> [c] (UBFX [bfc] x) x2)
  3541  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
  3542  	// result: (EXTRWconst [32-c] x2 x)
  3543  	for {
  3544  		t := v.Type
  3545  		c := ssa.AuxIntToInt64(v.AuxInt)
  3546  		if v_0.Op != ssaop.OpARM64UBFX {
  3547  			break
  3548  		}
  3549  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
  3550  		x := v_0.Args[0]
  3551  		x2 := v_1
  3552  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
  3553  			break
  3554  		}
  3555  		v.Reset(ssaop.OpARM64EXTRWconst)
  3556  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
  3557  		v.AddArg2(x2, x)
  3558  		return true
  3559  	}
  3560  	return false
  3561  }
  3562  func rewriteValue_OpARM64ADDshiftRA(v *ssa.Value) bool {
  3563  	v_1 := v.Args[1]
  3564  	v_0 := v.Args[0]
  3565  	b := v.Block
  3566  	// match: (ADDshiftRA (MOVDconst [c]) x [d])
  3567  	// result: (ADDconst [c] (SRAconst <x.Type> x [d]))
  3568  	for {
  3569  		d := ssa.AuxIntToInt64(v.AuxInt)
  3570  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3571  			break
  3572  		}
  3573  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3574  		x := v_1
  3575  		v.Reset(ssaop.OpARM64ADDconst)
  3576  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3577  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  3578  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3579  		v0.AddArg(x)
  3580  		v.AddArg(v0)
  3581  		return true
  3582  	}
  3583  	// match: (ADDshiftRA x (MOVDconst [c]) [d])
  3584  	// result: (ADDconst x [c>>uint64(d)])
  3585  	for {
  3586  		d := ssa.AuxIntToInt64(v.AuxInt)
  3587  		x := v_0
  3588  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3589  			break
  3590  		}
  3591  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3592  		v.Reset(ssaop.OpARM64ADDconst)
  3593  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  3594  		v.AddArg(x)
  3595  		return true
  3596  	}
  3597  	return false
  3598  }
  3599  func rewriteValue_OpARM64ADDshiftRL(v *ssa.Value) bool {
  3600  	v_1 := v.Args[1]
  3601  	v_0 := v.Args[0]
  3602  	b := v.Block
  3603  	// match: (ADDshiftRL (MOVDconst [c]) x [d])
  3604  	// result: (ADDconst [c] (SRLconst <x.Type> x [d]))
  3605  	for {
  3606  		d := ssa.AuxIntToInt64(v.AuxInt)
  3607  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3608  			break
  3609  		}
  3610  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3611  		x := v_1
  3612  		v.Reset(ssaop.OpARM64ADDconst)
  3613  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3614  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  3615  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3616  		v0.AddArg(x)
  3617  		v.AddArg(v0)
  3618  		return true
  3619  	}
  3620  	// match: (ADDshiftRL x (MOVDconst [c]) [d])
  3621  	// result: (ADDconst x [int64(uint64(c)>>uint64(d))])
  3622  	for {
  3623  		d := ssa.AuxIntToInt64(v.AuxInt)
  3624  		x := v_0
  3625  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3626  			break
  3627  		}
  3628  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3629  		v.Reset(ssaop.OpARM64ADDconst)
  3630  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  3631  		v.AddArg(x)
  3632  		return true
  3633  	}
  3634  	return false
  3635  }
  3636  func rewriteValue_OpARM64AND(v *ssa.Value) bool {
  3637  	v_1 := v.Args[1]
  3638  	v_0 := v.Args[0]
  3639  	// match: (AND x (MOVDconst [c]))
  3640  	// result: (ANDconst [c] x)
  3641  	for {
  3642  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3643  			x := v_0
  3644  			if v_1.Op != ssaop.OpARM64MOVDconst {
  3645  				continue
  3646  			}
  3647  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  3648  			v.Reset(ssaop.OpARM64ANDconst)
  3649  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3650  			v.AddArg(x)
  3651  			return true
  3652  		}
  3653  		break
  3654  	}
  3655  	// match: (AND x x)
  3656  	// result: x
  3657  	for {
  3658  		x := v_0
  3659  		if x != v_1 {
  3660  			break
  3661  		}
  3662  		v.CopyOf(x)
  3663  		return true
  3664  	}
  3665  	// match: (AND x (MVN y))
  3666  	// result: (BIC x y)
  3667  	for {
  3668  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3669  			x := v_0
  3670  			if v_1.Op != ssaop.OpARM64MVN {
  3671  				continue
  3672  			}
  3673  			y := v_1.Args[0]
  3674  			v.Reset(ssaop.OpARM64BIC)
  3675  			v.AddArg2(x, y)
  3676  			return true
  3677  		}
  3678  		break
  3679  	}
  3680  	// match: (AND x0 x1:(SLLconst [c] y))
  3681  	// cond: ssa.ClobberIfDead(x1)
  3682  	// result: (ANDshiftLL x0 y [c])
  3683  	for {
  3684  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3685  			x0 := v_0
  3686  			x1 := v_1
  3687  			if x1.Op != ssaop.OpARM64SLLconst {
  3688  				continue
  3689  			}
  3690  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3691  			y := x1.Args[0]
  3692  			if !(ssa.ClobberIfDead(x1)) {
  3693  				continue
  3694  			}
  3695  			v.Reset(ssaop.OpARM64ANDshiftLL)
  3696  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3697  			v.AddArg2(x0, y)
  3698  			return true
  3699  		}
  3700  		break
  3701  	}
  3702  	// match: (AND x0 x1:(SRLconst [c] y))
  3703  	// cond: ssa.ClobberIfDead(x1)
  3704  	// result: (ANDshiftRL x0 y [c])
  3705  	for {
  3706  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3707  			x0 := v_0
  3708  			x1 := v_1
  3709  			if x1.Op != ssaop.OpARM64SRLconst {
  3710  				continue
  3711  			}
  3712  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3713  			y := x1.Args[0]
  3714  			if !(ssa.ClobberIfDead(x1)) {
  3715  				continue
  3716  			}
  3717  			v.Reset(ssaop.OpARM64ANDshiftRL)
  3718  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3719  			v.AddArg2(x0, y)
  3720  			return true
  3721  		}
  3722  		break
  3723  	}
  3724  	// match: (AND x0 x1:(SRAconst [c] y))
  3725  	// cond: ssa.ClobberIfDead(x1)
  3726  	// result: (ANDshiftRA x0 y [c])
  3727  	for {
  3728  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3729  			x0 := v_0
  3730  			x1 := v_1
  3731  			if x1.Op != ssaop.OpARM64SRAconst {
  3732  				continue
  3733  			}
  3734  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3735  			y := x1.Args[0]
  3736  			if !(ssa.ClobberIfDead(x1)) {
  3737  				continue
  3738  			}
  3739  			v.Reset(ssaop.OpARM64ANDshiftRA)
  3740  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3741  			v.AddArg2(x0, y)
  3742  			return true
  3743  		}
  3744  		break
  3745  	}
  3746  	// match: (AND x0 x1:(RORconst [c] y))
  3747  	// cond: ssa.ClobberIfDead(x1)
  3748  	// result: (ANDshiftRO x0 y [c])
  3749  	for {
  3750  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3751  			x0 := v_0
  3752  			x1 := v_1
  3753  			if x1.Op != ssaop.OpARM64RORconst {
  3754  				continue
  3755  			}
  3756  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3757  			y := x1.Args[0]
  3758  			if !(ssa.ClobberIfDead(x1)) {
  3759  				continue
  3760  			}
  3761  			v.Reset(ssaop.OpARM64ANDshiftRO)
  3762  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3763  			v.AddArg2(x0, y)
  3764  			return true
  3765  		}
  3766  		break
  3767  	}
  3768  	return false
  3769  }
  3770  func rewriteValue_OpARM64ANDconst(v *ssa.Value) bool {
  3771  	v_0 := v.Args[0]
  3772  	// match: (ANDconst [0] _)
  3773  	// result: (MOVDconst [0])
  3774  	for {
  3775  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  3776  			break
  3777  		}
  3778  		v.Reset(ssaop.OpARM64MOVDconst)
  3779  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3780  		return true
  3781  	}
  3782  	// match: (ANDconst [-1] x)
  3783  	// result: x
  3784  	for {
  3785  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
  3786  			break
  3787  		}
  3788  		x := v_0
  3789  		v.CopyOf(x)
  3790  		return true
  3791  	}
  3792  	// match: (ANDconst [c] (MOVDconst [d]))
  3793  	// result: (MOVDconst [c&d])
  3794  	for {
  3795  		c := ssa.AuxIntToInt64(v.AuxInt)
  3796  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3797  			break
  3798  		}
  3799  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3800  		v.Reset(ssaop.OpARM64MOVDconst)
  3801  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  3802  		return true
  3803  	}
  3804  	// match: (ANDconst [c] (ANDconst [d] x))
  3805  	// result: (ANDconst [c&d] x)
  3806  	for {
  3807  		c := ssa.AuxIntToInt64(v.AuxInt)
  3808  		if v_0.Op != ssaop.OpARM64ANDconst {
  3809  			break
  3810  		}
  3811  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3812  		x := v_0.Args[0]
  3813  		v.Reset(ssaop.OpARM64ANDconst)
  3814  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  3815  		v.AddArg(x)
  3816  		return true
  3817  	}
  3818  	// match: (ANDconst [c] (MOVWUreg x))
  3819  	// result: (ANDconst [c&(1<<32-1)] x)
  3820  	for {
  3821  		c := ssa.AuxIntToInt64(v.AuxInt)
  3822  		if v_0.Op != ssaop.OpARM64MOVWUreg {
  3823  			break
  3824  		}
  3825  		x := v_0.Args[0]
  3826  		v.Reset(ssaop.OpARM64ANDconst)
  3827  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<32 - 1))
  3828  		v.AddArg(x)
  3829  		return true
  3830  	}
  3831  	// match: (ANDconst [c] (MOVHUreg x))
  3832  	// result: (ANDconst [c&(1<<16-1)] x)
  3833  	for {
  3834  		c := ssa.AuxIntToInt64(v.AuxInt)
  3835  		if v_0.Op != ssaop.OpARM64MOVHUreg {
  3836  			break
  3837  		}
  3838  		x := v_0.Args[0]
  3839  		v.Reset(ssaop.OpARM64ANDconst)
  3840  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<16 - 1))
  3841  		v.AddArg(x)
  3842  		return true
  3843  	}
  3844  	// match: (ANDconst [c] (MOVBUreg x))
  3845  	// result: (ANDconst [c&(1<<8-1)] x)
  3846  	for {
  3847  		c := ssa.AuxIntToInt64(v.AuxInt)
  3848  		if v_0.Op != ssaop.OpARM64MOVBUreg {
  3849  			break
  3850  		}
  3851  		x := v_0.Args[0]
  3852  		v.Reset(ssaop.OpARM64ANDconst)
  3853  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<8 - 1))
  3854  		v.AddArg(x)
  3855  		return true
  3856  	}
  3857  	// match: (ANDconst [ac] (SLLconst [sc] x))
  3858  	// cond: isARM64BFMask(sc, ac, sc)
  3859  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
  3860  	for {
  3861  		ac := ssa.AuxIntToInt64(v.AuxInt)
  3862  		if v_0.Op != ssaop.OpARM64SLLconst {
  3863  			break
  3864  		}
  3865  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
  3866  		x := v_0.Args[0]
  3867  		if !(isARM64BFMask(sc, ac, sc)) {
  3868  			break
  3869  		}
  3870  		v.Reset(ssaop.OpARM64UBFIZ)
  3871  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc)))
  3872  		v.AddArg(x)
  3873  		return true
  3874  	}
  3875  	// match: (ANDconst [ac] (SRLconst [sc] x))
  3876  	// cond: isARM64BFMask(sc, ac, 0)
  3877  	// result: (UBFX [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
  3878  	for {
  3879  		ac := ssa.AuxIntToInt64(v.AuxInt)
  3880  		if v_0.Op != ssaop.OpARM64SRLconst {
  3881  			break
  3882  		}
  3883  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
  3884  		x := v_0.Args[0]
  3885  		if !(isARM64BFMask(sc, ac, 0)) {
  3886  			break
  3887  		}
  3888  		v.Reset(ssaop.OpARM64UBFX)
  3889  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0)))
  3890  		v.AddArg(x)
  3891  		return true
  3892  	}
  3893  	// match: (ANDconst [c] (UBFX [bfc] x))
  3894  	// cond: isARM64BFMask(0, c, 0)
  3895  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), arm64BFWidth(c, 0)))] x)
  3896  	for {
  3897  		c := ssa.AuxIntToInt64(v.AuxInt)
  3898  		if v_0.Op != ssaop.OpARM64UBFX {
  3899  			break
  3900  		}
  3901  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
  3902  		x := v_0.Args[0]
  3903  		if !(isARM64BFMask(0, c, 0)) {
  3904  			break
  3905  		}
  3906  		v.Reset(ssaop.OpARM64UBFX)
  3907  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), arm64BFWidth(c, 0))))
  3908  		v.AddArg(x)
  3909  		return true
  3910  	}
  3911  	// match: (ANDconst [0xffffffff] x)
  3912  	// result: (MOVWUreg x)
  3913  	for {
  3914  		if ssa.AuxIntToInt64(v.AuxInt) != 0xffffffff {
  3915  			break
  3916  		}
  3917  		x := v_0
  3918  		v.Reset(ssaop.OpARM64MOVWUreg)
  3919  		v.AddArg(x)
  3920  		return true
  3921  	}
  3922  	// match: (ANDconst [0xffff ] x)
  3923  	// result: (MOVHUreg x)
  3924  	for {
  3925  		if ssa.AuxIntToInt64(v.AuxInt) != 0xffff {
  3926  			break
  3927  		}
  3928  		x := v_0
  3929  		v.Reset(ssaop.OpARM64MOVHUreg)
  3930  		v.AddArg(x)
  3931  		return true
  3932  	}
  3933  	// match: (ANDconst [0xff ] x)
  3934  	// result: (MOVBUreg x)
  3935  	for {
  3936  		if ssa.AuxIntToInt64(v.AuxInt) != 0xff {
  3937  			break
  3938  		}
  3939  		x := v_0
  3940  		v.Reset(ssaop.OpARM64MOVBUreg)
  3941  		v.AddArg(x)
  3942  		return true
  3943  	}
  3944  	return false
  3945  }
  3946  func rewriteValue_OpARM64ANDshiftLL(v *ssa.Value) bool {
  3947  	v_1 := v.Args[1]
  3948  	v_0 := v.Args[0]
  3949  	b := v.Block
  3950  	// match: (ANDshiftLL (MOVDconst [c]) x [d])
  3951  	// result: (ANDconst [c] (SLLconst <x.Type> x [d]))
  3952  	for {
  3953  		d := ssa.AuxIntToInt64(v.AuxInt)
  3954  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3955  			break
  3956  		}
  3957  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3958  		x := v_1
  3959  		v.Reset(ssaop.OpARM64ANDconst)
  3960  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3961  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  3962  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3963  		v0.AddArg(x)
  3964  		v.AddArg(v0)
  3965  		return true
  3966  	}
  3967  	// match: (ANDshiftLL x (MOVDconst [c]) [d])
  3968  	// result: (ANDconst x [int64(uint64(c)<<uint64(d))])
  3969  	for {
  3970  		d := ssa.AuxIntToInt64(v.AuxInt)
  3971  		x := v_0
  3972  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3973  			break
  3974  		}
  3975  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3976  		v.Reset(ssaop.OpARM64ANDconst)
  3977  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  3978  		v.AddArg(x)
  3979  		return true
  3980  	}
  3981  	// match: (ANDshiftLL y:(SLLconst x [c]) x [c])
  3982  	// result: y
  3983  	for {
  3984  		c := ssa.AuxIntToInt64(v.AuxInt)
  3985  		y := v_0
  3986  		if y.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  3987  			break
  3988  		}
  3989  		x := y.Args[0]
  3990  		if x != v_1 {
  3991  			break
  3992  		}
  3993  		v.CopyOf(y)
  3994  		return true
  3995  	}
  3996  	return false
  3997  }
  3998  func rewriteValue_OpARM64ANDshiftRA(v *ssa.Value) bool {
  3999  	v_1 := v.Args[1]
  4000  	v_0 := v.Args[0]
  4001  	b := v.Block
  4002  	// match: (ANDshiftRA (MOVDconst [c]) x [d])
  4003  	// result: (ANDconst [c] (SRAconst <x.Type> x [d]))
  4004  	for {
  4005  		d := ssa.AuxIntToInt64(v.AuxInt)
  4006  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4007  			break
  4008  		}
  4009  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4010  		x := v_1
  4011  		v.Reset(ssaop.OpARM64ANDconst)
  4012  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4013  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  4014  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4015  		v0.AddArg(x)
  4016  		v.AddArg(v0)
  4017  		return true
  4018  	}
  4019  	// match: (ANDshiftRA x (MOVDconst [c]) [d])
  4020  	// result: (ANDconst x [c>>uint64(d)])
  4021  	for {
  4022  		d := ssa.AuxIntToInt64(v.AuxInt)
  4023  		x := v_0
  4024  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4025  			break
  4026  		}
  4027  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4028  		v.Reset(ssaop.OpARM64ANDconst)
  4029  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  4030  		v.AddArg(x)
  4031  		return true
  4032  	}
  4033  	// match: (ANDshiftRA y:(SRAconst x [c]) x [c])
  4034  	// result: y
  4035  	for {
  4036  		c := ssa.AuxIntToInt64(v.AuxInt)
  4037  		y := v_0
  4038  		if y.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  4039  			break
  4040  		}
  4041  		x := y.Args[0]
  4042  		if x != v_1 {
  4043  			break
  4044  		}
  4045  		v.CopyOf(y)
  4046  		return true
  4047  	}
  4048  	return false
  4049  }
  4050  func rewriteValue_OpARM64ANDshiftRL(v *ssa.Value) bool {
  4051  	v_1 := v.Args[1]
  4052  	v_0 := v.Args[0]
  4053  	b := v.Block
  4054  	// match: (ANDshiftRL (MOVDconst [c]) x [d])
  4055  	// result: (ANDconst [c] (SRLconst <x.Type> x [d]))
  4056  	for {
  4057  		d := ssa.AuxIntToInt64(v.AuxInt)
  4058  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4059  			break
  4060  		}
  4061  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4062  		x := v_1
  4063  		v.Reset(ssaop.OpARM64ANDconst)
  4064  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4065  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  4066  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4067  		v0.AddArg(x)
  4068  		v.AddArg(v0)
  4069  		return true
  4070  	}
  4071  	// match: (ANDshiftRL x (MOVDconst [c]) [d])
  4072  	// result: (ANDconst x [int64(uint64(c)>>uint64(d))])
  4073  	for {
  4074  		d := ssa.AuxIntToInt64(v.AuxInt)
  4075  		x := v_0
  4076  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4077  			break
  4078  		}
  4079  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4080  		v.Reset(ssaop.OpARM64ANDconst)
  4081  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  4082  		v.AddArg(x)
  4083  		return true
  4084  	}
  4085  	// match: (ANDshiftRL y:(SRLconst x [c]) x [c])
  4086  	// result: y
  4087  	for {
  4088  		c := ssa.AuxIntToInt64(v.AuxInt)
  4089  		y := v_0
  4090  		if y.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  4091  			break
  4092  		}
  4093  		x := y.Args[0]
  4094  		if x != v_1 {
  4095  			break
  4096  		}
  4097  		v.CopyOf(y)
  4098  		return true
  4099  	}
  4100  	return false
  4101  }
  4102  func rewriteValue_OpARM64ANDshiftRO(v *ssa.Value) bool {
  4103  	v_1 := v.Args[1]
  4104  	v_0 := v.Args[0]
  4105  	b := v.Block
  4106  	// match: (ANDshiftRO (MOVDconst [c]) x [d])
  4107  	// result: (ANDconst [c] (RORconst <x.Type> x [d]))
  4108  	for {
  4109  		d := ssa.AuxIntToInt64(v.AuxInt)
  4110  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4111  			break
  4112  		}
  4113  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4114  		x := v_1
  4115  		v.Reset(ssaop.OpARM64ANDconst)
  4116  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4117  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
  4118  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4119  		v0.AddArg(x)
  4120  		v.AddArg(v0)
  4121  		return true
  4122  	}
  4123  	// match: (ANDshiftRO x (MOVDconst [c]) [d])
  4124  	// result: (ANDconst x [rotateRight64(c, d)])
  4125  	for {
  4126  		d := ssa.AuxIntToInt64(v.AuxInt)
  4127  		x := v_0
  4128  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4129  			break
  4130  		}
  4131  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4132  		v.Reset(ssaop.OpARM64ANDconst)
  4133  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
  4134  		v.AddArg(x)
  4135  		return true
  4136  	}
  4137  	// match: (ANDshiftRO y:(RORconst x [c]) x [c])
  4138  	// result: y
  4139  	for {
  4140  		c := ssa.AuxIntToInt64(v.AuxInt)
  4141  		y := v_0
  4142  		if y.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  4143  			break
  4144  		}
  4145  		x := y.Args[0]
  4146  		if x != v_1 {
  4147  			break
  4148  		}
  4149  		v.CopyOf(y)
  4150  		return true
  4151  	}
  4152  	return false
  4153  }
  4154  func rewriteValue_OpARM64BIC(v *ssa.Value) bool {
  4155  	v_1 := v.Args[1]
  4156  	v_0 := v.Args[0]
  4157  	// match: (BIC x (MOVDconst [c]))
  4158  	// result: (ANDconst [^c] x)
  4159  	for {
  4160  		x := v_0
  4161  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4162  			break
  4163  		}
  4164  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4165  		v.Reset(ssaop.OpARM64ANDconst)
  4166  		v.AuxInt = ssa.Int64ToAuxInt(^c)
  4167  		v.AddArg(x)
  4168  		return true
  4169  	}
  4170  	// match: (BIC x x)
  4171  	// result: (MOVDconst [0])
  4172  	for {
  4173  		x := v_0
  4174  		if x != v_1 {
  4175  			break
  4176  		}
  4177  		v.Reset(ssaop.OpARM64MOVDconst)
  4178  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4179  		return true
  4180  	}
  4181  	// match: (BIC x0 x1:(SLLconst [c] y))
  4182  	// cond: ssa.ClobberIfDead(x1)
  4183  	// result: (BICshiftLL x0 y [c])
  4184  	for {
  4185  		x0 := v_0
  4186  		x1 := v_1
  4187  		if x1.Op != ssaop.OpARM64SLLconst {
  4188  			break
  4189  		}
  4190  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4191  		y := x1.Args[0]
  4192  		if !(ssa.ClobberIfDead(x1)) {
  4193  			break
  4194  		}
  4195  		v.Reset(ssaop.OpARM64BICshiftLL)
  4196  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4197  		v.AddArg2(x0, y)
  4198  		return true
  4199  	}
  4200  	// match: (BIC x0 x1:(SRLconst [c] y))
  4201  	// cond: ssa.ClobberIfDead(x1)
  4202  	// result: (BICshiftRL x0 y [c])
  4203  	for {
  4204  		x0 := v_0
  4205  		x1 := v_1
  4206  		if x1.Op != ssaop.OpARM64SRLconst {
  4207  			break
  4208  		}
  4209  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4210  		y := x1.Args[0]
  4211  		if !(ssa.ClobberIfDead(x1)) {
  4212  			break
  4213  		}
  4214  		v.Reset(ssaop.OpARM64BICshiftRL)
  4215  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4216  		v.AddArg2(x0, y)
  4217  		return true
  4218  	}
  4219  	// match: (BIC x0 x1:(SRAconst [c] y))
  4220  	// cond: ssa.ClobberIfDead(x1)
  4221  	// result: (BICshiftRA x0 y [c])
  4222  	for {
  4223  		x0 := v_0
  4224  		x1 := v_1
  4225  		if x1.Op != ssaop.OpARM64SRAconst {
  4226  			break
  4227  		}
  4228  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4229  		y := x1.Args[0]
  4230  		if !(ssa.ClobberIfDead(x1)) {
  4231  			break
  4232  		}
  4233  		v.Reset(ssaop.OpARM64BICshiftRA)
  4234  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4235  		v.AddArg2(x0, y)
  4236  		return true
  4237  	}
  4238  	// match: (BIC x0 x1:(RORconst [c] y))
  4239  	// cond: ssa.ClobberIfDead(x1)
  4240  	// result: (BICshiftRO x0 y [c])
  4241  	for {
  4242  		x0 := v_0
  4243  		x1 := v_1
  4244  		if x1.Op != ssaop.OpARM64RORconst {
  4245  			break
  4246  		}
  4247  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4248  		y := x1.Args[0]
  4249  		if !(ssa.ClobberIfDead(x1)) {
  4250  			break
  4251  		}
  4252  		v.Reset(ssaop.OpARM64BICshiftRO)
  4253  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4254  		v.AddArg2(x0, y)
  4255  		return true
  4256  	}
  4257  	return false
  4258  }
  4259  func rewriteValue_OpARM64BICshiftLL(v *ssa.Value) bool {
  4260  	v_1 := v.Args[1]
  4261  	v_0 := v.Args[0]
  4262  	// match: (BICshiftLL x (MOVDconst [c]) [d])
  4263  	// result: (ANDconst x [^int64(uint64(c)<<uint64(d))])
  4264  	for {
  4265  		d := ssa.AuxIntToInt64(v.AuxInt)
  4266  		x := v_0
  4267  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4268  			break
  4269  		}
  4270  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4271  		v.Reset(ssaop.OpARM64ANDconst)
  4272  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  4273  		v.AddArg(x)
  4274  		return true
  4275  	}
  4276  	// match: (BICshiftLL (SLLconst x [c]) x [c])
  4277  	// result: (MOVDconst [0])
  4278  	for {
  4279  		c := ssa.AuxIntToInt64(v.AuxInt)
  4280  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4281  			break
  4282  		}
  4283  		x := v_0.Args[0]
  4284  		if x != v_1 {
  4285  			break
  4286  		}
  4287  		v.Reset(ssaop.OpARM64MOVDconst)
  4288  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4289  		return true
  4290  	}
  4291  	return false
  4292  }
  4293  func rewriteValue_OpARM64BICshiftRA(v *ssa.Value) bool {
  4294  	v_1 := v.Args[1]
  4295  	v_0 := v.Args[0]
  4296  	// match: (BICshiftRA x (MOVDconst [c]) [d])
  4297  	// result: (ANDconst x [^(c>>uint64(d))])
  4298  	for {
  4299  		d := ssa.AuxIntToInt64(v.AuxInt)
  4300  		x := v_0
  4301  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4302  			break
  4303  		}
  4304  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4305  		v.Reset(ssaop.OpARM64ANDconst)
  4306  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
  4307  		v.AddArg(x)
  4308  		return true
  4309  	}
  4310  	// match: (BICshiftRA (SRAconst x [c]) x [c])
  4311  	// result: (MOVDconst [0])
  4312  	for {
  4313  		c := ssa.AuxIntToInt64(v.AuxInt)
  4314  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4315  			break
  4316  		}
  4317  		x := v_0.Args[0]
  4318  		if x != v_1 {
  4319  			break
  4320  		}
  4321  		v.Reset(ssaop.OpARM64MOVDconst)
  4322  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4323  		return true
  4324  	}
  4325  	return false
  4326  }
  4327  func rewriteValue_OpARM64BICshiftRL(v *ssa.Value) bool {
  4328  	v_1 := v.Args[1]
  4329  	v_0 := v.Args[0]
  4330  	// match: (BICshiftRL x (MOVDconst [c]) [d])
  4331  	// result: (ANDconst x [^int64(uint64(c)>>uint64(d))])
  4332  	for {
  4333  		d := ssa.AuxIntToInt64(v.AuxInt)
  4334  		x := v_0
  4335  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4336  			break
  4337  		}
  4338  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4339  		v.Reset(ssaop.OpARM64ANDconst)
  4340  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  4341  		v.AddArg(x)
  4342  		return true
  4343  	}
  4344  	// match: (BICshiftRL (SRLconst x [c]) x [c])
  4345  	// result: (MOVDconst [0])
  4346  	for {
  4347  		c := ssa.AuxIntToInt64(v.AuxInt)
  4348  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4349  			break
  4350  		}
  4351  		x := v_0.Args[0]
  4352  		if x != v_1 {
  4353  			break
  4354  		}
  4355  		v.Reset(ssaop.OpARM64MOVDconst)
  4356  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4357  		return true
  4358  	}
  4359  	return false
  4360  }
  4361  func rewriteValue_OpARM64BICshiftRO(v *ssa.Value) bool {
  4362  	v_1 := v.Args[1]
  4363  	v_0 := v.Args[0]
  4364  	// match: (BICshiftRO x (MOVDconst [c]) [d])
  4365  	// result: (ANDconst x [^rotateRight64(c, d)])
  4366  	for {
  4367  		d := ssa.AuxIntToInt64(v.AuxInt)
  4368  		x := v_0
  4369  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4370  			break
  4371  		}
  4372  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4373  		v.Reset(ssaop.OpARM64ANDconst)
  4374  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
  4375  		v.AddArg(x)
  4376  		return true
  4377  	}
  4378  	// match: (BICshiftRO (RORconst x [c]) x [c])
  4379  	// result: (MOVDconst [0])
  4380  	for {
  4381  		c := ssa.AuxIntToInt64(v.AuxInt)
  4382  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4383  			break
  4384  		}
  4385  		x := v_0.Args[0]
  4386  		if x != v_1 {
  4387  			break
  4388  		}
  4389  		v.Reset(ssaop.OpARM64MOVDconst)
  4390  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4391  		return true
  4392  	}
  4393  	return false
  4394  }
  4395  func rewriteValue_OpARM64CMN(v *ssa.Value) bool {
  4396  	v_1 := v.Args[1]
  4397  	v_0 := v.Args[0]
  4398  	// match: (CMN x (MOVDconst [c]))
  4399  	// result: (CMNconst [c] x)
  4400  	for {
  4401  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4402  			x := v_0
  4403  			if v_1.Op != ssaop.OpARM64MOVDconst {
  4404  				continue
  4405  			}
  4406  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4407  			v.Reset(ssaop.OpARM64CMNconst)
  4408  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4409  			v.AddArg(x)
  4410  			return true
  4411  		}
  4412  		break
  4413  	}
  4414  	// match: (CMN x0 x1:(SLLconst [c] y))
  4415  	// cond: ssa.ClobberIfDead(x1)
  4416  	// result: (CMNshiftLL x0 y [c])
  4417  	for {
  4418  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4419  			x0 := v_0
  4420  			x1 := v_1
  4421  			if x1.Op != ssaop.OpARM64SLLconst {
  4422  				continue
  4423  			}
  4424  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4425  			y := x1.Args[0]
  4426  			if !(ssa.ClobberIfDead(x1)) {
  4427  				continue
  4428  			}
  4429  			v.Reset(ssaop.OpARM64CMNshiftLL)
  4430  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4431  			v.AddArg2(x0, y)
  4432  			return true
  4433  		}
  4434  		break
  4435  	}
  4436  	// match: (CMN x0 x1:(SRLconst [c] y))
  4437  	// cond: ssa.ClobberIfDead(x1)
  4438  	// result: (CMNshiftRL x0 y [c])
  4439  	for {
  4440  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4441  			x0 := v_0
  4442  			x1 := v_1
  4443  			if x1.Op != ssaop.OpARM64SRLconst {
  4444  				continue
  4445  			}
  4446  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4447  			y := x1.Args[0]
  4448  			if !(ssa.ClobberIfDead(x1)) {
  4449  				continue
  4450  			}
  4451  			v.Reset(ssaop.OpARM64CMNshiftRL)
  4452  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4453  			v.AddArg2(x0, y)
  4454  			return true
  4455  		}
  4456  		break
  4457  	}
  4458  	// match: (CMN x0 x1:(SRAconst [c] y))
  4459  	// cond: ssa.ClobberIfDead(x1)
  4460  	// result: (CMNshiftRA x0 y [c])
  4461  	for {
  4462  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4463  			x0 := v_0
  4464  			x1 := v_1
  4465  			if x1.Op != ssaop.OpARM64SRAconst {
  4466  				continue
  4467  			}
  4468  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4469  			y := x1.Args[0]
  4470  			if !(ssa.ClobberIfDead(x1)) {
  4471  				continue
  4472  			}
  4473  			v.Reset(ssaop.OpARM64CMNshiftRA)
  4474  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4475  			v.AddArg2(x0, y)
  4476  			return true
  4477  		}
  4478  		break
  4479  	}
  4480  	return false
  4481  }
  4482  func rewriteValue_OpARM64CMNW(v *ssa.Value) bool {
  4483  	v_1 := v.Args[1]
  4484  	v_0 := v.Args[0]
  4485  	// match: (CMNW x (MOVDconst [c]))
  4486  	// result: (CMNWconst [int32(c)] x)
  4487  	for {
  4488  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4489  			x := v_0
  4490  			if v_1.Op != ssaop.OpARM64MOVDconst {
  4491  				continue
  4492  			}
  4493  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4494  			v.Reset(ssaop.OpARM64CMNWconst)
  4495  			v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4496  			v.AddArg(x)
  4497  			return true
  4498  		}
  4499  		break
  4500  	}
  4501  	return false
  4502  }
  4503  func rewriteValue_OpARM64CMNWconst(v *ssa.Value) bool {
  4504  	v_0 := v.Args[0]
  4505  	// match: (CMNWconst [c] y)
  4506  	// cond: c < 0 && c != -1<<31
  4507  	// result: (CMPWconst [-c] y)
  4508  	for {
  4509  		c := ssa.AuxIntToInt32(v.AuxInt)
  4510  		y := v_0
  4511  		if !(c < 0 && c != -1<<31) {
  4512  			break
  4513  		}
  4514  		v.Reset(ssaop.OpARM64CMPWconst)
  4515  		v.AuxInt = ssa.Int32ToAuxInt(-c)
  4516  		v.AddArg(y)
  4517  		return true
  4518  	}
  4519  	// match: (CMNWconst (MOVDconst [x]) [y])
  4520  	// result: (FlagConstant [ssa.AddFlags32(int32(x),y)])
  4521  	for {
  4522  		y := ssa.AuxIntToInt32(v.AuxInt)
  4523  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4524  			break
  4525  		}
  4526  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4527  		v.Reset(ssaop.OpARM64FlagConstant)
  4528  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.AddFlags32(int32(x), y))
  4529  		return true
  4530  	}
  4531  	return false
  4532  }
  4533  func rewriteValue_OpARM64CMNconst(v *ssa.Value) bool {
  4534  	v_0 := v.Args[0]
  4535  	// match: (CMNconst [c] y)
  4536  	// cond: c < 0 && c != -1<<63
  4537  	// result: (CMPconst [-c] y)
  4538  	for {
  4539  		c := ssa.AuxIntToInt64(v.AuxInt)
  4540  		y := v_0
  4541  		if !(c < 0 && c != -1<<63) {
  4542  			break
  4543  		}
  4544  		v.Reset(ssaop.OpARM64CMPconst)
  4545  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  4546  		v.AddArg(y)
  4547  		return true
  4548  	}
  4549  	// match: (CMNconst (MOVDconst [x]) [y])
  4550  	// result: (FlagConstant [ssa.AddFlags64(x,y)])
  4551  	for {
  4552  		y := ssa.AuxIntToInt64(v.AuxInt)
  4553  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4554  			break
  4555  		}
  4556  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4557  		v.Reset(ssaop.OpARM64FlagConstant)
  4558  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.AddFlags64(x, y))
  4559  		return true
  4560  	}
  4561  	return false
  4562  }
  4563  func rewriteValue_OpARM64CMNshiftLL(v *ssa.Value) bool {
  4564  	v_1 := v.Args[1]
  4565  	v_0 := v.Args[0]
  4566  	b := v.Block
  4567  	// match: (CMNshiftLL (MOVDconst [c]) x [d])
  4568  	// result: (CMNconst [c] (SLLconst <x.Type> x [d]))
  4569  	for {
  4570  		d := ssa.AuxIntToInt64(v.AuxInt)
  4571  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4572  			break
  4573  		}
  4574  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4575  		x := v_1
  4576  		v.Reset(ssaop.OpARM64CMNconst)
  4577  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4578  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  4579  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4580  		v0.AddArg(x)
  4581  		v.AddArg(v0)
  4582  		return true
  4583  	}
  4584  	// match: (CMNshiftLL x (MOVDconst [c]) [d])
  4585  	// result: (CMNconst x [int64(uint64(c)<<uint64(d))])
  4586  	for {
  4587  		d := ssa.AuxIntToInt64(v.AuxInt)
  4588  		x := v_0
  4589  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4590  			break
  4591  		}
  4592  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4593  		v.Reset(ssaop.OpARM64CMNconst)
  4594  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  4595  		v.AddArg(x)
  4596  		return true
  4597  	}
  4598  	return false
  4599  }
  4600  func rewriteValue_OpARM64CMNshiftRA(v *ssa.Value) bool {
  4601  	v_1 := v.Args[1]
  4602  	v_0 := v.Args[0]
  4603  	b := v.Block
  4604  	// match: (CMNshiftRA (MOVDconst [c]) x [d])
  4605  	// result: (CMNconst [c] (SRAconst <x.Type> x [d]))
  4606  	for {
  4607  		d := ssa.AuxIntToInt64(v.AuxInt)
  4608  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4609  			break
  4610  		}
  4611  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4612  		x := v_1
  4613  		v.Reset(ssaop.OpARM64CMNconst)
  4614  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4615  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  4616  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4617  		v0.AddArg(x)
  4618  		v.AddArg(v0)
  4619  		return true
  4620  	}
  4621  	// match: (CMNshiftRA x (MOVDconst [c]) [d])
  4622  	// result: (CMNconst x [c>>uint64(d)])
  4623  	for {
  4624  		d := ssa.AuxIntToInt64(v.AuxInt)
  4625  		x := v_0
  4626  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4627  			break
  4628  		}
  4629  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4630  		v.Reset(ssaop.OpARM64CMNconst)
  4631  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  4632  		v.AddArg(x)
  4633  		return true
  4634  	}
  4635  	return false
  4636  }
  4637  func rewriteValue_OpARM64CMNshiftRL(v *ssa.Value) bool {
  4638  	v_1 := v.Args[1]
  4639  	v_0 := v.Args[0]
  4640  	b := v.Block
  4641  	// match: (CMNshiftRL (MOVDconst [c]) x [d])
  4642  	// result: (CMNconst [c] (SRLconst <x.Type> x [d]))
  4643  	for {
  4644  		d := ssa.AuxIntToInt64(v.AuxInt)
  4645  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4646  			break
  4647  		}
  4648  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4649  		x := v_1
  4650  		v.Reset(ssaop.OpARM64CMNconst)
  4651  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4652  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  4653  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4654  		v0.AddArg(x)
  4655  		v.AddArg(v0)
  4656  		return true
  4657  	}
  4658  	// match: (CMNshiftRL x (MOVDconst [c]) [d])
  4659  	// result: (CMNconst x [int64(uint64(c)>>uint64(d))])
  4660  	for {
  4661  		d := ssa.AuxIntToInt64(v.AuxInt)
  4662  		x := v_0
  4663  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4664  			break
  4665  		}
  4666  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4667  		v.Reset(ssaop.OpARM64CMNconst)
  4668  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  4669  		v.AddArg(x)
  4670  		return true
  4671  	}
  4672  	return false
  4673  }
  4674  func rewriteValue_OpARM64CMP(v *ssa.Value) bool {
  4675  	v_1 := v.Args[1]
  4676  	v_0 := v.Args[0]
  4677  	b := v.Block
  4678  	// match: (CMP x (MOVDconst [c]))
  4679  	// result: (CMPconst [c] x)
  4680  	for {
  4681  		x := v_0
  4682  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4683  			break
  4684  		}
  4685  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4686  		v.Reset(ssaop.OpARM64CMPconst)
  4687  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4688  		v.AddArg(x)
  4689  		return true
  4690  	}
  4691  	// match: (CMP (MOVDconst [c]) x)
  4692  	// result: (InvertFlags (CMPconst [c] x))
  4693  	for {
  4694  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4695  			break
  4696  		}
  4697  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4698  		x := v_1
  4699  		v.Reset(ssaop.OpARM64InvertFlags)
  4700  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4701  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4702  		v0.AddArg(x)
  4703  		v.AddArg(v0)
  4704  		return true
  4705  	}
  4706  	// match: (CMP x y)
  4707  	// cond: ssa.CanonLessThan(x,y)
  4708  	// result: (InvertFlags (CMP y x))
  4709  	for {
  4710  		x := v_0
  4711  		y := v_1
  4712  		if !(ssa.CanonLessThan(x, y)) {
  4713  			break
  4714  		}
  4715  		v.Reset(ssaop.OpARM64InvertFlags)
  4716  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
  4717  		v0.AddArg2(y, x)
  4718  		v.AddArg(v0)
  4719  		return true
  4720  	}
  4721  	// match: (CMP x0 x1:(SLLconst [c] y))
  4722  	// cond: ssa.ClobberIfDead(x1)
  4723  	// result: (CMPshiftLL x0 y [c])
  4724  	for {
  4725  		x0 := v_0
  4726  		x1 := v_1
  4727  		if x1.Op != ssaop.OpARM64SLLconst {
  4728  			break
  4729  		}
  4730  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4731  		y := x1.Args[0]
  4732  		if !(ssa.ClobberIfDead(x1)) {
  4733  			break
  4734  		}
  4735  		v.Reset(ssaop.OpARM64CMPshiftLL)
  4736  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4737  		v.AddArg2(x0, y)
  4738  		return true
  4739  	}
  4740  	// match: (CMP x0:(SLLconst [c] y) x1)
  4741  	// cond: ssa.ClobberIfDead(x0)
  4742  	// result: (InvertFlags (CMPshiftLL x1 y [c]))
  4743  	for {
  4744  		x0 := v_0
  4745  		if x0.Op != ssaop.OpARM64SLLconst {
  4746  			break
  4747  		}
  4748  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4749  		y := x0.Args[0]
  4750  		x1 := v_1
  4751  		if !(ssa.ClobberIfDead(x0)) {
  4752  			break
  4753  		}
  4754  		v.Reset(ssaop.OpARM64InvertFlags)
  4755  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftLL, types.TypeFlags)
  4756  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4757  		v0.AddArg2(x1, y)
  4758  		v.AddArg(v0)
  4759  		return true
  4760  	}
  4761  	// match: (CMP x0 x1:(SRLconst [c] y))
  4762  	// cond: ssa.ClobberIfDead(x1)
  4763  	// result: (CMPshiftRL x0 y [c])
  4764  	for {
  4765  		x0 := v_0
  4766  		x1 := v_1
  4767  		if x1.Op != ssaop.OpARM64SRLconst {
  4768  			break
  4769  		}
  4770  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4771  		y := x1.Args[0]
  4772  		if !(ssa.ClobberIfDead(x1)) {
  4773  			break
  4774  		}
  4775  		v.Reset(ssaop.OpARM64CMPshiftRL)
  4776  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4777  		v.AddArg2(x0, y)
  4778  		return true
  4779  	}
  4780  	// match: (CMP x0:(SRLconst [c] y) x1)
  4781  	// cond: ssa.ClobberIfDead(x0)
  4782  	// result: (InvertFlags (CMPshiftRL x1 y [c]))
  4783  	for {
  4784  		x0 := v_0
  4785  		if x0.Op != ssaop.OpARM64SRLconst {
  4786  			break
  4787  		}
  4788  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4789  		y := x0.Args[0]
  4790  		x1 := v_1
  4791  		if !(ssa.ClobberIfDead(x0)) {
  4792  			break
  4793  		}
  4794  		v.Reset(ssaop.OpARM64InvertFlags)
  4795  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftRL, types.TypeFlags)
  4796  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4797  		v0.AddArg2(x1, y)
  4798  		v.AddArg(v0)
  4799  		return true
  4800  	}
  4801  	// match: (CMP x0 x1:(SRAconst [c] y))
  4802  	// cond: ssa.ClobberIfDead(x1)
  4803  	// result: (CMPshiftRA x0 y [c])
  4804  	for {
  4805  		x0 := v_0
  4806  		x1 := v_1
  4807  		if x1.Op != ssaop.OpARM64SRAconst {
  4808  			break
  4809  		}
  4810  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4811  		y := x1.Args[0]
  4812  		if !(ssa.ClobberIfDead(x1)) {
  4813  			break
  4814  		}
  4815  		v.Reset(ssaop.OpARM64CMPshiftRA)
  4816  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4817  		v.AddArg2(x0, y)
  4818  		return true
  4819  	}
  4820  	// match: (CMP x0:(SRAconst [c] y) x1)
  4821  	// cond: ssa.ClobberIfDead(x0)
  4822  	// result: (InvertFlags (CMPshiftRA x1 y [c]))
  4823  	for {
  4824  		x0 := v_0
  4825  		if x0.Op != ssaop.OpARM64SRAconst {
  4826  			break
  4827  		}
  4828  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4829  		y := x0.Args[0]
  4830  		x1 := v_1
  4831  		if !(ssa.ClobberIfDead(x0)) {
  4832  			break
  4833  		}
  4834  		v.Reset(ssaop.OpARM64InvertFlags)
  4835  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftRA, types.TypeFlags)
  4836  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4837  		v0.AddArg2(x1, y)
  4838  		v.AddArg(v0)
  4839  		return true
  4840  	}
  4841  	return false
  4842  }
  4843  func rewriteValue_OpARM64CMPW(v *ssa.Value) bool {
  4844  	v_1 := v.Args[1]
  4845  	v_0 := v.Args[0]
  4846  	b := v.Block
  4847  	// match: (CMPW x (MOVDconst [c]))
  4848  	// result: (CMPWconst [int32(c)] x)
  4849  	for {
  4850  		x := v_0
  4851  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4852  			break
  4853  		}
  4854  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4855  		v.Reset(ssaop.OpARM64CMPWconst)
  4856  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4857  		v.AddArg(x)
  4858  		return true
  4859  	}
  4860  	// match: (CMPW (MOVDconst [c]) x)
  4861  	// result: (InvertFlags (CMPWconst [int32(c)] x))
  4862  	for {
  4863  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4864  			break
  4865  		}
  4866  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4867  		x := v_1
  4868  		v.Reset(ssaop.OpARM64InvertFlags)
  4869  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
  4870  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4871  		v0.AddArg(x)
  4872  		v.AddArg(v0)
  4873  		return true
  4874  	}
  4875  	// match: (CMPW x y)
  4876  	// cond: ssa.CanonLessThan(x,y)
  4877  	// result: (InvertFlags (CMPW y x))
  4878  	for {
  4879  		x := v_0
  4880  		y := v_1
  4881  		if !(ssa.CanonLessThan(x, y)) {
  4882  			break
  4883  		}
  4884  		v.Reset(ssaop.OpARM64InvertFlags)
  4885  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
  4886  		v0.AddArg2(y, x)
  4887  		v.AddArg(v0)
  4888  		return true
  4889  	}
  4890  	return false
  4891  }
  4892  func rewriteValue_OpARM64CMPWconst(v *ssa.Value) bool {
  4893  	v_0 := v.Args[0]
  4894  	// match: (CMPWconst [c] y)
  4895  	// cond: c < 0 && c != -1<<31
  4896  	// result: (CMNWconst [-c] y)
  4897  	for {
  4898  		c := ssa.AuxIntToInt32(v.AuxInt)
  4899  		y := v_0
  4900  		if !(c < 0 && c != -1<<31) {
  4901  			break
  4902  		}
  4903  		v.Reset(ssaop.OpARM64CMNWconst)
  4904  		v.AuxInt = ssa.Int32ToAuxInt(-c)
  4905  		v.AddArg(y)
  4906  		return true
  4907  	}
  4908  	// match: (CMPWconst (MOVDconst [x]) [y])
  4909  	// result: (FlagConstant [ssa.SubFlags32(int32(x),y)])
  4910  	for {
  4911  		y := ssa.AuxIntToInt32(v.AuxInt)
  4912  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4913  			break
  4914  		}
  4915  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4916  		v.Reset(ssaop.OpARM64FlagConstant)
  4917  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags32(int32(x), y))
  4918  		return true
  4919  	}
  4920  	// match: (CMPWconst (MOVBUreg _) [c])
  4921  	// cond: 0xff < c
  4922  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4923  	for {
  4924  		c := ssa.AuxIntToInt32(v.AuxInt)
  4925  		if v_0.Op != ssaop.OpARM64MOVBUreg || !(0xff < c) {
  4926  			break
  4927  		}
  4928  		v.Reset(ssaop.OpARM64FlagConstant)
  4929  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4930  		return true
  4931  	}
  4932  	// match: (CMPWconst (MOVHUreg _) [c])
  4933  	// cond: 0xffff < c
  4934  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4935  	for {
  4936  		c := ssa.AuxIntToInt32(v.AuxInt)
  4937  		if v_0.Op != ssaop.OpARM64MOVHUreg || !(0xffff < c) {
  4938  			break
  4939  		}
  4940  		v.Reset(ssaop.OpARM64FlagConstant)
  4941  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4942  		return true
  4943  	}
  4944  	return false
  4945  }
  4946  func rewriteValue_OpARM64CMPconst(v *ssa.Value) bool {
  4947  	v_0 := v.Args[0]
  4948  	// match: (CMPconst [c] y)
  4949  	// cond: c < 0 && c != -1<<63
  4950  	// result: (CMNconst [-c] y)
  4951  	for {
  4952  		c := ssa.AuxIntToInt64(v.AuxInt)
  4953  		y := v_0
  4954  		if !(c < 0 && c != -1<<63) {
  4955  			break
  4956  		}
  4957  		v.Reset(ssaop.OpARM64CMNconst)
  4958  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  4959  		v.AddArg(y)
  4960  		return true
  4961  	}
  4962  	// match: (CMPconst (MOVDconst [x]) [y])
  4963  	// result: (FlagConstant [ssa.SubFlags64(x,y)])
  4964  	for {
  4965  		y := ssa.AuxIntToInt64(v.AuxInt)
  4966  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4967  			break
  4968  		}
  4969  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4970  		v.Reset(ssaop.OpARM64FlagConstant)
  4971  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(x, y))
  4972  		return true
  4973  	}
  4974  	// match: (CMPconst (MOVBUreg _) [c])
  4975  	// cond: 0xff < c
  4976  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4977  	for {
  4978  		c := ssa.AuxIntToInt64(v.AuxInt)
  4979  		if v_0.Op != ssaop.OpARM64MOVBUreg || !(0xff < c) {
  4980  			break
  4981  		}
  4982  		v.Reset(ssaop.OpARM64FlagConstant)
  4983  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4984  		return true
  4985  	}
  4986  	// match: (CMPconst (MOVHUreg _) [c])
  4987  	// cond: 0xffff < c
  4988  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4989  	for {
  4990  		c := ssa.AuxIntToInt64(v.AuxInt)
  4991  		if v_0.Op != ssaop.OpARM64MOVHUreg || !(0xffff < c) {
  4992  			break
  4993  		}
  4994  		v.Reset(ssaop.OpARM64FlagConstant)
  4995  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4996  		return true
  4997  	}
  4998  	// match: (CMPconst (MOVWUreg _) [c])
  4999  	// cond: 0xffffffff < c
  5000  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5001  	for {
  5002  		c := ssa.AuxIntToInt64(v.AuxInt)
  5003  		if v_0.Op != ssaop.OpARM64MOVWUreg || !(0xffffffff < c) {
  5004  			break
  5005  		}
  5006  		v.Reset(ssaop.OpARM64FlagConstant)
  5007  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5008  		return true
  5009  	}
  5010  	// match: (CMPconst (ANDconst _ [m]) [n])
  5011  	// cond: 0 <= m && m < n
  5012  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5013  	for {
  5014  		n := ssa.AuxIntToInt64(v.AuxInt)
  5015  		if v_0.Op != ssaop.OpARM64ANDconst {
  5016  			break
  5017  		}
  5018  		m := ssa.AuxIntToInt64(v_0.AuxInt)
  5019  		if !(0 <= m && m < n) {
  5020  			break
  5021  		}
  5022  		v.Reset(ssaop.OpARM64FlagConstant)
  5023  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5024  		return true
  5025  	}
  5026  	// match: (CMPconst (SRLconst _ [c]) [n])
  5027  	// cond: 0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)
  5028  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5029  	for {
  5030  		n := ssa.AuxIntToInt64(v.AuxInt)
  5031  		if v_0.Op != ssaop.OpARM64SRLconst {
  5032  			break
  5033  		}
  5034  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5035  		if !(0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)) {
  5036  			break
  5037  		}
  5038  		v.Reset(ssaop.OpARM64FlagConstant)
  5039  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5040  		return true
  5041  	}
  5042  	return false
  5043  }
  5044  func rewriteValue_OpARM64CMPshiftLL(v *ssa.Value) bool {
  5045  	v_1 := v.Args[1]
  5046  	v_0 := v.Args[0]
  5047  	b := v.Block
  5048  	// match: (CMPshiftLL (MOVDconst [c]) x [d])
  5049  	// result: (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d])))
  5050  	for {
  5051  		d := ssa.AuxIntToInt64(v.AuxInt)
  5052  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5053  			break
  5054  		}
  5055  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5056  		x := v_1
  5057  		v.Reset(ssaop.OpARM64InvertFlags)
  5058  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  5059  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5060  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  5061  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  5062  		v1.AddArg(x)
  5063  		v0.AddArg(v1)
  5064  		v.AddArg(v0)
  5065  		return true
  5066  	}
  5067  	// match: (CMPshiftLL x (MOVDconst [c]) [d])
  5068  	// result: (CMPconst x [int64(uint64(c)<<uint64(d))])
  5069  	for {
  5070  		d := ssa.AuxIntToInt64(v.AuxInt)
  5071  		x := v_0
  5072  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5073  			break
  5074  		}
  5075  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5076  		v.Reset(ssaop.OpARM64CMPconst)
  5077  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  5078  		v.AddArg(x)
  5079  		return true
  5080  	}
  5081  	return false
  5082  }
  5083  func rewriteValue_OpARM64CMPshiftRA(v *ssa.Value) bool {
  5084  	v_1 := v.Args[1]
  5085  	v_0 := v.Args[0]
  5086  	b := v.Block
  5087  	// match: (CMPshiftRA (MOVDconst [c]) x [d])
  5088  	// result: (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d])))
  5089  	for {
  5090  		d := ssa.AuxIntToInt64(v.AuxInt)
  5091  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5092  			break
  5093  		}
  5094  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5095  		x := v_1
  5096  		v.Reset(ssaop.OpARM64InvertFlags)
  5097  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  5098  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5099  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  5100  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  5101  		v1.AddArg(x)
  5102  		v0.AddArg(v1)
  5103  		v.AddArg(v0)
  5104  		return true
  5105  	}
  5106  	// match: (CMPshiftRA x (MOVDconst [c]) [d])
  5107  	// result: (CMPconst x [c>>uint64(d)])
  5108  	for {
  5109  		d := ssa.AuxIntToInt64(v.AuxInt)
  5110  		x := v_0
  5111  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5112  			break
  5113  		}
  5114  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5115  		v.Reset(ssaop.OpARM64CMPconst)
  5116  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  5117  		v.AddArg(x)
  5118  		return true
  5119  	}
  5120  	return false
  5121  }
  5122  func rewriteValue_OpARM64CMPshiftRL(v *ssa.Value) bool {
  5123  	v_1 := v.Args[1]
  5124  	v_0 := v.Args[0]
  5125  	b := v.Block
  5126  	// match: (CMPshiftRL (MOVDconst [c]) x [d])
  5127  	// result: (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d])))
  5128  	for {
  5129  		d := ssa.AuxIntToInt64(v.AuxInt)
  5130  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5131  			break
  5132  		}
  5133  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5134  		x := v_1
  5135  		v.Reset(ssaop.OpARM64InvertFlags)
  5136  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  5137  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5138  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  5139  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  5140  		v1.AddArg(x)
  5141  		v0.AddArg(v1)
  5142  		v.AddArg(v0)
  5143  		return true
  5144  	}
  5145  	// match: (CMPshiftRL x (MOVDconst [c]) [d])
  5146  	// result: (CMPconst x [int64(uint64(c)>>uint64(d))])
  5147  	for {
  5148  		d := ssa.AuxIntToInt64(v.AuxInt)
  5149  		x := v_0
  5150  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5151  			break
  5152  		}
  5153  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5154  		v.Reset(ssaop.OpARM64CMPconst)
  5155  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  5156  		v.AddArg(x)
  5157  		return true
  5158  	}
  5159  	return false
  5160  }
  5161  func rewriteValue_OpARM64CSEL(v *ssa.Value) bool {
  5162  	v_2 := v.Args[2]
  5163  	v_1 := v.Args[1]
  5164  	v_0 := v.Args[0]
  5165  	// match: (CSEL [cc] (MOVDconst [-1]) (MOVDconst [0]) flag)
  5166  	// result: (CSETM [cc] flag)
  5167  	for {
  5168  		cc := ssa.AuxIntToOp(v.AuxInt)
  5169  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != -1 || v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  5170  			break
  5171  		}
  5172  		flag := v_2
  5173  		v.Reset(ssaop.OpARM64CSETM)
  5174  		v.AuxInt = ssa.OpToAuxInt(cc)
  5175  		v.AddArg(flag)
  5176  		return true
  5177  	}
  5178  	// match: (CSEL [cc] (MOVDconst [0]) (MOVDconst [-1]) flag)
  5179  	// result: (CSETM [arm64Negate(cc)] flag)
  5180  	for {
  5181  		cc := ssa.AuxIntToOp(v.AuxInt)
  5182  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 || v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  5183  			break
  5184  		}
  5185  		flag := v_2
  5186  		v.Reset(ssaop.OpARM64CSETM)
  5187  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5188  		v.AddArg(flag)
  5189  		return true
  5190  	}
  5191  	// match: (CSEL [cc] x (MOVDconst [0]) flag)
  5192  	// result: (CSEL0 [cc] x flag)
  5193  	for {
  5194  		cc := ssa.AuxIntToOp(v.AuxInt)
  5195  		x := v_0
  5196  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  5197  			break
  5198  		}
  5199  		flag := v_2
  5200  		v.Reset(ssaop.OpARM64CSEL0)
  5201  		v.AuxInt = ssa.OpToAuxInt(cc)
  5202  		v.AddArg2(x, flag)
  5203  		return true
  5204  	}
  5205  	// match: (CSEL [cc] (MOVDconst [0]) y flag)
  5206  	// result: (CSEL0 [arm64Negate(cc)] y flag)
  5207  	for {
  5208  		cc := ssa.AuxIntToOp(v.AuxInt)
  5209  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5210  			break
  5211  		}
  5212  		y := v_1
  5213  		flag := v_2
  5214  		v.Reset(ssaop.OpARM64CSEL0)
  5215  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5216  		v.AddArg2(y, flag)
  5217  		return true
  5218  	}
  5219  	// match: (CSEL [cc] x (ADDconst [1] a) flag)
  5220  	// result: (CSINC [cc] x a flag)
  5221  	for {
  5222  		cc := ssa.AuxIntToOp(v.AuxInt)
  5223  		x := v_0
  5224  		if v_1.Op != ssaop.OpARM64ADDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  5225  			break
  5226  		}
  5227  		a := v_1.Args[0]
  5228  		flag := v_2
  5229  		v.Reset(ssaop.OpARM64CSINC)
  5230  		v.AuxInt = ssa.OpToAuxInt(cc)
  5231  		v.AddArg3(x, a, flag)
  5232  		return true
  5233  	}
  5234  	// match: (CSEL [cc] (ADDconst [1] a) x flag)
  5235  	// result: (CSINC [arm64Negate(cc)] x a flag)
  5236  	for {
  5237  		cc := ssa.AuxIntToOp(v.AuxInt)
  5238  		if v_0.Op != ssaop.OpARM64ADDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  5239  			break
  5240  		}
  5241  		a := v_0.Args[0]
  5242  		x := v_1
  5243  		flag := v_2
  5244  		v.Reset(ssaop.OpARM64CSINC)
  5245  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5246  		v.AddArg3(x, a, flag)
  5247  		return true
  5248  	}
  5249  	// match: (CSEL [cc] x (MVN a) flag)
  5250  	// result: (CSINV [cc] x a flag)
  5251  	for {
  5252  		cc := ssa.AuxIntToOp(v.AuxInt)
  5253  		x := v_0
  5254  		if v_1.Op != ssaop.OpARM64MVN {
  5255  			break
  5256  		}
  5257  		a := v_1.Args[0]
  5258  		flag := v_2
  5259  		v.Reset(ssaop.OpARM64CSINV)
  5260  		v.AuxInt = ssa.OpToAuxInt(cc)
  5261  		v.AddArg3(x, a, flag)
  5262  		return true
  5263  	}
  5264  	// match: (CSEL [cc] (MVN a) x flag)
  5265  	// result: (CSINV [arm64Negate(cc)] x a flag)
  5266  	for {
  5267  		cc := ssa.AuxIntToOp(v.AuxInt)
  5268  		if v_0.Op != ssaop.OpARM64MVN {
  5269  			break
  5270  		}
  5271  		a := v_0.Args[0]
  5272  		x := v_1
  5273  		flag := v_2
  5274  		v.Reset(ssaop.OpARM64CSINV)
  5275  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5276  		v.AddArg3(x, a, flag)
  5277  		return true
  5278  	}
  5279  	// match: (CSEL [cc] x (NEG a) flag)
  5280  	// result: (CSNEG [cc] x a flag)
  5281  	for {
  5282  		cc := ssa.AuxIntToOp(v.AuxInt)
  5283  		x := v_0
  5284  		if v_1.Op != ssaop.OpARM64NEG {
  5285  			break
  5286  		}
  5287  		a := v_1.Args[0]
  5288  		flag := v_2
  5289  		v.Reset(ssaop.OpARM64CSNEG)
  5290  		v.AuxInt = ssa.OpToAuxInt(cc)
  5291  		v.AddArg3(x, a, flag)
  5292  		return true
  5293  	}
  5294  	// match: (CSEL [cc] (NEG a) x flag)
  5295  	// result: (CSNEG [arm64Negate(cc)] x a flag)
  5296  	for {
  5297  		cc := ssa.AuxIntToOp(v.AuxInt)
  5298  		if v_0.Op != ssaop.OpARM64NEG {
  5299  			break
  5300  		}
  5301  		a := v_0.Args[0]
  5302  		x := v_1
  5303  		flag := v_2
  5304  		v.Reset(ssaop.OpARM64CSNEG)
  5305  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5306  		v.AddArg3(x, a, flag)
  5307  		return true
  5308  	}
  5309  	// match: (CSEL [cc] x y (InvertFlags cmp))
  5310  	// result: (CSEL [arm64Invert(cc)] x y cmp)
  5311  	for {
  5312  		cc := ssa.AuxIntToOp(v.AuxInt)
  5313  		x := v_0
  5314  		y := v_1
  5315  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5316  			break
  5317  		}
  5318  		cmp := v_2.Args[0]
  5319  		v.Reset(ssaop.OpARM64CSEL)
  5320  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5321  		v.AddArg3(x, y, cmp)
  5322  		return true
  5323  	}
  5324  	// match: (CSEL [cc] x _ flag)
  5325  	// cond: ccARM64Eval(cc, flag) > 0
  5326  	// result: x
  5327  	for {
  5328  		cc := ssa.AuxIntToOp(v.AuxInt)
  5329  		x := v_0
  5330  		flag := v_2
  5331  		if !(ccARM64Eval(cc, flag) > 0) {
  5332  			break
  5333  		}
  5334  		v.CopyOf(x)
  5335  		return true
  5336  	}
  5337  	// match: (CSEL [cc] _ y flag)
  5338  	// cond: ccARM64Eval(cc, flag) < 0
  5339  	// result: y
  5340  	for {
  5341  		cc := ssa.AuxIntToOp(v.AuxInt)
  5342  		y := v_1
  5343  		flag := v_2
  5344  		if !(ccARM64Eval(cc, flag) < 0) {
  5345  			break
  5346  		}
  5347  		v.CopyOf(y)
  5348  		return true
  5349  	}
  5350  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  5351  	// cond: cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil
  5352  	// result: (CSEL [boolval.Op] x y ssa.FlagArg(boolval))
  5353  	for {
  5354  		cc := ssa.AuxIntToOp(v.AuxInt)
  5355  		x := v_0
  5356  		y := v_1
  5357  		if v_2.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_2.AuxInt) != 0 {
  5358  			break
  5359  		}
  5360  		boolval := v_2.Args[0]
  5361  		if !(cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil) {
  5362  			break
  5363  		}
  5364  		v.Reset(ssaop.OpARM64CSEL)
  5365  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
  5366  		v.AddArg3(x, y, ssa.FlagArg(boolval))
  5367  		return true
  5368  	}
  5369  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  5370  	// cond: cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil
  5371  	// result: (CSEL [arm64Negate(boolval.Op)] x y ssa.FlagArg(boolval))
  5372  	for {
  5373  		cc := ssa.AuxIntToOp(v.AuxInt)
  5374  		x := v_0
  5375  		y := v_1
  5376  		if v_2.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_2.AuxInt) != 0 {
  5377  			break
  5378  		}
  5379  		boolval := v_2.Args[0]
  5380  		if !(cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil) {
  5381  			break
  5382  		}
  5383  		v.Reset(ssaop.OpARM64CSEL)
  5384  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(boolval.Op))
  5385  		v.AddArg3(x, y, ssa.FlagArg(boolval))
  5386  		return true
  5387  	}
  5388  	return false
  5389  }
  5390  func rewriteValue_OpARM64CSEL0(v *ssa.Value) bool {
  5391  	v_1 := v.Args[1]
  5392  	v_0 := v.Args[0]
  5393  	// match: (CSEL0 [cc] x (InvertFlags cmp))
  5394  	// result: (CSEL0 [arm64Invert(cc)] x cmp)
  5395  	for {
  5396  		cc := ssa.AuxIntToOp(v.AuxInt)
  5397  		x := v_0
  5398  		if v_1.Op != ssaop.OpARM64InvertFlags {
  5399  			break
  5400  		}
  5401  		cmp := v_1.Args[0]
  5402  		v.Reset(ssaop.OpARM64CSEL0)
  5403  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5404  		v.AddArg2(x, cmp)
  5405  		return true
  5406  	}
  5407  	// match: (CSEL0 [cc] x flag)
  5408  	// cond: ccARM64Eval(cc, flag) > 0
  5409  	// result: x
  5410  	for {
  5411  		cc := ssa.AuxIntToOp(v.AuxInt)
  5412  		x := v_0
  5413  		flag := v_1
  5414  		if !(ccARM64Eval(cc, flag) > 0) {
  5415  			break
  5416  		}
  5417  		v.CopyOf(x)
  5418  		return true
  5419  	}
  5420  	// match: (CSEL0 [cc] _ flag)
  5421  	// cond: ccARM64Eval(cc, flag) < 0
  5422  	// result: (MOVDconst [0])
  5423  	for {
  5424  		cc := ssa.AuxIntToOp(v.AuxInt)
  5425  		flag := v_1
  5426  		if !(ccARM64Eval(cc, flag) < 0) {
  5427  			break
  5428  		}
  5429  		v.Reset(ssaop.OpARM64MOVDconst)
  5430  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5431  		return true
  5432  	}
  5433  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  5434  	// cond: cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil
  5435  	// result: (CSEL0 [boolval.Op] x ssa.FlagArg(boolval))
  5436  	for {
  5437  		cc := ssa.AuxIntToOp(v.AuxInt)
  5438  		x := v_0
  5439  		if v_1.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_1.AuxInt) != 0 {
  5440  			break
  5441  		}
  5442  		boolval := v_1.Args[0]
  5443  		if !(cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil) {
  5444  			break
  5445  		}
  5446  		v.Reset(ssaop.OpARM64CSEL0)
  5447  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
  5448  		v.AddArg2(x, ssa.FlagArg(boolval))
  5449  		return true
  5450  	}
  5451  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  5452  	// cond: cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil
  5453  	// result: (CSEL0 [arm64Negate(boolval.Op)] x ssa.FlagArg(boolval))
  5454  	for {
  5455  		cc := ssa.AuxIntToOp(v.AuxInt)
  5456  		x := v_0
  5457  		if v_1.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_1.AuxInt) != 0 {
  5458  			break
  5459  		}
  5460  		boolval := v_1.Args[0]
  5461  		if !(cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil) {
  5462  			break
  5463  		}
  5464  		v.Reset(ssaop.OpARM64CSEL0)
  5465  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(boolval.Op))
  5466  		v.AddArg2(x, ssa.FlagArg(boolval))
  5467  		return true
  5468  	}
  5469  	return false
  5470  }
  5471  func rewriteValue_OpARM64CSETM(v *ssa.Value) bool {
  5472  	v_0 := v.Args[0]
  5473  	// match: (CSETM [cc] (InvertFlags cmp))
  5474  	// result: (CSETM [arm64Invert(cc)] cmp)
  5475  	for {
  5476  		cc := ssa.AuxIntToOp(v.AuxInt)
  5477  		if v_0.Op != ssaop.OpARM64InvertFlags {
  5478  			break
  5479  		}
  5480  		cmp := v_0.Args[0]
  5481  		v.Reset(ssaop.OpARM64CSETM)
  5482  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5483  		v.AddArg(cmp)
  5484  		return true
  5485  	}
  5486  	// match: (CSETM [cc] flag)
  5487  	// cond: ccARM64Eval(cc, flag) > 0
  5488  	// result: (MOVDconst [-1])
  5489  	for {
  5490  		cc := ssa.AuxIntToOp(v.AuxInt)
  5491  		flag := v_0
  5492  		if !(ccARM64Eval(cc, flag) > 0) {
  5493  			break
  5494  		}
  5495  		v.Reset(ssaop.OpARM64MOVDconst)
  5496  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5497  		return true
  5498  	}
  5499  	// match: (CSETM [cc] flag)
  5500  	// cond: ccARM64Eval(cc, flag) < 0
  5501  	// result: (MOVDconst [0])
  5502  	for {
  5503  		cc := ssa.AuxIntToOp(v.AuxInt)
  5504  		flag := v_0
  5505  		if !(ccARM64Eval(cc, flag) < 0) {
  5506  			break
  5507  		}
  5508  		v.Reset(ssaop.OpARM64MOVDconst)
  5509  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5510  		return true
  5511  	}
  5512  	return false
  5513  }
  5514  func rewriteValue_OpARM64CSINC(v *ssa.Value) bool {
  5515  	v_2 := v.Args[2]
  5516  	v_1 := v.Args[1]
  5517  	v_0 := v.Args[0]
  5518  	// match: (CSINC [cc] x y (InvertFlags cmp))
  5519  	// result: (CSINC [arm64Invert(cc)] x y cmp)
  5520  	for {
  5521  		cc := ssa.AuxIntToOp(v.AuxInt)
  5522  		x := v_0
  5523  		y := v_1
  5524  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5525  			break
  5526  		}
  5527  		cmp := v_2.Args[0]
  5528  		v.Reset(ssaop.OpARM64CSINC)
  5529  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5530  		v.AddArg3(x, y, cmp)
  5531  		return true
  5532  	}
  5533  	// match: (CSINC [cc] x _ flag)
  5534  	// cond: ccARM64Eval(cc, flag) > 0
  5535  	// result: x
  5536  	for {
  5537  		cc := ssa.AuxIntToOp(v.AuxInt)
  5538  		x := v_0
  5539  		flag := v_2
  5540  		if !(ccARM64Eval(cc, flag) > 0) {
  5541  			break
  5542  		}
  5543  		v.CopyOf(x)
  5544  		return true
  5545  	}
  5546  	// match: (CSINC [cc] _ y flag)
  5547  	// cond: ccARM64Eval(cc, flag) < 0
  5548  	// result: (ADDconst [1] y)
  5549  	for {
  5550  		cc := ssa.AuxIntToOp(v.AuxInt)
  5551  		y := v_1
  5552  		flag := v_2
  5553  		if !(ccARM64Eval(cc, flag) < 0) {
  5554  			break
  5555  		}
  5556  		v.Reset(ssaop.OpARM64ADDconst)
  5557  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5558  		v.AddArg(y)
  5559  		return true
  5560  	}
  5561  	return false
  5562  }
  5563  func rewriteValue_OpARM64CSINV(v *ssa.Value) bool {
  5564  	v_2 := v.Args[2]
  5565  	v_1 := v.Args[1]
  5566  	v_0 := v.Args[0]
  5567  	// match: (CSINV [cc] x y (InvertFlags cmp))
  5568  	// result: (CSINV [arm64Invert(cc)] x y cmp)
  5569  	for {
  5570  		cc := ssa.AuxIntToOp(v.AuxInt)
  5571  		x := v_0
  5572  		y := v_1
  5573  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5574  			break
  5575  		}
  5576  		cmp := v_2.Args[0]
  5577  		v.Reset(ssaop.OpARM64CSINV)
  5578  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5579  		v.AddArg3(x, y, cmp)
  5580  		return true
  5581  	}
  5582  	// match: (CSINV [cc] x _ flag)
  5583  	// cond: ccARM64Eval(cc, flag) > 0
  5584  	// result: x
  5585  	for {
  5586  		cc := ssa.AuxIntToOp(v.AuxInt)
  5587  		x := v_0
  5588  		flag := v_2
  5589  		if !(ccARM64Eval(cc, flag) > 0) {
  5590  			break
  5591  		}
  5592  		v.CopyOf(x)
  5593  		return true
  5594  	}
  5595  	// match: (CSINV [cc] _ y flag)
  5596  	// cond: ccARM64Eval(cc, flag) < 0
  5597  	// result: (Not y)
  5598  	for {
  5599  		cc := ssa.AuxIntToOp(v.AuxInt)
  5600  		y := v_1
  5601  		flag := v_2
  5602  		if !(ccARM64Eval(cc, flag) < 0) {
  5603  			break
  5604  		}
  5605  		v.Reset(ssaop.OpNot)
  5606  		v.AddArg(y)
  5607  		return true
  5608  	}
  5609  	return false
  5610  }
  5611  func rewriteValue_OpARM64CSNEG(v *ssa.Value) bool {
  5612  	v_2 := v.Args[2]
  5613  	v_1 := v.Args[1]
  5614  	v_0 := v.Args[0]
  5615  	// match: (CSNEG [cc] x y (InvertFlags cmp))
  5616  	// result: (CSNEG [arm64Invert(cc)] x y cmp)
  5617  	for {
  5618  		cc := ssa.AuxIntToOp(v.AuxInt)
  5619  		x := v_0
  5620  		y := v_1
  5621  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5622  			break
  5623  		}
  5624  		cmp := v_2.Args[0]
  5625  		v.Reset(ssaop.OpARM64CSNEG)
  5626  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5627  		v.AddArg3(x, y, cmp)
  5628  		return true
  5629  	}
  5630  	// match: (CSNEG [cc] x _ flag)
  5631  	// cond: ccARM64Eval(cc, flag) > 0
  5632  	// result: x
  5633  	for {
  5634  		cc := ssa.AuxIntToOp(v.AuxInt)
  5635  		x := v_0
  5636  		flag := v_2
  5637  		if !(ccARM64Eval(cc, flag) > 0) {
  5638  			break
  5639  		}
  5640  		v.CopyOf(x)
  5641  		return true
  5642  	}
  5643  	// match: (CSNEG [cc] _ y flag)
  5644  	// cond: ccARM64Eval(cc, flag) < 0
  5645  	// result: (NEG y)
  5646  	for {
  5647  		cc := ssa.AuxIntToOp(v.AuxInt)
  5648  		y := v_1
  5649  		flag := v_2
  5650  		if !(ccARM64Eval(cc, flag) < 0) {
  5651  			break
  5652  		}
  5653  		v.Reset(ssaop.OpARM64NEG)
  5654  		v.AddArg(y)
  5655  		return true
  5656  	}
  5657  	return false
  5658  }
  5659  func rewriteValue_OpARM64DIV(v *ssa.Value) bool {
  5660  	v_1 := v.Args[1]
  5661  	v_0 := v.Args[0]
  5662  	// match: (DIV (MOVDconst [c]) (MOVDconst [d]))
  5663  	// cond: d != 0
  5664  	// result: (MOVDconst [c/d])
  5665  	for {
  5666  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5667  			break
  5668  		}
  5669  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5670  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5671  			break
  5672  		}
  5673  		d := ssa.AuxIntToInt64(v_1.AuxInt)
  5674  		if !(d != 0) {
  5675  			break
  5676  		}
  5677  		v.Reset(ssaop.OpARM64MOVDconst)
  5678  		v.AuxInt = ssa.Int64ToAuxInt(c / d)
  5679  		return true
  5680  	}
  5681  	return false
  5682  }
  5683  func rewriteValue_OpARM64DIVW(v *ssa.Value) bool {
  5684  	v_1 := v.Args[1]
  5685  	v_0 := v.Args[0]
  5686  	// match: (DIVW (MOVDconst [c]) (MOVDconst [d]))
  5687  	// cond: d != 0
  5688  	// result: (MOVDconst [int64(uint32(int32(c)/int32(d)))])
  5689  	for {
  5690  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5691  			break
  5692  		}
  5693  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5694  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5695  			break
  5696  		}
  5697  		d := ssa.AuxIntToInt64(v_1.AuxInt)
  5698  		if !(d != 0) {
  5699  			break
  5700  		}
  5701  		v.Reset(ssaop.OpARM64MOVDconst)
  5702  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(int32(c) / int32(d))))
  5703  		return true
  5704  	}
  5705  	return false
  5706  }
  5707  func rewriteValue_OpARM64EON(v *ssa.Value) bool {
  5708  	v_1 := v.Args[1]
  5709  	v_0 := v.Args[0]
  5710  	// match: (EON x (MOVDconst [c]))
  5711  	// result: (XORconst [^c] x)
  5712  	for {
  5713  		x := v_0
  5714  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5715  			break
  5716  		}
  5717  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5718  		v.Reset(ssaop.OpARM64XORconst)
  5719  		v.AuxInt = ssa.Int64ToAuxInt(^c)
  5720  		v.AddArg(x)
  5721  		return true
  5722  	}
  5723  	// match: (EON x x)
  5724  	// result: (MOVDconst [-1])
  5725  	for {
  5726  		x := v_0
  5727  		if x != v_1 {
  5728  			break
  5729  		}
  5730  		v.Reset(ssaop.OpARM64MOVDconst)
  5731  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5732  		return true
  5733  	}
  5734  	// match: (EON x0 x1:(SLLconst [c] y))
  5735  	// cond: ssa.ClobberIfDead(x1)
  5736  	// result: (EONshiftLL x0 y [c])
  5737  	for {
  5738  		x0 := v_0
  5739  		x1 := v_1
  5740  		if x1.Op != ssaop.OpARM64SLLconst {
  5741  			break
  5742  		}
  5743  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5744  		y := x1.Args[0]
  5745  		if !(ssa.ClobberIfDead(x1)) {
  5746  			break
  5747  		}
  5748  		v.Reset(ssaop.OpARM64EONshiftLL)
  5749  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5750  		v.AddArg2(x0, y)
  5751  		return true
  5752  	}
  5753  	// match: (EON x0 x1:(SRLconst [c] y))
  5754  	// cond: ssa.ClobberIfDead(x1)
  5755  	// result: (EONshiftRL x0 y [c])
  5756  	for {
  5757  		x0 := v_0
  5758  		x1 := v_1
  5759  		if x1.Op != ssaop.OpARM64SRLconst {
  5760  			break
  5761  		}
  5762  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5763  		y := x1.Args[0]
  5764  		if !(ssa.ClobberIfDead(x1)) {
  5765  			break
  5766  		}
  5767  		v.Reset(ssaop.OpARM64EONshiftRL)
  5768  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5769  		v.AddArg2(x0, y)
  5770  		return true
  5771  	}
  5772  	// match: (EON x0 x1:(SRAconst [c] y))
  5773  	// cond: ssa.ClobberIfDead(x1)
  5774  	// result: (EONshiftRA x0 y [c])
  5775  	for {
  5776  		x0 := v_0
  5777  		x1 := v_1
  5778  		if x1.Op != ssaop.OpARM64SRAconst {
  5779  			break
  5780  		}
  5781  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5782  		y := x1.Args[0]
  5783  		if !(ssa.ClobberIfDead(x1)) {
  5784  			break
  5785  		}
  5786  		v.Reset(ssaop.OpARM64EONshiftRA)
  5787  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5788  		v.AddArg2(x0, y)
  5789  		return true
  5790  	}
  5791  	// match: (EON x0 x1:(RORconst [c] y))
  5792  	// cond: ssa.ClobberIfDead(x1)
  5793  	// result: (EONshiftRO x0 y [c])
  5794  	for {
  5795  		x0 := v_0
  5796  		x1 := v_1
  5797  		if x1.Op != ssaop.OpARM64RORconst {
  5798  			break
  5799  		}
  5800  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5801  		y := x1.Args[0]
  5802  		if !(ssa.ClobberIfDead(x1)) {
  5803  			break
  5804  		}
  5805  		v.Reset(ssaop.OpARM64EONshiftRO)
  5806  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5807  		v.AddArg2(x0, y)
  5808  		return true
  5809  	}
  5810  	return false
  5811  }
  5812  func rewriteValue_OpARM64EONshiftLL(v *ssa.Value) bool {
  5813  	v_1 := v.Args[1]
  5814  	v_0 := v.Args[0]
  5815  	// match: (EONshiftLL x (MOVDconst [c]) [d])
  5816  	// result: (XORconst x [^int64(uint64(c)<<uint64(d))])
  5817  	for {
  5818  		d := ssa.AuxIntToInt64(v.AuxInt)
  5819  		x := v_0
  5820  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5821  			break
  5822  		}
  5823  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5824  		v.Reset(ssaop.OpARM64XORconst)
  5825  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  5826  		v.AddArg(x)
  5827  		return true
  5828  	}
  5829  	// match: (EONshiftLL (SLLconst x [c]) x [c])
  5830  	// result: (MOVDconst [-1])
  5831  	for {
  5832  		c := ssa.AuxIntToInt64(v.AuxInt)
  5833  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5834  			break
  5835  		}
  5836  		x := v_0.Args[0]
  5837  		if x != v_1 {
  5838  			break
  5839  		}
  5840  		v.Reset(ssaop.OpARM64MOVDconst)
  5841  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5842  		return true
  5843  	}
  5844  	return false
  5845  }
  5846  func rewriteValue_OpARM64EONshiftRA(v *ssa.Value) bool {
  5847  	v_1 := v.Args[1]
  5848  	v_0 := v.Args[0]
  5849  	// match: (EONshiftRA x (MOVDconst [c]) [d])
  5850  	// result: (XORconst x [^(c>>uint64(d))])
  5851  	for {
  5852  		d := ssa.AuxIntToInt64(v.AuxInt)
  5853  		x := v_0
  5854  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5855  			break
  5856  		}
  5857  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5858  		v.Reset(ssaop.OpARM64XORconst)
  5859  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
  5860  		v.AddArg(x)
  5861  		return true
  5862  	}
  5863  	// match: (EONshiftRA (SRAconst x [c]) x [c])
  5864  	// result: (MOVDconst [-1])
  5865  	for {
  5866  		c := ssa.AuxIntToInt64(v.AuxInt)
  5867  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5868  			break
  5869  		}
  5870  		x := v_0.Args[0]
  5871  		if x != v_1 {
  5872  			break
  5873  		}
  5874  		v.Reset(ssaop.OpARM64MOVDconst)
  5875  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5876  		return true
  5877  	}
  5878  	return false
  5879  }
  5880  func rewriteValue_OpARM64EONshiftRL(v *ssa.Value) bool {
  5881  	v_1 := v.Args[1]
  5882  	v_0 := v.Args[0]
  5883  	// match: (EONshiftRL x (MOVDconst [c]) [d])
  5884  	// result: (XORconst x [^int64(uint64(c)>>uint64(d))])
  5885  	for {
  5886  		d := ssa.AuxIntToInt64(v.AuxInt)
  5887  		x := v_0
  5888  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5889  			break
  5890  		}
  5891  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5892  		v.Reset(ssaop.OpARM64XORconst)
  5893  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  5894  		v.AddArg(x)
  5895  		return true
  5896  	}
  5897  	// match: (EONshiftRL (SRLconst x [c]) x [c])
  5898  	// result: (MOVDconst [-1])
  5899  	for {
  5900  		c := ssa.AuxIntToInt64(v.AuxInt)
  5901  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5902  			break
  5903  		}
  5904  		x := v_0.Args[0]
  5905  		if x != v_1 {
  5906  			break
  5907  		}
  5908  		v.Reset(ssaop.OpARM64MOVDconst)
  5909  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5910  		return true
  5911  	}
  5912  	return false
  5913  }
  5914  func rewriteValue_OpARM64EONshiftRO(v *ssa.Value) bool {
  5915  	v_1 := v.Args[1]
  5916  	v_0 := v.Args[0]
  5917  	// match: (EONshiftRO x (MOVDconst [c]) [d])
  5918  	// result: (XORconst x [^rotateRight64(c, d)])
  5919  	for {
  5920  		d := ssa.AuxIntToInt64(v.AuxInt)
  5921  		x := v_0
  5922  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5923  			break
  5924  		}
  5925  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5926  		v.Reset(ssaop.OpARM64XORconst)
  5927  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
  5928  		v.AddArg(x)
  5929  		return true
  5930  	}
  5931  	// match: (EONshiftRO (RORconst x [c]) x [c])
  5932  	// result: (MOVDconst [-1])
  5933  	for {
  5934  		c := ssa.AuxIntToInt64(v.AuxInt)
  5935  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5936  			break
  5937  		}
  5938  		x := v_0.Args[0]
  5939  		if x != v_1 {
  5940  			break
  5941  		}
  5942  		v.Reset(ssaop.OpARM64MOVDconst)
  5943  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5944  		return true
  5945  	}
  5946  	return false
  5947  }
  5948  func rewriteValue_OpARM64Equal(v *ssa.Value) bool {
  5949  	v_0 := v.Args[0]
  5950  	b := v.Block
  5951  	// match: (Equal (CMPconst [0] z:(AND x y)))
  5952  	// cond: z.Uses == 1
  5953  	// result: (Equal (TST x y))
  5954  	for {
  5955  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5956  			break
  5957  		}
  5958  		z := v_0.Args[0]
  5959  		if z.Op != ssaop.OpARM64AND {
  5960  			break
  5961  		}
  5962  		y := z.Args[1]
  5963  		x := z.Args[0]
  5964  		if !(z.Uses == 1) {
  5965  			break
  5966  		}
  5967  		v.Reset(ssaop.OpARM64Equal)
  5968  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  5969  		v0.AddArg2(x, y)
  5970  		v.AddArg(v0)
  5971  		return true
  5972  	}
  5973  	// match: (Equal (CMPWconst [0] x:(ANDconst [c] y)))
  5974  	// cond: x.Uses == 1
  5975  	// result: (Equal (TSTWconst [int32(c)] y))
  5976  	for {
  5977  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5978  			break
  5979  		}
  5980  		x := v_0.Args[0]
  5981  		if x.Op != ssaop.OpARM64ANDconst {
  5982  			break
  5983  		}
  5984  		c := ssa.AuxIntToInt64(x.AuxInt)
  5985  		y := x.Args[0]
  5986  		if !(x.Uses == 1) {
  5987  			break
  5988  		}
  5989  		v.Reset(ssaop.OpARM64Equal)
  5990  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  5991  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  5992  		v0.AddArg(y)
  5993  		v.AddArg(v0)
  5994  		return true
  5995  	}
  5996  	// match: (Equal (CMPWconst [0] z:(AND x y)))
  5997  	// cond: z.Uses == 1
  5998  	// result: (Equal (TSTW x y))
  5999  	for {
  6000  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6001  			break
  6002  		}
  6003  		z := v_0.Args[0]
  6004  		if z.Op != ssaop.OpARM64AND {
  6005  			break
  6006  		}
  6007  		y := z.Args[1]
  6008  		x := z.Args[0]
  6009  		if !(z.Uses == 1) {
  6010  			break
  6011  		}
  6012  		v.Reset(ssaop.OpARM64Equal)
  6013  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  6014  		v0.AddArg2(x, y)
  6015  		v.AddArg(v0)
  6016  		return true
  6017  	}
  6018  	// match: (Equal (CMPconst [0] x:(ANDconst [c] y)))
  6019  	// cond: x.Uses == 1
  6020  	// result: (Equal (TSTconst [c] y))
  6021  	for {
  6022  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6023  			break
  6024  		}
  6025  		x := v_0.Args[0]
  6026  		if x.Op != ssaop.OpARM64ANDconst {
  6027  			break
  6028  		}
  6029  		c := ssa.AuxIntToInt64(x.AuxInt)
  6030  		y := x.Args[0]
  6031  		if !(x.Uses == 1) {
  6032  			break
  6033  		}
  6034  		v.Reset(ssaop.OpARM64Equal)
  6035  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  6036  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  6037  		v0.AddArg(y)
  6038  		v.AddArg(v0)
  6039  		return true
  6040  	}
  6041  	// match: (Equal (CMP x z:(NEG y)))
  6042  	// cond: z.Uses == 1
  6043  	// result: (Equal (CMN x y))
  6044  	for {
  6045  		if v_0.Op != ssaop.OpARM64CMP {
  6046  			break
  6047  		}
  6048  		_ = v_0.Args[1]
  6049  		x := v_0.Args[0]
  6050  		z := v_0.Args[1]
  6051  		if z.Op != ssaop.OpARM64NEG {
  6052  			break
  6053  		}
  6054  		y := z.Args[0]
  6055  		if !(z.Uses == 1) {
  6056  			break
  6057  		}
  6058  		v.Reset(ssaop.OpARM64Equal)
  6059  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  6060  		v0.AddArg2(x, y)
  6061  		v.AddArg(v0)
  6062  		return true
  6063  	}
  6064  	// match: (Equal (CMPW x z:(NEG y)))
  6065  	// cond: z.Uses == 1
  6066  	// result: (Equal (CMNW x y))
  6067  	for {
  6068  		if v_0.Op != ssaop.OpARM64CMPW {
  6069  			break
  6070  		}
  6071  		_ = v_0.Args[1]
  6072  		x := v_0.Args[0]
  6073  		z := v_0.Args[1]
  6074  		if z.Op != ssaop.OpARM64NEG {
  6075  			break
  6076  		}
  6077  		y := z.Args[0]
  6078  		if !(z.Uses == 1) {
  6079  			break
  6080  		}
  6081  		v.Reset(ssaop.OpARM64Equal)
  6082  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  6083  		v0.AddArg2(x, y)
  6084  		v.AddArg(v0)
  6085  		return true
  6086  	}
  6087  	// match: (Equal (CMPconst [0] x:(ADDconst [c] y)))
  6088  	// cond: x.Uses == 1
  6089  	// result: (Equal (CMNconst [c] y))
  6090  	for {
  6091  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6092  			break
  6093  		}
  6094  		x := v_0.Args[0]
  6095  		if x.Op != ssaop.OpARM64ADDconst {
  6096  			break
  6097  		}
  6098  		c := ssa.AuxIntToInt64(x.AuxInt)
  6099  		y := x.Args[0]
  6100  		if !(x.Uses == 1) {
  6101  			break
  6102  		}
  6103  		v.Reset(ssaop.OpARM64Equal)
  6104  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  6105  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  6106  		v0.AddArg(y)
  6107  		v.AddArg(v0)
  6108  		return true
  6109  	}
  6110  	// match: (Equal (CMPWconst [0] x:(ADDconst [c] y)))
  6111  	// cond: x.Uses == 1
  6112  	// result: (Equal (CMNWconst [int32(c)] y))
  6113  	for {
  6114  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6115  			break
  6116  		}
  6117  		x := v_0.Args[0]
  6118  		if x.Op != ssaop.OpARM64ADDconst {
  6119  			break
  6120  		}
  6121  		c := ssa.AuxIntToInt64(x.AuxInt)
  6122  		y := x.Args[0]
  6123  		if !(x.Uses == 1) {
  6124  			break
  6125  		}
  6126  		v.Reset(ssaop.OpARM64Equal)
  6127  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  6128  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6129  		v0.AddArg(y)
  6130  		v.AddArg(v0)
  6131  		return true
  6132  	}
  6133  	// match: (Equal (CMPconst [0] z:(ADD x y)))
  6134  	// cond: z.Uses == 1
  6135  	// result: (Equal (CMN x y))
  6136  	for {
  6137  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6138  			break
  6139  		}
  6140  		z := v_0.Args[0]
  6141  		if z.Op != ssaop.OpARM64ADD {
  6142  			break
  6143  		}
  6144  		y := z.Args[1]
  6145  		x := z.Args[0]
  6146  		if !(z.Uses == 1) {
  6147  			break
  6148  		}
  6149  		v.Reset(ssaop.OpARM64Equal)
  6150  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  6151  		v0.AddArg2(x, y)
  6152  		v.AddArg(v0)
  6153  		return true
  6154  	}
  6155  	// match: (Equal (CMPWconst [0] z:(ADD x y)))
  6156  	// cond: z.Uses == 1
  6157  	// result: (Equal (CMNW x y))
  6158  	for {
  6159  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6160  			break
  6161  		}
  6162  		z := v_0.Args[0]
  6163  		if z.Op != ssaop.OpARM64ADD {
  6164  			break
  6165  		}
  6166  		y := z.Args[1]
  6167  		x := z.Args[0]
  6168  		if !(z.Uses == 1) {
  6169  			break
  6170  		}
  6171  		v.Reset(ssaop.OpARM64Equal)
  6172  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  6173  		v0.AddArg2(x, y)
  6174  		v.AddArg(v0)
  6175  		return true
  6176  	}
  6177  	// match: (Equal (CMPconst [0] z:(MADD a x y)))
  6178  	// cond: z.Uses == 1
  6179  	// result: (Equal (CMN a (MUL <x.Type> x y)))
  6180  	for {
  6181  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6182  			break
  6183  		}
  6184  		z := v_0.Args[0]
  6185  		if z.Op != ssaop.OpARM64MADD {
  6186  			break
  6187  		}
  6188  		y := z.Args[2]
  6189  		a := z.Args[0]
  6190  		x := z.Args[1]
  6191  		if !(z.Uses == 1) {
  6192  			break
  6193  		}
  6194  		v.Reset(ssaop.OpARM64Equal)
  6195  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  6196  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  6197  		v1.AddArg2(x, y)
  6198  		v0.AddArg2(a, v1)
  6199  		v.AddArg(v0)
  6200  		return true
  6201  	}
  6202  	// match: (Equal (CMPWconst [0] z:(MADDW a x y)))
  6203  	// cond: z.Uses == 1
  6204  	// result: (Equal (CMNW a (MULW <x.Type> x y)))
  6205  	for {
  6206  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6207  			break
  6208  		}
  6209  		z := v_0.Args[0]
  6210  		if z.Op != ssaop.OpARM64MADDW {
  6211  			break
  6212  		}
  6213  		y := z.Args[2]
  6214  		a := z.Args[0]
  6215  		x := z.Args[1]
  6216  		if !(z.Uses == 1) {
  6217  			break
  6218  		}
  6219  		v.Reset(ssaop.OpARM64Equal)
  6220  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  6221  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  6222  		v1.AddArg2(x, y)
  6223  		v0.AddArg2(a, v1)
  6224  		v.AddArg(v0)
  6225  		return true
  6226  	}
  6227  	// match: (Equal (CMPconst [0] z:(MSUB a x y)))
  6228  	// cond: z.Uses == 1
  6229  	// result: (Equal (CMP a (MUL <x.Type> x y)))
  6230  	for {
  6231  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6232  			break
  6233  		}
  6234  		z := v_0.Args[0]
  6235  		if z.Op != ssaop.OpARM64MSUB {
  6236  			break
  6237  		}
  6238  		y := z.Args[2]
  6239  		a := z.Args[0]
  6240  		x := z.Args[1]
  6241  		if !(z.Uses == 1) {
  6242  			break
  6243  		}
  6244  		v.Reset(ssaop.OpARM64Equal)
  6245  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
  6246  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  6247  		v1.AddArg2(x, y)
  6248  		v0.AddArg2(a, v1)
  6249  		v.AddArg(v0)
  6250  		return true
  6251  	}
  6252  	// match: (Equal (CMPWconst [0] z:(MSUBW a x y)))
  6253  	// cond: z.Uses == 1
  6254  	// result: (Equal (CMPW a (MULW <x.Type> x y)))
  6255  	for {
  6256  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6257  			break
  6258  		}
  6259  		z := v_0.Args[0]
  6260  		if z.Op != ssaop.OpARM64MSUBW {
  6261  			break
  6262  		}
  6263  		y := z.Args[2]
  6264  		a := z.Args[0]
  6265  		x := z.Args[1]
  6266  		if !(z.Uses == 1) {
  6267  			break
  6268  		}
  6269  		v.Reset(ssaop.OpARM64Equal)
  6270  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
  6271  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  6272  		v1.AddArg2(x, y)
  6273  		v0.AddArg2(a, v1)
  6274  		v.AddArg(v0)
  6275  		return true
  6276  	}
  6277  	// match: (Equal (FlagConstant [fc]))
  6278  	// result: (MOVDconst [ssa.B2i(fc.Eq())])
  6279  	for {
  6280  		if v_0.Op != ssaop.OpARM64FlagConstant {
  6281  			break
  6282  		}
  6283  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  6284  		v.Reset(ssaop.OpARM64MOVDconst)
  6285  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Eq()))
  6286  		return true
  6287  	}
  6288  	// match: (Equal (InvertFlags x))
  6289  	// result: (Equal x)
  6290  	for {
  6291  		if v_0.Op != ssaop.OpARM64InvertFlags {
  6292  			break
  6293  		}
  6294  		x := v_0.Args[0]
  6295  		v.Reset(ssaop.OpARM64Equal)
  6296  		v.AddArg(x)
  6297  		return true
  6298  	}
  6299  	return false
  6300  }
  6301  func rewriteValue_OpARM64FADDD(v *ssa.Value) bool {
  6302  	v_1 := v.Args[1]
  6303  	v_0 := v.Args[0]
  6304  	// match: (FADDD a (FMULD x y))
  6305  	// cond: a.Block.Func.UseFMA(v)
  6306  	// result: (FMADDD a x y)
  6307  	for {
  6308  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6309  			a := v_0
  6310  			if v_1.Op != ssaop.OpARM64FMULD {
  6311  				continue
  6312  			}
  6313  			y := v_1.Args[1]
  6314  			x := v_1.Args[0]
  6315  			if !(a.Block.Func.UseFMA(v)) {
  6316  				continue
  6317  			}
  6318  			v.Reset(ssaop.OpARM64FMADDD)
  6319  			v.AddArg3(a, x, y)
  6320  			return true
  6321  		}
  6322  		break
  6323  	}
  6324  	// match: (FADDD a (FNMULD x y))
  6325  	// cond: a.Block.Func.UseFMA(v)
  6326  	// result: (FMSUBD a x y)
  6327  	for {
  6328  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6329  			a := v_0
  6330  			if v_1.Op != ssaop.OpARM64FNMULD {
  6331  				continue
  6332  			}
  6333  			y := v_1.Args[1]
  6334  			x := v_1.Args[0]
  6335  			if !(a.Block.Func.UseFMA(v)) {
  6336  				continue
  6337  			}
  6338  			v.Reset(ssaop.OpARM64FMSUBD)
  6339  			v.AddArg3(a, x, y)
  6340  			return true
  6341  		}
  6342  		break
  6343  	}
  6344  	return false
  6345  }
  6346  func rewriteValue_OpARM64FADDS(v *ssa.Value) bool {
  6347  	v_1 := v.Args[1]
  6348  	v_0 := v.Args[0]
  6349  	// match: (FADDS a (FMULS x y))
  6350  	// cond: a.Block.Func.UseFMA(v)
  6351  	// result: (FMADDS a x y)
  6352  	for {
  6353  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6354  			a := v_0
  6355  			if v_1.Op != ssaop.OpARM64FMULS {
  6356  				continue
  6357  			}
  6358  			y := v_1.Args[1]
  6359  			x := v_1.Args[0]
  6360  			if !(a.Block.Func.UseFMA(v)) {
  6361  				continue
  6362  			}
  6363  			v.Reset(ssaop.OpARM64FMADDS)
  6364  			v.AddArg3(a, x, y)
  6365  			return true
  6366  		}
  6367  		break
  6368  	}
  6369  	// match: (FADDS a (FNMULS x y))
  6370  	// cond: a.Block.Func.UseFMA(v)
  6371  	// result: (FMSUBS a x y)
  6372  	for {
  6373  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6374  			a := v_0
  6375  			if v_1.Op != ssaop.OpARM64FNMULS {
  6376  				continue
  6377  			}
  6378  			y := v_1.Args[1]
  6379  			x := v_1.Args[0]
  6380  			if !(a.Block.Func.UseFMA(v)) {
  6381  				continue
  6382  			}
  6383  			v.Reset(ssaop.OpARM64FMSUBS)
  6384  			v.AddArg3(a, x, y)
  6385  			return true
  6386  		}
  6387  		break
  6388  	}
  6389  	return false
  6390  }
  6391  func rewriteValue_OpARM64FCMPD(v *ssa.Value) bool {
  6392  	v_1 := v.Args[1]
  6393  	v_0 := v.Args[0]
  6394  	b := v.Block
  6395  	// match: (FCMPD x (FMOVDconst [0]))
  6396  	// result: (FCMPD0 x)
  6397  	for {
  6398  		x := v_0
  6399  		if v_1.Op != ssaop.OpARM64FMOVDconst || ssa.AuxIntToFloat64(v_1.AuxInt) != 0 {
  6400  			break
  6401  		}
  6402  		v.Reset(ssaop.OpARM64FCMPD0)
  6403  		v.AddArg(x)
  6404  		return true
  6405  	}
  6406  	// match: (FCMPD (FMOVDconst [0]) x)
  6407  	// result: (InvertFlags (FCMPD0 x))
  6408  	for {
  6409  		if v_0.Op != ssaop.OpARM64FMOVDconst || ssa.AuxIntToFloat64(v_0.AuxInt) != 0 {
  6410  			break
  6411  		}
  6412  		x := v_1
  6413  		v.Reset(ssaop.OpARM64InvertFlags)
  6414  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD0, types.TypeFlags)
  6415  		v0.AddArg(x)
  6416  		v.AddArg(v0)
  6417  		return true
  6418  	}
  6419  	return false
  6420  }
  6421  func rewriteValue_OpARM64FCMPS(v *ssa.Value) bool {
  6422  	v_1 := v.Args[1]
  6423  	v_0 := v.Args[0]
  6424  	b := v.Block
  6425  	// match: (FCMPS x (FMOVSconst [0]))
  6426  	// result: (FCMPS0 x)
  6427  	for {
  6428  		x := v_0
  6429  		if v_1.Op != ssaop.OpARM64FMOVSconst || ssa.AuxIntToFloat64(v_1.AuxInt) != 0 {
  6430  			break
  6431  		}
  6432  		v.Reset(ssaop.OpARM64FCMPS0)
  6433  		v.AddArg(x)
  6434  		return true
  6435  	}
  6436  	// match: (FCMPS (FMOVSconst [0]) x)
  6437  	// result: (InvertFlags (FCMPS0 x))
  6438  	for {
  6439  		if v_0.Op != ssaop.OpARM64FMOVSconst || ssa.AuxIntToFloat64(v_0.AuxInt) != 0 {
  6440  			break
  6441  		}
  6442  		x := v_1
  6443  		v.Reset(ssaop.OpARM64InvertFlags)
  6444  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS0, types.TypeFlags)
  6445  		v0.AddArg(x)
  6446  		v.AddArg(v0)
  6447  		return true
  6448  	}
  6449  	return false
  6450  }
  6451  func rewriteValue_OpARM64FCSELD(v *ssa.Value) bool {
  6452  	v_2 := v.Args[2]
  6453  	v_1 := v.Args[1]
  6454  	v_0 := v.Args[0]
  6455  	// match: (FCSELD [cc] x y (InvertFlags cmp))
  6456  	// result: (FCSELD [arm64Invert(cc)] x y cmp)
  6457  	for {
  6458  		cc := ssa.AuxIntToOp(v.AuxInt)
  6459  		x := v_0
  6460  		y := v_1
  6461  		if v_2.Op != ssaop.OpARM64InvertFlags {
  6462  			break
  6463  		}
  6464  		cmp := v_2.Args[0]
  6465  		v.Reset(ssaop.OpARM64FCSELD)
  6466  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  6467  		v.AddArg3(x, y, cmp)
  6468  		return true
  6469  	}
  6470  	return false
  6471  }
  6472  func rewriteValue_OpARM64FCSELS(v *ssa.Value) bool {
  6473  	v_2 := v.Args[2]
  6474  	v_1 := v.Args[1]
  6475  	v_0 := v.Args[0]
  6476  	// match: (FCSELS [cc] x y (InvertFlags cmp))
  6477  	// result: (FCSELS [arm64Invert(cc)] x y cmp)
  6478  	for {
  6479  		cc := ssa.AuxIntToOp(v.AuxInt)
  6480  		x := v_0
  6481  		y := v_1
  6482  		if v_2.Op != ssaop.OpARM64InvertFlags {
  6483  			break
  6484  		}
  6485  		cmp := v_2.Args[0]
  6486  		v.Reset(ssaop.OpARM64FCSELS)
  6487  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  6488  		v.AddArg3(x, y, cmp)
  6489  		return true
  6490  	}
  6491  	return false
  6492  }
  6493  func rewriteValue_OpARM64FCVTDS(v *ssa.Value) bool {
  6494  	v_0 := v.Args[0]
  6495  	// match: (FCVTDS (FABSD (FCVTSD x)))
  6496  	// result: (FABSS x)
  6497  	for {
  6498  		if v_0.Op != ssaop.OpARM64FABSD {
  6499  			break
  6500  		}
  6501  		v_0_0 := v_0.Args[0]
  6502  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6503  			break
  6504  		}
  6505  		x := v_0_0.Args[0]
  6506  		v.Reset(ssaop.OpARM64FABSS)
  6507  		v.AddArg(x)
  6508  		return true
  6509  	}
  6510  	// match: (FCVTDS (FSQRTD (FCVTSD x)))
  6511  	// result: (FSQRTS x)
  6512  	for {
  6513  		if v_0.Op != ssaop.OpARM64FSQRTD {
  6514  			break
  6515  		}
  6516  		v_0_0 := v_0.Args[0]
  6517  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6518  			break
  6519  		}
  6520  		x := v_0_0.Args[0]
  6521  		v.Reset(ssaop.OpARM64FSQRTS)
  6522  		v.AddArg(x)
  6523  		return true
  6524  	}
  6525  	// match: (FCVTDS (FRINTPD (FCVTSD x)))
  6526  	// result: (FRINTPS x)
  6527  	for {
  6528  		if v_0.Op != ssaop.OpARM64FRINTPD {
  6529  			break
  6530  		}
  6531  		v_0_0 := v_0.Args[0]
  6532  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6533  			break
  6534  		}
  6535  		x := v_0_0.Args[0]
  6536  		v.Reset(ssaop.OpARM64FRINTPS)
  6537  		v.AddArg(x)
  6538  		return true
  6539  	}
  6540  	// match: (FCVTDS (FRINTMD (FCVTSD x)))
  6541  	// result: (FRINTMS x)
  6542  	for {
  6543  		if v_0.Op != ssaop.OpARM64FRINTMD {
  6544  			break
  6545  		}
  6546  		v_0_0 := v_0.Args[0]
  6547  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6548  			break
  6549  		}
  6550  		x := v_0_0.Args[0]
  6551  		v.Reset(ssaop.OpARM64FRINTMS)
  6552  		v.AddArg(x)
  6553  		return true
  6554  	}
  6555  	// match: (FCVTDS (FRINTAD (FCVTSD x)))
  6556  	// result: (FRINTAS x)
  6557  	for {
  6558  		if v_0.Op != ssaop.OpARM64FRINTAD {
  6559  			break
  6560  		}
  6561  		v_0_0 := v_0.Args[0]
  6562  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6563  			break
  6564  		}
  6565  		x := v_0_0.Args[0]
  6566  		v.Reset(ssaop.OpARM64FRINTAS)
  6567  		v.AddArg(x)
  6568  		return true
  6569  	}
  6570  	// match: (FCVTDS (FRINTND (FCVTSD x)))
  6571  	// result: (FRINTNS x)
  6572  	for {
  6573  		if v_0.Op != ssaop.OpARM64FRINTND {
  6574  			break
  6575  		}
  6576  		v_0_0 := v_0.Args[0]
  6577  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6578  			break
  6579  		}
  6580  		x := v_0_0.Args[0]
  6581  		v.Reset(ssaop.OpARM64FRINTNS)
  6582  		v.AddArg(x)
  6583  		return true
  6584  	}
  6585  	// match: (FCVTDS (FRINTZD (FCVTSD x)))
  6586  	// result: (FRINTZS x)
  6587  	for {
  6588  		if v_0.Op != ssaop.OpARM64FRINTZD {
  6589  			break
  6590  		}
  6591  		v_0_0 := v_0.Args[0]
  6592  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6593  			break
  6594  		}
  6595  		x := v_0_0.Args[0]
  6596  		v.Reset(ssaop.OpARM64FRINTZS)
  6597  		v.AddArg(x)
  6598  		return true
  6599  	}
  6600  	return false
  6601  }
  6602  func rewriteValue_OpARM64FLDPQ(v *ssa.Value) bool {
  6603  	v_1 := v.Args[1]
  6604  	v_0 := v.Args[0]
  6605  	b := v.Block
  6606  	config := b.Func.Config
  6607  	// match: (FLDPQ [off1] {sym} (ADDconst [off2] ptr) mem)
  6608  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6609  	// result: (FLDPQ [off1+int32(off2)] {sym} ptr mem)
  6610  	for {
  6611  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6612  		sym := ssa.AuxToSym(v.Aux)
  6613  		if v_0.Op != ssaop.OpARM64ADDconst {
  6614  			break
  6615  		}
  6616  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6617  		ptr := v_0.Args[0]
  6618  		mem := v_1
  6619  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6620  			break
  6621  		}
  6622  		v.Reset(ssaop.OpARM64FLDPQ)
  6623  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6624  		v.Aux = ssa.SymToAux(sym)
  6625  		v.AddArg2(ptr, mem)
  6626  		return true
  6627  	}
  6628  	// match: (FLDPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6629  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6630  	// result: (FLDPQ [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6631  	for {
  6632  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6633  		sym1 := ssa.AuxToSym(v.Aux)
  6634  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6635  			break
  6636  		}
  6637  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6638  		sym2 := ssa.AuxToSym(v_0.Aux)
  6639  		ptr := v_0.Args[0]
  6640  		mem := v_1
  6641  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6642  			break
  6643  		}
  6644  		v.Reset(ssaop.OpARM64FLDPQ)
  6645  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6646  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6647  		v.AddArg2(ptr, mem)
  6648  		return true
  6649  	}
  6650  	return false
  6651  }
  6652  func rewriteValue_OpARM64FMOVDfpgp(v *ssa.Value) bool {
  6653  	v_0 := v.Args[0]
  6654  	b := v.Block
  6655  	// match: (FMOVDfpgp <t> (Arg [off] {sym}))
  6656  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  6657  	for {
  6658  		t := v.Type
  6659  		if v_0.Op != ssaop.OpArg {
  6660  			break
  6661  		}
  6662  		off := ssa.AuxIntToInt32(v_0.AuxInt)
  6663  		sym := ssa.AuxToSym(v_0.Aux)
  6664  		b = b.Func.Entry
  6665  		v0 := b.NewValue0(v.Pos, ssaop.OpArg, t)
  6666  		v.CopyOf(v0)
  6667  		v0.AuxInt = ssa.Int32ToAuxInt(off)
  6668  		v0.Aux = ssa.SymToAux(sym)
  6669  		return true
  6670  	}
  6671  	return false
  6672  }
  6673  func rewriteValue_OpARM64FMOVDgpfp(v *ssa.Value) bool {
  6674  	v_0 := v.Args[0]
  6675  	b := v.Block
  6676  	// match: (FMOVDgpfp <t> (Arg [off] {sym}))
  6677  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  6678  	for {
  6679  		t := v.Type
  6680  		if v_0.Op != ssaop.OpArg {
  6681  			break
  6682  		}
  6683  		off := ssa.AuxIntToInt32(v_0.AuxInt)
  6684  		sym := ssa.AuxToSym(v_0.Aux)
  6685  		b = b.Func.Entry
  6686  		v0 := b.NewValue0(v.Pos, ssaop.OpArg, t)
  6687  		v.CopyOf(v0)
  6688  		v0.AuxInt = ssa.Int32ToAuxInt(off)
  6689  		v0.Aux = ssa.SymToAux(sym)
  6690  		return true
  6691  	}
  6692  	return false
  6693  }
  6694  func rewriteValue_OpARM64FMOVDload(v *ssa.Value) bool {
  6695  	v_1 := v.Args[1]
  6696  	v_0 := v.Args[0]
  6697  	b := v.Block
  6698  	config := b.Func.Config
  6699  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr val _))
  6700  	// result: (FMOVDgpfp val)
  6701  	for {
  6702  		off := ssa.AuxIntToInt32(v.AuxInt)
  6703  		sym := ssa.AuxToSym(v.Aux)
  6704  		ptr := v_0
  6705  		if v_1.Op != ssaop.OpARM64MOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  6706  			break
  6707  		}
  6708  		val := v_1.Args[1]
  6709  		if ptr != v_1.Args[0] {
  6710  			break
  6711  		}
  6712  		v.Reset(ssaop.OpARM64FMOVDgpfp)
  6713  		v.AddArg(val)
  6714  		return true
  6715  	}
  6716  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  6717  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6718  	// result: (FMOVDload [off1+int32(off2)] {sym} ptr mem)
  6719  	for {
  6720  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6721  		sym := ssa.AuxToSym(v.Aux)
  6722  		if v_0.Op != ssaop.OpARM64ADDconst {
  6723  			break
  6724  		}
  6725  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6726  		ptr := v_0.Args[0]
  6727  		mem := v_1
  6728  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6729  			break
  6730  		}
  6731  		v.Reset(ssaop.OpARM64FMOVDload)
  6732  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6733  		v.Aux = ssa.SymToAux(sym)
  6734  		v.AddArg2(ptr, mem)
  6735  		return true
  6736  	}
  6737  	// match: (FMOVDload [off] {sym} (ADD ptr idx) mem)
  6738  	// cond: off == 0 && sym == nil
  6739  	// result: (FMOVDloadidx ptr idx mem)
  6740  	for {
  6741  		off := ssa.AuxIntToInt32(v.AuxInt)
  6742  		sym := ssa.AuxToSym(v.Aux)
  6743  		if v_0.Op != ssaop.OpARM64ADD {
  6744  			break
  6745  		}
  6746  		idx := v_0.Args[1]
  6747  		ptr := v_0.Args[0]
  6748  		mem := v_1
  6749  		if !(off == 0 && sym == nil) {
  6750  			break
  6751  		}
  6752  		v.Reset(ssaop.OpARM64FMOVDloadidx)
  6753  		v.AddArg3(ptr, idx, mem)
  6754  		return true
  6755  	}
  6756  	// match: (FMOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
  6757  	// cond: off == 0 && sym == nil
  6758  	// result: (FMOVDloadidx8 ptr idx mem)
  6759  	for {
  6760  		off := ssa.AuxIntToInt32(v.AuxInt)
  6761  		sym := ssa.AuxToSym(v.Aux)
  6762  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6763  			break
  6764  		}
  6765  		idx := v_0.Args[1]
  6766  		ptr := v_0.Args[0]
  6767  		mem := v_1
  6768  		if !(off == 0 && sym == nil) {
  6769  			break
  6770  		}
  6771  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6772  		v.AddArg3(ptr, idx, mem)
  6773  		return true
  6774  	}
  6775  	// match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6776  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6777  	// result: (FMOVDload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6778  	for {
  6779  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6780  		sym1 := ssa.AuxToSym(v.Aux)
  6781  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6782  			break
  6783  		}
  6784  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6785  		sym2 := ssa.AuxToSym(v_0.Aux)
  6786  		ptr := v_0.Args[0]
  6787  		mem := v_1
  6788  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6789  			break
  6790  		}
  6791  		v.Reset(ssaop.OpARM64FMOVDload)
  6792  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6793  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6794  		v.AddArg2(ptr, mem)
  6795  		return true
  6796  	}
  6797  	return false
  6798  }
  6799  func rewriteValue_OpARM64FMOVDloadidx(v *ssa.Value) bool {
  6800  	v_2 := v.Args[2]
  6801  	v_1 := v.Args[1]
  6802  	v_0 := v.Args[0]
  6803  	// match: (FMOVDloadidx ptr (MOVDconst [c]) mem)
  6804  	// cond: ssa.Is32Bit(c)
  6805  	// result: (FMOVDload [int32(c)] ptr mem)
  6806  	for {
  6807  		ptr := v_0
  6808  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6809  			break
  6810  		}
  6811  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6812  		mem := v_2
  6813  		if !(ssa.Is32Bit(c)) {
  6814  			break
  6815  		}
  6816  		v.Reset(ssaop.OpARM64FMOVDload)
  6817  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6818  		v.AddArg2(ptr, mem)
  6819  		return true
  6820  	}
  6821  	// match: (FMOVDloadidx (MOVDconst [c]) ptr mem)
  6822  	// cond: ssa.Is32Bit(c)
  6823  	// result: (FMOVDload [int32(c)] ptr mem)
  6824  	for {
  6825  		if v_0.Op != ssaop.OpARM64MOVDconst {
  6826  			break
  6827  		}
  6828  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  6829  		ptr := v_1
  6830  		mem := v_2
  6831  		if !(ssa.Is32Bit(c)) {
  6832  			break
  6833  		}
  6834  		v.Reset(ssaop.OpARM64FMOVDload)
  6835  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6836  		v.AddArg2(ptr, mem)
  6837  		return true
  6838  	}
  6839  	// match: (FMOVDloadidx ptr (SLLconst [3] idx) mem)
  6840  	// result: (FMOVDloadidx8 ptr idx mem)
  6841  	for {
  6842  		ptr := v_0
  6843  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
  6844  			break
  6845  		}
  6846  		idx := v_1.Args[0]
  6847  		mem := v_2
  6848  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6849  		v.AddArg3(ptr, idx, mem)
  6850  		return true
  6851  	}
  6852  	// match: (FMOVDloadidx (SLLconst [3] idx) ptr mem)
  6853  	// result: (FMOVDloadidx8 ptr idx mem)
  6854  	for {
  6855  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6856  			break
  6857  		}
  6858  		idx := v_0.Args[0]
  6859  		ptr := v_1
  6860  		mem := v_2
  6861  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6862  		v.AddArg3(ptr, idx, mem)
  6863  		return true
  6864  	}
  6865  	return false
  6866  }
  6867  func rewriteValue_OpARM64FMOVDloadidx8(v *ssa.Value) bool {
  6868  	v_2 := v.Args[2]
  6869  	v_1 := v.Args[1]
  6870  	v_0 := v.Args[0]
  6871  	// match: (FMOVDloadidx8 ptr (MOVDconst [c]) mem)
  6872  	// cond: ssa.Is32Bit(c<<3)
  6873  	// result: (FMOVDload ptr [int32(c)<<3] mem)
  6874  	for {
  6875  		ptr := v_0
  6876  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6877  			break
  6878  		}
  6879  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6880  		mem := v_2
  6881  		if !(ssa.Is32Bit(c << 3)) {
  6882  			break
  6883  		}
  6884  		v.Reset(ssaop.OpARM64FMOVDload)
  6885  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
  6886  		v.AddArg2(ptr, mem)
  6887  		return true
  6888  	}
  6889  	return false
  6890  }
  6891  func rewriteValue_OpARM64FMOVDstore(v *ssa.Value) bool {
  6892  	v_2 := v.Args[2]
  6893  	v_1 := v.Args[1]
  6894  	v_0 := v.Args[0]
  6895  	b := v.Block
  6896  	config := b.Func.Config
  6897  	// match: (FMOVDstore [off] {sym} ptr (FMOVDgpfp val) mem)
  6898  	// result: (MOVDstore [off] {sym} ptr val mem)
  6899  	for {
  6900  		off := ssa.AuxIntToInt32(v.AuxInt)
  6901  		sym := ssa.AuxToSym(v.Aux)
  6902  		ptr := v_0
  6903  		if v_1.Op != ssaop.OpARM64FMOVDgpfp {
  6904  			break
  6905  		}
  6906  		val := v_1.Args[0]
  6907  		mem := v_2
  6908  		v.Reset(ssaop.OpARM64MOVDstore)
  6909  		v.AuxInt = ssa.Int32ToAuxInt(off)
  6910  		v.Aux = ssa.SymToAux(sym)
  6911  		v.AddArg3(ptr, val, mem)
  6912  		return true
  6913  	}
  6914  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6915  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6916  	// result: (FMOVDstore [off1+int32(off2)] {sym} ptr val mem)
  6917  	for {
  6918  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6919  		sym := ssa.AuxToSym(v.Aux)
  6920  		if v_0.Op != ssaop.OpARM64ADDconst {
  6921  			break
  6922  		}
  6923  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6924  		ptr := v_0.Args[0]
  6925  		val := v_1
  6926  		mem := v_2
  6927  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6928  			break
  6929  		}
  6930  		v.Reset(ssaop.OpARM64FMOVDstore)
  6931  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6932  		v.Aux = ssa.SymToAux(sym)
  6933  		v.AddArg3(ptr, val, mem)
  6934  		return true
  6935  	}
  6936  	// match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem)
  6937  	// cond: off == 0 && sym == nil
  6938  	// result: (FMOVDstoreidx ptr idx val mem)
  6939  	for {
  6940  		off := ssa.AuxIntToInt32(v.AuxInt)
  6941  		sym := ssa.AuxToSym(v.Aux)
  6942  		if v_0.Op != ssaop.OpARM64ADD {
  6943  			break
  6944  		}
  6945  		idx := v_0.Args[1]
  6946  		ptr := v_0.Args[0]
  6947  		val := v_1
  6948  		mem := v_2
  6949  		if !(off == 0 && sym == nil) {
  6950  			break
  6951  		}
  6952  		v.Reset(ssaop.OpARM64FMOVDstoreidx)
  6953  		v.AddArg4(ptr, idx, val, mem)
  6954  		return true
  6955  	}
  6956  	// match: (FMOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
  6957  	// cond: off == 0 && sym == nil
  6958  	// result: (FMOVDstoreidx8 ptr idx val mem)
  6959  	for {
  6960  		off := ssa.AuxIntToInt32(v.AuxInt)
  6961  		sym := ssa.AuxToSym(v.Aux)
  6962  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6963  			break
  6964  		}
  6965  		idx := v_0.Args[1]
  6966  		ptr := v_0.Args[0]
  6967  		val := v_1
  6968  		mem := v_2
  6969  		if !(off == 0 && sym == nil) {
  6970  			break
  6971  		}
  6972  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  6973  		v.AddArg4(ptr, idx, val, mem)
  6974  		return true
  6975  	}
  6976  	// match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  6977  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6978  	// result: (FMOVDstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  6979  	for {
  6980  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6981  		sym1 := ssa.AuxToSym(v.Aux)
  6982  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6983  			break
  6984  		}
  6985  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6986  		sym2 := ssa.AuxToSym(v_0.Aux)
  6987  		ptr := v_0.Args[0]
  6988  		val := v_1
  6989  		mem := v_2
  6990  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6991  			break
  6992  		}
  6993  		v.Reset(ssaop.OpARM64FMOVDstore)
  6994  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6995  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6996  		v.AddArg3(ptr, val, mem)
  6997  		return true
  6998  	}
  6999  	return false
  7000  }
  7001  func rewriteValue_OpARM64FMOVDstoreidx(v *ssa.Value) bool {
  7002  	v_3 := v.Args[3]
  7003  	v_2 := v.Args[2]
  7004  	v_1 := v.Args[1]
  7005  	v_0 := v.Args[0]
  7006  	// match: (FMOVDstoreidx ptr (MOVDconst [c]) val mem)
  7007  	// cond: ssa.Is32Bit(c)
  7008  	// result: (FMOVDstore [int32(c)] ptr val mem)
  7009  	for {
  7010  		ptr := v_0
  7011  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7012  			break
  7013  		}
  7014  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7015  		val := v_2
  7016  		mem := v_3
  7017  		if !(ssa.Is32Bit(c)) {
  7018  			break
  7019  		}
  7020  		v.Reset(ssaop.OpARM64FMOVDstore)
  7021  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7022  		v.AddArg3(ptr, val, mem)
  7023  		return true
  7024  	}
  7025  	// match: (FMOVDstoreidx (MOVDconst [c]) idx val mem)
  7026  	// cond: ssa.Is32Bit(c)
  7027  	// result: (FMOVDstore [int32(c)] idx val mem)
  7028  	for {
  7029  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7030  			break
  7031  		}
  7032  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7033  		idx := v_1
  7034  		val := v_2
  7035  		mem := v_3
  7036  		if !(ssa.Is32Bit(c)) {
  7037  			break
  7038  		}
  7039  		v.Reset(ssaop.OpARM64FMOVDstore)
  7040  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7041  		v.AddArg3(idx, val, mem)
  7042  		return true
  7043  	}
  7044  	// match: (FMOVDstoreidx ptr (SLLconst [3] idx) val mem)
  7045  	// result: (FMOVDstoreidx8 ptr idx val mem)
  7046  	for {
  7047  		ptr := v_0
  7048  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
  7049  			break
  7050  		}
  7051  		idx := v_1.Args[0]
  7052  		val := v_2
  7053  		mem := v_3
  7054  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  7055  		v.AddArg4(ptr, idx, val, mem)
  7056  		return true
  7057  	}
  7058  	// match: (FMOVDstoreidx (SLLconst [3] idx) ptr val mem)
  7059  	// result: (FMOVDstoreidx8 ptr idx val mem)
  7060  	for {
  7061  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  7062  			break
  7063  		}
  7064  		idx := v_0.Args[0]
  7065  		ptr := v_1
  7066  		val := v_2
  7067  		mem := v_3
  7068  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  7069  		v.AddArg4(ptr, idx, val, mem)
  7070  		return true
  7071  	}
  7072  	return false
  7073  }
  7074  func rewriteValue_OpARM64FMOVDstoreidx8(v *ssa.Value) bool {
  7075  	v_3 := v.Args[3]
  7076  	v_2 := v.Args[2]
  7077  	v_1 := v.Args[1]
  7078  	v_0 := v.Args[0]
  7079  	// match: (FMOVDstoreidx8 ptr (MOVDconst [c]) val mem)
  7080  	// cond: ssa.Is32Bit(c<<3)
  7081  	// result: (FMOVDstore [int32(c)<<3] ptr val mem)
  7082  	for {
  7083  		ptr := v_0
  7084  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7085  			break
  7086  		}
  7087  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7088  		val := v_2
  7089  		mem := v_3
  7090  		if !(ssa.Is32Bit(c << 3)) {
  7091  			break
  7092  		}
  7093  		v.Reset(ssaop.OpARM64FMOVDstore)
  7094  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
  7095  		v.AddArg3(ptr, val, mem)
  7096  		return true
  7097  	}
  7098  	return false
  7099  }
  7100  func rewriteValue_OpARM64FMOVQload(v *ssa.Value) bool {
  7101  	v_1 := v.Args[1]
  7102  	v_0 := v.Args[0]
  7103  	b := v.Block
  7104  	config := b.Func.Config
  7105  	// match: (FMOVQload [off1] {sym} (ADDconst [off2] ptr) mem)
  7106  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7107  	// result: (FMOVQload [off1+int32(off2)] {sym} ptr mem)
  7108  	for {
  7109  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7110  		sym := ssa.AuxToSym(v.Aux)
  7111  		if v_0.Op != ssaop.OpARM64ADDconst {
  7112  			break
  7113  		}
  7114  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7115  		ptr := v_0.Args[0]
  7116  		mem := v_1
  7117  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7118  			break
  7119  		}
  7120  		v.Reset(ssaop.OpARM64FMOVQload)
  7121  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7122  		v.Aux = ssa.SymToAux(sym)
  7123  		v.AddArg2(ptr, mem)
  7124  		return true
  7125  	}
  7126  	// match: (FMOVQload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  7127  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7128  	// result: (FMOVQload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  7129  	for {
  7130  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7131  		sym1 := ssa.AuxToSym(v.Aux)
  7132  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7133  			break
  7134  		}
  7135  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7136  		sym2 := ssa.AuxToSym(v_0.Aux)
  7137  		ptr := v_0.Args[0]
  7138  		mem := v_1
  7139  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7140  			break
  7141  		}
  7142  		v.Reset(ssaop.OpARM64FMOVQload)
  7143  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7144  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7145  		v.AddArg2(ptr, mem)
  7146  		return true
  7147  	}
  7148  	return false
  7149  }
  7150  func rewriteValue_OpARM64FMOVQstore(v *ssa.Value) bool {
  7151  	v_2 := v.Args[2]
  7152  	v_1 := v.Args[1]
  7153  	v_0 := v.Args[0]
  7154  	b := v.Block
  7155  	config := b.Func.Config
  7156  	// match: (FMOVQstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7157  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7158  	// result: (FMOVQstore [off1+int32(off2)] {sym} ptr val mem)
  7159  	for {
  7160  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7161  		sym := ssa.AuxToSym(v.Aux)
  7162  		if v_0.Op != ssaop.OpARM64ADDconst {
  7163  			break
  7164  		}
  7165  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7166  		ptr := v_0.Args[0]
  7167  		val := v_1
  7168  		mem := v_2
  7169  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7170  			break
  7171  		}
  7172  		v.Reset(ssaop.OpARM64FMOVQstore)
  7173  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7174  		v.Aux = ssa.SymToAux(sym)
  7175  		v.AddArg3(ptr, val, mem)
  7176  		return true
  7177  	}
  7178  	// match: (FMOVQstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  7179  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7180  	// result: (FMOVQstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  7181  	for {
  7182  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7183  		sym1 := ssa.AuxToSym(v.Aux)
  7184  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7185  			break
  7186  		}
  7187  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7188  		sym2 := ssa.AuxToSym(v_0.Aux)
  7189  		ptr := v_0.Args[0]
  7190  		val := v_1
  7191  		mem := v_2
  7192  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7193  			break
  7194  		}
  7195  		v.Reset(ssaop.OpARM64FMOVQstore)
  7196  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7197  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7198  		v.AddArg3(ptr, val, mem)
  7199  		return true
  7200  	}
  7201  	return false
  7202  }
  7203  func rewriteValue_OpARM64FMOVSload(v *ssa.Value) bool {
  7204  	v_1 := v.Args[1]
  7205  	v_0 := v.Args[0]
  7206  	b := v.Block
  7207  	config := b.Func.Config
  7208  	// match: (FMOVSload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  7209  	// result: (FMOVSgpfp val)
  7210  	for {
  7211  		off := ssa.AuxIntToInt32(v.AuxInt)
  7212  		sym := ssa.AuxToSym(v.Aux)
  7213  		ptr := v_0
  7214  		if v_1.Op != ssaop.OpARM64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  7215  			break
  7216  		}
  7217  		val := v_1.Args[1]
  7218  		if ptr != v_1.Args[0] {
  7219  			break
  7220  		}
  7221  		v.Reset(ssaop.OpARM64FMOVSgpfp)
  7222  		v.AddArg(val)
  7223  		return true
  7224  	}
  7225  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  7226  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7227  	// result: (FMOVSload [off1+int32(off2)] {sym} ptr mem)
  7228  	for {
  7229  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7230  		sym := ssa.AuxToSym(v.Aux)
  7231  		if v_0.Op != ssaop.OpARM64ADDconst {
  7232  			break
  7233  		}
  7234  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7235  		ptr := v_0.Args[0]
  7236  		mem := v_1
  7237  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7238  			break
  7239  		}
  7240  		v.Reset(ssaop.OpARM64FMOVSload)
  7241  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7242  		v.Aux = ssa.SymToAux(sym)
  7243  		v.AddArg2(ptr, mem)
  7244  		return true
  7245  	}
  7246  	// match: (FMOVSload [off] {sym} (ADD ptr idx) mem)
  7247  	// cond: off == 0 && sym == nil
  7248  	// result: (FMOVSloadidx ptr idx mem)
  7249  	for {
  7250  		off := ssa.AuxIntToInt32(v.AuxInt)
  7251  		sym := ssa.AuxToSym(v.Aux)
  7252  		if v_0.Op != ssaop.OpARM64ADD {
  7253  			break
  7254  		}
  7255  		idx := v_0.Args[1]
  7256  		ptr := v_0.Args[0]
  7257  		mem := v_1
  7258  		if !(off == 0 && sym == nil) {
  7259  			break
  7260  		}
  7261  		v.Reset(ssaop.OpARM64FMOVSloadidx)
  7262  		v.AddArg3(ptr, idx, mem)
  7263  		return true
  7264  	}
  7265  	// match: (FMOVSload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
  7266  	// cond: off == 0 && sym == nil
  7267  	// result: (FMOVSloadidx4 ptr idx mem)
  7268  	for {
  7269  		off := ssa.AuxIntToInt32(v.AuxInt)
  7270  		sym := ssa.AuxToSym(v.Aux)
  7271  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7272  			break
  7273  		}
  7274  		idx := v_0.Args[1]
  7275  		ptr := v_0.Args[0]
  7276  		mem := v_1
  7277  		if !(off == 0 && sym == nil) {
  7278  			break
  7279  		}
  7280  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  7281  		v.AddArg3(ptr, idx, mem)
  7282  		return true
  7283  	}
  7284  	// match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  7285  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7286  	// result: (FMOVSload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  7287  	for {
  7288  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7289  		sym1 := ssa.AuxToSym(v.Aux)
  7290  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7291  			break
  7292  		}
  7293  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7294  		sym2 := ssa.AuxToSym(v_0.Aux)
  7295  		ptr := v_0.Args[0]
  7296  		mem := v_1
  7297  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7298  			break
  7299  		}
  7300  		v.Reset(ssaop.OpARM64FMOVSload)
  7301  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7302  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7303  		v.AddArg2(ptr, mem)
  7304  		return true
  7305  	}
  7306  	return false
  7307  }
  7308  func rewriteValue_OpARM64FMOVSloadidx(v *ssa.Value) bool {
  7309  	v_2 := v.Args[2]
  7310  	v_1 := v.Args[1]
  7311  	v_0 := v.Args[0]
  7312  	// match: (FMOVSloadidx ptr (MOVDconst [c]) mem)
  7313  	// cond: ssa.Is32Bit(c)
  7314  	// result: (FMOVSload [int32(c)] ptr mem)
  7315  	for {
  7316  		ptr := v_0
  7317  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7318  			break
  7319  		}
  7320  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7321  		mem := v_2
  7322  		if !(ssa.Is32Bit(c)) {
  7323  			break
  7324  		}
  7325  		v.Reset(ssaop.OpARM64FMOVSload)
  7326  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7327  		v.AddArg2(ptr, mem)
  7328  		return true
  7329  	}
  7330  	// match: (FMOVSloadidx (MOVDconst [c]) ptr mem)
  7331  	// cond: ssa.Is32Bit(c)
  7332  	// result: (FMOVSload [int32(c)] ptr mem)
  7333  	for {
  7334  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7335  			break
  7336  		}
  7337  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7338  		ptr := v_1
  7339  		mem := v_2
  7340  		if !(ssa.Is32Bit(c)) {
  7341  			break
  7342  		}
  7343  		v.Reset(ssaop.OpARM64FMOVSload)
  7344  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7345  		v.AddArg2(ptr, mem)
  7346  		return true
  7347  	}
  7348  	// match: (FMOVSloadidx ptr (SLLconst [2] idx) mem)
  7349  	// result: (FMOVSloadidx4 ptr idx mem)
  7350  	for {
  7351  		ptr := v_0
  7352  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
  7353  			break
  7354  		}
  7355  		idx := v_1.Args[0]
  7356  		mem := v_2
  7357  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  7358  		v.AddArg3(ptr, idx, mem)
  7359  		return true
  7360  	}
  7361  	// match: (FMOVSloadidx (SLLconst [2] idx) ptr mem)
  7362  	// result: (FMOVSloadidx4 ptr idx mem)
  7363  	for {
  7364  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7365  			break
  7366  		}
  7367  		idx := v_0.Args[0]
  7368  		ptr := v_1
  7369  		mem := v_2
  7370  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  7371  		v.AddArg3(ptr, idx, mem)
  7372  		return true
  7373  	}
  7374  	return false
  7375  }
  7376  func rewriteValue_OpARM64FMOVSloadidx4(v *ssa.Value) bool {
  7377  	v_2 := v.Args[2]
  7378  	v_1 := v.Args[1]
  7379  	v_0 := v.Args[0]
  7380  	// match: (FMOVSloadidx4 ptr (MOVDconst [c]) mem)
  7381  	// cond: ssa.Is32Bit(c<<2)
  7382  	// result: (FMOVSload ptr [int32(c)<<2] mem)
  7383  	for {
  7384  		ptr := v_0
  7385  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7386  			break
  7387  		}
  7388  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7389  		mem := v_2
  7390  		if !(ssa.Is32Bit(c << 2)) {
  7391  			break
  7392  		}
  7393  		v.Reset(ssaop.OpARM64FMOVSload)
  7394  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
  7395  		v.AddArg2(ptr, mem)
  7396  		return true
  7397  	}
  7398  	return false
  7399  }
  7400  func rewriteValue_OpARM64FMOVSstore(v *ssa.Value) bool {
  7401  	v_2 := v.Args[2]
  7402  	v_1 := v.Args[1]
  7403  	v_0 := v.Args[0]
  7404  	b := v.Block
  7405  	config := b.Func.Config
  7406  	// match: (FMOVSstore [off] {sym} ptr (FMOVSgpfp val) mem)
  7407  	// result: (MOVWstore [off] {sym} ptr val mem)
  7408  	for {
  7409  		off := ssa.AuxIntToInt32(v.AuxInt)
  7410  		sym := ssa.AuxToSym(v.Aux)
  7411  		ptr := v_0
  7412  		if v_1.Op != ssaop.OpARM64FMOVSgpfp {
  7413  			break
  7414  		}
  7415  		val := v_1.Args[0]
  7416  		mem := v_2
  7417  		v.Reset(ssaop.OpARM64MOVWstore)
  7418  		v.AuxInt = ssa.Int32ToAuxInt(off)
  7419  		v.Aux = ssa.SymToAux(sym)
  7420  		v.AddArg3(ptr, val, mem)
  7421  		return true
  7422  	}
  7423  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7424  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7425  	// result: (FMOVSstore [off1+int32(off2)] {sym} ptr val mem)
  7426  	for {
  7427  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7428  		sym := ssa.AuxToSym(v.Aux)
  7429  		if v_0.Op != ssaop.OpARM64ADDconst {
  7430  			break
  7431  		}
  7432  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7433  		ptr := v_0.Args[0]
  7434  		val := v_1
  7435  		mem := v_2
  7436  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7437  			break
  7438  		}
  7439  		v.Reset(ssaop.OpARM64FMOVSstore)
  7440  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7441  		v.Aux = ssa.SymToAux(sym)
  7442  		v.AddArg3(ptr, val, mem)
  7443  		return true
  7444  	}
  7445  	// match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem)
  7446  	// cond: off == 0 && sym == nil
  7447  	// result: (FMOVSstoreidx ptr idx val mem)
  7448  	for {
  7449  		off := ssa.AuxIntToInt32(v.AuxInt)
  7450  		sym := ssa.AuxToSym(v.Aux)
  7451  		if v_0.Op != ssaop.OpARM64ADD {
  7452  			break
  7453  		}
  7454  		idx := v_0.Args[1]
  7455  		ptr := v_0.Args[0]
  7456  		val := v_1
  7457  		mem := v_2
  7458  		if !(off == 0 && sym == nil) {
  7459  			break
  7460  		}
  7461  		v.Reset(ssaop.OpARM64FMOVSstoreidx)
  7462  		v.AddArg4(ptr, idx, val, mem)
  7463  		return true
  7464  	}
  7465  	// match: (FMOVSstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
  7466  	// cond: off == 0 && sym == nil
  7467  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7468  	for {
  7469  		off := ssa.AuxIntToInt32(v.AuxInt)
  7470  		sym := ssa.AuxToSym(v.Aux)
  7471  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7472  			break
  7473  		}
  7474  		idx := v_0.Args[1]
  7475  		ptr := v_0.Args[0]
  7476  		val := v_1
  7477  		mem := v_2
  7478  		if !(off == 0 && sym == nil) {
  7479  			break
  7480  		}
  7481  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7482  		v.AddArg4(ptr, idx, val, mem)
  7483  		return true
  7484  	}
  7485  	// match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  7486  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7487  	// result: (FMOVSstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  7488  	for {
  7489  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7490  		sym1 := ssa.AuxToSym(v.Aux)
  7491  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7492  			break
  7493  		}
  7494  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7495  		sym2 := ssa.AuxToSym(v_0.Aux)
  7496  		ptr := v_0.Args[0]
  7497  		val := v_1
  7498  		mem := v_2
  7499  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7500  			break
  7501  		}
  7502  		v.Reset(ssaop.OpARM64FMOVSstore)
  7503  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7504  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7505  		v.AddArg3(ptr, val, mem)
  7506  		return true
  7507  	}
  7508  	return false
  7509  }
  7510  func rewriteValue_OpARM64FMOVSstoreidx(v *ssa.Value) bool {
  7511  	v_3 := v.Args[3]
  7512  	v_2 := v.Args[2]
  7513  	v_1 := v.Args[1]
  7514  	v_0 := v.Args[0]
  7515  	// match: (FMOVSstoreidx ptr (MOVDconst [c]) val mem)
  7516  	// cond: ssa.Is32Bit(c)
  7517  	// result: (FMOVSstore [int32(c)] ptr val mem)
  7518  	for {
  7519  		ptr := v_0
  7520  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7521  			break
  7522  		}
  7523  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7524  		val := v_2
  7525  		mem := v_3
  7526  		if !(ssa.Is32Bit(c)) {
  7527  			break
  7528  		}
  7529  		v.Reset(ssaop.OpARM64FMOVSstore)
  7530  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7531  		v.AddArg3(ptr, val, mem)
  7532  		return true
  7533  	}
  7534  	// match: (FMOVSstoreidx (MOVDconst [c]) idx val mem)
  7535  	// cond: ssa.Is32Bit(c)
  7536  	// result: (FMOVSstore [int32(c)] idx val mem)
  7537  	for {
  7538  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7539  			break
  7540  		}
  7541  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7542  		idx := v_1
  7543  		val := v_2
  7544  		mem := v_3
  7545  		if !(ssa.Is32Bit(c)) {
  7546  			break
  7547  		}
  7548  		v.Reset(ssaop.OpARM64FMOVSstore)
  7549  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7550  		v.AddArg3(idx, val, mem)
  7551  		return true
  7552  	}
  7553  	// match: (FMOVSstoreidx ptr (SLLconst [2] idx) val mem)
  7554  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7555  	for {
  7556  		ptr := v_0
  7557  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
  7558  			break
  7559  		}
  7560  		idx := v_1.Args[0]
  7561  		val := v_2
  7562  		mem := v_3
  7563  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7564  		v.AddArg4(ptr, idx, val, mem)
  7565  		return true
  7566  	}
  7567  	// match: (FMOVSstoreidx (SLLconst [2] idx) ptr val mem)
  7568  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7569  	for {
  7570  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7571  			break
  7572  		}
  7573  		idx := v_0.Args[0]
  7574  		ptr := v_1
  7575  		val := v_2
  7576  		mem := v_3
  7577  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7578  		v.AddArg4(ptr, idx, val, mem)
  7579  		return true
  7580  	}
  7581  	return false
  7582  }
  7583  func rewriteValue_OpARM64FMOVSstoreidx4(v *ssa.Value) bool {
  7584  	v_3 := v.Args[3]
  7585  	v_2 := v.Args[2]
  7586  	v_1 := v.Args[1]
  7587  	v_0 := v.Args[0]
  7588  	// match: (FMOVSstoreidx4 ptr (MOVDconst [c]) val mem)
  7589  	// cond: ssa.Is32Bit(c<<2)
  7590  	// result: (FMOVSstore [int32(c)<<2] ptr val mem)
  7591  	for {
  7592  		ptr := v_0
  7593  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7594  			break
  7595  		}
  7596  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7597  		val := v_2
  7598  		mem := v_3
  7599  		if !(ssa.Is32Bit(c << 2)) {
  7600  			break
  7601  		}
  7602  		v.Reset(ssaop.OpARM64FMOVSstore)
  7603  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
  7604  		v.AddArg3(ptr, val, mem)
  7605  		return true
  7606  	}
  7607  	return false
  7608  }
  7609  func rewriteValue_OpARM64FMULD(v *ssa.Value) bool {
  7610  	v_1 := v.Args[1]
  7611  	v_0 := v.Args[0]
  7612  	// match: (FMULD (FNEGD x) y)
  7613  	// result: (FNMULD x y)
  7614  	for {
  7615  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7616  			if v_0.Op != ssaop.OpARM64FNEGD {
  7617  				continue
  7618  			}
  7619  			x := v_0.Args[0]
  7620  			y := v_1
  7621  			v.Reset(ssaop.OpARM64FNMULD)
  7622  			v.AddArg2(x, y)
  7623  			return true
  7624  		}
  7625  		break
  7626  	}
  7627  	return false
  7628  }
  7629  func rewriteValue_OpARM64FMULS(v *ssa.Value) bool {
  7630  	v_1 := v.Args[1]
  7631  	v_0 := v.Args[0]
  7632  	// match: (FMULS (FNEGS x) y)
  7633  	// result: (FNMULS x y)
  7634  	for {
  7635  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7636  			if v_0.Op != ssaop.OpARM64FNEGS {
  7637  				continue
  7638  			}
  7639  			x := v_0.Args[0]
  7640  			y := v_1
  7641  			v.Reset(ssaop.OpARM64FNMULS)
  7642  			v.AddArg2(x, y)
  7643  			return true
  7644  		}
  7645  		break
  7646  	}
  7647  	return false
  7648  }
  7649  func rewriteValue_OpARM64FNEGD(v *ssa.Value) bool {
  7650  	v_0 := v.Args[0]
  7651  	// match: (FNEGD (FMULD x y))
  7652  	// result: (FNMULD x y)
  7653  	for {
  7654  		if v_0.Op != ssaop.OpARM64FMULD {
  7655  			break
  7656  		}
  7657  		y := v_0.Args[1]
  7658  		x := v_0.Args[0]
  7659  		v.Reset(ssaop.OpARM64FNMULD)
  7660  		v.AddArg2(x, y)
  7661  		return true
  7662  	}
  7663  	// match: (FNEGD (FNMULD x y))
  7664  	// result: (FMULD x y)
  7665  	for {
  7666  		if v_0.Op != ssaop.OpARM64FNMULD {
  7667  			break
  7668  		}
  7669  		y := v_0.Args[1]
  7670  		x := v_0.Args[0]
  7671  		v.Reset(ssaop.OpARM64FMULD)
  7672  		v.AddArg2(x, y)
  7673  		return true
  7674  	}
  7675  	return false
  7676  }
  7677  func rewriteValue_OpARM64FNEGS(v *ssa.Value) bool {
  7678  	v_0 := v.Args[0]
  7679  	// match: (FNEGS (FMULS x y))
  7680  	// result: (FNMULS x y)
  7681  	for {
  7682  		if v_0.Op != ssaop.OpARM64FMULS {
  7683  			break
  7684  		}
  7685  		y := v_0.Args[1]
  7686  		x := v_0.Args[0]
  7687  		v.Reset(ssaop.OpARM64FNMULS)
  7688  		v.AddArg2(x, y)
  7689  		return true
  7690  	}
  7691  	// match: (FNEGS (FNMULS x y))
  7692  	// result: (FMULS x y)
  7693  	for {
  7694  		if v_0.Op != ssaop.OpARM64FNMULS {
  7695  			break
  7696  		}
  7697  		y := v_0.Args[1]
  7698  		x := v_0.Args[0]
  7699  		v.Reset(ssaop.OpARM64FMULS)
  7700  		v.AddArg2(x, y)
  7701  		return true
  7702  	}
  7703  	return false
  7704  }
  7705  func rewriteValue_OpARM64FNMULD(v *ssa.Value) bool {
  7706  	v_1 := v.Args[1]
  7707  	v_0 := v.Args[0]
  7708  	// match: (FNMULD (FNEGD x) y)
  7709  	// result: (FMULD x y)
  7710  	for {
  7711  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7712  			if v_0.Op != ssaop.OpARM64FNEGD {
  7713  				continue
  7714  			}
  7715  			x := v_0.Args[0]
  7716  			y := v_1
  7717  			v.Reset(ssaop.OpARM64FMULD)
  7718  			v.AddArg2(x, y)
  7719  			return true
  7720  		}
  7721  		break
  7722  	}
  7723  	return false
  7724  }
  7725  func rewriteValue_OpARM64FNMULS(v *ssa.Value) bool {
  7726  	v_1 := v.Args[1]
  7727  	v_0 := v.Args[0]
  7728  	// match: (FNMULS (FNEGS x) y)
  7729  	// result: (FMULS x y)
  7730  	for {
  7731  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7732  			if v_0.Op != ssaop.OpARM64FNEGS {
  7733  				continue
  7734  			}
  7735  			x := v_0.Args[0]
  7736  			y := v_1
  7737  			v.Reset(ssaop.OpARM64FMULS)
  7738  			v.AddArg2(x, y)
  7739  			return true
  7740  		}
  7741  		break
  7742  	}
  7743  	return false
  7744  }
  7745  func rewriteValue_OpARM64FSTPQ(v *ssa.Value) bool {
  7746  	v_3 := v.Args[3]
  7747  	v_2 := v.Args[2]
  7748  	v_1 := v.Args[1]
  7749  	v_0 := v.Args[0]
  7750  	b := v.Block
  7751  	config := b.Func.Config
  7752  	// match: (FSTPQ [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
  7753  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7754  	// result: (FSTPQ [off1+int32(off2)] {sym} ptr val1 val2 mem)
  7755  	for {
  7756  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7757  		sym := ssa.AuxToSym(v.Aux)
  7758  		if v_0.Op != ssaop.OpARM64ADDconst {
  7759  			break
  7760  		}
  7761  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7762  		ptr := v_0.Args[0]
  7763  		val1 := v_1
  7764  		val2 := v_2
  7765  		mem := v_3
  7766  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7767  			break
  7768  		}
  7769  		v.Reset(ssaop.OpARM64FSTPQ)
  7770  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7771  		v.Aux = ssa.SymToAux(sym)
  7772  		v.AddArg4(ptr, val1, val2, mem)
  7773  		return true
  7774  	}
  7775  	// match: (FSTPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
  7776  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7777  	// result: (FSTPQ [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val1 val2 mem)
  7778  	for {
  7779  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7780  		sym1 := ssa.AuxToSym(v.Aux)
  7781  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7782  			break
  7783  		}
  7784  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7785  		sym2 := ssa.AuxToSym(v_0.Aux)
  7786  		ptr := v_0.Args[0]
  7787  		val1 := v_1
  7788  		val2 := v_2
  7789  		mem := v_3
  7790  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7791  			break
  7792  		}
  7793  		v.Reset(ssaop.OpARM64FSTPQ)
  7794  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7795  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7796  		v.AddArg4(ptr, val1, val2, mem)
  7797  		return true
  7798  	}
  7799  	return false
  7800  }
  7801  func rewriteValue_OpARM64FSUBD(v *ssa.Value) bool {
  7802  	v_1 := v.Args[1]
  7803  	v_0 := v.Args[0]
  7804  	// match: (FSUBD a (FMULD x y))
  7805  	// cond: a.Block.Func.UseFMA(v)
  7806  	// result: (FMSUBD a x y)
  7807  	for {
  7808  		a := v_0
  7809  		if v_1.Op != ssaop.OpARM64FMULD {
  7810  			break
  7811  		}
  7812  		y := v_1.Args[1]
  7813  		x := v_1.Args[0]
  7814  		if !(a.Block.Func.UseFMA(v)) {
  7815  			break
  7816  		}
  7817  		v.Reset(ssaop.OpARM64FMSUBD)
  7818  		v.AddArg3(a, x, y)
  7819  		return true
  7820  	}
  7821  	// match: (FSUBD (FMULD x y) a)
  7822  	// cond: a.Block.Func.UseFMA(v)
  7823  	// result: (FNMSUBD a x y)
  7824  	for {
  7825  		if v_0.Op != ssaop.OpARM64FMULD {
  7826  			break
  7827  		}
  7828  		y := v_0.Args[1]
  7829  		x := v_0.Args[0]
  7830  		a := v_1
  7831  		if !(a.Block.Func.UseFMA(v)) {
  7832  			break
  7833  		}
  7834  		v.Reset(ssaop.OpARM64FNMSUBD)
  7835  		v.AddArg3(a, x, y)
  7836  		return true
  7837  	}
  7838  	// match: (FSUBD a (FNMULD x y))
  7839  	// cond: a.Block.Func.UseFMA(v)
  7840  	// result: (FMADDD a x y)
  7841  	for {
  7842  		a := v_0
  7843  		if v_1.Op != ssaop.OpARM64FNMULD {
  7844  			break
  7845  		}
  7846  		y := v_1.Args[1]
  7847  		x := v_1.Args[0]
  7848  		if !(a.Block.Func.UseFMA(v)) {
  7849  			break
  7850  		}
  7851  		v.Reset(ssaop.OpARM64FMADDD)
  7852  		v.AddArg3(a, x, y)
  7853  		return true
  7854  	}
  7855  	// match: (FSUBD (FNMULD x y) a)
  7856  	// cond: a.Block.Func.UseFMA(v)
  7857  	// result: (FNMADDD a x y)
  7858  	for {
  7859  		if v_0.Op != ssaop.OpARM64FNMULD {
  7860  			break
  7861  		}
  7862  		y := v_0.Args[1]
  7863  		x := v_0.Args[0]
  7864  		a := v_1
  7865  		if !(a.Block.Func.UseFMA(v)) {
  7866  			break
  7867  		}
  7868  		v.Reset(ssaop.OpARM64FNMADDD)
  7869  		v.AddArg3(a, x, y)
  7870  		return true
  7871  	}
  7872  	return false
  7873  }
  7874  func rewriteValue_OpARM64FSUBS(v *ssa.Value) bool {
  7875  	v_1 := v.Args[1]
  7876  	v_0 := v.Args[0]
  7877  	// match: (FSUBS a (FMULS x y))
  7878  	// cond: a.Block.Func.UseFMA(v)
  7879  	// result: (FMSUBS a x y)
  7880  	for {
  7881  		a := v_0
  7882  		if v_1.Op != ssaop.OpARM64FMULS {
  7883  			break
  7884  		}
  7885  		y := v_1.Args[1]
  7886  		x := v_1.Args[0]
  7887  		if !(a.Block.Func.UseFMA(v)) {
  7888  			break
  7889  		}
  7890  		v.Reset(ssaop.OpARM64FMSUBS)
  7891  		v.AddArg3(a, x, y)
  7892  		return true
  7893  	}
  7894  	// match: (FSUBS (FMULS x y) a)
  7895  	// cond: a.Block.Func.UseFMA(v)
  7896  	// result: (FNMSUBS a x y)
  7897  	for {
  7898  		if v_0.Op != ssaop.OpARM64FMULS {
  7899  			break
  7900  		}
  7901  		y := v_0.Args[1]
  7902  		x := v_0.Args[0]
  7903  		a := v_1
  7904  		if !(a.Block.Func.UseFMA(v)) {
  7905  			break
  7906  		}
  7907  		v.Reset(ssaop.OpARM64FNMSUBS)
  7908  		v.AddArg3(a, x, y)
  7909  		return true
  7910  	}
  7911  	// match: (FSUBS a (FNMULS x y))
  7912  	// cond: a.Block.Func.UseFMA(v)
  7913  	// result: (FMADDS a x y)
  7914  	for {
  7915  		a := v_0
  7916  		if v_1.Op != ssaop.OpARM64FNMULS {
  7917  			break
  7918  		}
  7919  		y := v_1.Args[1]
  7920  		x := v_1.Args[0]
  7921  		if !(a.Block.Func.UseFMA(v)) {
  7922  			break
  7923  		}
  7924  		v.Reset(ssaop.OpARM64FMADDS)
  7925  		v.AddArg3(a, x, y)
  7926  		return true
  7927  	}
  7928  	// match: (FSUBS (FNMULS x y) a)
  7929  	// cond: a.Block.Func.UseFMA(v)
  7930  	// result: (FNMADDS a x y)
  7931  	for {
  7932  		if v_0.Op != ssaop.OpARM64FNMULS {
  7933  			break
  7934  		}
  7935  		y := v_0.Args[1]
  7936  		x := v_0.Args[0]
  7937  		a := v_1
  7938  		if !(a.Block.Func.UseFMA(v)) {
  7939  			break
  7940  		}
  7941  		v.Reset(ssaop.OpARM64FNMADDS)
  7942  		v.AddArg3(a, x, y)
  7943  		return true
  7944  	}
  7945  	return false
  7946  }
  7947  func rewriteValue_OpARM64GreaterEqual(v *ssa.Value) bool {
  7948  	v_0 := v.Args[0]
  7949  	b := v.Block
  7950  	// match: (GreaterEqual (CMPconst [0] z:(AND x y)))
  7951  	// cond: z.Uses == 1
  7952  	// result: (GreaterEqual (TST x y))
  7953  	for {
  7954  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7955  			break
  7956  		}
  7957  		z := v_0.Args[0]
  7958  		if z.Op != ssaop.OpARM64AND {
  7959  			break
  7960  		}
  7961  		y := z.Args[1]
  7962  		x := z.Args[0]
  7963  		if !(z.Uses == 1) {
  7964  			break
  7965  		}
  7966  		v.Reset(ssaop.OpARM64GreaterEqual)
  7967  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  7968  		v0.AddArg2(x, y)
  7969  		v.AddArg(v0)
  7970  		return true
  7971  	}
  7972  	// match: (GreaterEqual (CMPWconst [0] x:(ANDconst [c] y)))
  7973  	// cond: x.Uses == 1
  7974  	// result: (GreaterEqual (TSTWconst [int32(c)] y))
  7975  	for {
  7976  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7977  			break
  7978  		}
  7979  		x := v_0.Args[0]
  7980  		if x.Op != ssaop.OpARM64ANDconst {
  7981  			break
  7982  		}
  7983  		c := ssa.AuxIntToInt64(x.AuxInt)
  7984  		y := x.Args[0]
  7985  		if !(x.Uses == 1) {
  7986  			break
  7987  		}
  7988  		v.Reset(ssaop.OpARM64GreaterEqual)
  7989  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  7990  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7991  		v0.AddArg(y)
  7992  		v.AddArg(v0)
  7993  		return true
  7994  	}
  7995  	// match: (GreaterEqual (CMPWconst [0] z:(AND x y)))
  7996  	// cond: z.Uses == 1
  7997  	// result: (GreaterEqual (TSTW x y))
  7998  	for {
  7999  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8000  			break
  8001  		}
  8002  		z := v_0.Args[0]
  8003  		if z.Op != ssaop.OpARM64AND {
  8004  			break
  8005  		}
  8006  		y := z.Args[1]
  8007  		x := z.Args[0]
  8008  		if !(z.Uses == 1) {
  8009  			break
  8010  		}
  8011  		v.Reset(ssaop.OpARM64GreaterEqual)
  8012  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8013  		v0.AddArg2(x, y)
  8014  		v.AddArg(v0)
  8015  		return true
  8016  	}
  8017  	// match: (GreaterEqual (CMPconst [0] x:(ANDconst [c] y)))
  8018  	// cond: x.Uses == 1
  8019  	// result: (GreaterEqual (TSTconst [c] y))
  8020  	for {
  8021  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8022  			break
  8023  		}
  8024  		x := v_0.Args[0]
  8025  		if x.Op != ssaop.OpARM64ANDconst {
  8026  			break
  8027  		}
  8028  		c := ssa.AuxIntToInt64(x.AuxInt)
  8029  		y := x.Args[0]
  8030  		if !(x.Uses == 1) {
  8031  			break
  8032  		}
  8033  		v.Reset(ssaop.OpARM64GreaterEqual)
  8034  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8035  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8036  		v0.AddArg(y)
  8037  		v.AddArg(v0)
  8038  		return true
  8039  	}
  8040  	// match: (GreaterEqual (CMPconst [0] x:(ADDconst [c] y)))
  8041  	// cond: x.Uses == 1
  8042  	// result: (GreaterEqualNoov (CMNconst [c] y))
  8043  	for {
  8044  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8045  			break
  8046  		}
  8047  		x := v_0.Args[0]
  8048  		if x.Op != ssaop.OpARM64ADDconst {
  8049  			break
  8050  		}
  8051  		c := ssa.AuxIntToInt64(x.AuxInt)
  8052  		y := x.Args[0]
  8053  		if !(x.Uses == 1) {
  8054  			break
  8055  		}
  8056  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8057  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  8058  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8059  		v0.AddArg(y)
  8060  		v.AddArg(v0)
  8061  		return true
  8062  	}
  8063  	// match: (GreaterEqual (CMPWconst [0] x:(ADDconst [c] y)))
  8064  	// cond: x.Uses == 1
  8065  	// result: (GreaterEqualNoov (CMNWconst [int32(c)] y))
  8066  	for {
  8067  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8068  			break
  8069  		}
  8070  		x := v_0.Args[0]
  8071  		if x.Op != ssaop.OpARM64ADDconst {
  8072  			break
  8073  		}
  8074  		c := ssa.AuxIntToInt64(x.AuxInt)
  8075  		y := x.Args[0]
  8076  		if !(x.Uses == 1) {
  8077  			break
  8078  		}
  8079  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8080  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  8081  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8082  		v0.AddArg(y)
  8083  		v.AddArg(v0)
  8084  		return true
  8085  	}
  8086  	// match: (GreaterEqual (CMPconst [0] z:(ADD x y)))
  8087  	// cond: z.Uses == 1
  8088  	// result: (GreaterEqualNoov (CMN x y))
  8089  	for {
  8090  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8091  			break
  8092  		}
  8093  		z := v_0.Args[0]
  8094  		if z.Op != ssaop.OpARM64ADD {
  8095  			break
  8096  		}
  8097  		y := z.Args[1]
  8098  		x := z.Args[0]
  8099  		if !(z.Uses == 1) {
  8100  			break
  8101  		}
  8102  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8103  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8104  		v0.AddArg2(x, y)
  8105  		v.AddArg(v0)
  8106  		return true
  8107  	}
  8108  	// match: (GreaterEqual (CMPWconst [0] z:(ADD x y)))
  8109  	// cond: z.Uses == 1
  8110  	// result: (GreaterEqualNoov (CMNW x y))
  8111  	for {
  8112  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8113  			break
  8114  		}
  8115  		z := v_0.Args[0]
  8116  		if z.Op != ssaop.OpARM64ADD {
  8117  			break
  8118  		}
  8119  		y := z.Args[1]
  8120  		x := z.Args[0]
  8121  		if !(z.Uses == 1) {
  8122  			break
  8123  		}
  8124  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8125  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8126  		v0.AddArg2(x, y)
  8127  		v.AddArg(v0)
  8128  		return true
  8129  	}
  8130  	// match: (GreaterEqual (CMPconst [0] z:(MADD a x y)))
  8131  	// cond: z.Uses == 1
  8132  	// result: (GreaterEqualNoov (CMN a (MUL <x.Type> x y)))
  8133  	for {
  8134  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8135  			break
  8136  		}
  8137  		z := v_0.Args[0]
  8138  		if z.Op != ssaop.OpARM64MADD {
  8139  			break
  8140  		}
  8141  		y := z.Args[2]
  8142  		a := z.Args[0]
  8143  		x := z.Args[1]
  8144  		if !(z.Uses == 1) {
  8145  			break
  8146  		}
  8147  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8148  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8149  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  8150  		v1.AddArg2(x, y)
  8151  		v0.AddArg2(a, v1)
  8152  		v.AddArg(v0)
  8153  		return true
  8154  	}
  8155  	// match: (GreaterEqual (CMPWconst [0] z:(MADDW a x y)))
  8156  	// cond: z.Uses == 1
  8157  	// result: (GreaterEqualNoov (CMNW a (MULW <x.Type> x y)))
  8158  	for {
  8159  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8160  			break
  8161  		}
  8162  		z := v_0.Args[0]
  8163  		if z.Op != ssaop.OpARM64MADDW {
  8164  			break
  8165  		}
  8166  		y := z.Args[2]
  8167  		a := z.Args[0]
  8168  		x := z.Args[1]
  8169  		if !(z.Uses == 1) {
  8170  			break
  8171  		}
  8172  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8173  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8174  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  8175  		v1.AddArg2(x, y)
  8176  		v0.AddArg2(a, v1)
  8177  		v.AddArg(v0)
  8178  		return true
  8179  	}
  8180  	// match: (GreaterEqual (FlagConstant [fc]))
  8181  	// result: (MOVDconst [ssa.B2i(fc.Ge())])
  8182  	for {
  8183  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8184  			break
  8185  		}
  8186  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8187  		v.Reset(ssaop.OpARM64MOVDconst)
  8188  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ge()))
  8189  		return true
  8190  	}
  8191  	// match: (GreaterEqual (InvertFlags x))
  8192  	// result: (LessEqual x)
  8193  	for {
  8194  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8195  			break
  8196  		}
  8197  		x := v_0.Args[0]
  8198  		v.Reset(ssaop.OpARM64LessEqual)
  8199  		v.AddArg(x)
  8200  		return true
  8201  	}
  8202  	// match: (GreaterEqual (CMPconst x [0]))
  8203  	// result: (XORconst [1] (SRLconst <v.Type> [63] x))
  8204  	for {
  8205  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8206  			break
  8207  		}
  8208  		x := v_0.Args[0]
  8209  		v.Reset(ssaop.OpARM64XORconst)
  8210  		v.AuxInt = ssa.Int64ToAuxInt(1)
  8211  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, v.Type)
  8212  		v0.AuxInt = ssa.Int64ToAuxInt(63)
  8213  		v0.AddArg(x)
  8214  		v.AddArg(v0)
  8215  		return true
  8216  	}
  8217  	// match: (GreaterEqual (CMPWconst x [0]))
  8218  	// result: (XORconst [1] (UBFX <v.Type> [ssa.ArmBFAuxInt(31,1)] x))
  8219  	for {
  8220  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8221  			break
  8222  		}
  8223  		x := v_0.Args[0]
  8224  		v.Reset(ssaop.OpARM64XORconst)
  8225  		v.AuxInt = ssa.Int64ToAuxInt(1)
  8226  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UBFX, v.Type)
  8227  		v0.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(31, 1))
  8228  		v0.AddArg(x)
  8229  		v.AddArg(v0)
  8230  		return true
  8231  	}
  8232  	return false
  8233  }
  8234  func rewriteValue_OpARM64GreaterEqualF(v *ssa.Value) bool {
  8235  	v_0 := v.Args[0]
  8236  	// match: (GreaterEqualF (InvertFlags x))
  8237  	// result: (LessEqualF x)
  8238  	for {
  8239  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8240  			break
  8241  		}
  8242  		x := v_0.Args[0]
  8243  		v.Reset(ssaop.OpARM64LessEqualF)
  8244  		v.AddArg(x)
  8245  		return true
  8246  	}
  8247  	return false
  8248  }
  8249  func rewriteValue_OpARM64GreaterEqualNoov(v *ssa.Value) bool {
  8250  	v_0 := v.Args[0]
  8251  	// match: (GreaterEqualNoov (FlagConstant [fc]))
  8252  	// result: (MOVDconst [ssa.B2i(fc.GeNoov())])
  8253  	for {
  8254  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8255  			break
  8256  		}
  8257  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8258  		v.Reset(ssaop.OpARM64MOVDconst)
  8259  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.GeNoov()))
  8260  		return true
  8261  	}
  8262  	return false
  8263  }
  8264  func rewriteValue_OpARM64GreaterEqualU(v *ssa.Value) bool {
  8265  	v_0 := v.Args[0]
  8266  	// match: (GreaterEqualU (FlagConstant [fc]))
  8267  	// result: (MOVDconst [ssa.B2i(fc.Uge())])
  8268  	for {
  8269  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8270  			break
  8271  		}
  8272  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8273  		v.Reset(ssaop.OpARM64MOVDconst)
  8274  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Uge()))
  8275  		return true
  8276  	}
  8277  	// match: (GreaterEqualU (InvertFlags x))
  8278  	// result: (LessEqualU x)
  8279  	for {
  8280  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8281  			break
  8282  		}
  8283  		x := v_0.Args[0]
  8284  		v.Reset(ssaop.OpARM64LessEqualU)
  8285  		v.AddArg(x)
  8286  		return true
  8287  	}
  8288  	return false
  8289  }
  8290  func rewriteValue_OpARM64GreaterThan(v *ssa.Value) bool {
  8291  	v_0 := v.Args[0]
  8292  	b := v.Block
  8293  	// match: (GreaterThan (CMPconst [0] z:(AND x y)))
  8294  	// cond: z.Uses == 1
  8295  	// result: (GreaterThan (TST x y))
  8296  	for {
  8297  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8298  			break
  8299  		}
  8300  		z := v_0.Args[0]
  8301  		if z.Op != ssaop.OpARM64AND {
  8302  			break
  8303  		}
  8304  		y := z.Args[1]
  8305  		x := z.Args[0]
  8306  		if !(z.Uses == 1) {
  8307  			break
  8308  		}
  8309  		v.Reset(ssaop.OpARM64GreaterThan)
  8310  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8311  		v0.AddArg2(x, y)
  8312  		v.AddArg(v0)
  8313  		return true
  8314  	}
  8315  	// match: (GreaterThan (CMPWconst [0] x:(ANDconst [c] y)))
  8316  	// cond: x.Uses == 1
  8317  	// result: (GreaterThan (TSTWconst [int32(c)] y))
  8318  	for {
  8319  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8320  			break
  8321  		}
  8322  		x := v_0.Args[0]
  8323  		if x.Op != ssaop.OpARM64ANDconst {
  8324  			break
  8325  		}
  8326  		c := ssa.AuxIntToInt64(x.AuxInt)
  8327  		y := x.Args[0]
  8328  		if !(x.Uses == 1) {
  8329  			break
  8330  		}
  8331  		v.Reset(ssaop.OpARM64GreaterThan)
  8332  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8333  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8334  		v0.AddArg(y)
  8335  		v.AddArg(v0)
  8336  		return true
  8337  	}
  8338  	// match: (GreaterThan (CMPWconst [0] z:(AND x y)))
  8339  	// cond: z.Uses == 1
  8340  	// result: (GreaterThan (TSTW x y))
  8341  	for {
  8342  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8343  			break
  8344  		}
  8345  		z := v_0.Args[0]
  8346  		if z.Op != ssaop.OpARM64AND {
  8347  			break
  8348  		}
  8349  		y := z.Args[1]
  8350  		x := z.Args[0]
  8351  		if !(z.Uses == 1) {
  8352  			break
  8353  		}
  8354  		v.Reset(ssaop.OpARM64GreaterThan)
  8355  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8356  		v0.AddArg2(x, y)
  8357  		v.AddArg(v0)
  8358  		return true
  8359  	}
  8360  	// match: (GreaterThan (CMPconst [0] x:(ANDconst [c] y)))
  8361  	// cond: x.Uses == 1
  8362  	// result: (GreaterThan (TSTconst [c] y))
  8363  	for {
  8364  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8365  			break
  8366  		}
  8367  		x := v_0.Args[0]
  8368  		if x.Op != ssaop.OpARM64ANDconst {
  8369  			break
  8370  		}
  8371  		c := ssa.AuxIntToInt64(x.AuxInt)
  8372  		y := x.Args[0]
  8373  		if !(x.Uses == 1) {
  8374  			break
  8375  		}
  8376  		v.Reset(ssaop.OpARM64GreaterThan)
  8377  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8378  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8379  		v0.AddArg(y)
  8380  		v.AddArg(v0)
  8381  		return true
  8382  	}
  8383  	// match: (GreaterThan (FlagConstant [fc]))
  8384  	// result: (MOVDconst [ssa.B2i(fc.Gt())])
  8385  	for {
  8386  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8387  			break
  8388  		}
  8389  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8390  		v.Reset(ssaop.OpARM64MOVDconst)
  8391  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Gt()))
  8392  		return true
  8393  	}
  8394  	// match: (GreaterThan (InvertFlags x))
  8395  	// result: (LessThan x)
  8396  	for {
  8397  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8398  			break
  8399  		}
  8400  		x := v_0.Args[0]
  8401  		v.Reset(ssaop.OpARM64LessThan)
  8402  		v.AddArg(x)
  8403  		return true
  8404  	}
  8405  	return false
  8406  }
  8407  func rewriteValue_OpARM64GreaterThanF(v *ssa.Value) bool {
  8408  	v_0 := v.Args[0]
  8409  	// match: (GreaterThanF (InvertFlags x))
  8410  	// result: (LessThanF x)
  8411  	for {
  8412  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8413  			break
  8414  		}
  8415  		x := v_0.Args[0]
  8416  		v.Reset(ssaop.OpARM64LessThanF)
  8417  		v.AddArg(x)
  8418  		return true
  8419  	}
  8420  	return false
  8421  }
  8422  func rewriteValue_OpARM64GreaterThanU(v *ssa.Value) bool {
  8423  	v_0 := v.Args[0]
  8424  	// match: (GreaterThanU (FlagConstant [fc]))
  8425  	// result: (MOVDconst [ssa.B2i(fc.Ugt())])
  8426  	for {
  8427  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8428  			break
  8429  		}
  8430  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8431  		v.Reset(ssaop.OpARM64MOVDconst)
  8432  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ugt()))
  8433  		return true
  8434  	}
  8435  	// match: (GreaterThanU (InvertFlags x))
  8436  	// result: (LessThanU x)
  8437  	for {
  8438  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8439  			break
  8440  		}
  8441  		x := v_0.Args[0]
  8442  		v.Reset(ssaop.OpARM64LessThanU)
  8443  		v.AddArg(x)
  8444  		return true
  8445  	}
  8446  	return false
  8447  }
  8448  func rewriteValue_OpARM64LDP(v *ssa.Value) bool {
  8449  	v_1 := v.Args[1]
  8450  	v_0 := v.Args[0]
  8451  	b := v.Block
  8452  	config := b.Func.Config
  8453  	// match: (LDP [off1] {sym} (ADDconst [off2] ptr) mem)
  8454  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  8455  	// result: (LDP [off1+int32(off2)] {sym} ptr mem)
  8456  	for {
  8457  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  8458  		sym := ssa.AuxToSym(v.Aux)
  8459  		if v_0.Op != ssaop.OpARM64ADDconst {
  8460  			break
  8461  		}
  8462  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  8463  		ptr := v_0.Args[0]
  8464  		mem := v_1
  8465  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  8466  			break
  8467  		}
  8468  		v.Reset(ssaop.OpARM64LDP)
  8469  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  8470  		v.Aux = ssa.SymToAux(sym)
  8471  		v.AddArg2(ptr, mem)
  8472  		return true
  8473  	}
  8474  	// match: (LDP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  8475  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  8476  	// result: (LDP [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  8477  	for {
  8478  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  8479  		sym1 := ssa.AuxToSym(v.Aux)
  8480  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  8481  			break
  8482  		}
  8483  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  8484  		sym2 := ssa.AuxToSym(v_0.Aux)
  8485  		ptr := v_0.Args[0]
  8486  		mem := v_1
  8487  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  8488  			break
  8489  		}
  8490  		v.Reset(ssaop.OpARM64LDP)
  8491  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  8492  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  8493  		v.AddArg2(ptr, mem)
  8494  		return true
  8495  	}
  8496  	return false
  8497  }
  8498  func rewriteValue_OpARM64LessEqual(v *ssa.Value) bool {
  8499  	v_0 := v.Args[0]
  8500  	b := v.Block
  8501  	// match: (LessEqual (CMPconst [0] z:(AND x y)))
  8502  	// cond: z.Uses == 1
  8503  	// result: (LessEqual (TST x y))
  8504  	for {
  8505  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8506  			break
  8507  		}
  8508  		z := v_0.Args[0]
  8509  		if z.Op != ssaop.OpARM64AND {
  8510  			break
  8511  		}
  8512  		y := z.Args[1]
  8513  		x := z.Args[0]
  8514  		if !(z.Uses == 1) {
  8515  			break
  8516  		}
  8517  		v.Reset(ssaop.OpARM64LessEqual)
  8518  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8519  		v0.AddArg2(x, y)
  8520  		v.AddArg(v0)
  8521  		return true
  8522  	}
  8523  	// match: (LessEqual (CMPWconst [0] x:(ANDconst [c] y)))
  8524  	// cond: x.Uses == 1
  8525  	// result: (LessEqual (TSTWconst [int32(c)] y))
  8526  	for {
  8527  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8528  			break
  8529  		}
  8530  		x := v_0.Args[0]
  8531  		if x.Op != ssaop.OpARM64ANDconst {
  8532  			break
  8533  		}
  8534  		c := ssa.AuxIntToInt64(x.AuxInt)
  8535  		y := x.Args[0]
  8536  		if !(x.Uses == 1) {
  8537  			break
  8538  		}
  8539  		v.Reset(ssaop.OpARM64LessEqual)
  8540  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8541  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8542  		v0.AddArg(y)
  8543  		v.AddArg(v0)
  8544  		return true
  8545  	}
  8546  	// match: (LessEqual (CMPWconst [0] z:(AND x y)))
  8547  	// cond: z.Uses == 1
  8548  	// result: (LessEqual (TSTW x y))
  8549  	for {
  8550  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8551  			break
  8552  		}
  8553  		z := v_0.Args[0]
  8554  		if z.Op != ssaop.OpARM64AND {
  8555  			break
  8556  		}
  8557  		y := z.Args[1]
  8558  		x := z.Args[0]
  8559  		if !(z.Uses == 1) {
  8560  			break
  8561  		}
  8562  		v.Reset(ssaop.OpARM64LessEqual)
  8563  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8564  		v0.AddArg2(x, y)
  8565  		v.AddArg(v0)
  8566  		return true
  8567  	}
  8568  	// match: (LessEqual (CMPconst [0] x:(ANDconst [c] y)))
  8569  	// cond: x.Uses == 1
  8570  	// result: (LessEqual (TSTconst [c] y))
  8571  	for {
  8572  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8573  			break
  8574  		}
  8575  		x := v_0.Args[0]
  8576  		if x.Op != ssaop.OpARM64ANDconst {
  8577  			break
  8578  		}
  8579  		c := ssa.AuxIntToInt64(x.AuxInt)
  8580  		y := x.Args[0]
  8581  		if !(x.Uses == 1) {
  8582  			break
  8583  		}
  8584  		v.Reset(ssaop.OpARM64LessEqual)
  8585  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8586  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8587  		v0.AddArg(y)
  8588  		v.AddArg(v0)
  8589  		return true
  8590  	}
  8591  	// match: (LessEqual (FlagConstant [fc]))
  8592  	// result: (MOVDconst [ssa.B2i(fc.Le())])
  8593  	for {
  8594  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8595  			break
  8596  		}
  8597  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8598  		v.Reset(ssaop.OpARM64MOVDconst)
  8599  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Le()))
  8600  		return true
  8601  	}
  8602  	// match: (LessEqual (InvertFlags x))
  8603  	// result: (GreaterEqual x)
  8604  	for {
  8605  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8606  			break
  8607  		}
  8608  		x := v_0.Args[0]
  8609  		v.Reset(ssaop.OpARM64GreaterEqual)
  8610  		v.AddArg(x)
  8611  		return true
  8612  	}
  8613  	return false
  8614  }
  8615  func rewriteValue_OpARM64LessEqualF(v *ssa.Value) bool {
  8616  	v_0 := v.Args[0]
  8617  	// match: (LessEqualF (InvertFlags x))
  8618  	// result: (GreaterEqualF x)
  8619  	for {
  8620  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8621  			break
  8622  		}
  8623  		x := v_0.Args[0]
  8624  		v.Reset(ssaop.OpARM64GreaterEqualF)
  8625  		v.AddArg(x)
  8626  		return true
  8627  	}
  8628  	return false
  8629  }
  8630  func rewriteValue_OpARM64LessEqualU(v *ssa.Value) bool {
  8631  	v_0 := v.Args[0]
  8632  	// match: (LessEqualU (FlagConstant [fc]))
  8633  	// result: (MOVDconst [ssa.B2i(fc.Ule())])
  8634  	for {
  8635  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8636  			break
  8637  		}
  8638  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8639  		v.Reset(ssaop.OpARM64MOVDconst)
  8640  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ule()))
  8641  		return true
  8642  	}
  8643  	// match: (LessEqualU (InvertFlags x))
  8644  	// result: (GreaterEqualU x)
  8645  	for {
  8646  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8647  			break
  8648  		}
  8649  		x := v_0.Args[0]
  8650  		v.Reset(ssaop.OpARM64GreaterEqualU)
  8651  		v.AddArg(x)
  8652  		return true
  8653  	}
  8654  	return false
  8655  }
  8656  func rewriteValue_OpARM64LessThan(v *ssa.Value) bool {
  8657  	v_0 := v.Args[0]
  8658  	b := v.Block
  8659  	// match: (LessThan (CMPconst [0] z:(AND x y)))
  8660  	// cond: z.Uses == 1
  8661  	// result: (LessThan (TST x y))
  8662  	for {
  8663  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8664  			break
  8665  		}
  8666  		z := v_0.Args[0]
  8667  		if z.Op != ssaop.OpARM64AND {
  8668  			break
  8669  		}
  8670  		y := z.Args[1]
  8671  		x := z.Args[0]
  8672  		if !(z.Uses == 1) {
  8673  			break
  8674  		}
  8675  		v.Reset(ssaop.OpARM64LessThan)
  8676  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8677  		v0.AddArg2(x, y)
  8678  		v.AddArg(v0)
  8679  		return true
  8680  	}
  8681  	// match: (LessThan (CMPWconst [0] x:(ANDconst [c] y)))
  8682  	// cond: x.Uses == 1
  8683  	// result: (LessThan (TSTWconst [int32(c)] y))
  8684  	for {
  8685  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8686  			break
  8687  		}
  8688  		x := v_0.Args[0]
  8689  		if x.Op != ssaop.OpARM64ANDconst {
  8690  			break
  8691  		}
  8692  		c := ssa.AuxIntToInt64(x.AuxInt)
  8693  		y := x.Args[0]
  8694  		if !(x.Uses == 1) {
  8695  			break
  8696  		}
  8697  		v.Reset(ssaop.OpARM64LessThan)
  8698  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8699  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8700  		v0.AddArg(y)
  8701  		v.AddArg(v0)
  8702  		return true
  8703  	}
  8704  	// match: (LessThan (CMPWconst [0] z:(AND x y)))
  8705  	// cond: z.Uses == 1
  8706  	// result: (LessThan (TSTW x y))
  8707  	for {
  8708  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8709  			break
  8710  		}
  8711  		z := v_0.Args[0]
  8712  		if z.Op != ssaop.OpARM64AND {
  8713  			break
  8714  		}
  8715  		y := z.Args[1]
  8716  		x := z.Args[0]
  8717  		if !(z.Uses == 1) {
  8718  			break
  8719  		}
  8720  		v.Reset(ssaop.OpARM64LessThan)
  8721  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8722  		v0.AddArg2(x, y)
  8723  		v.AddArg(v0)
  8724  		return true
  8725  	}
  8726  	// match: (LessThan (CMPconst [0] x:(ANDconst [c] y)))
  8727  	// cond: x.Uses == 1
  8728  	// result: (LessThan (TSTconst [c] y))
  8729  	for {
  8730  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8731  			break
  8732  		}
  8733  		x := v_0.Args[0]
  8734  		if x.Op != ssaop.OpARM64ANDconst {
  8735  			break
  8736  		}
  8737  		c := ssa.AuxIntToInt64(x.AuxInt)
  8738  		y := x.Args[0]
  8739  		if !(x.Uses == 1) {
  8740  			break
  8741  		}
  8742  		v.Reset(ssaop.OpARM64LessThan)
  8743  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8744  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8745  		v0.AddArg(y)
  8746  		v.AddArg(v0)
  8747  		return true
  8748  	}
  8749  	// match: (LessThan (CMPconst [0] x:(ADDconst [c] y)))
  8750  	// cond: x.Uses == 1
  8751  	// result: (LessThanNoov (CMNconst [c] y))
  8752  	for {
  8753  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8754  			break
  8755  		}
  8756  		x := v_0.Args[0]
  8757  		if x.Op != ssaop.OpARM64ADDconst {
  8758  			break
  8759  		}
  8760  		c := ssa.AuxIntToInt64(x.AuxInt)
  8761  		y := x.Args[0]
  8762  		if !(x.Uses == 1) {
  8763  			break
  8764  		}
  8765  		v.Reset(ssaop.OpARM64LessThanNoov)
  8766  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  8767  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8768  		v0.AddArg(y)
  8769  		v.AddArg(v0)
  8770  		return true
  8771  	}
  8772  	// match: (LessThan (CMPWconst [0] x:(ADDconst [c] y)))
  8773  	// cond: x.Uses == 1
  8774  	// result: (LessThanNoov (CMNWconst [int32(c)] y))
  8775  	for {
  8776  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8777  			break
  8778  		}
  8779  		x := v_0.Args[0]
  8780  		if x.Op != ssaop.OpARM64ADDconst {
  8781  			break
  8782  		}
  8783  		c := ssa.AuxIntToInt64(x.AuxInt)
  8784  		y := x.Args[0]
  8785  		if !(x.Uses == 1) {
  8786  			break
  8787  		}
  8788  		v.Reset(ssaop.OpARM64LessThanNoov)
  8789  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  8790  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8791  		v0.AddArg(y)
  8792  		v.AddArg(v0)
  8793  		return true
  8794  	}
  8795  	// match: (LessThan (CMPconst [0] z:(ADD x y)))
  8796  	// cond: z.Uses == 1
  8797  	// result: (LessThanNoov (CMN x y))
  8798  	for {
  8799  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8800  			break
  8801  		}
  8802  		z := v_0.Args[0]
  8803  		if z.Op != ssaop.OpARM64ADD {
  8804  			break
  8805  		}
  8806  		y := z.Args[1]
  8807  		x := z.Args[0]
  8808  		if !(z.Uses == 1) {
  8809  			break
  8810  		}
  8811  		v.Reset(ssaop.OpARM64LessThanNoov)
  8812  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8813  		v0.AddArg2(x, y)
  8814  		v.AddArg(v0)
  8815  		return true
  8816  	}
  8817  	// match: (LessThan (CMPWconst [0] z:(ADD x y)))
  8818  	// cond: z.Uses == 1
  8819  	// result: (LessThanNoov (CMNW x y))
  8820  	for {
  8821  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8822  			break
  8823  		}
  8824  		z := v_0.Args[0]
  8825  		if z.Op != ssaop.OpARM64ADD {
  8826  			break
  8827  		}
  8828  		y := z.Args[1]
  8829  		x := z.Args[0]
  8830  		if !(z.Uses == 1) {
  8831  			break
  8832  		}
  8833  		v.Reset(ssaop.OpARM64LessThanNoov)
  8834  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8835  		v0.AddArg2(x, y)
  8836  		v.AddArg(v0)
  8837  		return true
  8838  	}
  8839  	// match: (LessThan (CMPconst [0] z:(MADD a x y)))
  8840  	// cond: z.Uses == 1
  8841  	// result: (LessThanNoov (CMN a (MUL <x.Type> x y)))
  8842  	for {
  8843  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8844  			break
  8845  		}
  8846  		z := v_0.Args[0]
  8847  		if z.Op != ssaop.OpARM64MADD {
  8848  			break
  8849  		}
  8850  		y := z.Args[2]
  8851  		a := z.Args[0]
  8852  		x := z.Args[1]
  8853  		if !(z.Uses == 1) {
  8854  			break
  8855  		}
  8856  		v.Reset(ssaop.OpARM64LessThanNoov)
  8857  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8858  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  8859  		v1.AddArg2(x, y)
  8860  		v0.AddArg2(a, v1)
  8861  		v.AddArg(v0)
  8862  		return true
  8863  	}
  8864  	// match: (LessThan (CMPWconst [0] z:(MADDW a x y)))
  8865  	// cond: z.Uses == 1
  8866  	// result: (LessThanNoov (CMNW a (MULW <x.Type> x y)))
  8867  	for {
  8868  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8869  			break
  8870  		}
  8871  		z := v_0.Args[0]
  8872  		if z.Op != ssaop.OpARM64MADDW {
  8873  			break
  8874  		}
  8875  		y := z.Args[2]
  8876  		a := z.Args[0]
  8877  		x := z.Args[1]
  8878  		if !(z.Uses == 1) {
  8879  			break
  8880  		}
  8881  		v.Reset(ssaop.OpARM64LessThanNoov)
  8882  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8883  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  8884  		v1.AddArg2(x, y)
  8885  		v0.AddArg2(a, v1)
  8886  		v.AddArg(v0)
  8887  		return true
  8888  	}
  8889  	// match: (LessThan (FlagConstant [fc]))
  8890  	// result: (MOVDconst [ssa.B2i(fc.Lt())])
  8891  	for {
  8892  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8893  			break
  8894  		}
  8895  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8896  		v.Reset(ssaop.OpARM64MOVDconst)
  8897  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Lt()))
  8898  		return true
  8899  	}
  8900  	// match: (LessThan (InvertFlags x))
  8901  	// result: (GreaterThan x)
  8902  	for {
  8903  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8904  			break
  8905  		}
  8906  		x := v_0.Args[0]
  8907  		v.Reset(ssaop.OpARM64GreaterThan)
  8908  		v.AddArg(x)
  8909  		return true
  8910  	}
  8911  	// match: (LessThan (CMPconst x [0]))
  8912  	// result: (SRLconst [63] x)
  8913  	for {
  8914  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8915  			break
  8916  		}
  8917  		x := v_0.Args[0]
  8918  		v.Reset(ssaop.OpARM64SRLconst)
  8919  		v.AuxInt = ssa.Int64ToAuxInt(63)
  8920  		v.AddArg(x)
  8921  		return true
  8922  	}
  8923  	// match: (LessThan (CMPWconst x [0]))
  8924  	// result: (UBFX [ssa.ArmBFAuxInt(31,1)] x)
  8925  	for {
  8926  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8927  			break
  8928  		}
  8929  		x := v_0.Args[0]
  8930  		v.Reset(ssaop.OpARM64UBFX)
  8931  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(31, 1))
  8932  		v.AddArg(x)
  8933  		return true
  8934  	}
  8935  	return false
  8936  }
  8937  func rewriteValue_OpARM64LessThanF(v *ssa.Value) bool {
  8938  	v_0 := v.Args[0]
  8939  	// match: (LessThanF (InvertFlags x))
  8940  	// result: (GreaterThanF x)
  8941  	for {
  8942  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8943  			break
  8944  		}
  8945  		x := v_0.Args[0]
  8946  		v.Reset(ssaop.OpARM64GreaterThanF)
  8947  		v.AddArg(x)
  8948  		return true
  8949  	}
  8950  	return false
  8951  }
  8952  func rewriteValue_OpARM64LessThanNoov(v *ssa.Value) bool {
  8953  	v_0 := v.Args[0]
  8954  	// match: (LessThanNoov (FlagConstant [fc]))
  8955  	// result: (MOVDconst [ssa.B2i(fc.LtNoov())])
  8956  	for {
  8957  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8958  			break
  8959  		}
  8960  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8961  		v.Reset(ssaop.OpARM64MOVDconst)
  8962  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.LtNoov()))
  8963  		return true
  8964  	}
  8965  	return false
  8966  }
  8967  func rewriteValue_OpARM64LessThanU(v *ssa.Value) bool {
  8968  	v_0 := v.Args[0]
  8969  	// match: (LessThanU (FlagConstant [fc]))
  8970  	// result: (MOVDconst [ssa.B2i(fc.Ult())])
  8971  	for {
  8972  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8973  			break
  8974  		}
  8975  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8976  		v.Reset(ssaop.OpARM64MOVDconst)
  8977  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ult()))
  8978  		return true
  8979  	}
  8980  	// match: (LessThanU (InvertFlags x))
  8981  	// result: (GreaterThanU x)
  8982  	for {
  8983  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8984  			break
  8985  		}
  8986  		x := v_0.Args[0]
  8987  		v.Reset(ssaop.OpARM64GreaterThanU)
  8988  		v.AddArg(x)
  8989  		return true
  8990  	}
  8991  	return false
  8992  }
  8993  func rewriteValue_OpARM64LoweredPanicBoundsCR(v *ssa.Value) bool {
  8994  	v_1 := v.Args[1]
  8995  	v_0 := v.Args[0]
  8996  	// match: (LoweredPanicBoundsCR [kind] {p} (MOVDconst [c]) mem)
  8997  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:p.C, Cy:c}} mem)
  8998  	for {
  8999  		kind := ssa.AuxIntToInt64(v.AuxInt)
  9000  		p := ssa.AuxToPanicBoundsC(v.Aux)
  9001  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9002  			break
  9003  		}
  9004  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9005  		mem := v_1
  9006  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCC)
  9007  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  9008  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: p.C, Cy: c})
  9009  		v.AddArg(mem)
  9010  		return true
  9011  	}
  9012  	return false
  9013  }
  9014  func rewriteValue_OpARM64LoweredPanicBoundsRC(v *ssa.Value) bool {
  9015  	v_1 := v.Args[1]
  9016  	v_0 := v.Args[0]
  9017  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVDconst [c]) mem)
  9018  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:c, Cy:p.C}} mem)
  9019  	for {
  9020  		kind := ssa.AuxIntToInt64(v.AuxInt)
  9021  		p := ssa.AuxToPanicBoundsC(v.Aux)
  9022  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9023  			break
  9024  		}
  9025  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9026  		mem := v_1
  9027  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCC)
  9028  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  9029  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: c, Cy: p.C})
  9030  		v.AddArg(mem)
  9031  		return true
  9032  	}
  9033  	return false
  9034  }
  9035  func rewriteValue_OpARM64LoweredPanicBoundsRR(v *ssa.Value) bool {
  9036  	v_2 := v.Args[2]
  9037  	v_1 := v.Args[1]
  9038  	v_0 := v.Args[0]
  9039  	// match: (LoweredPanicBoundsRR [kind] x (MOVDconst [c]) mem)
  9040  	// result: (LoweredPanicBoundsRC [kind] x {ssa.PanicBoundsC{C:c}} mem)
  9041  	for {
  9042  		kind := ssa.AuxIntToInt64(v.AuxInt)
  9043  		x := v_0
  9044  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9045  			break
  9046  		}
  9047  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9048  		mem := v_2
  9049  		v.Reset(ssaop.OpARM64LoweredPanicBoundsRC)
  9050  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  9051  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  9052  		v.AddArg2(x, mem)
  9053  		return true
  9054  	}
  9055  	// match: (LoweredPanicBoundsRR [kind] (MOVDconst [c]) y mem)
  9056  	// result: (LoweredPanicBoundsCR [kind] {ssa.PanicBoundsC{C:c}} y mem)
  9057  	for {
  9058  		kind := ssa.AuxIntToInt64(v.AuxInt)
  9059  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9060  			break
  9061  		}
  9062  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9063  		y := v_1
  9064  		mem := v_2
  9065  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCR)
  9066  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  9067  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  9068  		v.AddArg2(y, mem)
  9069  		return true
  9070  	}
  9071  	return false
  9072  }
  9073  func rewriteValue_OpARM64MADD(v *ssa.Value) bool {
  9074  	v_2 := v.Args[2]
  9075  	v_1 := v.Args[1]
  9076  	v_0 := v.Args[0]
  9077  	b := v.Block
  9078  	// match: (MADD a x (MOVDconst [-1]))
  9079  	// result: (SUB a x)
  9080  	for {
  9081  		a := v_0
  9082  		x := v_1
  9083  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != -1 {
  9084  			break
  9085  		}
  9086  		v.Reset(ssaop.OpARM64SUB)
  9087  		v.AddArg2(a, x)
  9088  		return true
  9089  	}
  9090  	// match: (MADD a _ (MOVDconst [0]))
  9091  	// result: a
  9092  	for {
  9093  		a := v_0
  9094  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 0 {
  9095  			break
  9096  		}
  9097  		v.CopyOf(a)
  9098  		return true
  9099  	}
  9100  	// match: (MADD a x (MOVDconst [1]))
  9101  	// result: (ADD a x)
  9102  	for {
  9103  		a := v_0
  9104  		x := v_1
  9105  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 1 {
  9106  			break
  9107  		}
  9108  		v.Reset(ssaop.OpARM64ADD)
  9109  		v.AddArg2(a, x)
  9110  		return true
  9111  	}
  9112  	// match: (MADD a x (MOVDconst [c]))
  9113  	// cond: ssa.IsPowerOfTwo(c)
  9114  	// result: (ADDshiftLL a x [ssa.Log64(c)])
  9115  	for {
  9116  		a := v_0
  9117  		x := v_1
  9118  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9119  			break
  9120  		}
  9121  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9122  		if !(ssa.IsPowerOfTwo(c)) {
  9123  			break
  9124  		}
  9125  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9126  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9127  		v.AddArg2(a, x)
  9128  		return true
  9129  	}
  9130  	// match: (MADD a x (MOVDconst [c]))
  9131  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
  9132  	// result: (ADD a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  9133  	for {
  9134  		a := v_0
  9135  		x := v_1
  9136  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9137  			break
  9138  		}
  9139  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9140  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  9141  			break
  9142  		}
  9143  		v.Reset(ssaop.OpARM64ADD)
  9144  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9145  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9146  		v0.AddArg2(x, x)
  9147  		v.AddArg2(a, v0)
  9148  		return true
  9149  	}
  9150  	// match: (MADD a x (MOVDconst [c]))
  9151  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
  9152  	// result: (SUB a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
  9153  	for {
  9154  		a := v_0
  9155  		x := v_1
  9156  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9157  			break
  9158  		}
  9159  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9160  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  9161  			break
  9162  		}
  9163  		v.Reset(ssaop.OpARM64SUB)
  9164  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9165  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9166  		v0.AddArg2(x, x)
  9167  		v.AddArg2(a, v0)
  9168  		return true
  9169  	}
  9170  	// match: (MADD a x (MOVDconst [c]))
  9171  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  9172  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
  9173  	for {
  9174  		a := v_0
  9175  		x := v_1
  9176  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9177  			break
  9178  		}
  9179  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9180  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  9181  			break
  9182  		}
  9183  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9184  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9185  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9186  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9187  		v0.AddArg2(x, x)
  9188  		v.AddArg2(a, v0)
  9189  		return true
  9190  	}
  9191  	// match: (MADD a x (MOVDconst [c]))
  9192  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  9193  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
  9194  	for {
  9195  		a := v_0
  9196  		x := v_1
  9197  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9198  			break
  9199  		}
  9200  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9201  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  9202  			break
  9203  		}
  9204  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9205  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9206  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9207  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9208  		v0.AddArg2(x, x)
  9209  		v.AddArg2(a, v0)
  9210  		return true
  9211  	}
  9212  	// match: (MADD a x (MOVDconst [c]))
  9213  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  9214  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
  9215  	for {
  9216  		a := v_0
  9217  		x := v_1
  9218  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9219  			break
  9220  		}
  9221  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9222  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  9223  			break
  9224  		}
  9225  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9226  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9227  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9228  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9229  		v0.AddArg2(x, x)
  9230  		v.AddArg2(a, v0)
  9231  		return true
  9232  	}
  9233  	// match: (MADD a x (MOVDconst [c]))
  9234  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  9235  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
  9236  	for {
  9237  		a := v_0
  9238  		x := v_1
  9239  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9240  			break
  9241  		}
  9242  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9243  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  9244  			break
  9245  		}
  9246  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9247  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9248  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9249  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9250  		v0.AddArg2(x, x)
  9251  		v.AddArg2(a, v0)
  9252  		return true
  9253  	}
  9254  	// match: (MADD a (MOVDconst [-1]) x)
  9255  	// result: (SUB a x)
  9256  	for {
  9257  		a := v_0
  9258  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  9259  			break
  9260  		}
  9261  		x := v_2
  9262  		v.Reset(ssaop.OpARM64SUB)
  9263  		v.AddArg2(a, x)
  9264  		return true
  9265  	}
  9266  	// match: (MADD a (MOVDconst [0]) _)
  9267  	// result: a
  9268  	for {
  9269  		a := v_0
  9270  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  9271  			break
  9272  		}
  9273  		v.CopyOf(a)
  9274  		return true
  9275  	}
  9276  	// match: (MADD a (MOVDconst [1]) x)
  9277  	// result: (ADD a x)
  9278  	for {
  9279  		a := v_0
  9280  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  9281  			break
  9282  		}
  9283  		x := v_2
  9284  		v.Reset(ssaop.OpARM64ADD)
  9285  		v.AddArg2(a, x)
  9286  		return true
  9287  	}
  9288  	// match: (MADD a (MOVDconst [c]) x)
  9289  	// cond: ssa.IsPowerOfTwo(c)
  9290  	// result: (ADDshiftLL a x [ssa.Log64(c)])
  9291  	for {
  9292  		a := v_0
  9293  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9294  			break
  9295  		}
  9296  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9297  		x := v_2
  9298  		if !(ssa.IsPowerOfTwo(c)) {
  9299  			break
  9300  		}
  9301  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9302  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9303  		v.AddArg2(a, x)
  9304  		return true
  9305  	}
  9306  	// match: (MADD a (MOVDconst [c]) x)
  9307  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
  9308  	// result: (ADD a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  9309  	for {
  9310  		a := v_0
  9311  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9312  			break
  9313  		}
  9314  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9315  		x := v_2
  9316  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  9317  			break
  9318  		}
  9319  		v.Reset(ssaop.OpARM64ADD)
  9320  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9321  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9322  		v0.AddArg2(x, x)
  9323  		v.AddArg2(a, v0)
  9324  		return true
  9325  	}
  9326  	// match: (MADD a (MOVDconst [c]) x)
  9327  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
  9328  	// result: (SUB a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
  9329  	for {
  9330  		a := v_0
  9331  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9332  			break
  9333  		}
  9334  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9335  		x := v_2
  9336  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  9337  			break
  9338  		}
  9339  		v.Reset(ssaop.OpARM64SUB)
  9340  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9341  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9342  		v0.AddArg2(x, x)
  9343  		v.AddArg2(a, v0)
  9344  		return true
  9345  	}
  9346  	// match: (MADD a (MOVDconst [c]) x)
  9347  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  9348  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
  9349  	for {
  9350  		a := v_0
  9351  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9352  			break
  9353  		}
  9354  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9355  		x := v_2
  9356  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  9357  			break
  9358  		}
  9359  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9360  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9361  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9362  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9363  		v0.AddArg2(x, x)
  9364  		v.AddArg2(a, v0)
  9365  		return true
  9366  	}
  9367  	// match: (MADD a (MOVDconst [c]) x)
  9368  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  9369  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
  9370  	for {
  9371  		a := v_0
  9372  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9373  			break
  9374  		}
  9375  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9376  		x := v_2
  9377  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  9378  			break
  9379  		}
  9380  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9381  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9382  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9383  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9384  		v0.AddArg2(x, x)
  9385  		v.AddArg2(a, v0)
  9386  		return true
  9387  	}
  9388  	// match: (MADD a (MOVDconst [c]) x)
  9389  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  9390  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
  9391  	for {
  9392  		a := v_0
  9393  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9394  			break
  9395  		}
  9396  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9397  		x := v_2
  9398  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  9399  			break
  9400  		}
  9401  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9402  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9403  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9404  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9405  		v0.AddArg2(x, x)
  9406  		v.AddArg2(a, v0)
  9407  		return true
  9408  	}
  9409  	// match: (MADD a (MOVDconst [c]) x)
  9410  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  9411  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
  9412  	for {
  9413  		a := v_0
  9414  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9415  			break
  9416  		}
  9417  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9418  		x := v_2
  9419  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  9420  			break
  9421  		}
  9422  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9423  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9424  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9425  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9426  		v0.AddArg2(x, x)
  9427  		v.AddArg2(a, v0)
  9428  		return true
  9429  	}
  9430  	// match: (MADD (MOVDconst [c]) x y)
  9431  	// result: (ADDconst [c] (MUL <x.Type> x y))
  9432  	for {
  9433  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9434  			break
  9435  		}
  9436  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9437  		x := v_1
  9438  		y := v_2
  9439  		v.Reset(ssaop.OpARM64ADDconst)
  9440  		v.AuxInt = ssa.Int64ToAuxInt(c)
  9441  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  9442  		v0.AddArg2(x, y)
  9443  		v.AddArg(v0)
  9444  		return true
  9445  	}
  9446  	// match: (MADD a (MOVDconst [c]) (MOVDconst [d]))
  9447  	// result: (ADDconst [c*d] a)
  9448  	for {
  9449  		a := v_0
  9450  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9451  			break
  9452  		}
  9453  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9454  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9455  			break
  9456  		}
  9457  		d := ssa.AuxIntToInt64(v_2.AuxInt)
  9458  		v.Reset(ssaop.OpARM64ADDconst)
  9459  		v.AuxInt = ssa.Int64ToAuxInt(c * d)
  9460  		v.AddArg(a)
  9461  		return true
  9462  	}
  9463  	return false
  9464  }
  9465  func rewriteValue_OpARM64MADDW(v *ssa.Value) bool {
  9466  	v_2 := v.Args[2]
  9467  	v_1 := v.Args[1]
  9468  	v_0 := v.Args[0]
  9469  	b := v.Block
  9470  	// match: (MADDW a x (MOVDconst [c]))
  9471  	// cond: int32(c)==-1
  9472  	// result: (MOVWUreg (SUB <a.Type> a x))
  9473  	for {
  9474  		a := v_0
  9475  		x := v_1
  9476  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9477  			break
  9478  		}
  9479  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9480  		if !(int32(c) == -1) {
  9481  			break
  9482  		}
  9483  		v.Reset(ssaop.OpARM64MOVWUreg)
  9484  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9485  		v0.AddArg2(a, x)
  9486  		v.AddArg(v0)
  9487  		return true
  9488  	}
  9489  	// match: (MADDW a _ (MOVDconst [c]))
  9490  	// cond: int32(c)==0
  9491  	// result: (MOVWUreg a)
  9492  	for {
  9493  		a := v_0
  9494  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9495  			break
  9496  		}
  9497  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9498  		if !(int32(c) == 0) {
  9499  			break
  9500  		}
  9501  		v.Reset(ssaop.OpARM64MOVWUreg)
  9502  		v.AddArg(a)
  9503  		return true
  9504  	}
  9505  	// match: (MADDW a x (MOVDconst [c]))
  9506  	// cond: int32(c)==1
  9507  	// result: (MOVWUreg (ADD <a.Type> a x))
  9508  	for {
  9509  		a := v_0
  9510  		x := v_1
  9511  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9512  			break
  9513  		}
  9514  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9515  		if !(int32(c) == 1) {
  9516  			break
  9517  		}
  9518  		v.Reset(ssaop.OpARM64MOVWUreg)
  9519  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9520  		v0.AddArg2(a, x)
  9521  		v.AddArg(v0)
  9522  		return true
  9523  	}
  9524  	// match: (MADDW a x (MOVDconst [c]))
  9525  	// cond: ssa.IsPowerOfTwo(c)
  9526  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [ssa.Log64(c)]))
  9527  	for {
  9528  		a := v_0
  9529  		x := v_1
  9530  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9531  			break
  9532  		}
  9533  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9534  		if !(ssa.IsPowerOfTwo(c)) {
  9535  			break
  9536  		}
  9537  		v.Reset(ssaop.OpARM64MOVWUreg)
  9538  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9539  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9540  		v0.AddArg2(a, x)
  9541  		v.AddArg(v0)
  9542  		return true
  9543  	}
  9544  	// match: (MADDW a x (MOVDconst [c]))
  9545  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
  9546  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9547  	for {
  9548  		a := v_0
  9549  		x := v_1
  9550  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9551  			break
  9552  		}
  9553  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9554  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9555  			break
  9556  		}
  9557  		v.Reset(ssaop.OpARM64MOVWUreg)
  9558  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9559  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9560  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9561  		v1.AddArg2(x, x)
  9562  		v0.AddArg2(a, v1)
  9563  		v.AddArg(v0)
  9564  		return true
  9565  	}
  9566  	// match: (MADDW a x (MOVDconst [c]))
  9567  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
  9568  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
  9569  	for {
  9570  		a := v_0
  9571  		x := v_1
  9572  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9573  			break
  9574  		}
  9575  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9576  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
  9577  			break
  9578  		}
  9579  		v.Reset(ssaop.OpARM64MOVWUreg)
  9580  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9581  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9582  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9583  		v1.AddArg2(x, x)
  9584  		v0.AddArg2(a, v1)
  9585  		v.AddArg(v0)
  9586  		return true
  9587  	}
  9588  	// match: (MADDW a x (MOVDconst [c]))
  9589  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
  9590  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
  9591  	for {
  9592  		a := v_0
  9593  		x := v_1
  9594  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9595  			break
  9596  		}
  9597  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9598  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
  9599  			break
  9600  		}
  9601  		v.Reset(ssaop.OpARM64MOVWUreg)
  9602  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9603  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9604  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9605  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9606  		v1.AddArg2(x, x)
  9607  		v0.AddArg2(a, v1)
  9608  		v.AddArg(v0)
  9609  		return true
  9610  	}
  9611  	// match: (MADDW a x (MOVDconst [c]))
  9612  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
  9613  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
  9614  	for {
  9615  		a := v_0
  9616  		x := v_1
  9617  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9618  			break
  9619  		}
  9620  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9621  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
  9622  			break
  9623  		}
  9624  		v.Reset(ssaop.OpARM64MOVWUreg)
  9625  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9626  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9627  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9628  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9629  		v1.AddArg2(x, x)
  9630  		v0.AddArg2(a, v1)
  9631  		v.AddArg(v0)
  9632  		return true
  9633  	}
  9634  	// match: (MADDW a x (MOVDconst [c]))
  9635  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
  9636  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
  9637  	for {
  9638  		a := v_0
  9639  		x := v_1
  9640  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9641  			break
  9642  		}
  9643  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9644  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
  9645  			break
  9646  		}
  9647  		v.Reset(ssaop.OpARM64MOVWUreg)
  9648  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9649  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9650  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9651  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9652  		v1.AddArg2(x, x)
  9653  		v0.AddArg2(a, v1)
  9654  		v.AddArg(v0)
  9655  		return true
  9656  	}
  9657  	// match: (MADDW a x (MOVDconst [c]))
  9658  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
  9659  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
  9660  	for {
  9661  		a := v_0
  9662  		x := v_1
  9663  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9664  			break
  9665  		}
  9666  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9667  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
  9668  			break
  9669  		}
  9670  		v.Reset(ssaop.OpARM64MOVWUreg)
  9671  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9672  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9673  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9674  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9675  		v1.AddArg2(x, x)
  9676  		v0.AddArg2(a, v1)
  9677  		v.AddArg(v0)
  9678  		return true
  9679  	}
  9680  	// match: (MADDW a (MOVDconst [c]) x)
  9681  	// cond: int32(c)==-1
  9682  	// result: (MOVWUreg (SUB <a.Type> a x))
  9683  	for {
  9684  		a := v_0
  9685  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9686  			break
  9687  		}
  9688  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9689  		x := v_2
  9690  		if !(int32(c) == -1) {
  9691  			break
  9692  		}
  9693  		v.Reset(ssaop.OpARM64MOVWUreg)
  9694  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9695  		v0.AddArg2(a, x)
  9696  		v.AddArg(v0)
  9697  		return true
  9698  	}
  9699  	// match: (MADDW a (MOVDconst [c]) _)
  9700  	// cond: int32(c)==0
  9701  	// result: (MOVWUreg a)
  9702  	for {
  9703  		a := v_0
  9704  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9705  			break
  9706  		}
  9707  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9708  		if !(int32(c) == 0) {
  9709  			break
  9710  		}
  9711  		v.Reset(ssaop.OpARM64MOVWUreg)
  9712  		v.AddArg(a)
  9713  		return true
  9714  	}
  9715  	// match: (MADDW a (MOVDconst [c]) x)
  9716  	// cond: int32(c)==1
  9717  	// result: (MOVWUreg (ADD <a.Type> a x))
  9718  	for {
  9719  		a := v_0
  9720  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9721  			break
  9722  		}
  9723  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9724  		x := v_2
  9725  		if !(int32(c) == 1) {
  9726  			break
  9727  		}
  9728  		v.Reset(ssaop.OpARM64MOVWUreg)
  9729  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9730  		v0.AddArg2(a, x)
  9731  		v.AddArg(v0)
  9732  		return true
  9733  	}
  9734  	// match: (MADDW a (MOVDconst [c]) x)
  9735  	// cond: ssa.IsPowerOfTwo(c)
  9736  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [ssa.Log64(c)]))
  9737  	for {
  9738  		a := v_0
  9739  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9740  			break
  9741  		}
  9742  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9743  		x := v_2
  9744  		if !(ssa.IsPowerOfTwo(c)) {
  9745  			break
  9746  		}
  9747  		v.Reset(ssaop.OpARM64MOVWUreg)
  9748  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9749  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9750  		v0.AddArg2(a, x)
  9751  		v.AddArg(v0)
  9752  		return true
  9753  	}
  9754  	// match: (MADDW a (MOVDconst [c]) x)
  9755  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
  9756  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9757  	for {
  9758  		a := v_0
  9759  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9760  			break
  9761  		}
  9762  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9763  		x := v_2
  9764  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9765  			break
  9766  		}
  9767  		v.Reset(ssaop.OpARM64MOVWUreg)
  9768  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9769  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9770  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9771  		v1.AddArg2(x, x)
  9772  		v0.AddArg2(a, v1)
  9773  		v.AddArg(v0)
  9774  		return true
  9775  	}
  9776  	// match: (MADDW a (MOVDconst [c]) x)
  9777  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
  9778  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
  9779  	for {
  9780  		a := v_0
  9781  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9782  			break
  9783  		}
  9784  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9785  		x := v_2
  9786  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
  9787  			break
  9788  		}
  9789  		v.Reset(ssaop.OpARM64MOVWUreg)
  9790  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9791  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9792  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9793  		v1.AddArg2(x, x)
  9794  		v0.AddArg2(a, v1)
  9795  		v.AddArg(v0)
  9796  		return true
  9797  	}
  9798  	// match: (MADDW a (MOVDconst [c]) x)
  9799  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
  9800  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
  9801  	for {
  9802  		a := v_0
  9803  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9804  			break
  9805  		}
  9806  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9807  		x := v_2
  9808  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
  9809  			break
  9810  		}
  9811  		v.Reset(ssaop.OpARM64MOVWUreg)
  9812  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9813  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9814  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9815  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9816  		v1.AddArg2(x, x)
  9817  		v0.AddArg2(a, v1)
  9818  		v.AddArg(v0)
  9819  		return true
  9820  	}
  9821  	// match: (MADDW a (MOVDconst [c]) x)
  9822  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
  9823  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
  9824  	for {
  9825  		a := v_0
  9826  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9827  			break
  9828  		}
  9829  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9830  		x := v_2
  9831  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
  9832  			break
  9833  		}
  9834  		v.Reset(ssaop.OpARM64MOVWUreg)
  9835  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9836  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9837  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9838  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9839  		v1.AddArg2(x, x)
  9840  		v0.AddArg2(a, v1)
  9841  		v.AddArg(v0)
  9842  		return true
  9843  	}
  9844  	// match: (MADDW a (MOVDconst [c]) x)
  9845  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
  9846  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
  9847  	for {
  9848  		a := v_0
  9849  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9850  			break
  9851  		}
  9852  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9853  		x := v_2
  9854  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
  9855  			break
  9856  		}
  9857  		v.Reset(ssaop.OpARM64MOVWUreg)
  9858  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9859  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9860  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9861  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9862  		v1.AddArg2(x, x)
  9863  		v0.AddArg2(a, v1)
  9864  		v.AddArg(v0)
  9865  		return true
  9866  	}
  9867  	// match: (MADDW a (MOVDconst [c]) x)
  9868  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
  9869  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
  9870  	for {
  9871  		a := v_0
  9872  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9873  			break
  9874  		}
  9875  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9876  		x := v_2
  9877  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
  9878  			break
  9879  		}
  9880  		v.Reset(ssaop.OpARM64MOVWUreg)
  9881  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9882  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9883  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9884  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9885  		v1.AddArg2(x, x)
  9886  		v0.AddArg2(a, v1)
  9887  		v.AddArg(v0)
  9888  		return true
  9889  	}
  9890  	// match: (MADDW (MOVDconst [c]) x y)
  9891  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MULW <x.Type> x y)))
  9892  	for {
  9893  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9894  			break
  9895  		}
  9896  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9897  		x := v_1
  9898  		y := v_2
  9899  		v.Reset(ssaop.OpARM64MOVWUreg)
  9900  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, x.Type)
  9901  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  9902  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  9903  		v1.AddArg2(x, y)
  9904  		v0.AddArg(v1)
  9905  		v.AddArg(v0)
  9906  		return true
  9907  	}
  9908  	// match: (MADDW a (MOVDconst [c]) (MOVDconst [d]))
  9909  	// result: (MOVWUreg (ADDconst <a.Type> [c*d] a))
  9910  	for {
  9911  		a := v_0
  9912  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9913  			break
  9914  		}
  9915  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9916  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9917  			break
  9918  		}
  9919  		d := ssa.AuxIntToInt64(v_2.AuxInt)
  9920  		v.Reset(ssaop.OpARM64MOVWUreg)
  9921  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, a.Type)
  9922  		v0.AuxInt = ssa.Int64ToAuxInt(c * d)
  9923  		v0.AddArg(a)
  9924  		v.AddArg(v0)
  9925  		return true
  9926  	}
  9927  	return false
  9928  }
  9929  func rewriteValue_OpARM64MNEG(v *ssa.Value) bool {
  9930  	v_1 := v.Args[1]
  9931  	v_0 := v.Args[0]
  9932  	b := v.Block
  9933  	// match: (MNEG x (MOVDconst [-1]))
  9934  	// result: x
  9935  	for {
  9936  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9937  			x := v_0
  9938  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  9939  				continue
  9940  			}
  9941  			v.CopyOf(x)
  9942  			return true
  9943  		}
  9944  		break
  9945  	}
  9946  	// match: (MNEG _ (MOVDconst [0]))
  9947  	// result: (MOVDconst [0])
  9948  	for {
  9949  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9950  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  9951  				continue
  9952  			}
  9953  			v.Reset(ssaop.OpARM64MOVDconst)
  9954  			v.AuxInt = ssa.Int64ToAuxInt(0)
  9955  			return true
  9956  		}
  9957  		break
  9958  	}
  9959  	// match: (MNEG x (MOVDconst [1]))
  9960  	// result: (NEG x)
  9961  	for {
  9962  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9963  			x := v_0
  9964  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  9965  				continue
  9966  			}
  9967  			v.Reset(ssaop.OpARM64NEG)
  9968  			v.AddArg(x)
  9969  			return true
  9970  		}
  9971  		break
  9972  	}
  9973  	// match: (MNEG x (MOVDconst [c]))
  9974  	// cond: ssa.IsPowerOfTwo(c)
  9975  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c)] x))
  9976  	for {
  9977  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9978  			x := v_0
  9979  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9980  				continue
  9981  			}
  9982  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9983  			if !(ssa.IsPowerOfTwo(c)) {
  9984  				continue
  9985  			}
  9986  			v.Reset(ssaop.OpARM64NEG)
  9987  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9988  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9989  			v0.AddArg(x)
  9990  			v.AddArg(v0)
  9991  			return true
  9992  		}
  9993  		break
  9994  	}
  9995  	// match: (MNEG x (MOVDconst [c]))
  9996  	// cond: ssa.IsPowerOfTwo(c-1) && c >= 3
  9997  	// result: (NEG (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  9998  	for {
  9999  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10000  			x := v_0
 10001  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10002  				continue
 10003  			}
 10004  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10005  			if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 10006  				continue
 10007  			}
 10008  			v.Reset(ssaop.OpARM64NEG)
 10009  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10010  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 10011  			v0.AddArg2(x, x)
 10012  			v.AddArg(v0)
 10013  			return true
 10014  		}
 10015  		break
 10016  	}
 10017  	// match: (MNEG x (MOVDconst [c]))
 10018  	// cond: ssa.IsPowerOfTwo(c+1) && c >= 7
 10019  	// result: (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [ssa.Log64(c+1)]))
 10020  	for {
 10021  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10022  			x := v_0
 10023  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10024  				continue
 10025  			}
 10026  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10027  			if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 10028  				continue
 10029  			}
 10030  			v.Reset(ssaop.OpARM64NEG)
 10031  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10032  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 10033  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10034  			v1.AddArg(x)
 10035  			v0.AddArg2(v1, x)
 10036  			v.AddArg(v0)
 10037  			return true
 10038  		}
 10039  		break
 10040  	}
 10041  	// match: (MNEG x (MOVDconst [c]))
 10042  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 10043  	// result: (SLLconst <x.Type> [ssa.Log64(c/3)] (SUBshiftLL <x.Type> x x [2]))
 10044  	for {
 10045  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10046  			x := v_0
 10047  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10048  				continue
 10049  			}
 10050  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10051  			if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 10052  				continue
 10053  			}
 10054  			v.Reset(ssaop.OpARM64SLLconst)
 10055  			v.Type = x.Type
 10056  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 10057  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10058  			v0.AuxInt = ssa.Int64ToAuxInt(2)
 10059  			v0.AddArg2(x, x)
 10060  			v.AddArg(v0)
 10061  			return true
 10062  		}
 10063  		break
 10064  	}
 10065  	// match: (MNEG x (MOVDconst [c]))
 10066  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 10067  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c/5)] (ADDshiftLL <x.Type> x x [2])))
 10068  	for {
 10069  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10070  			x := v_0
 10071  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10072  				continue
 10073  			}
 10074  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10075  			if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 10076  				continue
 10077  			}
 10078  			v.Reset(ssaop.OpARM64NEG)
 10079  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10080  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 10081  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10082  			v1.AuxInt = ssa.Int64ToAuxInt(2)
 10083  			v1.AddArg2(x, x)
 10084  			v0.AddArg(v1)
 10085  			v.AddArg(v0)
 10086  			return true
 10087  		}
 10088  		break
 10089  	}
 10090  	// match: (MNEG x (MOVDconst [c]))
 10091  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 10092  	// result: (SLLconst <x.Type> [ssa.Log64(c/7)] (SUBshiftLL <x.Type> x x [3]))
 10093  	for {
 10094  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10095  			x := v_0
 10096  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10097  				continue
 10098  			}
 10099  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10100  			if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 10101  				continue
 10102  			}
 10103  			v.Reset(ssaop.OpARM64SLLconst)
 10104  			v.Type = x.Type
 10105  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 10106  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10107  			v0.AuxInt = ssa.Int64ToAuxInt(3)
 10108  			v0.AddArg2(x, x)
 10109  			v.AddArg(v0)
 10110  			return true
 10111  		}
 10112  		break
 10113  	}
 10114  	// match: (MNEG x (MOVDconst [c]))
 10115  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 10116  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c/9)] (ADDshiftLL <x.Type> x x [3])))
 10117  	for {
 10118  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10119  			x := v_0
 10120  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10121  				continue
 10122  			}
 10123  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10124  			if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 10125  				continue
 10126  			}
 10127  			v.Reset(ssaop.OpARM64NEG)
 10128  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10129  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 10130  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10131  			v1.AuxInt = ssa.Int64ToAuxInt(3)
 10132  			v1.AddArg2(x, x)
 10133  			v0.AddArg(v1)
 10134  			v.AddArg(v0)
 10135  			return true
 10136  		}
 10137  		break
 10138  	}
 10139  	// match: (MNEG (MOVDconst [c]) (MOVDconst [d]))
 10140  	// result: (MOVDconst [-c*d])
 10141  	for {
 10142  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10143  			if v_0.Op != ssaop.OpARM64MOVDconst {
 10144  				continue
 10145  			}
 10146  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 10147  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10148  				continue
 10149  			}
 10150  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 10151  			v.Reset(ssaop.OpARM64MOVDconst)
 10152  			v.AuxInt = ssa.Int64ToAuxInt(-c * d)
 10153  			return true
 10154  		}
 10155  		break
 10156  	}
 10157  	return false
 10158  }
 10159  func rewriteValue_OpARM64MNEGW(v *ssa.Value) bool {
 10160  	v_1 := v.Args[1]
 10161  	v_0 := v.Args[0]
 10162  	b := v.Block
 10163  	// match: (MNEGW x (MOVDconst [c]))
 10164  	// cond: int32(c)==-1
 10165  	// result: (MOVWUreg x)
 10166  	for {
 10167  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10168  			x := v_0
 10169  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10170  				continue
 10171  			}
 10172  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10173  			if !(int32(c) == -1) {
 10174  				continue
 10175  			}
 10176  			v.Reset(ssaop.OpARM64MOVWUreg)
 10177  			v.AddArg(x)
 10178  			return true
 10179  		}
 10180  		break
 10181  	}
 10182  	// match: (MNEGW _ (MOVDconst [c]))
 10183  	// cond: int32(c)==0
 10184  	// result: (MOVDconst [0])
 10185  	for {
 10186  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10187  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10188  				continue
 10189  			}
 10190  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10191  			if !(int32(c) == 0) {
 10192  				continue
 10193  			}
 10194  			v.Reset(ssaop.OpARM64MOVDconst)
 10195  			v.AuxInt = ssa.Int64ToAuxInt(0)
 10196  			return true
 10197  		}
 10198  		break
 10199  	}
 10200  	// match: (MNEGW x (MOVDconst [c]))
 10201  	// cond: int32(c)==1
 10202  	// result: (MOVWUreg (NEG <x.Type> x))
 10203  	for {
 10204  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10205  			x := v_0
 10206  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10207  				continue
 10208  			}
 10209  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10210  			if !(int32(c) == 1) {
 10211  				continue
 10212  			}
 10213  			v.Reset(ssaop.OpARM64MOVWUreg)
 10214  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10215  			v0.AddArg(x)
 10216  			v.AddArg(v0)
 10217  			return true
 10218  		}
 10219  		break
 10220  	}
 10221  	// match: (MNEGW x (MOVDconst [c]))
 10222  	// cond: ssa.IsPowerOfTwo(c)
 10223  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c)] x))
 10224  	for {
 10225  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10226  			x := v_0
 10227  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10228  				continue
 10229  			}
 10230  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10231  			if !(ssa.IsPowerOfTwo(c)) {
 10232  				continue
 10233  			}
 10234  			v.Reset(ssaop.OpARM64NEG)
 10235  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10236  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 10237  			v0.AddArg(x)
 10238  			v.AddArg(v0)
 10239  			return true
 10240  		}
 10241  		break
 10242  	}
 10243  	// match: (MNEGW x (MOVDconst [c]))
 10244  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c) >= 3
 10245  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 10246  	for {
 10247  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10248  			x := v_0
 10249  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10250  				continue
 10251  			}
 10252  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10253  			if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 10254  				continue
 10255  			}
 10256  			v.Reset(ssaop.OpARM64MOVWUreg)
 10257  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10258  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10259  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 10260  			v1.AddArg2(x, x)
 10261  			v0.AddArg(v1)
 10262  			v.AddArg(v0)
 10263  			return true
 10264  		}
 10265  		break
 10266  	}
 10267  	// match: (MNEGW x (MOVDconst [c]))
 10268  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c) >= 7
 10269  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> (NEG <x.Type> x) x [ssa.Log64(c+1)])))
 10270  	for {
 10271  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10272  			x := v_0
 10273  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10274  				continue
 10275  			}
 10276  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10277  			if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 10278  				continue
 10279  			}
 10280  			v.Reset(ssaop.OpARM64MOVWUreg)
 10281  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10282  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10283  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 10284  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10285  			v2.AddArg(x)
 10286  			v1.AddArg2(v2, x)
 10287  			v0.AddArg(v1)
 10288  			v.AddArg(v0)
 10289  			return true
 10290  		}
 10291  		break
 10292  	}
 10293  	// match: (MNEGW x (MOVDconst [c]))
 10294  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 10295  	// result: (MOVWUreg (SLLconst <x.Type> [ssa.Log64(c/3)] (SUBshiftLL <x.Type> x x [2])))
 10296  	for {
 10297  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10298  			x := v_0
 10299  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10300  				continue
 10301  			}
 10302  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10303  			if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 10304  				continue
 10305  			}
 10306  			v.Reset(ssaop.OpARM64MOVWUreg)
 10307  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10308  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 10309  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10310  			v1.AuxInt = ssa.Int64ToAuxInt(2)
 10311  			v1.AddArg2(x, x)
 10312  			v0.AddArg(v1)
 10313  			v.AddArg(v0)
 10314  			return true
 10315  		}
 10316  		break
 10317  	}
 10318  	// match: (MNEGW x (MOVDconst [c]))
 10319  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 10320  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [ssa.Log64(c/5)] (ADDshiftLL <x.Type> x x [2]))))
 10321  	for {
 10322  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10323  			x := v_0
 10324  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10325  				continue
 10326  			}
 10327  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10328  			if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 10329  				continue
 10330  			}
 10331  			v.Reset(ssaop.OpARM64MOVWUreg)
 10332  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10333  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10334  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 10335  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10336  			v2.AuxInt = ssa.Int64ToAuxInt(2)
 10337  			v2.AddArg2(x, x)
 10338  			v1.AddArg(v2)
 10339  			v0.AddArg(v1)
 10340  			v.AddArg(v0)
 10341  			return true
 10342  		}
 10343  		break
 10344  	}
 10345  	// match: (MNEGW x (MOVDconst [c]))
 10346  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 10347  	// result: (MOVWUreg (SLLconst <x.Type> [ssa.Log64(c/7)] (SUBshiftLL <x.Type> x x [3])))
 10348  	for {
 10349  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10350  			x := v_0
 10351  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10352  				continue
 10353  			}
 10354  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10355  			if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 10356  				continue
 10357  			}
 10358  			v.Reset(ssaop.OpARM64MOVWUreg)
 10359  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10360  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 10361  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10362  			v1.AuxInt = ssa.Int64ToAuxInt(3)
 10363  			v1.AddArg2(x, x)
 10364  			v0.AddArg(v1)
 10365  			v.AddArg(v0)
 10366  			return true
 10367  		}
 10368  		break
 10369  	}
 10370  	// match: (MNEGW x (MOVDconst [c]))
 10371  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 10372  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [ssa.Log64(c/9)] (ADDshiftLL <x.Type> x x [3]))))
 10373  	for {
 10374  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10375  			x := v_0
 10376  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10377  				continue
 10378  			}
 10379  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10380  			if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 10381  				continue
 10382  			}
 10383  			v.Reset(ssaop.OpARM64MOVWUreg)
 10384  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10385  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10386  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 10387  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10388  			v2.AuxInt = ssa.Int64ToAuxInt(3)
 10389  			v2.AddArg2(x, x)
 10390  			v1.AddArg(v2)
 10391  			v0.AddArg(v1)
 10392  			v.AddArg(v0)
 10393  			return true
 10394  		}
 10395  		break
 10396  	}
 10397  	// match: (MNEGW (MOVDconst [c]) (MOVDconst [d]))
 10398  	// result: (MOVDconst [int64(uint32(-c*d))])
 10399  	for {
 10400  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10401  			if v_0.Op != ssaop.OpARM64MOVDconst {
 10402  				continue
 10403  			}
 10404  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 10405  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10406  				continue
 10407  			}
 10408  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 10409  			v.Reset(ssaop.OpARM64MOVDconst)
 10410  			v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(-c * d)))
 10411  			return true
 10412  		}
 10413  		break
 10414  	}
 10415  	return false
 10416  }
 10417  func rewriteValue_OpARM64MOD(v *ssa.Value) bool {
 10418  	v_1 := v.Args[1]
 10419  	v_0 := v.Args[0]
 10420  	// match: (MOD (MOVDconst [c]) (MOVDconst [d]))
 10421  	// cond: d != 0
 10422  	// result: (MOVDconst [c%d])
 10423  	for {
 10424  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10425  			break
 10426  		}
 10427  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10428  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10429  			break
 10430  		}
 10431  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 10432  		if !(d != 0) {
 10433  			break
 10434  		}
 10435  		v.Reset(ssaop.OpARM64MOVDconst)
 10436  		v.AuxInt = ssa.Int64ToAuxInt(c % d)
 10437  		return true
 10438  	}
 10439  	return false
 10440  }
 10441  func rewriteValue_OpARM64MODW(v *ssa.Value) bool {
 10442  	v_1 := v.Args[1]
 10443  	v_0 := v.Args[0]
 10444  	// match: (MODW (MOVDconst [c]) (MOVDconst [d]))
 10445  	// cond: d != 0
 10446  	// result: (MOVDconst [int64(uint32(int32(c)%int32(d)))])
 10447  	for {
 10448  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10449  			break
 10450  		}
 10451  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10452  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10453  			break
 10454  		}
 10455  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 10456  		if !(d != 0) {
 10457  			break
 10458  		}
 10459  		v.Reset(ssaop.OpARM64MOVDconst)
 10460  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(int32(c) % int32(d))))
 10461  		return true
 10462  	}
 10463  	return false
 10464  }
 10465  func rewriteValue_OpARM64MOVBUload(v *ssa.Value) bool {
 10466  	v_1 := v.Args[1]
 10467  	v_0 := v.Args[0]
 10468  	b := v.Block
 10469  	config := b.Func.Config
 10470  	// match: (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem)
 10471  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10472  	// result: (MOVBUload [off1+int32(off2)] {sym} ptr mem)
 10473  	for {
 10474  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10475  		sym := ssa.AuxToSym(v.Aux)
 10476  		if v_0.Op != ssaop.OpARM64ADDconst {
 10477  			break
 10478  		}
 10479  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10480  		ptr := v_0.Args[0]
 10481  		mem := v_1
 10482  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10483  			break
 10484  		}
 10485  		v.Reset(ssaop.OpARM64MOVBUload)
 10486  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10487  		v.Aux = ssa.SymToAux(sym)
 10488  		v.AddArg2(ptr, mem)
 10489  		return true
 10490  	}
 10491  	// match: (MOVBUload [off] {sym} (ADD ptr idx) mem)
 10492  	// cond: off == 0 && sym == nil
 10493  	// result: (MOVBUloadidx ptr idx mem)
 10494  	for {
 10495  		off := ssa.AuxIntToInt32(v.AuxInt)
 10496  		sym := ssa.AuxToSym(v.Aux)
 10497  		if v_0.Op != ssaop.OpARM64ADD {
 10498  			break
 10499  		}
 10500  		idx := v_0.Args[1]
 10501  		ptr := v_0.Args[0]
 10502  		mem := v_1
 10503  		if !(off == 0 && sym == nil) {
 10504  			break
 10505  		}
 10506  		v.Reset(ssaop.OpARM64MOVBUloadidx)
 10507  		v.AddArg3(ptr, idx, mem)
 10508  		return true
 10509  	}
 10510  	// match: (MOVBUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10511  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10512  	// result: (MOVBUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10513  	for {
 10514  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10515  		sym1 := ssa.AuxToSym(v.Aux)
 10516  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10517  			break
 10518  		}
 10519  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10520  		sym2 := ssa.AuxToSym(v_0.Aux)
 10521  		ptr := v_0.Args[0]
 10522  		mem := v_1
 10523  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10524  			break
 10525  		}
 10526  		v.Reset(ssaop.OpARM64MOVBUload)
 10527  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10528  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10529  		v.AddArg2(ptr, mem)
 10530  		return true
 10531  	}
 10532  	// match: (MOVBUload [off] {sym} (SB) _)
 10533  	// cond: ssa.SymIsRO(sym)
 10534  	// result: (MOVDconst [int64(ssa.Read8(sym, int64(off)))])
 10535  	for {
 10536  		off := ssa.AuxIntToInt32(v.AuxInt)
 10537  		sym := ssa.AuxToSym(v.Aux)
 10538  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10539  			break
 10540  		}
 10541  		v.Reset(ssaop.OpARM64MOVDconst)
 10542  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read8(sym, int64(off))))
 10543  		return true
 10544  	}
 10545  	return false
 10546  }
 10547  func rewriteValue_OpARM64MOVBUloadidx(v *ssa.Value) bool {
 10548  	v_2 := v.Args[2]
 10549  	v_1 := v.Args[1]
 10550  	v_0 := v.Args[0]
 10551  	// match: (MOVBUloadidx ptr (MOVDconst [c]) mem)
 10552  	// cond: ssa.Is32Bit(c)
 10553  	// result: (MOVBUload [int32(c)] ptr mem)
 10554  	for {
 10555  		ptr := v_0
 10556  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10557  			break
 10558  		}
 10559  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10560  		mem := v_2
 10561  		if !(ssa.Is32Bit(c)) {
 10562  			break
 10563  		}
 10564  		v.Reset(ssaop.OpARM64MOVBUload)
 10565  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10566  		v.AddArg2(ptr, mem)
 10567  		return true
 10568  	}
 10569  	// match: (MOVBUloadidx (MOVDconst [c]) ptr mem)
 10570  	// cond: ssa.Is32Bit(c)
 10571  	// result: (MOVBUload [int32(c)] ptr mem)
 10572  	for {
 10573  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10574  			break
 10575  		}
 10576  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10577  		ptr := v_1
 10578  		mem := v_2
 10579  		if !(ssa.Is32Bit(c)) {
 10580  			break
 10581  		}
 10582  		v.Reset(ssaop.OpARM64MOVBUload)
 10583  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10584  		v.AddArg2(ptr, mem)
 10585  		return true
 10586  	}
 10587  	return false
 10588  }
 10589  func rewriteValue_OpARM64MOVBUreg(v *ssa.Value) bool {
 10590  	v_0 := v.Args[0]
 10591  	// match: (MOVBUreg (ANDconst [c] x))
 10592  	// result: (ANDconst [c&(1<<8-1)] x)
 10593  	for {
 10594  		if v_0.Op != ssaop.OpARM64ANDconst {
 10595  			break
 10596  		}
 10597  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10598  		x := v_0.Args[0]
 10599  		v.Reset(ssaop.OpARM64ANDconst)
 10600  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<8 - 1))
 10601  		v.AddArg(x)
 10602  		return true
 10603  	}
 10604  	// match: (MOVBUreg (MOVDconst [c]))
 10605  	// result: (MOVDconst [int64(uint8(c))])
 10606  	for {
 10607  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10608  			break
 10609  		}
 10610  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10611  		v.Reset(ssaop.OpARM64MOVDconst)
 10612  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint8(c)))
 10613  		return true
 10614  	}
 10615  	// match: (MOVBUreg x)
 10616  	// cond: v.Type.Size() <= 1
 10617  	// result: x
 10618  	for {
 10619  		x := v_0
 10620  		if !(v.Type.Size() <= 1) {
 10621  			break
 10622  		}
 10623  		v.CopyOf(x)
 10624  		return true
 10625  	}
 10626  	// match: (MOVBUreg (SLLconst [lc] x))
 10627  	// cond: lc >= 8
 10628  	// result: (MOVDconst [0])
 10629  	for {
 10630  		if v_0.Op != ssaop.OpARM64SLLconst {
 10631  			break
 10632  		}
 10633  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10634  		if !(lc >= 8) {
 10635  			break
 10636  		}
 10637  		v.Reset(ssaop.OpARM64MOVDconst)
 10638  		v.AuxInt = ssa.Int64ToAuxInt(0)
 10639  		return true
 10640  	}
 10641  	// match: (MOVBUreg (SLLconst [lc] x))
 10642  	// cond: lc < 8
 10643  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 8-lc)] x)
 10644  	for {
 10645  		if v_0.Op != ssaop.OpARM64SLLconst {
 10646  			break
 10647  		}
 10648  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10649  		x := v_0.Args[0]
 10650  		if !(lc < 8) {
 10651  			break
 10652  		}
 10653  		v.Reset(ssaop.OpARM64UBFIZ)
 10654  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 8-lc))
 10655  		v.AddArg(x)
 10656  		return true
 10657  	}
 10658  	// match: (MOVBUreg (SRLconst [rc] x))
 10659  	// cond: rc < 8
 10660  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 8)] x)
 10661  	for {
 10662  		if v_0.Op != ssaop.OpARM64SRLconst {
 10663  			break
 10664  		}
 10665  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 10666  		x := v_0.Args[0]
 10667  		if !(rc < 8) {
 10668  			break
 10669  		}
 10670  		v.Reset(ssaop.OpARM64UBFX)
 10671  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8))
 10672  		v.AddArg(x)
 10673  		return true
 10674  	}
 10675  	// match: (MOVBUreg (UBFX [bfc] x))
 10676  	// cond: bfc.Width() <= 8
 10677  	// result: (UBFX [bfc] x)
 10678  	for {
 10679  		if v_0.Op != ssaop.OpARM64UBFX {
 10680  			break
 10681  		}
 10682  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 10683  		x := v_0.Args[0]
 10684  		if !(bfc.Width() <= 8) {
 10685  			break
 10686  		}
 10687  		v.Reset(ssaop.OpARM64UBFX)
 10688  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 10689  		v.AddArg(x)
 10690  		return true
 10691  	}
 10692  	return false
 10693  }
 10694  func rewriteValue_OpARM64MOVBload(v *ssa.Value) bool {
 10695  	v_1 := v.Args[1]
 10696  	v_0 := v.Args[0]
 10697  	b := v.Block
 10698  	config := b.Func.Config
 10699  	// match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem)
 10700  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10701  	// result: (MOVBload [off1+int32(off2)] {sym} ptr mem)
 10702  	for {
 10703  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10704  		sym := ssa.AuxToSym(v.Aux)
 10705  		if v_0.Op != ssaop.OpARM64ADDconst {
 10706  			break
 10707  		}
 10708  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10709  		ptr := v_0.Args[0]
 10710  		mem := v_1
 10711  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10712  			break
 10713  		}
 10714  		v.Reset(ssaop.OpARM64MOVBload)
 10715  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10716  		v.Aux = ssa.SymToAux(sym)
 10717  		v.AddArg2(ptr, mem)
 10718  		return true
 10719  	}
 10720  	// match: (MOVBload [off] {sym} (ADD ptr idx) mem)
 10721  	// cond: off == 0 && sym == nil
 10722  	// result: (MOVBloadidx ptr idx mem)
 10723  	for {
 10724  		off := ssa.AuxIntToInt32(v.AuxInt)
 10725  		sym := ssa.AuxToSym(v.Aux)
 10726  		if v_0.Op != ssaop.OpARM64ADD {
 10727  			break
 10728  		}
 10729  		idx := v_0.Args[1]
 10730  		ptr := v_0.Args[0]
 10731  		mem := v_1
 10732  		if !(off == 0 && sym == nil) {
 10733  			break
 10734  		}
 10735  		v.Reset(ssaop.OpARM64MOVBloadidx)
 10736  		v.AddArg3(ptr, idx, mem)
 10737  		return true
 10738  	}
 10739  	// match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10740  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10741  	// result: (MOVBload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10742  	for {
 10743  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10744  		sym1 := ssa.AuxToSym(v.Aux)
 10745  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10746  			break
 10747  		}
 10748  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10749  		sym2 := ssa.AuxToSym(v_0.Aux)
 10750  		ptr := v_0.Args[0]
 10751  		mem := v_1
 10752  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10753  			break
 10754  		}
 10755  		v.Reset(ssaop.OpARM64MOVBload)
 10756  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10757  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10758  		v.AddArg2(ptr, mem)
 10759  		return true
 10760  	}
 10761  	// match: (MOVBload [off] {sym} (SB) _)
 10762  	// cond: ssa.SymIsRO(sym)
 10763  	// result: (MOVDconst [int64(int8(ssa.Read8(sym, int64(off))))])
 10764  	for {
 10765  		off := ssa.AuxIntToInt32(v.AuxInt)
 10766  		sym := ssa.AuxToSym(v.Aux)
 10767  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10768  			break
 10769  		}
 10770  		v.Reset(ssaop.OpARM64MOVDconst)
 10771  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(ssa.Read8(sym, int64(off)))))
 10772  		return true
 10773  	}
 10774  	return false
 10775  }
 10776  func rewriteValue_OpARM64MOVBloadidx(v *ssa.Value) bool {
 10777  	v_2 := v.Args[2]
 10778  	v_1 := v.Args[1]
 10779  	v_0 := v.Args[0]
 10780  	// match: (MOVBloadidx ptr (MOVDconst [c]) mem)
 10781  	// cond: ssa.Is32Bit(c)
 10782  	// result: (MOVBload [int32(c)] ptr mem)
 10783  	for {
 10784  		ptr := v_0
 10785  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10786  			break
 10787  		}
 10788  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10789  		mem := v_2
 10790  		if !(ssa.Is32Bit(c)) {
 10791  			break
 10792  		}
 10793  		v.Reset(ssaop.OpARM64MOVBload)
 10794  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10795  		v.AddArg2(ptr, mem)
 10796  		return true
 10797  	}
 10798  	// match: (MOVBloadidx (MOVDconst [c]) ptr mem)
 10799  	// cond: ssa.Is32Bit(c)
 10800  	// result: (MOVBload [int32(c)] ptr mem)
 10801  	for {
 10802  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10803  			break
 10804  		}
 10805  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10806  		ptr := v_1
 10807  		mem := v_2
 10808  		if !(ssa.Is32Bit(c)) {
 10809  			break
 10810  		}
 10811  		v.Reset(ssaop.OpARM64MOVBload)
 10812  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10813  		v.AddArg2(ptr, mem)
 10814  		return true
 10815  	}
 10816  	return false
 10817  }
 10818  func rewriteValue_OpARM64MOVBreg(v *ssa.Value) bool {
 10819  	v_0 := v.Args[0]
 10820  	// match: (MOVBreg (MOVDconst [c]))
 10821  	// result: (MOVDconst [int64(int8(c))])
 10822  	for {
 10823  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10824  			break
 10825  		}
 10826  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10827  		v.Reset(ssaop.OpARM64MOVDconst)
 10828  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(c)))
 10829  		return true
 10830  	}
 10831  	// match: (MOVBreg x)
 10832  	// cond: v.Type.Size() <= 1
 10833  	// result: x
 10834  	for {
 10835  		x := v_0
 10836  		if !(v.Type.Size() <= 1) {
 10837  			break
 10838  		}
 10839  		v.CopyOf(x)
 10840  		return true
 10841  	}
 10842  	// match: (MOVBreg <t> (ANDconst x [c]))
 10843  	// cond: uint64(c) & uint64(0xffffffffffffff80) == 0
 10844  	// result: (ANDconst <t> x [c])
 10845  	for {
 10846  		t := v.Type
 10847  		if v_0.Op != ssaop.OpARM64ANDconst {
 10848  			break
 10849  		}
 10850  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10851  		x := v_0.Args[0]
 10852  		if !(uint64(c)&uint64(0xffffffffffffff80) == 0) {
 10853  			break
 10854  		}
 10855  		v.Reset(ssaop.OpARM64ANDconst)
 10856  		v.Type = t
 10857  		v.AuxInt = ssa.Int64ToAuxInt(c)
 10858  		v.AddArg(x)
 10859  		return true
 10860  	}
 10861  	// match: (MOVBreg (SLLconst [lc] x))
 10862  	// cond: lc < 8
 10863  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 8-lc)] x)
 10864  	for {
 10865  		if v_0.Op != ssaop.OpARM64SLLconst {
 10866  			break
 10867  		}
 10868  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10869  		x := v_0.Args[0]
 10870  		if !(lc < 8) {
 10871  			break
 10872  		}
 10873  		v.Reset(ssaop.OpARM64SBFIZ)
 10874  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 8-lc))
 10875  		v.AddArg(x)
 10876  		return true
 10877  	}
 10878  	// match: (MOVBreg (SBFX [bfc] x))
 10879  	// cond: bfc.Width() <= 8
 10880  	// result: (SBFX [bfc] x)
 10881  	for {
 10882  		if v_0.Op != ssaop.OpARM64SBFX {
 10883  			break
 10884  		}
 10885  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 10886  		x := v_0.Args[0]
 10887  		if !(bfc.Width() <= 8) {
 10888  			break
 10889  		}
 10890  		v.Reset(ssaop.OpARM64SBFX)
 10891  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 10892  		v.AddArg(x)
 10893  		return true
 10894  	}
 10895  	return false
 10896  }
 10897  func rewriteValue_OpARM64MOVBstore(v *ssa.Value) bool {
 10898  	v_2 := v.Args[2]
 10899  	v_1 := v.Args[1]
 10900  	v_0 := v.Args[0]
 10901  	b := v.Block
 10902  	config := b.Func.Config
 10903  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 10904  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10905  	// result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem)
 10906  	for {
 10907  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10908  		sym := ssa.AuxToSym(v.Aux)
 10909  		if v_0.Op != ssaop.OpARM64ADDconst {
 10910  			break
 10911  		}
 10912  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10913  		ptr := v_0.Args[0]
 10914  		val := v_1
 10915  		mem := v_2
 10916  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10917  			break
 10918  		}
 10919  		v.Reset(ssaop.OpARM64MOVBstore)
 10920  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10921  		v.Aux = ssa.SymToAux(sym)
 10922  		v.AddArg3(ptr, val, mem)
 10923  		return true
 10924  	}
 10925  	// match: (MOVBstore [off] {sym} (ADD ptr idx) val mem)
 10926  	// cond: off == 0 && sym == nil
 10927  	// result: (MOVBstoreidx ptr idx val mem)
 10928  	for {
 10929  		off := ssa.AuxIntToInt32(v.AuxInt)
 10930  		sym := ssa.AuxToSym(v.Aux)
 10931  		if v_0.Op != ssaop.OpARM64ADD {
 10932  			break
 10933  		}
 10934  		idx := v_0.Args[1]
 10935  		ptr := v_0.Args[0]
 10936  		val := v_1
 10937  		mem := v_2
 10938  		if !(off == 0 && sym == nil) {
 10939  			break
 10940  		}
 10941  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10942  		v.AddArg4(ptr, idx, val, mem)
 10943  		return true
 10944  	}
 10945  	// match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 10946  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10947  	// result: (MOVBstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 10948  	for {
 10949  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10950  		sym1 := ssa.AuxToSym(v.Aux)
 10951  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10952  			break
 10953  		}
 10954  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10955  		sym2 := ssa.AuxToSym(v_0.Aux)
 10956  		ptr := v_0.Args[0]
 10957  		val := v_1
 10958  		mem := v_2
 10959  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10960  			break
 10961  		}
 10962  		v.Reset(ssaop.OpARM64MOVBstore)
 10963  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10964  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10965  		v.AddArg3(ptr, val, mem)
 10966  		return true
 10967  	}
 10968  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
 10969  	// result: (MOVBstore [off] {sym} ptr x mem)
 10970  	for {
 10971  		off := ssa.AuxIntToInt32(v.AuxInt)
 10972  		sym := ssa.AuxToSym(v.Aux)
 10973  		ptr := v_0
 10974  		if v_1.Op != ssaop.OpARM64MOVBreg {
 10975  			break
 10976  		}
 10977  		x := v_1.Args[0]
 10978  		mem := v_2
 10979  		v.Reset(ssaop.OpARM64MOVBstore)
 10980  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10981  		v.Aux = ssa.SymToAux(sym)
 10982  		v.AddArg3(ptr, x, mem)
 10983  		return true
 10984  	}
 10985  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
 10986  	// result: (MOVBstore [off] {sym} ptr x mem)
 10987  	for {
 10988  		off := ssa.AuxIntToInt32(v.AuxInt)
 10989  		sym := ssa.AuxToSym(v.Aux)
 10990  		ptr := v_0
 10991  		if v_1.Op != ssaop.OpARM64MOVBUreg {
 10992  			break
 10993  		}
 10994  		x := v_1.Args[0]
 10995  		mem := v_2
 10996  		v.Reset(ssaop.OpARM64MOVBstore)
 10997  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10998  		v.Aux = ssa.SymToAux(sym)
 10999  		v.AddArg3(ptr, x, mem)
 11000  		return true
 11001  	}
 11002  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
 11003  	// result: (MOVBstore [off] {sym} ptr x mem)
 11004  	for {
 11005  		off := ssa.AuxIntToInt32(v.AuxInt)
 11006  		sym := ssa.AuxToSym(v.Aux)
 11007  		ptr := v_0
 11008  		if v_1.Op != ssaop.OpARM64MOVHreg {
 11009  			break
 11010  		}
 11011  		x := v_1.Args[0]
 11012  		mem := v_2
 11013  		v.Reset(ssaop.OpARM64MOVBstore)
 11014  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11015  		v.Aux = ssa.SymToAux(sym)
 11016  		v.AddArg3(ptr, x, mem)
 11017  		return true
 11018  	}
 11019  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
 11020  	// result: (MOVBstore [off] {sym} ptr x mem)
 11021  	for {
 11022  		off := ssa.AuxIntToInt32(v.AuxInt)
 11023  		sym := ssa.AuxToSym(v.Aux)
 11024  		ptr := v_0
 11025  		if v_1.Op != ssaop.OpARM64MOVHUreg {
 11026  			break
 11027  		}
 11028  		x := v_1.Args[0]
 11029  		mem := v_2
 11030  		v.Reset(ssaop.OpARM64MOVBstore)
 11031  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11032  		v.Aux = ssa.SymToAux(sym)
 11033  		v.AddArg3(ptr, x, mem)
 11034  		return true
 11035  	}
 11036  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
 11037  	// result: (MOVBstore [off] {sym} ptr x mem)
 11038  	for {
 11039  		off := ssa.AuxIntToInt32(v.AuxInt)
 11040  		sym := ssa.AuxToSym(v.Aux)
 11041  		ptr := v_0
 11042  		if v_1.Op != ssaop.OpARM64MOVWreg {
 11043  			break
 11044  		}
 11045  		x := v_1.Args[0]
 11046  		mem := v_2
 11047  		v.Reset(ssaop.OpARM64MOVBstore)
 11048  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11049  		v.Aux = ssa.SymToAux(sym)
 11050  		v.AddArg3(ptr, x, mem)
 11051  		return true
 11052  	}
 11053  	// match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem)
 11054  	// result: (MOVBstore [off] {sym} ptr x mem)
 11055  	for {
 11056  		off := ssa.AuxIntToInt32(v.AuxInt)
 11057  		sym := ssa.AuxToSym(v.Aux)
 11058  		ptr := v_0
 11059  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 11060  			break
 11061  		}
 11062  		x := v_1.Args[0]
 11063  		mem := v_2
 11064  		v.Reset(ssaop.OpARM64MOVBstore)
 11065  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11066  		v.Aux = ssa.SymToAux(sym)
 11067  		v.AddArg3(ptr, x, mem)
 11068  		return true
 11069  	}
 11070  	return false
 11071  }
 11072  func rewriteValue_OpARM64MOVBstoreidx(v *ssa.Value) bool {
 11073  	v_3 := v.Args[3]
 11074  	v_2 := v.Args[2]
 11075  	v_1 := v.Args[1]
 11076  	v_0 := v.Args[0]
 11077  	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
 11078  	// cond: ssa.Is32Bit(c)
 11079  	// result: (MOVBstore [int32(c)] ptr val mem)
 11080  	for {
 11081  		ptr := v_0
 11082  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11083  			break
 11084  		}
 11085  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11086  		val := v_2
 11087  		mem := v_3
 11088  		if !(ssa.Is32Bit(c)) {
 11089  			break
 11090  		}
 11091  		v.Reset(ssaop.OpARM64MOVBstore)
 11092  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11093  		v.AddArg3(ptr, val, mem)
 11094  		return true
 11095  	}
 11096  	// match: (MOVBstoreidx (MOVDconst [c]) idx val mem)
 11097  	// cond: ssa.Is32Bit(c)
 11098  	// result: (MOVBstore [int32(c)] idx val mem)
 11099  	for {
 11100  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11101  			break
 11102  		}
 11103  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11104  		idx := v_1
 11105  		val := v_2
 11106  		mem := v_3
 11107  		if !(ssa.Is32Bit(c)) {
 11108  			break
 11109  		}
 11110  		v.Reset(ssaop.OpARM64MOVBstore)
 11111  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11112  		v.AddArg3(idx, val, mem)
 11113  		return true
 11114  	}
 11115  	// match: (MOVBstoreidx ptr idx (MOVBreg x) mem)
 11116  	// result: (MOVBstoreidx ptr idx x mem)
 11117  	for {
 11118  		ptr := v_0
 11119  		idx := v_1
 11120  		if v_2.Op != ssaop.OpARM64MOVBreg {
 11121  			break
 11122  		}
 11123  		x := v_2.Args[0]
 11124  		mem := v_3
 11125  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11126  		v.AddArg4(ptr, idx, x, mem)
 11127  		return true
 11128  	}
 11129  	// match: (MOVBstoreidx ptr idx (MOVBUreg x) mem)
 11130  	// result: (MOVBstoreidx ptr idx x mem)
 11131  	for {
 11132  		ptr := v_0
 11133  		idx := v_1
 11134  		if v_2.Op != ssaop.OpARM64MOVBUreg {
 11135  			break
 11136  		}
 11137  		x := v_2.Args[0]
 11138  		mem := v_3
 11139  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11140  		v.AddArg4(ptr, idx, x, mem)
 11141  		return true
 11142  	}
 11143  	// match: (MOVBstoreidx ptr idx (MOVHreg x) mem)
 11144  	// result: (MOVBstoreidx ptr idx x mem)
 11145  	for {
 11146  		ptr := v_0
 11147  		idx := v_1
 11148  		if v_2.Op != ssaop.OpARM64MOVHreg {
 11149  			break
 11150  		}
 11151  		x := v_2.Args[0]
 11152  		mem := v_3
 11153  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11154  		v.AddArg4(ptr, idx, x, mem)
 11155  		return true
 11156  	}
 11157  	// match: (MOVBstoreidx ptr idx (MOVHUreg x) mem)
 11158  	// result: (MOVBstoreidx ptr idx x mem)
 11159  	for {
 11160  		ptr := v_0
 11161  		idx := v_1
 11162  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 11163  			break
 11164  		}
 11165  		x := v_2.Args[0]
 11166  		mem := v_3
 11167  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11168  		v.AddArg4(ptr, idx, x, mem)
 11169  		return true
 11170  	}
 11171  	// match: (MOVBstoreidx ptr idx (MOVWreg x) mem)
 11172  	// result: (MOVBstoreidx ptr idx x mem)
 11173  	for {
 11174  		ptr := v_0
 11175  		idx := v_1
 11176  		if v_2.Op != ssaop.OpARM64MOVWreg {
 11177  			break
 11178  		}
 11179  		x := v_2.Args[0]
 11180  		mem := v_3
 11181  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11182  		v.AddArg4(ptr, idx, x, mem)
 11183  		return true
 11184  	}
 11185  	// match: (MOVBstoreidx ptr idx (MOVWUreg x) mem)
 11186  	// result: (MOVBstoreidx ptr idx x mem)
 11187  	for {
 11188  		ptr := v_0
 11189  		idx := v_1
 11190  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 11191  			break
 11192  		}
 11193  		x := v_2.Args[0]
 11194  		mem := v_3
 11195  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11196  		v.AddArg4(ptr, idx, x, mem)
 11197  		return true
 11198  	}
 11199  	return false
 11200  }
 11201  func rewriteValue_OpARM64MOVDload(v *ssa.Value) bool {
 11202  	v_1 := v.Args[1]
 11203  	v_0 := v.Args[0]
 11204  	b := v.Block
 11205  	config := b.Func.Config
 11206  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr val _))
 11207  	// result: (FMOVDfpgp val)
 11208  	for {
 11209  		off := ssa.AuxIntToInt32(v.AuxInt)
 11210  		sym := ssa.AuxToSym(v.Aux)
 11211  		ptr := v_0
 11212  		if v_1.Op != ssaop.OpARM64FMOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
 11213  			break
 11214  		}
 11215  		val := v_1.Args[1]
 11216  		if ptr != v_1.Args[0] {
 11217  			break
 11218  		}
 11219  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 11220  		v.AddArg(val)
 11221  		return true
 11222  	}
 11223  	// match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
 11224  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11225  	// result: (MOVDload [off1+int32(off2)] {sym} ptr mem)
 11226  	for {
 11227  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11228  		sym := ssa.AuxToSym(v.Aux)
 11229  		if v_0.Op != ssaop.OpARM64ADDconst {
 11230  			break
 11231  		}
 11232  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11233  		ptr := v_0.Args[0]
 11234  		mem := v_1
 11235  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11236  			break
 11237  		}
 11238  		v.Reset(ssaop.OpARM64MOVDload)
 11239  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11240  		v.Aux = ssa.SymToAux(sym)
 11241  		v.AddArg2(ptr, mem)
 11242  		return true
 11243  	}
 11244  	// match: (MOVDload [off] {sym} (ADD ptr idx) mem)
 11245  	// cond: off == 0 && sym == nil
 11246  	// result: (MOVDloadidx ptr idx mem)
 11247  	for {
 11248  		off := ssa.AuxIntToInt32(v.AuxInt)
 11249  		sym := ssa.AuxToSym(v.Aux)
 11250  		if v_0.Op != ssaop.OpARM64ADD {
 11251  			break
 11252  		}
 11253  		idx := v_0.Args[1]
 11254  		ptr := v_0.Args[0]
 11255  		mem := v_1
 11256  		if !(off == 0 && sym == nil) {
 11257  			break
 11258  		}
 11259  		v.Reset(ssaop.OpARM64MOVDloadidx)
 11260  		v.AddArg3(ptr, idx, mem)
 11261  		return true
 11262  	}
 11263  	// match: (MOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
 11264  	// cond: off == 0 && sym == nil
 11265  	// result: (MOVDloadidx8 ptr idx mem)
 11266  	for {
 11267  		off := ssa.AuxIntToInt32(v.AuxInt)
 11268  		sym := ssa.AuxToSym(v.Aux)
 11269  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11270  			break
 11271  		}
 11272  		idx := v_0.Args[1]
 11273  		ptr := v_0.Args[0]
 11274  		mem := v_1
 11275  		if !(off == 0 && sym == nil) {
 11276  			break
 11277  		}
 11278  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 11279  		v.AddArg3(ptr, idx, mem)
 11280  		return true
 11281  	}
 11282  	// match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11283  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11284  	// result: (MOVDload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 11285  	for {
 11286  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11287  		sym1 := ssa.AuxToSym(v.Aux)
 11288  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11289  			break
 11290  		}
 11291  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11292  		sym2 := ssa.AuxToSym(v_0.Aux)
 11293  		ptr := v_0.Args[0]
 11294  		mem := v_1
 11295  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11296  			break
 11297  		}
 11298  		v.Reset(ssaop.OpARM64MOVDload)
 11299  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11300  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11301  		v.AddArg2(ptr, mem)
 11302  		return true
 11303  	}
 11304  	// match: (MOVDload [off] {sym} (SB) _)
 11305  	// cond: ssa.SymIsRO(sym)
 11306  	// result: (MOVDconst [int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 11307  	for {
 11308  		off := ssa.AuxIntToInt32(v.AuxInt)
 11309  		sym := ssa.AuxToSym(v.Aux)
 11310  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 11311  			break
 11312  		}
 11313  		v.Reset(ssaop.OpARM64MOVDconst)
 11314  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 11315  		return true
 11316  	}
 11317  	return false
 11318  }
 11319  func rewriteValue_OpARM64MOVDloadidx(v *ssa.Value) bool {
 11320  	v_2 := v.Args[2]
 11321  	v_1 := v.Args[1]
 11322  	v_0 := v.Args[0]
 11323  	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
 11324  	// cond: ssa.Is32Bit(c)
 11325  	// result: (MOVDload [int32(c)] ptr mem)
 11326  	for {
 11327  		ptr := v_0
 11328  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11329  			break
 11330  		}
 11331  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11332  		mem := v_2
 11333  		if !(ssa.Is32Bit(c)) {
 11334  			break
 11335  		}
 11336  		v.Reset(ssaop.OpARM64MOVDload)
 11337  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11338  		v.AddArg2(ptr, mem)
 11339  		return true
 11340  	}
 11341  	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
 11342  	// cond: ssa.Is32Bit(c)
 11343  	// result: (MOVDload [int32(c)] ptr mem)
 11344  	for {
 11345  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11346  			break
 11347  		}
 11348  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11349  		ptr := v_1
 11350  		mem := v_2
 11351  		if !(ssa.Is32Bit(c)) {
 11352  			break
 11353  		}
 11354  		v.Reset(ssaop.OpARM64MOVDload)
 11355  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11356  		v.AddArg2(ptr, mem)
 11357  		return true
 11358  	}
 11359  	// match: (MOVDloadidx ptr (SLLconst [3] idx) mem)
 11360  	// result: (MOVDloadidx8 ptr idx mem)
 11361  	for {
 11362  		ptr := v_0
 11363  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
 11364  			break
 11365  		}
 11366  		idx := v_1.Args[0]
 11367  		mem := v_2
 11368  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 11369  		v.AddArg3(ptr, idx, mem)
 11370  		return true
 11371  	}
 11372  	// match: (MOVDloadidx (SLLconst [3] idx) ptr mem)
 11373  	// result: (MOVDloadidx8 ptr idx mem)
 11374  	for {
 11375  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11376  			break
 11377  		}
 11378  		idx := v_0.Args[0]
 11379  		ptr := v_1
 11380  		mem := v_2
 11381  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 11382  		v.AddArg3(ptr, idx, mem)
 11383  		return true
 11384  	}
 11385  	return false
 11386  }
 11387  func rewriteValue_OpARM64MOVDloadidx8(v *ssa.Value) bool {
 11388  	v_2 := v.Args[2]
 11389  	v_1 := v.Args[1]
 11390  	v_0 := v.Args[0]
 11391  	// match: (MOVDloadidx8 ptr (MOVDconst [c]) mem)
 11392  	// cond: ssa.Is32Bit(c<<3)
 11393  	// result: (MOVDload [int32(c)<<3] ptr mem)
 11394  	for {
 11395  		ptr := v_0
 11396  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11397  			break
 11398  		}
 11399  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11400  		mem := v_2
 11401  		if !(ssa.Is32Bit(c << 3)) {
 11402  			break
 11403  		}
 11404  		v.Reset(ssaop.OpARM64MOVDload)
 11405  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
 11406  		v.AddArg2(ptr, mem)
 11407  		return true
 11408  	}
 11409  	return false
 11410  }
 11411  func rewriteValue_OpARM64MOVDnop(v *ssa.Value) bool {
 11412  	v_0 := v.Args[0]
 11413  	// match: (MOVDnop (MOVDconst [c]))
 11414  	// result: (MOVDconst [c])
 11415  	for {
 11416  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11417  			break
 11418  		}
 11419  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11420  		v.Reset(ssaop.OpARM64MOVDconst)
 11421  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11422  		return true
 11423  	}
 11424  	return false
 11425  }
 11426  func rewriteValue_OpARM64MOVDreg(v *ssa.Value) bool {
 11427  	v_0 := v.Args[0]
 11428  	// match: (MOVDreg x)
 11429  	// cond: x.Uses == 1
 11430  	// result: (MOVDnop x)
 11431  	for {
 11432  		x := v_0
 11433  		if !(x.Uses == 1) {
 11434  			break
 11435  		}
 11436  		v.Reset(ssaop.OpARM64MOVDnop)
 11437  		v.AddArg(x)
 11438  		return true
 11439  	}
 11440  	// match: (MOVDreg (MOVDconst [c]))
 11441  	// result: (MOVDconst [c])
 11442  	for {
 11443  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11444  			break
 11445  		}
 11446  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11447  		v.Reset(ssaop.OpARM64MOVDconst)
 11448  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11449  		return true
 11450  	}
 11451  	return false
 11452  }
 11453  func rewriteValue_OpARM64MOVDstore(v *ssa.Value) bool {
 11454  	v_2 := v.Args[2]
 11455  	v_1 := v.Args[1]
 11456  	v_0 := v.Args[0]
 11457  	b := v.Block
 11458  	config := b.Func.Config
 11459  	// match: (MOVDstore [off] {sym} ptr (FMOVDfpgp val) mem)
 11460  	// result: (FMOVDstore [off] {sym} ptr val mem)
 11461  	for {
 11462  		off := ssa.AuxIntToInt32(v.AuxInt)
 11463  		sym := ssa.AuxToSym(v.Aux)
 11464  		ptr := v_0
 11465  		if v_1.Op != ssaop.OpARM64FMOVDfpgp {
 11466  			break
 11467  		}
 11468  		val := v_1.Args[0]
 11469  		mem := v_2
 11470  		v.Reset(ssaop.OpARM64FMOVDstore)
 11471  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11472  		v.Aux = ssa.SymToAux(sym)
 11473  		v.AddArg3(ptr, val, mem)
 11474  		return true
 11475  	}
 11476  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 11477  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11478  	// result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem)
 11479  	for {
 11480  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11481  		sym := ssa.AuxToSym(v.Aux)
 11482  		if v_0.Op != ssaop.OpARM64ADDconst {
 11483  			break
 11484  		}
 11485  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11486  		ptr := v_0.Args[0]
 11487  		val := v_1
 11488  		mem := v_2
 11489  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11490  			break
 11491  		}
 11492  		v.Reset(ssaop.OpARM64MOVDstore)
 11493  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11494  		v.Aux = ssa.SymToAux(sym)
 11495  		v.AddArg3(ptr, val, mem)
 11496  		return true
 11497  	}
 11498  	// match: (MOVDstore [off] {sym} (ADD ptr idx) val mem)
 11499  	// cond: off == 0 && sym == nil
 11500  	// result: (MOVDstoreidx ptr idx val mem)
 11501  	for {
 11502  		off := ssa.AuxIntToInt32(v.AuxInt)
 11503  		sym := ssa.AuxToSym(v.Aux)
 11504  		if v_0.Op != ssaop.OpARM64ADD {
 11505  			break
 11506  		}
 11507  		idx := v_0.Args[1]
 11508  		ptr := v_0.Args[0]
 11509  		val := v_1
 11510  		mem := v_2
 11511  		if !(off == 0 && sym == nil) {
 11512  			break
 11513  		}
 11514  		v.Reset(ssaop.OpARM64MOVDstoreidx)
 11515  		v.AddArg4(ptr, idx, val, mem)
 11516  		return true
 11517  	}
 11518  	// match: (MOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
 11519  	// cond: off == 0 && sym == nil
 11520  	// result: (MOVDstoreidx8 ptr idx val mem)
 11521  	for {
 11522  		off := ssa.AuxIntToInt32(v.AuxInt)
 11523  		sym := ssa.AuxToSym(v.Aux)
 11524  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11525  			break
 11526  		}
 11527  		idx := v_0.Args[1]
 11528  		ptr := v_0.Args[0]
 11529  		val := v_1
 11530  		mem := v_2
 11531  		if !(off == 0 && sym == nil) {
 11532  			break
 11533  		}
 11534  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11535  		v.AddArg4(ptr, idx, val, mem)
 11536  		return true
 11537  	}
 11538  	// match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 11539  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11540  	// result: (MOVDstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 11541  	for {
 11542  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11543  		sym1 := ssa.AuxToSym(v.Aux)
 11544  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11545  			break
 11546  		}
 11547  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11548  		sym2 := ssa.AuxToSym(v_0.Aux)
 11549  		ptr := v_0.Args[0]
 11550  		val := v_1
 11551  		mem := v_2
 11552  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11553  			break
 11554  		}
 11555  		v.Reset(ssaop.OpARM64MOVDstore)
 11556  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11557  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11558  		v.AddArg3(ptr, val, mem)
 11559  		return true
 11560  	}
 11561  	return false
 11562  }
 11563  func rewriteValue_OpARM64MOVDstoreidx(v *ssa.Value) bool {
 11564  	v_3 := v.Args[3]
 11565  	v_2 := v.Args[2]
 11566  	v_1 := v.Args[1]
 11567  	v_0 := v.Args[0]
 11568  	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
 11569  	// cond: ssa.Is32Bit(c)
 11570  	// result: (MOVDstore [int32(c)] ptr val mem)
 11571  	for {
 11572  		ptr := v_0
 11573  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11574  			break
 11575  		}
 11576  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11577  		val := v_2
 11578  		mem := v_3
 11579  		if !(ssa.Is32Bit(c)) {
 11580  			break
 11581  		}
 11582  		v.Reset(ssaop.OpARM64MOVDstore)
 11583  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11584  		v.AddArg3(ptr, val, mem)
 11585  		return true
 11586  	}
 11587  	// match: (MOVDstoreidx (MOVDconst [c]) idx val mem)
 11588  	// cond: ssa.Is32Bit(c)
 11589  	// result: (MOVDstore [int32(c)] idx val mem)
 11590  	for {
 11591  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11592  			break
 11593  		}
 11594  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11595  		idx := v_1
 11596  		val := v_2
 11597  		mem := v_3
 11598  		if !(ssa.Is32Bit(c)) {
 11599  			break
 11600  		}
 11601  		v.Reset(ssaop.OpARM64MOVDstore)
 11602  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11603  		v.AddArg3(idx, val, mem)
 11604  		return true
 11605  	}
 11606  	// match: (MOVDstoreidx ptr (SLLconst [3] idx) val mem)
 11607  	// result: (MOVDstoreidx8 ptr idx val mem)
 11608  	for {
 11609  		ptr := v_0
 11610  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
 11611  			break
 11612  		}
 11613  		idx := v_1.Args[0]
 11614  		val := v_2
 11615  		mem := v_3
 11616  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11617  		v.AddArg4(ptr, idx, val, mem)
 11618  		return true
 11619  	}
 11620  	// match: (MOVDstoreidx (SLLconst [3] idx) ptr val mem)
 11621  	// result: (MOVDstoreidx8 ptr idx val mem)
 11622  	for {
 11623  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11624  			break
 11625  		}
 11626  		idx := v_0.Args[0]
 11627  		ptr := v_1
 11628  		val := v_2
 11629  		mem := v_3
 11630  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11631  		v.AddArg4(ptr, idx, val, mem)
 11632  		return true
 11633  	}
 11634  	return false
 11635  }
 11636  func rewriteValue_OpARM64MOVDstoreidx8(v *ssa.Value) bool {
 11637  	v_3 := v.Args[3]
 11638  	v_2 := v.Args[2]
 11639  	v_1 := v.Args[1]
 11640  	v_0 := v.Args[0]
 11641  	// match: (MOVDstoreidx8 ptr (MOVDconst [c]) val mem)
 11642  	// cond: ssa.Is32Bit(c<<3)
 11643  	// result: (MOVDstore [int32(c)<<3] ptr val mem)
 11644  	for {
 11645  		ptr := v_0
 11646  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11647  			break
 11648  		}
 11649  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11650  		val := v_2
 11651  		mem := v_3
 11652  		if !(ssa.Is32Bit(c << 3)) {
 11653  			break
 11654  		}
 11655  		v.Reset(ssaop.OpARM64MOVDstore)
 11656  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
 11657  		v.AddArg3(ptr, val, mem)
 11658  		return true
 11659  	}
 11660  	return false
 11661  }
 11662  func rewriteValue_OpARM64MOVHUload(v *ssa.Value) bool {
 11663  	v_1 := v.Args[1]
 11664  	v_0 := v.Args[0]
 11665  	b := v.Block
 11666  	config := b.Func.Config
 11667  	// match: (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem)
 11668  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11669  	// result: (MOVHUload [off1+int32(off2)] {sym} ptr mem)
 11670  	for {
 11671  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11672  		sym := ssa.AuxToSym(v.Aux)
 11673  		if v_0.Op != ssaop.OpARM64ADDconst {
 11674  			break
 11675  		}
 11676  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11677  		ptr := v_0.Args[0]
 11678  		mem := v_1
 11679  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11680  			break
 11681  		}
 11682  		v.Reset(ssaop.OpARM64MOVHUload)
 11683  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11684  		v.Aux = ssa.SymToAux(sym)
 11685  		v.AddArg2(ptr, mem)
 11686  		return true
 11687  	}
 11688  	// match: (MOVHUload [off] {sym} (ADD ptr idx) mem)
 11689  	// cond: off == 0 && sym == nil
 11690  	// result: (MOVHUloadidx ptr idx mem)
 11691  	for {
 11692  		off := ssa.AuxIntToInt32(v.AuxInt)
 11693  		sym := ssa.AuxToSym(v.Aux)
 11694  		if v_0.Op != ssaop.OpARM64ADD {
 11695  			break
 11696  		}
 11697  		idx := v_0.Args[1]
 11698  		ptr := v_0.Args[0]
 11699  		mem := v_1
 11700  		if !(off == 0 && sym == nil) {
 11701  			break
 11702  		}
 11703  		v.Reset(ssaop.OpARM64MOVHUloadidx)
 11704  		v.AddArg3(ptr, idx, mem)
 11705  		return true
 11706  	}
 11707  	// match: (MOVHUload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 11708  	// cond: off == 0 && sym == nil
 11709  	// result: (MOVHUloadidx2 ptr idx mem)
 11710  	for {
 11711  		off := ssa.AuxIntToInt32(v.AuxInt)
 11712  		sym := ssa.AuxToSym(v.Aux)
 11713  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 11714  			break
 11715  		}
 11716  		idx := v_0.Args[1]
 11717  		ptr := v_0.Args[0]
 11718  		mem := v_1
 11719  		if !(off == 0 && sym == nil) {
 11720  			break
 11721  		}
 11722  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11723  		v.AddArg3(ptr, idx, mem)
 11724  		return true
 11725  	}
 11726  	// match: (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11727  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11728  	// result: (MOVHUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 11729  	for {
 11730  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11731  		sym1 := ssa.AuxToSym(v.Aux)
 11732  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11733  			break
 11734  		}
 11735  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11736  		sym2 := ssa.AuxToSym(v_0.Aux)
 11737  		ptr := v_0.Args[0]
 11738  		mem := v_1
 11739  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11740  			break
 11741  		}
 11742  		v.Reset(ssaop.OpARM64MOVHUload)
 11743  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11744  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11745  		v.AddArg2(ptr, mem)
 11746  		return true
 11747  	}
 11748  	// match: (MOVHUload [off] {sym} (SB) _)
 11749  	// cond: ssa.SymIsRO(sym)
 11750  	// result: (MOVDconst [int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 11751  	for {
 11752  		off := ssa.AuxIntToInt32(v.AuxInt)
 11753  		sym := ssa.AuxToSym(v.Aux)
 11754  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 11755  			break
 11756  		}
 11757  		v.Reset(ssaop.OpARM64MOVDconst)
 11758  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 11759  		return true
 11760  	}
 11761  	return false
 11762  }
 11763  func rewriteValue_OpARM64MOVHUloadidx(v *ssa.Value) bool {
 11764  	v_2 := v.Args[2]
 11765  	v_1 := v.Args[1]
 11766  	v_0 := v.Args[0]
 11767  	// match: (MOVHUloadidx ptr (MOVDconst [c]) mem)
 11768  	// cond: ssa.Is32Bit(c)
 11769  	// result: (MOVHUload [int32(c)] ptr mem)
 11770  	for {
 11771  		ptr := v_0
 11772  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11773  			break
 11774  		}
 11775  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11776  		mem := v_2
 11777  		if !(ssa.Is32Bit(c)) {
 11778  			break
 11779  		}
 11780  		v.Reset(ssaop.OpARM64MOVHUload)
 11781  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11782  		v.AddArg2(ptr, mem)
 11783  		return true
 11784  	}
 11785  	// match: (MOVHUloadidx (MOVDconst [c]) ptr mem)
 11786  	// cond: ssa.Is32Bit(c)
 11787  	// result: (MOVHUload [int32(c)] ptr mem)
 11788  	for {
 11789  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11790  			break
 11791  		}
 11792  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11793  		ptr := v_1
 11794  		mem := v_2
 11795  		if !(ssa.Is32Bit(c)) {
 11796  			break
 11797  		}
 11798  		v.Reset(ssaop.OpARM64MOVHUload)
 11799  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11800  		v.AddArg2(ptr, mem)
 11801  		return true
 11802  	}
 11803  	// match: (MOVHUloadidx ptr (SLLconst [1] idx) mem)
 11804  	// result: (MOVHUloadidx2 ptr idx mem)
 11805  	for {
 11806  		ptr := v_0
 11807  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 11808  			break
 11809  		}
 11810  		idx := v_1.Args[0]
 11811  		mem := v_2
 11812  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11813  		v.AddArg3(ptr, idx, mem)
 11814  		return true
 11815  	}
 11816  	// match: (MOVHUloadidx ptr (ADD idx idx) mem)
 11817  	// result: (MOVHUloadidx2 ptr idx mem)
 11818  	for {
 11819  		ptr := v_0
 11820  		if v_1.Op != ssaop.OpARM64ADD {
 11821  			break
 11822  		}
 11823  		idx := v_1.Args[1]
 11824  		if idx != v_1.Args[0] {
 11825  			break
 11826  		}
 11827  		mem := v_2
 11828  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11829  		v.AddArg3(ptr, idx, mem)
 11830  		return true
 11831  	}
 11832  	// match: (MOVHUloadidx (ADD idx idx) ptr mem)
 11833  	// result: (MOVHUloadidx2 ptr idx mem)
 11834  	for {
 11835  		if v_0.Op != ssaop.OpARM64ADD {
 11836  			break
 11837  		}
 11838  		idx := v_0.Args[1]
 11839  		if idx != v_0.Args[0] {
 11840  			break
 11841  		}
 11842  		ptr := v_1
 11843  		mem := v_2
 11844  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11845  		v.AddArg3(ptr, idx, mem)
 11846  		return true
 11847  	}
 11848  	return false
 11849  }
 11850  func rewriteValue_OpARM64MOVHUloadidx2(v *ssa.Value) bool {
 11851  	v_2 := v.Args[2]
 11852  	v_1 := v.Args[1]
 11853  	v_0 := v.Args[0]
 11854  	// match: (MOVHUloadidx2 ptr (MOVDconst [c]) mem)
 11855  	// cond: ssa.Is32Bit(c<<1)
 11856  	// result: (MOVHUload [int32(c)<<1] ptr mem)
 11857  	for {
 11858  		ptr := v_0
 11859  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11860  			break
 11861  		}
 11862  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11863  		mem := v_2
 11864  		if !(ssa.Is32Bit(c << 1)) {
 11865  			break
 11866  		}
 11867  		v.Reset(ssaop.OpARM64MOVHUload)
 11868  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 11869  		v.AddArg2(ptr, mem)
 11870  		return true
 11871  	}
 11872  	return false
 11873  }
 11874  func rewriteValue_OpARM64MOVHUreg(v *ssa.Value) bool {
 11875  	v_0 := v.Args[0]
 11876  	// match: (MOVHUreg (ANDconst [c] x))
 11877  	// result: (ANDconst [c&(1<<16-1)] x)
 11878  	for {
 11879  		if v_0.Op != ssaop.OpARM64ANDconst {
 11880  			break
 11881  		}
 11882  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11883  		x := v_0.Args[0]
 11884  		v.Reset(ssaop.OpARM64ANDconst)
 11885  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<16 - 1))
 11886  		v.AddArg(x)
 11887  		return true
 11888  	}
 11889  	// match: (MOVHUreg (MOVDconst [c]))
 11890  	// result: (MOVDconst [int64(uint16(c))])
 11891  	for {
 11892  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11893  			break
 11894  		}
 11895  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11896  		v.Reset(ssaop.OpARM64MOVDconst)
 11897  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint16(c)))
 11898  		return true
 11899  	}
 11900  	// match: (MOVHUreg x)
 11901  	// cond: v.Type.Size() <= 2
 11902  	// result: x
 11903  	for {
 11904  		x := v_0
 11905  		if !(v.Type.Size() <= 2) {
 11906  			break
 11907  		}
 11908  		v.CopyOf(x)
 11909  		return true
 11910  	}
 11911  	// match: (MOVHUreg (SLLconst [lc] x))
 11912  	// cond: lc >= 16
 11913  	// result: (MOVDconst [0])
 11914  	for {
 11915  		if v_0.Op != ssaop.OpARM64SLLconst {
 11916  			break
 11917  		}
 11918  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 11919  		if !(lc >= 16) {
 11920  			break
 11921  		}
 11922  		v.Reset(ssaop.OpARM64MOVDconst)
 11923  		v.AuxInt = ssa.Int64ToAuxInt(0)
 11924  		return true
 11925  	}
 11926  	// match: (MOVHUreg (SLLconst [lc] x))
 11927  	// cond: lc < 16
 11928  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 16-lc)] x)
 11929  	for {
 11930  		if v_0.Op != ssaop.OpARM64SLLconst {
 11931  			break
 11932  		}
 11933  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 11934  		x := v_0.Args[0]
 11935  		if !(lc < 16) {
 11936  			break
 11937  		}
 11938  		v.Reset(ssaop.OpARM64UBFIZ)
 11939  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 16-lc))
 11940  		v.AddArg(x)
 11941  		return true
 11942  	}
 11943  	// match: (MOVHUreg (SRLconst [rc] x))
 11944  	// cond: rc < 16
 11945  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 16)] x)
 11946  	for {
 11947  		if v_0.Op != ssaop.OpARM64SRLconst {
 11948  			break
 11949  		}
 11950  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 11951  		x := v_0.Args[0]
 11952  		if !(rc < 16) {
 11953  			break
 11954  		}
 11955  		v.Reset(ssaop.OpARM64UBFX)
 11956  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16))
 11957  		v.AddArg(x)
 11958  		return true
 11959  	}
 11960  	// match: (MOVHUreg (UBFX [bfc] x))
 11961  	// cond: bfc.Width() <= 16
 11962  	// result: (UBFX [bfc] x)
 11963  	for {
 11964  		if v_0.Op != ssaop.OpARM64UBFX {
 11965  			break
 11966  		}
 11967  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 11968  		x := v_0.Args[0]
 11969  		if !(bfc.Width() <= 16) {
 11970  			break
 11971  		}
 11972  		v.Reset(ssaop.OpARM64UBFX)
 11973  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 11974  		v.AddArg(x)
 11975  		return true
 11976  	}
 11977  	return false
 11978  }
 11979  func rewriteValue_OpARM64MOVHload(v *ssa.Value) bool {
 11980  	v_1 := v.Args[1]
 11981  	v_0 := v.Args[0]
 11982  	b := v.Block
 11983  	config := b.Func.Config
 11984  	// match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem)
 11985  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11986  	// result: (MOVHload [off1+int32(off2)] {sym} ptr mem)
 11987  	for {
 11988  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11989  		sym := ssa.AuxToSym(v.Aux)
 11990  		if v_0.Op != ssaop.OpARM64ADDconst {
 11991  			break
 11992  		}
 11993  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11994  		ptr := v_0.Args[0]
 11995  		mem := v_1
 11996  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11997  			break
 11998  		}
 11999  		v.Reset(ssaop.OpARM64MOVHload)
 12000  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12001  		v.Aux = ssa.SymToAux(sym)
 12002  		v.AddArg2(ptr, mem)
 12003  		return true
 12004  	}
 12005  	// match: (MOVHload [off] {sym} (ADD ptr idx) mem)
 12006  	// cond: off == 0 && sym == nil
 12007  	// result: (MOVHloadidx ptr idx mem)
 12008  	for {
 12009  		off := ssa.AuxIntToInt32(v.AuxInt)
 12010  		sym := ssa.AuxToSym(v.Aux)
 12011  		if v_0.Op != ssaop.OpARM64ADD {
 12012  			break
 12013  		}
 12014  		idx := v_0.Args[1]
 12015  		ptr := v_0.Args[0]
 12016  		mem := v_1
 12017  		if !(off == 0 && sym == nil) {
 12018  			break
 12019  		}
 12020  		v.Reset(ssaop.OpARM64MOVHloadidx)
 12021  		v.AddArg3(ptr, idx, mem)
 12022  		return true
 12023  	}
 12024  	// match: (MOVHload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 12025  	// cond: off == 0 && sym == nil
 12026  	// result: (MOVHloadidx2 ptr idx mem)
 12027  	for {
 12028  		off := ssa.AuxIntToInt32(v.AuxInt)
 12029  		sym := ssa.AuxToSym(v.Aux)
 12030  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 12031  			break
 12032  		}
 12033  		idx := v_0.Args[1]
 12034  		ptr := v_0.Args[0]
 12035  		mem := v_1
 12036  		if !(off == 0 && sym == nil) {
 12037  			break
 12038  		}
 12039  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 12040  		v.AddArg3(ptr, idx, mem)
 12041  		return true
 12042  	}
 12043  	// match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 12044  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12045  	// result: (MOVHload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 12046  	for {
 12047  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12048  		sym1 := ssa.AuxToSym(v.Aux)
 12049  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12050  			break
 12051  		}
 12052  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12053  		sym2 := ssa.AuxToSym(v_0.Aux)
 12054  		ptr := v_0.Args[0]
 12055  		mem := v_1
 12056  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12057  			break
 12058  		}
 12059  		v.Reset(ssaop.OpARM64MOVHload)
 12060  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12061  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12062  		v.AddArg2(ptr, mem)
 12063  		return true
 12064  	}
 12065  	// match: (MOVHload [off] {sym} (SB) _)
 12066  	// cond: ssa.SymIsRO(sym)
 12067  	// result: (MOVDconst [int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
 12068  	for {
 12069  		off := ssa.AuxIntToInt32(v.AuxInt)
 12070  		sym := ssa.AuxToSym(v.Aux)
 12071  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 12072  			break
 12073  		}
 12074  		v.Reset(ssaop.OpARM64MOVDconst)
 12075  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
 12076  		return true
 12077  	}
 12078  	return false
 12079  }
 12080  func rewriteValue_OpARM64MOVHloadidx(v *ssa.Value) bool {
 12081  	v_2 := v.Args[2]
 12082  	v_1 := v.Args[1]
 12083  	v_0 := v.Args[0]
 12084  	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
 12085  	// cond: ssa.Is32Bit(c)
 12086  	// result: (MOVHload [int32(c)] ptr mem)
 12087  	for {
 12088  		ptr := v_0
 12089  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12090  			break
 12091  		}
 12092  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12093  		mem := v_2
 12094  		if !(ssa.Is32Bit(c)) {
 12095  			break
 12096  		}
 12097  		v.Reset(ssaop.OpARM64MOVHload)
 12098  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12099  		v.AddArg2(ptr, mem)
 12100  		return true
 12101  	}
 12102  	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
 12103  	// cond: ssa.Is32Bit(c)
 12104  	// result: (MOVHload [int32(c)] ptr mem)
 12105  	for {
 12106  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12107  			break
 12108  		}
 12109  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12110  		ptr := v_1
 12111  		mem := v_2
 12112  		if !(ssa.Is32Bit(c)) {
 12113  			break
 12114  		}
 12115  		v.Reset(ssaop.OpARM64MOVHload)
 12116  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12117  		v.AddArg2(ptr, mem)
 12118  		return true
 12119  	}
 12120  	// match: (MOVHloadidx ptr (SLLconst [1] idx) mem)
 12121  	// result: (MOVHloadidx2 ptr idx mem)
 12122  	for {
 12123  		ptr := v_0
 12124  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 12125  			break
 12126  		}
 12127  		idx := v_1.Args[0]
 12128  		mem := v_2
 12129  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 12130  		v.AddArg3(ptr, idx, mem)
 12131  		return true
 12132  	}
 12133  	// match: (MOVHloadidx ptr (ADD idx idx) mem)
 12134  	// result: (MOVHloadidx2 ptr idx mem)
 12135  	for {
 12136  		ptr := v_0
 12137  		if v_1.Op != ssaop.OpARM64ADD {
 12138  			break
 12139  		}
 12140  		idx := v_1.Args[1]
 12141  		if idx != v_1.Args[0] {
 12142  			break
 12143  		}
 12144  		mem := v_2
 12145  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 12146  		v.AddArg3(ptr, idx, mem)
 12147  		return true
 12148  	}
 12149  	// match: (MOVHloadidx (ADD idx idx) ptr mem)
 12150  	// result: (MOVHloadidx2 ptr idx mem)
 12151  	for {
 12152  		if v_0.Op != ssaop.OpARM64ADD {
 12153  			break
 12154  		}
 12155  		idx := v_0.Args[1]
 12156  		if idx != v_0.Args[0] {
 12157  			break
 12158  		}
 12159  		ptr := v_1
 12160  		mem := v_2
 12161  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 12162  		v.AddArg3(ptr, idx, mem)
 12163  		return true
 12164  	}
 12165  	return false
 12166  }
 12167  func rewriteValue_OpARM64MOVHloadidx2(v *ssa.Value) bool {
 12168  	v_2 := v.Args[2]
 12169  	v_1 := v.Args[1]
 12170  	v_0 := v.Args[0]
 12171  	// match: (MOVHloadidx2 ptr (MOVDconst [c]) mem)
 12172  	// cond: ssa.Is32Bit(c<<1)
 12173  	// result: (MOVHload [int32(c)<<1] ptr mem)
 12174  	for {
 12175  		ptr := v_0
 12176  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12177  			break
 12178  		}
 12179  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12180  		mem := v_2
 12181  		if !(ssa.Is32Bit(c << 1)) {
 12182  			break
 12183  		}
 12184  		v.Reset(ssaop.OpARM64MOVHload)
 12185  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 12186  		v.AddArg2(ptr, mem)
 12187  		return true
 12188  	}
 12189  	return false
 12190  }
 12191  func rewriteValue_OpARM64MOVHreg(v *ssa.Value) bool {
 12192  	v_0 := v.Args[0]
 12193  	// match: (MOVHreg (MOVDconst [c]))
 12194  	// result: (MOVDconst [int64(int16(c))])
 12195  	for {
 12196  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12197  			break
 12198  		}
 12199  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12200  		v.Reset(ssaop.OpARM64MOVDconst)
 12201  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(c)))
 12202  		return true
 12203  	}
 12204  	// match: (MOVHreg x)
 12205  	// cond: v.Type.Size() <= 2
 12206  	// result: x
 12207  	for {
 12208  		x := v_0
 12209  		if !(v.Type.Size() <= 2) {
 12210  			break
 12211  		}
 12212  		v.CopyOf(x)
 12213  		return true
 12214  	}
 12215  	// match: (MOVHreg <t> (ANDconst x [c]))
 12216  	// cond: uint64(c) & uint64(0xffffffffffff8000) == 0
 12217  	// result: (ANDconst <t> x [c])
 12218  	for {
 12219  		t := v.Type
 12220  		if v_0.Op != ssaop.OpARM64ANDconst {
 12221  			break
 12222  		}
 12223  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12224  		x := v_0.Args[0]
 12225  		if !(uint64(c)&uint64(0xffffffffffff8000) == 0) {
 12226  			break
 12227  		}
 12228  		v.Reset(ssaop.OpARM64ANDconst)
 12229  		v.Type = t
 12230  		v.AuxInt = ssa.Int64ToAuxInt(c)
 12231  		v.AddArg(x)
 12232  		return true
 12233  	}
 12234  	// match: (MOVHreg (SLLconst [lc] x))
 12235  	// cond: lc < 16
 12236  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 16-lc)] x)
 12237  	for {
 12238  		if v_0.Op != ssaop.OpARM64SLLconst {
 12239  			break
 12240  		}
 12241  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12242  		x := v_0.Args[0]
 12243  		if !(lc < 16) {
 12244  			break
 12245  		}
 12246  		v.Reset(ssaop.OpARM64SBFIZ)
 12247  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 16-lc))
 12248  		v.AddArg(x)
 12249  		return true
 12250  	}
 12251  	// match: (MOVHreg (SBFX [bfc] x))
 12252  	// cond: bfc.Width() <= 16
 12253  	// result: (SBFX [bfc] x)
 12254  	for {
 12255  		if v_0.Op != ssaop.OpARM64SBFX {
 12256  			break
 12257  		}
 12258  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 12259  		x := v_0.Args[0]
 12260  		if !(bfc.Width() <= 16) {
 12261  			break
 12262  		}
 12263  		v.Reset(ssaop.OpARM64SBFX)
 12264  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 12265  		v.AddArg(x)
 12266  		return true
 12267  	}
 12268  	return false
 12269  }
 12270  func rewriteValue_OpARM64MOVHstore(v *ssa.Value) bool {
 12271  	v_2 := v.Args[2]
 12272  	v_1 := v.Args[1]
 12273  	v_0 := v.Args[0]
 12274  	b := v.Block
 12275  	config := b.Func.Config
 12276  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 12277  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12278  	// result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem)
 12279  	for {
 12280  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12281  		sym := ssa.AuxToSym(v.Aux)
 12282  		if v_0.Op != ssaop.OpARM64ADDconst {
 12283  			break
 12284  		}
 12285  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12286  		ptr := v_0.Args[0]
 12287  		val := v_1
 12288  		mem := v_2
 12289  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12290  			break
 12291  		}
 12292  		v.Reset(ssaop.OpARM64MOVHstore)
 12293  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12294  		v.Aux = ssa.SymToAux(sym)
 12295  		v.AddArg3(ptr, val, mem)
 12296  		return true
 12297  	}
 12298  	// match: (MOVHstore [off] {sym} (ADD ptr idx) val mem)
 12299  	// cond: off == 0 && sym == nil
 12300  	// result: (MOVHstoreidx ptr idx val mem)
 12301  	for {
 12302  		off := ssa.AuxIntToInt32(v.AuxInt)
 12303  		sym := ssa.AuxToSym(v.Aux)
 12304  		if v_0.Op != ssaop.OpARM64ADD {
 12305  			break
 12306  		}
 12307  		idx := v_0.Args[1]
 12308  		ptr := v_0.Args[0]
 12309  		val := v_1
 12310  		mem := v_2
 12311  		if !(off == 0 && sym == nil) {
 12312  			break
 12313  		}
 12314  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12315  		v.AddArg4(ptr, idx, val, mem)
 12316  		return true
 12317  	}
 12318  	// match: (MOVHstore [off] {sym} (ADDshiftLL [1] ptr idx) val mem)
 12319  	// cond: off == 0 && sym == nil
 12320  	// result: (MOVHstoreidx2 ptr idx val mem)
 12321  	for {
 12322  		off := ssa.AuxIntToInt32(v.AuxInt)
 12323  		sym := ssa.AuxToSym(v.Aux)
 12324  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 12325  			break
 12326  		}
 12327  		idx := v_0.Args[1]
 12328  		ptr := v_0.Args[0]
 12329  		val := v_1
 12330  		mem := v_2
 12331  		if !(off == 0 && sym == nil) {
 12332  			break
 12333  		}
 12334  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12335  		v.AddArg4(ptr, idx, val, mem)
 12336  		return true
 12337  	}
 12338  	// match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 12339  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12340  	// result: (MOVHstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 12341  	for {
 12342  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12343  		sym1 := ssa.AuxToSym(v.Aux)
 12344  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12345  			break
 12346  		}
 12347  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12348  		sym2 := ssa.AuxToSym(v_0.Aux)
 12349  		ptr := v_0.Args[0]
 12350  		val := v_1
 12351  		mem := v_2
 12352  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12353  			break
 12354  		}
 12355  		v.Reset(ssaop.OpARM64MOVHstore)
 12356  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12357  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12358  		v.AddArg3(ptr, val, mem)
 12359  		return true
 12360  	}
 12361  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
 12362  	// result: (MOVHstore [off] {sym} ptr x mem)
 12363  	for {
 12364  		off := ssa.AuxIntToInt32(v.AuxInt)
 12365  		sym := ssa.AuxToSym(v.Aux)
 12366  		ptr := v_0
 12367  		if v_1.Op != ssaop.OpARM64MOVHreg {
 12368  			break
 12369  		}
 12370  		x := v_1.Args[0]
 12371  		mem := v_2
 12372  		v.Reset(ssaop.OpARM64MOVHstore)
 12373  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12374  		v.Aux = ssa.SymToAux(sym)
 12375  		v.AddArg3(ptr, x, mem)
 12376  		return true
 12377  	}
 12378  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
 12379  	// result: (MOVHstore [off] {sym} ptr x mem)
 12380  	for {
 12381  		off := ssa.AuxIntToInt32(v.AuxInt)
 12382  		sym := ssa.AuxToSym(v.Aux)
 12383  		ptr := v_0
 12384  		if v_1.Op != ssaop.OpARM64MOVHUreg {
 12385  			break
 12386  		}
 12387  		x := v_1.Args[0]
 12388  		mem := v_2
 12389  		v.Reset(ssaop.OpARM64MOVHstore)
 12390  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12391  		v.Aux = ssa.SymToAux(sym)
 12392  		v.AddArg3(ptr, x, mem)
 12393  		return true
 12394  	}
 12395  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
 12396  	// result: (MOVHstore [off] {sym} ptr x mem)
 12397  	for {
 12398  		off := ssa.AuxIntToInt32(v.AuxInt)
 12399  		sym := ssa.AuxToSym(v.Aux)
 12400  		ptr := v_0
 12401  		if v_1.Op != ssaop.OpARM64MOVWreg {
 12402  			break
 12403  		}
 12404  		x := v_1.Args[0]
 12405  		mem := v_2
 12406  		v.Reset(ssaop.OpARM64MOVHstore)
 12407  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12408  		v.Aux = ssa.SymToAux(sym)
 12409  		v.AddArg3(ptr, x, mem)
 12410  		return true
 12411  	}
 12412  	// match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
 12413  	// result: (MOVHstore [off] {sym} ptr x mem)
 12414  	for {
 12415  		off := ssa.AuxIntToInt32(v.AuxInt)
 12416  		sym := ssa.AuxToSym(v.Aux)
 12417  		ptr := v_0
 12418  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 12419  			break
 12420  		}
 12421  		x := v_1.Args[0]
 12422  		mem := v_2
 12423  		v.Reset(ssaop.OpARM64MOVHstore)
 12424  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12425  		v.Aux = ssa.SymToAux(sym)
 12426  		v.AddArg3(ptr, x, mem)
 12427  		return true
 12428  	}
 12429  	return false
 12430  }
 12431  func rewriteValue_OpARM64MOVHstoreidx(v *ssa.Value) bool {
 12432  	v_3 := v.Args[3]
 12433  	v_2 := v.Args[2]
 12434  	v_1 := v.Args[1]
 12435  	v_0 := v.Args[0]
 12436  	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
 12437  	// cond: ssa.Is32Bit(c)
 12438  	// result: (MOVHstore [int32(c)] ptr val mem)
 12439  	for {
 12440  		ptr := v_0
 12441  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12442  			break
 12443  		}
 12444  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12445  		val := v_2
 12446  		mem := v_3
 12447  		if !(ssa.Is32Bit(c)) {
 12448  			break
 12449  		}
 12450  		v.Reset(ssaop.OpARM64MOVHstore)
 12451  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12452  		v.AddArg3(ptr, val, mem)
 12453  		return true
 12454  	}
 12455  	// match: (MOVHstoreidx (MOVDconst [c]) idx val mem)
 12456  	// cond: ssa.Is32Bit(c)
 12457  	// result: (MOVHstore [int32(c)] idx val mem)
 12458  	for {
 12459  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12460  			break
 12461  		}
 12462  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12463  		idx := v_1
 12464  		val := v_2
 12465  		mem := v_3
 12466  		if !(ssa.Is32Bit(c)) {
 12467  			break
 12468  		}
 12469  		v.Reset(ssaop.OpARM64MOVHstore)
 12470  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12471  		v.AddArg3(idx, val, mem)
 12472  		return true
 12473  	}
 12474  	// match: (MOVHstoreidx ptr (SLLconst [1] idx) val mem)
 12475  	// result: (MOVHstoreidx2 ptr idx val mem)
 12476  	for {
 12477  		ptr := v_0
 12478  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 12479  			break
 12480  		}
 12481  		idx := v_1.Args[0]
 12482  		val := v_2
 12483  		mem := v_3
 12484  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12485  		v.AddArg4(ptr, idx, val, mem)
 12486  		return true
 12487  	}
 12488  	// match: (MOVHstoreidx ptr (ADD idx idx) val mem)
 12489  	// result: (MOVHstoreidx2 ptr idx val mem)
 12490  	for {
 12491  		ptr := v_0
 12492  		if v_1.Op != ssaop.OpARM64ADD {
 12493  			break
 12494  		}
 12495  		idx := v_1.Args[1]
 12496  		if idx != v_1.Args[0] {
 12497  			break
 12498  		}
 12499  		val := v_2
 12500  		mem := v_3
 12501  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12502  		v.AddArg4(ptr, idx, val, mem)
 12503  		return true
 12504  	}
 12505  	// match: (MOVHstoreidx (SLLconst [1] idx) ptr val mem)
 12506  	// result: (MOVHstoreidx2 ptr idx val mem)
 12507  	for {
 12508  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 12509  			break
 12510  		}
 12511  		idx := v_0.Args[0]
 12512  		ptr := v_1
 12513  		val := v_2
 12514  		mem := v_3
 12515  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12516  		v.AddArg4(ptr, idx, val, mem)
 12517  		return true
 12518  	}
 12519  	// match: (MOVHstoreidx (ADD idx idx) ptr val mem)
 12520  	// result: (MOVHstoreidx2 ptr idx val mem)
 12521  	for {
 12522  		if v_0.Op != ssaop.OpARM64ADD {
 12523  			break
 12524  		}
 12525  		idx := v_0.Args[1]
 12526  		if idx != v_0.Args[0] {
 12527  			break
 12528  		}
 12529  		ptr := v_1
 12530  		val := v_2
 12531  		mem := v_3
 12532  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12533  		v.AddArg4(ptr, idx, val, mem)
 12534  		return true
 12535  	}
 12536  	// match: (MOVHstoreidx ptr idx (MOVHreg x) mem)
 12537  	// result: (MOVHstoreidx ptr idx x mem)
 12538  	for {
 12539  		ptr := v_0
 12540  		idx := v_1
 12541  		if v_2.Op != ssaop.OpARM64MOVHreg {
 12542  			break
 12543  		}
 12544  		x := v_2.Args[0]
 12545  		mem := v_3
 12546  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12547  		v.AddArg4(ptr, idx, x, mem)
 12548  		return true
 12549  	}
 12550  	// match: (MOVHstoreidx ptr idx (MOVHUreg x) mem)
 12551  	// result: (MOVHstoreidx ptr idx x mem)
 12552  	for {
 12553  		ptr := v_0
 12554  		idx := v_1
 12555  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 12556  			break
 12557  		}
 12558  		x := v_2.Args[0]
 12559  		mem := v_3
 12560  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12561  		v.AddArg4(ptr, idx, x, mem)
 12562  		return true
 12563  	}
 12564  	// match: (MOVHstoreidx ptr idx (MOVWreg x) mem)
 12565  	// result: (MOVHstoreidx ptr idx x mem)
 12566  	for {
 12567  		ptr := v_0
 12568  		idx := v_1
 12569  		if v_2.Op != ssaop.OpARM64MOVWreg {
 12570  			break
 12571  		}
 12572  		x := v_2.Args[0]
 12573  		mem := v_3
 12574  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12575  		v.AddArg4(ptr, idx, x, mem)
 12576  		return true
 12577  	}
 12578  	// match: (MOVHstoreidx ptr idx (MOVWUreg x) mem)
 12579  	// result: (MOVHstoreidx ptr idx x mem)
 12580  	for {
 12581  		ptr := v_0
 12582  		idx := v_1
 12583  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 12584  			break
 12585  		}
 12586  		x := v_2.Args[0]
 12587  		mem := v_3
 12588  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12589  		v.AddArg4(ptr, idx, x, mem)
 12590  		return true
 12591  	}
 12592  	return false
 12593  }
 12594  func rewriteValue_OpARM64MOVHstoreidx2(v *ssa.Value) bool {
 12595  	v_3 := v.Args[3]
 12596  	v_2 := v.Args[2]
 12597  	v_1 := v.Args[1]
 12598  	v_0 := v.Args[0]
 12599  	// match: (MOVHstoreidx2 ptr (MOVDconst [c]) val mem)
 12600  	// cond: ssa.Is32Bit(c<<1)
 12601  	// result: (MOVHstore [int32(c)<<1] ptr val mem)
 12602  	for {
 12603  		ptr := v_0
 12604  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12605  			break
 12606  		}
 12607  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12608  		val := v_2
 12609  		mem := v_3
 12610  		if !(ssa.Is32Bit(c << 1)) {
 12611  			break
 12612  		}
 12613  		v.Reset(ssaop.OpARM64MOVHstore)
 12614  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 12615  		v.AddArg3(ptr, val, mem)
 12616  		return true
 12617  	}
 12618  	// match: (MOVHstoreidx2 ptr idx (MOVHreg x) mem)
 12619  	// result: (MOVHstoreidx2 ptr idx x mem)
 12620  	for {
 12621  		ptr := v_0
 12622  		idx := v_1
 12623  		if v_2.Op != ssaop.OpARM64MOVHreg {
 12624  			break
 12625  		}
 12626  		x := v_2.Args[0]
 12627  		mem := v_3
 12628  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12629  		v.AddArg4(ptr, idx, x, mem)
 12630  		return true
 12631  	}
 12632  	// match: (MOVHstoreidx2 ptr idx (MOVHUreg x) mem)
 12633  	// result: (MOVHstoreidx2 ptr idx x mem)
 12634  	for {
 12635  		ptr := v_0
 12636  		idx := v_1
 12637  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 12638  			break
 12639  		}
 12640  		x := v_2.Args[0]
 12641  		mem := v_3
 12642  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12643  		v.AddArg4(ptr, idx, x, mem)
 12644  		return true
 12645  	}
 12646  	// match: (MOVHstoreidx2 ptr idx (MOVWreg x) mem)
 12647  	// result: (MOVHstoreidx2 ptr idx x mem)
 12648  	for {
 12649  		ptr := v_0
 12650  		idx := v_1
 12651  		if v_2.Op != ssaop.OpARM64MOVWreg {
 12652  			break
 12653  		}
 12654  		x := v_2.Args[0]
 12655  		mem := v_3
 12656  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12657  		v.AddArg4(ptr, idx, x, mem)
 12658  		return true
 12659  	}
 12660  	// match: (MOVHstoreidx2 ptr idx (MOVWUreg x) mem)
 12661  	// result: (MOVHstoreidx2 ptr idx x mem)
 12662  	for {
 12663  		ptr := v_0
 12664  		idx := v_1
 12665  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 12666  			break
 12667  		}
 12668  		x := v_2.Args[0]
 12669  		mem := v_3
 12670  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12671  		v.AddArg4(ptr, idx, x, mem)
 12672  		return true
 12673  	}
 12674  	return false
 12675  }
 12676  func rewriteValue_OpARM64MOVWUload(v *ssa.Value) bool {
 12677  	v_1 := v.Args[1]
 12678  	v_0 := v.Args[0]
 12679  	b := v.Block
 12680  	config := b.Func.Config
 12681  	// match: (MOVWUload [off] {sym} ptr (FMOVSstore [off] {sym} ptr val _))
 12682  	// result: (FMOVSfpgp val)
 12683  	for {
 12684  		off := ssa.AuxIntToInt32(v.AuxInt)
 12685  		sym := ssa.AuxToSym(v.Aux)
 12686  		ptr := v_0
 12687  		if v_1.Op != ssaop.OpARM64FMOVSstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
 12688  			break
 12689  		}
 12690  		val := v_1.Args[1]
 12691  		if ptr != v_1.Args[0] {
 12692  			break
 12693  		}
 12694  		v.Reset(ssaop.OpARM64FMOVSfpgp)
 12695  		v.AddArg(val)
 12696  		return true
 12697  	}
 12698  	// match: (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem)
 12699  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12700  	// result: (MOVWUload [off1+int32(off2)] {sym} ptr mem)
 12701  	for {
 12702  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12703  		sym := ssa.AuxToSym(v.Aux)
 12704  		if v_0.Op != ssaop.OpARM64ADDconst {
 12705  			break
 12706  		}
 12707  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12708  		ptr := v_0.Args[0]
 12709  		mem := v_1
 12710  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12711  			break
 12712  		}
 12713  		v.Reset(ssaop.OpARM64MOVWUload)
 12714  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12715  		v.Aux = ssa.SymToAux(sym)
 12716  		v.AddArg2(ptr, mem)
 12717  		return true
 12718  	}
 12719  	// match: (MOVWUload [off] {sym} (ADD ptr idx) mem)
 12720  	// cond: off == 0 && sym == nil
 12721  	// result: (MOVWUloadidx ptr idx mem)
 12722  	for {
 12723  		off := ssa.AuxIntToInt32(v.AuxInt)
 12724  		sym := ssa.AuxToSym(v.Aux)
 12725  		if v_0.Op != ssaop.OpARM64ADD {
 12726  			break
 12727  		}
 12728  		idx := v_0.Args[1]
 12729  		ptr := v_0.Args[0]
 12730  		mem := v_1
 12731  		if !(off == 0 && sym == nil) {
 12732  			break
 12733  		}
 12734  		v.Reset(ssaop.OpARM64MOVWUloadidx)
 12735  		v.AddArg3(ptr, idx, mem)
 12736  		return true
 12737  	}
 12738  	// match: (MOVWUload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 12739  	// cond: off == 0 && sym == nil
 12740  	// result: (MOVWUloadidx4 ptr idx mem)
 12741  	for {
 12742  		off := ssa.AuxIntToInt32(v.AuxInt)
 12743  		sym := ssa.AuxToSym(v.Aux)
 12744  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12745  			break
 12746  		}
 12747  		idx := v_0.Args[1]
 12748  		ptr := v_0.Args[0]
 12749  		mem := v_1
 12750  		if !(off == 0 && sym == nil) {
 12751  			break
 12752  		}
 12753  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12754  		v.AddArg3(ptr, idx, mem)
 12755  		return true
 12756  	}
 12757  	// match: (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 12758  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12759  	// result: (MOVWUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 12760  	for {
 12761  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12762  		sym1 := ssa.AuxToSym(v.Aux)
 12763  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12764  			break
 12765  		}
 12766  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12767  		sym2 := ssa.AuxToSym(v_0.Aux)
 12768  		ptr := v_0.Args[0]
 12769  		mem := v_1
 12770  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12771  			break
 12772  		}
 12773  		v.Reset(ssaop.OpARM64MOVWUload)
 12774  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12775  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12776  		v.AddArg2(ptr, mem)
 12777  		return true
 12778  	}
 12779  	// match: (MOVWUload [off] {sym} (SB) _)
 12780  	// cond: ssa.SymIsRO(sym)
 12781  	// result: (MOVDconst [int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 12782  	for {
 12783  		off := ssa.AuxIntToInt32(v.AuxInt)
 12784  		sym := ssa.AuxToSym(v.Aux)
 12785  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 12786  			break
 12787  		}
 12788  		v.Reset(ssaop.OpARM64MOVDconst)
 12789  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 12790  		return true
 12791  	}
 12792  	return false
 12793  }
 12794  func rewriteValue_OpARM64MOVWUloadidx(v *ssa.Value) bool {
 12795  	v_2 := v.Args[2]
 12796  	v_1 := v.Args[1]
 12797  	v_0 := v.Args[0]
 12798  	// match: (MOVWUloadidx ptr (MOVDconst [c]) mem)
 12799  	// cond: ssa.Is32Bit(c)
 12800  	// result: (MOVWUload [int32(c)] ptr mem)
 12801  	for {
 12802  		ptr := v_0
 12803  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12804  			break
 12805  		}
 12806  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12807  		mem := v_2
 12808  		if !(ssa.Is32Bit(c)) {
 12809  			break
 12810  		}
 12811  		v.Reset(ssaop.OpARM64MOVWUload)
 12812  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12813  		v.AddArg2(ptr, mem)
 12814  		return true
 12815  	}
 12816  	// match: (MOVWUloadidx (MOVDconst [c]) ptr mem)
 12817  	// cond: ssa.Is32Bit(c)
 12818  	// result: (MOVWUload [int32(c)] ptr mem)
 12819  	for {
 12820  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12821  			break
 12822  		}
 12823  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12824  		ptr := v_1
 12825  		mem := v_2
 12826  		if !(ssa.Is32Bit(c)) {
 12827  			break
 12828  		}
 12829  		v.Reset(ssaop.OpARM64MOVWUload)
 12830  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12831  		v.AddArg2(ptr, mem)
 12832  		return true
 12833  	}
 12834  	// match: (MOVWUloadidx ptr (SLLconst [2] idx) mem)
 12835  	// result: (MOVWUloadidx4 ptr idx mem)
 12836  	for {
 12837  		ptr := v_0
 12838  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 12839  			break
 12840  		}
 12841  		idx := v_1.Args[0]
 12842  		mem := v_2
 12843  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12844  		v.AddArg3(ptr, idx, mem)
 12845  		return true
 12846  	}
 12847  	// match: (MOVWUloadidx (SLLconst [2] idx) ptr mem)
 12848  	// result: (MOVWUloadidx4 ptr idx mem)
 12849  	for {
 12850  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12851  			break
 12852  		}
 12853  		idx := v_0.Args[0]
 12854  		ptr := v_1
 12855  		mem := v_2
 12856  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12857  		v.AddArg3(ptr, idx, mem)
 12858  		return true
 12859  	}
 12860  	return false
 12861  }
 12862  func rewriteValue_OpARM64MOVWUloadidx4(v *ssa.Value) bool {
 12863  	v_2 := v.Args[2]
 12864  	v_1 := v.Args[1]
 12865  	v_0 := v.Args[0]
 12866  	// match: (MOVWUloadidx4 ptr (MOVDconst [c]) mem)
 12867  	// cond: ssa.Is32Bit(c<<2)
 12868  	// result: (MOVWUload [int32(c)<<2] ptr mem)
 12869  	for {
 12870  		ptr := v_0
 12871  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12872  			break
 12873  		}
 12874  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12875  		mem := v_2
 12876  		if !(ssa.Is32Bit(c << 2)) {
 12877  			break
 12878  		}
 12879  		v.Reset(ssaop.OpARM64MOVWUload)
 12880  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 12881  		v.AddArg2(ptr, mem)
 12882  		return true
 12883  	}
 12884  	return false
 12885  }
 12886  func rewriteValue_OpARM64MOVWUreg(v *ssa.Value) bool {
 12887  	v_0 := v.Args[0]
 12888  	// match: (MOVWUreg (ANDconst [c] x))
 12889  	// result: (ANDconst [c&(1<<32-1)] x)
 12890  	for {
 12891  		if v_0.Op != ssaop.OpARM64ANDconst {
 12892  			break
 12893  		}
 12894  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12895  		x := v_0.Args[0]
 12896  		v.Reset(ssaop.OpARM64ANDconst)
 12897  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<32 - 1))
 12898  		v.AddArg(x)
 12899  		return true
 12900  	}
 12901  	// match: (MOVWUreg (MOVDconst [c]))
 12902  	// result: (MOVDconst [int64(uint32(c))])
 12903  	for {
 12904  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12905  			break
 12906  		}
 12907  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12908  		v.Reset(ssaop.OpARM64MOVDconst)
 12909  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c)))
 12910  		return true
 12911  	}
 12912  	// match: (MOVWUreg x)
 12913  	// cond: v.Type.Size() <= 4
 12914  	// result: x
 12915  	for {
 12916  		x := v_0
 12917  		if !(v.Type.Size() <= 4) {
 12918  			break
 12919  		}
 12920  		v.CopyOf(x)
 12921  		return true
 12922  	}
 12923  	// match: (MOVWUreg (SLLconst [lc] x))
 12924  	// cond: lc >= 32
 12925  	// result: (MOVDconst [0])
 12926  	for {
 12927  		if v_0.Op != ssaop.OpARM64SLLconst {
 12928  			break
 12929  		}
 12930  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12931  		if !(lc >= 32) {
 12932  			break
 12933  		}
 12934  		v.Reset(ssaop.OpARM64MOVDconst)
 12935  		v.AuxInt = ssa.Int64ToAuxInt(0)
 12936  		return true
 12937  	}
 12938  	// match: (MOVWUreg (SLLconst [lc] x))
 12939  	// cond: lc < 32
 12940  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 32-lc)] x)
 12941  	for {
 12942  		if v_0.Op != ssaop.OpARM64SLLconst {
 12943  			break
 12944  		}
 12945  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12946  		x := v_0.Args[0]
 12947  		if !(lc < 32) {
 12948  			break
 12949  		}
 12950  		v.Reset(ssaop.OpARM64UBFIZ)
 12951  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 32-lc))
 12952  		v.AddArg(x)
 12953  		return true
 12954  	}
 12955  	// match: (MOVWUreg (SRLconst [rc] x))
 12956  	// cond: rc < 32
 12957  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 32)] x)
 12958  	for {
 12959  		if v_0.Op != ssaop.OpARM64SRLconst {
 12960  			break
 12961  		}
 12962  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 12963  		x := v_0.Args[0]
 12964  		if !(rc < 32) {
 12965  			break
 12966  		}
 12967  		v.Reset(ssaop.OpARM64UBFX)
 12968  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32))
 12969  		v.AddArg(x)
 12970  		return true
 12971  	}
 12972  	// match: (MOVWUreg (UBFX [bfc] x))
 12973  	// cond: bfc.Width() <= 32
 12974  	// result: (UBFX [bfc] x)
 12975  	for {
 12976  		if v_0.Op != ssaop.OpARM64UBFX {
 12977  			break
 12978  		}
 12979  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 12980  		x := v_0.Args[0]
 12981  		if !(bfc.Width() <= 32) {
 12982  			break
 12983  		}
 12984  		v.Reset(ssaop.OpARM64UBFX)
 12985  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 12986  		v.AddArg(x)
 12987  		return true
 12988  	}
 12989  	return false
 12990  }
 12991  func rewriteValue_OpARM64MOVWload(v *ssa.Value) bool {
 12992  	v_1 := v.Args[1]
 12993  	v_0 := v.Args[0]
 12994  	b := v.Block
 12995  	config := b.Func.Config
 12996  	// match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem)
 12997  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12998  	// result: (MOVWload [off1+int32(off2)] {sym} ptr mem)
 12999  	for {
 13000  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 13001  		sym := ssa.AuxToSym(v.Aux)
 13002  		if v_0.Op != ssaop.OpARM64ADDconst {
 13003  			break
 13004  		}
 13005  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 13006  		ptr := v_0.Args[0]
 13007  		mem := v_1
 13008  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 13009  			break
 13010  		}
 13011  		v.Reset(ssaop.OpARM64MOVWload)
 13012  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 13013  		v.Aux = ssa.SymToAux(sym)
 13014  		v.AddArg2(ptr, mem)
 13015  		return true
 13016  	}
 13017  	// match: (MOVWload [off] {sym} (ADD ptr idx) mem)
 13018  	// cond: off == 0 && sym == nil
 13019  	// result: (MOVWloadidx ptr idx mem)
 13020  	for {
 13021  		off := ssa.AuxIntToInt32(v.AuxInt)
 13022  		sym := ssa.AuxToSym(v.Aux)
 13023  		if v_0.Op != ssaop.OpARM64ADD {
 13024  			break
 13025  		}
 13026  		idx := v_0.Args[1]
 13027  		ptr := v_0.Args[0]
 13028  		mem := v_1
 13029  		if !(off == 0 && sym == nil) {
 13030  			break
 13031  		}
 13032  		v.Reset(ssaop.OpARM64MOVWloadidx)
 13033  		v.AddArg3(ptr, idx, mem)
 13034  		return true
 13035  	}
 13036  	// match: (MOVWload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 13037  	// cond: off == 0 && sym == nil
 13038  	// result: (MOVWloadidx4 ptr idx mem)
 13039  	for {
 13040  		off := ssa.AuxIntToInt32(v.AuxInt)
 13041  		sym := ssa.AuxToSym(v.Aux)
 13042  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13043  			break
 13044  		}
 13045  		idx := v_0.Args[1]
 13046  		ptr := v_0.Args[0]
 13047  		mem := v_1
 13048  		if !(off == 0 && sym == nil) {
 13049  			break
 13050  		}
 13051  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 13052  		v.AddArg3(ptr, idx, mem)
 13053  		return true
 13054  	}
 13055  	// match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 13056  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 13057  	// result: (MOVWload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 13058  	for {
 13059  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 13060  		sym1 := ssa.AuxToSym(v.Aux)
 13061  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 13062  			break
 13063  		}
 13064  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 13065  		sym2 := ssa.AuxToSym(v_0.Aux)
 13066  		ptr := v_0.Args[0]
 13067  		mem := v_1
 13068  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 13069  			break
 13070  		}
 13071  		v.Reset(ssaop.OpARM64MOVWload)
 13072  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 13073  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 13074  		v.AddArg2(ptr, mem)
 13075  		return true
 13076  	}
 13077  	// match: (MOVWload [off] {sym} (SB) _)
 13078  	// cond: ssa.SymIsRO(sym)
 13079  	// result: (MOVDconst [int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
 13080  	for {
 13081  		off := ssa.AuxIntToInt32(v.AuxInt)
 13082  		sym := ssa.AuxToSym(v.Aux)
 13083  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 13084  			break
 13085  		}
 13086  		v.Reset(ssaop.OpARM64MOVDconst)
 13087  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
 13088  		return true
 13089  	}
 13090  	return false
 13091  }
 13092  func rewriteValue_OpARM64MOVWloadidx(v *ssa.Value) bool {
 13093  	v_2 := v.Args[2]
 13094  	v_1 := v.Args[1]
 13095  	v_0 := v.Args[0]
 13096  	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
 13097  	// cond: ssa.Is32Bit(c)
 13098  	// result: (MOVWload [int32(c)] ptr mem)
 13099  	for {
 13100  		ptr := v_0
 13101  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13102  			break
 13103  		}
 13104  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13105  		mem := v_2
 13106  		if !(ssa.Is32Bit(c)) {
 13107  			break
 13108  		}
 13109  		v.Reset(ssaop.OpARM64MOVWload)
 13110  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13111  		v.AddArg2(ptr, mem)
 13112  		return true
 13113  	}
 13114  	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
 13115  	// cond: ssa.Is32Bit(c)
 13116  	// result: (MOVWload [int32(c)] ptr mem)
 13117  	for {
 13118  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13119  			break
 13120  		}
 13121  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13122  		ptr := v_1
 13123  		mem := v_2
 13124  		if !(ssa.Is32Bit(c)) {
 13125  			break
 13126  		}
 13127  		v.Reset(ssaop.OpARM64MOVWload)
 13128  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13129  		v.AddArg2(ptr, mem)
 13130  		return true
 13131  	}
 13132  	// match: (MOVWloadidx ptr (SLLconst [2] idx) mem)
 13133  	// result: (MOVWloadidx4 ptr idx mem)
 13134  	for {
 13135  		ptr := v_0
 13136  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 13137  			break
 13138  		}
 13139  		idx := v_1.Args[0]
 13140  		mem := v_2
 13141  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 13142  		v.AddArg3(ptr, idx, mem)
 13143  		return true
 13144  	}
 13145  	// match: (MOVWloadidx (SLLconst [2] idx) ptr mem)
 13146  	// result: (MOVWloadidx4 ptr idx mem)
 13147  	for {
 13148  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13149  			break
 13150  		}
 13151  		idx := v_0.Args[0]
 13152  		ptr := v_1
 13153  		mem := v_2
 13154  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 13155  		v.AddArg3(ptr, idx, mem)
 13156  		return true
 13157  	}
 13158  	return false
 13159  }
 13160  func rewriteValue_OpARM64MOVWloadidx4(v *ssa.Value) bool {
 13161  	v_2 := v.Args[2]
 13162  	v_1 := v.Args[1]
 13163  	v_0 := v.Args[0]
 13164  	// match: (MOVWloadidx4 ptr (MOVDconst [c]) mem)
 13165  	// cond: ssa.Is32Bit(c<<2)
 13166  	// result: (MOVWload [int32(c)<<2] ptr mem)
 13167  	for {
 13168  		ptr := v_0
 13169  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13170  			break
 13171  		}
 13172  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13173  		mem := v_2
 13174  		if !(ssa.Is32Bit(c << 2)) {
 13175  			break
 13176  		}
 13177  		v.Reset(ssaop.OpARM64MOVWload)
 13178  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 13179  		v.AddArg2(ptr, mem)
 13180  		return true
 13181  	}
 13182  	return false
 13183  }
 13184  func rewriteValue_OpARM64MOVWreg(v *ssa.Value) bool {
 13185  	v_0 := v.Args[0]
 13186  	// match: (MOVWreg (MOVDconst [c]))
 13187  	// result: (MOVDconst [int64(int32(c))])
 13188  	for {
 13189  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13190  			break
 13191  		}
 13192  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13193  		v.Reset(ssaop.OpARM64MOVDconst)
 13194  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(c)))
 13195  		return true
 13196  	}
 13197  	// match: (MOVWreg x)
 13198  	// cond: v.Type.Size() <= 4
 13199  	// result: x
 13200  	for {
 13201  		x := v_0
 13202  		if !(v.Type.Size() <= 4) {
 13203  			break
 13204  		}
 13205  		v.CopyOf(x)
 13206  		return true
 13207  	}
 13208  	// match: (MOVWreg <t> (ANDconst x [c]))
 13209  	// cond: uint64(c) & uint64(0xffffffff80000000) == 0
 13210  	// result: (ANDconst <t> x [c])
 13211  	for {
 13212  		t := v.Type
 13213  		if v_0.Op != ssaop.OpARM64ANDconst {
 13214  			break
 13215  		}
 13216  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13217  		x := v_0.Args[0]
 13218  		if !(uint64(c)&uint64(0xffffffff80000000) == 0) {
 13219  			break
 13220  		}
 13221  		v.Reset(ssaop.OpARM64ANDconst)
 13222  		v.Type = t
 13223  		v.AuxInt = ssa.Int64ToAuxInt(c)
 13224  		v.AddArg(x)
 13225  		return true
 13226  	}
 13227  	// match: (MOVWreg (SLLconst [lc] x))
 13228  	// cond: lc < 32
 13229  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 32-lc)] x)
 13230  	for {
 13231  		if v_0.Op != ssaop.OpARM64SLLconst {
 13232  			break
 13233  		}
 13234  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 13235  		x := v_0.Args[0]
 13236  		if !(lc < 32) {
 13237  			break
 13238  		}
 13239  		v.Reset(ssaop.OpARM64SBFIZ)
 13240  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 32-lc))
 13241  		v.AddArg(x)
 13242  		return true
 13243  	}
 13244  	// match: (MOVWreg (SBFX [bfc] x))
 13245  	// cond: bfc.Width() <= 32
 13246  	// result: (SBFX [bfc] x)
 13247  	for {
 13248  		if v_0.Op != ssaop.OpARM64SBFX {
 13249  			break
 13250  		}
 13251  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 13252  		x := v_0.Args[0]
 13253  		if !(bfc.Width() <= 32) {
 13254  			break
 13255  		}
 13256  		v.Reset(ssaop.OpARM64SBFX)
 13257  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 13258  		v.AddArg(x)
 13259  		return true
 13260  	}
 13261  	return false
 13262  }
 13263  func rewriteValue_OpARM64MOVWstore(v *ssa.Value) bool {
 13264  	v_2 := v.Args[2]
 13265  	v_1 := v.Args[1]
 13266  	v_0 := v.Args[0]
 13267  	b := v.Block
 13268  	config := b.Func.Config
 13269  	// match: (MOVWstore [off] {sym} ptr (FMOVSfpgp val) mem)
 13270  	// result: (FMOVSstore [off] {sym} ptr val mem)
 13271  	for {
 13272  		off := ssa.AuxIntToInt32(v.AuxInt)
 13273  		sym := ssa.AuxToSym(v.Aux)
 13274  		ptr := v_0
 13275  		if v_1.Op != ssaop.OpARM64FMOVSfpgp {
 13276  			break
 13277  		}
 13278  		val := v_1.Args[0]
 13279  		mem := v_2
 13280  		v.Reset(ssaop.OpARM64FMOVSstore)
 13281  		v.AuxInt = ssa.Int32ToAuxInt(off)
 13282  		v.Aux = ssa.SymToAux(sym)
 13283  		v.AddArg3(ptr, val, mem)
 13284  		return true
 13285  	}
 13286  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 13287  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 13288  	// result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem)
 13289  	for {
 13290  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 13291  		sym := ssa.AuxToSym(v.Aux)
 13292  		if v_0.Op != ssaop.OpARM64ADDconst {
 13293  			break
 13294  		}
 13295  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 13296  		ptr := v_0.Args[0]
 13297  		val := v_1
 13298  		mem := v_2
 13299  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 13300  			break
 13301  		}
 13302  		v.Reset(ssaop.OpARM64MOVWstore)
 13303  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 13304  		v.Aux = ssa.SymToAux(sym)
 13305  		v.AddArg3(ptr, val, mem)
 13306  		return true
 13307  	}
 13308  	// match: (MOVWstore [off] {sym} (ADD ptr idx) val mem)
 13309  	// cond: off == 0 && sym == nil
 13310  	// result: (MOVWstoreidx ptr idx val mem)
 13311  	for {
 13312  		off := ssa.AuxIntToInt32(v.AuxInt)
 13313  		sym := ssa.AuxToSym(v.Aux)
 13314  		if v_0.Op != ssaop.OpARM64ADD {
 13315  			break
 13316  		}
 13317  		idx := v_0.Args[1]
 13318  		ptr := v_0.Args[0]
 13319  		val := v_1
 13320  		mem := v_2
 13321  		if !(off == 0 && sym == nil) {
 13322  			break
 13323  		}
 13324  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13325  		v.AddArg4(ptr, idx, val, mem)
 13326  		return true
 13327  	}
 13328  	// match: (MOVWstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
 13329  	// cond: off == 0 && sym == nil
 13330  	// result: (MOVWstoreidx4 ptr idx val mem)
 13331  	for {
 13332  		off := ssa.AuxIntToInt32(v.AuxInt)
 13333  		sym := ssa.AuxToSym(v.Aux)
 13334  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13335  			break
 13336  		}
 13337  		idx := v_0.Args[1]
 13338  		ptr := v_0.Args[0]
 13339  		val := v_1
 13340  		mem := v_2
 13341  		if !(off == 0 && sym == nil) {
 13342  			break
 13343  		}
 13344  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13345  		v.AddArg4(ptr, idx, val, mem)
 13346  		return true
 13347  	}
 13348  	// match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 13349  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 13350  	// result: (MOVWstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 13351  	for {
 13352  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 13353  		sym1 := ssa.AuxToSym(v.Aux)
 13354  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 13355  			break
 13356  		}
 13357  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 13358  		sym2 := ssa.AuxToSym(v_0.Aux)
 13359  		ptr := v_0.Args[0]
 13360  		val := v_1
 13361  		mem := v_2
 13362  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 13363  			break
 13364  		}
 13365  		v.Reset(ssaop.OpARM64MOVWstore)
 13366  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 13367  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 13368  		v.AddArg3(ptr, val, mem)
 13369  		return true
 13370  	}
 13371  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
 13372  	// result: (MOVWstore [off] {sym} ptr x mem)
 13373  	for {
 13374  		off := ssa.AuxIntToInt32(v.AuxInt)
 13375  		sym := ssa.AuxToSym(v.Aux)
 13376  		ptr := v_0
 13377  		if v_1.Op != ssaop.OpARM64MOVWreg {
 13378  			break
 13379  		}
 13380  		x := v_1.Args[0]
 13381  		mem := v_2
 13382  		v.Reset(ssaop.OpARM64MOVWstore)
 13383  		v.AuxInt = ssa.Int32ToAuxInt(off)
 13384  		v.Aux = ssa.SymToAux(sym)
 13385  		v.AddArg3(ptr, x, mem)
 13386  		return true
 13387  	}
 13388  	// match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
 13389  	// result: (MOVWstore [off] {sym} ptr x mem)
 13390  	for {
 13391  		off := ssa.AuxIntToInt32(v.AuxInt)
 13392  		sym := ssa.AuxToSym(v.Aux)
 13393  		ptr := v_0
 13394  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 13395  			break
 13396  		}
 13397  		x := v_1.Args[0]
 13398  		mem := v_2
 13399  		v.Reset(ssaop.OpARM64MOVWstore)
 13400  		v.AuxInt = ssa.Int32ToAuxInt(off)
 13401  		v.Aux = ssa.SymToAux(sym)
 13402  		v.AddArg3(ptr, x, mem)
 13403  		return true
 13404  	}
 13405  	return false
 13406  }
 13407  func rewriteValue_OpARM64MOVWstoreidx(v *ssa.Value) bool {
 13408  	v_3 := v.Args[3]
 13409  	v_2 := v.Args[2]
 13410  	v_1 := v.Args[1]
 13411  	v_0 := v.Args[0]
 13412  	// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
 13413  	// cond: ssa.Is32Bit(c)
 13414  	// result: (MOVWstore [int32(c)] ptr val mem)
 13415  	for {
 13416  		ptr := v_0
 13417  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13418  			break
 13419  		}
 13420  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13421  		val := v_2
 13422  		mem := v_3
 13423  		if !(ssa.Is32Bit(c)) {
 13424  			break
 13425  		}
 13426  		v.Reset(ssaop.OpARM64MOVWstore)
 13427  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13428  		v.AddArg3(ptr, val, mem)
 13429  		return true
 13430  	}
 13431  	// match: (MOVWstoreidx (MOVDconst [c]) idx val mem)
 13432  	// cond: ssa.Is32Bit(c)
 13433  	// result: (MOVWstore [int32(c)] idx val mem)
 13434  	for {
 13435  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13436  			break
 13437  		}
 13438  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13439  		idx := v_1
 13440  		val := v_2
 13441  		mem := v_3
 13442  		if !(ssa.Is32Bit(c)) {
 13443  			break
 13444  		}
 13445  		v.Reset(ssaop.OpARM64MOVWstore)
 13446  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13447  		v.AddArg3(idx, val, mem)
 13448  		return true
 13449  	}
 13450  	// match: (MOVWstoreidx ptr (SLLconst [2] idx) val mem)
 13451  	// result: (MOVWstoreidx4 ptr idx val mem)
 13452  	for {
 13453  		ptr := v_0
 13454  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 13455  			break
 13456  		}
 13457  		idx := v_1.Args[0]
 13458  		val := v_2
 13459  		mem := v_3
 13460  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13461  		v.AddArg4(ptr, idx, val, mem)
 13462  		return true
 13463  	}
 13464  	// match: (MOVWstoreidx (SLLconst [2] idx) ptr val mem)
 13465  	// result: (MOVWstoreidx4 ptr idx val mem)
 13466  	for {
 13467  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13468  			break
 13469  		}
 13470  		idx := v_0.Args[0]
 13471  		ptr := v_1
 13472  		val := v_2
 13473  		mem := v_3
 13474  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13475  		v.AddArg4(ptr, idx, val, mem)
 13476  		return true
 13477  	}
 13478  	// match: (MOVWstoreidx ptr idx (MOVWreg x) mem)
 13479  	// result: (MOVWstoreidx ptr idx x mem)
 13480  	for {
 13481  		ptr := v_0
 13482  		idx := v_1
 13483  		if v_2.Op != ssaop.OpARM64MOVWreg {
 13484  			break
 13485  		}
 13486  		x := v_2.Args[0]
 13487  		mem := v_3
 13488  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13489  		v.AddArg4(ptr, idx, x, mem)
 13490  		return true
 13491  	}
 13492  	// match: (MOVWstoreidx ptr idx (MOVWUreg x) mem)
 13493  	// result: (MOVWstoreidx ptr idx x mem)
 13494  	for {
 13495  		ptr := v_0
 13496  		idx := v_1
 13497  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 13498  			break
 13499  		}
 13500  		x := v_2.Args[0]
 13501  		mem := v_3
 13502  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13503  		v.AddArg4(ptr, idx, x, mem)
 13504  		return true
 13505  	}
 13506  	return false
 13507  }
 13508  func rewriteValue_OpARM64MOVWstoreidx4(v *ssa.Value) bool {
 13509  	v_3 := v.Args[3]
 13510  	v_2 := v.Args[2]
 13511  	v_1 := v.Args[1]
 13512  	v_0 := v.Args[0]
 13513  	// match: (MOVWstoreidx4 ptr (MOVDconst [c]) val mem)
 13514  	// cond: ssa.Is32Bit(c<<2)
 13515  	// result: (MOVWstore [int32(c)<<2] ptr val mem)
 13516  	for {
 13517  		ptr := v_0
 13518  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13519  			break
 13520  		}
 13521  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13522  		val := v_2
 13523  		mem := v_3
 13524  		if !(ssa.Is32Bit(c << 2)) {
 13525  			break
 13526  		}
 13527  		v.Reset(ssaop.OpARM64MOVWstore)
 13528  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 13529  		v.AddArg3(ptr, val, mem)
 13530  		return true
 13531  	}
 13532  	// match: (MOVWstoreidx4 ptr idx (MOVWreg x) mem)
 13533  	// result: (MOVWstoreidx4 ptr idx x mem)
 13534  	for {
 13535  		ptr := v_0
 13536  		idx := v_1
 13537  		if v_2.Op != ssaop.OpARM64MOVWreg {
 13538  			break
 13539  		}
 13540  		x := v_2.Args[0]
 13541  		mem := v_3
 13542  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13543  		v.AddArg4(ptr, idx, x, mem)
 13544  		return true
 13545  	}
 13546  	// match: (MOVWstoreidx4 ptr idx (MOVWUreg x) mem)
 13547  	// result: (MOVWstoreidx4 ptr idx x mem)
 13548  	for {
 13549  		ptr := v_0
 13550  		idx := v_1
 13551  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 13552  			break
 13553  		}
 13554  		x := v_2.Args[0]
 13555  		mem := v_3
 13556  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13557  		v.AddArg4(ptr, idx, x, mem)
 13558  		return true
 13559  	}
 13560  	return false
 13561  }
 13562  func rewriteValue_OpARM64MSUB(v *ssa.Value) bool {
 13563  	v_2 := v.Args[2]
 13564  	v_1 := v.Args[1]
 13565  	v_0 := v.Args[0]
 13566  	b := v.Block
 13567  	// match: (MSUB a x (MOVDconst [-1]))
 13568  	// result: (ADD a x)
 13569  	for {
 13570  		a := v_0
 13571  		x := v_1
 13572  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != -1 {
 13573  			break
 13574  		}
 13575  		v.Reset(ssaop.OpARM64ADD)
 13576  		v.AddArg2(a, x)
 13577  		return true
 13578  	}
 13579  	// match: (MSUB a _ (MOVDconst [0]))
 13580  	// result: a
 13581  	for {
 13582  		a := v_0
 13583  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 0 {
 13584  			break
 13585  		}
 13586  		v.CopyOf(a)
 13587  		return true
 13588  	}
 13589  	// match: (MSUB a x (MOVDconst [1]))
 13590  	// result: (SUB a x)
 13591  	for {
 13592  		a := v_0
 13593  		x := v_1
 13594  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 1 {
 13595  			break
 13596  		}
 13597  		v.Reset(ssaop.OpARM64SUB)
 13598  		v.AddArg2(a, x)
 13599  		return true
 13600  	}
 13601  	// match: (MSUB a x (MOVDconst [c]))
 13602  	// cond: ssa.IsPowerOfTwo(c)
 13603  	// result: (SUBshiftLL a x [ssa.Log64(c)])
 13604  	for {
 13605  		a := v_0
 13606  		x := v_1
 13607  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13608  			break
 13609  		}
 13610  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13611  		if !(ssa.IsPowerOfTwo(c)) {
 13612  			break
 13613  		}
 13614  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13615  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13616  		v.AddArg2(a, x)
 13617  		return true
 13618  	}
 13619  	// match: (MSUB a x (MOVDconst [c]))
 13620  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
 13621  	// result: (SUB a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
 13622  	for {
 13623  		a := v_0
 13624  		x := v_1
 13625  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13626  			break
 13627  		}
 13628  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13629  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 13630  			break
 13631  		}
 13632  		v.Reset(ssaop.OpARM64SUB)
 13633  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13634  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13635  		v0.AddArg2(x, x)
 13636  		v.AddArg2(a, v0)
 13637  		return true
 13638  	}
 13639  	// match: (MSUB a x (MOVDconst [c]))
 13640  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
 13641  	// result: (ADD a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
 13642  	for {
 13643  		a := v_0
 13644  		x := v_1
 13645  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13646  			break
 13647  		}
 13648  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13649  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 13650  			break
 13651  		}
 13652  		v.Reset(ssaop.OpARM64ADD)
 13653  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13654  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13655  		v0.AddArg2(x, x)
 13656  		v.AddArg2(a, v0)
 13657  		return true
 13658  	}
 13659  	// match: (MSUB a x (MOVDconst [c]))
 13660  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 13661  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
 13662  	for {
 13663  		a := v_0
 13664  		x := v_1
 13665  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13666  			break
 13667  		}
 13668  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13669  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 13670  			break
 13671  		}
 13672  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13673  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13674  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13675  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13676  		v0.AddArg2(x, x)
 13677  		v.AddArg2(a, v0)
 13678  		return true
 13679  	}
 13680  	// match: (MSUB a x (MOVDconst [c]))
 13681  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 13682  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
 13683  	for {
 13684  		a := v_0
 13685  		x := v_1
 13686  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13687  			break
 13688  		}
 13689  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13690  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 13691  			break
 13692  		}
 13693  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13694  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13695  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13696  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13697  		v0.AddArg2(x, x)
 13698  		v.AddArg2(a, v0)
 13699  		return true
 13700  	}
 13701  	// match: (MSUB a x (MOVDconst [c]))
 13702  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 13703  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
 13704  	for {
 13705  		a := v_0
 13706  		x := v_1
 13707  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13708  			break
 13709  		}
 13710  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13711  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 13712  			break
 13713  		}
 13714  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13715  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13716  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13717  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13718  		v0.AddArg2(x, x)
 13719  		v.AddArg2(a, v0)
 13720  		return true
 13721  	}
 13722  	// match: (MSUB a x (MOVDconst [c]))
 13723  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 13724  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
 13725  	for {
 13726  		a := v_0
 13727  		x := v_1
 13728  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13729  			break
 13730  		}
 13731  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13732  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 13733  			break
 13734  		}
 13735  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13736  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13737  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13738  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13739  		v0.AddArg2(x, x)
 13740  		v.AddArg2(a, v0)
 13741  		return true
 13742  	}
 13743  	// match: (MSUB a (MOVDconst [-1]) x)
 13744  	// result: (ADD a x)
 13745  	for {
 13746  		a := v_0
 13747  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
 13748  			break
 13749  		}
 13750  		x := v_2
 13751  		v.Reset(ssaop.OpARM64ADD)
 13752  		v.AddArg2(a, x)
 13753  		return true
 13754  	}
 13755  	// match: (MSUB a (MOVDconst [0]) _)
 13756  	// result: a
 13757  	for {
 13758  		a := v_0
 13759  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
 13760  			break
 13761  		}
 13762  		v.CopyOf(a)
 13763  		return true
 13764  	}
 13765  	// match: (MSUB a (MOVDconst [1]) x)
 13766  	// result: (SUB a x)
 13767  	for {
 13768  		a := v_0
 13769  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 13770  			break
 13771  		}
 13772  		x := v_2
 13773  		v.Reset(ssaop.OpARM64SUB)
 13774  		v.AddArg2(a, x)
 13775  		return true
 13776  	}
 13777  	// match: (MSUB a (MOVDconst [c]) x)
 13778  	// cond: ssa.IsPowerOfTwo(c)
 13779  	// result: (SUBshiftLL a x [ssa.Log64(c)])
 13780  	for {
 13781  		a := v_0
 13782  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13783  			break
 13784  		}
 13785  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13786  		x := v_2
 13787  		if !(ssa.IsPowerOfTwo(c)) {
 13788  			break
 13789  		}
 13790  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13791  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13792  		v.AddArg2(a, x)
 13793  		return true
 13794  	}
 13795  	// match: (MSUB a (MOVDconst [c]) x)
 13796  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
 13797  	// result: (SUB a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
 13798  	for {
 13799  		a := v_0
 13800  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13801  			break
 13802  		}
 13803  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13804  		x := v_2
 13805  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 13806  			break
 13807  		}
 13808  		v.Reset(ssaop.OpARM64SUB)
 13809  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13810  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13811  		v0.AddArg2(x, x)
 13812  		v.AddArg2(a, v0)
 13813  		return true
 13814  	}
 13815  	// match: (MSUB a (MOVDconst [c]) x)
 13816  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
 13817  	// result: (ADD a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
 13818  	for {
 13819  		a := v_0
 13820  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13821  			break
 13822  		}
 13823  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13824  		x := v_2
 13825  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 13826  			break
 13827  		}
 13828  		v.Reset(ssaop.OpARM64ADD)
 13829  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13830  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13831  		v0.AddArg2(x, x)
 13832  		v.AddArg2(a, v0)
 13833  		return true
 13834  	}
 13835  	// match: (MSUB a (MOVDconst [c]) x)
 13836  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 13837  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
 13838  	for {
 13839  		a := v_0
 13840  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13841  			break
 13842  		}
 13843  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13844  		x := v_2
 13845  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 13846  			break
 13847  		}
 13848  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13849  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13850  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13851  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13852  		v0.AddArg2(x, x)
 13853  		v.AddArg2(a, v0)
 13854  		return true
 13855  	}
 13856  	// match: (MSUB a (MOVDconst [c]) x)
 13857  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 13858  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
 13859  	for {
 13860  		a := v_0
 13861  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13862  			break
 13863  		}
 13864  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13865  		x := v_2
 13866  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 13867  			break
 13868  		}
 13869  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13870  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13871  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13872  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13873  		v0.AddArg2(x, x)
 13874  		v.AddArg2(a, v0)
 13875  		return true
 13876  	}
 13877  	// match: (MSUB a (MOVDconst [c]) x)
 13878  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 13879  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
 13880  	for {
 13881  		a := v_0
 13882  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13883  			break
 13884  		}
 13885  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13886  		x := v_2
 13887  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 13888  			break
 13889  		}
 13890  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13891  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13892  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13893  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13894  		v0.AddArg2(x, x)
 13895  		v.AddArg2(a, v0)
 13896  		return true
 13897  	}
 13898  	// match: (MSUB a (MOVDconst [c]) x)
 13899  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 13900  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
 13901  	for {
 13902  		a := v_0
 13903  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13904  			break
 13905  		}
 13906  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13907  		x := v_2
 13908  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 13909  			break
 13910  		}
 13911  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13912  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13913  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13914  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13915  		v0.AddArg2(x, x)
 13916  		v.AddArg2(a, v0)
 13917  		return true
 13918  	}
 13919  	// match: (MSUB (MOVDconst [c]) x y)
 13920  	// result: (ADDconst [c] (MNEG <x.Type> x y))
 13921  	for {
 13922  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13923  			break
 13924  		}
 13925  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13926  		x := v_1
 13927  		y := v_2
 13928  		v.Reset(ssaop.OpARM64ADDconst)
 13929  		v.AuxInt = ssa.Int64ToAuxInt(c)
 13930  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MNEG, x.Type)
 13931  		v0.AddArg2(x, y)
 13932  		v.AddArg(v0)
 13933  		return true
 13934  	}
 13935  	// match: (MSUB a (MOVDconst [c]) (MOVDconst [d]))
 13936  	// result: (SUBconst [c*d] a)
 13937  	for {
 13938  		a := v_0
 13939  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13940  			break
 13941  		}
 13942  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13943  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13944  			break
 13945  		}
 13946  		d := ssa.AuxIntToInt64(v_2.AuxInt)
 13947  		v.Reset(ssaop.OpARM64SUBconst)
 13948  		v.AuxInt = ssa.Int64ToAuxInt(c * d)
 13949  		v.AddArg(a)
 13950  		return true
 13951  	}
 13952  	return false
 13953  }
 13954  func rewriteValue_OpARM64MSUBW(v *ssa.Value) bool {
 13955  	v_2 := v.Args[2]
 13956  	v_1 := v.Args[1]
 13957  	v_0 := v.Args[0]
 13958  	b := v.Block
 13959  	// match: (MSUBW a x (MOVDconst [c]))
 13960  	// cond: int32(c)==-1
 13961  	// result: (MOVWUreg (ADD <a.Type> a x))
 13962  	for {
 13963  		a := v_0
 13964  		x := v_1
 13965  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13966  			break
 13967  		}
 13968  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13969  		if !(int32(c) == -1) {
 13970  			break
 13971  		}
 13972  		v.Reset(ssaop.OpARM64MOVWUreg)
 13973  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 13974  		v0.AddArg2(a, x)
 13975  		v.AddArg(v0)
 13976  		return true
 13977  	}
 13978  	// match: (MSUBW a _ (MOVDconst [c]))
 13979  	// cond: int32(c)==0
 13980  	// result: (MOVWUreg a)
 13981  	for {
 13982  		a := v_0
 13983  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13984  			break
 13985  		}
 13986  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13987  		if !(int32(c) == 0) {
 13988  			break
 13989  		}
 13990  		v.Reset(ssaop.OpARM64MOVWUreg)
 13991  		v.AddArg(a)
 13992  		return true
 13993  	}
 13994  	// match: (MSUBW a x (MOVDconst [c]))
 13995  	// cond: int32(c)==1
 13996  	// result: (MOVWUreg (SUB <a.Type> a x))
 13997  	for {
 13998  		a := v_0
 13999  		x := v_1
 14000  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14001  			break
 14002  		}
 14003  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14004  		if !(int32(c) == 1) {
 14005  			break
 14006  		}
 14007  		v.Reset(ssaop.OpARM64MOVWUreg)
 14008  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 14009  		v0.AddArg2(a, x)
 14010  		v.AddArg(v0)
 14011  		return true
 14012  	}
 14013  	// match: (MSUBW a x (MOVDconst [c]))
 14014  	// cond: ssa.IsPowerOfTwo(c)
 14015  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [ssa.Log64(c)]))
 14016  	for {
 14017  		a := v_0
 14018  		x := v_1
 14019  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14020  			break
 14021  		}
 14022  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14023  		if !(ssa.IsPowerOfTwo(c)) {
 14024  			break
 14025  		}
 14026  		v.Reset(ssaop.OpARM64MOVWUreg)
 14027  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14028  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 14029  		v0.AddArg2(a, x)
 14030  		v.AddArg(v0)
 14031  		return true
 14032  	}
 14033  	// match: (MSUBW a x (MOVDconst [c]))
 14034  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
 14035  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 14036  	for {
 14037  		a := v_0
 14038  		x := v_1
 14039  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14040  			break
 14041  		}
 14042  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14043  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 14044  			break
 14045  		}
 14046  		v.Reset(ssaop.OpARM64MOVWUreg)
 14047  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 14048  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14049  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 14050  		v1.AddArg2(x, x)
 14051  		v0.AddArg2(a, v1)
 14052  		v.AddArg(v0)
 14053  		return true
 14054  	}
 14055  	// match: (MSUBW a x (MOVDconst [c]))
 14056  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
 14057  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
 14058  	for {
 14059  		a := v_0
 14060  		x := v_1
 14061  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14062  			break
 14063  		}
 14064  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14065  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 14066  			break
 14067  		}
 14068  		v.Reset(ssaop.OpARM64MOVWUreg)
 14069  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 14070  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14071  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 14072  		v1.AddArg2(x, x)
 14073  		v0.AddArg2(a, v1)
 14074  		v.AddArg(v0)
 14075  		return true
 14076  	}
 14077  	// match: (MSUBW a x (MOVDconst [c]))
 14078  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 14079  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
 14080  	for {
 14081  		a := v_0
 14082  		x := v_1
 14083  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14084  			break
 14085  		}
 14086  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14087  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 14088  			break
 14089  		}
 14090  		v.Reset(ssaop.OpARM64MOVWUreg)
 14091  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 14092  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 14093  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14094  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 14095  		v1.AddArg2(x, x)
 14096  		v0.AddArg2(a, v1)
 14097  		v.AddArg(v0)
 14098  		return true
 14099  	}
 14100  	// match: (MSUBW a x (MOVDconst [c]))
 14101  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 14102  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
 14103  	for {
 14104  		a := v_0
 14105  		x := v_1
 14106  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14107  			break
 14108  		}
 14109  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14110  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 14111  			break
 14112  		}
 14113  		v.Reset(ssaop.OpARM64MOVWUreg)
 14114  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14115  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 14116  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14117  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 14118  		v1.AddArg2(x, x)
 14119  		v0.AddArg2(a, v1)
 14120  		v.AddArg(v0)
 14121  		return true
 14122  	}
 14123  	// match: (MSUBW a x (MOVDconst [c]))
 14124  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 14125  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
 14126  	for {
 14127  		a := v_0
 14128  		x := v_1
 14129  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14130  			break
 14131  		}
 14132  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14133  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 14134  			break
 14135  		}
 14136  		v.Reset(ssaop.OpARM64MOVWUreg)
 14137  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 14138  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 14139  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14140  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14141  		v1.AddArg2(x, x)
 14142  		v0.AddArg2(a, v1)
 14143  		v.AddArg(v0)
 14144  		return true
 14145  	}
 14146  	// match: (MSUBW a x (MOVDconst [c]))
 14147  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 14148  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
 14149  	for {
 14150  		a := v_0
 14151  		x := v_1
 14152  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14153  			break
 14154  		}
 14155  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14156  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 14157  			break
 14158  		}
 14159  		v.Reset(ssaop.OpARM64MOVWUreg)
 14160  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14161  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 14162  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14163  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14164  		v1.AddArg2(x, x)
 14165  		v0.AddArg2(a, v1)
 14166  		v.AddArg(v0)
 14167  		return true
 14168  	}
 14169  	// match: (MSUBW a (MOVDconst [c]) x)
 14170  	// cond: int32(c)==-1
 14171  	// result: (MOVWUreg (ADD <a.Type> a x))
 14172  	for {
 14173  		a := v_0
 14174  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14175  			break
 14176  		}
 14177  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14178  		x := v_2
 14179  		if !(int32(c) == -1) {
 14180  			break
 14181  		}
 14182  		v.Reset(ssaop.OpARM64MOVWUreg)
 14183  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 14184  		v0.AddArg2(a, x)
 14185  		v.AddArg(v0)
 14186  		return true
 14187  	}
 14188  	// match: (MSUBW a (MOVDconst [c]) _)
 14189  	// cond: int32(c)==0
 14190  	// result: (MOVWUreg a)
 14191  	for {
 14192  		a := v_0
 14193  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14194  			break
 14195  		}
 14196  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14197  		if !(int32(c) == 0) {
 14198  			break
 14199  		}
 14200  		v.Reset(ssaop.OpARM64MOVWUreg)
 14201  		v.AddArg(a)
 14202  		return true
 14203  	}
 14204  	// match: (MSUBW a (MOVDconst [c]) x)
 14205  	// cond: int32(c)==1
 14206  	// result: (MOVWUreg (SUB <a.Type> a x))
 14207  	for {
 14208  		a := v_0
 14209  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14210  			break
 14211  		}
 14212  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14213  		x := v_2
 14214  		if !(int32(c) == 1) {
 14215  			break
 14216  		}
 14217  		v.Reset(ssaop.OpARM64MOVWUreg)
 14218  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 14219  		v0.AddArg2(a, x)
 14220  		v.AddArg(v0)
 14221  		return true
 14222  	}
 14223  	// match: (MSUBW a (MOVDconst [c]) x)
 14224  	// cond: ssa.IsPowerOfTwo(c)
 14225  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [ssa.Log64(c)]))
 14226  	for {
 14227  		a := v_0
 14228  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14229  			break
 14230  		}
 14231  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14232  		x := v_2
 14233  		if !(ssa.IsPowerOfTwo(c)) {
 14234  			break
 14235  		}
 14236  		v.Reset(ssaop.OpARM64MOVWUreg)
 14237  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14238  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 14239  		v0.AddArg2(a, x)
 14240  		v.AddArg(v0)
 14241  		return true
 14242  	}
 14243  	// match: (MSUBW a (MOVDconst [c]) x)
 14244  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
 14245  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 14246  	for {
 14247  		a := v_0
 14248  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14249  			break
 14250  		}
 14251  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14252  		x := v_2
 14253  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 14254  			break
 14255  		}
 14256  		v.Reset(ssaop.OpARM64MOVWUreg)
 14257  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 14258  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14259  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 14260  		v1.AddArg2(x, x)
 14261  		v0.AddArg2(a, v1)
 14262  		v.AddArg(v0)
 14263  		return true
 14264  	}
 14265  	// match: (MSUBW a (MOVDconst [c]) x)
 14266  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
 14267  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
 14268  	for {
 14269  		a := v_0
 14270  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14271  			break
 14272  		}
 14273  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14274  		x := v_2
 14275  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 14276  			break
 14277  		}
 14278  		v.Reset(ssaop.OpARM64MOVWUreg)
 14279  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 14280  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14281  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 14282  		v1.AddArg2(x, x)
 14283  		v0.AddArg2(a, v1)
 14284  		v.AddArg(v0)
 14285  		return true
 14286  	}
 14287  	// match: (MSUBW a (MOVDconst [c]) x)
 14288  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 14289  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
 14290  	for {
 14291  		a := v_0
 14292  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14293  			break
 14294  		}
 14295  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14296  		x := v_2
 14297  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 14298  			break
 14299  		}
 14300  		v.Reset(ssaop.OpARM64MOVWUreg)
 14301  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 14302  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 14303  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14304  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 14305  		v1.AddArg2(x, x)
 14306  		v0.AddArg2(a, v1)
 14307  		v.AddArg(v0)
 14308  		return true
 14309  	}
 14310  	// match: (MSUBW a (MOVDconst [c]) x)
 14311  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 14312  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
 14313  	for {
 14314  		a := v_0
 14315  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14316  			break
 14317  		}
 14318  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14319  		x := v_2
 14320  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 14321  			break
 14322  		}
 14323  		v.Reset(ssaop.OpARM64MOVWUreg)
 14324  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14325  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 14326  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14327  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 14328  		v1.AddArg2(x, x)
 14329  		v0.AddArg2(a, v1)
 14330  		v.AddArg(v0)
 14331  		return true
 14332  	}
 14333  	// match: (MSUBW a (MOVDconst [c]) x)
 14334  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 14335  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
 14336  	for {
 14337  		a := v_0
 14338  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14339  			break
 14340  		}
 14341  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14342  		x := v_2
 14343  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 14344  			break
 14345  		}
 14346  		v.Reset(ssaop.OpARM64MOVWUreg)
 14347  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 14348  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 14349  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14350  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14351  		v1.AddArg2(x, x)
 14352  		v0.AddArg2(a, v1)
 14353  		v.AddArg(v0)
 14354  		return true
 14355  	}
 14356  	// match: (MSUBW a (MOVDconst [c]) x)
 14357  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 14358  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
 14359  	for {
 14360  		a := v_0
 14361  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14362  			break
 14363  		}
 14364  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14365  		x := v_2
 14366  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 14367  			break
 14368  		}
 14369  		v.Reset(ssaop.OpARM64MOVWUreg)
 14370  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14371  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 14372  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14373  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14374  		v1.AddArg2(x, x)
 14375  		v0.AddArg2(a, v1)
 14376  		v.AddArg(v0)
 14377  		return true
 14378  	}
 14379  	// match: (MSUBW (MOVDconst [c]) x y)
 14380  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MNEGW <x.Type> x y)))
 14381  	for {
 14382  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14383  			break
 14384  		}
 14385  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14386  		x := v_1
 14387  		y := v_2
 14388  		v.Reset(ssaop.OpARM64MOVWUreg)
 14389  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, x.Type)
 14390  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 14391  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MNEGW, x.Type)
 14392  		v1.AddArg2(x, y)
 14393  		v0.AddArg(v1)
 14394  		v.AddArg(v0)
 14395  		return true
 14396  	}
 14397  	// match: (MSUBW a (MOVDconst [c]) (MOVDconst [d]))
 14398  	// result: (MOVWUreg (SUBconst <a.Type> [c*d] a))
 14399  	for {
 14400  		a := v_0
 14401  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14402  			break
 14403  		}
 14404  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14405  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14406  			break
 14407  		}
 14408  		d := ssa.AuxIntToInt64(v_2.AuxInt)
 14409  		v.Reset(ssaop.OpARM64MOVWUreg)
 14410  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBconst, a.Type)
 14411  		v0.AuxInt = ssa.Int64ToAuxInt(c * d)
 14412  		v0.AddArg(a)
 14413  		v.AddArg(v0)
 14414  		return true
 14415  	}
 14416  	return false
 14417  }
 14418  func rewriteValue_OpARM64MUL(v *ssa.Value) bool {
 14419  	v_1 := v.Args[1]
 14420  	v_0 := v.Args[0]
 14421  	b := v.Block
 14422  	config := b.Func.Config
 14423  	// match: (MUL (NEG x) y)
 14424  	// result: (MNEG x y)
 14425  	for {
 14426  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14427  			if v_0.Op != ssaop.OpARM64NEG {
 14428  				continue
 14429  			}
 14430  			x := v_0.Args[0]
 14431  			y := v_1
 14432  			v.Reset(ssaop.OpARM64MNEG)
 14433  			v.AddArg2(x, y)
 14434  			return true
 14435  		}
 14436  		break
 14437  	}
 14438  	// match: (MUL _ (MOVDconst [0]))
 14439  	// result: (MOVDconst [0])
 14440  	for {
 14441  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14442  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
 14443  				continue
 14444  			}
 14445  			v.Reset(ssaop.OpARM64MOVDconst)
 14446  			v.AuxInt = ssa.Int64ToAuxInt(0)
 14447  			return true
 14448  		}
 14449  		break
 14450  	}
 14451  	// match: (MUL x (MOVDconst [1]))
 14452  	// result: x
 14453  	for {
 14454  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14455  			x := v_0
 14456  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 14457  				continue
 14458  			}
 14459  			v.CopyOf(x)
 14460  			return true
 14461  		}
 14462  		break
 14463  	}
 14464  	// match: (MUL x (MOVDconst [c]))
 14465  	// cond: ssa.CanMulStrengthReduce(config, c)
 14466  	// result: {ssa.MulStrengthReduce(v, x, c)}
 14467  	for {
 14468  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14469  			x := v_0
 14470  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14471  				continue
 14472  			}
 14473  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14474  			if !(ssa.CanMulStrengthReduce(config, c)) {
 14475  				continue
 14476  			}
 14477  			v.CopyOf(ssa.MulStrengthReduce(v, x, c))
 14478  			return true
 14479  		}
 14480  		break
 14481  	}
 14482  	// match: (MUL (MOVDconst [c]) (MOVDconst [d]))
 14483  	// result: (MOVDconst [c*d])
 14484  	for {
 14485  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14486  			if v_0.Op != ssaop.OpARM64MOVDconst {
 14487  				continue
 14488  			}
 14489  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 14490  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14491  				continue
 14492  			}
 14493  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 14494  			v.Reset(ssaop.OpARM64MOVDconst)
 14495  			v.AuxInt = ssa.Int64ToAuxInt(c * d)
 14496  			return true
 14497  		}
 14498  		break
 14499  	}
 14500  	// match: (MUL r:(MOVWUreg x) s:(MOVWUreg y))
 14501  	// cond: r.Uses == 1 && s.Uses == 1
 14502  	// result: (UMULL x y)
 14503  	for {
 14504  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14505  			r := v_0
 14506  			if r.Op != ssaop.OpARM64MOVWUreg {
 14507  				continue
 14508  			}
 14509  			x := r.Args[0]
 14510  			s := v_1
 14511  			if s.Op != ssaop.OpARM64MOVWUreg {
 14512  				continue
 14513  			}
 14514  			y := s.Args[0]
 14515  			if !(r.Uses == 1 && s.Uses == 1) {
 14516  				continue
 14517  			}
 14518  			v.Reset(ssaop.OpARM64UMULL)
 14519  			v.AddArg2(x, y)
 14520  			return true
 14521  		}
 14522  		break
 14523  	}
 14524  	// match: (MUL r:(MOVWreg x) s:(MOVWreg y))
 14525  	// cond: r.Uses == 1 && s.Uses == 1
 14526  	// result: (MULL x y)
 14527  	for {
 14528  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14529  			r := v_0
 14530  			if r.Op != ssaop.OpARM64MOVWreg {
 14531  				continue
 14532  			}
 14533  			x := r.Args[0]
 14534  			s := v_1
 14535  			if s.Op != ssaop.OpARM64MOVWreg {
 14536  				continue
 14537  			}
 14538  			y := s.Args[0]
 14539  			if !(r.Uses == 1 && s.Uses == 1) {
 14540  				continue
 14541  			}
 14542  			v.Reset(ssaop.OpARM64MULL)
 14543  			v.AddArg2(x, y)
 14544  			return true
 14545  		}
 14546  		break
 14547  	}
 14548  	return false
 14549  }
 14550  func rewriteValue_OpARM64MULW(v *ssa.Value) bool {
 14551  	v_1 := v.Args[1]
 14552  	v_0 := v.Args[0]
 14553  	b := v.Block
 14554  	config := b.Func.Config
 14555  	// match: (MULW (NEG x) y)
 14556  	// result: (MNEGW x y)
 14557  	for {
 14558  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14559  			if v_0.Op != ssaop.OpARM64NEG {
 14560  				continue
 14561  			}
 14562  			x := v_0.Args[0]
 14563  			y := v_1
 14564  			v.Reset(ssaop.OpARM64MNEGW)
 14565  			v.AddArg2(x, y)
 14566  			return true
 14567  		}
 14568  		break
 14569  	}
 14570  	// match: (MULW _ (MOVDconst [c]))
 14571  	// cond: int32(c)==0
 14572  	// result: (MOVDconst [0])
 14573  	for {
 14574  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14575  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14576  				continue
 14577  			}
 14578  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14579  			if !(int32(c) == 0) {
 14580  				continue
 14581  			}
 14582  			v.Reset(ssaop.OpARM64MOVDconst)
 14583  			v.AuxInt = ssa.Int64ToAuxInt(0)
 14584  			return true
 14585  		}
 14586  		break
 14587  	}
 14588  	// match: (MULW x (MOVDconst [c]))
 14589  	// cond: int32(c)==1
 14590  	// result: (MOVWUreg x)
 14591  	for {
 14592  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14593  			x := v_0
 14594  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14595  				continue
 14596  			}
 14597  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14598  			if !(int32(c) == 1) {
 14599  				continue
 14600  			}
 14601  			v.Reset(ssaop.OpARM64MOVWUreg)
 14602  			v.AddArg(x)
 14603  			return true
 14604  		}
 14605  		break
 14606  	}
 14607  	// match: (MULW x (MOVDconst [c]))
 14608  	// cond: v.Type.Size() <= 4 && ssa.CanMulStrengthReduce32(config, int32(c))
 14609  	// result: {ssa.MulStrengthReduce32(v, x, int32(c))}
 14610  	for {
 14611  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14612  			x := v_0
 14613  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14614  				continue
 14615  			}
 14616  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14617  			if !(v.Type.Size() <= 4 && ssa.CanMulStrengthReduce32(config, int32(c))) {
 14618  				continue
 14619  			}
 14620  			v.CopyOf(ssa.MulStrengthReduce32(v, x, int32(c)))
 14621  			return true
 14622  		}
 14623  		break
 14624  	}
 14625  	// match: (MULW (MOVDconst [c]) (MOVDconst [d]))
 14626  	// result: (MOVDconst [int64(uint32(c*d))])
 14627  	for {
 14628  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14629  			if v_0.Op != ssaop.OpARM64MOVDconst {
 14630  				continue
 14631  			}
 14632  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 14633  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14634  				continue
 14635  			}
 14636  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 14637  			v.Reset(ssaop.OpARM64MOVDconst)
 14638  			v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c * d)))
 14639  			return true
 14640  		}
 14641  		break
 14642  	}
 14643  	return false
 14644  }
 14645  func rewriteValue_OpARM64MVN(v *ssa.Value) bool {
 14646  	v_0 := v.Args[0]
 14647  	// match: (MVN (XOR x y))
 14648  	// result: (EON x y)
 14649  	for {
 14650  		if v_0.Op != ssaop.OpARM64XOR {
 14651  			break
 14652  		}
 14653  		y := v_0.Args[1]
 14654  		x := v_0.Args[0]
 14655  		v.Reset(ssaop.OpARM64EON)
 14656  		v.AddArg2(x, y)
 14657  		return true
 14658  	}
 14659  	// match: (MVN (MOVDconst [c]))
 14660  	// result: (MOVDconst [^c])
 14661  	for {
 14662  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14663  			break
 14664  		}
 14665  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14666  		v.Reset(ssaop.OpARM64MOVDconst)
 14667  		v.AuxInt = ssa.Int64ToAuxInt(^c)
 14668  		return true
 14669  	}
 14670  	// match: (MVN x:(SLLconst [c] y))
 14671  	// cond: ssa.ClobberIfDead(x)
 14672  	// result: (MVNshiftLL [c] y)
 14673  	for {
 14674  		x := v_0
 14675  		if x.Op != ssaop.OpARM64SLLconst {
 14676  			break
 14677  		}
 14678  		c := ssa.AuxIntToInt64(x.AuxInt)
 14679  		y := x.Args[0]
 14680  		if !(ssa.ClobberIfDead(x)) {
 14681  			break
 14682  		}
 14683  		v.Reset(ssaop.OpARM64MVNshiftLL)
 14684  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14685  		v.AddArg(y)
 14686  		return true
 14687  	}
 14688  	// match: (MVN x:(SRLconst [c] y))
 14689  	// cond: ssa.ClobberIfDead(x)
 14690  	// result: (MVNshiftRL [c] y)
 14691  	for {
 14692  		x := v_0
 14693  		if x.Op != ssaop.OpARM64SRLconst {
 14694  			break
 14695  		}
 14696  		c := ssa.AuxIntToInt64(x.AuxInt)
 14697  		y := x.Args[0]
 14698  		if !(ssa.ClobberIfDead(x)) {
 14699  			break
 14700  		}
 14701  		v.Reset(ssaop.OpARM64MVNshiftRL)
 14702  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14703  		v.AddArg(y)
 14704  		return true
 14705  	}
 14706  	// match: (MVN x:(SRAconst [c] y))
 14707  	// cond: ssa.ClobberIfDead(x)
 14708  	// result: (MVNshiftRA [c] y)
 14709  	for {
 14710  		x := v_0
 14711  		if x.Op != ssaop.OpARM64SRAconst {
 14712  			break
 14713  		}
 14714  		c := ssa.AuxIntToInt64(x.AuxInt)
 14715  		y := x.Args[0]
 14716  		if !(ssa.ClobberIfDead(x)) {
 14717  			break
 14718  		}
 14719  		v.Reset(ssaop.OpARM64MVNshiftRA)
 14720  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14721  		v.AddArg(y)
 14722  		return true
 14723  	}
 14724  	// match: (MVN x:(RORconst [c] y))
 14725  	// cond: ssa.ClobberIfDead(x)
 14726  	// result: (MVNshiftRO [c] y)
 14727  	for {
 14728  		x := v_0
 14729  		if x.Op != ssaop.OpARM64RORconst {
 14730  			break
 14731  		}
 14732  		c := ssa.AuxIntToInt64(x.AuxInt)
 14733  		y := x.Args[0]
 14734  		if !(ssa.ClobberIfDead(x)) {
 14735  			break
 14736  		}
 14737  		v.Reset(ssaop.OpARM64MVNshiftRO)
 14738  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14739  		v.AddArg(y)
 14740  		return true
 14741  	}
 14742  	return false
 14743  }
 14744  func rewriteValue_OpARM64MVNshiftLL(v *ssa.Value) bool {
 14745  	v_0 := v.Args[0]
 14746  	// match: (MVNshiftLL (MOVDconst [c]) [d])
 14747  	// result: (MOVDconst [^int64(uint64(c)<<uint64(d))])
 14748  	for {
 14749  		d := ssa.AuxIntToInt64(v.AuxInt)
 14750  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14751  			break
 14752  		}
 14753  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14754  		v.Reset(ssaop.OpARM64MOVDconst)
 14755  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 14756  		return true
 14757  	}
 14758  	return false
 14759  }
 14760  func rewriteValue_OpARM64MVNshiftRA(v *ssa.Value) bool {
 14761  	v_0 := v.Args[0]
 14762  	// match: (MVNshiftRA (MOVDconst [c]) [d])
 14763  	// result: (MOVDconst [^(c>>uint64(d))])
 14764  	for {
 14765  		d := ssa.AuxIntToInt64(v.AuxInt)
 14766  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14767  			break
 14768  		}
 14769  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14770  		v.Reset(ssaop.OpARM64MOVDconst)
 14771  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
 14772  		return true
 14773  	}
 14774  	return false
 14775  }
 14776  func rewriteValue_OpARM64MVNshiftRL(v *ssa.Value) bool {
 14777  	v_0 := v.Args[0]
 14778  	// match: (MVNshiftRL (MOVDconst [c]) [d])
 14779  	// result: (MOVDconst [^int64(uint64(c)>>uint64(d))])
 14780  	for {
 14781  		d := ssa.AuxIntToInt64(v.AuxInt)
 14782  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14783  			break
 14784  		}
 14785  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14786  		v.Reset(ssaop.OpARM64MOVDconst)
 14787  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 14788  		return true
 14789  	}
 14790  	return false
 14791  }
 14792  func rewriteValue_OpARM64MVNshiftRO(v *ssa.Value) bool {
 14793  	v_0 := v.Args[0]
 14794  	// match: (MVNshiftRO (MOVDconst [c]) [d])
 14795  	// result: (MOVDconst [^rotateRight64(c, d)])
 14796  	for {
 14797  		d := ssa.AuxIntToInt64(v.AuxInt)
 14798  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14799  			break
 14800  		}
 14801  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14802  		v.Reset(ssaop.OpARM64MOVDconst)
 14803  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
 14804  		return true
 14805  	}
 14806  	return false
 14807  }
 14808  func rewriteValue_OpARM64NEG(v *ssa.Value) bool {
 14809  	v_0 := v.Args[0]
 14810  	// match: (NEG (MUL x y))
 14811  	// result: (MNEG x y)
 14812  	for {
 14813  		if v_0.Op != ssaop.OpARM64MUL {
 14814  			break
 14815  		}
 14816  		y := v_0.Args[1]
 14817  		x := v_0.Args[0]
 14818  		v.Reset(ssaop.OpARM64MNEG)
 14819  		v.AddArg2(x, y)
 14820  		return true
 14821  	}
 14822  	// match: (NEG (MULW x y))
 14823  	// cond: v.Type.Size() <= 4
 14824  	// result: (MNEGW x y)
 14825  	for {
 14826  		if v_0.Op != ssaop.OpARM64MULW {
 14827  			break
 14828  		}
 14829  		y := v_0.Args[1]
 14830  		x := v_0.Args[0]
 14831  		if !(v.Type.Size() <= 4) {
 14832  			break
 14833  		}
 14834  		v.Reset(ssaop.OpARM64MNEGW)
 14835  		v.AddArg2(x, y)
 14836  		return true
 14837  	}
 14838  	// match: (NEG (SUB x y))
 14839  	// result: (SUB y x)
 14840  	for {
 14841  		if v_0.Op != ssaop.OpARM64SUB {
 14842  			break
 14843  		}
 14844  		y := v_0.Args[1]
 14845  		x := v_0.Args[0]
 14846  		v.Reset(ssaop.OpARM64SUB)
 14847  		v.AddArg2(y, x)
 14848  		return true
 14849  	}
 14850  	// match: (NEG (NEG x))
 14851  	// result: x
 14852  	for {
 14853  		if v_0.Op != ssaop.OpARM64NEG {
 14854  			break
 14855  		}
 14856  		x := v_0.Args[0]
 14857  		v.CopyOf(x)
 14858  		return true
 14859  	}
 14860  	// match: (NEG (MOVDconst [c]))
 14861  	// result: (MOVDconst [-c])
 14862  	for {
 14863  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14864  			break
 14865  		}
 14866  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14867  		v.Reset(ssaop.OpARM64MOVDconst)
 14868  		v.AuxInt = ssa.Int64ToAuxInt(-c)
 14869  		return true
 14870  	}
 14871  	// match: (NEG x:(SLLconst [c] y))
 14872  	// cond: ssa.ClobberIfDead(x)
 14873  	// result: (NEGshiftLL [c] y)
 14874  	for {
 14875  		x := v_0
 14876  		if x.Op != ssaop.OpARM64SLLconst {
 14877  			break
 14878  		}
 14879  		c := ssa.AuxIntToInt64(x.AuxInt)
 14880  		y := x.Args[0]
 14881  		if !(ssa.ClobberIfDead(x)) {
 14882  			break
 14883  		}
 14884  		v.Reset(ssaop.OpARM64NEGshiftLL)
 14885  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14886  		v.AddArg(y)
 14887  		return true
 14888  	}
 14889  	// match: (NEG x:(SRLconst [c] y))
 14890  	// cond: ssa.ClobberIfDead(x)
 14891  	// result: (NEGshiftRL [c] y)
 14892  	for {
 14893  		x := v_0
 14894  		if x.Op != ssaop.OpARM64SRLconst {
 14895  			break
 14896  		}
 14897  		c := ssa.AuxIntToInt64(x.AuxInt)
 14898  		y := x.Args[0]
 14899  		if !(ssa.ClobberIfDead(x)) {
 14900  			break
 14901  		}
 14902  		v.Reset(ssaop.OpARM64NEGshiftRL)
 14903  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14904  		v.AddArg(y)
 14905  		return true
 14906  	}
 14907  	// match: (NEG x:(SRAconst [c] y))
 14908  	// cond: ssa.ClobberIfDead(x)
 14909  	// result: (NEGshiftRA [c] y)
 14910  	for {
 14911  		x := v_0
 14912  		if x.Op != ssaop.OpARM64SRAconst {
 14913  			break
 14914  		}
 14915  		c := ssa.AuxIntToInt64(x.AuxInt)
 14916  		y := x.Args[0]
 14917  		if !(ssa.ClobberIfDead(x)) {
 14918  			break
 14919  		}
 14920  		v.Reset(ssaop.OpARM64NEGshiftRA)
 14921  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14922  		v.AddArg(y)
 14923  		return true
 14924  	}
 14925  	return false
 14926  }
 14927  func rewriteValue_OpARM64NEGshiftLL(v *ssa.Value) bool {
 14928  	v_0 := v.Args[0]
 14929  	// match: (NEGshiftLL (MOVDconst [c]) [d])
 14930  	// result: (MOVDconst [-int64(uint64(c)<<uint64(d))])
 14931  	for {
 14932  		d := ssa.AuxIntToInt64(v.AuxInt)
 14933  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14934  			break
 14935  		}
 14936  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14937  		v.Reset(ssaop.OpARM64MOVDconst)
 14938  		v.AuxInt = ssa.Int64ToAuxInt(-int64(uint64(c) << uint64(d)))
 14939  		return true
 14940  	}
 14941  	return false
 14942  }
 14943  func rewriteValue_OpARM64NEGshiftRA(v *ssa.Value) bool {
 14944  	v_0 := v.Args[0]
 14945  	// match: (NEGshiftRA (MOVDconst [c]) [d])
 14946  	// result: (MOVDconst [-(c>>uint64(d))])
 14947  	for {
 14948  		d := ssa.AuxIntToInt64(v.AuxInt)
 14949  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14950  			break
 14951  		}
 14952  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14953  		v.Reset(ssaop.OpARM64MOVDconst)
 14954  		v.AuxInt = ssa.Int64ToAuxInt(-(c >> uint64(d)))
 14955  		return true
 14956  	}
 14957  	return false
 14958  }
 14959  func rewriteValue_OpARM64NEGshiftRL(v *ssa.Value) bool {
 14960  	v_0 := v.Args[0]
 14961  	// match: (NEGshiftRL (MOVDconst [c]) [d])
 14962  	// result: (MOVDconst [-int64(uint64(c)>>uint64(d))])
 14963  	for {
 14964  		d := ssa.AuxIntToInt64(v.AuxInt)
 14965  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14966  			break
 14967  		}
 14968  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14969  		v.Reset(ssaop.OpARM64MOVDconst)
 14970  		v.AuxInt = ssa.Int64ToAuxInt(-int64(uint64(c) >> uint64(d)))
 14971  		return true
 14972  	}
 14973  	return false
 14974  }
 14975  func rewriteValue_OpARM64NotEqual(v *ssa.Value) bool {
 14976  	v_0 := v.Args[0]
 14977  	b := v.Block
 14978  	// match: (NotEqual (CMPconst [0] z:(AND x y)))
 14979  	// cond: z.Uses == 1
 14980  	// result: (NotEqual (TST x y))
 14981  	for {
 14982  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14983  			break
 14984  		}
 14985  		z := v_0.Args[0]
 14986  		if z.Op != ssaop.OpARM64AND {
 14987  			break
 14988  		}
 14989  		y := z.Args[1]
 14990  		x := z.Args[0]
 14991  		if !(z.Uses == 1) {
 14992  			break
 14993  		}
 14994  		v.Reset(ssaop.OpARM64NotEqual)
 14995  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
 14996  		v0.AddArg2(x, y)
 14997  		v.AddArg(v0)
 14998  		return true
 14999  	}
 15000  	// match: (NotEqual (CMPWconst [0] x:(ANDconst [c] y)))
 15001  	// cond: x.Uses == 1
 15002  	// result: (NotEqual (TSTWconst [int32(c)] y))
 15003  	for {
 15004  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15005  			break
 15006  		}
 15007  		x := v_0.Args[0]
 15008  		if x.Op != ssaop.OpARM64ANDconst {
 15009  			break
 15010  		}
 15011  		c := ssa.AuxIntToInt64(x.AuxInt)
 15012  		y := x.Args[0]
 15013  		if !(x.Uses == 1) {
 15014  			break
 15015  		}
 15016  		v.Reset(ssaop.OpARM64NotEqual)
 15017  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 15018  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 15019  		v0.AddArg(y)
 15020  		v.AddArg(v0)
 15021  		return true
 15022  	}
 15023  	// match: (NotEqual (CMPWconst [0] z:(AND x y)))
 15024  	// cond: z.Uses == 1
 15025  	// result: (NotEqual (TSTW x y))
 15026  	for {
 15027  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15028  			break
 15029  		}
 15030  		z := v_0.Args[0]
 15031  		if z.Op != ssaop.OpARM64AND {
 15032  			break
 15033  		}
 15034  		y := z.Args[1]
 15035  		x := z.Args[0]
 15036  		if !(z.Uses == 1) {
 15037  			break
 15038  		}
 15039  		v.Reset(ssaop.OpARM64NotEqual)
 15040  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 15041  		v0.AddArg2(x, y)
 15042  		v.AddArg(v0)
 15043  		return true
 15044  	}
 15045  	// match: (NotEqual (CMPconst [0] x:(ANDconst [c] y)))
 15046  	// cond: x.Uses == 1
 15047  	// result: (NotEqual (TSTconst [c] y))
 15048  	for {
 15049  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15050  			break
 15051  		}
 15052  		x := v_0.Args[0]
 15053  		if x.Op != ssaop.OpARM64ANDconst {
 15054  			break
 15055  		}
 15056  		c := ssa.AuxIntToInt64(x.AuxInt)
 15057  		y := x.Args[0]
 15058  		if !(x.Uses == 1) {
 15059  			break
 15060  		}
 15061  		v.Reset(ssaop.OpARM64NotEqual)
 15062  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 15063  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 15064  		v0.AddArg(y)
 15065  		v.AddArg(v0)
 15066  		return true
 15067  	}
 15068  	// match: (NotEqual (CMP x z:(NEG y)))
 15069  	// cond: z.Uses == 1
 15070  	// result: (NotEqual (CMN x y))
 15071  	for {
 15072  		if v_0.Op != ssaop.OpARM64CMP {
 15073  			break
 15074  		}
 15075  		_ = v_0.Args[1]
 15076  		x := v_0.Args[0]
 15077  		z := v_0.Args[1]
 15078  		if z.Op != ssaop.OpARM64NEG {
 15079  			break
 15080  		}
 15081  		y := z.Args[0]
 15082  		if !(z.Uses == 1) {
 15083  			break
 15084  		}
 15085  		v.Reset(ssaop.OpARM64NotEqual)
 15086  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 15087  		v0.AddArg2(x, y)
 15088  		v.AddArg(v0)
 15089  		return true
 15090  	}
 15091  	// match: (NotEqual (CMPW x z:(NEG y)))
 15092  	// cond: z.Uses == 1
 15093  	// result: (NotEqual (CMNW x y))
 15094  	for {
 15095  		if v_0.Op != ssaop.OpARM64CMPW {
 15096  			break
 15097  		}
 15098  		_ = v_0.Args[1]
 15099  		x := v_0.Args[0]
 15100  		z := v_0.Args[1]
 15101  		if z.Op != ssaop.OpARM64NEG {
 15102  			break
 15103  		}
 15104  		y := z.Args[0]
 15105  		if !(z.Uses == 1) {
 15106  			break
 15107  		}
 15108  		v.Reset(ssaop.OpARM64NotEqual)
 15109  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 15110  		v0.AddArg2(x, y)
 15111  		v.AddArg(v0)
 15112  		return true
 15113  	}
 15114  	// match: (NotEqual (CMPconst [0] x:(ADDconst [c] y)))
 15115  	// cond: x.Uses == 1
 15116  	// result: (NotEqual (CMNconst [c] y))
 15117  	for {
 15118  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15119  			break
 15120  		}
 15121  		x := v_0.Args[0]
 15122  		if x.Op != ssaop.OpARM64ADDconst {
 15123  			break
 15124  		}
 15125  		c := ssa.AuxIntToInt64(x.AuxInt)
 15126  		y := x.Args[0]
 15127  		if !(x.Uses == 1) {
 15128  			break
 15129  		}
 15130  		v.Reset(ssaop.OpARM64NotEqual)
 15131  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 15132  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 15133  		v0.AddArg(y)
 15134  		v.AddArg(v0)
 15135  		return true
 15136  	}
 15137  	// match: (NotEqual (CMPWconst [0] x:(ADDconst [c] y)))
 15138  	// cond: x.Uses == 1
 15139  	// result: (NotEqual (CMNWconst [int32(c)] y))
 15140  	for {
 15141  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15142  			break
 15143  		}
 15144  		x := v_0.Args[0]
 15145  		if x.Op != ssaop.OpARM64ADDconst {
 15146  			break
 15147  		}
 15148  		c := ssa.AuxIntToInt64(x.AuxInt)
 15149  		y := x.Args[0]
 15150  		if !(x.Uses == 1) {
 15151  			break
 15152  		}
 15153  		v.Reset(ssaop.OpARM64NotEqual)
 15154  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 15155  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 15156  		v0.AddArg(y)
 15157  		v.AddArg(v0)
 15158  		return true
 15159  	}
 15160  	// match: (NotEqual (CMPconst [0] z:(ADD x y)))
 15161  	// cond: z.Uses == 1
 15162  	// result: (NotEqual (CMN x y))
 15163  	for {
 15164  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15165  			break
 15166  		}
 15167  		z := v_0.Args[0]
 15168  		if z.Op != ssaop.OpARM64ADD {
 15169  			break
 15170  		}
 15171  		y := z.Args[1]
 15172  		x := z.Args[0]
 15173  		if !(z.Uses == 1) {
 15174  			break
 15175  		}
 15176  		v.Reset(ssaop.OpARM64NotEqual)
 15177  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 15178  		v0.AddArg2(x, y)
 15179  		v.AddArg(v0)
 15180  		return true
 15181  	}
 15182  	// match: (NotEqual (CMPWconst [0] z:(ADD x y)))
 15183  	// cond: z.Uses == 1
 15184  	// result: (NotEqual (CMNW x y))
 15185  	for {
 15186  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15187  			break
 15188  		}
 15189  		z := v_0.Args[0]
 15190  		if z.Op != ssaop.OpARM64ADD {
 15191  			break
 15192  		}
 15193  		y := z.Args[1]
 15194  		x := z.Args[0]
 15195  		if !(z.Uses == 1) {
 15196  			break
 15197  		}
 15198  		v.Reset(ssaop.OpARM64NotEqual)
 15199  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 15200  		v0.AddArg2(x, y)
 15201  		v.AddArg(v0)
 15202  		return true
 15203  	}
 15204  	// match: (NotEqual (CMPconst [0] z:(MADD a x y)))
 15205  	// cond: z.Uses == 1
 15206  	// result: (NotEqual (CMN a (MUL <x.Type> x y)))
 15207  	for {
 15208  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15209  			break
 15210  		}
 15211  		z := v_0.Args[0]
 15212  		if z.Op != ssaop.OpARM64MADD {
 15213  			break
 15214  		}
 15215  		y := z.Args[2]
 15216  		a := z.Args[0]
 15217  		x := z.Args[1]
 15218  		if !(z.Uses == 1) {
 15219  			break
 15220  		}
 15221  		v.Reset(ssaop.OpARM64NotEqual)
 15222  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 15223  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
 15224  		v1.AddArg2(x, y)
 15225  		v0.AddArg2(a, v1)
 15226  		v.AddArg(v0)
 15227  		return true
 15228  	}
 15229  	// match: (NotEqual (CMPWconst [0] z:(MADDW a x y)))
 15230  	// cond: z.Uses == 1
 15231  	// result: (NotEqual (CMNW a (MULW <x.Type> x y)))
 15232  	for {
 15233  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15234  			break
 15235  		}
 15236  		z := v_0.Args[0]
 15237  		if z.Op != ssaop.OpARM64MADDW {
 15238  			break
 15239  		}
 15240  		y := z.Args[2]
 15241  		a := z.Args[0]
 15242  		x := z.Args[1]
 15243  		if !(z.Uses == 1) {
 15244  			break
 15245  		}
 15246  		v.Reset(ssaop.OpARM64NotEqual)
 15247  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 15248  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
 15249  		v1.AddArg2(x, y)
 15250  		v0.AddArg2(a, v1)
 15251  		v.AddArg(v0)
 15252  		return true
 15253  	}
 15254  	// match: (NotEqual (CMPconst [0] z:(MSUB a x y)))
 15255  	// cond: z.Uses == 1
 15256  	// result: (NotEqual (CMP a (MUL <x.Type> x y)))
 15257  	for {
 15258  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15259  			break
 15260  		}
 15261  		z := v_0.Args[0]
 15262  		if z.Op != ssaop.OpARM64MSUB {
 15263  			break
 15264  		}
 15265  		y := z.Args[2]
 15266  		a := z.Args[0]
 15267  		x := z.Args[1]
 15268  		if !(z.Uses == 1) {
 15269  			break
 15270  		}
 15271  		v.Reset(ssaop.OpARM64NotEqual)
 15272  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 15273  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
 15274  		v1.AddArg2(x, y)
 15275  		v0.AddArg2(a, v1)
 15276  		v.AddArg(v0)
 15277  		return true
 15278  	}
 15279  	// match: (NotEqual (CMPWconst [0] z:(MSUBW a x y)))
 15280  	// cond: z.Uses == 1
 15281  	// result: (NotEqual (CMPW a (MULW <x.Type> x y)))
 15282  	for {
 15283  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15284  			break
 15285  		}
 15286  		z := v_0.Args[0]
 15287  		if z.Op != ssaop.OpARM64MSUBW {
 15288  			break
 15289  		}
 15290  		y := z.Args[2]
 15291  		a := z.Args[0]
 15292  		x := z.Args[1]
 15293  		if !(z.Uses == 1) {
 15294  			break
 15295  		}
 15296  		v.Reset(ssaop.OpARM64NotEqual)
 15297  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 15298  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
 15299  		v1.AddArg2(x, y)
 15300  		v0.AddArg2(a, v1)
 15301  		v.AddArg(v0)
 15302  		return true
 15303  	}
 15304  	// match: (NotEqual (FlagConstant [fc]))
 15305  	// result: (MOVDconst [ssa.B2i(fc.Ne())])
 15306  	for {
 15307  		if v_0.Op != ssaop.OpARM64FlagConstant {
 15308  			break
 15309  		}
 15310  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 15311  		v.Reset(ssaop.OpARM64MOVDconst)
 15312  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ne()))
 15313  		return true
 15314  	}
 15315  	// match: (NotEqual (InvertFlags x))
 15316  	// result: (NotEqual x)
 15317  	for {
 15318  		if v_0.Op != ssaop.OpARM64InvertFlags {
 15319  			break
 15320  		}
 15321  		x := v_0.Args[0]
 15322  		v.Reset(ssaop.OpARM64NotEqual)
 15323  		v.AddArg(x)
 15324  		return true
 15325  	}
 15326  	return false
 15327  }
 15328  func rewriteValue_OpARM64OR(v *ssa.Value) bool {
 15329  	v_1 := v.Args[1]
 15330  	v_0 := v.Args[0]
 15331  	// match: (OR x (MOVDconst [c]))
 15332  	// result: (ORconst [c] x)
 15333  	for {
 15334  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15335  			x := v_0
 15336  			if v_1.Op != ssaop.OpARM64MOVDconst {
 15337  				continue
 15338  			}
 15339  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 15340  			v.Reset(ssaop.OpARM64ORconst)
 15341  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15342  			v.AddArg(x)
 15343  			return true
 15344  		}
 15345  		break
 15346  	}
 15347  	// match: (OR x x)
 15348  	// result: x
 15349  	for {
 15350  		x := v_0
 15351  		if x != v_1 {
 15352  			break
 15353  		}
 15354  		v.CopyOf(x)
 15355  		return true
 15356  	}
 15357  	// match: (OR x (MVN y))
 15358  	// result: (ORN x y)
 15359  	for {
 15360  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15361  			x := v_0
 15362  			if v_1.Op != ssaop.OpARM64MVN {
 15363  				continue
 15364  			}
 15365  			y := v_1.Args[0]
 15366  			v.Reset(ssaop.OpARM64ORN)
 15367  			v.AddArg2(x, y)
 15368  			return true
 15369  		}
 15370  		break
 15371  	}
 15372  	// match: (OR x0 x1:(SLLconst [c] y))
 15373  	// cond: ssa.ClobberIfDead(x1)
 15374  	// result: (ORshiftLL x0 y [c])
 15375  	for {
 15376  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15377  			x0 := v_0
 15378  			x1 := v_1
 15379  			if x1.Op != ssaop.OpARM64SLLconst {
 15380  				continue
 15381  			}
 15382  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15383  			y := x1.Args[0]
 15384  			if !(ssa.ClobberIfDead(x1)) {
 15385  				continue
 15386  			}
 15387  			v.Reset(ssaop.OpARM64ORshiftLL)
 15388  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15389  			v.AddArg2(x0, y)
 15390  			return true
 15391  		}
 15392  		break
 15393  	}
 15394  	// match: (OR x0 x1:(SRLconst [c] y))
 15395  	// cond: ssa.ClobberIfDead(x1)
 15396  	// result: (ORshiftRL x0 y [c])
 15397  	for {
 15398  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15399  			x0 := v_0
 15400  			x1 := v_1
 15401  			if x1.Op != ssaop.OpARM64SRLconst {
 15402  				continue
 15403  			}
 15404  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15405  			y := x1.Args[0]
 15406  			if !(ssa.ClobberIfDead(x1)) {
 15407  				continue
 15408  			}
 15409  			v.Reset(ssaop.OpARM64ORshiftRL)
 15410  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15411  			v.AddArg2(x0, y)
 15412  			return true
 15413  		}
 15414  		break
 15415  	}
 15416  	// match: (OR x0 x1:(SRAconst [c] y))
 15417  	// cond: ssa.ClobberIfDead(x1)
 15418  	// result: (ORshiftRA x0 y [c])
 15419  	for {
 15420  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15421  			x0 := v_0
 15422  			x1 := v_1
 15423  			if x1.Op != ssaop.OpARM64SRAconst {
 15424  				continue
 15425  			}
 15426  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15427  			y := x1.Args[0]
 15428  			if !(ssa.ClobberIfDead(x1)) {
 15429  				continue
 15430  			}
 15431  			v.Reset(ssaop.OpARM64ORshiftRA)
 15432  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15433  			v.AddArg2(x0, y)
 15434  			return true
 15435  		}
 15436  		break
 15437  	}
 15438  	// match: (OR x0 x1:(RORconst [c] y))
 15439  	// cond: ssa.ClobberIfDead(x1)
 15440  	// result: (ORshiftRO x0 y [c])
 15441  	for {
 15442  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15443  			x0 := v_0
 15444  			x1 := v_1
 15445  			if x1.Op != ssaop.OpARM64RORconst {
 15446  				continue
 15447  			}
 15448  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15449  			y := x1.Args[0]
 15450  			if !(ssa.ClobberIfDead(x1)) {
 15451  				continue
 15452  			}
 15453  			v.Reset(ssaop.OpARM64ORshiftRO)
 15454  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15455  			v.AddArg2(x0, y)
 15456  			return true
 15457  		}
 15458  		break
 15459  	}
 15460  	// match: (OR (UBFIZ [bfc] x) (ANDconst [ac] y))
 15461  	// cond: ac == ^((1<<uint(bfc.Width())-1) << uint(bfc.Lsb()))
 15462  	// result: (BFI [bfc] y x)
 15463  	for {
 15464  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15465  			if v_0.Op != ssaop.OpARM64UBFIZ {
 15466  				continue
 15467  			}
 15468  			bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15469  			x := v_0.Args[0]
 15470  			if v_1.Op != ssaop.OpARM64ANDconst {
 15471  				continue
 15472  			}
 15473  			ac := ssa.AuxIntToInt64(v_1.AuxInt)
 15474  			y := v_1.Args[0]
 15475  			if !(ac == ^((1<<uint(bfc.Width()) - 1) << uint(bfc.Lsb()))) {
 15476  				continue
 15477  			}
 15478  			v.Reset(ssaop.OpARM64BFI)
 15479  			v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15480  			v.AddArg2(y, x)
 15481  			return true
 15482  		}
 15483  		break
 15484  	}
 15485  	// match: (OR (UBFX [bfc] x) (ANDconst [ac] y))
 15486  	// cond: ac == ^(1<<uint(bfc.Width())-1)
 15487  	// result: (BFXIL [bfc] y x)
 15488  	for {
 15489  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15490  			if v_0.Op != ssaop.OpARM64UBFX {
 15491  				continue
 15492  			}
 15493  			bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15494  			x := v_0.Args[0]
 15495  			if v_1.Op != ssaop.OpARM64ANDconst {
 15496  				continue
 15497  			}
 15498  			ac := ssa.AuxIntToInt64(v_1.AuxInt)
 15499  			y := v_1.Args[0]
 15500  			if !(ac == ^(1<<uint(bfc.Width()) - 1)) {
 15501  				continue
 15502  			}
 15503  			v.Reset(ssaop.OpARM64BFXIL)
 15504  			v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15505  			v.AddArg2(y, x)
 15506  			return true
 15507  		}
 15508  		break
 15509  	}
 15510  	return false
 15511  }
 15512  func rewriteValue_OpARM64ORN(v *ssa.Value) bool {
 15513  	v_1 := v.Args[1]
 15514  	v_0 := v.Args[0]
 15515  	// match: (ORN x (MOVDconst [c]))
 15516  	// result: (ORconst [^c] x)
 15517  	for {
 15518  		x := v_0
 15519  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15520  			break
 15521  		}
 15522  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15523  		v.Reset(ssaop.OpARM64ORconst)
 15524  		v.AuxInt = ssa.Int64ToAuxInt(^c)
 15525  		v.AddArg(x)
 15526  		return true
 15527  	}
 15528  	// match: (ORN x x)
 15529  	// result: (MOVDconst [-1])
 15530  	for {
 15531  		x := v_0
 15532  		if x != v_1 {
 15533  			break
 15534  		}
 15535  		v.Reset(ssaop.OpARM64MOVDconst)
 15536  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15537  		return true
 15538  	}
 15539  	// match: (ORN x0 x1:(SLLconst [c] y))
 15540  	// cond: ssa.ClobberIfDead(x1)
 15541  	// result: (ORNshiftLL x0 y [c])
 15542  	for {
 15543  		x0 := v_0
 15544  		x1 := v_1
 15545  		if x1.Op != ssaop.OpARM64SLLconst {
 15546  			break
 15547  		}
 15548  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15549  		y := x1.Args[0]
 15550  		if !(ssa.ClobberIfDead(x1)) {
 15551  			break
 15552  		}
 15553  		v.Reset(ssaop.OpARM64ORNshiftLL)
 15554  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15555  		v.AddArg2(x0, y)
 15556  		return true
 15557  	}
 15558  	// match: (ORN x0 x1:(SRLconst [c] y))
 15559  	// cond: ssa.ClobberIfDead(x1)
 15560  	// result: (ORNshiftRL x0 y [c])
 15561  	for {
 15562  		x0 := v_0
 15563  		x1 := v_1
 15564  		if x1.Op != ssaop.OpARM64SRLconst {
 15565  			break
 15566  		}
 15567  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15568  		y := x1.Args[0]
 15569  		if !(ssa.ClobberIfDead(x1)) {
 15570  			break
 15571  		}
 15572  		v.Reset(ssaop.OpARM64ORNshiftRL)
 15573  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15574  		v.AddArg2(x0, y)
 15575  		return true
 15576  	}
 15577  	// match: (ORN x0 x1:(SRAconst [c] y))
 15578  	// cond: ssa.ClobberIfDead(x1)
 15579  	// result: (ORNshiftRA x0 y [c])
 15580  	for {
 15581  		x0 := v_0
 15582  		x1 := v_1
 15583  		if x1.Op != ssaop.OpARM64SRAconst {
 15584  			break
 15585  		}
 15586  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15587  		y := x1.Args[0]
 15588  		if !(ssa.ClobberIfDead(x1)) {
 15589  			break
 15590  		}
 15591  		v.Reset(ssaop.OpARM64ORNshiftRA)
 15592  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15593  		v.AddArg2(x0, y)
 15594  		return true
 15595  	}
 15596  	// match: (ORN x0 x1:(RORconst [c] y))
 15597  	// cond: ssa.ClobberIfDead(x1)
 15598  	// result: (ORNshiftRO x0 y [c])
 15599  	for {
 15600  		x0 := v_0
 15601  		x1 := v_1
 15602  		if x1.Op != ssaop.OpARM64RORconst {
 15603  			break
 15604  		}
 15605  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15606  		y := x1.Args[0]
 15607  		if !(ssa.ClobberIfDead(x1)) {
 15608  			break
 15609  		}
 15610  		v.Reset(ssaop.OpARM64ORNshiftRO)
 15611  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15612  		v.AddArg2(x0, y)
 15613  		return true
 15614  	}
 15615  	return false
 15616  }
 15617  func rewriteValue_OpARM64ORNshiftLL(v *ssa.Value) bool {
 15618  	v_1 := v.Args[1]
 15619  	v_0 := v.Args[0]
 15620  	// match: (ORNshiftLL x (MOVDconst [c]) [d])
 15621  	// result: (ORconst x [^int64(uint64(c)<<uint64(d))])
 15622  	for {
 15623  		d := ssa.AuxIntToInt64(v.AuxInt)
 15624  		x := v_0
 15625  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15626  			break
 15627  		}
 15628  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15629  		v.Reset(ssaop.OpARM64ORconst)
 15630  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 15631  		v.AddArg(x)
 15632  		return true
 15633  	}
 15634  	// match: (ORNshiftLL (SLLconst x [c]) x [c])
 15635  	// result: (MOVDconst [-1])
 15636  	for {
 15637  		c := ssa.AuxIntToInt64(v.AuxInt)
 15638  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15639  			break
 15640  		}
 15641  		x := v_0.Args[0]
 15642  		if x != v_1 {
 15643  			break
 15644  		}
 15645  		v.Reset(ssaop.OpARM64MOVDconst)
 15646  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15647  		return true
 15648  	}
 15649  	return false
 15650  }
 15651  func rewriteValue_OpARM64ORNshiftRA(v *ssa.Value) bool {
 15652  	v_1 := v.Args[1]
 15653  	v_0 := v.Args[0]
 15654  	// match: (ORNshiftRA x (MOVDconst [c]) [d])
 15655  	// result: (ORconst x [^(c>>uint64(d))])
 15656  	for {
 15657  		d := ssa.AuxIntToInt64(v.AuxInt)
 15658  		x := v_0
 15659  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15660  			break
 15661  		}
 15662  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15663  		v.Reset(ssaop.OpARM64ORconst)
 15664  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
 15665  		v.AddArg(x)
 15666  		return true
 15667  	}
 15668  	// match: (ORNshiftRA (SRAconst x [c]) x [c])
 15669  	// result: (MOVDconst [-1])
 15670  	for {
 15671  		c := ssa.AuxIntToInt64(v.AuxInt)
 15672  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15673  			break
 15674  		}
 15675  		x := v_0.Args[0]
 15676  		if x != v_1 {
 15677  			break
 15678  		}
 15679  		v.Reset(ssaop.OpARM64MOVDconst)
 15680  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15681  		return true
 15682  	}
 15683  	return false
 15684  }
 15685  func rewriteValue_OpARM64ORNshiftRL(v *ssa.Value) bool {
 15686  	v_1 := v.Args[1]
 15687  	v_0 := v.Args[0]
 15688  	// match: (ORNshiftRL x (MOVDconst [c]) [d])
 15689  	// result: (ORconst x [^int64(uint64(c)>>uint64(d))])
 15690  	for {
 15691  		d := ssa.AuxIntToInt64(v.AuxInt)
 15692  		x := v_0
 15693  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15694  			break
 15695  		}
 15696  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15697  		v.Reset(ssaop.OpARM64ORconst)
 15698  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 15699  		v.AddArg(x)
 15700  		return true
 15701  	}
 15702  	// match: (ORNshiftRL (SRLconst x [c]) x [c])
 15703  	// result: (MOVDconst [-1])
 15704  	for {
 15705  		c := ssa.AuxIntToInt64(v.AuxInt)
 15706  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15707  			break
 15708  		}
 15709  		x := v_0.Args[0]
 15710  		if x != v_1 {
 15711  			break
 15712  		}
 15713  		v.Reset(ssaop.OpARM64MOVDconst)
 15714  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15715  		return true
 15716  	}
 15717  	return false
 15718  }
 15719  func rewriteValue_OpARM64ORNshiftRO(v *ssa.Value) bool {
 15720  	v_1 := v.Args[1]
 15721  	v_0 := v.Args[0]
 15722  	// match: (ORNshiftRO x (MOVDconst [c]) [d])
 15723  	// result: (ORconst x [^rotateRight64(c, d)])
 15724  	for {
 15725  		d := ssa.AuxIntToInt64(v.AuxInt)
 15726  		x := v_0
 15727  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15728  			break
 15729  		}
 15730  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15731  		v.Reset(ssaop.OpARM64ORconst)
 15732  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
 15733  		v.AddArg(x)
 15734  		return true
 15735  	}
 15736  	// match: (ORNshiftRO (RORconst x [c]) x [c])
 15737  	// result: (MOVDconst [-1])
 15738  	for {
 15739  		c := ssa.AuxIntToInt64(v.AuxInt)
 15740  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15741  			break
 15742  		}
 15743  		x := v_0.Args[0]
 15744  		if x != v_1 {
 15745  			break
 15746  		}
 15747  		v.Reset(ssaop.OpARM64MOVDconst)
 15748  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15749  		return true
 15750  	}
 15751  	return false
 15752  }
 15753  func rewriteValue_OpARM64ORconst(v *ssa.Value) bool {
 15754  	v_0 := v.Args[0]
 15755  	// match: (ORconst [0] x)
 15756  	// result: x
 15757  	for {
 15758  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 15759  			break
 15760  		}
 15761  		x := v_0
 15762  		v.CopyOf(x)
 15763  		return true
 15764  	}
 15765  	// match: (ORconst [-1] _)
 15766  	// result: (MOVDconst [-1])
 15767  	for {
 15768  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
 15769  			break
 15770  		}
 15771  		v.Reset(ssaop.OpARM64MOVDconst)
 15772  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15773  		return true
 15774  	}
 15775  	// match: (ORconst [c] (MOVDconst [d]))
 15776  	// result: (MOVDconst [c|d])
 15777  	for {
 15778  		c := ssa.AuxIntToInt64(v.AuxInt)
 15779  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15780  			break
 15781  		}
 15782  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 15783  		v.Reset(ssaop.OpARM64MOVDconst)
 15784  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
 15785  		return true
 15786  	}
 15787  	// match: (ORconst [c] (ORconst [d] x))
 15788  	// result: (ORconst [c|d] x)
 15789  	for {
 15790  		c := ssa.AuxIntToInt64(v.AuxInt)
 15791  		if v_0.Op != ssaop.OpARM64ORconst {
 15792  			break
 15793  		}
 15794  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 15795  		x := v_0.Args[0]
 15796  		v.Reset(ssaop.OpARM64ORconst)
 15797  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
 15798  		v.AddArg(x)
 15799  		return true
 15800  	}
 15801  	// match: (ORconst [c1] (ANDconst [c2] x))
 15802  	// cond: c2|c1 == ^0
 15803  	// result: (ORconst [c1] x)
 15804  	for {
 15805  		c1 := ssa.AuxIntToInt64(v.AuxInt)
 15806  		if v_0.Op != ssaop.OpARM64ANDconst {
 15807  			break
 15808  		}
 15809  		c2 := ssa.AuxIntToInt64(v_0.AuxInt)
 15810  		x := v_0.Args[0]
 15811  		if !(c2|c1 == ^0) {
 15812  			break
 15813  		}
 15814  		v.Reset(ssaop.OpARM64ORconst)
 15815  		v.AuxInt = ssa.Int64ToAuxInt(c1)
 15816  		v.AddArg(x)
 15817  		return true
 15818  	}
 15819  	return false
 15820  }
 15821  func rewriteValue_OpARM64ORshiftLL(v *ssa.Value) bool {
 15822  	v_1 := v.Args[1]
 15823  	v_0 := v.Args[0]
 15824  	b := v.Block
 15825  	typ := &b.Func.Config.Types
 15826  	// match: (ORshiftLL (MOVDconst [c]) x [d])
 15827  	// result: (ORconst [c] (SLLconst <x.Type> x [d]))
 15828  	for {
 15829  		d := ssa.AuxIntToInt64(v.AuxInt)
 15830  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15831  			break
 15832  		}
 15833  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15834  		x := v_1
 15835  		v.Reset(ssaop.OpARM64ORconst)
 15836  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15837  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 15838  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 15839  		v0.AddArg(x)
 15840  		v.AddArg(v0)
 15841  		return true
 15842  	}
 15843  	// match: (ORshiftLL x (MOVDconst [c]) [d])
 15844  	// result: (ORconst x [int64(uint64(c)<<uint64(d))])
 15845  	for {
 15846  		d := ssa.AuxIntToInt64(v.AuxInt)
 15847  		x := v_0
 15848  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15849  			break
 15850  		}
 15851  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15852  		v.Reset(ssaop.OpARM64ORconst)
 15853  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 15854  		v.AddArg(x)
 15855  		return true
 15856  	}
 15857  	// match: (ORshiftLL y:(SLLconst x [c]) x [c])
 15858  	// result: y
 15859  	for {
 15860  		c := ssa.AuxIntToInt64(v.AuxInt)
 15861  		y := v_0
 15862  		if y.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 15863  			break
 15864  		}
 15865  		x := y.Args[0]
 15866  		if x != v_1 {
 15867  			break
 15868  		}
 15869  		v.CopyOf(y)
 15870  		return true
 15871  	}
 15872  	// match: (ORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
 15873  	// result: (REV16W x)
 15874  	for {
 15875  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
 15876  			break
 15877  		}
 15878  		x := v_0.Args[0]
 15879  		if x != v_1 {
 15880  			break
 15881  		}
 15882  		v.Reset(ssaop.OpARM64REV16W)
 15883  		v.AddArg(x)
 15884  		return true
 15885  	}
 15886  	// match: (ORshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 15887  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 15888  	// result: (REV16W x)
 15889  	for {
 15890  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
 15891  			break
 15892  		}
 15893  		v_0_0 := v_0.Args[0]
 15894  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 15895  			break
 15896  		}
 15897  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 15898  		x := v_0_0.Args[0]
 15899  		if v_1.Op != ssaop.OpARM64ANDconst {
 15900  			break
 15901  		}
 15902  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 15903  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 15904  			break
 15905  		}
 15906  		v.Reset(ssaop.OpARM64REV16W)
 15907  		v.AddArg(x)
 15908  		return true
 15909  	}
 15910  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 15911  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 15912  	// result: (REV16 x)
 15913  	for {
 15914  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 15915  			break
 15916  		}
 15917  		v_0_0 := v_0.Args[0]
 15918  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 15919  			break
 15920  		}
 15921  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 15922  		x := v_0_0.Args[0]
 15923  		if v_1.Op != ssaop.OpARM64ANDconst {
 15924  			break
 15925  		}
 15926  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 15927  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 15928  			break
 15929  		}
 15930  		v.Reset(ssaop.OpARM64REV16)
 15931  		v.AddArg(x)
 15932  		return true
 15933  	}
 15934  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 15935  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 15936  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 15937  	for {
 15938  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 15939  			break
 15940  		}
 15941  		v_0_0 := v_0.Args[0]
 15942  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 15943  			break
 15944  		}
 15945  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 15946  		x := v_0_0.Args[0]
 15947  		if v_1.Op != ssaop.OpARM64ANDconst {
 15948  			break
 15949  		}
 15950  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 15951  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 15952  			break
 15953  		}
 15954  		v.Reset(ssaop.OpARM64REV16)
 15955  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
 15956  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
 15957  		v0.AddArg(x)
 15958  		v.AddArg(v0)
 15959  		return true
 15960  	}
 15961  	// match: ( ORshiftLL [c] (SRLconst x [64-c]) x2)
 15962  	// result: (EXTRconst [64-c] x2 x)
 15963  	for {
 15964  		c := ssa.AuxIntToInt64(v.AuxInt)
 15965  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
 15966  			break
 15967  		}
 15968  		x := v_0.Args[0]
 15969  		x2 := v_1
 15970  		v.Reset(ssaop.OpARM64EXTRconst)
 15971  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
 15972  		v.AddArg2(x2, x)
 15973  		return true
 15974  	}
 15975  	// match: ( ORshiftLL <t> [c] (UBFX [bfc] x) x2)
 15976  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
 15977  	// result: (EXTRWconst [32-c] x2 x)
 15978  	for {
 15979  		t := v.Type
 15980  		c := ssa.AuxIntToInt64(v.AuxInt)
 15981  		if v_0.Op != ssaop.OpARM64UBFX {
 15982  			break
 15983  		}
 15984  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15985  		x := v_0.Args[0]
 15986  		x2 := v_1
 15987  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
 15988  			break
 15989  		}
 15990  		v.Reset(ssaop.OpARM64EXTRWconst)
 15991  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
 15992  		v.AddArg2(x2, x)
 15993  		return true
 15994  	}
 15995  	// match: (ORshiftLL [s] (ANDconst [xc] x) (ANDconst [yc] y))
 15996  	// cond: xc == ^(yc << s) && yc & (yc+1) == 0 && yc > 0 && s+ssa.Log64(yc+1) <= 64
 15997  	// result: (BFI [ssa.ArmBFAuxInt(s, ssa.Log64(yc+1))] x y)
 15998  	for {
 15999  		s := ssa.AuxIntToInt64(v.AuxInt)
 16000  		if v_0.Op != ssaop.OpARM64ANDconst {
 16001  			break
 16002  		}
 16003  		xc := ssa.AuxIntToInt64(v_0.AuxInt)
 16004  		x := v_0.Args[0]
 16005  		if v_1.Op != ssaop.OpARM64ANDconst {
 16006  			break
 16007  		}
 16008  		yc := ssa.AuxIntToInt64(v_1.AuxInt)
 16009  		y := v_1.Args[0]
 16010  		if !(xc == ^(yc<<s) && yc&(yc+1) == 0 && yc > 0 && s+ssa.Log64(yc+1) <= 64) {
 16011  			break
 16012  		}
 16013  		v.Reset(ssaop.OpARM64BFI)
 16014  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(s, ssa.Log64(yc+1)))
 16015  		v.AddArg2(x, y)
 16016  		return true
 16017  	}
 16018  	// match: (ORshiftLL [sc] (UBFX [bfc] x) (SRLconst [sc] y))
 16019  	// cond: sc == bfc.Width()
 16020  	// result: (BFXIL [bfc] y x)
 16021  	for {
 16022  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16023  		if v_0.Op != ssaop.OpARM64UBFX {
 16024  			break
 16025  		}
 16026  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16027  		x := v_0.Args[0]
 16028  		if v_1.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_1.AuxInt) != sc {
 16029  			break
 16030  		}
 16031  		y := v_1.Args[0]
 16032  		if !(sc == bfc.Width()) {
 16033  			break
 16034  		}
 16035  		v.Reset(ssaop.OpARM64BFXIL)
 16036  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 16037  		v.AddArg2(y, x)
 16038  		return true
 16039  	}
 16040  	return false
 16041  }
 16042  func rewriteValue_OpARM64ORshiftRA(v *ssa.Value) bool {
 16043  	v_1 := v.Args[1]
 16044  	v_0 := v.Args[0]
 16045  	b := v.Block
 16046  	// match: (ORshiftRA (MOVDconst [c]) x [d])
 16047  	// result: (ORconst [c] (SRAconst <x.Type> x [d]))
 16048  	for {
 16049  		d := ssa.AuxIntToInt64(v.AuxInt)
 16050  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16051  			break
 16052  		}
 16053  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 16054  		x := v_1
 16055  		v.Reset(ssaop.OpARM64ORconst)
 16056  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16057  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 16058  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 16059  		v0.AddArg(x)
 16060  		v.AddArg(v0)
 16061  		return true
 16062  	}
 16063  	// match: (ORshiftRA x (MOVDconst [c]) [d])
 16064  	// result: (ORconst x [c>>uint64(d)])
 16065  	for {
 16066  		d := ssa.AuxIntToInt64(v.AuxInt)
 16067  		x := v_0
 16068  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16069  			break
 16070  		}
 16071  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16072  		v.Reset(ssaop.OpARM64ORconst)
 16073  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 16074  		v.AddArg(x)
 16075  		return true
 16076  	}
 16077  	// match: (ORshiftRA y:(SRAconst x [c]) x [c])
 16078  	// result: y
 16079  	for {
 16080  		c := ssa.AuxIntToInt64(v.AuxInt)
 16081  		y := v_0
 16082  		if y.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 16083  			break
 16084  		}
 16085  		x := y.Args[0]
 16086  		if x != v_1 {
 16087  			break
 16088  		}
 16089  		v.CopyOf(y)
 16090  		return true
 16091  	}
 16092  	return false
 16093  }
 16094  func rewriteValue_OpARM64ORshiftRL(v *ssa.Value) bool {
 16095  	v_1 := v.Args[1]
 16096  	v_0 := v.Args[0]
 16097  	b := v.Block
 16098  	// match: (ORshiftRL (MOVDconst [c]) x [d])
 16099  	// result: (ORconst [c] (SRLconst <x.Type> x [d]))
 16100  	for {
 16101  		d := ssa.AuxIntToInt64(v.AuxInt)
 16102  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16103  			break
 16104  		}
 16105  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 16106  		x := v_1
 16107  		v.Reset(ssaop.OpARM64ORconst)
 16108  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16109  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 16110  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 16111  		v0.AddArg(x)
 16112  		v.AddArg(v0)
 16113  		return true
 16114  	}
 16115  	// match: (ORshiftRL x (MOVDconst [c]) [d])
 16116  	// result: (ORconst x [int64(uint64(c)>>uint64(d))])
 16117  	for {
 16118  		d := ssa.AuxIntToInt64(v.AuxInt)
 16119  		x := v_0
 16120  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16121  			break
 16122  		}
 16123  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16124  		v.Reset(ssaop.OpARM64ORconst)
 16125  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 16126  		v.AddArg(x)
 16127  		return true
 16128  	}
 16129  	// match: (ORshiftRL y:(SRLconst x [c]) x [c])
 16130  	// result: y
 16131  	for {
 16132  		c := ssa.AuxIntToInt64(v.AuxInt)
 16133  		y := v_0
 16134  		if y.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 16135  			break
 16136  		}
 16137  		x := y.Args[0]
 16138  		if x != v_1 {
 16139  			break
 16140  		}
 16141  		v.CopyOf(y)
 16142  		return true
 16143  	}
 16144  	// match: (ORshiftRL [rc] (ANDconst [ac] x) (SLLconst [lc] y))
 16145  	// cond: lc > rc && ac == ^((1<<uint(64-lc)-1) << uint64(lc-rc))
 16146  	// result: (BFI [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x y)
 16147  	for {
 16148  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16149  		if v_0.Op != ssaop.OpARM64ANDconst {
 16150  			break
 16151  		}
 16152  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16153  		x := v_0.Args[0]
 16154  		if v_1.Op != ssaop.OpARM64SLLconst {
 16155  			break
 16156  		}
 16157  		lc := ssa.AuxIntToInt64(v_1.AuxInt)
 16158  		y := v_1.Args[0]
 16159  		if !(lc > rc && ac == ^((1<<uint(64-lc)-1)<<uint64(lc-rc))) {
 16160  			break
 16161  		}
 16162  		v.Reset(ssaop.OpARM64BFI)
 16163  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 16164  		v.AddArg2(x, y)
 16165  		return true
 16166  	}
 16167  	// match: (ORshiftRL [rc] (ANDconst [ac] y) (SLLconst [lc] x))
 16168  	// cond: lc < rc && ac == ^((1<<uint(64-rc)-1))
 16169  	// result: (BFXIL [ssa.ArmBFAuxInt(rc-lc, 64-rc)] y x)
 16170  	for {
 16171  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16172  		if v_0.Op != ssaop.OpARM64ANDconst {
 16173  			break
 16174  		}
 16175  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16176  		y := v_0.Args[0]
 16177  		if v_1.Op != ssaop.OpARM64SLLconst {
 16178  			break
 16179  		}
 16180  		lc := ssa.AuxIntToInt64(v_1.AuxInt)
 16181  		x := v_1.Args[0]
 16182  		if !(lc < rc && ac == ^(1<<uint(64-rc)-1)) {
 16183  			break
 16184  		}
 16185  		v.Reset(ssaop.OpARM64BFXIL)
 16186  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 16187  		v.AddArg2(y, x)
 16188  		return true
 16189  	}
 16190  	return false
 16191  }
 16192  func rewriteValue_OpARM64ORshiftRO(v *ssa.Value) bool {
 16193  	v_1 := v.Args[1]
 16194  	v_0 := v.Args[0]
 16195  	b := v.Block
 16196  	// match: (ORshiftRO (MOVDconst [c]) x [d])
 16197  	// result: (ORconst [c] (RORconst <x.Type> x [d]))
 16198  	for {
 16199  		d := ssa.AuxIntToInt64(v.AuxInt)
 16200  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16201  			break
 16202  		}
 16203  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 16204  		x := v_1
 16205  		v.Reset(ssaop.OpARM64ORconst)
 16206  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16207  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 16208  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 16209  		v0.AddArg(x)
 16210  		v.AddArg(v0)
 16211  		return true
 16212  	}
 16213  	// match: (ORshiftRO x (MOVDconst [c]) [d])
 16214  	// result: (ORconst x [rotateRight64(c, d)])
 16215  	for {
 16216  		d := ssa.AuxIntToInt64(v.AuxInt)
 16217  		x := v_0
 16218  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16219  			break
 16220  		}
 16221  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16222  		v.Reset(ssaop.OpARM64ORconst)
 16223  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 16224  		v.AddArg(x)
 16225  		return true
 16226  	}
 16227  	// match: (ORshiftRO y:(RORconst x [c]) x [c])
 16228  	// result: y
 16229  	for {
 16230  		c := ssa.AuxIntToInt64(v.AuxInt)
 16231  		y := v_0
 16232  		if y.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 16233  			break
 16234  		}
 16235  		x := y.Args[0]
 16236  		if x != v_1 {
 16237  			break
 16238  		}
 16239  		v.CopyOf(y)
 16240  		return true
 16241  	}
 16242  	return false
 16243  }
 16244  func rewriteValue_OpARM64REV(v *ssa.Value) bool {
 16245  	v_0 := v.Args[0]
 16246  	// match: (REV (REV p))
 16247  	// result: p
 16248  	for {
 16249  		if v_0.Op != ssaop.OpARM64REV {
 16250  			break
 16251  		}
 16252  		p := v_0.Args[0]
 16253  		v.CopyOf(p)
 16254  		return true
 16255  	}
 16256  	return false
 16257  }
 16258  func rewriteValue_OpARM64REV16(v *ssa.Value) bool {
 16259  	v_0 := v.Args[0]
 16260  	// match: (REV16 (MOVWUreg x))
 16261  	// result: (REV16W x)
 16262  	for {
 16263  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16264  			break
 16265  		}
 16266  		x := v_0.Args[0]
 16267  		v.Reset(ssaop.OpARM64REV16W)
 16268  		v.AddArg(x)
 16269  		return true
 16270  	}
 16271  	return false
 16272  }
 16273  func rewriteValue_OpARM64REVW(v *ssa.Value) bool {
 16274  	v_0 := v.Args[0]
 16275  	// match: (REVW (REVW p))
 16276  	// result: p
 16277  	for {
 16278  		if v_0.Op != ssaop.OpARM64REVW {
 16279  			break
 16280  		}
 16281  		p := v_0.Args[0]
 16282  		v.CopyOf(p)
 16283  		return true
 16284  	}
 16285  	return false
 16286  }
 16287  func rewriteValue_OpARM64ROR(v *ssa.Value) bool {
 16288  	v_1 := v.Args[1]
 16289  	v_0 := v.Args[0]
 16290  	// match: (ROR x (MOVDconst [c]))
 16291  	// result: (RORconst x [c&63])
 16292  	for {
 16293  		x := v_0
 16294  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16295  			break
 16296  		}
 16297  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16298  		v.Reset(ssaop.OpARM64RORconst)
 16299  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16300  		v.AddArg(x)
 16301  		return true
 16302  	}
 16303  	return false
 16304  }
 16305  func rewriteValue_OpARM64RORW(v *ssa.Value) bool {
 16306  	v_1 := v.Args[1]
 16307  	v_0 := v.Args[0]
 16308  	// match: (RORW x (MOVDconst [c]))
 16309  	// result: (RORWconst x [c&31])
 16310  	for {
 16311  		x := v_0
 16312  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16313  			break
 16314  		}
 16315  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16316  		v.Reset(ssaop.OpARM64RORWconst)
 16317  		v.AuxInt = ssa.Int64ToAuxInt(c & 31)
 16318  		v.AddArg(x)
 16319  		return true
 16320  	}
 16321  	return false
 16322  }
 16323  func rewriteValue_OpARM64SBCSflags(v *ssa.Value) bool {
 16324  	v_2 := v.Args[2]
 16325  	v_1 := v.Args[1]
 16326  	v_0 := v.Args[0]
 16327  	b := v.Block
 16328  	typ := &b.Func.Config.Types
 16329  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> bo)))))
 16330  	// result: (SBCSflags x y bo)
 16331  	for {
 16332  		x := v_0
 16333  		y := v_1
 16334  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
 16335  			break
 16336  		}
 16337  		v_2_0 := v_2.Args[0]
 16338  		if v_2_0.Op != ssaop.OpARM64NEGSflags {
 16339  			break
 16340  		}
 16341  		v_2_0_0 := v_2_0.Args[0]
 16342  		if v_2_0_0.Op != ssaop.OpARM64NEG || v_2_0_0.Type != typ.UInt64 {
 16343  			break
 16344  		}
 16345  		v_2_0_0_0 := v_2_0_0.Args[0]
 16346  		if v_2_0_0_0.Op != ssaop.OpARM64NGCzerocarry || v_2_0_0_0.Type != typ.UInt64 {
 16347  			break
 16348  		}
 16349  		bo := v_2_0_0_0.Args[0]
 16350  		v.Reset(ssaop.OpARM64SBCSflags)
 16351  		v.AddArg3(x, y, bo)
 16352  		return true
 16353  	}
 16354  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (MOVDconst [0]))))
 16355  	// result: (SUBSflags x y)
 16356  	for {
 16357  		x := v_0
 16358  		y := v_1
 16359  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
 16360  			break
 16361  		}
 16362  		v_2_0 := v_2.Args[0]
 16363  		if v_2_0.Op != ssaop.OpARM64NEGSflags {
 16364  			break
 16365  		}
 16366  		v_2_0_0 := v_2_0.Args[0]
 16367  		if v_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2_0_0.AuxInt) != 0 {
 16368  			break
 16369  		}
 16370  		v.Reset(ssaop.OpARM64SUBSflags)
 16371  		v.AddArg2(x, y)
 16372  		return true
 16373  	}
 16374  	return false
 16375  }
 16376  func rewriteValue_OpARM64SBFX(v *ssa.Value) bool {
 16377  	v_0 := v.Args[0]
 16378  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 16379  	// cond: s.Uses == 1 && sc <= bfc.Lsb()
 16380  	// result: (SBFX [ssa.ArmBFAuxInt(bfc.Lsb() - sc, bfc.Width())] x)
 16381  	for {
 16382  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 16383  		s := v_0
 16384  		if s.Op != ssaop.OpARM64SLLconst {
 16385  			break
 16386  		}
 16387  		sc := ssa.AuxIntToInt64(s.AuxInt)
 16388  		x := s.Args[0]
 16389  		if !(s.Uses == 1 && sc <= bfc.Lsb()) {
 16390  			break
 16391  		}
 16392  		v.Reset(ssaop.OpARM64SBFX)
 16393  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16394  		v.AddArg(x)
 16395  		return true
 16396  	}
 16397  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 16398  	// cond: s.Uses == 1 && sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16399  	// result: (SBFIZ [ssa.ArmBFAuxInt(sc - bfc.Lsb(), bfc.Width() - (sc-bfc.Lsb()))] x)
 16400  	for {
 16401  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 16402  		s := v_0
 16403  		if s.Op != ssaop.OpARM64SLLconst {
 16404  			break
 16405  		}
 16406  		sc := ssa.AuxIntToInt64(s.AuxInt)
 16407  		x := s.Args[0]
 16408  		if !(s.Uses == 1 && sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16409  			break
 16410  		}
 16411  		v.Reset(ssaop.OpARM64SBFIZ)
 16412  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Width()-(sc-bfc.Lsb())))
 16413  		v.AddArg(x)
 16414  		return true
 16415  	}
 16416  	return false
 16417  }
 16418  func rewriteValue_OpARM64SLL(v *ssa.Value) bool {
 16419  	v_1 := v.Args[1]
 16420  	v_0 := v.Args[0]
 16421  	// match: (SLL x (MOVDconst [c]))
 16422  	// result: (SLLconst x [c&63])
 16423  	for {
 16424  		x := v_0
 16425  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16426  			break
 16427  		}
 16428  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16429  		v.Reset(ssaop.OpARM64SLLconst)
 16430  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16431  		v.AddArg(x)
 16432  		return true
 16433  	}
 16434  	// match: (SLL x (ANDconst [63] y))
 16435  	// result: (SLL x y)
 16436  	for {
 16437  		x := v_0
 16438  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16439  			break
 16440  		}
 16441  		y := v_1.Args[0]
 16442  		v.Reset(ssaop.OpARM64SLL)
 16443  		v.AddArg2(x, y)
 16444  		return true
 16445  	}
 16446  	return false
 16447  }
 16448  func rewriteValue_OpARM64SLLconst(v *ssa.Value) bool {
 16449  	v_0 := v.Args[0]
 16450  	// match: (SLLconst [c] (MOVDconst [d]))
 16451  	// result: (MOVDconst [d<<uint64(c)])
 16452  	for {
 16453  		c := ssa.AuxIntToInt64(v.AuxInt)
 16454  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16455  			break
 16456  		}
 16457  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16458  		v.Reset(ssaop.OpARM64MOVDconst)
 16459  		v.AuxInt = ssa.Int64ToAuxInt(d << uint64(c))
 16460  		return true
 16461  	}
 16462  	// match: (SLLconst [c] (SRLconst [c] x))
 16463  	// cond: 0 < c && c < 64
 16464  	// result: (ANDconst [^(1<<uint(c)-1)] x)
 16465  	for {
 16466  		c := ssa.AuxIntToInt64(v.AuxInt)
 16467  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 16468  			break
 16469  		}
 16470  		x := v_0.Args[0]
 16471  		if !(0 < c && c < 64) {
 16472  			break
 16473  		}
 16474  		v.Reset(ssaop.OpARM64ANDconst)
 16475  		v.AuxInt = ssa.Int64ToAuxInt(^(1<<uint(c) - 1))
 16476  		v.AddArg(x)
 16477  		return true
 16478  	}
 16479  	// match: (SLLconst [lc] (MOVWreg x))
 16480  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(32, 64-lc))] x)
 16481  	for {
 16482  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16483  		if v_0.Op != ssaop.OpARM64MOVWreg {
 16484  			break
 16485  		}
 16486  		x := v_0.Args[0]
 16487  		v.Reset(ssaop.OpARM64SBFIZ)
 16488  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(32, 64-lc)))
 16489  		v.AddArg(x)
 16490  		return true
 16491  	}
 16492  	// match: (SLLconst [lc] (MOVHreg x))
 16493  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(16, 64-lc))] x)
 16494  	for {
 16495  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16496  		if v_0.Op != ssaop.OpARM64MOVHreg {
 16497  			break
 16498  		}
 16499  		x := v_0.Args[0]
 16500  		v.Reset(ssaop.OpARM64SBFIZ)
 16501  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(16, 64-lc)))
 16502  		v.AddArg(x)
 16503  		return true
 16504  	}
 16505  	// match: (SLLconst [lc] (MOVBreg x))
 16506  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(8, 64-lc))] x)
 16507  	for {
 16508  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16509  		if v_0.Op != ssaop.OpARM64MOVBreg {
 16510  			break
 16511  		}
 16512  		x := v_0.Args[0]
 16513  		v.Reset(ssaop.OpARM64SBFIZ)
 16514  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(8, 64-lc)))
 16515  		v.AddArg(x)
 16516  		return true
 16517  	}
 16518  	// match: (SLLconst [lc] (MOVWUreg x))
 16519  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(32, 64-lc))] x)
 16520  	for {
 16521  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16522  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16523  			break
 16524  		}
 16525  		x := v_0.Args[0]
 16526  		v.Reset(ssaop.OpARM64UBFIZ)
 16527  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(32, 64-lc)))
 16528  		v.AddArg(x)
 16529  		return true
 16530  	}
 16531  	// match: (SLLconst [lc] (MOVHUreg x))
 16532  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(16, 64-lc))] x)
 16533  	for {
 16534  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16535  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16536  			break
 16537  		}
 16538  		x := v_0.Args[0]
 16539  		v.Reset(ssaop.OpARM64UBFIZ)
 16540  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(16, 64-lc)))
 16541  		v.AddArg(x)
 16542  		return true
 16543  	}
 16544  	// match: (SLLconst [lc] (MOVBUreg x))
 16545  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(8, 64-lc))] x)
 16546  	for {
 16547  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16548  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16549  			break
 16550  		}
 16551  		x := v_0.Args[0]
 16552  		v.Reset(ssaop.OpARM64UBFIZ)
 16553  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(8, 64-lc)))
 16554  		v.AddArg(x)
 16555  		return true
 16556  	}
 16557  	// match: (SLLconst [sc] (ANDconst [ac] x))
 16558  	// cond: isARM64BFMask(sc, ac, 0)
 16559  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
 16560  	for {
 16561  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16562  		if v_0.Op != ssaop.OpARM64ANDconst {
 16563  			break
 16564  		}
 16565  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16566  		x := v_0.Args[0]
 16567  		if !(isARM64BFMask(sc, ac, 0)) {
 16568  			break
 16569  		}
 16570  		v.Reset(ssaop.OpARM64UBFIZ)
 16571  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0)))
 16572  		v.AddArg(x)
 16573  		return true
 16574  	}
 16575  	// match: (SLLconst [sc] (UBFIZ [bfc] x))
 16576  	// cond: sc+bfc.Width()+bfc.Lsb() < 64
 16577  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width())] x)
 16578  	for {
 16579  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16580  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16581  			break
 16582  		}
 16583  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16584  		x := v_0.Args[0]
 16585  		if !(sc+bfc.Width()+bfc.Lsb() < 64) {
 16586  			break
 16587  		}
 16588  		v.Reset(ssaop.OpARM64UBFIZ)
 16589  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()))
 16590  		v.AddArg(x)
 16591  		return true
 16592  	}
 16593  	return false
 16594  }
 16595  func rewriteValue_OpARM64SRA(v *ssa.Value) bool {
 16596  	v_1 := v.Args[1]
 16597  	v_0 := v.Args[0]
 16598  	// match: (SRA x (MOVDconst [c]))
 16599  	// result: (SRAconst x [c&63])
 16600  	for {
 16601  		x := v_0
 16602  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16603  			break
 16604  		}
 16605  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16606  		v.Reset(ssaop.OpARM64SRAconst)
 16607  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16608  		v.AddArg(x)
 16609  		return true
 16610  	}
 16611  	// match: (SRA x (ANDconst [63] y))
 16612  	// result: (SRA x y)
 16613  	for {
 16614  		x := v_0
 16615  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16616  			break
 16617  		}
 16618  		y := v_1.Args[0]
 16619  		v.Reset(ssaop.OpARM64SRA)
 16620  		v.AddArg2(x, y)
 16621  		return true
 16622  	}
 16623  	return false
 16624  }
 16625  func rewriteValue_OpARM64SRAconst(v *ssa.Value) bool {
 16626  	v_0 := v.Args[0]
 16627  	// match: (SRAconst [c] (MOVDconst [d]))
 16628  	// result: (MOVDconst [d>>uint64(c)])
 16629  	for {
 16630  		c := ssa.AuxIntToInt64(v.AuxInt)
 16631  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16632  			break
 16633  		}
 16634  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16635  		v.Reset(ssaop.OpARM64MOVDconst)
 16636  		v.AuxInt = ssa.Int64ToAuxInt(d >> uint64(c))
 16637  		return true
 16638  	}
 16639  	// match: (SRAconst [rc] (SLLconst [lc] x))
 16640  	// cond: lc > rc
 16641  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x)
 16642  	for {
 16643  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16644  		if v_0.Op != ssaop.OpARM64SLLconst {
 16645  			break
 16646  		}
 16647  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16648  		x := v_0.Args[0]
 16649  		if !(lc > rc) {
 16650  			break
 16651  		}
 16652  		v.Reset(ssaop.OpARM64SBFIZ)
 16653  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 16654  		v.AddArg(x)
 16655  		return true
 16656  	}
 16657  	// match: (SRAconst [rc] (SLLconst [lc] x))
 16658  	// cond: lc <= rc
 16659  	// result: (SBFX [ssa.ArmBFAuxInt(rc-lc, 64-rc)] x)
 16660  	for {
 16661  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16662  		if v_0.Op != ssaop.OpARM64SLLconst {
 16663  			break
 16664  		}
 16665  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16666  		x := v_0.Args[0]
 16667  		if !(lc <= rc) {
 16668  			break
 16669  		}
 16670  		v.Reset(ssaop.OpARM64SBFX)
 16671  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 16672  		v.AddArg(x)
 16673  		return true
 16674  	}
 16675  	// match: (SRAconst [rc] (MOVWreg x))
 16676  	// cond: rc < 32
 16677  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 32-rc)] x)
 16678  	for {
 16679  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16680  		if v_0.Op != ssaop.OpARM64MOVWreg {
 16681  			break
 16682  		}
 16683  		x := v_0.Args[0]
 16684  		if !(rc < 32) {
 16685  			break
 16686  		}
 16687  		v.Reset(ssaop.OpARM64SBFX)
 16688  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32-rc))
 16689  		v.AddArg(x)
 16690  		return true
 16691  	}
 16692  	// match: (SRAconst [rc] (MOVHreg x))
 16693  	// cond: rc < 16
 16694  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 16-rc)] x)
 16695  	for {
 16696  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16697  		if v_0.Op != ssaop.OpARM64MOVHreg {
 16698  			break
 16699  		}
 16700  		x := v_0.Args[0]
 16701  		if !(rc < 16) {
 16702  			break
 16703  		}
 16704  		v.Reset(ssaop.OpARM64SBFX)
 16705  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16-rc))
 16706  		v.AddArg(x)
 16707  		return true
 16708  	}
 16709  	// match: (SRAconst [rc] (MOVBreg x))
 16710  	// cond: rc < 8
 16711  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 8-rc)] x)
 16712  	for {
 16713  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16714  		if v_0.Op != ssaop.OpARM64MOVBreg {
 16715  			break
 16716  		}
 16717  		x := v_0.Args[0]
 16718  		if !(rc < 8) {
 16719  			break
 16720  		}
 16721  		v.Reset(ssaop.OpARM64SBFX)
 16722  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8-rc))
 16723  		v.AddArg(x)
 16724  		return true
 16725  	}
 16726  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 16727  	// cond: sc < bfc.Lsb()
 16728  	// result: (SBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 16729  	for {
 16730  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16731  		if v_0.Op != ssaop.OpARM64SBFIZ {
 16732  			break
 16733  		}
 16734  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16735  		x := v_0.Args[0]
 16736  		if !(sc < bfc.Lsb()) {
 16737  			break
 16738  		}
 16739  		v.Reset(ssaop.OpARM64SBFIZ)
 16740  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16741  		v.AddArg(x)
 16742  		return true
 16743  	}
 16744  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 16745  	// cond: sc >= bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16746  	// result: (SBFX [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 16747  	for {
 16748  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16749  		if v_0.Op != ssaop.OpARM64SBFIZ {
 16750  			break
 16751  		}
 16752  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16753  		x := v_0.Args[0]
 16754  		if !(sc >= bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16755  			break
 16756  		}
 16757  		v.Reset(ssaop.OpARM64SBFX)
 16758  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 16759  		v.AddArg(x)
 16760  		return true
 16761  	}
 16762  	return false
 16763  }
 16764  func rewriteValue_OpARM64SRL(v *ssa.Value) bool {
 16765  	v_1 := v.Args[1]
 16766  	v_0 := v.Args[0]
 16767  	// match: (SRL x (MOVDconst [c]))
 16768  	// result: (SRLconst x [c&63])
 16769  	for {
 16770  		x := v_0
 16771  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16772  			break
 16773  		}
 16774  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16775  		v.Reset(ssaop.OpARM64SRLconst)
 16776  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16777  		v.AddArg(x)
 16778  		return true
 16779  	}
 16780  	// match: (SRL x (ANDconst [63] y))
 16781  	// result: (SRL x y)
 16782  	for {
 16783  		x := v_0
 16784  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16785  			break
 16786  		}
 16787  		y := v_1.Args[0]
 16788  		v.Reset(ssaop.OpARM64SRL)
 16789  		v.AddArg2(x, y)
 16790  		return true
 16791  	}
 16792  	return false
 16793  }
 16794  func rewriteValue_OpARM64SRLconst(v *ssa.Value) bool {
 16795  	v_0 := v.Args[0]
 16796  	// match: (SRLconst [c] (MOVDconst [d]))
 16797  	// result: (MOVDconst [int64(uint64(d)>>uint64(c))])
 16798  	for {
 16799  		c := ssa.AuxIntToInt64(v.AuxInt)
 16800  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16801  			break
 16802  		}
 16803  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16804  		v.Reset(ssaop.OpARM64MOVDconst)
 16805  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(d) >> uint64(c)))
 16806  		return true
 16807  	}
 16808  	// match: (SRLconst [c] (SLLconst [c] x))
 16809  	// cond: 0 < c && c < 64
 16810  	// result: (ANDconst [1<<uint(64-c)-1] x)
 16811  	for {
 16812  		c := ssa.AuxIntToInt64(v.AuxInt)
 16813  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 16814  			break
 16815  		}
 16816  		x := v_0.Args[0]
 16817  		if !(0 < c && c < 64) {
 16818  			break
 16819  		}
 16820  		v.Reset(ssaop.OpARM64ANDconst)
 16821  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(64-c) - 1)
 16822  		v.AddArg(x)
 16823  		return true
 16824  	}
 16825  	// match: (SRLconst [rc] (MOVWUreg x))
 16826  	// cond: rc >= 32
 16827  	// result: (MOVDconst [0])
 16828  	for {
 16829  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16830  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16831  			break
 16832  		}
 16833  		if !(rc >= 32) {
 16834  			break
 16835  		}
 16836  		v.Reset(ssaop.OpARM64MOVDconst)
 16837  		v.AuxInt = ssa.Int64ToAuxInt(0)
 16838  		return true
 16839  	}
 16840  	// match: (SRLconst [rc] (MOVHUreg x))
 16841  	// cond: rc >= 16
 16842  	// result: (MOVDconst [0])
 16843  	for {
 16844  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16845  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16846  			break
 16847  		}
 16848  		if !(rc >= 16) {
 16849  			break
 16850  		}
 16851  		v.Reset(ssaop.OpARM64MOVDconst)
 16852  		v.AuxInt = ssa.Int64ToAuxInt(0)
 16853  		return true
 16854  	}
 16855  	// match: (SRLconst [rc] (MOVBUreg x))
 16856  	// cond: rc >= 8
 16857  	// result: (MOVDconst [0])
 16858  	for {
 16859  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16860  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16861  			break
 16862  		}
 16863  		if !(rc >= 8) {
 16864  			break
 16865  		}
 16866  		v.Reset(ssaop.OpARM64MOVDconst)
 16867  		v.AuxInt = ssa.Int64ToAuxInt(0)
 16868  		return true
 16869  	}
 16870  	// match: (SRLconst [rc] (SLLconst [lc] x))
 16871  	// cond: lc > rc
 16872  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x)
 16873  	for {
 16874  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16875  		if v_0.Op != ssaop.OpARM64SLLconst {
 16876  			break
 16877  		}
 16878  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16879  		x := v_0.Args[0]
 16880  		if !(lc > rc) {
 16881  			break
 16882  		}
 16883  		v.Reset(ssaop.OpARM64UBFIZ)
 16884  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 16885  		v.AddArg(x)
 16886  		return true
 16887  	}
 16888  	// match: (SRLconst [rc] (SLLconst [lc] x))
 16889  	// cond: lc < rc
 16890  	// result: (UBFX [ssa.ArmBFAuxInt(rc-lc, 64-rc)] x)
 16891  	for {
 16892  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16893  		if v_0.Op != ssaop.OpARM64SLLconst {
 16894  			break
 16895  		}
 16896  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16897  		x := v_0.Args[0]
 16898  		if !(lc < rc) {
 16899  			break
 16900  		}
 16901  		v.Reset(ssaop.OpARM64UBFX)
 16902  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 16903  		v.AddArg(x)
 16904  		return true
 16905  	}
 16906  	// match: (SRLconst [rc] (MOVWUreg x))
 16907  	// cond: rc < 32
 16908  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 32-rc)] x)
 16909  	for {
 16910  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16911  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16912  			break
 16913  		}
 16914  		x := v_0.Args[0]
 16915  		if !(rc < 32) {
 16916  			break
 16917  		}
 16918  		v.Reset(ssaop.OpARM64UBFX)
 16919  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32-rc))
 16920  		v.AddArg(x)
 16921  		return true
 16922  	}
 16923  	// match: (SRLconst [rc] (MOVHUreg x))
 16924  	// cond: rc < 16
 16925  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 16-rc)] x)
 16926  	for {
 16927  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16928  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16929  			break
 16930  		}
 16931  		x := v_0.Args[0]
 16932  		if !(rc < 16) {
 16933  			break
 16934  		}
 16935  		v.Reset(ssaop.OpARM64UBFX)
 16936  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16-rc))
 16937  		v.AddArg(x)
 16938  		return true
 16939  	}
 16940  	// match: (SRLconst [rc] (MOVBUreg x))
 16941  	// cond: rc < 8
 16942  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 8-rc)] x)
 16943  	for {
 16944  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16945  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16946  			break
 16947  		}
 16948  		x := v_0.Args[0]
 16949  		if !(rc < 8) {
 16950  			break
 16951  		}
 16952  		v.Reset(ssaop.OpARM64UBFX)
 16953  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8-rc))
 16954  		v.AddArg(x)
 16955  		return true
 16956  	}
 16957  	// match: (SRLconst [sc] (ANDconst [ac] x))
 16958  	// cond: isARM64BFMask(sc, ac, sc)
 16959  	// result: (UBFX [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
 16960  	for {
 16961  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16962  		if v_0.Op != ssaop.OpARM64ANDconst {
 16963  			break
 16964  		}
 16965  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16966  		x := v_0.Args[0]
 16967  		if !(isARM64BFMask(sc, ac, sc)) {
 16968  			break
 16969  		}
 16970  		v.Reset(ssaop.OpARM64UBFX)
 16971  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc)))
 16972  		v.AddArg(x)
 16973  		return true
 16974  	}
 16975  	// match: (SRLconst [sc] (UBFX [bfc] x))
 16976  	// cond: sc < bfc.Width()
 16977  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc)] x)
 16978  	for {
 16979  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16980  		if v_0.Op != ssaop.OpARM64UBFX {
 16981  			break
 16982  		}
 16983  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16984  		x := v_0.Args[0]
 16985  		if !(sc < bfc.Width()) {
 16986  			break
 16987  		}
 16988  		v.Reset(ssaop.OpARM64UBFX)
 16989  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc))
 16990  		v.AddArg(x)
 16991  		return true
 16992  	}
 16993  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 16994  	// cond: sc == bfc.Lsb()
 16995  	// result: (ANDconst [1<<uint(bfc.Width())-1] x)
 16996  	for {
 16997  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16998  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16999  			break
 17000  		}
 17001  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 17002  		x := v_0.Args[0]
 17003  		if !(sc == bfc.Lsb()) {
 17004  			break
 17005  		}
 17006  		v.Reset(ssaop.OpARM64ANDconst)
 17007  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(bfc.Width()) - 1)
 17008  		v.AddArg(x)
 17009  		return true
 17010  	}
 17011  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 17012  	// cond: sc < bfc.Lsb()
 17013  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 17014  	for {
 17015  		sc := ssa.AuxIntToInt64(v.AuxInt)
 17016  		if v_0.Op != ssaop.OpARM64UBFIZ {
 17017  			break
 17018  		}
 17019  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 17020  		x := v_0.Args[0]
 17021  		if !(sc < bfc.Lsb()) {
 17022  			break
 17023  		}
 17024  		v.Reset(ssaop.OpARM64UBFIZ)
 17025  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 17026  		v.AddArg(x)
 17027  		return true
 17028  	}
 17029  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 17030  	// cond: sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 17031  	// result: (UBFX [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 17032  	for {
 17033  		sc := ssa.AuxIntToInt64(v.AuxInt)
 17034  		if v_0.Op != ssaop.OpARM64UBFIZ {
 17035  			break
 17036  		}
 17037  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 17038  		x := v_0.Args[0]
 17039  		if !(sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 17040  			break
 17041  		}
 17042  		v.Reset(ssaop.OpARM64UBFX)
 17043  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 17044  		v.AddArg(x)
 17045  		return true
 17046  	}
 17047  	return false
 17048  }
 17049  func rewriteValue_OpARM64STP(v *ssa.Value) bool {
 17050  	v_3 := v.Args[3]
 17051  	v_2 := v.Args[2]
 17052  	v_1 := v.Args[1]
 17053  	v_0 := v.Args[0]
 17054  	b := v.Block
 17055  	config := b.Func.Config
 17056  	// match: (STP [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
 17057  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 17058  	// result: (STP [off1+int32(off2)] {sym} ptr val1 val2 mem)
 17059  	for {
 17060  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 17061  		sym := ssa.AuxToSym(v.Aux)
 17062  		if v_0.Op != ssaop.OpARM64ADDconst {
 17063  			break
 17064  		}
 17065  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 17066  		ptr := v_0.Args[0]
 17067  		val1 := v_1
 17068  		val2 := v_2
 17069  		mem := v_3
 17070  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 17071  			break
 17072  		}
 17073  		v.Reset(ssaop.OpARM64STP)
 17074  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 17075  		v.Aux = ssa.SymToAux(sym)
 17076  		v.AddArg4(ptr, val1, val2, mem)
 17077  		return true
 17078  	}
 17079  	// match: (STP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
 17080  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 17081  	// result: (STP [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val1 val2 mem)
 17082  	for {
 17083  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 17084  		sym1 := ssa.AuxToSym(v.Aux)
 17085  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 17086  			break
 17087  		}
 17088  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 17089  		sym2 := ssa.AuxToSym(v_0.Aux)
 17090  		ptr := v_0.Args[0]
 17091  		val1 := v_1
 17092  		val2 := v_2
 17093  		mem := v_3
 17094  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 17095  			break
 17096  		}
 17097  		v.Reset(ssaop.OpARM64STP)
 17098  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 17099  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 17100  		v.AddArg4(ptr, val1, val2, mem)
 17101  		return true
 17102  	}
 17103  	return false
 17104  }
 17105  func rewriteValue_OpARM64SUB(v *ssa.Value) bool {
 17106  	v_1 := v.Args[1]
 17107  	v_0 := v.Args[0]
 17108  	b := v.Block
 17109  	// match: (SUB x (MOVDconst [c]))
 17110  	// result: (SUBconst [c] x)
 17111  	for {
 17112  		x := v_0
 17113  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17114  			break
 17115  		}
 17116  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17117  		v.Reset(ssaop.OpARM64SUBconst)
 17118  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17119  		v.AddArg(x)
 17120  		return true
 17121  	}
 17122  	// match: (SUB a l:(MUL x y))
 17123  	// cond: l.Uses==1 && ssa.Clobber(l)
 17124  	// result: (MSUB a x y)
 17125  	for {
 17126  		a := v_0
 17127  		l := v_1
 17128  		if l.Op != ssaop.OpARM64MUL {
 17129  			break
 17130  		}
 17131  		y := l.Args[1]
 17132  		x := l.Args[0]
 17133  		if !(l.Uses == 1 && ssa.Clobber(l)) {
 17134  			break
 17135  		}
 17136  		v.Reset(ssaop.OpARM64MSUB)
 17137  		v.AddArg3(a, x, y)
 17138  		return true
 17139  	}
 17140  	// match: (SUB a l:(MNEG x y))
 17141  	// cond: l.Uses==1 && ssa.Clobber(l)
 17142  	// result: (MADD a x y)
 17143  	for {
 17144  		a := v_0
 17145  		l := v_1
 17146  		if l.Op != ssaop.OpARM64MNEG {
 17147  			break
 17148  		}
 17149  		y := l.Args[1]
 17150  		x := l.Args[0]
 17151  		if !(l.Uses == 1 && ssa.Clobber(l)) {
 17152  			break
 17153  		}
 17154  		v.Reset(ssaop.OpARM64MADD)
 17155  		v.AddArg3(a, x, y)
 17156  		return true
 17157  	}
 17158  	// match: (SUB a l:(MULW x y))
 17159  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
 17160  	// result: (MSUBW a x y)
 17161  	for {
 17162  		a := v_0
 17163  		l := v_1
 17164  		if l.Op != ssaop.OpARM64MULW {
 17165  			break
 17166  		}
 17167  		y := l.Args[1]
 17168  		x := l.Args[0]
 17169  		if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
 17170  			break
 17171  		}
 17172  		v.Reset(ssaop.OpARM64MSUBW)
 17173  		v.AddArg3(a, x, y)
 17174  		return true
 17175  	}
 17176  	// match: (SUB a l:(MNEGW x y))
 17177  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
 17178  	// result: (MADDW a x y)
 17179  	for {
 17180  		a := v_0
 17181  		l := v_1
 17182  		if l.Op != ssaop.OpARM64MNEGW {
 17183  			break
 17184  		}
 17185  		y := l.Args[1]
 17186  		x := l.Args[0]
 17187  		if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
 17188  			break
 17189  		}
 17190  		v.Reset(ssaop.OpARM64MADDW)
 17191  		v.AddArg3(a, x, y)
 17192  		return true
 17193  	}
 17194  	// match: (SUB <t> a p:(ADDconst [c] m:(MUL _ _)))
 17195  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17196  	// result: (SUBconst [c] (SUB <v.Type> a m))
 17197  	for {
 17198  		t := v.Type
 17199  		a := v_0
 17200  		p := v_1
 17201  		if p.Op != ssaop.OpARM64ADDconst {
 17202  			break
 17203  		}
 17204  		c := ssa.AuxIntToInt64(p.AuxInt)
 17205  		m := p.Args[0]
 17206  		if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17207  			break
 17208  		}
 17209  		v.Reset(ssaop.OpARM64SUBconst)
 17210  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17211  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17212  		v0.AddArg2(a, m)
 17213  		v.AddArg(v0)
 17214  		return true
 17215  	}
 17216  	// match: (SUB <t> a p:(ADDconst [c] m:(MULW _ _)))
 17217  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17218  	// result: (SUBconst [c] (SUB <v.Type> a m))
 17219  	for {
 17220  		t := v.Type
 17221  		a := v_0
 17222  		p := v_1
 17223  		if p.Op != ssaop.OpARM64ADDconst {
 17224  			break
 17225  		}
 17226  		c := ssa.AuxIntToInt64(p.AuxInt)
 17227  		m := p.Args[0]
 17228  		if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17229  			break
 17230  		}
 17231  		v.Reset(ssaop.OpARM64SUBconst)
 17232  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17233  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17234  		v0.AddArg2(a, m)
 17235  		v.AddArg(v0)
 17236  		return true
 17237  	}
 17238  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEG _ _)))
 17239  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17240  	// result: (SUBconst [c] (SUB <v.Type> a m))
 17241  	for {
 17242  		t := v.Type
 17243  		a := v_0
 17244  		p := v_1
 17245  		if p.Op != ssaop.OpARM64ADDconst {
 17246  			break
 17247  		}
 17248  		c := ssa.AuxIntToInt64(p.AuxInt)
 17249  		m := p.Args[0]
 17250  		if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17251  			break
 17252  		}
 17253  		v.Reset(ssaop.OpARM64SUBconst)
 17254  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17255  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17256  		v0.AddArg2(a, m)
 17257  		v.AddArg(v0)
 17258  		return true
 17259  	}
 17260  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEGW _ _)))
 17261  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17262  	// result: (SUBconst [c] (SUB <v.Type> a m))
 17263  	for {
 17264  		t := v.Type
 17265  		a := v_0
 17266  		p := v_1
 17267  		if p.Op != ssaop.OpARM64ADDconst {
 17268  			break
 17269  		}
 17270  		c := ssa.AuxIntToInt64(p.AuxInt)
 17271  		m := p.Args[0]
 17272  		if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17273  			break
 17274  		}
 17275  		v.Reset(ssaop.OpARM64SUBconst)
 17276  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17277  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17278  		v0.AddArg2(a, m)
 17279  		v.AddArg(v0)
 17280  		return true
 17281  	}
 17282  	// match: (SUB <t> a p:(SUBconst [c] m:(MUL _ _)))
 17283  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17284  	// result: (ADDconst [c] (SUB <v.Type> a m))
 17285  	for {
 17286  		t := v.Type
 17287  		a := v_0
 17288  		p := v_1
 17289  		if p.Op != ssaop.OpARM64SUBconst {
 17290  			break
 17291  		}
 17292  		c := ssa.AuxIntToInt64(p.AuxInt)
 17293  		m := p.Args[0]
 17294  		if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17295  			break
 17296  		}
 17297  		v.Reset(ssaop.OpARM64ADDconst)
 17298  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17299  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17300  		v0.AddArg2(a, m)
 17301  		v.AddArg(v0)
 17302  		return true
 17303  	}
 17304  	// match: (SUB <t> a p:(SUBconst [c] m:(MULW _ _)))
 17305  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17306  	// result: (ADDconst [c] (SUB <v.Type> a m))
 17307  	for {
 17308  		t := v.Type
 17309  		a := v_0
 17310  		p := v_1
 17311  		if p.Op != ssaop.OpARM64SUBconst {
 17312  			break
 17313  		}
 17314  		c := ssa.AuxIntToInt64(p.AuxInt)
 17315  		m := p.Args[0]
 17316  		if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17317  			break
 17318  		}
 17319  		v.Reset(ssaop.OpARM64ADDconst)
 17320  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17321  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17322  		v0.AddArg2(a, m)
 17323  		v.AddArg(v0)
 17324  		return true
 17325  	}
 17326  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEG _ _)))
 17327  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17328  	// result: (ADDconst [c] (SUB <v.Type> a m))
 17329  	for {
 17330  		t := v.Type
 17331  		a := v_0
 17332  		p := v_1
 17333  		if p.Op != ssaop.OpARM64SUBconst {
 17334  			break
 17335  		}
 17336  		c := ssa.AuxIntToInt64(p.AuxInt)
 17337  		m := p.Args[0]
 17338  		if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17339  			break
 17340  		}
 17341  		v.Reset(ssaop.OpARM64ADDconst)
 17342  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17343  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17344  		v0.AddArg2(a, m)
 17345  		v.AddArg(v0)
 17346  		return true
 17347  	}
 17348  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEGW _ _)))
 17349  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17350  	// result: (ADDconst [c] (SUB <v.Type> a m))
 17351  	for {
 17352  		t := v.Type
 17353  		a := v_0
 17354  		p := v_1
 17355  		if p.Op != ssaop.OpARM64SUBconst {
 17356  			break
 17357  		}
 17358  		c := ssa.AuxIntToInt64(p.AuxInt)
 17359  		m := p.Args[0]
 17360  		if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17361  			break
 17362  		}
 17363  		v.Reset(ssaop.OpARM64ADDconst)
 17364  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17365  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17366  		v0.AddArg2(a, m)
 17367  		v.AddArg(v0)
 17368  		return true
 17369  	}
 17370  	// match: (SUB x (NEG y))
 17371  	// result: (ADD x y)
 17372  	for {
 17373  		x := v_0
 17374  		if v_1.Op != ssaop.OpARM64NEG {
 17375  			break
 17376  		}
 17377  		y := v_1.Args[0]
 17378  		v.Reset(ssaop.OpARM64ADD)
 17379  		v.AddArg2(x, y)
 17380  		return true
 17381  	}
 17382  	// match: (SUB x x)
 17383  	// result: (MOVDconst [0])
 17384  	for {
 17385  		x := v_0
 17386  		if x != v_1 {
 17387  			break
 17388  		}
 17389  		v.Reset(ssaop.OpARM64MOVDconst)
 17390  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17391  		return true
 17392  	}
 17393  	// match: (SUB x (SUB y z))
 17394  	// result: (SUB (ADD <v.Type> x z) y)
 17395  	for {
 17396  		x := v_0
 17397  		if v_1.Op != ssaop.OpARM64SUB {
 17398  			break
 17399  		}
 17400  		z := v_1.Args[1]
 17401  		y := v_1.Args[0]
 17402  		v.Reset(ssaop.OpARM64SUB)
 17403  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
 17404  		v0.AddArg2(x, z)
 17405  		v.AddArg2(v0, y)
 17406  		return true
 17407  	}
 17408  	// match: (SUB (SUB x y) z)
 17409  	// result: (SUB x (ADD <y.Type> y z))
 17410  	for {
 17411  		if v_0.Op != ssaop.OpARM64SUB {
 17412  			break
 17413  		}
 17414  		y := v_0.Args[1]
 17415  		x := v_0.Args[0]
 17416  		z := v_1
 17417  		v.Reset(ssaop.OpARM64SUB)
 17418  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, y.Type)
 17419  		v0.AddArg2(y, z)
 17420  		v.AddArg2(x, v0)
 17421  		return true
 17422  	}
 17423  	// match: (SUB x0 x1:(SLLconst [c] y))
 17424  	// cond: ssa.ClobberIfDead(x1)
 17425  	// result: (SUBshiftLL x0 y [c])
 17426  	for {
 17427  		x0 := v_0
 17428  		x1 := v_1
 17429  		if x1.Op != ssaop.OpARM64SLLconst {
 17430  			break
 17431  		}
 17432  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17433  		y := x1.Args[0]
 17434  		if !(ssa.ClobberIfDead(x1)) {
 17435  			break
 17436  		}
 17437  		v.Reset(ssaop.OpARM64SUBshiftLL)
 17438  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17439  		v.AddArg2(x0, y)
 17440  		return true
 17441  	}
 17442  	// match: (SUB x0 x1:(SRLconst [c] y))
 17443  	// cond: ssa.ClobberIfDead(x1)
 17444  	// result: (SUBshiftRL x0 y [c])
 17445  	for {
 17446  		x0 := v_0
 17447  		x1 := v_1
 17448  		if x1.Op != ssaop.OpARM64SRLconst {
 17449  			break
 17450  		}
 17451  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17452  		y := x1.Args[0]
 17453  		if !(ssa.ClobberIfDead(x1)) {
 17454  			break
 17455  		}
 17456  		v.Reset(ssaop.OpARM64SUBshiftRL)
 17457  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17458  		v.AddArg2(x0, y)
 17459  		return true
 17460  	}
 17461  	// match: (SUB x0 x1:(SRAconst [c] y))
 17462  	// cond: ssa.ClobberIfDead(x1)
 17463  	// result: (SUBshiftRA x0 y [c])
 17464  	for {
 17465  		x0 := v_0
 17466  		x1 := v_1
 17467  		if x1.Op != ssaop.OpARM64SRAconst {
 17468  			break
 17469  		}
 17470  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17471  		y := x1.Args[0]
 17472  		if !(ssa.ClobberIfDead(x1)) {
 17473  			break
 17474  		}
 17475  		v.Reset(ssaop.OpARM64SUBshiftRA)
 17476  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17477  		v.AddArg2(x0, y)
 17478  		return true
 17479  	}
 17480  	return false
 17481  }
 17482  func rewriteValue_OpARM64SUBconst(v *ssa.Value) bool {
 17483  	v_0 := v.Args[0]
 17484  	// match: (SUBconst [0] x)
 17485  	// result: x
 17486  	for {
 17487  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 17488  			break
 17489  		}
 17490  		x := v_0
 17491  		v.CopyOf(x)
 17492  		return true
 17493  	}
 17494  	// match: (SUBconst [c] (MOVDconst [d]))
 17495  	// result: (MOVDconst [d-c])
 17496  	for {
 17497  		c := ssa.AuxIntToInt64(v.AuxInt)
 17498  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17499  			break
 17500  		}
 17501  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17502  		v.Reset(ssaop.OpARM64MOVDconst)
 17503  		v.AuxInt = ssa.Int64ToAuxInt(d - c)
 17504  		return true
 17505  	}
 17506  	// match: (SUBconst [c] (SUBconst [d] x))
 17507  	// result: (ADDconst [-c-d] x)
 17508  	for {
 17509  		c := ssa.AuxIntToInt64(v.AuxInt)
 17510  		if v_0.Op != ssaop.OpARM64SUBconst {
 17511  			break
 17512  		}
 17513  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17514  		x := v_0.Args[0]
 17515  		v.Reset(ssaop.OpARM64ADDconst)
 17516  		v.AuxInt = ssa.Int64ToAuxInt(-c - d)
 17517  		v.AddArg(x)
 17518  		return true
 17519  	}
 17520  	// match: (SUBconst [c] (ADDconst [d] x))
 17521  	// result: (ADDconst [-c+d] x)
 17522  	for {
 17523  		c := ssa.AuxIntToInt64(v.AuxInt)
 17524  		if v_0.Op != ssaop.OpARM64ADDconst {
 17525  			break
 17526  		}
 17527  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17528  		x := v_0.Args[0]
 17529  		v.Reset(ssaop.OpARM64ADDconst)
 17530  		v.AuxInt = ssa.Int64ToAuxInt(-c + d)
 17531  		v.AddArg(x)
 17532  		return true
 17533  	}
 17534  	return false
 17535  }
 17536  func rewriteValue_OpARM64SUBshiftLL(v *ssa.Value) bool {
 17537  	v_1 := v.Args[1]
 17538  	v_0 := v.Args[0]
 17539  	// match: (SUBshiftLL x (MOVDconst [c]) [d])
 17540  	// result: (SUBconst x [int64(uint64(c)<<uint64(d))])
 17541  	for {
 17542  		d := ssa.AuxIntToInt64(v.AuxInt)
 17543  		x := v_0
 17544  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17545  			break
 17546  		}
 17547  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17548  		v.Reset(ssaop.OpARM64SUBconst)
 17549  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 17550  		v.AddArg(x)
 17551  		return true
 17552  	}
 17553  	// match: (SUBshiftLL (SLLconst x [c]) x [c])
 17554  	// result: (MOVDconst [0])
 17555  	for {
 17556  		c := ssa.AuxIntToInt64(v.AuxInt)
 17557  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17558  			break
 17559  		}
 17560  		x := v_0.Args[0]
 17561  		if x != v_1 {
 17562  			break
 17563  		}
 17564  		v.Reset(ssaop.OpARM64MOVDconst)
 17565  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17566  		return true
 17567  	}
 17568  	return false
 17569  }
 17570  func rewriteValue_OpARM64SUBshiftRA(v *ssa.Value) bool {
 17571  	v_1 := v.Args[1]
 17572  	v_0 := v.Args[0]
 17573  	// match: (SUBshiftRA x (MOVDconst [c]) [d])
 17574  	// result: (SUBconst x [c>>uint64(d)])
 17575  	for {
 17576  		d := ssa.AuxIntToInt64(v.AuxInt)
 17577  		x := v_0
 17578  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17579  			break
 17580  		}
 17581  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17582  		v.Reset(ssaop.OpARM64SUBconst)
 17583  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 17584  		v.AddArg(x)
 17585  		return true
 17586  	}
 17587  	// match: (SUBshiftRA (SRAconst x [c]) x [c])
 17588  	// result: (MOVDconst [0])
 17589  	for {
 17590  		c := ssa.AuxIntToInt64(v.AuxInt)
 17591  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17592  			break
 17593  		}
 17594  		x := v_0.Args[0]
 17595  		if x != v_1 {
 17596  			break
 17597  		}
 17598  		v.Reset(ssaop.OpARM64MOVDconst)
 17599  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17600  		return true
 17601  	}
 17602  	return false
 17603  }
 17604  func rewriteValue_OpARM64SUBshiftRL(v *ssa.Value) bool {
 17605  	v_1 := v.Args[1]
 17606  	v_0 := v.Args[0]
 17607  	// match: (SUBshiftRL x (MOVDconst [c]) [d])
 17608  	// result: (SUBconst x [int64(uint64(c)>>uint64(d))])
 17609  	for {
 17610  		d := ssa.AuxIntToInt64(v.AuxInt)
 17611  		x := v_0
 17612  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17613  			break
 17614  		}
 17615  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17616  		v.Reset(ssaop.OpARM64SUBconst)
 17617  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 17618  		v.AddArg(x)
 17619  		return true
 17620  	}
 17621  	// match: (SUBshiftRL (SRLconst x [c]) x [c])
 17622  	// result: (MOVDconst [0])
 17623  	for {
 17624  		c := ssa.AuxIntToInt64(v.AuxInt)
 17625  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17626  			break
 17627  		}
 17628  		x := v_0.Args[0]
 17629  		if x != v_1 {
 17630  			break
 17631  		}
 17632  		v.Reset(ssaop.OpARM64MOVDconst)
 17633  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17634  		return true
 17635  	}
 17636  	return false
 17637  }
 17638  func rewriteValue_OpARM64TST(v *ssa.Value) bool {
 17639  	v_1 := v.Args[1]
 17640  	v_0 := v.Args[0]
 17641  	// match: (TST x (MOVDconst [c]))
 17642  	// result: (TSTconst [c] x)
 17643  	for {
 17644  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17645  			x := v_0
 17646  			if v_1.Op != ssaop.OpARM64MOVDconst {
 17647  				continue
 17648  			}
 17649  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 17650  			v.Reset(ssaop.OpARM64TSTconst)
 17651  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17652  			v.AddArg(x)
 17653  			return true
 17654  		}
 17655  		break
 17656  	}
 17657  	// match: (TST x0 x1:(SLLconst [c] y))
 17658  	// cond: ssa.ClobberIfDead(x1)
 17659  	// result: (TSTshiftLL x0 y [c])
 17660  	for {
 17661  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17662  			x0 := v_0
 17663  			x1 := v_1
 17664  			if x1.Op != ssaop.OpARM64SLLconst {
 17665  				continue
 17666  			}
 17667  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17668  			y := x1.Args[0]
 17669  			if !(ssa.ClobberIfDead(x1)) {
 17670  				continue
 17671  			}
 17672  			v.Reset(ssaop.OpARM64TSTshiftLL)
 17673  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17674  			v.AddArg2(x0, y)
 17675  			return true
 17676  		}
 17677  		break
 17678  	}
 17679  	// match: (TST x0 x1:(SRLconst [c] y))
 17680  	// cond: ssa.ClobberIfDead(x1)
 17681  	// result: (TSTshiftRL x0 y [c])
 17682  	for {
 17683  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17684  			x0 := v_0
 17685  			x1 := v_1
 17686  			if x1.Op != ssaop.OpARM64SRLconst {
 17687  				continue
 17688  			}
 17689  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17690  			y := x1.Args[0]
 17691  			if !(ssa.ClobberIfDead(x1)) {
 17692  				continue
 17693  			}
 17694  			v.Reset(ssaop.OpARM64TSTshiftRL)
 17695  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17696  			v.AddArg2(x0, y)
 17697  			return true
 17698  		}
 17699  		break
 17700  	}
 17701  	// match: (TST x0 x1:(SRAconst [c] y))
 17702  	// cond: ssa.ClobberIfDead(x1)
 17703  	// result: (TSTshiftRA x0 y [c])
 17704  	for {
 17705  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17706  			x0 := v_0
 17707  			x1 := v_1
 17708  			if x1.Op != ssaop.OpARM64SRAconst {
 17709  				continue
 17710  			}
 17711  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17712  			y := x1.Args[0]
 17713  			if !(ssa.ClobberIfDead(x1)) {
 17714  				continue
 17715  			}
 17716  			v.Reset(ssaop.OpARM64TSTshiftRA)
 17717  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17718  			v.AddArg2(x0, y)
 17719  			return true
 17720  		}
 17721  		break
 17722  	}
 17723  	// match: (TST x0 x1:(RORconst [c] y))
 17724  	// cond: ssa.ClobberIfDead(x1)
 17725  	// result: (TSTshiftRO x0 y [c])
 17726  	for {
 17727  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17728  			x0 := v_0
 17729  			x1 := v_1
 17730  			if x1.Op != ssaop.OpARM64RORconst {
 17731  				continue
 17732  			}
 17733  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17734  			y := x1.Args[0]
 17735  			if !(ssa.ClobberIfDead(x1)) {
 17736  				continue
 17737  			}
 17738  			v.Reset(ssaop.OpARM64TSTshiftRO)
 17739  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17740  			v.AddArg2(x0, y)
 17741  			return true
 17742  		}
 17743  		break
 17744  	}
 17745  	return false
 17746  }
 17747  func rewriteValue_OpARM64TSTW(v *ssa.Value) bool {
 17748  	v_1 := v.Args[1]
 17749  	v_0 := v.Args[0]
 17750  	// match: (TSTW x (MOVDconst [c]))
 17751  	// result: (TSTWconst [int32(c)] x)
 17752  	for {
 17753  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17754  			x := v_0
 17755  			if v_1.Op != ssaop.OpARM64MOVDconst {
 17756  				continue
 17757  			}
 17758  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 17759  			v.Reset(ssaop.OpARM64TSTWconst)
 17760  			v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 17761  			v.AddArg(x)
 17762  			return true
 17763  		}
 17764  		break
 17765  	}
 17766  	return false
 17767  }
 17768  func rewriteValue_OpARM64TSTWconst(v *ssa.Value) bool {
 17769  	v_0 := v.Args[0]
 17770  	// match: (TSTWconst (MOVDconst [x]) [y])
 17771  	// result: (FlagConstant [ssa.LogicFlags32(int32(x)&y)])
 17772  	for {
 17773  		y := ssa.AuxIntToInt32(v.AuxInt)
 17774  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17775  			break
 17776  		}
 17777  		x := ssa.AuxIntToInt64(v_0.AuxInt)
 17778  		v.Reset(ssaop.OpARM64FlagConstant)
 17779  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.LogicFlags32(int32(x) & y))
 17780  		return true
 17781  	}
 17782  	return false
 17783  }
 17784  func rewriteValue_OpARM64TSTconst(v *ssa.Value) bool {
 17785  	v_0 := v.Args[0]
 17786  	// match: (TSTconst (MOVDconst [x]) [y])
 17787  	// result: (FlagConstant [ssa.LogicFlags64(x&y)])
 17788  	for {
 17789  		y := ssa.AuxIntToInt64(v.AuxInt)
 17790  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17791  			break
 17792  		}
 17793  		x := ssa.AuxIntToInt64(v_0.AuxInt)
 17794  		v.Reset(ssaop.OpARM64FlagConstant)
 17795  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.LogicFlags64(x & y))
 17796  		return true
 17797  	}
 17798  	return false
 17799  }
 17800  func rewriteValue_OpARM64TSTshiftLL(v *ssa.Value) bool {
 17801  	v_1 := v.Args[1]
 17802  	v_0 := v.Args[0]
 17803  	b := v.Block
 17804  	// match: (TSTshiftLL (MOVDconst [c]) x [d])
 17805  	// result: (TSTconst [c] (SLLconst <x.Type> x [d]))
 17806  	for {
 17807  		d := ssa.AuxIntToInt64(v.AuxInt)
 17808  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17809  			break
 17810  		}
 17811  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17812  		x := v_1
 17813  		v.Reset(ssaop.OpARM64TSTconst)
 17814  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17815  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 17816  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17817  		v0.AddArg(x)
 17818  		v.AddArg(v0)
 17819  		return true
 17820  	}
 17821  	// match: (TSTshiftLL x (MOVDconst [c]) [d])
 17822  	// result: (TSTconst x [int64(uint64(c)<<uint64(d))])
 17823  	for {
 17824  		d := ssa.AuxIntToInt64(v.AuxInt)
 17825  		x := v_0
 17826  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17827  			break
 17828  		}
 17829  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17830  		v.Reset(ssaop.OpARM64TSTconst)
 17831  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 17832  		v.AddArg(x)
 17833  		return true
 17834  	}
 17835  	return false
 17836  }
 17837  func rewriteValue_OpARM64TSTshiftRA(v *ssa.Value) bool {
 17838  	v_1 := v.Args[1]
 17839  	v_0 := v.Args[0]
 17840  	b := v.Block
 17841  	// match: (TSTshiftRA (MOVDconst [c]) x [d])
 17842  	// result: (TSTconst [c] (SRAconst <x.Type> x [d]))
 17843  	for {
 17844  		d := ssa.AuxIntToInt64(v.AuxInt)
 17845  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17846  			break
 17847  		}
 17848  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17849  		x := v_1
 17850  		v.Reset(ssaop.OpARM64TSTconst)
 17851  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17852  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 17853  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17854  		v0.AddArg(x)
 17855  		v.AddArg(v0)
 17856  		return true
 17857  	}
 17858  	// match: (TSTshiftRA x (MOVDconst [c]) [d])
 17859  	// result: (TSTconst x [c>>uint64(d)])
 17860  	for {
 17861  		d := ssa.AuxIntToInt64(v.AuxInt)
 17862  		x := v_0
 17863  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17864  			break
 17865  		}
 17866  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17867  		v.Reset(ssaop.OpARM64TSTconst)
 17868  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 17869  		v.AddArg(x)
 17870  		return true
 17871  	}
 17872  	return false
 17873  }
 17874  func rewriteValue_OpARM64TSTshiftRL(v *ssa.Value) bool {
 17875  	v_1 := v.Args[1]
 17876  	v_0 := v.Args[0]
 17877  	b := v.Block
 17878  	// match: (TSTshiftRL (MOVDconst [c]) x [d])
 17879  	// result: (TSTconst [c] (SRLconst <x.Type> x [d]))
 17880  	for {
 17881  		d := ssa.AuxIntToInt64(v.AuxInt)
 17882  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17883  			break
 17884  		}
 17885  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17886  		x := v_1
 17887  		v.Reset(ssaop.OpARM64TSTconst)
 17888  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17889  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 17890  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17891  		v0.AddArg(x)
 17892  		v.AddArg(v0)
 17893  		return true
 17894  	}
 17895  	// match: (TSTshiftRL x (MOVDconst [c]) [d])
 17896  	// result: (TSTconst x [int64(uint64(c)>>uint64(d))])
 17897  	for {
 17898  		d := ssa.AuxIntToInt64(v.AuxInt)
 17899  		x := v_0
 17900  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17901  			break
 17902  		}
 17903  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17904  		v.Reset(ssaop.OpARM64TSTconst)
 17905  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 17906  		v.AddArg(x)
 17907  		return true
 17908  	}
 17909  	return false
 17910  }
 17911  func rewriteValue_OpARM64TSTshiftRO(v *ssa.Value) bool {
 17912  	v_1 := v.Args[1]
 17913  	v_0 := v.Args[0]
 17914  	b := v.Block
 17915  	// match: (TSTshiftRO (MOVDconst [c]) x [d])
 17916  	// result: (TSTconst [c] (RORconst <x.Type> x [d]))
 17917  	for {
 17918  		d := ssa.AuxIntToInt64(v.AuxInt)
 17919  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17920  			break
 17921  		}
 17922  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17923  		x := v_1
 17924  		v.Reset(ssaop.OpARM64TSTconst)
 17925  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17926  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 17927  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17928  		v0.AddArg(x)
 17929  		v.AddArg(v0)
 17930  		return true
 17931  	}
 17932  	// match: (TSTshiftRO x (MOVDconst [c]) [d])
 17933  	// result: (TSTconst x [rotateRight64(c, d)])
 17934  	for {
 17935  		d := ssa.AuxIntToInt64(v.AuxInt)
 17936  		x := v_0
 17937  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17938  			break
 17939  		}
 17940  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17941  		v.Reset(ssaop.OpARM64TSTconst)
 17942  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 17943  		v.AddArg(x)
 17944  		return true
 17945  	}
 17946  	return false
 17947  }
 17948  func rewriteValue_OpARM64UBFIZ(v *ssa.Value) bool {
 17949  	v_0 := v.Args[0]
 17950  	// match: (UBFIZ [bfc] (SLLconst [sc] x))
 17951  	// cond: sc < bfc.Width()
 17952  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc)] x)
 17953  	for {
 17954  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17955  		if v_0.Op != ssaop.OpARM64SLLconst {
 17956  			break
 17957  		}
 17958  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17959  		x := v_0.Args[0]
 17960  		if !(sc < bfc.Width()) {
 17961  			break
 17962  		}
 17963  		v.Reset(ssaop.OpARM64UBFIZ)
 17964  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc))
 17965  		v.AddArg(x)
 17966  		return true
 17967  	}
 17968  	return false
 17969  }
 17970  func rewriteValue_OpARM64UBFX(v *ssa.Value) bool {
 17971  	v_0 := v.Args[0]
 17972  	// match: (UBFX [bfc] (ANDconst [c] x))
 17973  	// cond: isARM64BFMask(0, c, 0) && bfc.Lsb() + bfc.Width() <= arm64BFWidth(c, 0)
 17974  	// result: (UBFX [bfc] x)
 17975  	for {
 17976  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17977  		if v_0.Op != ssaop.OpARM64ANDconst {
 17978  			break
 17979  		}
 17980  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17981  		x := v_0.Args[0]
 17982  		if !(isARM64BFMask(0, c, 0) && bfc.Lsb()+bfc.Width() <= arm64BFWidth(c, 0)) {
 17983  			break
 17984  		}
 17985  		v.Reset(ssaop.OpARM64UBFX)
 17986  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 17987  		v.AddArg(x)
 17988  		return true
 17989  	}
 17990  	// match: (UBFX [bfc] e:(MOVWUreg x))
 17991  	// cond: e.Uses == 1 && bfc.Lsb() < 32
 17992  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 32-bfc.Lsb()))] x)
 17993  	for {
 17994  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17995  		e := v_0
 17996  		if e.Op != ssaop.OpARM64MOVWUreg {
 17997  			break
 17998  		}
 17999  		x := e.Args[0]
 18000  		if !(e.Uses == 1 && bfc.Lsb() < 32) {
 18001  			break
 18002  		}
 18003  		v.Reset(ssaop.OpARM64UBFX)
 18004  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 32-bfc.Lsb())))
 18005  		v.AddArg(x)
 18006  		return true
 18007  	}
 18008  	// match: (UBFX [bfc] e:(MOVHUreg x))
 18009  	// cond: e.Uses == 1 && bfc.Lsb() < 16
 18010  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 16-bfc.Lsb()))] x)
 18011  	for {
 18012  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18013  		e := v_0
 18014  		if e.Op != ssaop.OpARM64MOVHUreg {
 18015  			break
 18016  		}
 18017  		x := e.Args[0]
 18018  		if !(e.Uses == 1 && bfc.Lsb() < 16) {
 18019  			break
 18020  		}
 18021  		v.Reset(ssaop.OpARM64UBFX)
 18022  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 16-bfc.Lsb())))
 18023  		v.AddArg(x)
 18024  		return true
 18025  	}
 18026  	// match: (UBFX [bfc] e:(MOVBUreg x))
 18027  	// cond: e.Uses == 1 && bfc.Lsb() < 8
 18028  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 8-bfc.Lsb()))] x)
 18029  	for {
 18030  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18031  		e := v_0
 18032  		if e.Op != ssaop.OpARM64MOVBUreg {
 18033  			break
 18034  		}
 18035  		x := e.Args[0]
 18036  		if !(e.Uses == 1 && bfc.Lsb() < 8) {
 18037  			break
 18038  		}
 18039  		v.Reset(ssaop.OpARM64UBFX)
 18040  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 8-bfc.Lsb())))
 18041  		v.AddArg(x)
 18042  		return true
 18043  	}
 18044  	// match: (UBFX [bfc] (SRLconst [sc] x))
 18045  	// cond: sc+bfc.Width()+bfc.Lsb() < 64
 18046  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width())] x)
 18047  	for {
 18048  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18049  		if v_0.Op != ssaop.OpARM64SRLconst {
 18050  			break
 18051  		}
 18052  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 18053  		x := v_0.Args[0]
 18054  		if !(sc+bfc.Width()+bfc.Lsb() < 64) {
 18055  			break
 18056  		}
 18057  		v.Reset(ssaop.OpARM64UBFX)
 18058  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()))
 18059  		v.AddArg(x)
 18060  		return true
 18061  	}
 18062  	// match: (UBFX [bfc] (SLLconst [sc] x))
 18063  	// cond: sc == bfc.Lsb()
 18064  	// result: (ANDconst [1<<uint(bfc.Width())-1] x)
 18065  	for {
 18066  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18067  		if v_0.Op != ssaop.OpARM64SLLconst {
 18068  			break
 18069  		}
 18070  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 18071  		x := v_0.Args[0]
 18072  		if !(sc == bfc.Lsb()) {
 18073  			break
 18074  		}
 18075  		v.Reset(ssaop.OpARM64ANDconst)
 18076  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(bfc.Width()) - 1)
 18077  		v.AddArg(x)
 18078  		return true
 18079  	}
 18080  	// match: (UBFX [bfc] (SLLconst [sc] x))
 18081  	// cond: sc < bfc.Lsb()
 18082  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 18083  	for {
 18084  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18085  		if v_0.Op != ssaop.OpARM64SLLconst {
 18086  			break
 18087  		}
 18088  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 18089  		x := v_0.Args[0]
 18090  		if !(sc < bfc.Lsb()) {
 18091  			break
 18092  		}
 18093  		v.Reset(ssaop.OpARM64UBFX)
 18094  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 18095  		v.AddArg(x)
 18096  		return true
 18097  	}
 18098  	// match: (UBFX [bfc] (SLLconst [sc] x))
 18099  	// cond: sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 18100  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 18101  	for {
 18102  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18103  		if v_0.Op != ssaop.OpARM64SLLconst {
 18104  			break
 18105  		}
 18106  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 18107  		x := v_0.Args[0]
 18108  		if !(sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 18109  			break
 18110  		}
 18111  		v.Reset(ssaop.OpARM64UBFIZ)
 18112  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 18113  		v.AddArg(x)
 18114  		return true
 18115  	}
 18116  	return false
 18117  }
 18118  func rewriteValue_OpARM64UDIV(v *ssa.Value) bool {
 18119  	v_1 := v.Args[1]
 18120  	v_0 := v.Args[0]
 18121  	// match: (UDIV x (MOVDconst [1]))
 18122  	// result: x
 18123  	for {
 18124  		x := v_0
 18125  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 18126  			break
 18127  		}
 18128  		v.CopyOf(x)
 18129  		return true
 18130  	}
 18131  	// match: (UDIV x (MOVDconst [c]))
 18132  	// cond: ssa.IsPowerOfTwo(c)
 18133  	// result: (SRLconst [ssa.Log64(c)] x)
 18134  	for {
 18135  		x := v_0
 18136  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18137  			break
 18138  		}
 18139  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18140  		if !(ssa.IsPowerOfTwo(c)) {
 18141  			break
 18142  		}
 18143  		v.Reset(ssaop.OpARM64SRLconst)
 18144  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 18145  		v.AddArg(x)
 18146  		return true
 18147  	}
 18148  	// match: (UDIV (MOVDconst [c]) (MOVDconst [d]))
 18149  	// cond: d != 0
 18150  	// result: (MOVDconst [int64(uint64(c)/uint64(d))])
 18151  	for {
 18152  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18153  			break
 18154  		}
 18155  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18156  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18157  			break
 18158  		}
 18159  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 18160  		if !(d != 0) {
 18161  			break
 18162  		}
 18163  		v.Reset(ssaop.OpARM64MOVDconst)
 18164  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) / uint64(d)))
 18165  		return true
 18166  	}
 18167  	return false
 18168  }
 18169  func rewriteValue_OpARM64UDIVW(v *ssa.Value) bool {
 18170  	v_1 := v.Args[1]
 18171  	v_0 := v.Args[0]
 18172  	b := v.Block
 18173  	// match: (UDIVW x (MOVDconst [c]))
 18174  	// cond: uint32(c)==1
 18175  	// result: (MOVWUreg x)
 18176  	for {
 18177  		x := v_0
 18178  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18179  			break
 18180  		}
 18181  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18182  		if !(uint32(c) == 1) {
 18183  			break
 18184  		}
 18185  		v.Reset(ssaop.OpARM64MOVWUreg)
 18186  		v.AddArg(x)
 18187  		return true
 18188  	}
 18189  	// match: (UDIVW x (MOVDconst [c]))
 18190  	// cond: ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)
 18191  	// result: (SRLconst [ssa.Log64(c)] (MOVWUreg <v.Type> x))
 18192  	for {
 18193  		x := v_0
 18194  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18195  			break
 18196  		}
 18197  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18198  		if !(ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)) {
 18199  			break
 18200  		}
 18201  		v.Reset(ssaop.OpARM64SRLconst)
 18202  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 18203  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUreg, v.Type)
 18204  		v0.AddArg(x)
 18205  		v.AddArg(v0)
 18206  		return true
 18207  	}
 18208  	// match: (UDIVW (MOVDconst [c]) (MOVDconst [d]))
 18209  	// cond: d != 0
 18210  	// result: (MOVDconst [int64(uint32(c)/uint32(d))])
 18211  	for {
 18212  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18213  			break
 18214  		}
 18215  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18216  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18217  			break
 18218  		}
 18219  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 18220  		if !(d != 0) {
 18221  			break
 18222  		}
 18223  		v.Reset(ssaop.OpARM64MOVDconst)
 18224  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c) / uint32(d)))
 18225  		return true
 18226  	}
 18227  	return false
 18228  }
 18229  func rewriteValue_OpARM64UMOD(v *ssa.Value) bool {
 18230  	v_1 := v.Args[1]
 18231  	v_0 := v.Args[0]
 18232  	b := v.Block
 18233  	typ := &b.Func.Config.Types
 18234  	// match: (UMOD <typ.UInt64> x y)
 18235  	// result: (MSUB <typ.UInt64> x y (UDIV <typ.UInt64> x y))
 18236  	for {
 18237  		if v.Type != typ.UInt64 {
 18238  			break
 18239  		}
 18240  		x := v_0
 18241  		y := v_1
 18242  		v.Reset(ssaop.OpARM64MSUB)
 18243  		v.Type = typ.UInt64
 18244  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UDIV, typ.UInt64)
 18245  		v0.AddArg2(x, y)
 18246  		v.AddArg3(x, y, v0)
 18247  		return true
 18248  	}
 18249  	// match: (UMOD _ (MOVDconst [1]))
 18250  	// result: (MOVDconst [0])
 18251  	for {
 18252  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 18253  			break
 18254  		}
 18255  		v.Reset(ssaop.OpARM64MOVDconst)
 18256  		v.AuxInt = ssa.Int64ToAuxInt(0)
 18257  		return true
 18258  	}
 18259  	// match: (UMOD x (MOVDconst [c]))
 18260  	// cond: ssa.IsPowerOfTwo(c)
 18261  	// result: (ANDconst [c-1] x)
 18262  	for {
 18263  		x := v_0
 18264  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18265  			break
 18266  		}
 18267  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18268  		if !(ssa.IsPowerOfTwo(c)) {
 18269  			break
 18270  		}
 18271  		v.Reset(ssaop.OpARM64ANDconst)
 18272  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
 18273  		v.AddArg(x)
 18274  		return true
 18275  	}
 18276  	// match: (UMOD (MOVDconst [c]) (MOVDconst [d]))
 18277  	// cond: d != 0
 18278  	// result: (MOVDconst [int64(uint64(c)%uint64(d))])
 18279  	for {
 18280  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18281  			break
 18282  		}
 18283  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18284  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18285  			break
 18286  		}
 18287  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 18288  		if !(d != 0) {
 18289  			break
 18290  		}
 18291  		v.Reset(ssaop.OpARM64MOVDconst)
 18292  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) % uint64(d)))
 18293  		return true
 18294  	}
 18295  	return false
 18296  }
 18297  func rewriteValue_OpARM64UMODW(v *ssa.Value) bool {
 18298  	v_1 := v.Args[1]
 18299  	v_0 := v.Args[0]
 18300  	b := v.Block
 18301  	typ := &b.Func.Config.Types
 18302  	// match: (UMODW <typ.UInt32> x y)
 18303  	// result: (MSUBW <typ.UInt32> x y (UDIVW <typ.UInt32> x y))
 18304  	for {
 18305  		if v.Type != typ.UInt32 {
 18306  			break
 18307  		}
 18308  		x := v_0
 18309  		y := v_1
 18310  		v.Reset(ssaop.OpARM64MSUBW)
 18311  		v.Type = typ.UInt32
 18312  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UDIVW, typ.UInt32)
 18313  		v0.AddArg2(x, y)
 18314  		v.AddArg3(x, y, v0)
 18315  		return true
 18316  	}
 18317  	// match: (UMODW _ (MOVDconst [c]))
 18318  	// cond: uint32(c)==1
 18319  	// result: (MOVDconst [0])
 18320  	for {
 18321  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18322  			break
 18323  		}
 18324  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18325  		if !(uint32(c) == 1) {
 18326  			break
 18327  		}
 18328  		v.Reset(ssaop.OpARM64MOVDconst)
 18329  		v.AuxInt = ssa.Int64ToAuxInt(0)
 18330  		return true
 18331  	}
 18332  	// match: (UMODW x (MOVDconst [c]))
 18333  	// cond: ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)
 18334  	// result: (ANDconst [c-1] x)
 18335  	for {
 18336  		x := v_0
 18337  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18338  			break
 18339  		}
 18340  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18341  		if !(ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)) {
 18342  			break
 18343  		}
 18344  		v.Reset(ssaop.OpARM64ANDconst)
 18345  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
 18346  		v.AddArg(x)
 18347  		return true
 18348  	}
 18349  	// match: (UMODW (MOVDconst [c]) (MOVDconst [d]))
 18350  	// cond: d != 0
 18351  	// result: (MOVDconst [int64(uint32(c)%uint32(d))])
 18352  	for {
 18353  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18354  			break
 18355  		}
 18356  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18357  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18358  			break
 18359  		}
 18360  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 18361  		if !(d != 0) {
 18362  			break
 18363  		}
 18364  		v.Reset(ssaop.OpARM64MOVDconst)
 18365  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c) % uint32(d)))
 18366  		return true
 18367  	}
 18368  	return false
 18369  }
 18370  func rewriteValue_OpARM64VBIF16B(v *ssa.Value) bool {
 18371  	v_2 := v.Args[2]
 18372  	v_1 := v.Args[1]
 18373  	v_0 := v.Args[0]
 18374  	// match: (VBIF16B x y (VNOT16B mask))
 18375  	// result: (VBIT16B x y mask)
 18376  	for {
 18377  		x := v_0
 18378  		y := v_1
 18379  		if v_2.Op != ssaop.OpARM64VNOT16B {
 18380  			break
 18381  		}
 18382  		mask := v_2.Args[0]
 18383  		v.Reset(ssaop.OpARM64VBIT16B)
 18384  		v.AddArg3(x, y, mask)
 18385  		return true
 18386  	}
 18387  	return false
 18388  }
 18389  func rewriteValue_OpARM64VBIT16B(v *ssa.Value) bool {
 18390  	v_2 := v.Args[2]
 18391  	v_1 := v.Args[1]
 18392  	v_0 := v.Args[0]
 18393  	// match: (VBIT16B x y (VNOT16B mask))
 18394  	// result: (VBIF16B x y mask)
 18395  	for {
 18396  		x := v_0
 18397  		y := v_1
 18398  		if v_2.Op != ssaop.OpARM64VNOT16B {
 18399  			break
 18400  		}
 18401  		mask := v_2.Args[0]
 18402  		v.Reset(ssaop.OpARM64VBIF16B)
 18403  		v.AddArg3(x, y, mask)
 18404  		return true
 18405  	}
 18406  	return false
 18407  }
 18408  func rewriteValue_OpARM64VDUPBbcast(v *ssa.Value) bool {
 18409  	v_0 := v.Args[0]
 18410  	// match: (VDUPBbcast [i] (VMOVBins [j] _ (MOVDconst [c])))
 18411  	// cond: i == j && c>=-128 && c<=255
 18412  	// result: (VMOVI16B [uint8(c)])
 18413  	for {
 18414  		i := ssa.AuxIntToUint8(v.AuxInt)
 18415  		if v_0.Op != ssaop.OpARM64VMOVBins {
 18416  			break
 18417  		}
 18418  		j := ssa.AuxIntToUint8(v_0.AuxInt)
 18419  		_ = v_0.Args[1]
 18420  		v_0_1 := v_0.Args[1]
 18421  		if v_0_1.Op != ssaop.OpARM64MOVDconst {
 18422  			break
 18423  		}
 18424  		c := ssa.AuxIntToInt64(v_0_1.AuxInt)
 18425  		if !(i == j && c >= -128 && c <= 255) {
 18426  			break
 18427  		}
 18428  		v.Reset(ssaop.OpARM64VMOVI16B)
 18429  		v.AuxInt = ssa.Uint8ToAuxInt(uint8(c))
 18430  		return true
 18431  	}
 18432  	return false
 18433  }
 18434  func rewriteValue_OpARM64VEOR16B(v *ssa.Value) bool {
 18435  	v_1 := v.Args[1]
 18436  	v_0 := v.Args[0]
 18437  	// match: (VEOR16B x x)
 18438  	// result: (VMOVI16B [0])
 18439  	for {
 18440  		x := v_0
 18441  		if x != v_1 {
 18442  			break
 18443  		}
 18444  		v.Reset(ssaop.OpARM64VMOVI16B)
 18445  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 18446  		return true
 18447  	}
 18448  	return false
 18449  }
 18450  func rewriteValue_OpARM64VFCVTL4S(v *ssa.Value) bool {
 18451  	v_0 := v.Args[0]
 18452  	// match: (VFCVTL4S (VDUPDextr [1] x))
 18453  	// result: (VFCVTL2_4S x)
 18454  	for {
 18455  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18456  			break
 18457  		}
 18458  		x := v_0.Args[0]
 18459  		v.Reset(ssaop.OpARM64VFCVTL2_4S)
 18460  		v.AddArg(x)
 18461  		return true
 18462  	}
 18463  	return false
 18464  }
 18465  func rewriteValue_OpARM64VMOVDins0(v *ssa.Value) bool {
 18466  	v_1 := v.Args[1]
 18467  	v_0 := v.Args[0]
 18468  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VFCVTN2D y)))
 18469  	// result: (VFCVTN2_2D dst y)
 18470  	for {
 18471  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18472  			break
 18473  		}
 18474  		dst := v_0
 18475  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18476  			break
 18477  		}
 18478  		v_1_0 := v_1.Args[0]
 18479  		if v_1_0.Op != ssaop.OpARM64VFCVTN2D {
 18480  			break
 18481  		}
 18482  		y := v_1_0.Args[0]
 18483  		v.Reset(ssaop.OpARM64VFCVTN2_2D)
 18484  		v.AddArg2(dst, y)
 18485  		return true
 18486  	}
 18487  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN2D [c] y)))
 18488  	// result: (VSHRN2_2D dst [c] y)
 18489  	for {
 18490  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18491  			break
 18492  		}
 18493  		dst := v_0
 18494  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18495  			break
 18496  		}
 18497  		v_1_0 := v_1.Args[0]
 18498  		if v_1_0.Op != ssaop.OpARM64VSHRN2D {
 18499  			break
 18500  		}
 18501  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18502  		y := v_1_0.Args[0]
 18503  		v.Reset(ssaop.OpARM64VSHRN2_2D)
 18504  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18505  		v.AddArg2(dst, y)
 18506  		return true
 18507  	}
 18508  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN4S [c] y)))
 18509  	// result: (VSHRN2_4S dst [c] y)
 18510  	for {
 18511  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18512  			break
 18513  		}
 18514  		dst := v_0
 18515  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18516  			break
 18517  		}
 18518  		v_1_0 := v_1.Args[0]
 18519  		if v_1_0.Op != ssaop.OpARM64VSHRN4S {
 18520  			break
 18521  		}
 18522  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18523  		y := v_1_0.Args[0]
 18524  		v.Reset(ssaop.OpARM64VSHRN2_4S)
 18525  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18526  		v.AddArg2(dst, y)
 18527  		return true
 18528  	}
 18529  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN8H [c] y)))
 18530  	// result: (VSHRN2_8H dst [c] y)
 18531  	for {
 18532  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18533  			break
 18534  		}
 18535  		dst := v_0
 18536  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18537  			break
 18538  		}
 18539  		v_1_0 := v_1.Args[0]
 18540  		if v_1_0.Op != ssaop.OpARM64VSHRN8H {
 18541  			break
 18542  		}
 18543  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18544  		y := v_1_0.Args[0]
 18545  		v.Reset(ssaop.OpARM64VSHRN2_8H)
 18546  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18547  		v.AddArg2(dst, y)
 18548  		return true
 18549  	}
 18550  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN2D y)))
 18551  	// result: (VSQXTN2_2D dst y)
 18552  	for {
 18553  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18554  			break
 18555  		}
 18556  		dst := v_0
 18557  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18558  			break
 18559  		}
 18560  		v_1_0 := v_1.Args[0]
 18561  		if v_1_0.Op != ssaop.OpARM64VSQXTN2D {
 18562  			break
 18563  		}
 18564  		y := v_1_0.Args[0]
 18565  		v.Reset(ssaop.OpARM64VSQXTN2_2D)
 18566  		v.AddArg2(dst, y)
 18567  		return true
 18568  	}
 18569  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN4S y)))
 18570  	// result: (VSQXTN2_4S dst y)
 18571  	for {
 18572  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18573  			break
 18574  		}
 18575  		dst := v_0
 18576  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18577  			break
 18578  		}
 18579  		v_1_0 := v_1.Args[0]
 18580  		if v_1_0.Op != ssaop.OpARM64VSQXTN4S {
 18581  			break
 18582  		}
 18583  		y := v_1_0.Args[0]
 18584  		v.Reset(ssaop.OpARM64VSQXTN2_4S)
 18585  		v.AddArg2(dst, y)
 18586  		return true
 18587  	}
 18588  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN8H y)))
 18589  	// result: (VSQXTN2_8H dst y)
 18590  	for {
 18591  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18592  			break
 18593  		}
 18594  		dst := v_0
 18595  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18596  			break
 18597  		}
 18598  		v_1_0 := v_1.Args[0]
 18599  		if v_1_0.Op != ssaop.OpARM64VSQXTN8H {
 18600  			break
 18601  		}
 18602  		y := v_1_0.Args[0]
 18603  		v.Reset(ssaop.OpARM64VSQXTN2_8H)
 18604  		v.AddArg2(dst, y)
 18605  		return true
 18606  	}
 18607  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN2D y)))
 18608  	// result: (VSQXTUN2_2D dst y)
 18609  	for {
 18610  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18611  			break
 18612  		}
 18613  		dst := v_0
 18614  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18615  			break
 18616  		}
 18617  		v_1_0 := v_1.Args[0]
 18618  		if v_1_0.Op != ssaop.OpARM64VSQXTUN2D {
 18619  			break
 18620  		}
 18621  		y := v_1_0.Args[0]
 18622  		v.Reset(ssaop.OpARM64VSQXTUN2_2D)
 18623  		v.AddArg2(dst, y)
 18624  		return true
 18625  	}
 18626  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN4S y)))
 18627  	// result: (VSQXTUN2_4S dst y)
 18628  	for {
 18629  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18630  			break
 18631  		}
 18632  		dst := v_0
 18633  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18634  			break
 18635  		}
 18636  		v_1_0 := v_1.Args[0]
 18637  		if v_1_0.Op != ssaop.OpARM64VSQXTUN4S {
 18638  			break
 18639  		}
 18640  		y := v_1_0.Args[0]
 18641  		v.Reset(ssaop.OpARM64VSQXTUN2_4S)
 18642  		v.AddArg2(dst, y)
 18643  		return true
 18644  	}
 18645  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN8H y)))
 18646  	// result: (VSQXTUN2_8H dst y)
 18647  	for {
 18648  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18649  			break
 18650  		}
 18651  		dst := v_0
 18652  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18653  			break
 18654  		}
 18655  		v_1_0 := v_1.Args[0]
 18656  		if v_1_0.Op != ssaop.OpARM64VSQXTUN8H {
 18657  			break
 18658  		}
 18659  		y := v_1_0.Args[0]
 18660  		v.Reset(ssaop.OpARM64VSQXTUN2_8H)
 18661  		v.AddArg2(dst, y)
 18662  		return true
 18663  	}
 18664  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN2D y)))
 18665  	// result: (VUQXTN2_2D dst y)
 18666  	for {
 18667  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18668  			break
 18669  		}
 18670  		dst := v_0
 18671  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18672  			break
 18673  		}
 18674  		v_1_0 := v_1.Args[0]
 18675  		if v_1_0.Op != ssaop.OpARM64VUQXTN2D {
 18676  			break
 18677  		}
 18678  		y := v_1_0.Args[0]
 18679  		v.Reset(ssaop.OpARM64VUQXTN2_2D)
 18680  		v.AddArg2(dst, y)
 18681  		return true
 18682  	}
 18683  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN4S y)))
 18684  	// result: (VUQXTN2_4S dst y)
 18685  	for {
 18686  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18687  			break
 18688  		}
 18689  		dst := v_0
 18690  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18691  			break
 18692  		}
 18693  		v_1_0 := v_1.Args[0]
 18694  		if v_1_0.Op != ssaop.OpARM64VUQXTN4S {
 18695  			break
 18696  		}
 18697  		y := v_1_0.Args[0]
 18698  		v.Reset(ssaop.OpARM64VUQXTN2_4S)
 18699  		v.AddArg2(dst, y)
 18700  		return true
 18701  	}
 18702  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN8H y)))
 18703  	// result: (VUQXTN2_8H dst y)
 18704  	for {
 18705  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18706  			break
 18707  		}
 18708  		dst := v_0
 18709  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18710  			break
 18711  		}
 18712  		v_1_0 := v_1.Args[0]
 18713  		if v_1_0.Op != ssaop.OpARM64VUQXTN8H {
 18714  			break
 18715  		}
 18716  		y := v_1_0.Args[0]
 18717  		v.Reset(ssaop.OpARM64VUQXTN2_8H)
 18718  		v.AddArg2(dst, y)
 18719  		return true
 18720  	}
 18721  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN2D y)))
 18722  	// result: (VXTN2_2D dst y)
 18723  	for {
 18724  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18725  			break
 18726  		}
 18727  		dst := v_0
 18728  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18729  			break
 18730  		}
 18731  		v_1_0 := v_1.Args[0]
 18732  		if v_1_0.Op != ssaop.OpARM64VXTN2D {
 18733  			break
 18734  		}
 18735  		y := v_1_0.Args[0]
 18736  		v.Reset(ssaop.OpARM64VXTN2_2D)
 18737  		v.AddArg2(dst, y)
 18738  		return true
 18739  	}
 18740  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN4S y)))
 18741  	// result: (VXTN2_4S dst y)
 18742  	for {
 18743  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18744  			break
 18745  		}
 18746  		dst := v_0
 18747  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18748  			break
 18749  		}
 18750  		v_1_0 := v_1.Args[0]
 18751  		if v_1_0.Op != ssaop.OpARM64VXTN4S {
 18752  			break
 18753  		}
 18754  		y := v_1_0.Args[0]
 18755  		v.Reset(ssaop.OpARM64VXTN2_4S)
 18756  		v.AddArg2(dst, y)
 18757  		return true
 18758  	}
 18759  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN8H y)))
 18760  	// result: (VXTN2_8H dst y)
 18761  	for {
 18762  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18763  			break
 18764  		}
 18765  		dst := v_0
 18766  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18767  			break
 18768  		}
 18769  		v_1_0 := v_1.Args[0]
 18770  		if v_1_0.Op != ssaop.OpARM64VXTN8H {
 18771  			break
 18772  		}
 18773  		y := v_1_0.Args[0]
 18774  		v.Reset(ssaop.OpARM64VXTN2_8H)
 18775  		v.AddArg2(dst, y)
 18776  		return true
 18777  	}
 18778  	// match: (VMOVDins0 [0] (VMOVI16B [0]) y:(VDUPDextr [i] _))
 18779  	// result: y
 18780  	for {
 18781  		if ssa.AuxIntToUint8(v.AuxInt) != 0 || v_0.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 18782  			break
 18783  		}
 18784  		y := v_1
 18785  		if y.Op != ssaop.OpARM64VDUPDextr {
 18786  			break
 18787  		}
 18788  		v.CopyOf(y)
 18789  		return true
 18790  	}
 18791  	return false
 18792  }
 18793  func rewriteValue_OpARM64VMOVSins0(v *ssa.Value) bool {
 18794  	v_1 := v.Args[1]
 18795  	v_0 := v.Args[0]
 18796  	// match: (VMOVSins0 [0] (VMOVI16B [0]) y:(VDUPSextr [i] _))
 18797  	// result: y
 18798  	for {
 18799  		if ssa.AuxIntToUint8(v.AuxInt) != 0 || v_0.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 18800  			break
 18801  		}
 18802  		y := v_1
 18803  		if y.Op != ssaop.OpARM64VDUPSextr {
 18804  			break
 18805  		}
 18806  		v.CopyOf(y)
 18807  		return true
 18808  	}
 18809  	return false
 18810  }
 18811  func rewriteValue_OpARM64VNOT16B(v *ssa.Value) bool {
 18812  	v_0 := v.Args[0]
 18813  	// match: (VNOT16B (VCMEQ16B (VAND16B x y) (VMOVI16B [0])))
 18814  	// result: (VCMTST16B x y)
 18815  	for {
 18816  		if v_0.Op != ssaop.OpARM64VCMEQ16B {
 18817  			break
 18818  		}
 18819  		_ = v_0.Args[1]
 18820  		v_0_0 := v_0.Args[0]
 18821  		v_0_1 := v_0.Args[1]
 18822  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 18823  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 18824  				continue
 18825  			}
 18826  			y := v_0_0.Args[1]
 18827  			x := v_0_0.Args[0]
 18828  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 18829  				continue
 18830  			}
 18831  			v.Reset(ssaop.OpARM64VCMTST16B)
 18832  			v.AddArg2(x, y)
 18833  			return true
 18834  		}
 18835  		break
 18836  	}
 18837  	// match: (VNOT16B (VCMEQ8H (VAND16B x y) (VMOVI16B [0])))
 18838  	// result: (VCMTST8H x y)
 18839  	for {
 18840  		if v_0.Op != ssaop.OpARM64VCMEQ8H {
 18841  			break
 18842  		}
 18843  		_ = v_0.Args[1]
 18844  		v_0_0 := v_0.Args[0]
 18845  		v_0_1 := v_0.Args[1]
 18846  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 18847  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 18848  				continue
 18849  			}
 18850  			y := v_0_0.Args[1]
 18851  			x := v_0_0.Args[0]
 18852  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 18853  				continue
 18854  			}
 18855  			v.Reset(ssaop.OpARM64VCMTST8H)
 18856  			v.AddArg2(x, y)
 18857  			return true
 18858  		}
 18859  		break
 18860  	}
 18861  	// match: (VNOT16B (VCMEQ4S (VAND16B x y) (VMOVI16B [0])))
 18862  	// result: (VCMTST4S x y)
 18863  	for {
 18864  		if v_0.Op != ssaop.OpARM64VCMEQ4S {
 18865  			break
 18866  		}
 18867  		_ = v_0.Args[1]
 18868  		v_0_0 := v_0.Args[0]
 18869  		v_0_1 := v_0.Args[1]
 18870  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 18871  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 18872  				continue
 18873  			}
 18874  			y := v_0_0.Args[1]
 18875  			x := v_0_0.Args[0]
 18876  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 18877  				continue
 18878  			}
 18879  			v.Reset(ssaop.OpARM64VCMTST4S)
 18880  			v.AddArg2(x, y)
 18881  			return true
 18882  		}
 18883  		break
 18884  	}
 18885  	// match: (VNOT16B (VCMEQ2D (VAND16B x y) (VMOVI16B [0])))
 18886  	// result: (VCMTST2D x y)
 18887  	for {
 18888  		if v_0.Op != ssaop.OpARM64VCMEQ2D {
 18889  			break
 18890  		}
 18891  		_ = v_0.Args[1]
 18892  		v_0_0 := v_0.Args[0]
 18893  		v_0_1 := v_0.Args[1]
 18894  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 18895  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 18896  				continue
 18897  			}
 18898  			y := v_0_0.Args[1]
 18899  			x := v_0_0.Args[0]
 18900  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 18901  				continue
 18902  			}
 18903  			v.Reset(ssaop.OpARM64VCMTST2D)
 18904  			v.AddArg2(x, y)
 18905  			return true
 18906  		}
 18907  		break
 18908  	}
 18909  	return false
 18910  }
 18911  func rewriteValue_OpARM64VPMULL2D(v *ssa.Value) bool {
 18912  	v_1 := v.Args[1]
 18913  	v_0 := v.Args[0]
 18914  	// match: (VPMULL2D (VDUPDextr [1] x) (VDUPDextr [1] y))
 18915  	// result: (VPMULL2_2D x y)
 18916  	for {
 18917  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18918  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18919  				continue
 18920  			}
 18921  			x := v_0.Args[0]
 18922  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18923  				continue
 18924  			}
 18925  			y := v_1.Args[0]
 18926  			v.Reset(ssaop.OpARM64VPMULL2_2D)
 18927  			v.AddArg2(x, y)
 18928  			return true
 18929  		}
 18930  		break
 18931  	}
 18932  	return false
 18933  }
 18934  func rewriteValue_OpARM64VSHL16B(v *ssa.Value) bool {
 18935  	v_0 := v.Args[0]
 18936  	// match: (VSHL16B [a] x)
 18937  	// cond: a==0
 18938  	// result: x
 18939  	for {
 18940  		a := ssa.AuxIntToUint8(v.AuxInt)
 18941  		x := v_0
 18942  		if !(a == 0) {
 18943  			break
 18944  		}
 18945  		v.CopyOf(x)
 18946  		return true
 18947  	}
 18948  	return false
 18949  }
 18950  func rewriteValue_OpARM64VSHL2D(v *ssa.Value) bool {
 18951  	v_0 := v.Args[0]
 18952  	// match: (VSHL2D [a] x)
 18953  	// cond: a==0
 18954  	// result: x
 18955  	for {
 18956  		a := ssa.AuxIntToUint8(v.AuxInt)
 18957  		x := v_0
 18958  		if !(a == 0) {
 18959  			break
 18960  		}
 18961  		v.CopyOf(x)
 18962  		return true
 18963  	}
 18964  	return false
 18965  }
 18966  func rewriteValue_OpARM64VSHL4S(v *ssa.Value) bool {
 18967  	v_0 := v.Args[0]
 18968  	// match: (VSHL4S [a] x)
 18969  	// cond: a==0
 18970  	// result: x
 18971  	for {
 18972  		a := ssa.AuxIntToUint8(v.AuxInt)
 18973  		x := v_0
 18974  		if !(a == 0) {
 18975  			break
 18976  		}
 18977  		v.CopyOf(x)
 18978  		return true
 18979  	}
 18980  	return false
 18981  }
 18982  func rewriteValue_OpARM64VSHL8H(v *ssa.Value) bool {
 18983  	v_0 := v.Args[0]
 18984  	// match: (VSHL8H [a] x)
 18985  	// cond: a==0
 18986  	// result: x
 18987  	for {
 18988  		a := ssa.AuxIntToUint8(v.AuxInt)
 18989  		x := v_0
 18990  		if !(a == 0) {
 18991  			break
 18992  		}
 18993  		v.CopyOf(x)
 18994  		return true
 18995  	}
 18996  	return false
 18997  }
 18998  func rewriteValue_OpARM64VSHRN2D(v *ssa.Value) bool {
 18999  	v_0 := v.Args[0]
 19000  	// match: (VSHRN2D [0] x)
 19001  	// result: (VXTN2D x)
 19002  	for {
 19003  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 19004  			break
 19005  		}
 19006  		x := v_0
 19007  		v.Reset(ssaop.OpARM64VXTN2D)
 19008  		v.AddArg(x)
 19009  		return true
 19010  	}
 19011  	return false
 19012  }
 19013  func rewriteValue_OpARM64VSHRN4S(v *ssa.Value) bool {
 19014  	v_0 := v.Args[0]
 19015  	// match: (VSHRN4S [0] x)
 19016  	// result: (VXTN4S x)
 19017  	for {
 19018  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 19019  			break
 19020  		}
 19021  		x := v_0
 19022  		v.Reset(ssaop.OpARM64VXTN4S)
 19023  		v.AddArg(x)
 19024  		return true
 19025  	}
 19026  	return false
 19027  }
 19028  func rewriteValue_OpARM64VSHRN8H(v *ssa.Value) bool {
 19029  	v_0 := v.Args[0]
 19030  	// match: (VSHRN8H [0] x)
 19031  	// result: (VXTN8H x)
 19032  	for {
 19033  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 19034  			break
 19035  		}
 19036  		x := v_0
 19037  		v.Reset(ssaop.OpARM64VXTN8H)
 19038  		v.AddArg(x)
 19039  		return true
 19040  	}
 19041  	return false
 19042  }
 19043  func rewriteValue_OpARM64VSMULL16B(v *ssa.Value) bool {
 19044  	v_1 := v.Args[1]
 19045  	v_0 := v.Args[0]
 19046  	// match: (VSMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y))
 19047  	// result: (VSMULL2_16B x y)
 19048  	for {
 19049  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19050  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19051  				continue
 19052  			}
 19053  			x := v_0.Args[0]
 19054  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19055  				continue
 19056  			}
 19057  			y := v_1.Args[0]
 19058  			v.Reset(ssaop.OpARM64VSMULL2_16B)
 19059  			v.AddArg2(x, y)
 19060  			return true
 19061  		}
 19062  		break
 19063  	}
 19064  	return false
 19065  }
 19066  func rewriteValue_OpARM64VSMULL4S(v *ssa.Value) bool {
 19067  	v_1 := v.Args[1]
 19068  	v_0 := v.Args[0]
 19069  	// match: (VSMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y))
 19070  	// result: (VSMULL2_4S x y)
 19071  	for {
 19072  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19073  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19074  				continue
 19075  			}
 19076  			x := v_0.Args[0]
 19077  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19078  				continue
 19079  			}
 19080  			y := v_1.Args[0]
 19081  			v.Reset(ssaop.OpARM64VSMULL2_4S)
 19082  			v.AddArg2(x, y)
 19083  			return true
 19084  		}
 19085  		break
 19086  	}
 19087  	return false
 19088  }
 19089  func rewriteValue_OpARM64VSMULL8H(v *ssa.Value) bool {
 19090  	v_1 := v.Args[1]
 19091  	v_0 := v.Args[0]
 19092  	// match: (VSMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y))
 19093  	// result: (VSMULL2_8H x y)
 19094  	for {
 19095  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19096  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19097  				continue
 19098  			}
 19099  			x := v_0.Args[0]
 19100  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19101  				continue
 19102  			}
 19103  			y := v_1.Args[0]
 19104  			v.Reset(ssaop.OpARM64VSMULL2_8H)
 19105  			v.AddArg2(x, y)
 19106  			return true
 19107  		}
 19108  		break
 19109  	}
 19110  	return false
 19111  }
 19112  func rewriteValue_OpARM64VSQSHL16Bconst(v *ssa.Value) bool {
 19113  	v_0 := v.Args[0]
 19114  	// match: (VSQSHL16Bconst [a] x)
 19115  	// cond: a==0
 19116  	// result: x
 19117  	for {
 19118  		a := ssa.AuxIntToUint8(v.AuxInt)
 19119  		x := v_0
 19120  		if !(a == 0) {
 19121  			break
 19122  		}
 19123  		v.CopyOf(x)
 19124  		return true
 19125  	}
 19126  	return false
 19127  }
 19128  func rewriteValue_OpARM64VSQSHL2Dconst(v *ssa.Value) bool {
 19129  	v_0 := v.Args[0]
 19130  	// match: (VSQSHL2Dconst [a] x)
 19131  	// cond: a==0
 19132  	// result: x
 19133  	for {
 19134  		a := ssa.AuxIntToUint8(v.AuxInt)
 19135  		x := v_0
 19136  		if !(a == 0) {
 19137  			break
 19138  		}
 19139  		v.CopyOf(x)
 19140  		return true
 19141  	}
 19142  	return false
 19143  }
 19144  func rewriteValue_OpARM64VSQSHL4Sconst(v *ssa.Value) bool {
 19145  	v_0 := v.Args[0]
 19146  	// match: (VSQSHL4Sconst [a] x)
 19147  	// cond: a==0
 19148  	// result: x
 19149  	for {
 19150  		a := ssa.AuxIntToUint8(v.AuxInt)
 19151  		x := v_0
 19152  		if !(a == 0) {
 19153  			break
 19154  		}
 19155  		v.CopyOf(x)
 19156  		return true
 19157  	}
 19158  	return false
 19159  }
 19160  func rewriteValue_OpARM64VSQSHL8Hconst(v *ssa.Value) bool {
 19161  	v_0 := v.Args[0]
 19162  	// match: (VSQSHL8Hconst [a] x)
 19163  	// cond: a==0
 19164  	// result: x
 19165  	for {
 19166  		a := ssa.AuxIntToUint8(v.AuxInt)
 19167  		x := v_0
 19168  		if !(a == 0) {
 19169  			break
 19170  		}
 19171  		v.CopyOf(x)
 19172  		return true
 19173  	}
 19174  	return false
 19175  }
 19176  func rewriteValue_OpARM64VSSHLL16B(v *ssa.Value) bool {
 19177  	v_0 := v.Args[0]
 19178  	// match: (VSSHLL16B [a] (VDUPDextr [1] x))
 19179  	// result: (VSSHLL2_16B [a] x)
 19180  	for {
 19181  		a := ssa.AuxIntToUint8(v.AuxInt)
 19182  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19183  			break
 19184  		}
 19185  		x := v_0.Args[0]
 19186  		v.Reset(ssaop.OpARM64VSSHLL2_16B)
 19187  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19188  		v.AddArg(x)
 19189  		return true
 19190  	}
 19191  	return false
 19192  }
 19193  func rewriteValue_OpARM64VSSHLL4S(v *ssa.Value) bool {
 19194  	v_0 := v.Args[0]
 19195  	// match: (VSSHLL4S [a] (VDUPDextr [1] x))
 19196  	// result: (VSSHLL2_4S [a] x)
 19197  	for {
 19198  		a := ssa.AuxIntToUint8(v.AuxInt)
 19199  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19200  			break
 19201  		}
 19202  		x := v_0.Args[0]
 19203  		v.Reset(ssaop.OpARM64VSSHLL2_4S)
 19204  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19205  		v.AddArg(x)
 19206  		return true
 19207  	}
 19208  	return false
 19209  }
 19210  func rewriteValue_OpARM64VSSHLL8H(v *ssa.Value) bool {
 19211  	v_0 := v.Args[0]
 19212  	// match: (VSSHLL8H [a] (VDUPDextr [1] x))
 19213  	// result: (VSSHLL2_8H [a] x)
 19214  	for {
 19215  		a := ssa.AuxIntToUint8(v.AuxInt)
 19216  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19217  			break
 19218  		}
 19219  		x := v_0.Args[0]
 19220  		v.Reset(ssaop.OpARM64VSSHLL2_8H)
 19221  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19222  		v.AddArg(x)
 19223  		return true
 19224  	}
 19225  	return false
 19226  }
 19227  func rewriteValue_OpARM64VSSHR16B(v *ssa.Value) bool {
 19228  	v_0 := v.Args[0]
 19229  	// match: (VSSHR16B [a] x)
 19230  	// cond: a==0
 19231  	// result: x
 19232  	for {
 19233  		a := ssa.AuxIntToUint8(v.AuxInt)
 19234  		x := v_0
 19235  		if !(a == 0) {
 19236  			break
 19237  		}
 19238  		v.CopyOf(x)
 19239  		return true
 19240  	}
 19241  	return false
 19242  }
 19243  func rewriteValue_OpARM64VSSHR2D(v *ssa.Value) bool {
 19244  	v_0 := v.Args[0]
 19245  	// match: (VSSHR2D [a] x)
 19246  	// cond: a==0
 19247  	// result: x
 19248  	for {
 19249  		a := ssa.AuxIntToUint8(v.AuxInt)
 19250  		x := v_0
 19251  		if !(a == 0) {
 19252  			break
 19253  		}
 19254  		v.CopyOf(x)
 19255  		return true
 19256  	}
 19257  	return false
 19258  }
 19259  func rewriteValue_OpARM64VSSHR4S(v *ssa.Value) bool {
 19260  	v_0 := v.Args[0]
 19261  	// match: (VSSHR4S [a] x)
 19262  	// cond: a==0
 19263  	// result: x
 19264  	for {
 19265  		a := ssa.AuxIntToUint8(v.AuxInt)
 19266  		x := v_0
 19267  		if !(a == 0) {
 19268  			break
 19269  		}
 19270  		v.CopyOf(x)
 19271  		return true
 19272  	}
 19273  	return false
 19274  }
 19275  func rewriteValue_OpARM64VSSHR8H(v *ssa.Value) bool {
 19276  	v_0 := v.Args[0]
 19277  	// match: (VSSHR8H [a] x)
 19278  	// cond: a==0
 19279  	// result: x
 19280  	for {
 19281  		a := ssa.AuxIntToUint8(v.AuxInt)
 19282  		x := v_0
 19283  		if !(a == 0) {
 19284  			break
 19285  		}
 19286  		v.CopyOf(x)
 19287  		return true
 19288  	}
 19289  	return false
 19290  }
 19291  func rewriteValue_OpARM64VSXTL16B(v *ssa.Value) bool {
 19292  	v_0 := v.Args[0]
 19293  	// match: (VSXTL16B (VDUPDextr [1] x))
 19294  	// result: (VSXTL2_16B x)
 19295  	for {
 19296  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19297  			break
 19298  		}
 19299  		x := v_0.Args[0]
 19300  		v.Reset(ssaop.OpARM64VSXTL2_16B)
 19301  		v.AddArg(x)
 19302  		return true
 19303  	}
 19304  	return false
 19305  }
 19306  func rewriteValue_OpARM64VSXTL4S(v *ssa.Value) bool {
 19307  	v_0 := v.Args[0]
 19308  	// match: (VSXTL4S (VDUPDextr [1] x))
 19309  	// result: (VSXTL2_4S x)
 19310  	for {
 19311  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19312  			break
 19313  		}
 19314  		x := v_0.Args[0]
 19315  		v.Reset(ssaop.OpARM64VSXTL2_4S)
 19316  		v.AddArg(x)
 19317  		return true
 19318  	}
 19319  	return false
 19320  }
 19321  func rewriteValue_OpARM64VSXTL8H(v *ssa.Value) bool {
 19322  	v_0 := v.Args[0]
 19323  	// match: (VSXTL8H (VDUPDextr [1] x))
 19324  	// result: (VSXTL2_8H x)
 19325  	for {
 19326  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19327  			break
 19328  		}
 19329  		x := v_0.Args[0]
 19330  		v.Reset(ssaop.OpARM64VSXTL2_8H)
 19331  		v.AddArg(x)
 19332  		return true
 19333  	}
 19334  	return false
 19335  }
 19336  func rewriteValue_OpARM64VUMULL16B(v *ssa.Value) bool {
 19337  	v_1 := v.Args[1]
 19338  	v_0 := v.Args[0]
 19339  	// match: (VUMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y))
 19340  	// result: (VUMULL2_16B x y)
 19341  	for {
 19342  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19343  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19344  				continue
 19345  			}
 19346  			x := v_0.Args[0]
 19347  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19348  				continue
 19349  			}
 19350  			y := v_1.Args[0]
 19351  			v.Reset(ssaop.OpARM64VUMULL2_16B)
 19352  			v.AddArg2(x, y)
 19353  			return true
 19354  		}
 19355  		break
 19356  	}
 19357  	return false
 19358  }
 19359  func rewriteValue_OpARM64VUMULL4S(v *ssa.Value) bool {
 19360  	v_1 := v.Args[1]
 19361  	v_0 := v.Args[0]
 19362  	// match: (VUMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y))
 19363  	// result: (VUMULL2_4S x y)
 19364  	for {
 19365  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19366  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19367  				continue
 19368  			}
 19369  			x := v_0.Args[0]
 19370  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19371  				continue
 19372  			}
 19373  			y := v_1.Args[0]
 19374  			v.Reset(ssaop.OpARM64VUMULL2_4S)
 19375  			v.AddArg2(x, y)
 19376  			return true
 19377  		}
 19378  		break
 19379  	}
 19380  	return false
 19381  }
 19382  func rewriteValue_OpARM64VUMULL8H(v *ssa.Value) bool {
 19383  	v_1 := v.Args[1]
 19384  	v_0 := v.Args[0]
 19385  	// match: (VUMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y))
 19386  	// result: (VUMULL2_8H x y)
 19387  	for {
 19388  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19389  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19390  				continue
 19391  			}
 19392  			x := v_0.Args[0]
 19393  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19394  				continue
 19395  			}
 19396  			y := v_1.Args[0]
 19397  			v.Reset(ssaop.OpARM64VUMULL2_8H)
 19398  			v.AddArg2(x, y)
 19399  			return true
 19400  		}
 19401  		break
 19402  	}
 19403  	return false
 19404  }
 19405  func rewriteValue_OpARM64VUQSHL16Bconst(v *ssa.Value) bool {
 19406  	v_0 := v.Args[0]
 19407  	// match: (VUQSHL16Bconst [a] x)
 19408  	// cond: a==0
 19409  	// result: x
 19410  	for {
 19411  		a := ssa.AuxIntToUint8(v.AuxInt)
 19412  		x := v_0
 19413  		if !(a == 0) {
 19414  			break
 19415  		}
 19416  		v.CopyOf(x)
 19417  		return true
 19418  	}
 19419  	return false
 19420  }
 19421  func rewriteValue_OpARM64VUQSHL2Dconst(v *ssa.Value) bool {
 19422  	v_0 := v.Args[0]
 19423  	// match: (VUQSHL2Dconst [a] x)
 19424  	// cond: a==0
 19425  	// result: x
 19426  	for {
 19427  		a := ssa.AuxIntToUint8(v.AuxInt)
 19428  		x := v_0
 19429  		if !(a == 0) {
 19430  			break
 19431  		}
 19432  		v.CopyOf(x)
 19433  		return true
 19434  	}
 19435  	return false
 19436  }
 19437  func rewriteValue_OpARM64VUQSHL4Sconst(v *ssa.Value) bool {
 19438  	v_0 := v.Args[0]
 19439  	// match: (VUQSHL4Sconst [a] x)
 19440  	// cond: a==0
 19441  	// result: x
 19442  	for {
 19443  		a := ssa.AuxIntToUint8(v.AuxInt)
 19444  		x := v_0
 19445  		if !(a == 0) {
 19446  			break
 19447  		}
 19448  		v.CopyOf(x)
 19449  		return true
 19450  	}
 19451  	return false
 19452  }
 19453  func rewriteValue_OpARM64VUQSHL8Hconst(v *ssa.Value) bool {
 19454  	v_0 := v.Args[0]
 19455  	// match: (VUQSHL8Hconst [a] x)
 19456  	// cond: a==0
 19457  	// result: x
 19458  	for {
 19459  		a := ssa.AuxIntToUint8(v.AuxInt)
 19460  		x := v_0
 19461  		if !(a == 0) {
 19462  			break
 19463  		}
 19464  		v.CopyOf(x)
 19465  		return true
 19466  	}
 19467  	return false
 19468  }
 19469  func rewriteValue_OpARM64VUSHLL16B(v *ssa.Value) bool {
 19470  	v_0 := v.Args[0]
 19471  	// match: (VUSHLL16B [a] (VDUPDextr [1] x))
 19472  	// result: (VUSHLL2_16B [a] x)
 19473  	for {
 19474  		a := ssa.AuxIntToUint8(v.AuxInt)
 19475  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19476  			break
 19477  		}
 19478  		x := v_0.Args[0]
 19479  		v.Reset(ssaop.OpARM64VUSHLL2_16B)
 19480  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19481  		v.AddArg(x)
 19482  		return true
 19483  	}
 19484  	return false
 19485  }
 19486  func rewriteValue_OpARM64VUSHLL4S(v *ssa.Value) bool {
 19487  	v_0 := v.Args[0]
 19488  	// match: (VUSHLL4S [a] (VDUPDextr [1] x))
 19489  	// result: (VUSHLL2_4S [a] x)
 19490  	for {
 19491  		a := ssa.AuxIntToUint8(v.AuxInt)
 19492  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19493  			break
 19494  		}
 19495  		x := v_0.Args[0]
 19496  		v.Reset(ssaop.OpARM64VUSHLL2_4S)
 19497  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19498  		v.AddArg(x)
 19499  		return true
 19500  	}
 19501  	return false
 19502  }
 19503  func rewriteValue_OpARM64VUSHLL8H(v *ssa.Value) bool {
 19504  	v_0 := v.Args[0]
 19505  	// match: (VUSHLL8H [a] (VDUPDextr [1] x))
 19506  	// result: (VUSHLL2_8H [a] x)
 19507  	for {
 19508  		a := ssa.AuxIntToUint8(v.AuxInt)
 19509  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19510  			break
 19511  		}
 19512  		x := v_0.Args[0]
 19513  		v.Reset(ssaop.OpARM64VUSHLL2_8H)
 19514  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19515  		v.AddArg(x)
 19516  		return true
 19517  	}
 19518  	return false
 19519  }
 19520  func rewriteValue_OpARM64VUSHR16B(v *ssa.Value) bool {
 19521  	v_0 := v.Args[0]
 19522  	// match: (VUSHR16B [a] x)
 19523  	// cond: a==0
 19524  	// result: x
 19525  	for {
 19526  		a := ssa.AuxIntToUint8(v.AuxInt)
 19527  		x := v_0
 19528  		if !(a == 0) {
 19529  			break
 19530  		}
 19531  		v.CopyOf(x)
 19532  		return true
 19533  	}
 19534  	return false
 19535  }
 19536  func rewriteValue_OpARM64VUSHR2D(v *ssa.Value) bool {
 19537  	v_0 := v.Args[0]
 19538  	// match: (VUSHR2D [a] x)
 19539  	// cond: a==0
 19540  	// result: x
 19541  	for {
 19542  		a := ssa.AuxIntToUint8(v.AuxInt)
 19543  		x := v_0
 19544  		if !(a == 0) {
 19545  			break
 19546  		}
 19547  		v.CopyOf(x)
 19548  		return true
 19549  	}
 19550  	return false
 19551  }
 19552  func rewriteValue_OpARM64VUSHR4S(v *ssa.Value) bool {
 19553  	v_0 := v.Args[0]
 19554  	// match: (VUSHR4S [a] x)
 19555  	// cond: a==0
 19556  	// result: x
 19557  	for {
 19558  		a := ssa.AuxIntToUint8(v.AuxInt)
 19559  		x := v_0
 19560  		if !(a == 0) {
 19561  			break
 19562  		}
 19563  		v.CopyOf(x)
 19564  		return true
 19565  	}
 19566  	return false
 19567  }
 19568  func rewriteValue_OpARM64VUSHR8H(v *ssa.Value) bool {
 19569  	v_0 := v.Args[0]
 19570  	// match: (VUSHR8H [a] x)
 19571  	// cond: a==0
 19572  	// result: x
 19573  	for {
 19574  		a := ssa.AuxIntToUint8(v.AuxInt)
 19575  		x := v_0
 19576  		if !(a == 0) {
 19577  			break
 19578  		}
 19579  		v.CopyOf(x)
 19580  		return true
 19581  	}
 19582  	return false
 19583  }
 19584  func rewriteValue_OpARM64VUXTL16B(v *ssa.Value) bool {
 19585  	v_0 := v.Args[0]
 19586  	// match: (VUXTL16B (VDUPDextr [1] x))
 19587  	// result: (VUXTL2_16B x)
 19588  	for {
 19589  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19590  			break
 19591  		}
 19592  		x := v_0.Args[0]
 19593  		v.Reset(ssaop.OpARM64VUXTL2_16B)
 19594  		v.AddArg(x)
 19595  		return true
 19596  	}
 19597  	return false
 19598  }
 19599  func rewriteValue_OpARM64VUXTL4S(v *ssa.Value) bool {
 19600  	v_0 := v.Args[0]
 19601  	// match: (VUXTL4S (VDUPDextr [1] x))
 19602  	// result: (VUXTL2_4S x)
 19603  	for {
 19604  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19605  			break
 19606  		}
 19607  		x := v_0.Args[0]
 19608  		v.Reset(ssaop.OpARM64VUXTL2_4S)
 19609  		v.AddArg(x)
 19610  		return true
 19611  	}
 19612  	return false
 19613  }
 19614  func rewriteValue_OpARM64VUXTL8H(v *ssa.Value) bool {
 19615  	v_0 := v.Args[0]
 19616  	// match: (VUXTL8H (VDUPDextr [1] x))
 19617  	// result: (VUXTL2_8H x)
 19618  	for {
 19619  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19620  			break
 19621  		}
 19622  		x := v_0.Args[0]
 19623  		v.Reset(ssaop.OpARM64VUXTL2_8H)
 19624  		v.AddArg(x)
 19625  		return true
 19626  	}
 19627  	return false
 19628  }
 19629  func rewriteValue_OpARM64XOR(v *ssa.Value) bool {
 19630  	v_1 := v.Args[1]
 19631  	v_0 := v.Args[0]
 19632  	// match: (XOR x (MOVDconst [c]))
 19633  	// result: (XORconst [c] x)
 19634  	for {
 19635  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19636  			x := v_0
 19637  			if v_1.Op != ssaop.OpARM64MOVDconst {
 19638  				continue
 19639  			}
 19640  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 19641  			v.Reset(ssaop.OpARM64XORconst)
 19642  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19643  			v.AddArg(x)
 19644  			return true
 19645  		}
 19646  		break
 19647  	}
 19648  	// match: (XOR x x)
 19649  	// result: (MOVDconst [0])
 19650  	for {
 19651  		x := v_0
 19652  		if x != v_1 {
 19653  			break
 19654  		}
 19655  		v.Reset(ssaop.OpARM64MOVDconst)
 19656  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19657  		return true
 19658  	}
 19659  	// match: (XOR x (MVN y))
 19660  	// result: (EON x y)
 19661  	for {
 19662  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19663  			x := v_0
 19664  			if v_1.Op != ssaop.OpARM64MVN {
 19665  				continue
 19666  			}
 19667  			y := v_1.Args[0]
 19668  			v.Reset(ssaop.OpARM64EON)
 19669  			v.AddArg2(x, y)
 19670  			return true
 19671  		}
 19672  		break
 19673  	}
 19674  	// match: (XOR x0 x1:(SLLconst [c] y))
 19675  	// cond: ssa.ClobberIfDead(x1)
 19676  	// result: (XORshiftLL x0 y [c])
 19677  	for {
 19678  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19679  			x0 := v_0
 19680  			x1 := v_1
 19681  			if x1.Op != ssaop.OpARM64SLLconst {
 19682  				continue
 19683  			}
 19684  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19685  			y := x1.Args[0]
 19686  			if !(ssa.ClobberIfDead(x1)) {
 19687  				continue
 19688  			}
 19689  			v.Reset(ssaop.OpARM64XORshiftLL)
 19690  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19691  			v.AddArg2(x0, y)
 19692  			return true
 19693  		}
 19694  		break
 19695  	}
 19696  	// match: (XOR x0 x1:(SRLconst [c] y))
 19697  	// cond: ssa.ClobberIfDead(x1)
 19698  	// result: (XORshiftRL x0 y [c])
 19699  	for {
 19700  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19701  			x0 := v_0
 19702  			x1 := v_1
 19703  			if x1.Op != ssaop.OpARM64SRLconst {
 19704  				continue
 19705  			}
 19706  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19707  			y := x1.Args[0]
 19708  			if !(ssa.ClobberIfDead(x1)) {
 19709  				continue
 19710  			}
 19711  			v.Reset(ssaop.OpARM64XORshiftRL)
 19712  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19713  			v.AddArg2(x0, y)
 19714  			return true
 19715  		}
 19716  		break
 19717  	}
 19718  	// match: (XOR x0 x1:(SRAconst [c] y))
 19719  	// cond: ssa.ClobberIfDead(x1)
 19720  	// result: (XORshiftRA x0 y [c])
 19721  	for {
 19722  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19723  			x0 := v_0
 19724  			x1 := v_1
 19725  			if x1.Op != ssaop.OpARM64SRAconst {
 19726  				continue
 19727  			}
 19728  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19729  			y := x1.Args[0]
 19730  			if !(ssa.ClobberIfDead(x1)) {
 19731  				continue
 19732  			}
 19733  			v.Reset(ssaop.OpARM64XORshiftRA)
 19734  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19735  			v.AddArg2(x0, y)
 19736  			return true
 19737  		}
 19738  		break
 19739  	}
 19740  	// match: (XOR x0 x1:(RORconst [c] y))
 19741  	// cond: ssa.ClobberIfDead(x1)
 19742  	// result: (XORshiftRO x0 y [c])
 19743  	for {
 19744  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19745  			x0 := v_0
 19746  			x1 := v_1
 19747  			if x1.Op != ssaop.OpARM64RORconst {
 19748  				continue
 19749  			}
 19750  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19751  			y := x1.Args[0]
 19752  			if !(ssa.ClobberIfDead(x1)) {
 19753  				continue
 19754  			}
 19755  			v.Reset(ssaop.OpARM64XORshiftRO)
 19756  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19757  			v.AddArg2(x0, y)
 19758  			return true
 19759  		}
 19760  		break
 19761  	}
 19762  	return false
 19763  }
 19764  func rewriteValue_OpARM64XORconst(v *ssa.Value) bool {
 19765  	v_0 := v.Args[0]
 19766  	// match: (XORconst [0] x)
 19767  	// result: x
 19768  	for {
 19769  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 19770  			break
 19771  		}
 19772  		x := v_0
 19773  		v.CopyOf(x)
 19774  		return true
 19775  	}
 19776  	// match: (XORconst [-1] x)
 19777  	// result: (MVN x)
 19778  	for {
 19779  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
 19780  			break
 19781  		}
 19782  		x := v_0
 19783  		v.Reset(ssaop.OpARM64MVN)
 19784  		v.AddArg(x)
 19785  		return true
 19786  	}
 19787  	// match: (XORconst [c] (MOVDconst [d]))
 19788  	// result: (MOVDconst [c^d])
 19789  	for {
 19790  		c := ssa.AuxIntToInt64(v.AuxInt)
 19791  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19792  			break
 19793  		}
 19794  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 19795  		v.Reset(ssaop.OpARM64MOVDconst)
 19796  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
 19797  		return true
 19798  	}
 19799  	// match: (XORconst [c] (XORconst [d] x))
 19800  	// result: (XORconst [c^d] x)
 19801  	for {
 19802  		c := ssa.AuxIntToInt64(v.AuxInt)
 19803  		if v_0.Op != ssaop.OpARM64XORconst {
 19804  			break
 19805  		}
 19806  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 19807  		x := v_0.Args[0]
 19808  		v.Reset(ssaop.OpARM64XORconst)
 19809  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
 19810  		v.AddArg(x)
 19811  		return true
 19812  	}
 19813  	return false
 19814  }
 19815  func rewriteValue_OpARM64XORshiftLL(v *ssa.Value) bool {
 19816  	v_1 := v.Args[1]
 19817  	v_0 := v.Args[0]
 19818  	b := v.Block
 19819  	typ := &b.Func.Config.Types
 19820  	// match: (XORshiftLL (MOVDconst [c]) x [d])
 19821  	// result: (XORconst [c] (SLLconst <x.Type> x [d]))
 19822  	for {
 19823  		d := ssa.AuxIntToInt64(v.AuxInt)
 19824  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19825  			break
 19826  		}
 19827  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 19828  		x := v_1
 19829  		v.Reset(ssaop.OpARM64XORconst)
 19830  		v.AuxInt = ssa.Int64ToAuxInt(c)
 19831  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 19832  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 19833  		v0.AddArg(x)
 19834  		v.AddArg(v0)
 19835  		return true
 19836  	}
 19837  	// match: (XORshiftLL x (MOVDconst [c]) [d])
 19838  	// result: (XORconst x [int64(uint64(c)<<uint64(d))])
 19839  	for {
 19840  		d := ssa.AuxIntToInt64(v.AuxInt)
 19841  		x := v_0
 19842  		if v_1.Op != ssaop.OpARM64MOVDconst {
 19843  			break
 19844  		}
 19845  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 19846  		v.Reset(ssaop.OpARM64XORconst)
 19847  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 19848  		v.AddArg(x)
 19849  		return true
 19850  	}
 19851  	// match: (XORshiftLL (SLLconst x [c]) x [c])
 19852  	// result: (MOVDconst [0])
 19853  	for {
 19854  		c := ssa.AuxIntToInt64(v.AuxInt)
 19855  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 19856  			break
 19857  		}
 19858  		x := v_0.Args[0]
 19859  		if x != v_1 {
 19860  			break
 19861  		}
 19862  		v.Reset(ssaop.OpARM64MOVDconst)
 19863  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19864  		return true
 19865  	}
 19866  	// match: (XORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
 19867  	// result: (REV16W x)
 19868  	for {
 19869  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
 19870  			break
 19871  		}
 19872  		x := v_0.Args[0]
 19873  		if x != v_1 {
 19874  			break
 19875  		}
 19876  		v.Reset(ssaop.OpARM64REV16W)
 19877  		v.AddArg(x)
 19878  		return true
 19879  	}
 19880  	// match: (XORshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 19881  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 19882  	// result: (REV16W x)
 19883  	for {
 19884  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
 19885  			break
 19886  		}
 19887  		v_0_0 := v_0.Args[0]
 19888  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 19889  			break
 19890  		}
 19891  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 19892  		x := v_0_0.Args[0]
 19893  		if v_1.Op != ssaop.OpARM64ANDconst {
 19894  			break
 19895  		}
 19896  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 19897  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 19898  			break
 19899  		}
 19900  		v.Reset(ssaop.OpARM64REV16W)
 19901  		v.AddArg(x)
 19902  		return true
 19903  	}
 19904  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 19905  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 19906  	// result: (REV16 x)
 19907  	for {
 19908  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 19909  			break
 19910  		}
 19911  		v_0_0 := v_0.Args[0]
 19912  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 19913  			break
 19914  		}
 19915  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 19916  		x := v_0_0.Args[0]
 19917  		if v_1.Op != ssaop.OpARM64ANDconst {
 19918  			break
 19919  		}
 19920  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 19921  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 19922  			break
 19923  		}
 19924  		v.Reset(ssaop.OpARM64REV16)
 19925  		v.AddArg(x)
 19926  		return true
 19927  	}
 19928  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 19929  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 19930  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 19931  	for {
 19932  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 19933  			break
 19934  		}
 19935  		v_0_0 := v_0.Args[0]
 19936  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 19937  			break
 19938  		}
 19939  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 19940  		x := v_0_0.Args[0]
 19941  		if v_1.Op != ssaop.OpARM64ANDconst {
 19942  			break
 19943  		}
 19944  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 19945  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 19946  			break
 19947  		}
 19948  		v.Reset(ssaop.OpARM64REV16)
 19949  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
 19950  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
 19951  		v0.AddArg(x)
 19952  		v.AddArg(v0)
 19953  		return true
 19954  	}
 19955  	// match: (XORshiftLL [c] (SRLconst x [64-c]) x2)
 19956  	// result: (EXTRconst [64-c] x2 x)
 19957  	for {
 19958  		c := ssa.AuxIntToInt64(v.AuxInt)
 19959  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
 19960  			break
 19961  		}
 19962  		x := v_0.Args[0]
 19963  		x2 := v_1
 19964  		v.Reset(ssaop.OpARM64EXTRconst)
 19965  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
 19966  		v.AddArg2(x2, x)
 19967  		return true
 19968  	}
 19969  	// match: (XORshiftLL <t> [c] (UBFX [bfc] x) x2)
 19970  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
 19971  	// result: (EXTRWconst [32-c] x2 x)
 19972  	for {
 19973  		t := v.Type
 19974  		c := ssa.AuxIntToInt64(v.AuxInt)
 19975  		if v_0.Op != ssaop.OpARM64UBFX {
 19976  			break
 19977  		}
 19978  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 19979  		x := v_0.Args[0]
 19980  		x2 := v_1
 19981  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
 19982  			break
 19983  		}
 19984  		v.Reset(ssaop.OpARM64EXTRWconst)
 19985  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
 19986  		v.AddArg2(x2, x)
 19987  		return true
 19988  	}
 19989  	return false
 19990  }
 19991  func rewriteValue_OpARM64XORshiftRA(v *ssa.Value) bool {
 19992  	v_1 := v.Args[1]
 19993  	v_0 := v.Args[0]
 19994  	b := v.Block
 19995  	// match: (XORshiftRA (MOVDconst [c]) x [d])
 19996  	// result: (XORconst [c] (SRAconst <x.Type> x [d]))
 19997  	for {
 19998  		d := ssa.AuxIntToInt64(v.AuxInt)
 19999  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20000  			break
 20001  		}
 20002  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20003  		x := v_1
 20004  		v.Reset(ssaop.OpARM64XORconst)
 20005  		v.AuxInt = ssa.Int64ToAuxInt(c)
 20006  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 20007  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 20008  		v0.AddArg(x)
 20009  		v.AddArg(v0)
 20010  		return true
 20011  	}
 20012  	// match: (XORshiftRA x (MOVDconst [c]) [d])
 20013  	// result: (XORconst x [c>>uint64(d)])
 20014  	for {
 20015  		d := ssa.AuxIntToInt64(v.AuxInt)
 20016  		x := v_0
 20017  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20018  			break
 20019  		}
 20020  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20021  		v.Reset(ssaop.OpARM64XORconst)
 20022  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 20023  		v.AddArg(x)
 20024  		return true
 20025  	}
 20026  	// match: (XORshiftRA (SRAconst x [c]) x [c])
 20027  	// result: (MOVDconst [0])
 20028  	for {
 20029  		c := ssa.AuxIntToInt64(v.AuxInt)
 20030  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 20031  			break
 20032  		}
 20033  		x := v_0.Args[0]
 20034  		if x != v_1 {
 20035  			break
 20036  		}
 20037  		v.Reset(ssaop.OpARM64MOVDconst)
 20038  		v.AuxInt = ssa.Int64ToAuxInt(0)
 20039  		return true
 20040  	}
 20041  	return false
 20042  }
 20043  func rewriteValue_OpARM64XORshiftRL(v *ssa.Value) bool {
 20044  	v_1 := v.Args[1]
 20045  	v_0 := v.Args[0]
 20046  	b := v.Block
 20047  	// match: (XORshiftRL (MOVDconst [c]) x [d])
 20048  	// result: (XORconst [c] (SRLconst <x.Type> x [d]))
 20049  	for {
 20050  		d := ssa.AuxIntToInt64(v.AuxInt)
 20051  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20052  			break
 20053  		}
 20054  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20055  		x := v_1
 20056  		v.Reset(ssaop.OpARM64XORconst)
 20057  		v.AuxInt = ssa.Int64ToAuxInt(c)
 20058  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 20059  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 20060  		v0.AddArg(x)
 20061  		v.AddArg(v0)
 20062  		return true
 20063  	}
 20064  	// match: (XORshiftRL x (MOVDconst [c]) [d])
 20065  	// result: (XORconst x [int64(uint64(c)>>uint64(d))])
 20066  	for {
 20067  		d := ssa.AuxIntToInt64(v.AuxInt)
 20068  		x := v_0
 20069  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20070  			break
 20071  		}
 20072  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20073  		v.Reset(ssaop.OpARM64XORconst)
 20074  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 20075  		v.AddArg(x)
 20076  		return true
 20077  	}
 20078  	// match: (XORshiftRL (SRLconst x [c]) x [c])
 20079  	// result: (MOVDconst [0])
 20080  	for {
 20081  		c := ssa.AuxIntToInt64(v.AuxInt)
 20082  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 20083  			break
 20084  		}
 20085  		x := v_0.Args[0]
 20086  		if x != v_1 {
 20087  			break
 20088  		}
 20089  		v.Reset(ssaop.OpARM64MOVDconst)
 20090  		v.AuxInt = ssa.Int64ToAuxInt(0)
 20091  		return true
 20092  	}
 20093  	return false
 20094  }
 20095  func rewriteValue_OpARM64XORshiftRO(v *ssa.Value) bool {
 20096  	v_1 := v.Args[1]
 20097  	v_0 := v.Args[0]
 20098  	b := v.Block
 20099  	// match: (XORshiftRO (MOVDconst [c]) x [d])
 20100  	// result: (XORconst [c] (RORconst <x.Type> x [d]))
 20101  	for {
 20102  		d := ssa.AuxIntToInt64(v.AuxInt)
 20103  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20104  			break
 20105  		}
 20106  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20107  		x := v_1
 20108  		v.Reset(ssaop.OpARM64XORconst)
 20109  		v.AuxInt = ssa.Int64ToAuxInt(c)
 20110  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 20111  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 20112  		v0.AddArg(x)
 20113  		v.AddArg(v0)
 20114  		return true
 20115  	}
 20116  	// match: (XORshiftRO x (MOVDconst [c]) [d])
 20117  	// result: (XORconst x [rotateRight64(c, d)])
 20118  	for {
 20119  		d := ssa.AuxIntToInt64(v.AuxInt)
 20120  		x := v_0
 20121  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20122  			break
 20123  		}
 20124  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20125  		v.Reset(ssaop.OpARM64XORconst)
 20126  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 20127  		v.AddArg(x)
 20128  		return true
 20129  	}
 20130  	// match: (XORshiftRO (RORconst x [c]) x [c])
 20131  	// result: (MOVDconst [0])
 20132  	for {
 20133  		c := ssa.AuxIntToInt64(v.AuxInt)
 20134  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 20135  			break
 20136  		}
 20137  		x := v_0.Args[0]
 20138  		if x != v_1 {
 20139  			break
 20140  		}
 20141  		v.Reset(ssaop.OpARM64MOVDconst)
 20142  		v.AuxInt = ssa.Int64ToAuxInt(0)
 20143  		return true
 20144  	}
 20145  	return false
 20146  }
 20147  func rewriteValue_OpARM64ZSELB(v *ssa.Value) bool {
 20148  	v_2 := v.Args[2]
 20149  	v_1 := v.Args[1]
 20150  	v_0 := v.Args[0]
 20151  	// match: (ZSELB (ZABSB x (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 20152  	// result: (ZABSMergingB z x mask)
 20153  	for {
 20154  		if v_0.Op != ssaop.OpARM64ZABSB {
 20155  			break
 20156  		}
 20157  		_ = v_0.Args[1]
 20158  		x := v_0.Args[0]
 20159  		v_0_1 := v_0.Args[1]
 20160  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 20161  			break
 20162  		}
 20163  		v_0_1_0 := v_0_1.Args[0]
 20164  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTB {
 20165  			break
 20166  		}
 20167  		_ = v_0_1_0.Args[1]
 20168  		v_0_1_0_0 := v_0_1_0.Args[0]
 20169  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 20170  			break
 20171  		}
 20172  		v_0_1_0_1 := v_0_1_0.Args[1]
 20173  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 32 {
 20174  			break
 20175  		}
 20176  		z := v_1
 20177  		mask := v_2
 20178  		v.Reset(ssaop.OpARM64ZABSMergingB)
 20179  		v.AddArg3(z, x, mask)
 20180  		return true
 20181  	}
 20182  	// match: (ZSELB (ZADDB x y) x mask)
 20183  	// result: (ZADDMergingB x y mask)
 20184  	for {
 20185  		if v_0.Op != ssaop.OpARM64ZADDB {
 20186  			break
 20187  		}
 20188  		_ = v_0.Args[1]
 20189  		v_0_0 := v_0.Args[0]
 20190  		v_0_1 := v_0.Args[1]
 20191  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20192  			x := v_0_0
 20193  			y := v_0_1
 20194  			if x != v_1 {
 20195  				continue
 20196  			}
 20197  			mask := v_2
 20198  			v.Reset(ssaop.OpARM64ZADDMergingB)
 20199  			v.AddArg3(x, y, mask)
 20200  			return true
 20201  		}
 20202  		break
 20203  	}
 20204  	// match: (ZSELB (ZADDB x y) y mask)
 20205  	// result: (ZADDMergingB y x mask)
 20206  	for {
 20207  		if v_0.Op != ssaop.OpARM64ZADDB {
 20208  			break
 20209  		}
 20210  		_ = v_0.Args[1]
 20211  		v_0_0 := v_0.Args[0]
 20212  		v_0_1 := v_0.Args[1]
 20213  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20214  			x := v_0_0
 20215  			y := v_0_1
 20216  			if y != v_1 {
 20217  				continue
 20218  			}
 20219  			mask := v_2
 20220  			v.Reset(ssaop.OpARM64ZADDMergingB)
 20221  			v.AddArg3(y, x, mask)
 20222  			return true
 20223  		}
 20224  		break
 20225  	}
 20226  	// match: (ZSELB (ZADDB x y) z mask)
 20227  	// result: (ZADDMergingPrefixedB z x y mask)
 20228  	for {
 20229  		if v_0.Op != ssaop.OpARM64ZADDB {
 20230  			break
 20231  		}
 20232  		y := v_0.Args[1]
 20233  		x := v_0.Args[0]
 20234  		z := v_1
 20235  		mask := v_2
 20236  		v.Reset(ssaop.OpARM64ZADDMergingPrefixedB)
 20237  		v.AddArg4(z, x, y, mask)
 20238  		return true
 20239  	}
 20240  	// match: (ZSELB (ZANDD x y) x mask)
 20241  	// result: (ZANDMergingB x y mask)
 20242  	for {
 20243  		if v_0.Op != ssaop.OpARM64ZANDD {
 20244  			break
 20245  		}
 20246  		_ = v_0.Args[1]
 20247  		v_0_0 := v_0.Args[0]
 20248  		v_0_1 := v_0.Args[1]
 20249  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20250  			x := v_0_0
 20251  			y := v_0_1
 20252  			if x != v_1 {
 20253  				continue
 20254  			}
 20255  			mask := v_2
 20256  			v.Reset(ssaop.OpARM64ZANDMergingB)
 20257  			v.AddArg3(x, y, mask)
 20258  			return true
 20259  		}
 20260  		break
 20261  	}
 20262  	// match: (ZSELB (ZANDD x y) y mask)
 20263  	// result: (ZANDMergingB y x mask)
 20264  	for {
 20265  		if v_0.Op != ssaop.OpARM64ZANDD {
 20266  			break
 20267  		}
 20268  		_ = v_0.Args[1]
 20269  		v_0_0 := v_0.Args[0]
 20270  		v_0_1 := v_0.Args[1]
 20271  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20272  			x := v_0_0
 20273  			y := v_0_1
 20274  			if y != v_1 {
 20275  				continue
 20276  			}
 20277  			mask := v_2
 20278  			v.Reset(ssaop.OpARM64ZANDMergingB)
 20279  			v.AddArg3(y, x, mask)
 20280  			return true
 20281  		}
 20282  		break
 20283  	}
 20284  	// match: (ZSELB (ZANDD x y) z mask)
 20285  	// result: (ZANDMergingPrefixedB z x y mask)
 20286  	for {
 20287  		if v_0.Op != ssaop.OpARM64ZANDD {
 20288  			break
 20289  		}
 20290  		y := v_0.Args[1]
 20291  		x := v_0.Args[0]
 20292  		z := v_1
 20293  		mask := v_2
 20294  		v.Reset(ssaop.OpARM64ZANDMergingPrefixedB)
 20295  		v.AddArg4(z, x, y, mask)
 20296  		return true
 20297  	}
 20298  	// match: (ZSELB (ZBICD x y) x mask)
 20299  	// result: (ZBICMergingB x y mask)
 20300  	for {
 20301  		if v_0.Op != ssaop.OpARM64ZBICD {
 20302  			break
 20303  		}
 20304  		y := v_0.Args[1]
 20305  		x := v_0.Args[0]
 20306  		if x != v_1 {
 20307  			break
 20308  		}
 20309  		mask := v_2
 20310  		v.Reset(ssaop.OpARM64ZBICMergingB)
 20311  		v.AddArg3(x, y, mask)
 20312  		return true
 20313  	}
 20314  	// match: (ZSELB (ZEORD x y) x mask)
 20315  	// result: (ZEORMergingB x y mask)
 20316  	for {
 20317  		if v_0.Op != ssaop.OpARM64ZEORD {
 20318  			break
 20319  		}
 20320  		_ = v_0.Args[1]
 20321  		v_0_0 := v_0.Args[0]
 20322  		v_0_1 := v_0.Args[1]
 20323  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20324  			x := v_0_0
 20325  			y := v_0_1
 20326  			if x != v_1 {
 20327  				continue
 20328  			}
 20329  			mask := v_2
 20330  			v.Reset(ssaop.OpARM64ZEORMergingB)
 20331  			v.AddArg3(x, y, mask)
 20332  			return true
 20333  		}
 20334  		break
 20335  	}
 20336  	// match: (ZSELB (ZEORD x y) y mask)
 20337  	// result: (ZEORMergingB y x mask)
 20338  	for {
 20339  		if v_0.Op != ssaop.OpARM64ZEORD {
 20340  			break
 20341  		}
 20342  		_ = v_0.Args[1]
 20343  		v_0_0 := v_0.Args[0]
 20344  		v_0_1 := v_0.Args[1]
 20345  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20346  			x := v_0_0
 20347  			y := v_0_1
 20348  			if y != v_1 {
 20349  				continue
 20350  			}
 20351  			mask := v_2
 20352  			v.Reset(ssaop.OpARM64ZEORMergingB)
 20353  			v.AddArg3(y, x, mask)
 20354  			return true
 20355  		}
 20356  		break
 20357  	}
 20358  	// match: (ZSELB (ZEORD x y) z mask)
 20359  	// result: (ZEORMergingPrefixedB z x y mask)
 20360  	for {
 20361  		if v_0.Op != ssaop.OpARM64ZEORD {
 20362  			break
 20363  		}
 20364  		y := v_0.Args[1]
 20365  		x := v_0.Args[0]
 20366  		z := v_1
 20367  		mask := v_2
 20368  		v.Reset(ssaop.OpARM64ZEORMergingPrefixedB)
 20369  		v.AddArg4(z, x, y, mask)
 20370  		return true
 20371  	}
 20372  	// match: (ZSELB (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 20373  	// result: (ZMULMergingB x y mask)
 20374  	for {
 20375  		if v_0.Op != ssaop.OpARM64ZMULMergingB {
 20376  			break
 20377  		}
 20378  		_ = v_0.Args[2]
 20379  		v_0_0 := v_0.Args[0]
 20380  		v_0_1 := v_0.Args[1]
 20381  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20382  			x := v_0_0
 20383  			y := v_0_1
 20384  			v_0_2 := v_0.Args[2]
 20385  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20386  				continue
 20387  			}
 20388  			v_0_2_0 := v_0_2.Args[0]
 20389  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20390  				continue
 20391  			}
 20392  			_ = v_0_2_0.Args[1]
 20393  			v_0_2_0_0 := v_0_2_0.Args[0]
 20394  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20395  				continue
 20396  			}
 20397  			v_0_2_0_1 := v_0_2_0.Args[1]
 20398  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 20399  				continue
 20400  			}
 20401  			mask := v_2
 20402  			v.Reset(ssaop.OpARM64ZMULMergingB)
 20403  			v.AddArg3(x, y, mask)
 20404  			return true
 20405  		}
 20406  		break
 20407  	}
 20408  	// match: (ZSELB (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 20409  	// result: (ZMULMergingB y x mask)
 20410  	for {
 20411  		if v_0.Op != ssaop.OpARM64ZMULMergingB {
 20412  			break
 20413  		}
 20414  		_ = v_0.Args[2]
 20415  		v_0_0 := v_0.Args[0]
 20416  		v_0_1 := v_0.Args[1]
 20417  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20418  			x := v_0_0
 20419  			y := v_0_1
 20420  			v_0_2 := v_0.Args[2]
 20421  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20422  				continue
 20423  			}
 20424  			v_0_2_0 := v_0_2.Args[0]
 20425  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20426  				continue
 20427  			}
 20428  			_ = v_0_2_0.Args[1]
 20429  			v_0_2_0_0 := v_0_2_0.Args[0]
 20430  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20431  				continue
 20432  			}
 20433  			v_0_2_0_1 := v_0_2_0.Args[1]
 20434  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 20435  				continue
 20436  			}
 20437  			mask := v_2
 20438  			v.Reset(ssaop.OpARM64ZMULMergingB)
 20439  			v.AddArg3(y, x, mask)
 20440  			return true
 20441  		}
 20442  		break
 20443  	}
 20444  	// match: (ZSELB (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 20445  	// result: (ZMULMergingPrefixedB z x y mask)
 20446  	for {
 20447  		if v_0.Op != ssaop.OpARM64ZMULMergingB {
 20448  			break
 20449  		}
 20450  		_ = v_0.Args[2]
 20451  		x := v_0.Args[0]
 20452  		y := v_0.Args[1]
 20453  		v_0_2 := v_0.Args[2]
 20454  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20455  			break
 20456  		}
 20457  		v_0_2_0 := v_0_2.Args[0]
 20458  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20459  			break
 20460  		}
 20461  		_ = v_0_2_0.Args[1]
 20462  		v_0_2_0_0 := v_0_2_0.Args[0]
 20463  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20464  			break
 20465  		}
 20466  		v_0_2_0_1 := v_0_2_0.Args[1]
 20467  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 20468  			break
 20469  		}
 20470  		z := v_1
 20471  		mask := v_2
 20472  		v.Reset(ssaop.OpARM64ZMULMergingPrefixedB)
 20473  		v.AddArg4(z, x, y, mask)
 20474  		return true
 20475  	}
 20476  	// match: (ZSELB (ZNEGB x (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 20477  	// result: (ZNEGMergingB z x mask)
 20478  	for {
 20479  		if v_0.Op != ssaop.OpARM64ZNEGB {
 20480  			break
 20481  		}
 20482  		_ = v_0.Args[1]
 20483  		x := v_0.Args[0]
 20484  		v_0_1 := v_0.Args[1]
 20485  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 20486  			break
 20487  		}
 20488  		v_0_1_0 := v_0_1.Args[0]
 20489  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTB {
 20490  			break
 20491  		}
 20492  		_ = v_0_1_0.Args[1]
 20493  		v_0_1_0_0 := v_0_1_0.Args[0]
 20494  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 20495  			break
 20496  		}
 20497  		v_0_1_0_1 := v_0_1_0.Args[1]
 20498  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 32 {
 20499  			break
 20500  		}
 20501  		z := v_1
 20502  		mask := v_2
 20503  		v.Reset(ssaop.OpARM64ZNEGMergingB)
 20504  		v.AddArg3(z, x, mask)
 20505  		return true
 20506  	}
 20507  	// match: (ZSELB (ZORRD x y) x mask)
 20508  	// result: (ZORRMergingB x y mask)
 20509  	for {
 20510  		if v_0.Op != ssaop.OpARM64ZORRD {
 20511  			break
 20512  		}
 20513  		_ = v_0.Args[1]
 20514  		v_0_0 := v_0.Args[0]
 20515  		v_0_1 := v_0.Args[1]
 20516  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20517  			x := v_0_0
 20518  			y := v_0_1
 20519  			if x != v_1 {
 20520  				continue
 20521  			}
 20522  			mask := v_2
 20523  			v.Reset(ssaop.OpARM64ZORRMergingB)
 20524  			v.AddArg3(x, y, mask)
 20525  			return true
 20526  		}
 20527  		break
 20528  	}
 20529  	// match: (ZSELB (ZORRD x y) y mask)
 20530  	// result: (ZORRMergingB y x mask)
 20531  	for {
 20532  		if v_0.Op != ssaop.OpARM64ZORRD {
 20533  			break
 20534  		}
 20535  		_ = v_0.Args[1]
 20536  		v_0_0 := v_0.Args[0]
 20537  		v_0_1 := v_0.Args[1]
 20538  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20539  			x := v_0_0
 20540  			y := v_0_1
 20541  			if y != v_1 {
 20542  				continue
 20543  			}
 20544  			mask := v_2
 20545  			v.Reset(ssaop.OpARM64ZORRMergingB)
 20546  			v.AddArg3(y, x, mask)
 20547  			return true
 20548  		}
 20549  		break
 20550  	}
 20551  	// match: (ZSELB (ZORRD x y) z mask)
 20552  	// result: (ZORRMergingPrefixedB z x y mask)
 20553  	for {
 20554  		if v_0.Op != ssaop.OpARM64ZORRD {
 20555  			break
 20556  		}
 20557  		y := v_0.Args[1]
 20558  		x := v_0.Args[0]
 20559  		z := v_1
 20560  		mask := v_2
 20561  		v.Reset(ssaop.OpARM64ZORRMergingPrefixedB)
 20562  		v.AddArg4(z, x, y, mask)
 20563  		return true
 20564  	}
 20565  	// match: (ZSELB (ZSMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 20566  	// result: (ZSMULHMergingB x y mask)
 20567  	for {
 20568  		if v_0.Op != ssaop.OpARM64ZSMULHMergingB {
 20569  			break
 20570  		}
 20571  		_ = v_0.Args[2]
 20572  		v_0_0 := v_0.Args[0]
 20573  		v_0_1 := v_0.Args[1]
 20574  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20575  			x := v_0_0
 20576  			y := v_0_1
 20577  			v_0_2 := v_0.Args[2]
 20578  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20579  				continue
 20580  			}
 20581  			v_0_2_0 := v_0_2.Args[0]
 20582  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20583  				continue
 20584  			}
 20585  			_ = v_0_2_0.Args[1]
 20586  			v_0_2_0_0 := v_0_2_0.Args[0]
 20587  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20588  				continue
 20589  			}
 20590  			v_0_2_0_1 := v_0_2_0.Args[1]
 20591  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 20592  				continue
 20593  			}
 20594  			mask := v_2
 20595  			v.Reset(ssaop.OpARM64ZSMULHMergingB)
 20596  			v.AddArg3(x, y, mask)
 20597  			return true
 20598  		}
 20599  		break
 20600  	}
 20601  	// match: (ZSELB (ZSMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 20602  	// result: (ZSMULHMergingB y x mask)
 20603  	for {
 20604  		if v_0.Op != ssaop.OpARM64ZSMULHMergingB {
 20605  			break
 20606  		}
 20607  		_ = v_0.Args[2]
 20608  		v_0_0 := v_0.Args[0]
 20609  		v_0_1 := v_0.Args[1]
 20610  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20611  			x := v_0_0
 20612  			y := v_0_1
 20613  			v_0_2 := v_0.Args[2]
 20614  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20615  				continue
 20616  			}
 20617  			v_0_2_0 := v_0_2.Args[0]
 20618  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20619  				continue
 20620  			}
 20621  			_ = v_0_2_0.Args[1]
 20622  			v_0_2_0_0 := v_0_2_0.Args[0]
 20623  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20624  				continue
 20625  			}
 20626  			v_0_2_0_1 := v_0_2_0.Args[1]
 20627  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 20628  				continue
 20629  			}
 20630  			mask := v_2
 20631  			v.Reset(ssaop.OpARM64ZSMULHMergingB)
 20632  			v.AddArg3(y, x, mask)
 20633  			return true
 20634  		}
 20635  		break
 20636  	}
 20637  	// match: (ZSELB (ZSMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 20638  	// result: (ZSMULHMergingPrefixedB z x y mask)
 20639  	for {
 20640  		if v_0.Op != ssaop.OpARM64ZSMULHMergingB {
 20641  			break
 20642  		}
 20643  		_ = v_0.Args[2]
 20644  		x := v_0.Args[0]
 20645  		y := v_0.Args[1]
 20646  		v_0_2 := v_0.Args[2]
 20647  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20648  			break
 20649  		}
 20650  		v_0_2_0 := v_0_2.Args[0]
 20651  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20652  			break
 20653  		}
 20654  		_ = v_0_2_0.Args[1]
 20655  		v_0_2_0_0 := v_0_2_0.Args[0]
 20656  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20657  			break
 20658  		}
 20659  		v_0_2_0_1 := v_0_2_0.Args[1]
 20660  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 20661  			break
 20662  		}
 20663  		z := v_1
 20664  		mask := v_2
 20665  		v.Reset(ssaop.OpARM64ZSMULHMergingPrefixedB)
 20666  		v.AddArg4(z, x, y, mask)
 20667  		return true
 20668  	}
 20669  	// match: (ZSELB (ZSQADDB x y) x mask)
 20670  	// result: (ZSQADDMergingB x y mask)
 20671  	for {
 20672  		if v_0.Op != ssaop.OpARM64ZSQADDB {
 20673  			break
 20674  		}
 20675  		_ = v_0.Args[1]
 20676  		v_0_0 := v_0.Args[0]
 20677  		v_0_1 := v_0.Args[1]
 20678  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20679  			x := v_0_0
 20680  			y := v_0_1
 20681  			if x != v_1 {
 20682  				continue
 20683  			}
 20684  			mask := v_2
 20685  			v.Reset(ssaop.OpARM64ZSQADDMergingB)
 20686  			v.AddArg3(x, y, mask)
 20687  			return true
 20688  		}
 20689  		break
 20690  	}
 20691  	// match: (ZSELB (ZSQADDB x y) y mask)
 20692  	// result: (ZSQADDMergingB y x mask)
 20693  	for {
 20694  		if v_0.Op != ssaop.OpARM64ZSQADDB {
 20695  			break
 20696  		}
 20697  		_ = v_0.Args[1]
 20698  		v_0_0 := v_0.Args[0]
 20699  		v_0_1 := v_0.Args[1]
 20700  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20701  			x := v_0_0
 20702  			y := v_0_1
 20703  			if y != v_1 {
 20704  				continue
 20705  			}
 20706  			mask := v_2
 20707  			v.Reset(ssaop.OpARM64ZSQADDMergingB)
 20708  			v.AddArg3(y, x, mask)
 20709  			return true
 20710  		}
 20711  		break
 20712  	}
 20713  	// match: (ZSELB (ZSQADDB x y) z mask)
 20714  	// result: (ZSQADDMergingPrefixedB z x y mask)
 20715  	for {
 20716  		if v_0.Op != ssaop.OpARM64ZSQADDB {
 20717  			break
 20718  		}
 20719  		y := v_0.Args[1]
 20720  		x := v_0.Args[0]
 20721  		z := v_1
 20722  		mask := v_2
 20723  		v.Reset(ssaop.OpARM64ZSQADDMergingPrefixedB)
 20724  		v.AddArg4(z, x, y, mask)
 20725  		return true
 20726  	}
 20727  	// match: (ZSELB (ZSQSUBB x y) x mask)
 20728  	// result: (ZSQSUBMergingB x y mask)
 20729  	for {
 20730  		if v_0.Op != ssaop.OpARM64ZSQSUBB {
 20731  			break
 20732  		}
 20733  		y := v_0.Args[1]
 20734  		x := v_0.Args[0]
 20735  		if x != v_1 {
 20736  			break
 20737  		}
 20738  		mask := v_2
 20739  		v.Reset(ssaop.OpARM64ZSQSUBMergingB)
 20740  		v.AddArg3(x, y, mask)
 20741  		return true
 20742  	}
 20743  	// match: (ZSELB (ZSUBB x y) x mask)
 20744  	// result: (ZSUBMergingB x y mask)
 20745  	for {
 20746  		if v_0.Op != ssaop.OpARM64ZSUBB {
 20747  			break
 20748  		}
 20749  		y := v_0.Args[1]
 20750  		x := v_0.Args[0]
 20751  		if x != v_1 {
 20752  			break
 20753  		}
 20754  		mask := v_2
 20755  		v.Reset(ssaop.OpARM64ZSUBMergingB)
 20756  		v.AddArg3(x, y, mask)
 20757  		return true
 20758  	}
 20759  	// match: (ZSELB (ZUMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 20760  	// result: (ZUMULHMergingB x y mask)
 20761  	for {
 20762  		if v_0.Op != ssaop.OpARM64ZUMULHMergingB {
 20763  			break
 20764  		}
 20765  		_ = v_0.Args[2]
 20766  		v_0_0 := v_0.Args[0]
 20767  		v_0_1 := v_0.Args[1]
 20768  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20769  			x := v_0_0
 20770  			y := v_0_1
 20771  			v_0_2 := v_0.Args[2]
 20772  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20773  				continue
 20774  			}
 20775  			v_0_2_0 := v_0_2.Args[0]
 20776  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20777  				continue
 20778  			}
 20779  			_ = v_0_2_0.Args[1]
 20780  			v_0_2_0_0 := v_0_2_0.Args[0]
 20781  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20782  				continue
 20783  			}
 20784  			v_0_2_0_1 := v_0_2_0.Args[1]
 20785  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 20786  				continue
 20787  			}
 20788  			mask := v_2
 20789  			v.Reset(ssaop.OpARM64ZUMULHMergingB)
 20790  			v.AddArg3(x, y, mask)
 20791  			return true
 20792  		}
 20793  		break
 20794  	}
 20795  	// match: (ZSELB (ZUMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 20796  	// result: (ZUMULHMergingB y x mask)
 20797  	for {
 20798  		if v_0.Op != ssaop.OpARM64ZUMULHMergingB {
 20799  			break
 20800  		}
 20801  		_ = v_0.Args[2]
 20802  		v_0_0 := v_0.Args[0]
 20803  		v_0_1 := v_0.Args[1]
 20804  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20805  			x := v_0_0
 20806  			y := v_0_1
 20807  			v_0_2 := v_0.Args[2]
 20808  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20809  				continue
 20810  			}
 20811  			v_0_2_0 := v_0_2.Args[0]
 20812  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20813  				continue
 20814  			}
 20815  			_ = v_0_2_0.Args[1]
 20816  			v_0_2_0_0 := v_0_2_0.Args[0]
 20817  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20818  				continue
 20819  			}
 20820  			v_0_2_0_1 := v_0_2_0.Args[1]
 20821  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 20822  				continue
 20823  			}
 20824  			mask := v_2
 20825  			v.Reset(ssaop.OpARM64ZUMULHMergingB)
 20826  			v.AddArg3(y, x, mask)
 20827  			return true
 20828  		}
 20829  		break
 20830  	}
 20831  	// match: (ZSELB (ZUMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 20832  	// result: (ZUMULHMergingPrefixedB z x y mask)
 20833  	for {
 20834  		if v_0.Op != ssaop.OpARM64ZUMULHMergingB {
 20835  			break
 20836  		}
 20837  		_ = v_0.Args[2]
 20838  		x := v_0.Args[0]
 20839  		y := v_0.Args[1]
 20840  		v_0_2 := v_0.Args[2]
 20841  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20842  			break
 20843  		}
 20844  		v_0_2_0 := v_0_2.Args[0]
 20845  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20846  			break
 20847  		}
 20848  		_ = v_0_2_0.Args[1]
 20849  		v_0_2_0_0 := v_0_2_0.Args[0]
 20850  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20851  			break
 20852  		}
 20853  		v_0_2_0_1 := v_0_2_0.Args[1]
 20854  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 20855  			break
 20856  		}
 20857  		z := v_1
 20858  		mask := v_2
 20859  		v.Reset(ssaop.OpARM64ZUMULHMergingPrefixedB)
 20860  		v.AddArg4(z, x, y, mask)
 20861  		return true
 20862  	}
 20863  	// match: (ZSELB (ZUQADDB x y) x mask)
 20864  	// result: (ZUQADDMergingB x y mask)
 20865  	for {
 20866  		if v_0.Op != ssaop.OpARM64ZUQADDB {
 20867  			break
 20868  		}
 20869  		_ = v_0.Args[1]
 20870  		v_0_0 := v_0.Args[0]
 20871  		v_0_1 := v_0.Args[1]
 20872  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20873  			x := v_0_0
 20874  			y := v_0_1
 20875  			if x != v_1 {
 20876  				continue
 20877  			}
 20878  			mask := v_2
 20879  			v.Reset(ssaop.OpARM64ZUQADDMergingB)
 20880  			v.AddArg3(x, y, mask)
 20881  			return true
 20882  		}
 20883  		break
 20884  	}
 20885  	// match: (ZSELB (ZUQADDB x y) y mask)
 20886  	// result: (ZUQADDMergingB y x mask)
 20887  	for {
 20888  		if v_0.Op != ssaop.OpARM64ZUQADDB {
 20889  			break
 20890  		}
 20891  		_ = v_0.Args[1]
 20892  		v_0_0 := v_0.Args[0]
 20893  		v_0_1 := v_0.Args[1]
 20894  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20895  			x := v_0_0
 20896  			y := v_0_1
 20897  			if y != v_1 {
 20898  				continue
 20899  			}
 20900  			mask := v_2
 20901  			v.Reset(ssaop.OpARM64ZUQADDMergingB)
 20902  			v.AddArg3(y, x, mask)
 20903  			return true
 20904  		}
 20905  		break
 20906  	}
 20907  	// match: (ZSELB (ZUQADDB x y) z mask)
 20908  	// result: (ZUQADDMergingPrefixedB z x y mask)
 20909  	for {
 20910  		if v_0.Op != ssaop.OpARM64ZUQADDB {
 20911  			break
 20912  		}
 20913  		y := v_0.Args[1]
 20914  		x := v_0.Args[0]
 20915  		z := v_1
 20916  		mask := v_2
 20917  		v.Reset(ssaop.OpARM64ZUQADDMergingPrefixedB)
 20918  		v.AddArg4(z, x, y, mask)
 20919  		return true
 20920  	}
 20921  	// match: (ZSELB (ZUQSUBB x y) x mask)
 20922  	// result: (ZUQSUBMergingB x y mask)
 20923  	for {
 20924  		if v_0.Op != ssaop.OpARM64ZUQSUBB {
 20925  			break
 20926  		}
 20927  		y := v_0.Args[1]
 20928  		x := v_0.Args[0]
 20929  		if x != v_1 {
 20930  			break
 20931  		}
 20932  		mask := v_2
 20933  		v.Reset(ssaop.OpARM64ZUQSUBMergingB)
 20934  		v.AddArg3(x, y, mask)
 20935  		return true
 20936  	}
 20937  	return false
 20938  }
 20939  func rewriteValue_OpARM64ZSELD(v *ssa.Value) bool {
 20940  	v_2 := v.Args[2]
 20941  	v_1 := v.Args[1]
 20942  	v_0 := v.Args[0]
 20943  	// match: (ZSELD (ZABSD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 20944  	// result: (ZABSMergingD z x mask)
 20945  	for {
 20946  		if v_0.Op != ssaop.OpARM64ZABSD {
 20947  			break
 20948  		}
 20949  		_ = v_0.Args[1]
 20950  		x := v_0.Args[0]
 20951  		v_0_1 := v_0.Args[1]
 20952  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 20953  			break
 20954  		}
 20955  		v_0_1_0 := v_0_1.Args[0]
 20956  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 20957  			break
 20958  		}
 20959  		_ = v_0_1_0.Args[1]
 20960  		v_0_1_0_0 := v_0_1_0.Args[0]
 20961  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 20962  			break
 20963  		}
 20964  		v_0_1_0_1 := v_0_1_0.Args[1]
 20965  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 20966  			break
 20967  		}
 20968  		z := v_1
 20969  		mask := v_2
 20970  		v.Reset(ssaop.OpARM64ZABSMergingD)
 20971  		v.AddArg3(z, x, mask)
 20972  		return true
 20973  	}
 20974  	// match: (ZSELD (ZADDD x y) x mask)
 20975  	// result: (ZADDMergingD x y mask)
 20976  	for {
 20977  		if v_0.Op != ssaop.OpARM64ZADDD {
 20978  			break
 20979  		}
 20980  		_ = v_0.Args[1]
 20981  		v_0_0 := v_0.Args[0]
 20982  		v_0_1 := v_0.Args[1]
 20983  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20984  			x := v_0_0
 20985  			y := v_0_1
 20986  			if x != v_1 {
 20987  				continue
 20988  			}
 20989  			mask := v_2
 20990  			v.Reset(ssaop.OpARM64ZADDMergingD)
 20991  			v.AddArg3(x, y, mask)
 20992  			return true
 20993  		}
 20994  		break
 20995  	}
 20996  	// match: (ZSELD (ZADDD x y) y mask)
 20997  	// result: (ZADDMergingD y x mask)
 20998  	for {
 20999  		if v_0.Op != ssaop.OpARM64ZADDD {
 21000  			break
 21001  		}
 21002  		_ = v_0.Args[1]
 21003  		v_0_0 := v_0.Args[0]
 21004  		v_0_1 := v_0.Args[1]
 21005  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21006  			x := v_0_0
 21007  			y := v_0_1
 21008  			if y != v_1 {
 21009  				continue
 21010  			}
 21011  			mask := v_2
 21012  			v.Reset(ssaop.OpARM64ZADDMergingD)
 21013  			v.AddArg3(y, x, mask)
 21014  			return true
 21015  		}
 21016  		break
 21017  	}
 21018  	// match: (ZSELD (ZADDD x y) z mask)
 21019  	// result: (ZADDMergingPrefixedD z x y mask)
 21020  	for {
 21021  		if v_0.Op != ssaop.OpARM64ZADDD {
 21022  			break
 21023  		}
 21024  		y := v_0.Args[1]
 21025  		x := v_0.Args[0]
 21026  		z := v_1
 21027  		mask := v_2
 21028  		v.Reset(ssaop.OpARM64ZADDMergingPrefixedD)
 21029  		v.AddArg4(z, x, y, mask)
 21030  		return true
 21031  	}
 21032  	// match: (ZSELD (ZANDD x y) x mask)
 21033  	// result: (ZANDMergingD x y mask)
 21034  	for {
 21035  		if v_0.Op != ssaop.OpARM64ZANDD {
 21036  			break
 21037  		}
 21038  		_ = v_0.Args[1]
 21039  		v_0_0 := v_0.Args[0]
 21040  		v_0_1 := v_0.Args[1]
 21041  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21042  			x := v_0_0
 21043  			y := v_0_1
 21044  			if x != v_1 {
 21045  				continue
 21046  			}
 21047  			mask := v_2
 21048  			v.Reset(ssaop.OpARM64ZANDMergingD)
 21049  			v.AddArg3(x, y, mask)
 21050  			return true
 21051  		}
 21052  		break
 21053  	}
 21054  	// match: (ZSELD (ZANDD x y) y mask)
 21055  	// result: (ZANDMergingD y x mask)
 21056  	for {
 21057  		if v_0.Op != ssaop.OpARM64ZANDD {
 21058  			break
 21059  		}
 21060  		_ = v_0.Args[1]
 21061  		v_0_0 := v_0.Args[0]
 21062  		v_0_1 := v_0.Args[1]
 21063  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21064  			x := v_0_0
 21065  			y := v_0_1
 21066  			if y != v_1 {
 21067  				continue
 21068  			}
 21069  			mask := v_2
 21070  			v.Reset(ssaop.OpARM64ZANDMergingD)
 21071  			v.AddArg3(y, x, mask)
 21072  			return true
 21073  		}
 21074  		break
 21075  	}
 21076  	// match: (ZSELD (ZANDD x y) z mask)
 21077  	// result: (ZANDMergingPrefixedD z x y mask)
 21078  	for {
 21079  		if v_0.Op != ssaop.OpARM64ZANDD {
 21080  			break
 21081  		}
 21082  		y := v_0.Args[1]
 21083  		x := v_0.Args[0]
 21084  		z := v_1
 21085  		mask := v_2
 21086  		v.Reset(ssaop.OpARM64ZANDMergingPrefixedD)
 21087  		v.AddArg4(z, x, y, mask)
 21088  		return true
 21089  	}
 21090  	// match: (ZSELD (ZBICD x y) x mask)
 21091  	// result: (ZBICMergingD x y mask)
 21092  	for {
 21093  		if v_0.Op != ssaop.OpARM64ZBICD {
 21094  			break
 21095  		}
 21096  		y := v_0.Args[1]
 21097  		x := v_0.Args[0]
 21098  		if x != v_1 {
 21099  			break
 21100  		}
 21101  		mask := v_2
 21102  		v.Reset(ssaop.OpARM64ZBICMergingD)
 21103  		v.AddArg3(x, y, mask)
 21104  		return true
 21105  	}
 21106  	// match: (ZSELD (ZEORD x y) x mask)
 21107  	// result: (ZEORMergingD x y mask)
 21108  	for {
 21109  		if v_0.Op != ssaop.OpARM64ZEORD {
 21110  			break
 21111  		}
 21112  		_ = v_0.Args[1]
 21113  		v_0_0 := v_0.Args[0]
 21114  		v_0_1 := v_0.Args[1]
 21115  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21116  			x := v_0_0
 21117  			y := v_0_1
 21118  			if x != v_1 {
 21119  				continue
 21120  			}
 21121  			mask := v_2
 21122  			v.Reset(ssaop.OpARM64ZEORMergingD)
 21123  			v.AddArg3(x, y, mask)
 21124  			return true
 21125  		}
 21126  		break
 21127  	}
 21128  	// match: (ZSELD (ZEORD x y) y mask)
 21129  	// result: (ZEORMergingD y x mask)
 21130  	for {
 21131  		if v_0.Op != ssaop.OpARM64ZEORD {
 21132  			break
 21133  		}
 21134  		_ = v_0.Args[1]
 21135  		v_0_0 := v_0.Args[0]
 21136  		v_0_1 := v_0.Args[1]
 21137  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21138  			x := v_0_0
 21139  			y := v_0_1
 21140  			if y != v_1 {
 21141  				continue
 21142  			}
 21143  			mask := v_2
 21144  			v.Reset(ssaop.OpARM64ZEORMergingD)
 21145  			v.AddArg3(y, x, mask)
 21146  			return true
 21147  		}
 21148  		break
 21149  	}
 21150  	// match: (ZSELD (ZEORD x y) z mask)
 21151  	// result: (ZEORMergingPrefixedD z x y mask)
 21152  	for {
 21153  		if v_0.Op != ssaop.OpARM64ZEORD {
 21154  			break
 21155  		}
 21156  		y := v_0.Args[1]
 21157  		x := v_0.Args[0]
 21158  		z := v_1
 21159  		mask := v_2
 21160  		v.Reset(ssaop.OpARM64ZEORMergingPrefixedD)
 21161  		v.AddArg4(z, x, y, mask)
 21162  		return true
 21163  	}
 21164  	// match: (ZSELD (ZFABSD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 21165  	// result: (ZFABSMergingD z x mask)
 21166  	for {
 21167  		if v_0.Op != ssaop.OpARM64ZFABSD {
 21168  			break
 21169  		}
 21170  		_ = v_0.Args[1]
 21171  		x := v_0.Args[0]
 21172  		v_0_1 := v_0.Args[1]
 21173  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 21174  			break
 21175  		}
 21176  		v_0_1_0 := v_0_1.Args[0]
 21177  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 21178  			break
 21179  		}
 21180  		_ = v_0_1_0.Args[1]
 21181  		v_0_1_0_0 := v_0_1_0.Args[0]
 21182  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 21183  			break
 21184  		}
 21185  		v_0_1_0_1 := v_0_1_0.Args[1]
 21186  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 21187  			break
 21188  		}
 21189  		z := v_1
 21190  		mask := v_2
 21191  		v.Reset(ssaop.OpARM64ZFABSMergingD)
 21192  		v.AddArg3(z, x, mask)
 21193  		return true
 21194  	}
 21195  	// match: (ZSELD (ZFADDD x y) x mask)
 21196  	// result: (ZFADDMergingD x y mask)
 21197  	for {
 21198  		if v_0.Op != ssaop.OpARM64ZFADDD {
 21199  			break
 21200  		}
 21201  		_ = v_0.Args[1]
 21202  		v_0_0 := v_0.Args[0]
 21203  		v_0_1 := v_0.Args[1]
 21204  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21205  			x := v_0_0
 21206  			y := v_0_1
 21207  			if x != v_1 {
 21208  				continue
 21209  			}
 21210  			mask := v_2
 21211  			v.Reset(ssaop.OpARM64ZFADDMergingD)
 21212  			v.AddArg3(x, y, mask)
 21213  			return true
 21214  		}
 21215  		break
 21216  	}
 21217  	// match: (ZSELD (ZFADDD x y) y mask)
 21218  	// result: (ZFADDMergingD y x mask)
 21219  	for {
 21220  		if v_0.Op != ssaop.OpARM64ZFADDD {
 21221  			break
 21222  		}
 21223  		_ = v_0.Args[1]
 21224  		v_0_0 := v_0.Args[0]
 21225  		v_0_1 := v_0.Args[1]
 21226  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21227  			x := v_0_0
 21228  			y := v_0_1
 21229  			if y != v_1 {
 21230  				continue
 21231  			}
 21232  			mask := v_2
 21233  			v.Reset(ssaop.OpARM64ZFADDMergingD)
 21234  			v.AddArg3(y, x, mask)
 21235  			return true
 21236  		}
 21237  		break
 21238  	}
 21239  	// match: (ZSELD (ZFADDD x y) z mask)
 21240  	// result: (ZFADDMergingPrefixedD z x y mask)
 21241  	for {
 21242  		if v_0.Op != ssaop.OpARM64ZFADDD {
 21243  			break
 21244  		}
 21245  		y := v_0.Args[1]
 21246  		x := v_0.Args[0]
 21247  		z := v_1
 21248  		mask := v_2
 21249  		v.Reset(ssaop.OpARM64ZFADDMergingPrefixedD)
 21250  		v.AddArg4(z, x, y, mask)
 21251  		return true
 21252  	}
 21253  	// match: (ZSELD (ZFMULD x y) x mask)
 21254  	// result: (ZFMULMergingD x y mask)
 21255  	for {
 21256  		if v_0.Op != ssaop.OpARM64ZFMULD {
 21257  			break
 21258  		}
 21259  		_ = v_0.Args[1]
 21260  		v_0_0 := v_0.Args[0]
 21261  		v_0_1 := v_0.Args[1]
 21262  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21263  			x := v_0_0
 21264  			y := v_0_1
 21265  			if x != v_1 {
 21266  				continue
 21267  			}
 21268  			mask := v_2
 21269  			v.Reset(ssaop.OpARM64ZFMULMergingD)
 21270  			v.AddArg3(x, y, mask)
 21271  			return true
 21272  		}
 21273  		break
 21274  	}
 21275  	// match: (ZSELD (ZFMULD x y) y mask)
 21276  	// result: (ZFMULMergingD y x mask)
 21277  	for {
 21278  		if v_0.Op != ssaop.OpARM64ZFMULD {
 21279  			break
 21280  		}
 21281  		_ = v_0.Args[1]
 21282  		v_0_0 := v_0.Args[0]
 21283  		v_0_1 := v_0.Args[1]
 21284  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21285  			x := v_0_0
 21286  			y := v_0_1
 21287  			if y != v_1 {
 21288  				continue
 21289  			}
 21290  			mask := v_2
 21291  			v.Reset(ssaop.OpARM64ZFMULMergingD)
 21292  			v.AddArg3(y, x, mask)
 21293  			return true
 21294  		}
 21295  		break
 21296  	}
 21297  	// match: (ZSELD (ZFMULD x y) z mask)
 21298  	// result: (ZFMULMergingPrefixedD z x y mask)
 21299  	for {
 21300  		if v_0.Op != ssaop.OpARM64ZFMULD {
 21301  			break
 21302  		}
 21303  		y := v_0.Args[1]
 21304  		x := v_0.Args[0]
 21305  		z := v_1
 21306  		mask := v_2
 21307  		v.Reset(ssaop.OpARM64ZFMULMergingPrefixedD)
 21308  		v.AddArg4(z, x, y, mask)
 21309  		return true
 21310  	}
 21311  	// match: (ZSELD (ZFNEGD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 21312  	// result: (ZFNEGMergingD z x mask)
 21313  	for {
 21314  		if v_0.Op != ssaop.OpARM64ZFNEGD {
 21315  			break
 21316  		}
 21317  		_ = v_0.Args[1]
 21318  		x := v_0.Args[0]
 21319  		v_0_1 := v_0.Args[1]
 21320  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 21321  			break
 21322  		}
 21323  		v_0_1_0 := v_0_1.Args[0]
 21324  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 21325  			break
 21326  		}
 21327  		_ = v_0_1_0.Args[1]
 21328  		v_0_1_0_0 := v_0_1_0.Args[0]
 21329  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 21330  			break
 21331  		}
 21332  		v_0_1_0_1 := v_0_1_0.Args[1]
 21333  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 21334  			break
 21335  		}
 21336  		z := v_1
 21337  		mask := v_2
 21338  		v.Reset(ssaop.OpARM64ZFNEGMergingD)
 21339  		v.AddArg3(z, x, mask)
 21340  		return true
 21341  	}
 21342  	// match: (ZSELD (ZFSQRTD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 21343  	// result: (ZFSQRTMergingD z x mask)
 21344  	for {
 21345  		if v_0.Op != ssaop.OpARM64ZFSQRTD {
 21346  			break
 21347  		}
 21348  		_ = v_0.Args[1]
 21349  		x := v_0.Args[0]
 21350  		v_0_1 := v_0.Args[1]
 21351  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 21352  			break
 21353  		}
 21354  		v_0_1_0 := v_0_1.Args[0]
 21355  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 21356  			break
 21357  		}
 21358  		_ = v_0_1_0.Args[1]
 21359  		v_0_1_0_0 := v_0_1_0.Args[0]
 21360  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 21361  			break
 21362  		}
 21363  		v_0_1_0_1 := v_0_1_0.Args[1]
 21364  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 21365  			break
 21366  		}
 21367  		z := v_1
 21368  		mask := v_2
 21369  		v.Reset(ssaop.OpARM64ZFSQRTMergingD)
 21370  		v.AddArg3(z, x, mask)
 21371  		return true
 21372  	}
 21373  	// match: (ZSELD (ZFSUBD x y) x mask)
 21374  	// result: (ZFSUBMergingD x y mask)
 21375  	for {
 21376  		if v_0.Op != ssaop.OpARM64ZFSUBD {
 21377  			break
 21378  		}
 21379  		y := v_0.Args[1]
 21380  		x := v_0.Args[0]
 21381  		if x != v_1 {
 21382  			break
 21383  		}
 21384  		mask := v_2
 21385  		v.Reset(ssaop.OpARM64ZFSUBMergingD)
 21386  		v.AddArg3(x, y, mask)
 21387  		return true
 21388  	}
 21389  	// match: (ZSELD (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 21390  	// result: (ZMULMergingD x y mask)
 21391  	for {
 21392  		if v_0.Op != ssaop.OpARM64ZMULMergingD {
 21393  			break
 21394  		}
 21395  		_ = v_0.Args[2]
 21396  		v_0_0 := v_0.Args[0]
 21397  		v_0_1 := v_0.Args[1]
 21398  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21399  			x := v_0_0
 21400  			y := v_0_1
 21401  			v_0_2 := v_0.Args[2]
 21402  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21403  				continue
 21404  			}
 21405  			v_0_2_0 := v_0_2.Args[0]
 21406  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 21407  				continue
 21408  			}
 21409  			_ = v_0_2_0.Args[1]
 21410  			v_0_2_0_0 := v_0_2_0.Args[0]
 21411  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21412  				continue
 21413  			}
 21414  			v_0_2_0_1 := v_0_2_0.Args[1]
 21415  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 21416  				continue
 21417  			}
 21418  			mask := v_2
 21419  			v.Reset(ssaop.OpARM64ZMULMergingD)
 21420  			v.AddArg3(x, y, mask)
 21421  			return true
 21422  		}
 21423  		break
 21424  	}
 21425  	// match: (ZSELD (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 21426  	// result: (ZMULMergingD y x mask)
 21427  	for {
 21428  		if v_0.Op != ssaop.OpARM64ZMULMergingD {
 21429  			break
 21430  		}
 21431  		_ = v_0.Args[2]
 21432  		v_0_0 := v_0.Args[0]
 21433  		v_0_1 := v_0.Args[1]
 21434  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21435  			x := v_0_0
 21436  			y := v_0_1
 21437  			v_0_2 := v_0.Args[2]
 21438  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21439  				continue
 21440  			}
 21441  			v_0_2_0 := v_0_2.Args[0]
 21442  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 21443  				continue
 21444  			}
 21445  			_ = v_0_2_0.Args[1]
 21446  			v_0_2_0_0 := v_0_2_0.Args[0]
 21447  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21448  				continue
 21449  			}
 21450  			v_0_2_0_1 := v_0_2_0.Args[1]
 21451  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 21452  				continue
 21453  			}
 21454  			mask := v_2
 21455  			v.Reset(ssaop.OpARM64ZMULMergingD)
 21456  			v.AddArg3(y, x, mask)
 21457  			return true
 21458  		}
 21459  		break
 21460  	}
 21461  	// match: (ZSELD (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 21462  	// result: (ZMULMergingPrefixedD z x y mask)
 21463  	for {
 21464  		if v_0.Op != ssaop.OpARM64ZMULMergingD {
 21465  			break
 21466  		}
 21467  		_ = v_0.Args[2]
 21468  		x := v_0.Args[0]
 21469  		y := v_0.Args[1]
 21470  		v_0_2 := v_0.Args[2]
 21471  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21472  			break
 21473  		}
 21474  		v_0_2_0 := v_0_2.Args[0]
 21475  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 21476  			break
 21477  		}
 21478  		_ = v_0_2_0.Args[1]
 21479  		v_0_2_0_0 := v_0_2_0.Args[0]
 21480  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21481  			break
 21482  		}
 21483  		v_0_2_0_1 := v_0_2_0.Args[1]
 21484  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 21485  			break
 21486  		}
 21487  		z := v_1
 21488  		mask := v_2
 21489  		v.Reset(ssaop.OpARM64ZMULMergingPrefixedD)
 21490  		v.AddArg4(z, x, y, mask)
 21491  		return true
 21492  	}
 21493  	// match: (ZSELD (ZNEGD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 21494  	// result: (ZNEGMergingD z x mask)
 21495  	for {
 21496  		if v_0.Op != ssaop.OpARM64ZNEGD {
 21497  			break
 21498  		}
 21499  		_ = v_0.Args[1]
 21500  		x := v_0.Args[0]
 21501  		v_0_1 := v_0.Args[1]
 21502  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 21503  			break
 21504  		}
 21505  		v_0_1_0 := v_0_1.Args[0]
 21506  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 21507  			break
 21508  		}
 21509  		_ = v_0_1_0.Args[1]
 21510  		v_0_1_0_0 := v_0_1_0.Args[0]
 21511  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 21512  			break
 21513  		}
 21514  		v_0_1_0_1 := v_0_1_0.Args[1]
 21515  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 21516  			break
 21517  		}
 21518  		z := v_1
 21519  		mask := v_2
 21520  		v.Reset(ssaop.OpARM64ZNEGMergingD)
 21521  		v.AddArg3(z, x, mask)
 21522  		return true
 21523  	}
 21524  	// match: (ZSELD (ZORRD x y) x mask)
 21525  	// result: (ZORRMergingD x y mask)
 21526  	for {
 21527  		if v_0.Op != ssaop.OpARM64ZORRD {
 21528  			break
 21529  		}
 21530  		_ = v_0.Args[1]
 21531  		v_0_0 := v_0.Args[0]
 21532  		v_0_1 := v_0.Args[1]
 21533  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21534  			x := v_0_0
 21535  			y := v_0_1
 21536  			if x != v_1 {
 21537  				continue
 21538  			}
 21539  			mask := v_2
 21540  			v.Reset(ssaop.OpARM64ZORRMergingD)
 21541  			v.AddArg3(x, y, mask)
 21542  			return true
 21543  		}
 21544  		break
 21545  	}
 21546  	// match: (ZSELD (ZORRD x y) y mask)
 21547  	// result: (ZORRMergingD y x mask)
 21548  	for {
 21549  		if v_0.Op != ssaop.OpARM64ZORRD {
 21550  			break
 21551  		}
 21552  		_ = v_0.Args[1]
 21553  		v_0_0 := v_0.Args[0]
 21554  		v_0_1 := v_0.Args[1]
 21555  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21556  			x := v_0_0
 21557  			y := v_0_1
 21558  			if y != v_1 {
 21559  				continue
 21560  			}
 21561  			mask := v_2
 21562  			v.Reset(ssaop.OpARM64ZORRMergingD)
 21563  			v.AddArg3(y, x, mask)
 21564  			return true
 21565  		}
 21566  		break
 21567  	}
 21568  	// match: (ZSELD (ZORRD x y) z mask)
 21569  	// result: (ZORRMergingPrefixedD z x y mask)
 21570  	for {
 21571  		if v_0.Op != ssaop.OpARM64ZORRD {
 21572  			break
 21573  		}
 21574  		y := v_0.Args[1]
 21575  		x := v_0.Args[0]
 21576  		z := v_1
 21577  		mask := v_2
 21578  		v.Reset(ssaop.OpARM64ZORRMergingPrefixedD)
 21579  		v.AddArg4(z, x, y, mask)
 21580  		return true
 21581  	}
 21582  	// match: (ZSELD (ZSMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 21583  	// result: (ZSMULHMergingD x y mask)
 21584  	for {
 21585  		if v_0.Op != ssaop.OpARM64ZSMULHMergingD {
 21586  			break
 21587  		}
 21588  		_ = v_0.Args[2]
 21589  		v_0_0 := v_0.Args[0]
 21590  		v_0_1 := v_0.Args[1]
 21591  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21592  			x := v_0_0
 21593  			y := v_0_1
 21594  			v_0_2 := v_0.Args[2]
 21595  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21596  				continue
 21597  			}
 21598  			v_0_2_0 := v_0_2.Args[0]
 21599  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 21600  				continue
 21601  			}
 21602  			_ = v_0_2_0.Args[1]
 21603  			v_0_2_0_0 := v_0_2_0.Args[0]
 21604  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21605  				continue
 21606  			}
 21607  			v_0_2_0_1 := v_0_2_0.Args[1]
 21608  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 21609  				continue
 21610  			}
 21611  			mask := v_2
 21612  			v.Reset(ssaop.OpARM64ZSMULHMergingD)
 21613  			v.AddArg3(x, y, mask)
 21614  			return true
 21615  		}
 21616  		break
 21617  	}
 21618  	// match: (ZSELD (ZSMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 21619  	// result: (ZSMULHMergingD y x mask)
 21620  	for {
 21621  		if v_0.Op != ssaop.OpARM64ZSMULHMergingD {
 21622  			break
 21623  		}
 21624  		_ = v_0.Args[2]
 21625  		v_0_0 := v_0.Args[0]
 21626  		v_0_1 := v_0.Args[1]
 21627  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21628  			x := v_0_0
 21629  			y := v_0_1
 21630  			v_0_2 := v_0.Args[2]
 21631  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21632  				continue
 21633  			}
 21634  			v_0_2_0 := v_0_2.Args[0]
 21635  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 21636  				continue
 21637  			}
 21638  			_ = v_0_2_0.Args[1]
 21639  			v_0_2_0_0 := v_0_2_0.Args[0]
 21640  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21641  				continue
 21642  			}
 21643  			v_0_2_0_1 := v_0_2_0.Args[1]
 21644  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 21645  				continue
 21646  			}
 21647  			mask := v_2
 21648  			v.Reset(ssaop.OpARM64ZSMULHMergingD)
 21649  			v.AddArg3(y, x, mask)
 21650  			return true
 21651  		}
 21652  		break
 21653  	}
 21654  	// match: (ZSELD (ZSMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 21655  	// result: (ZSMULHMergingPrefixedD z x y mask)
 21656  	for {
 21657  		if v_0.Op != ssaop.OpARM64ZSMULHMergingD {
 21658  			break
 21659  		}
 21660  		_ = v_0.Args[2]
 21661  		x := v_0.Args[0]
 21662  		y := v_0.Args[1]
 21663  		v_0_2 := v_0.Args[2]
 21664  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21665  			break
 21666  		}
 21667  		v_0_2_0 := v_0_2.Args[0]
 21668  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 21669  			break
 21670  		}
 21671  		_ = v_0_2_0.Args[1]
 21672  		v_0_2_0_0 := v_0_2_0.Args[0]
 21673  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21674  			break
 21675  		}
 21676  		v_0_2_0_1 := v_0_2_0.Args[1]
 21677  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 21678  			break
 21679  		}
 21680  		z := v_1
 21681  		mask := v_2
 21682  		v.Reset(ssaop.OpARM64ZSMULHMergingPrefixedD)
 21683  		v.AddArg4(z, x, y, mask)
 21684  		return true
 21685  	}
 21686  	// match: (ZSELD (ZSQADDD x y) x mask)
 21687  	// result: (ZSQADDMergingD x y mask)
 21688  	for {
 21689  		if v_0.Op != ssaop.OpARM64ZSQADDD {
 21690  			break
 21691  		}
 21692  		_ = v_0.Args[1]
 21693  		v_0_0 := v_0.Args[0]
 21694  		v_0_1 := v_0.Args[1]
 21695  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21696  			x := v_0_0
 21697  			y := v_0_1
 21698  			if x != v_1 {
 21699  				continue
 21700  			}
 21701  			mask := v_2
 21702  			v.Reset(ssaop.OpARM64ZSQADDMergingD)
 21703  			v.AddArg3(x, y, mask)
 21704  			return true
 21705  		}
 21706  		break
 21707  	}
 21708  	// match: (ZSELD (ZSQADDD x y) y mask)
 21709  	// result: (ZSQADDMergingD y x mask)
 21710  	for {
 21711  		if v_0.Op != ssaop.OpARM64ZSQADDD {
 21712  			break
 21713  		}
 21714  		_ = v_0.Args[1]
 21715  		v_0_0 := v_0.Args[0]
 21716  		v_0_1 := v_0.Args[1]
 21717  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21718  			x := v_0_0
 21719  			y := v_0_1
 21720  			if y != v_1 {
 21721  				continue
 21722  			}
 21723  			mask := v_2
 21724  			v.Reset(ssaop.OpARM64ZSQADDMergingD)
 21725  			v.AddArg3(y, x, mask)
 21726  			return true
 21727  		}
 21728  		break
 21729  	}
 21730  	// match: (ZSELD (ZSQADDD x y) z mask)
 21731  	// result: (ZSQADDMergingPrefixedD z x y mask)
 21732  	for {
 21733  		if v_0.Op != ssaop.OpARM64ZSQADDD {
 21734  			break
 21735  		}
 21736  		y := v_0.Args[1]
 21737  		x := v_0.Args[0]
 21738  		z := v_1
 21739  		mask := v_2
 21740  		v.Reset(ssaop.OpARM64ZSQADDMergingPrefixedD)
 21741  		v.AddArg4(z, x, y, mask)
 21742  		return true
 21743  	}
 21744  	// match: (ZSELD (ZSQSUBD x y) x mask)
 21745  	// result: (ZSQSUBMergingD x y mask)
 21746  	for {
 21747  		if v_0.Op != ssaop.OpARM64ZSQSUBD {
 21748  			break
 21749  		}
 21750  		y := v_0.Args[1]
 21751  		x := v_0.Args[0]
 21752  		if x != v_1 {
 21753  			break
 21754  		}
 21755  		mask := v_2
 21756  		v.Reset(ssaop.OpARM64ZSQSUBMergingD)
 21757  		v.AddArg3(x, y, mask)
 21758  		return true
 21759  	}
 21760  	// match: (ZSELD (ZSUBD x y) x mask)
 21761  	// result: (ZSUBMergingD x y mask)
 21762  	for {
 21763  		if v_0.Op != ssaop.OpARM64ZSUBD {
 21764  			break
 21765  		}
 21766  		y := v_0.Args[1]
 21767  		x := v_0.Args[0]
 21768  		if x != v_1 {
 21769  			break
 21770  		}
 21771  		mask := v_2
 21772  		v.Reset(ssaop.OpARM64ZSUBMergingD)
 21773  		v.AddArg3(x, y, mask)
 21774  		return true
 21775  	}
 21776  	// match: (ZSELD (ZUMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 21777  	// result: (ZUMULHMergingD x y mask)
 21778  	for {
 21779  		if v_0.Op != ssaop.OpARM64ZUMULHMergingD {
 21780  			break
 21781  		}
 21782  		_ = v_0.Args[2]
 21783  		v_0_0 := v_0.Args[0]
 21784  		v_0_1 := v_0.Args[1]
 21785  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21786  			x := v_0_0
 21787  			y := v_0_1
 21788  			v_0_2 := v_0.Args[2]
 21789  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21790  				continue
 21791  			}
 21792  			v_0_2_0 := v_0_2.Args[0]
 21793  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 21794  				continue
 21795  			}
 21796  			_ = v_0_2_0.Args[1]
 21797  			v_0_2_0_0 := v_0_2_0.Args[0]
 21798  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21799  				continue
 21800  			}
 21801  			v_0_2_0_1 := v_0_2_0.Args[1]
 21802  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 21803  				continue
 21804  			}
 21805  			mask := v_2
 21806  			v.Reset(ssaop.OpARM64ZUMULHMergingD)
 21807  			v.AddArg3(x, y, mask)
 21808  			return true
 21809  		}
 21810  		break
 21811  	}
 21812  	// match: (ZSELD (ZUMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 21813  	// result: (ZUMULHMergingD y x mask)
 21814  	for {
 21815  		if v_0.Op != ssaop.OpARM64ZUMULHMergingD {
 21816  			break
 21817  		}
 21818  		_ = v_0.Args[2]
 21819  		v_0_0 := v_0.Args[0]
 21820  		v_0_1 := v_0.Args[1]
 21821  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21822  			x := v_0_0
 21823  			y := v_0_1
 21824  			v_0_2 := v_0.Args[2]
 21825  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21826  				continue
 21827  			}
 21828  			v_0_2_0 := v_0_2.Args[0]
 21829  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 21830  				continue
 21831  			}
 21832  			_ = v_0_2_0.Args[1]
 21833  			v_0_2_0_0 := v_0_2_0.Args[0]
 21834  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21835  				continue
 21836  			}
 21837  			v_0_2_0_1 := v_0_2_0.Args[1]
 21838  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 21839  				continue
 21840  			}
 21841  			mask := v_2
 21842  			v.Reset(ssaop.OpARM64ZUMULHMergingD)
 21843  			v.AddArg3(y, x, mask)
 21844  			return true
 21845  		}
 21846  		break
 21847  	}
 21848  	// match: (ZSELD (ZUMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 21849  	// result: (ZUMULHMergingPrefixedD z x y mask)
 21850  	for {
 21851  		if v_0.Op != ssaop.OpARM64ZUMULHMergingD {
 21852  			break
 21853  		}
 21854  		_ = v_0.Args[2]
 21855  		x := v_0.Args[0]
 21856  		y := v_0.Args[1]
 21857  		v_0_2 := v_0.Args[2]
 21858  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21859  			break
 21860  		}
 21861  		v_0_2_0 := v_0_2.Args[0]
 21862  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 21863  			break
 21864  		}
 21865  		_ = v_0_2_0.Args[1]
 21866  		v_0_2_0_0 := v_0_2_0.Args[0]
 21867  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21868  			break
 21869  		}
 21870  		v_0_2_0_1 := v_0_2_0.Args[1]
 21871  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 21872  			break
 21873  		}
 21874  		z := v_1
 21875  		mask := v_2
 21876  		v.Reset(ssaop.OpARM64ZUMULHMergingPrefixedD)
 21877  		v.AddArg4(z, x, y, mask)
 21878  		return true
 21879  	}
 21880  	// match: (ZSELD (ZUQADDD x y) x mask)
 21881  	// result: (ZUQADDMergingD x y mask)
 21882  	for {
 21883  		if v_0.Op != ssaop.OpARM64ZUQADDD {
 21884  			break
 21885  		}
 21886  		_ = v_0.Args[1]
 21887  		v_0_0 := v_0.Args[0]
 21888  		v_0_1 := v_0.Args[1]
 21889  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21890  			x := v_0_0
 21891  			y := v_0_1
 21892  			if x != v_1 {
 21893  				continue
 21894  			}
 21895  			mask := v_2
 21896  			v.Reset(ssaop.OpARM64ZUQADDMergingD)
 21897  			v.AddArg3(x, y, mask)
 21898  			return true
 21899  		}
 21900  		break
 21901  	}
 21902  	// match: (ZSELD (ZUQADDD x y) y mask)
 21903  	// result: (ZUQADDMergingD y x mask)
 21904  	for {
 21905  		if v_0.Op != ssaop.OpARM64ZUQADDD {
 21906  			break
 21907  		}
 21908  		_ = v_0.Args[1]
 21909  		v_0_0 := v_0.Args[0]
 21910  		v_0_1 := v_0.Args[1]
 21911  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21912  			x := v_0_0
 21913  			y := v_0_1
 21914  			if y != v_1 {
 21915  				continue
 21916  			}
 21917  			mask := v_2
 21918  			v.Reset(ssaop.OpARM64ZUQADDMergingD)
 21919  			v.AddArg3(y, x, mask)
 21920  			return true
 21921  		}
 21922  		break
 21923  	}
 21924  	// match: (ZSELD (ZUQADDD x y) z mask)
 21925  	// result: (ZUQADDMergingPrefixedD z x y mask)
 21926  	for {
 21927  		if v_0.Op != ssaop.OpARM64ZUQADDD {
 21928  			break
 21929  		}
 21930  		y := v_0.Args[1]
 21931  		x := v_0.Args[0]
 21932  		z := v_1
 21933  		mask := v_2
 21934  		v.Reset(ssaop.OpARM64ZUQADDMergingPrefixedD)
 21935  		v.AddArg4(z, x, y, mask)
 21936  		return true
 21937  	}
 21938  	// match: (ZSELD (ZUQSUBD x y) x mask)
 21939  	// result: (ZUQSUBMergingD x y mask)
 21940  	for {
 21941  		if v_0.Op != ssaop.OpARM64ZUQSUBD {
 21942  			break
 21943  		}
 21944  		y := v_0.Args[1]
 21945  		x := v_0.Args[0]
 21946  		if x != v_1 {
 21947  			break
 21948  		}
 21949  		mask := v_2
 21950  		v.Reset(ssaop.OpARM64ZUQSUBMergingD)
 21951  		v.AddArg3(x, y, mask)
 21952  		return true
 21953  	}
 21954  	return false
 21955  }
 21956  func rewriteValue_OpARM64ZSELH(v *ssa.Value) bool {
 21957  	v_2 := v.Args[2]
 21958  	v_1 := v.Args[1]
 21959  	v_0 := v.Args[0]
 21960  	// match: (ZSELH (ZABSH x (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 21961  	// result: (ZABSMergingH z x mask)
 21962  	for {
 21963  		if v_0.Op != ssaop.OpARM64ZABSH {
 21964  			break
 21965  		}
 21966  		_ = v_0.Args[1]
 21967  		x := v_0.Args[0]
 21968  		v_0_1 := v_0.Args[1]
 21969  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 21970  			break
 21971  		}
 21972  		v_0_1_0 := v_0_1.Args[0]
 21973  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTH {
 21974  			break
 21975  		}
 21976  		_ = v_0_1_0.Args[1]
 21977  		v_0_1_0_0 := v_0_1_0.Args[0]
 21978  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 21979  			break
 21980  		}
 21981  		v_0_1_0_1 := v_0_1_0.Args[1]
 21982  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 16 {
 21983  			break
 21984  		}
 21985  		z := v_1
 21986  		mask := v_2
 21987  		v.Reset(ssaop.OpARM64ZABSMergingH)
 21988  		v.AddArg3(z, x, mask)
 21989  		return true
 21990  	}
 21991  	// match: (ZSELH (ZADDH x y) x mask)
 21992  	// result: (ZADDMergingH x y mask)
 21993  	for {
 21994  		if v_0.Op != ssaop.OpARM64ZADDH {
 21995  			break
 21996  		}
 21997  		_ = v_0.Args[1]
 21998  		v_0_0 := v_0.Args[0]
 21999  		v_0_1 := v_0.Args[1]
 22000  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22001  			x := v_0_0
 22002  			y := v_0_1
 22003  			if x != v_1 {
 22004  				continue
 22005  			}
 22006  			mask := v_2
 22007  			v.Reset(ssaop.OpARM64ZADDMergingH)
 22008  			v.AddArg3(x, y, mask)
 22009  			return true
 22010  		}
 22011  		break
 22012  	}
 22013  	// match: (ZSELH (ZADDH x y) y mask)
 22014  	// result: (ZADDMergingH y x mask)
 22015  	for {
 22016  		if v_0.Op != ssaop.OpARM64ZADDH {
 22017  			break
 22018  		}
 22019  		_ = v_0.Args[1]
 22020  		v_0_0 := v_0.Args[0]
 22021  		v_0_1 := v_0.Args[1]
 22022  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22023  			x := v_0_0
 22024  			y := v_0_1
 22025  			if y != v_1 {
 22026  				continue
 22027  			}
 22028  			mask := v_2
 22029  			v.Reset(ssaop.OpARM64ZADDMergingH)
 22030  			v.AddArg3(y, x, mask)
 22031  			return true
 22032  		}
 22033  		break
 22034  	}
 22035  	// match: (ZSELH (ZADDH x y) z mask)
 22036  	// result: (ZADDMergingPrefixedH z x y mask)
 22037  	for {
 22038  		if v_0.Op != ssaop.OpARM64ZADDH {
 22039  			break
 22040  		}
 22041  		y := v_0.Args[1]
 22042  		x := v_0.Args[0]
 22043  		z := v_1
 22044  		mask := v_2
 22045  		v.Reset(ssaop.OpARM64ZADDMergingPrefixedH)
 22046  		v.AddArg4(z, x, y, mask)
 22047  		return true
 22048  	}
 22049  	// match: (ZSELH (ZANDD x y) x mask)
 22050  	// result: (ZANDMergingH x y mask)
 22051  	for {
 22052  		if v_0.Op != ssaop.OpARM64ZANDD {
 22053  			break
 22054  		}
 22055  		_ = v_0.Args[1]
 22056  		v_0_0 := v_0.Args[0]
 22057  		v_0_1 := v_0.Args[1]
 22058  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22059  			x := v_0_0
 22060  			y := v_0_1
 22061  			if x != v_1 {
 22062  				continue
 22063  			}
 22064  			mask := v_2
 22065  			v.Reset(ssaop.OpARM64ZANDMergingH)
 22066  			v.AddArg3(x, y, mask)
 22067  			return true
 22068  		}
 22069  		break
 22070  	}
 22071  	// match: (ZSELH (ZANDD x y) y mask)
 22072  	// result: (ZANDMergingH y x mask)
 22073  	for {
 22074  		if v_0.Op != ssaop.OpARM64ZANDD {
 22075  			break
 22076  		}
 22077  		_ = v_0.Args[1]
 22078  		v_0_0 := v_0.Args[0]
 22079  		v_0_1 := v_0.Args[1]
 22080  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22081  			x := v_0_0
 22082  			y := v_0_1
 22083  			if y != v_1 {
 22084  				continue
 22085  			}
 22086  			mask := v_2
 22087  			v.Reset(ssaop.OpARM64ZANDMergingH)
 22088  			v.AddArg3(y, x, mask)
 22089  			return true
 22090  		}
 22091  		break
 22092  	}
 22093  	// match: (ZSELH (ZANDD x y) z mask)
 22094  	// result: (ZANDMergingPrefixedH z x y mask)
 22095  	for {
 22096  		if v_0.Op != ssaop.OpARM64ZANDD {
 22097  			break
 22098  		}
 22099  		y := v_0.Args[1]
 22100  		x := v_0.Args[0]
 22101  		z := v_1
 22102  		mask := v_2
 22103  		v.Reset(ssaop.OpARM64ZANDMergingPrefixedH)
 22104  		v.AddArg4(z, x, y, mask)
 22105  		return true
 22106  	}
 22107  	// match: (ZSELH (ZBICD x y) x mask)
 22108  	// result: (ZBICMergingH x y mask)
 22109  	for {
 22110  		if v_0.Op != ssaop.OpARM64ZBICD {
 22111  			break
 22112  		}
 22113  		y := v_0.Args[1]
 22114  		x := v_0.Args[0]
 22115  		if x != v_1 {
 22116  			break
 22117  		}
 22118  		mask := v_2
 22119  		v.Reset(ssaop.OpARM64ZBICMergingH)
 22120  		v.AddArg3(x, y, mask)
 22121  		return true
 22122  	}
 22123  	// match: (ZSELH (ZEORD x y) x mask)
 22124  	// result: (ZEORMergingH x y mask)
 22125  	for {
 22126  		if v_0.Op != ssaop.OpARM64ZEORD {
 22127  			break
 22128  		}
 22129  		_ = v_0.Args[1]
 22130  		v_0_0 := v_0.Args[0]
 22131  		v_0_1 := v_0.Args[1]
 22132  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22133  			x := v_0_0
 22134  			y := v_0_1
 22135  			if x != v_1 {
 22136  				continue
 22137  			}
 22138  			mask := v_2
 22139  			v.Reset(ssaop.OpARM64ZEORMergingH)
 22140  			v.AddArg3(x, y, mask)
 22141  			return true
 22142  		}
 22143  		break
 22144  	}
 22145  	// match: (ZSELH (ZEORD x y) y mask)
 22146  	// result: (ZEORMergingH y x mask)
 22147  	for {
 22148  		if v_0.Op != ssaop.OpARM64ZEORD {
 22149  			break
 22150  		}
 22151  		_ = v_0.Args[1]
 22152  		v_0_0 := v_0.Args[0]
 22153  		v_0_1 := v_0.Args[1]
 22154  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22155  			x := v_0_0
 22156  			y := v_0_1
 22157  			if y != v_1 {
 22158  				continue
 22159  			}
 22160  			mask := v_2
 22161  			v.Reset(ssaop.OpARM64ZEORMergingH)
 22162  			v.AddArg3(y, x, mask)
 22163  			return true
 22164  		}
 22165  		break
 22166  	}
 22167  	// match: (ZSELH (ZEORD x y) z mask)
 22168  	// result: (ZEORMergingPrefixedH z x y mask)
 22169  	for {
 22170  		if v_0.Op != ssaop.OpARM64ZEORD {
 22171  			break
 22172  		}
 22173  		y := v_0.Args[1]
 22174  		x := v_0.Args[0]
 22175  		z := v_1
 22176  		mask := v_2
 22177  		v.Reset(ssaop.OpARM64ZEORMergingPrefixedH)
 22178  		v.AddArg4(z, x, y, mask)
 22179  		return true
 22180  	}
 22181  	// match: (ZSELH (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 22182  	// result: (ZMULMergingH x y mask)
 22183  	for {
 22184  		if v_0.Op != ssaop.OpARM64ZMULMergingH {
 22185  			break
 22186  		}
 22187  		_ = v_0.Args[2]
 22188  		v_0_0 := v_0.Args[0]
 22189  		v_0_1 := v_0.Args[1]
 22190  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22191  			x := v_0_0
 22192  			y := v_0_1
 22193  			v_0_2 := v_0.Args[2]
 22194  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22195  				continue
 22196  			}
 22197  			v_0_2_0 := v_0_2.Args[0]
 22198  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 22199  				continue
 22200  			}
 22201  			_ = v_0_2_0.Args[1]
 22202  			v_0_2_0_0 := v_0_2_0.Args[0]
 22203  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22204  				continue
 22205  			}
 22206  			v_0_2_0_1 := v_0_2_0.Args[1]
 22207  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 22208  				continue
 22209  			}
 22210  			mask := v_2
 22211  			v.Reset(ssaop.OpARM64ZMULMergingH)
 22212  			v.AddArg3(x, y, mask)
 22213  			return true
 22214  		}
 22215  		break
 22216  	}
 22217  	// match: (ZSELH (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 22218  	// result: (ZMULMergingH y x mask)
 22219  	for {
 22220  		if v_0.Op != ssaop.OpARM64ZMULMergingH {
 22221  			break
 22222  		}
 22223  		_ = v_0.Args[2]
 22224  		v_0_0 := v_0.Args[0]
 22225  		v_0_1 := v_0.Args[1]
 22226  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22227  			x := v_0_0
 22228  			y := v_0_1
 22229  			v_0_2 := v_0.Args[2]
 22230  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22231  				continue
 22232  			}
 22233  			v_0_2_0 := v_0_2.Args[0]
 22234  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 22235  				continue
 22236  			}
 22237  			_ = v_0_2_0.Args[1]
 22238  			v_0_2_0_0 := v_0_2_0.Args[0]
 22239  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22240  				continue
 22241  			}
 22242  			v_0_2_0_1 := v_0_2_0.Args[1]
 22243  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 22244  				continue
 22245  			}
 22246  			mask := v_2
 22247  			v.Reset(ssaop.OpARM64ZMULMergingH)
 22248  			v.AddArg3(y, x, mask)
 22249  			return true
 22250  		}
 22251  		break
 22252  	}
 22253  	// match: (ZSELH (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 22254  	// result: (ZMULMergingPrefixedH z x y mask)
 22255  	for {
 22256  		if v_0.Op != ssaop.OpARM64ZMULMergingH {
 22257  			break
 22258  		}
 22259  		_ = v_0.Args[2]
 22260  		x := v_0.Args[0]
 22261  		y := v_0.Args[1]
 22262  		v_0_2 := v_0.Args[2]
 22263  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22264  			break
 22265  		}
 22266  		v_0_2_0 := v_0_2.Args[0]
 22267  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 22268  			break
 22269  		}
 22270  		_ = v_0_2_0.Args[1]
 22271  		v_0_2_0_0 := v_0_2_0.Args[0]
 22272  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22273  			break
 22274  		}
 22275  		v_0_2_0_1 := v_0_2_0.Args[1]
 22276  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 22277  			break
 22278  		}
 22279  		z := v_1
 22280  		mask := v_2
 22281  		v.Reset(ssaop.OpARM64ZMULMergingPrefixedH)
 22282  		v.AddArg4(z, x, y, mask)
 22283  		return true
 22284  	}
 22285  	// match: (ZSELH (ZNEGH x (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 22286  	// result: (ZNEGMergingH z x mask)
 22287  	for {
 22288  		if v_0.Op != ssaop.OpARM64ZNEGH {
 22289  			break
 22290  		}
 22291  		_ = v_0.Args[1]
 22292  		x := v_0.Args[0]
 22293  		v_0_1 := v_0.Args[1]
 22294  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 22295  			break
 22296  		}
 22297  		v_0_1_0 := v_0_1.Args[0]
 22298  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTH {
 22299  			break
 22300  		}
 22301  		_ = v_0_1_0.Args[1]
 22302  		v_0_1_0_0 := v_0_1_0.Args[0]
 22303  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 22304  			break
 22305  		}
 22306  		v_0_1_0_1 := v_0_1_0.Args[1]
 22307  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 16 {
 22308  			break
 22309  		}
 22310  		z := v_1
 22311  		mask := v_2
 22312  		v.Reset(ssaop.OpARM64ZNEGMergingH)
 22313  		v.AddArg3(z, x, mask)
 22314  		return true
 22315  	}
 22316  	// match: (ZSELH (ZORRD x y) x mask)
 22317  	// result: (ZORRMergingH x y mask)
 22318  	for {
 22319  		if v_0.Op != ssaop.OpARM64ZORRD {
 22320  			break
 22321  		}
 22322  		_ = v_0.Args[1]
 22323  		v_0_0 := v_0.Args[0]
 22324  		v_0_1 := v_0.Args[1]
 22325  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22326  			x := v_0_0
 22327  			y := v_0_1
 22328  			if x != v_1 {
 22329  				continue
 22330  			}
 22331  			mask := v_2
 22332  			v.Reset(ssaop.OpARM64ZORRMergingH)
 22333  			v.AddArg3(x, y, mask)
 22334  			return true
 22335  		}
 22336  		break
 22337  	}
 22338  	// match: (ZSELH (ZORRD x y) y mask)
 22339  	// result: (ZORRMergingH y x mask)
 22340  	for {
 22341  		if v_0.Op != ssaop.OpARM64ZORRD {
 22342  			break
 22343  		}
 22344  		_ = v_0.Args[1]
 22345  		v_0_0 := v_0.Args[0]
 22346  		v_0_1 := v_0.Args[1]
 22347  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22348  			x := v_0_0
 22349  			y := v_0_1
 22350  			if y != v_1 {
 22351  				continue
 22352  			}
 22353  			mask := v_2
 22354  			v.Reset(ssaop.OpARM64ZORRMergingH)
 22355  			v.AddArg3(y, x, mask)
 22356  			return true
 22357  		}
 22358  		break
 22359  	}
 22360  	// match: (ZSELH (ZORRD x y) z mask)
 22361  	// result: (ZORRMergingPrefixedH z x y mask)
 22362  	for {
 22363  		if v_0.Op != ssaop.OpARM64ZORRD {
 22364  			break
 22365  		}
 22366  		y := v_0.Args[1]
 22367  		x := v_0.Args[0]
 22368  		z := v_1
 22369  		mask := v_2
 22370  		v.Reset(ssaop.OpARM64ZORRMergingPrefixedH)
 22371  		v.AddArg4(z, x, y, mask)
 22372  		return true
 22373  	}
 22374  	// match: (ZSELH (ZSMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 22375  	// result: (ZSMULHMergingH x y mask)
 22376  	for {
 22377  		if v_0.Op != ssaop.OpARM64ZSMULHMergingH {
 22378  			break
 22379  		}
 22380  		_ = v_0.Args[2]
 22381  		v_0_0 := v_0.Args[0]
 22382  		v_0_1 := v_0.Args[1]
 22383  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22384  			x := v_0_0
 22385  			y := v_0_1
 22386  			v_0_2 := v_0.Args[2]
 22387  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22388  				continue
 22389  			}
 22390  			v_0_2_0 := v_0_2.Args[0]
 22391  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 22392  				continue
 22393  			}
 22394  			_ = v_0_2_0.Args[1]
 22395  			v_0_2_0_0 := v_0_2_0.Args[0]
 22396  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22397  				continue
 22398  			}
 22399  			v_0_2_0_1 := v_0_2_0.Args[1]
 22400  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 22401  				continue
 22402  			}
 22403  			mask := v_2
 22404  			v.Reset(ssaop.OpARM64ZSMULHMergingH)
 22405  			v.AddArg3(x, y, mask)
 22406  			return true
 22407  		}
 22408  		break
 22409  	}
 22410  	// match: (ZSELH (ZSMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 22411  	// result: (ZSMULHMergingH y x mask)
 22412  	for {
 22413  		if v_0.Op != ssaop.OpARM64ZSMULHMergingH {
 22414  			break
 22415  		}
 22416  		_ = v_0.Args[2]
 22417  		v_0_0 := v_0.Args[0]
 22418  		v_0_1 := v_0.Args[1]
 22419  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22420  			x := v_0_0
 22421  			y := v_0_1
 22422  			v_0_2 := v_0.Args[2]
 22423  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22424  				continue
 22425  			}
 22426  			v_0_2_0 := v_0_2.Args[0]
 22427  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 22428  				continue
 22429  			}
 22430  			_ = v_0_2_0.Args[1]
 22431  			v_0_2_0_0 := v_0_2_0.Args[0]
 22432  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22433  				continue
 22434  			}
 22435  			v_0_2_0_1 := v_0_2_0.Args[1]
 22436  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 22437  				continue
 22438  			}
 22439  			mask := v_2
 22440  			v.Reset(ssaop.OpARM64ZSMULHMergingH)
 22441  			v.AddArg3(y, x, mask)
 22442  			return true
 22443  		}
 22444  		break
 22445  	}
 22446  	// match: (ZSELH (ZSMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 22447  	// result: (ZSMULHMergingPrefixedH z x y mask)
 22448  	for {
 22449  		if v_0.Op != ssaop.OpARM64ZSMULHMergingH {
 22450  			break
 22451  		}
 22452  		_ = v_0.Args[2]
 22453  		x := v_0.Args[0]
 22454  		y := v_0.Args[1]
 22455  		v_0_2 := v_0.Args[2]
 22456  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22457  			break
 22458  		}
 22459  		v_0_2_0 := v_0_2.Args[0]
 22460  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 22461  			break
 22462  		}
 22463  		_ = v_0_2_0.Args[1]
 22464  		v_0_2_0_0 := v_0_2_0.Args[0]
 22465  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22466  			break
 22467  		}
 22468  		v_0_2_0_1 := v_0_2_0.Args[1]
 22469  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 22470  			break
 22471  		}
 22472  		z := v_1
 22473  		mask := v_2
 22474  		v.Reset(ssaop.OpARM64ZSMULHMergingPrefixedH)
 22475  		v.AddArg4(z, x, y, mask)
 22476  		return true
 22477  	}
 22478  	// match: (ZSELH (ZSQADDH x y) x mask)
 22479  	// result: (ZSQADDMergingH x y mask)
 22480  	for {
 22481  		if v_0.Op != ssaop.OpARM64ZSQADDH {
 22482  			break
 22483  		}
 22484  		_ = v_0.Args[1]
 22485  		v_0_0 := v_0.Args[0]
 22486  		v_0_1 := v_0.Args[1]
 22487  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22488  			x := v_0_0
 22489  			y := v_0_1
 22490  			if x != v_1 {
 22491  				continue
 22492  			}
 22493  			mask := v_2
 22494  			v.Reset(ssaop.OpARM64ZSQADDMergingH)
 22495  			v.AddArg3(x, y, mask)
 22496  			return true
 22497  		}
 22498  		break
 22499  	}
 22500  	// match: (ZSELH (ZSQADDH x y) y mask)
 22501  	// result: (ZSQADDMergingH y x mask)
 22502  	for {
 22503  		if v_0.Op != ssaop.OpARM64ZSQADDH {
 22504  			break
 22505  		}
 22506  		_ = v_0.Args[1]
 22507  		v_0_0 := v_0.Args[0]
 22508  		v_0_1 := v_0.Args[1]
 22509  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22510  			x := v_0_0
 22511  			y := v_0_1
 22512  			if y != v_1 {
 22513  				continue
 22514  			}
 22515  			mask := v_2
 22516  			v.Reset(ssaop.OpARM64ZSQADDMergingH)
 22517  			v.AddArg3(y, x, mask)
 22518  			return true
 22519  		}
 22520  		break
 22521  	}
 22522  	// match: (ZSELH (ZSQADDH x y) z mask)
 22523  	// result: (ZSQADDMergingPrefixedH z x y mask)
 22524  	for {
 22525  		if v_0.Op != ssaop.OpARM64ZSQADDH {
 22526  			break
 22527  		}
 22528  		y := v_0.Args[1]
 22529  		x := v_0.Args[0]
 22530  		z := v_1
 22531  		mask := v_2
 22532  		v.Reset(ssaop.OpARM64ZSQADDMergingPrefixedH)
 22533  		v.AddArg4(z, x, y, mask)
 22534  		return true
 22535  	}
 22536  	// match: (ZSELH (ZSQSUBH x y) x mask)
 22537  	// result: (ZSQSUBMergingH x y mask)
 22538  	for {
 22539  		if v_0.Op != ssaop.OpARM64ZSQSUBH {
 22540  			break
 22541  		}
 22542  		y := v_0.Args[1]
 22543  		x := v_0.Args[0]
 22544  		if x != v_1 {
 22545  			break
 22546  		}
 22547  		mask := v_2
 22548  		v.Reset(ssaop.OpARM64ZSQSUBMergingH)
 22549  		v.AddArg3(x, y, mask)
 22550  		return true
 22551  	}
 22552  	// match: (ZSELH (ZSUBH x y) x mask)
 22553  	// result: (ZSUBMergingH x y mask)
 22554  	for {
 22555  		if v_0.Op != ssaop.OpARM64ZSUBH {
 22556  			break
 22557  		}
 22558  		y := v_0.Args[1]
 22559  		x := v_0.Args[0]
 22560  		if x != v_1 {
 22561  			break
 22562  		}
 22563  		mask := v_2
 22564  		v.Reset(ssaop.OpARM64ZSUBMergingH)
 22565  		v.AddArg3(x, y, mask)
 22566  		return true
 22567  	}
 22568  	// match: (ZSELH (ZUMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 22569  	// result: (ZUMULHMergingH x y mask)
 22570  	for {
 22571  		if v_0.Op != ssaop.OpARM64ZUMULHMergingH {
 22572  			break
 22573  		}
 22574  		_ = v_0.Args[2]
 22575  		v_0_0 := v_0.Args[0]
 22576  		v_0_1 := v_0.Args[1]
 22577  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22578  			x := v_0_0
 22579  			y := v_0_1
 22580  			v_0_2 := v_0.Args[2]
 22581  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22582  				continue
 22583  			}
 22584  			v_0_2_0 := v_0_2.Args[0]
 22585  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 22586  				continue
 22587  			}
 22588  			_ = v_0_2_0.Args[1]
 22589  			v_0_2_0_0 := v_0_2_0.Args[0]
 22590  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22591  				continue
 22592  			}
 22593  			v_0_2_0_1 := v_0_2_0.Args[1]
 22594  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 22595  				continue
 22596  			}
 22597  			mask := v_2
 22598  			v.Reset(ssaop.OpARM64ZUMULHMergingH)
 22599  			v.AddArg3(x, y, mask)
 22600  			return true
 22601  		}
 22602  		break
 22603  	}
 22604  	// match: (ZSELH (ZUMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 22605  	// result: (ZUMULHMergingH y x mask)
 22606  	for {
 22607  		if v_0.Op != ssaop.OpARM64ZUMULHMergingH {
 22608  			break
 22609  		}
 22610  		_ = v_0.Args[2]
 22611  		v_0_0 := v_0.Args[0]
 22612  		v_0_1 := v_0.Args[1]
 22613  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22614  			x := v_0_0
 22615  			y := v_0_1
 22616  			v_0_2 := v_0.Args[2]
 22617  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22618  				continue
 22619  			}
 22620  			v_0_2_0 := v_0_2.Args[0]
 22621  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 22622  				continue
 22623  			}
 22624  			_ = v_0_2_0.Args[1]
 22625  			v_0_2_0_0 := v_0_2_0.Args[0]
 22626  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22627  				continue
 22628  			}
 22629  			v_0_2_0_1 := v_0_2_0.Args[1]
 22630  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 22631  				continue
 22632  			}
 22633  			mask := v_2
 22634  			v.Reset(ssaop.OpARM64ZUMULHMergingH)
 22635  			v.AddArg3(y, x, mask)
 22636  			return true
 22637  		}
 22638  		break
 22639  	}
 22640  	// match: (ZSELH (ZUMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 22641  	// result: (ZUMULHMergingPrefixedH z x y mask)
 22642  	for {
 22643  		if v_0.Op != ssaop.OpARM64ZUMULHMergingH {
 22644  			break
 22645  		}
 22646  		_ = v_0.Args[2]
 22647  		x := v_0.Args[0]
 22648  		y := v_0.Args[1]
 22649  		v_0_2 := v_0.Args[2]
 22650  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22651  			break
 22652  		}
 22653  		v_0_2_0 := v_0_2.Args[0]
 22654  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 22655  			break
 22656  		}
 22657  		_ = v_0_2_0.Args[1]
 22658  		v_0_2_0_0 := v_0_2_0.Args[0]
 22659  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22660  			break
 22661  		}
 22662  		v_0_2_0_1 := v_0_2_0.Args[1]
 22663  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 22664  			break
 22665  		}
 22666  		z := v_1
 22667  		mask := v_2
 22668  		v.Reset(ssaop.OpARM64ZUMULHMergingPrefixedH)
 22669  		v.AddArg4(z, x, y, mask)
 22670  		return true
 22671  	}
 22672  	// match: (ZSELH (ZUQADDH x y) x mask)
 22673  	// result: (ZUQADDMergingH x y mask)
 22674  	for {
 22675  		if v_0.Op != ssaop.OpARM64ZUQADDH {
 22676  			break
 22677  		}
 22678  		_ = v_0.Args[1]
 22679  		v_0_0 := v_0.Args[0]
 22680  		v_0_1 := v_0.Args[1]
 22681  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22682  			x := v_0_0
 22683  			y := v_0_1
 22684  			if x != v_1 {
 22685  				continue
 22686  			}
 22687  			mask := v_2
 22688  			v.Reset(ssaop.OpARM64ZUQADDMergingH)
 22689  			v.AddArg3(x, y, mask)
 22690  			return true
 22691  		}
 22692  		break
 22693  	}
 22694  	// match: (ZSELH (ZUQADDH x y) y mask)
 22695  	// result: (ZUQADDMergingH y x mask)
 22696  	for {
 22697  		if v_0.Op != ssaop.OpARM64ZUQADDH {
 22698  			break
 22699  		}
 22700  		_ = v_0.Args[1]
 22701  		v_0_0 := v_0.Args[0]
 22702  		v_0_1 := v_0.Args[1]
 22703  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22704  			x := v_0_0
 22705  			y := v_0_1
 22706  			if y != v_1 {
 22707  				continue
 22708  			}
 22709  			mask := v_2
 22710  			v.Reset(ssaop.OpARM64ZUQADDMergingH)
 22711  			v.AddArg3(y, x, mask)
 22712  			return true
 22713  		}
 22714  		break
 22715  	}
 22716  	// match: (ZSELH (ZUQADDH x y) z mask)
 22717  	// result: (ZUQADDMergingPrefixedH z x y mask)
 22718  	for {
 22719  		if v_0.Op != ssaop.OpARM64ZUQADDH {
 22720  			break
 22721  		}
 22722  		y := v_0.Args[1]
 22723  		x := v_0.Args[0]
 22724  		z := v_1
 22725  		mask := v_2
 22726  		v.Reset(ssaop.OpARM64ZUQADDMergingPrefixedH)
 22727  		v.AddArg4(z, x, y, mask)
 22728  		return true
 22729  	}
 22730  	// match: (ZSELH (ZUQSUBH x y) x mask)
 22731  	// result: (ZUQSUBMergingH x y mask)
 22732  	for {
 22733  		if v_0.Op != ssaop.OpARM64ZUQSUBH {
 22734  			break
 22735  		}
 22736  		y := v_0.Args[1]
 22737  		x := v_0.Args[0]
 22738  		if x != v_1 {
 22739  			break
 22740  		}
 22741  		mask := v_2
 22742  		v.Reset(ssaop.OpARM64ZUQSUBMergingH)
 22743  		v.AddArg3(x, y, mask)
 22744  		return true
 22745  	}
 22746  	return false
 22747  }
 22748  func rewriteValue_OpARM64ZSELS(v *ssa.Value) bool {
 22749  	v_2 := v.Args[2]
 22750  	v_1 := v.Args[1]
 22751  	v_0 := v.Args[0]
 22752  	// match: (ZSELS (ZABSS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 22753  	// result: (ZABSMergingS z x mask)
 22754  	for {
 22755  		if v_0.Op != ssaop.OpARM64ZABSS {
 22756  			break
 22757  		}
 22758  		_ = v_0.Args[1]
 22759  		x := v_0.Args[0]
 22760  		v_0_1 := v_0.Args[1]
 22761  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 22762  			break
 22763  		}
 22764  		v_0_1_0 := v_0_1.Args[0]
 22765  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 22766  			break
 22767  		}
 22768  		_ = v_0_1_0.Args[1]
 22769  		v_0_1_0_0 := v_0_1_0.Args[0]
 22770  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 22771  			break
 22772  		}
 22773  		v_0_1_0_1 := v_0_1_0.Args[1]
 22774  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 22775  			break
 22776  		}
 22777  		z := v_1
 22778  		mask := v_2
 22779  		v.Reset(ssaop.OpARM64ZABSMergingS)
 22780  		v.AddArg3(z, x, mask)
 22781  		return true
 22782  	}
 22783  	// match: (ZSELS (ZADDS x y) x mask)
 22784  	// result: (ZADDMergingS x y mask)
 22785  	for {
 22786  		if v_0.Op != ssaop.OpARM64ZADDS {
 22787  			break
 22788  		}
 22789  		_ = v_0.Args[1]
 22790  		v_0_0 := v_0.Args[0]
 22791  		v_0_1 := v_0.Args[1]
 22792  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22793  			x := v_0_0
 22794  			y := v_0_1
 22795  			if x != v_1 {
 22796  				continue
 22797  			}
 22798  			mask := v_2
 22799  			v.Reset(ssaop.OpARM64ZADDMergingS)
 22800  			v.AddArg3(x, y, mask)
 22801  			return true
 22802  		}
 22803  		break
 22804  	}
 22805  	// match: (ZSELS (ZADDS x y) y mask)
 22806  	// result: (ZADDMergingS y x mask)
 22807  	for {
 22808  		if v_0.Op != ssaop.OpARM64ZADDS {
 22809  			break
 22810  		}
 22811  		_ = v_0.Args[1]
 22812  		v_0_0 := v_0.Args[0]
 22813  		v_0_1 := v_0.Args[1]
 22814  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22815  			x := v_0_0
 22816  			y := v_0_1
 22817  			if y != v_1 {
 22818  				continue
 22819  			}
 22820  			mask := v_2
 22821  			v.Reset(ssaop.OpARM64ZADDMergingS)
 22822  			v.AddArg3(y, x, mask)
 22823  			return true
 22824  		}
 22825  		break
 22826  	}
 22827  	// match: (ZSELS (ZADDS x y) z mask)
 22828  	// result: (ZADDMergingPrefixedS z x y mask)
 22829  	for {
 22830  		if v_0.Op != ssaop.OpARM64ZADDS {
 22831  			break
 22832  		}
 22833  		y := v_0.Args[1]
 22834  		x := v_0.Args[0]
 22835  		z := v_1
 22836  		mask := v_2
 22837  		v.Reset(ssaop.OpARM64ZADDMergingPrefixedS)
 22838  		v.AddArg4(z, x, y, mask)
 22839  		return true
 22840  	}
 22841  	// match: (ZSELS (ZANDD x y) x mask)
 22842  	// result: (ZANDMergingS x y mask)
 22843  	for {
 22844  		if v_0.Op != ssaop.OpARM64ZANDD {
 22845  			break
 22846  		}
 22847  		_ = v_0.Args[1]
 22848  		v_0_0 := v_0.Args[0]
 22849  		v_0_1 := v_0.Args[1]
 22850  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22851  			x := v_0_0
 22852  			y := v_0_1
 22853  			if x != v_1 {
 22854  				continue
 22855  			}
 22856  			mask := v_2
 22857  			v.Reset(ssaop.OpARM64ZANDMergingS)
 22858  			v.AddArg3(x, y, mask)
 22859  			return true
 22860  		}
 22861  		break
 22862  	}
 22863  	// match: (ZSELS (ZANDD x y) y mask)
 22864  	// result: (ZANDMergingS y x mask)
 22865  	for {
 22866  		if v_0.Op != ssaop.OpARM64ZANDD {
 22867  			break
 22868  		}
 22869  		_ = v_0.Args[1]
 22870  		v_0_0 := v_0.Args[0]
 22871  		v_0_1 := v_0.Args[1]
 22872  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22873  			x := v_0_0
 22874  			y := v_0_1
 22875  			if y != v_1 {
 22876  				continue
 22877  			}
 22878  			mask := v_2
 22879  			v.Reset(ssaop.OpARM64ZANDMergingS)
 22880  			v.AddArg3(y, x, mask)
 22881  			return true
 22882  		}
 22883  		break
 22884  	}
 22885  	// match: (ZSELS (ZANDD x y) z mask)
 22886  	// result: (ZANDMergingPrefixedS z x y mask)
 22887  	for {
 22888  		if v_0.Op != ssaop.OpARM64ZANDD {
 22889  			break
 22890  		}
 22891  		y := v_0.Args[1]
 22892  		x := v_0.Args[0]
 22893  		z := v_1
 22894  		mask := v_2
 22895  		v.Reset(ssaop.OpARM64ZANDMergingPrefixedS)
 22896  		v.AddArg4(z, x, y, mask)
 22897  		return true
 22898  	}
 22899  	// match: (ZSELS (ZBICD x y) x mask)
 22900  	// result: (ZBICMergingS x y mask)
 22901  	for {
 22902  		if v_0.Op != ssaop.OpARM64ZBICD {
 22903  			break
 22904  		}
 22905  		y := v_0.Args[1]
 22906  		x := v_0.Args[0]
 22907  		if x != v_1 {
 22908  			break
 22909  		}
 22910  		mask := v_2
 22911  		v.Reset(ssaop.OpARM64ZBICMergingS)
 22912  		v.AddArg3(x, y, mask)
 22913  		return true
 22914  	}
 22915  	// match: (ZSELS (ZEORD x y) x mask)
 22916  	// result: (ZEORMergingS x y mask)
 22917  	for {
 22918  		if v_0.Op != ssaop.OpARM64ZEORD {
 22919  			break
 22920  		}
 22921  		_ = v_0.Args[1]
 22922  		v_0_0 := v_0.Args[0]
 22923  		v_0_1 := v_0.Args[1]
 22924  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22925  			x := v_0_0
 22926  			y := v_0_1
 22927  			if x != v_1 {
 22928  				continue
 22929  			}
 22930  			mask := v_2
 22931  			v.Reset(ssaop.OpARM64ZEORMergingS)
 22932  			v.AddArg3(x, y, mask)
 22933  			return true
 22934  		}
 22935  		break
 22936  	}
 22937  	// match: (ZSELS (ZEORD x y) y mask)
 22938  	// result: (ZEORMergingS y x mask)
 22939  	for {
 22940  		if v_0.Op != ssaop.OpARM64ZEORD {
 22941  			break
 22942  		}
 22943  		_ = v_0.Args[1]
 22944  		v_0_0 := v_0.Args[0]
 22945  		v_0_1 := v_0.Args[1]
 22946  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22947  			x := v_0_0
 22948  			y := v_0_1
 22949  			if y != v_1 {
 22950  				continue
 22951  			}
 22952  			mask := v_2
 22953  			v.Reset(ssaop.OpARM64ZEORMergingS)
 22954  			v.AddArg3(y, x, mask)
 22955  			return true
 22956  		}
 22957  		break
 22958  	}
 22959  	// match: (ZSELS (ZEORD x y) z mask)
 22960  	// result: (ZEORMergingPrefixedS z x y mask)
 22961  	for {
 22962  		if v_0.Op != ssaop.OpARM64ZEORD {
 22963  			break
 22964  		}
 22965  		y := v_0.Args[1]
 22966  		x := v_0.Args[0]
 22967  		z := v_1
 22968  		mask := v_2
 22969  		v.Reset(ssaop.OpARM64ZEORMergingPrefixedS)
 22970  		v.AddArg4(z, x, y, mask)
 22971  		return true
 22972  	}
 22973  	// match: (ZSELS (ZFABSS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 22974  	// result: (ZFABSMergingS z x mask)
 22975  	for {
 22976  		if v_0.Op != ssaop.OpARM64ZFABSS {
 22977  			break
 22978  		}
 22979  		_ = v_0.Args[1]
 22980  		x := v_0.Args[0]
 22981  		v_0_1 := v_0.Args[1]
 22982  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 22983  			break
 22984  		}
 22985  		v_0_1_0 := v_0_1.Args[0]
 22986  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 22987  			break
 22988  		}
 22989  		_ = v_0_1_0.Args[1]
 22990  		v_0_1_0_0 := v_0_1_0.Args[0]
 22991  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 22992  			break
 22993  		}
 22994  		v_0_1_0_1 := v_0_1_0.Args[1]
 22995  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 22996  			break
 22997  		}
 22998  		z := v_1
 22999  		mask := v_2
 23000  		v.Reset(ssaop.OpARM64ZFABSMergingS)
 23001  		v.AddArg3(z, x, mask)
 23002  		return true
 23003  	}
 23004  	// match: (ZSELS (ZFADDS x y) x mask)
 23005  	// result: (ZFADDMergingS x y mask)
 23006  	for {
 23007  		if v_0.Op != ssaop.OpARM64ZFADDS {
 23008  			break
 23009  		}
 23010  		_ = v_0.Args[1]
 23011  		v_0_0 := v_0.Args[0]
 23012  		v_0_1 := v_0.Args[1]
 23013  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23014  			x := v_0_0
 23015  			y := v_0_1
 23016  			if x != v_1 {
 23017  				continue
 23018  			}
 23019  			mask := v_2
 23020  			v.Reset(ssaop.OpARM64ZFADDMergingS)
 23021  			v.AddArg3(x, y, mask)
 23022  			return true
 23023  		}
 23024  		break
 23025  	}
 23026  	// match: (ZSELS (ZFADDS x y) y mask)
 23027  	// result: (ZFADDMergingS y x mask)
 23028  	for {
 23029  		if v_0.Op != ssaop.OpARM64ZFADDS {
 23030  			break
 23031  		}
 23032  		_ = v_0.Args[1]
 23033  		v_0_0 := v_0.Args[0]
 23034  		v_0_1 := v_0.Args[1]
 23035  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23036  			x := v_0_0
 23037  			y := v_0_1
 23038  			if y != v_1 {
 23039  				continue
 23040  			}
 23041  			mask := v_2
 23042  			v.Reset(ssaop.OpARM64ZFADDMergingS)
 23043  			v.AddArg3(y, x, mask)
 23044  			return true
 23045  		}
 23046  		break
 23047  	}
 23048  	// match: (ZSELS (ZFADDS x y) z mask)
 23049  	// result: (ZFADDMergingPrefixedS z x y mask)
 23050  	for {
 23051  		if v_0.Op != ssaop.OpARM64ZFADDS {
 23052  			break
 23053  		}
 23054  		y := v_0.Args[1]
 23055  		x := v_0.Args[0]
 23056  		z := v_1
 23057  		mask := v_2
 23058  		v.Reset(ssaop.OpARM64ZFADDMergingPrefixedS)
 23059  		v.AddArg4(z, x, y, mask)
 23060  		return true
 23061  	}
 23062  	// match: (ZSELS (ZFMULS x y) x mask)
 23063  	// result: (ZFMULMergingS x y mask)
 23064  	for {
 23065  		if v_0.Op != ssaop.OpARM64ZFMULS {
 23066  			break
 23067  		}
 23068  		_ = v_0.Args[1]
 23069  		v_0_0 := v_0.Args[0]
 23070  		v_0_1 := v_0.Args[1]
 23071  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23072  			x := v_0_0
 23073  			y := v_0_1
 23074  			if x != v_1 {
 23075  				continue
 23076  			}
 23077  			mask := v_2
 23078  			v.Reset(ssaop.OpARM64ZFMULMergingS)
 23079  			v.AddArg3(x, y, mask)
 23080  			return true
 23081  		}
 23082  		break
 23083  	}
 23084  	// match: (ZSELS (ZFMULS x y) y mask)
 23085  	// result: (ZFMULMergingS y x mask)
 23086  	for {
 23087  		if v_0.Op != ssaop.OpARM64ZFMULS {
 23088  			break
 23089  		}
 23090  		_ = v_0.Args[1]
 23091  		v_0_0 := v_0.Args[0]
 23092  		v_0_1 := v_0.Args[1]
 23093  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23094  			x := v_0_0
 23095  			y := v_0_1
 23096  			if y != v_1 {
 23097  				continue
 23098  			}
 23099  			mask := v_2
 23100  			v.Reset(ssaop.OpARM64ZFMULMergingS)
 23101  			v.AddArg3(y, x, mask)
 23102  			return true
 23103  		}
 23104  		break
 23105  	}
 23106  	// match: (ZSELS (ZFMULS x y) z mask)
 23107  	// result: (ZFMULMergingPrefixedS z x y mask)
 23108  	for {
 23109  		if v_0.Op != ssaop.OpARM64ZFMULS {
 23110  			break
 23111  		}
 23112  		y := v_0.Args[1]
 23113  		x := v_0.Args[0]
 23114  		z := v_1
 23115  		mask := v_2
 23116  		v.Reset(ssaop.OpARM64ZFMULMergingPrefixedS)
 23117  		v.AddArg4(z, x, y, mask)
 23118  		return true
 23119  	}
 23120  	// match: (ZSELS (ZFNEGS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 23121  	// result: (ZFNEGMergingS z x mask)
 23122  	for {
 23123  		if v_0.Op != ssaop.OpARM64ZFNEGS {
 23124  			break
 23125  		}
 23126  		_ = v_0.Args[1]
 23127  		x := v_0.Args[0]
 23128  		v_0_1 := v_0.Args[1]
 23129  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 23130  			break
 23131  		}
 23132  		v_0_1_0 := v_0_1.Args[0]
 23133  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 23134  			break
 23135  		}
 23136  		_ = v_0_1_0.Args[1]
 23137  		v_0_1_0_0 := v_0_1_0.Args[0]
 23138  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 23139  			break
 23140  		}
 23141  		v_0_1_0_1 := v_0_1_0.Args[1]
 23142  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 23143  			break
 23144  		}
 23145  		z := v_1
 23146  		mask := v_2
 23147  		v.Reset(ssaop.OpARM64ZFNEGMergingS)
 23148  		v.AddArg3(z, x, mask)
 23149  		return true
 23150  	}
 23151  	// match: (ZSELS (ZFSQRTS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 23152  	// result: (ZFSQRTMergingS z x mask)
 23153  	for {
 23154  		if v_0.Op != ssaop.OpARM64ZFSQRTS {
 23155  			break
 23156  		}
 23157  		_ = v_0.Args[1]
 23158  		x := v_0.Args[0]
 23159  		v_0_1 := v_0.Args[1]
 23160  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 23161  			break
 23162  		}
 23163  		v_0_1_0 := v_0_1.Args[0]
 23164  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 23165  			break
 23166  		}
 23167  		_ = v_0_1_0.Args[1]
 23168  		v_0_1_0_0 := v_0_1_0.Args[0]
 23169  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 23170  			break
 23171  		}
 23172  		v_0_1_0_1 := v_0_1_0.Args[1]
 23173  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 23174  			break
 23175  		}
 23176  		z := v_1
 23177  		mask := v_2
 23178  		v.Reset(ssaop.OpARM64ZFSQRTMergingS)
 23179  		v.AddArg3(z, x, mask)
 23180  		return true
 23181  	}
 23182  	// match: (ZSELS (ZFSUBS x y) x mask)
 23183  	// result: (ZFSUBMergingS x y mask)
 23184  	for {
 23185  		if v_0.Op != ssaop.OpARM64ZFSUBS {
 23186  			break
 23187  		}
 23188  		y := v_0.Args[1]
 23189  		x := v_0.Args[0]
 23190  		if x != v_1 {
 23191  			break
 23192  		}
 23193  		mask := v_2
 23194  		v.Reset(ssaop.OpARM64ZFSUBMergingS)
 23195  		v.AddArg3(x, y, mask)
 23196  		return true
 23197  	}
 23198  	// match: (ZSELS (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 23199  	// result: (ZMULMergingS x y mask)
 23200  	for {
 23201  		if v_0.Op != ssaop.OpARM64ZMULMergingS {
 23202  			break
 23203  		}
 23204  		_ = v_0.Args[2]
 23205  		v_0_0 := v_0.Args[0]
 23206  		v_0_1 := v_0.Args[1]
 23207  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23208  			x := v_0_0
 23209  			y := v_0_1
 23210  			v_0_2 := v_0.Args[2]
 23211  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23212  				continue
 23213  			}
 23214  			v_0_2_0 := v_0_2.Args[0]
 23215  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 23216  				continue
 23217  			}
 23218  			_ = v_0_2_0.Args[1]
 23219  			v_0_2_0_0 := v_0_2_0.Args[0]
 23220  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23221  				continue
 23222  			}
 23223  			v_0_2_0_1 := v_0_2_0.Args[1]
 23224  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 23225  				continue
 23226  			}
 23227  			mask := v_2
 23228  			v.Reset(ssaop.OpARM64ZMULMergingS)
 23229  			v.AddArg3(x, y, mask)
 23230  			return true
 23231  		}
 23232  		break
 23233  	}
 23234  	// match: (ZSELS (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 23235  	// result: (ZMULMergingS y x mask)
 23236  	for {
 23237  		if v_0.Op != ssaop.OpARM64ZMULMergingS {
 23238  			break
 23239  		}
 23240  		_ = v_0.Args[2]
 23241  		v_0_0 := v_0.Args[0]
 23242  		v_0_1 := v_0.Args[1]
 23243  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23244  			x := v_0_0
 23245  			y := v_0_1
 23246  			v_0_2 := v_0.Args[2]
 23247  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23248  				continue
 23249  			}
 23250  			v_0_2_0 := v_0_2.Args[0]
 23251  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 23252  				continue
 23253  			}
 23254  			_ = v_0_2_0.Args[1]
 23255  			v_0_2_0_0 := v_0_2_0.Args[0]
 23256  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23257  				continue
 23258  			}
 23259  			v_0_2_0_1 := v_0_2_0.Args[1]
 23260  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 23261  				continue
 23262  			}
 23263  			mask := v_2
 23264  			v.Reset(ssaop.OpARM64ZMULMergingS)
 23265  			v.AddArg3(y, x, mask)
 23266  			return true
 23267  		}
 23268  		break
 23269  	}
 23270  	// match: (ZSELS (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 23271  	// result: (ZMULMergingPrefixedS z x y mask)
 23272  	for {
 23273  		if v_0.Op != ssaop.OpARM64ZMULMergingS {
 23274  			break
 23275  		}
 23276  		_ = v_0.Args[2]
 23277  		x := v_0.Args[0]
 23278  		y := v_0.Args[1]
 23279  		v_0_2 := v_0.Args[2]
 23280  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23281  			break
 23282  		}
 23283  		v_0_2_0 := v_0_2.Args[0]
 23284  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 23285  			break
 23286  		}
 23287  		_ = v_0_2_0.Args[1]
 23288  		v_0_2_0_0 := v_0_2_0.Args[0]
 23289  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23290  			break
 23291  		}
 23292  		v_0_2_0_1 := v_0_2_0.Args[1]
 23293  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 23294  			break
 23295  		}
 23296  		z := v_1
 23297  		mask := v_2
 23298  		v.Reset(ssaop.OpARM64ZMULMergingPrefixedS)
 23299  		v.AddArg4(z, x, y, mask)
 23300  		return true
 23301  	}
 23302  	// match: (ZSELS (ZNEGS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 23303  	// result: (ZNEGMergingS z x mask)
 23304  	for {
 23305  		if v_0.Op != ssaop.OpARM64ZNEGS {
 23306  			break
 23307  		}
 23308  		_ = v_0.Args[1]
 23309  		x := v_0.Args[0]
 23310  		v_0_1 := v_0.Args[1]
 23311  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 23312  			break
 23313  		}
 23314  		v_0_1_0 := v_0_1.Args[0]
 23315  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 23316  			break
 23317  		}
 23318  		_ = v_0_1_0.Args[1]
 23319  		v_0_1_0_0 := v_0_1_0.Args[0]
 23320  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 23321  			break
 23322  		}
 23323  		v_0_1_0_1 := v_0_1_0.Args[1]
 23324  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 23325  			break
 23326  		}
 23327  		z := v_1
 23328  		mask := v_2
 23329  		v.Reset(ssaop.OpARM64ZNEGMergingS)
 23330  		v.AddArg3(z, x, mask)
 23331  		return true
 23332  	}
 23333  	// match: (ZSELS (ZORRD x y) x mask)
 23334  	// result: (ZORRMergingS x y mask)
 23335  	for {
 23336  		if v_0.Op != ssaop.OpARM64ZORRD {
 23337  			break
 23338  		}
 23339  		_ = v_0.Args[1]
 23340  		v_0_0 := v_0.Args[0]
 23341  		v_0_1 := v_0.Args[1]
 23342  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23343  			x := v_0_0
 23344  			y := v_0_1
 23345  			if x != v_1 {
 23346  				continue
 23347  			}
 23348  			mask := v_2
 23349  			v.Reset(ssaop.OpARM64ZORRMergingS)
 23350  			v.AddArg3(x, y, mask)
 23351  			return true
 23352  		}
 23353  		break
 23354  	}
 23355  	// match: (ZSELS (ZORRD x y) y mask)
 23356  	// result: (ZORRMergingS y x mask)
 23357  	for {
 23358  		if v_0.Op != ssaop.OpARM64ZORRD {
 23359  			break
 23360  		}
 23361  		_ = v_0.Args[1]
 23362  		v_0_0 := v_0.Args[0]
 23363  		v_0_1 := v_0.Args[1]
 23364  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23365  			x := v_0_0
 23366  			y := v_0_1
 23367  			if y != v_1 {
 23368  				continue
 23369  			}
 23370  			mask := v_2
 23371  			v.Reset(ssaop.OpARM64ZORRMergingS)
 23372  			v.AddArg3(y, x, mask)
 23373  			return true
 23374  		}
 23375  		break
 23376  	}
 23377  	// match: (ZSELS (ZORRD x y) z mask)
 23378  	// result: (ZORRMergingPrefixedS z x y mask)
 23379  	for {
 23380  		if v_0.Op != ssaop.OpARM64ZORRD {
 23381  			break
 23382  		}
 23383  		y := v_0.Args[1]
 23384  		x := v_0.Args[0]
 23385  		z := v_1
 23386  		mask := v_2
 23387  		v.Reset(ssaop.OpARM64ZORRMergingPrefixedS)
 23388  		v.AddArg4(z, x, y, mask)
 23389  		return true
 23390  	}
 23391  	// match: (ZSELS (ZSMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 23392  	// result: (ZSMULHMergingS x y mask)
 23393  	for {
 23394  		if v_0.Op != ssaop.OpARM64ZSMULHMergingS {
 23395  			break
 23396  		}
 23397  		_ = v_0.Args[2]
 23398  		v_0_0 := v_0.Args[0]
 23399  		v_0_1 := v_0.Args[1]
 23400  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23401  			x := v_0_0
 23402  			y := v_0_1
 23403  			v_0_2 := v_0.Args[2]
 23404  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23405  				continue
 23406  			}
 23407  			v_0_2_0 := v_0_2.Args[0]
 23408  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 23409  				continue
 23410  			}
 23411  			_ = v_0_2_0.Args[1]
 23412  			v_0_2_0_0 := v_0_2_0.Args[0]
 23413  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23414  				continue
 23415  			}
 23416  			v_0_2_0_1 := v_0_2_0.Args[1]
 23417  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 23418  				continue
 23419  			}
 23420  			mask := v_2
 23421  			v.Reset(ssaop.OpARM64ZSMULHMergingS)
 23422  			v.AddArg3(x, y, mask)
 23423  			return true
 23424  		}
 23425  		break
 23426  	}
 23427  	// match: (ZSELS (ZSMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 23428  	// result: (ZSMULHMergingS y x mask)
 23429  	for {
 23430  		if v_0.Op != ssaop.OpARM64ZSMULHMergingS {
 23431  			break
 23432  		}
 23433  		_ = v_0.Args[2]
 23434  		v_0_0 := v_0.Args[0]
 23435  		v_0_1 := v_0.Args[1]
 23436  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23437  			x := v_0_0
 23438  			y := v_0_1
 23439  			v_0_2 := v_0.Args[2]
 23440  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23441  				continue
 23442  			}
 23443  			v_0_2_0 := v_0_2.Args[0]
 23444  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 23445  				continue
 23446  			}
 23447  			_ = v_0_2_0.Args[1]
 23448  			v_0_2_0_0 := v_0_2_0.Args[0]
 23449  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23450  				continue
 23451  			}
 23452  			v_0_2_0_1 := v_0_2_0.Args[1]
 23453  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 23454  				continue
 23455  			}
 23456  			mask := v_2
 23457  			v.Reset(ssaop.OpARM64ZSMULHMergingS)
 23458  			v.AddArg3(y, x, mask)
 23459  			return true
 23460  		}
 23461  		break
 23462  	}
 23463  	// match: (ZSELS (ZSMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 23464  	// result: (ZSMULHMergingPrefixedS z x y mask)
 23465  	for {
 23466  		if v_0.Op != ssaop.OpARM64ZSMULHMergingS {
 23467  			break
 23468  		}
 23469  		_ = v_0.Args[2]
 23470  		x := v_0.Args[0]
 23471  		y := v_0.Args[1]
 23472  		v_0_2 := v_0.Args[2]
 23473  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23474  			break
 23475  		}
 23476  		v_0_2_0 := v_0_2.Args[0]
 23477  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 23478  			break
 23479  		}
 23480  		_ = v_0_2_0.Args[1]
 23481  		v_0_2_0_0 := v_0_2_0.Args[0]
 23482  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23483  			break
 23484  		}
 23485  		v_0_2_0_1 := v_0_2_0.Args[1]
 23486  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 23487  			break
 23488  		}
 23489  		z := v_1
 23490  		mask := v_2
 23491  		v.Reset(ssaop.OpARM64ZSMULHMergingPrefixedS)
 23492  		v.AddArg4(z, x, y, mask)
 23493  		return true
 23494  	}
 23495  	// match: (ZSELS (ZSQADDS x y) x mask)
 23496  	// result: (ZSQADDMergingS x y mask)
 23497  	for {
 23498  		if v_0.Op != ssaop.OpARM64ZSQADDS {
 23499  			break
 23500  		}
 23501  		_ = v_0.Args[1]
 23502  		v_0_0 := v_0.Args[0]
 23503  		v_0_1 := v_0.Args[1]
 23504  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23505  			x := v_0_0
 23506  			y := v_0_1
 23507  			if x != v_1 {
 23508  				continue
 23509  			}
 23510  			mask := v_2
 23511  			v.Reset(ssaop.OpARM64ZSQADDMergingS)
 23512  			v.AddArg3(x, y, mask)
 23513  			return true
 23514  		}
 23515  		break
 23516  	}
 23517  	// match: (ZSELS (ZSQADDS x y) y mask)
 23518  	// result: (ZSQADDMergingS y x mask)
 23519  	for {
 23520  		if v_0.Op != ssaop.OpARM64ZSQADDS {
 23521  			break
 23522  		}
 23523  		_ = v_0.Args[1]
 23524  		v_0_0 := v_0.Args[0]
 23525  		v_0_1 := v_0.Args[1]
 23526  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23527  			x := v_0_0
 23528  			y := v_0_1
 23529  			if y != v_1 {
 23530  				continue
 23531  			}
 23532  			mask := v_2
 23533  			v.Reset(ssaop.OpARM64ZSQADDMergingS)
 23534  			v.AddArg3(y, x, mask)
 23535  			return true
 23536  		}
 23537  		break
 23538  	}
 23539  	// match: (ZSELS (ZSQADDS x y) z mask)
 23540  	// result: (ZSQADDMergingPrefixedS z x y mask)
 23541  	for {
 23542  		if v_0.Op != ssaop.OpARM64ZSQADDS {
 23543  			break
 23544  		}
 23545  		y := v_0.Args[1]
 23546  		x := v_0.Args[0]
 23547  		z := v_1
 23548  		mask := v_2
 23549  		v.Reset(ssaop.OpARM64ZSQADDMergingPrefixedS)
 23550  		v.AddArg4(z, x, y, mask)
 23551  		return true
 23552  	}
 23553  	// match: (ZSELS (ZSQSUBS x y) x mask)
 23554  	// result: (ZSQSUBMergingS x y mask)
 23555  	for {
 23556  		if v_0.Op != ssaop.OpARM64ZSQSUBS {
 23557  			break
 23558  		}
 23559  		y := v_0.Args[1]
 23560  		x := v_0.Args[0]
 23561  		if x != v_1 {
 23562  			break
 23563  		}
 23564  		mask := v_2
 23565  		v.Reset(ssaop.OpARM64ZSQSUBMergingS)
 23566  		v.AddArg3(x, y, mask)
 23567  		return true
 23568  	}
 23569  	// match: (ZSELS (ZSUBS x y) x mask)
 23570  	// result: (ZSUBMergingS x y mask)
 23571  	for {
 23572  		if v_0.Op != ssaop.OpARM64ZSUBS {
 23573  			break
 23574  		}
 23575  		y := v_0.Args[1]
 23576  		x := v_0.Args[0]
 23577  		if x != v_1 {
 23578  			break
 23579  		}
 23580  		mask := v_2
 23581  		v.Reset(ssaop.OpARM64ZSUBMergingS)
 23582  		v.AddArg3(x, y, mask)
 23583  		return true
 23584  	}
 23585  	// match: (ZSELS (ZUMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 23586  	// result: (ZUMULHMergingS x y mask)
 23587  	for {
 23588  		if v_0.Op != ssaop.OpARM64ZUMULHMergingS {
 23589  			break
 23590  		}
 23591  		_ = v_0.Args[2]
 23592  		v_0_0 := v_0.Args[0]
 23593  		v_0_1 := v_0.Args[1]
 23594  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23595  			x := v_0_0
 23596  			y := v_0_1
 23597  			v_0_2 := v_0.Args[2]
 23598  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23599  				continue
 23600  			}
 23601  			v_0_2_0 := v_0_2.Args[0]
 23602  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 23603  				continue
 23604  			}
 23605  			_ = v_0_2_0.Args[1]
 23606  			v_0_2_0_0 := v_0_2_0.Args[0]
 23607  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23608  				continue
 23609  			}
 23610  			v_0_2_0_1 := v_0_2_0.Args[1]
 23611  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 23612  				continue
 23613  			}
 23614  			mask := v_2
 23615  			v.Reset(ssaop.OpARM64ZUMULHMergingS)
 23616  			v.AddArg3(x, y, mask)
 23617  			return true
 23618  		}
 23619  		break
 23620  	}
 23621  	// match: (ZSELS (ZUMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 23622  	// result: (ZUMULHMergingS y x mask)
 23623  	for {
 23624  		if v_0.Op != ssaop.OpARM64ZUMULHMergingS {
 23625  			break
 23626  		}
 23627  		_ = v_0.Args[2]
 23628  		v_0_0 := v_0.Args[0]
 23629  		v_0_1 := v_0.Args[1]
 23630  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23631  			x := v_0_0
 23632  			y := v_0_1
 23633  			v_0_2 := v_0.Args[2]
 23634  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23635  				continue
 23636  			}
 23637  			v_0_2_0 := v_0_2.Args[0]
 23638  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 23639  				continue
 23640  			}
 23641  			_ = v_0_2_0.Args[1]
 23642  			v_0_2_0_0 := v_0_2_0.Args[0]
 23643  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23644  				continue
 23645  			}
 23646  			v_0_2_0_1 := v_0_2_0.Args[1]
 23647  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 23648  				continue
 23649  			}
 23650  			mask := v_2
 23651  			v.Reset(ssaop.OpARM64ZUMULHMergingS)
 23652  			v.AddArg3(y, x, mask)
 23653  			return true
 23654  		}
 23655  		break
 23656  	}
 23657  	// match: (ZSELS (ZUMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 23658  	// result: (ZUMULHMergingPrefixedS z x y mask)
 23659  	for {
 23660  		if v_0.Op != ssaop.OpARM64ZUMULHMergingS {
 23661  			break
 23662  		}
 23663  		_ = v_0.Args[2]
 23664  		x := v_0.Args[0]
 23665  		y := v_0.Args[1]
 23666  		v_0_2 := v_0.Args[2]
 23667  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23668  			break
 23669  		}
 23670  		v_0_2_0 := v_0_2.Args[0]
 23671  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 23672  			break
 23673  		}
 23674  		_ = v_0_2_0.Args[1]
 23675  		v_0_2_0_0 := v_0_2_0.Args[0]
 23676  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23677  			break
 23678  		}
 23679  		v_0_2_0_1 := v_0_2_0.Args[1]
 23680  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 23681  			break
 23682  		}
 23683  		z := v_1
 23684  		mask := v_2
 23685  		v.Reset(ssaop.OpARM64ZUMULHMergingPrefixedS)
 23686  		v.AddArg4(z, x, y, mask)
 23687  		return true
 23688  	}
 23689  	// match: (ZSELS (ZUQADDS x y) x mask)
 23690  	// result: (ZUQADDMergingS x y mask)
 23691  	for {
 23692  		if v_0.Op != ssaop.OpARM64ZUQADDS {
 23693  			break
 23694  		}
 23695  		_ = v_0.Args[1]
 23696  		v_0_0 := v_0.Args[0]
 23697  		v_0_1 := v_0.Args[1]
 23698  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23699  			x := v_0_0
 23700  			y := v_0_1
 23701  			if x != v_1 {
 23702  				continue
 23703  			}
 23704  			mask := v_2
 23705  			v.Reset(ssaop.OpARM64ZUQADDMergingS)
 23706  			v.AddArg3(x, y, mask)
 23707  			return true
 23708  		}
 23709  		break
 23710  	}
 23711  	// match: (ZSELS (ZUQADDS x y) y mask)
 23712  	// result: (ZUQADDMergingS y x mask)
 23713  	for {
 23714  		if v_0.Op != ssaop.OpARM64ZUQADDS {
 23715  			break
 23716  		}
 23717  		_ = v_0.Args[1]
 23718  		v_0_0 := v_0.Args[0]
 23719  		v_0_1 := v_0.Args[1]
 23720  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23721  			x := v_0_0
 23722  			y := v_0_1
 23723  			if y != v_1 {
 23724  				continue
 23725  			}
 23726  			mask := v_2
 23727  			v.Reset(ssaop.OpARM64ZUQADDMergingS)
 23728  			v.AddArg3(y, x, mask)
 23729  			return true
 23730  		}
 23731  		break
 23732  	}
 23733  	// match: (ZSELS (ZUQADDS x y) z mask)
 23734  	// result: (ZUQADDMergingPrefixedS z x y mask)
 23735  	for {
 23736  		if v_0.Op != ssaop.OpARM64ZUQADDS {
 23737  			break
 23738  		}
 23739  		y := v_0.Args[1]
 23740  		x := v_0.Args[0]
 23741  		z := v_1
 23742  		mask := v_2
 23743  		v.Reset(ssaop.OpARM64ZUQADDMergingPrefixedS)
 23744  		v.AddArg4(z, x, y, mask)
 23745  		return true
 23746  	}
 23747  	// match: (ZSELS (ZUQSUBS x y) x mask)
 23748  	// result: (ZUQSUBMergingS x y mask)
 23749  	for {
 23750  		if v_0.Op != ssaop.OpARM64ZUQSUBS {
 23751  			break
 23752  		}
 23753  		y := v_0.Args[1]
 23754  		x := v_0.Args[0]
 23755  		if x != v_1 {
 23756  			break
 23757  		}
 23758  		mask := v_2
 23759  		v.Reset(ssaop.OpARM64ZUQSUBMergingS)
 23760  		v.AddArg3(x, y, mask)
 23761  		return true
 23762  	}
 23763  	return false
 23764  }
 23765  func rewriteValue_OpAbsFloat32s(v *ssa.Value) bool {
 23766  	v_0 := v.Args[0]
 23767  	b := v.Block
 23768  	typ := &b.Func.Config.Types
 23769  	// match: (AbsFloat32s x)
 23770  	// result: (ZFABSS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 23771  	for {
 23772  		x := v_0
 23773  		v.Reset(ssaop.OpARM64ZFABSS)
 23774  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 23775  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 23776  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23777  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 23778  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23779  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 23780  		v1.AddArg2(v2, v3)
 23781  		v0.AddArg(v1)
 23782  		v.AddArg2(x, v0)
 23783  		return true
 23784  	}
 23785  }
 23786  func rewriteValue_OpAbsFloat64s(v *ssa.Value) bool {
 23787  	v_0 := v.Args[0]
 23788  	b := v.Block
 23789  	typ := &b.Func.Config.Types
 23790  	// match: (AbsFloat64s x)
 23791  	// result: (ZFABSD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 23792  	for {
 23793  		x := v_0
 23794  		v.Reset(ssaop.OpARM64ZFABSD)
 23795  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 23796  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 23797  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23798  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 23799  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23800  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 23801  		v1.AddArg2(v2, v3)
 23802  		v0.AddArg(v1)
 23803  		v.AddArg2(x, v0)
 23804  		return true
 23805  	}
 23806  }
 23807  func rewriteValue_OpAbsInt16s(v *ssa.Value) bool {
 23808  	v_0 := v.Args[0]
 23809  	b := v.Block
 23810  	typ := &b.Func.Config.Types
 23811  	// match: (AbsInt16s x)
 23812  	// result: (ZABSH x (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 23813  	for {
 23814  		x := v_0
 23815  		v.Reset(ssaop.OpARM64ZABSH)
 23816  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 23817  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 23818  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23819  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 23820  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23821  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 23822  		v1.AddArg2(v2, v3)
 23823  		v0.AddArg(v1)
 23824  		v.AddArg2(x, v0)
 23825  		return true
 23826  	}
 23827  }
 23828  func rewriteValue_OpAbsInt32s(v *ssa.Value) bool {
 23829  	v_0 := v.Args[0]
 23830  	b := v.Block
 23831  	typ := &b.Func.Config.Types
 23832  	// match: (AbsInt32s x)
 23833  	// result: (ZABSS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 23834  	for {
 23835  		x := v_0
 23836  		v.Reset(ssaop.OpARM64ZABSS)
 23837  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 23838  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 23839  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23840  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 23841  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23842  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 23843  		v1.AddArg2(v2, v3)
 23844  		v0.AddArg(v1)
 23845  		v.AddArg2(x, v0)
 23846  		return true
 23847  	}
 23848  }
 23849  func rewriteValue_OpAbsInt64s(v *ssa.Value) bool {
 23850  	v_0 := v.Args[0]
 23851  	b := v.Block
 23852  	typ := &b.Func.Config.Types
 23853  	// match: (AbsInt64s x)
 23854  	// result: (ZABSD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 23855  	for {
 23856  		x := v_0
 23857  		v.Reset(ssaop.OpARM64ZABSD)
 23858  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 23859  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 23860  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23861  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 23862  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23863  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 23864  		v1.AddArg2(v2, v3)
 23865  		v0.AddArg(v1)
 23866  		v.AddArg2(x, v0)
 23867  		return true
 23868  	}
 23869  }
 23870  func rewriteValue_OpAbsInt8s(v *ssa.Value) bool {
 23871  	v_0 := v.Args[0]
 23872  	b := v.Block
 23873  	typ := &b.Func.Config.Types
 23874  	// match: (AbsInt8s x)
 23875  	// result: (ZABSB x (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 23876  	for {
 23877  		x := v_0
 23878  		v.Reset(ssaop.OpARM64ZABSB)
 23879  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 23880  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 23881  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23882  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 23883  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23884  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 23885  		v1.AddArg2(v2, v3)
 23886  		v0.AddArg(v1)
 23887  		v.AddArg2(x, v0)
 23888  		return true
 23889  	}
 23890  }
 23891  func rewriteValue_OpAddr(v *ssa.Value) bool {
 23892  	v_0 := v.Args[0]
 23893  	// match: (Addr {sym} base)
 23894  	// result: (MOVDaddr {sym} base)
 23895  	for {
 23896  		sym := ssa.AuxToSym(v.Aux)
 23897  		base := v_0
 23898  		v.Reset(ssaop.OpARM64MOVDaddr)
 23899  		v.Aux = ssa.SymToAux(sym)
 23900  		v.AddArg(base)
 23901  		return true
 23902  	}
 23903  }
 23904  func rewriteValue_OpAvg64u(v *ssa.Value) bool {
 23905  	v_1 := v.Args[1]
 23906  	v_0 := v.Args[0]
 23907  	b := v.Block
 23908  	// match: (Avg64u <t> x y)
 23909  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
 23910  	for {
 23911  		t := v.Type
 23912  		x := v_0
 23913  		y := v_1
 23914  		v.Reset(ssaop.OpARM64ADD)
 23915  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, t)
 23916  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 23917  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, t)
 23918  		v1.AddArg2(x, y)
 23919  		v0.AddArg(v1)
 23920  		v.AddArg2(v0, y)
 23921  		return true
 23922  	}
 23923  }
 23924  func rewriteValue_OpBitLen16(v *ssa.Value) bool {
 23925  	v_0 := v.Args[0]
 23926  	b := v.Block
 23927  	typ := &b.Func.Config.Types
 23928  	// match: (BitLen16 x)
 23929  	// result: (BitLen64 (ZeroExt16to64 x))
 23930  	for {
 23931  		x := v_0
 23932  		v.Reset(ssaop.OpBitLen64)
 23933  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 23934  		v0.AddArg(x)
 23935  		v.AddArg(v0)
 23936  		return true
 23937  	}
 23938  }
 23939  func rewriteValue_OpBitLen32(v *ssa.Value) bool {
 23940  	v_0 := v.Args[0]
 23941  	b := v.Block
 23942  	typ := &b.Func.Config.Types
 23943  	// match: (BitLen32 x)
 23944  	// result: (SUB (MOVDconst [32]) (CLZW <typ.Int> x))
 23945  	for {
 23946  		x := v_0
 23947  		v.Reset(ssaop.OpARM64SUB)
 23948  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23949  		v0.AuxInt = ssa.Int64ToAuxInt(32)
 23950  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64CLZW, typ.Int)
 23951  		v1.AddArg(x)
 23952  		v.AddArg2(v0, v1)
 23953  		return true
 23954  	}
 23955  }
 23956  func rewriteValue_OpBitLen64(v *ssa.Value) bool {
 23957  	v_0 := v.Args[0]
 23958  	b := v.Block
 23959  	typ := &b.Func.Config.Types
 23960  	// match: (BitLen64 x)
 23961  	// result: (SUB (MOVDconst [64]) (CLZ <typ.Int> x))
 23962  	for {
 23963  		x := v_0
 23964  		v.Reset(ssaop.OpARM64SUB)
 23965  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23966  		v0.AuxInt = ssa.Int64ToAuxInt(64)
 23967  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64CLZ, typ.Int)
 23968  		v1.AddArg(x)
 23969  		v.AddArg2(v0, v1)
 23970  		return true
 23971  	}
 23972  }
 23973  func rewriteValue_OpBitLen8(v *ssa.Value) bool {
 23974  	v_0 := v.Args[0]
 23975  	b := v.Block
 23976  	typ := &b.Func.Config.Types
 23977  	// match: (BitLen8 x)
 23978  	// result: (BitLen64 (ZeroExt8to64 x))
 23979  	for {
 23980  		x := v_0
 23981  		v.Reset(ssaop.OpBitLen64)
 23982  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 23983  		v0.AddArg(x)
 23984  		v.AddArg(v0)
 23985  		return true
 23986  	}
 23987  }
 23988  func rewriteValue_OpBitRev16(v *ssa.Value) bool {
 23989  	v_0 := v.Args[0]
 23990  	b := v.Block
 23991  	typ := &b.Func.Config.Types
 23992  	// match: (BitRev16 x)
 23993  	// result: (SRLconst [48] (RBIT <typ.UInt64> x))
 23994  	for {
 23995  		x := v_0
 23996  		v.Reset(ssaop.OpARM64SRLconst)
 23997  		v.AuxInt = ssa.Int64ToAuxInt(48)
 23998  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, typ.UInt64)
 23999  		v0.AddArg(x)
 24000  		v.AddArg(v0)
 24001  		return true
 24002  	}
 24003  }
 24004  func rewriteValue_OpBitRev8(v *ssa.Value) bool {
 24005  	v_0 := v.Args[0]
 24006  	b := v.Block
 24007  	typ := &b.Func.Config.Types
 24008  	// match: (BitRev8 x)
 24009  	// result: (SRLconst [56] (RBIT <typ.UInt64> x))
 24010  	for {
 24011  		x := v_0
 24012  		v.Reset(ssaop.OpARM64SRLconst)
 24013  		v.AuxInt = ssa.Int64ToAuxInt(56)
 24014  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, typ.UInt64)
 24015  		v0.AddArg(x)
 24016  		v.AddArg(v0)
 24017  		return true
 24018  	}
 24019  }
 24020  func rewriteValue_OpCeilFloat32s(v *ssa.Value) bool {
 24021  	v_0 := v.Args[0]
 24022  	b := v.Block
 24023  	typ := &b.Func.Config.Types
 24024  	// match: (CeilFloat32s x)
 24025  	// result: (ZFRINTPS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 24026  	for {
 24027  		x := v_0
 24028  		v.Reset(ssaop.OpARM64ZFRINTPS)
 24029  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24030  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 24031  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24032  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24033  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24034  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 24035  		v1.AddArg2(v2, v3)
 24036  		v0.AddArg(v1)
 24037  		v.AddArg2(x, v0)
 24038  		return true
 24039  	}
 24040  }
 24041  func rewriteValue_OpCeilFloat64s(v *ssa.Value) bool {
 24042  	v_0 := v.Args[0]
 24043  	b := v.Block
 24044  	typ := &b.Func.Config.Types
 24045  	// match: (CeilFloat64s x)
 24046  	// result: (ZFRINTPD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 24047  	for {
 24048  		x := v_0
 24049  		v.Reset(ssaop.OpARM64ZFRINTPD)
 24050  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24051  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 24052  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24053  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24054  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24055  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 24056  		v1.AddArg2(v2, v3)
 24057  		v0.AddArg(v1)
 24058  		v.AddArg2(x, v0)
 24059  		return true
 24060  	}
 24061  }
 24062  func rewriteValue_OpCondSelect(v *ssa.Value) bool {
 24063  	v_2 := v.Args[2]
 24064  	v_1 := v.Args[1]
 24065  	v_0 := v.Args[0]
 24066  	b := v.Block
 24067  	// match: (CondSelect x y boolval)
 24068  	// cond: ssa.FlagArg(boolval) != nil
 24069  	// result: (CSEL [boolval.Op] x y ssa.FlagArg(boolval))
 24070  	for {
 24071  		x := v_0
 24072  		y := v_1
 24073  		boolval := v_2
 24074  		if !(ssa.FlagArg(boolval) != nil) {
 24075  			break
 24076  		}
 24077  		v.Reset(ssaop.OpARM64CSEL)
 24078  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
 24079  		v.AddArg3(x, y, ssa.FlagArg(boolval))
 24080  		return true
 24081  	}
 24082  	// match: (CondSelect x y boolval)
 24083  	// cond: ssa.FlagArg(boolval) == nil
 24084  	// result: (CSEL [ssaop.OpARM64NotEqual] x y (TSTWconst [1] boolval))
 24085  	for {
 24086  		x := v_0
 24087  		y := v_1
 24088  		boolval := v_2
 24089  		if !(ssa.FlagArg(boolval) == nil) {
 24090  			break
 24091  		}
 24092  		v.Reset(ssaop.OpARM64CSEL)
 24093  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64NotEqual)
 24094  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 24095  		v0.AuxInt = ssa.Int32ToAuxInt(1)
 24096  		v0.AddArg(boolval)
 24097  		v.AddArg3(x, y, v0)
 24098  		return true
 24099  	}
 24100  	return false
 24101  }
 24102  func rewriteValue_OpConst16(v *ssa.Value) bool {
 24103  	// match: (Const16 [val])
 24104  	// result: (MOVDconst [int64(val)])
 24105  	for {
 24106  		val := ssa.AuxIntToInt16(v.AuxInt)
 24107  		v.Reset(ssaop.OpARM64MOVDconst)
 24108  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 24109  		return true
 24110  	}
 24111  }
 24112  func rewriteValue_OpConst32(v *ssa.Value) bool {
 24113  	// match: (Const32 [val])
 24114  	// result: (MOVDconst [int64(val)])
 24115  	for {
 24116  		val := ssa.AuxIntToInt32(v.AuxInt)
 24117  		v.Reset(ssaop.OpARM64MOVDconst)
 24118  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 24119  		return true
 24120  	}
 24121  }
 24122  func rewriteValue_OpConst32F(v *ssa.Value) bool {
 24123  	// match: (Const32F [val])
 24124  	// result: (FMOVSconst [float64(val)])
 24125  	for {
 24126  		val := ssa.AuxIntToFloat32(v.AuxInt)
 24127  		v.Reset(ssaop.OpARM64FMOVSconst)
 24128  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
 24129  		return true
 24130  	}
 24131  }
 24132  func rewriteValue_OpConst64(v *ssa.Value) bool {
 24133  	// match: (Const64 [val])
 24134  	// result: (MOVDconst [int64(val)])
 24135  	for {
 24136  		val := ssa.AuxIntToInt64(v.AuxInt)
 24137  		v.Reset(ssaop.OpARM64MOVDconst)
 24138  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 24139  		return true
 24140  	}
 24141  }
 24142  func rewriteValue_OpConst64F(v *ssa.Value) bool {
 24143  	// match: (Const64F [val])
 24144  	// result: (FMOVDconst [float64(val)])
 24145  	for {
 24146  		val := ssa.AuxIntToFloat64(v.AuxInt)
 24147  		v.Reset(ssaop.OpARM64FMOVDconst)
 24148  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
 24149  		return true
 24150  	}
 24151  }
 24152  func rewriteValue_OpConst8(v *ssa.Value) bool {
 24153  	// match: (Const8 [val])
 24154  	// result: (MOVDconst [int64(val)])
 24155  	for {
 24156  		val := ssa.AuxIntToInt8(v.AuxInt)
 24157  		v.Reset(ssaop.OpARM64MOVDconst)
 24158  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 24159  		return true
 24160  	}
 24161  }
 24162  func rewriteValue_OpConstBool(v *ssa.Value) bool {
 24163  	// match: (ConstBool [t])
 24164  	// result: (MOVDconst [ssa.B2i(t)])
 24165  	for {
 24166  		t := ssa.AuxIntToBool(v.AuxInt)
 24167  		v.Reset(ssaop.OpARM64MOVDconst)
 24168  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(t))
 24169  		return true
 24170  	}
 24171  }
 24172  func rewriteValue_OpConstNil(v *ssa.Value) bool {
 24173  	// match: (ConstNil)
 24174  	// result: (MOVDconst [0])
 24175  	for {
 24176  		v.Reset(ssaop.OpARM64MOVDconst)
 24177  		v.AuxInt = ssa.Int64ToAuxInt(0)
 24178  		return true
 24179  	}
 24180  }
 24181  func rewriteValue_OpCount8s(v *ssa.Value) bool {
 24182  	v_0 := v.Args[0]
 24183  	b := v.Block
 24184  	typ := &b.Func.Config.Types
 24185  	// match: (Count8s r)
 24186  	// result: (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) r))
 24187  	for {
 24188  		r := v_0
 24189  		v.Reset(ssaop.OpSelect0)
 24190  		v.Type = types.TypeMask
 24191  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 24192  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24193  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 24194  		v0.AddArg2(v1, r)
 24195  		v.AddArg(v0)
 24196  		return true
 24197  	}
 24198  }
 24199  func rewriteValue_OpCtz16(v *ssa.Value) bool {
 24200  	v_0 := v.Args[0]
 24201  	b := v.Block
 24202  	typ := &b.Func.Config.Types
 24203  	// match: (Ctz16 <t> x)
 24204  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x)))
 24205  	for {
 24206  		t := v.Type
 24207  		x := v_0
 24208  		v.Reset(ssaop.OpARM64CLZW)
 24209  		v.Type = t
 24210  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, typ.UInt32)
 24211  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ORconst, typ.UInt32)
 24212  		v1.AuxInt = ssa.Int64ToAuxInt(0x10000)
 24213  		v1.AddArg(x)
 24214  		v0.AddArg(v1)
 24215  		v.AddArg(v0)
 24216  		return true
 24217  	}
 24218  }
 24219  func rewriteValue_OpCtz32(v *ssa.Value) bool {
 24220  	v_0 := v.Args[0]
 24221  	b := v.Block
 24222  	// match: (Ctz32 <t> x)
 24223  	// result: (CLZW (RBITW <t> x))
 24224  	for {
 24225  		t := v.Type
 24226  		x := v_0
 24227  		v.Reset(ssaop.OpARM64CLZW)
 24228  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, t)
 24229  		v0.AddArg(x)
 24230  		v.AddArg(v0)
 24231  		return true
 24232  	}
 24233  }
 24234  func rewriteValue_OpCtz64(v *ssa.Value) bool {
 24235  	v_0 := v.Args[0]
 24236  	b := v.Block
 24237  	// match: (Ctz64 <t> x)
 24238  	// result: (CLZ (RBIT <t> x))
 24239  	for {
 24240  		t := v.Type
 24241  		x := v_0
 24242  		v.Reset(ssaop.OpARM64CLZ)
 24243  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, t)
 24244  		v0.AddArg(x)
 24245  		v.AddArg(v0)
 24246  		return true
 24247  	}
 24248  }
 24249  func rewriteValue_OpCtz8(v *ssa.Value) bool {
 24250  	v_0 := v.Args[0]
 24251  	b := v.Block
 24252  	typ := &b.Func.Config.Types
 24253  	// match: (Ctz8 <t> x)
 24254  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x100] x)))
 24255  	for {
 24256  		t := v.Type
 24257  		x := v_0
 24258  		v.Reset(ssaop.OpARM64CLZW)
 24259  		v.Type = t
 24260  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, typ.UInt32)
 24261  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ORconst, typ.UInt32)
 24262  		v1.AuxInt = ssa.Int64ToAuxInt(0x100)
 24263  		v1.AddArg(x)
 24264  		v0.AddArg(v1)
 24265  		v.AddArg(v0)
 24266  		return true
 24267  	}
 24268  }
 24269  func rewriteValue_OpDiv16(v *ssa.Value) bool {
 24270  	v_1 := v.Args[1]
 24271  	v_0 := v.Args[0]
 24272  	b := v.Block
 24273  	typ := &b.Func.Config.Types
 24274  	// match: (Div16 [false] x y)
 24275  	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
 24276  	for {
 24277  		if ssa.AuxIntToBool(v.AuxInt) != false {
 24278  			break
 24279  		}
 24280  		x := v_0
 24281  		y := v_1
 24282  		v.Reset(ssaop.OpARM64DIVW)
 24283  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 24284  		v0.AddArg(x)
 24285  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 24286  		v1.AddArg(y)
 24287  		v.AddArg2(v0, v1)
 24288  		return true
 24289  	}
 24290  	return false
 24291  }
 24292  func rewriteValue_OpDiv16u(v *ssa.Value) bool {
 24293  	v_1 := v.Args[1]
 24294  	v_0 := v.Args[0]
 24295  	b := v.Block
 24296  	typ := &b.Func.Config.Types
 24297  	// match: (Div16u x y)
 24298  	// result: (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y))
 24299  	for {
 24300  		x := v_0
 24301  		y := v_1
 24302  		v.Reset(ssaop.OpARM64UDIVW)
 24303  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 24304  		v0.AddArg(x)
 24305  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 24306  		v1.AddArg(y)
 24307  		v.AddArg2(v0, v1)
 24308  		return true
 24309  	}
 24310  }
 24311  func rewriteValue_OpDiv32(v *ssa.Value) bool {
 24312  	v_1 := v.Args[1]
 24313  	v_0 := v.Args[0]
 24314  	// match: (Div32 [false] x y)
 24315  	// result: (DIVW x y)
 24316  	for {
 24317  		if ssa.AuxIntToBool(v.AuxInt) != false {
 24318  			break
 24319  		}
 24320  		x := v_0
 24321  		y := v_1
 24322  		v.Reset(ssaop.OpARM64DIVW)
 24323  		v.AddArg2(x, y)
 24324  		return true
 24325  	}
 24326  	return false
 24327  }
 24328  func rewriteValue_OpDiv64(v *ssa.Value) bool {
 24329  	v_1 := v.Args[1]
 24330  	v_0 := v.Args[0]
 24331  	// match: (Div64 [false] x y)
 24332  	// result: (DIV x y)
 24333  	for {
 24334  		if ssa.AuxIntToBool(v.AuxInt) != false {
 24335  			break
 24336  		}
 24337  		x := v_0
 24338  		y := v_1
 24339  		v.Reset(ssaop.OpARM64DIV)
 24340  		v.AddArg2(x, y)
 24341  		return true
 24342  	}
 24343  	return false
 24344  }
 24345  func rewriteValue_OpDiv8(v *ssa.Value) bool {
 24346  	v_1 := v.Args[1]
 24347  	v_0 := v.Args[0]
 24348  	b := v.Block
 24349  	typ := &b.Func.Config.Types
 24350  	// match: (Div8 x y)
 24351  	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
 24352  	for {
 24353  		x := v_0
 24354  		y := v_1
 24355  		v.Reset(ssaop.OpARM64DIVW)
 24356  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 24357  		v0.AddArg(x)
 24358  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 24359  		v1.AddArg(y)
 24360  		v.AddArg2(v0, v1)
 24361  		return true
 24362  	}
 24363  }
 24364  func rewriteValue_OpDiv8u(v *ssa.Value) bool {
 24365  	v_1 := v.Args[1]
 24366  	v_0 := v.Args[0]
 24367  	b := v.Block
 24368  	typ := &b.Func.Config.Types
 24369  	// match: (Div8u x y)
 24370  	// result: (UDIVW (ZeroExt8to32 x) (ZeroExt8to32 y))
 24371  	for {
 24372  		x := v_0
 24373  		y := v_1
 24374  		v.Reset(ssaop.OpARM64UDIVW)
 24375  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 24376  		v0.AddArg(x)
 24377  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 24378  		v1.AddArg(y)
 24379  		v.AddArg2(v0, v1)
 24380  		return true
 24381  	}
 24382  }
 24383  func rewriteValue_OpEq16(v *ssa.Value) bool {
 24384  	v_1 := v.Args[1]
 24385  	v_0 := v.Args[0]
 24386  	b := v.Block
 24387  	typ := &b.Func.Config.Types
 24388  	// match: (Eq16 x y)
 24389  	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 24390  	for {
 24391  		x := v_0
 24392  		y := v_1
 24393  		v.Reset(ssaop.OpARM64Equal)
 24394  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 24395  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 24396  		v1.AddArg(x)
 24397  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 24398  		v2.AddArg(y)
 24399  		v0.AddArg2(v1, v2)
 24400  		v.AddArg(v0)
 24401  		return true
 24402  	}
 24403  }
 24404  func rewriteValue_OpEq32(v *ssa.Value) bool {
 24405  	v_1 := v.Args[1]
 24406  	v_0 := v.Args[0]
 24407  	b := v.Block
 24408  	// match: (Eq32 x y)
 24409  	// result: (Equal (CMPW x y))
 24410  	for {
 24411  		x := v_0
 24412  		y := v_1
 24413  		v.Reset(ssaop.OpARM64Equal)
 24414  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 24415  		v0.AddArg2(x, y)
 24416  		v.AddArg(v0)
 24417  		return true
 24418  	}
 24419  }
 24420  func rewriteValue_OpEq32F(v *ssa.Value) bool {
 24421  	v_1 := v.Args[1]
 24422  	v_0 := v.Args[0]
 24423  	b := v.Block
 24424  	// match: (Eq32F x y)
 24425  	// result: (Equal (FCMPS x y))
 24426  	for {
 24427  		x := v_0
 24428  		y := v_1
 24429  		v.Reset(ssaop.OpARM64Equal)
 24430  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 24431  		v0.AddArg2(x, y)
 24432  		v.AddArg(v0)
 24433  		return true
 24434  	}
 24435  }
 24436  func rewriteValue_OpEq64(v *ssa.Value) bool {
 24437  	v_1 := v.Args[1]
 24438  	v_0 := v.Args[0]
 24439  	b := v.Block
 24440  	// match: (Eq64 x y)
 24441  	// result: (Equal (CMP x y))
 24442  	for {
 24443  		x := v_0
 24444  		y := v_1
 24445  		v.Reset(ssaop.OpARM64Equal)
 24446  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 24447  		v0.AddArg2(x, y)
 24448  		v.AddArg(v0)
 24449  		return true
 24450  	}
 24451  }
 24452  func rewriteValue_OpEq64F(v *ssa.Value) bool {
 24453  	v_1 := v.Args[1]
 24454  	v_0 := v.Args[0]
 24455  	b := v.Block
 24456  	// match: (Eq64F x y)
 24457  	// result: (Equal (FCMPD x y))
 24458  	for {
 24459  		x := v_0
 24460  		y := v_1
 24461  		v.Reset(ssaop.OpARM64Equal)
 24462  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 24463  		v0.AddArg2(x, y)
 24464  		v.AddArg(v0)
 24465  		return true
 24466  	}
 24467  }
 24468  func rewriteValue_OpEq8(v *ssa.Value) bool {
 24469  	v_1 := v.Args[1]
 24470  	v_0 := v.Args[0]
 24471  	b := v.Block
 24472  	typ := &b.Func.Config.Types
 24473  	// match: (Eq8 x y)
 24474  	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 24475  	for {
 24476  		x := v_0
 24477  		y := v_1
 24478  		v.Reset(ssaop.OpARM64Equal)
 24479  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 24480  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 24481  		v1.AddArg(x)
 24482  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 24483  		v2.AddArg(y)
 24484  		v0.AddArg2(v1, v2)
 24485  		v.AddArg(v0)
 24486  		return true
 24487  	}
 24488  }
 24489  func rewriteValue_OpEqB(v *ssa.Value) bool {
 24490  	v_1 := v.Args[1]
 24491  	v_0 := v.Args[0]
 24492  	b := v.Block
 24493  	typ := &b.Func.Config.Types
 24494  	// match: (EqB x y)
 24495  	// result: (XOR (MOVDconst [1]) (XOR <typ.Bool> x y))
 24496  	for {
 24497  		x := v_0
 24498  		y := v_1
 24499  		v.Reset(ssaop.OpARM64XOR)
 24500  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24501  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 24502  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64XOR, typ.Bool)
 24503  		v1.AddArg2(x, y)
 24504  		v.AddArg2(v0, v1)
 24505  		return true
 24506  	}
 24507  }
 24508  func rewriteValue_OpEqPtr(v *ssa.Value) bool {
 24509  	v_1 := v.Args[1]
 24510  	v_0 := v.Args[0]
 24511  	b := v.Block
 24512  	// match: (EqPtr x y)
 24513  	// result: (Equal (CMP x y))
 24514  	for {
 24515  		x := v_0
 24516  		y := v_1
 24517  		v.Reset(ssaop.OpARM64Equal)
 24518  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 24519  		v0.AddArg2(x, y)
 24520  		v.AddArg(v0)
 24521  		return true
 24522  	}
 24523  }
 24524  func rewriteValue_OpEqualFloat32s(v *ssa.Value) bool {
 24525  	v_1 := v.Args[1]
 24526  	v_0 := v.Args[0]
 24527  	b := v.Block
 24528  	typ := &b.Func.Config.Types
 24529  	// match: (EqualFloat32s x y)
 24530  	// result: (ZFCMEQS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 24531  	for {
 24532  		x := v_0
 24533  		y := v_1
 24534  		v.Reset(ssaop.OpARM64ZFCMEQS)
 24535  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24536  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 24537  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24538  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24539  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24540  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 24541  		v1.AddArg2(v2, v3)
 24542  		v0.AddArg(v1)
 24543  		v.AddArg3(x, y, v0)
 24544  		return true
 24545  	}
 24546  }
 24547  func rewriteValue_OpEqualFloat64s(v *ssa.Value) bool {
 24548  	v_1 := v.Args[1]
 24549  	v_0 := v.Args[0]
 24550  	b := v.Block
 24551  	typ := &b.Func.Config.Types
 24552  	// match: (EqualFloat64s x y)
 24553  	// result: (ZFCMEQD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 24554  	for {
 24555  		x := v_0
 24556  		y := v_1
 24557  		v.Reset(ssaop.OpARM64ZFCMEQD)
 24558  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24559  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 24560  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24561  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24562  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24563  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 24564  		v1.AddArg2(v2, v3)
 24565  		v0.AddArg(v1)
 24566  		v.AddArg3(x, y, v0)
 24567  		return true
 24568  	}
 24569  }
 24570  func rewriteValue_OpEqualInt16s(v *ssa.Value) bool {
 24571  	v_1 := v.Args[1]
 24572  	v_0 := v.Args[0]
 24573  	b := v.Block
 24574  	typ := &b.Func.Config.Types
 24575  	// match: (EqualInt16s x y)
 24576  	// result: (ZCMPEQH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 24577  	for {
 24578  		x := v_0
 24579  		y := v_1
 24580  		v.Reset(ssaop.OpARM64ZCMPEQH)
 24581  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24582  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 24583  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24584  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24585  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24586  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 24587  		v1.AddArg2(v2, v3)
 24588  		v0.AddArg(v1)
 24589  		v.AddArg3(x, y, v0)
 24590  		return true
 24591  	}
 24592  }
 24593  func rewriteValue_OpEqualInt32s(v *ssa.Value) bool {
 24594  	v_1 := v.Args[1]
 24595  	v_0 := v.Args[0]
 24596  	b := v.Block
 24597  	typ := &b.Func.Config.Types
 24598  	// match: (EqualInt32s x y)
 24599  	// result: (ZCMPEQS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 24600  	for {
 24601  		x := v_0
 24602  		y := v_1
 24603  		v.Reset(ssaop.OpARM64ZCMPEQS)
 24604  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24605  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 24606  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24607  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24608  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24609  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 24610  		v1.AddArg2(v2, v3)
 24611  		v0.AddArg(v1)
 24612  		v.AddArg3(x, y, v0)
 24613  		return true
 24614  	}
 24615  }
 24616  func rewriteValue_OpEqualInt64s(v *ssa.Value) bool {
 24617  	v_1 := v.Args[1]
 24618  	v_0 := v.Args[0]
 24619  	b := v.Block
 24620  	typ := &b.Func.Config.Types
 24621  	// match: (EqualInt64s x y)
 24622  	// result: (ZCMPEQD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 24623  	for {
 24624  		x := v_0
 24625  		y := v_1
 24626  		v.Reset(ssaop.OpARM64ZCMPEQD)
 24627  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24628  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 24629  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24630  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24631  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24632  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 24633  		v1.AddArg2(v2, v3)
 24634  		v0.AddArg(v1)
 24635  		v.AddArg3(x, y, v0)
 24636  		return true
 24637  	}
 24638  }
 24639  func rewriteValue_OpEqualInt8s(v *ssa.Value) bool {
 24640  	v_1 := v.Args[1]
 24641  	v_0 := v.Args[0]
 24642  	b := v.Block
 24643  	typ := &b.Func.Config.Types
 24644  	// match: (EqualInt8s x y)
 24645  	// result: (ZCMPEQB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 24646  	for {
 24647  		x := v_0
 24648  		y := v_1
 24649  		v.Reset(ssaop.OpARM64ZCMPEQB)
 24650  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24651  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 24652  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24653  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24654  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24655  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 24656  		v1.AddArg2(v2, v3)
 24657  		v0.AddArg(v1)
 24658  		v.AddArg3(x, y, v0)
 24659  		return true
 24660  	}
 24661  }
 24662  func rewriteValue_OpEqualUint16s(v *ssa.Value) bool {
 24663  	v_1 := v.Args[1]
 24664  	v_0 := v.Args[0]
 24665  	b := v.Block
 24666  	typ := &b.Func.Config.Types
 24667  	// match: (EqualUint16s x y)
 24668  	// result: (ZCMPEQH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 24669  	for {
 24670  		x := v_0
 24671  		y := v_1
 24672  		v.Reset(ssaop.OpARM64ZCMPEQH)
 24673  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24674  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 24675  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24676  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24677  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24678  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 24679  		v1.AddArg2(v2, v3)
 24680  		v0.AddArg(v1)
 24681  		v.AddArg3(x, y, v0)
 24682  		return true
 24683  	}
 24684  }
 24685  func rewriteValue_OpEqualUint32s(v *ssa.Value) bool {
 24686  	v_1 := v.Args[1]
 24687  	v_0 := v.Args[0]
 24688  	b := v.Block
 24689  	typ := &b.Func.Config.Types
 24690  	// match: (EqualUint32s x y)
 24691  	// result: (ZCMPEQS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 24692  	for {
 24693  		x := v_0
 24694  		y := v_1
 24695  		v.Reset(ssaop.OpARM64ZCMPEQS)
 24696  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24697  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 24698  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24699  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24700  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24701  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 24702  		v1.AddArg2(v2, v3)
 24703  		v0.AddArg(v1)
 24704  		v.AddArg3(x, y, v0)
 24705  		return true
 24706  	}
 24707  }
 24708  func rewriteValue_OpEqualUint64s(v *ssa.Value) bool {
 24709  	v_1 := v.Args[1]
 24710  	v_0 := v.Args[0]
 24711  	b := v.Block
 24712  	typ := &b.Func.Config.Types
 24713  	// match: (EqualUint64s x y)
 24714  	// result: (ZCMPEQD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 24715  	for {
 24716  		x := v_0
 24717  		y := v_1
 24718  		v.Reset(ssaop.OpARM64ZCMPEQD)
 24719  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24720  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 24721  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24722  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24723  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24724  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 24725  		v1.AddArg2(v2, v3)
 24726  		v0.AddArg(v1)
 24727  		v.AddArg3(x, y, v0)
 24728  		return true
 24729  	}
 24730  }
 24731  func rewriteValue_OpEqualUint8s(v *ssa.Value) bool {
 24732  	v_1 := v.Args[1]
 24733  	v_0 := v.Args[0]
 24734  	b := v.Block
 24735  	typ := &b.Func.Config.Types
 24736  	// match: (EqualUint8s x y)
 24737  	// result: (ZCMPEQB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 24738  	for {
 24739  		x := v_0
 24740  		y := v_1
 24741  		v.Reset(ssaop.OpARM64ZCMPEQB)
 24742  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24743  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 24744  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24745  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24746  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24747  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 24748  		v1.AddArg2(v2, v3)
 24749  		v0.AddArg(v1)
 24750  		v.AddArg3(x, y, v0)
 24751  		return true
 24752  	}
 24753  }
 24754  func rewriteValue_OpFMA(v *ssa.Value) bool {
 24755  	v_2 := v.Args[2]
 24756  	v_1 := v.Args[1]
 24757  	v_0 := v.Args[0]
 24758  	// match: (FMA x y z)
 24759  	// result: (FMADDD z x y)
 24760  	for {
 24761  		x := v_0
 24762  		y := v_1
 24763  		z := v_2
 24764  		v.Reset(ssaop.OpARM64FMADDD)
 24765  		v.AddArg3(z, x, y)
 24766  		return true
 24767  	}
 24768  }
 24769  func rewriteValue_OpFloorFloat32s(v *ssa.Value) bool {
 24770  	v_0 := v.Args[0]
 24771  	b := v.Block
 24772  	typ := &b.Func.Config.Types
 24773  	// match: (FloorFloat32s x)
 24774  	// result: (ZFRINTMS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 24775  	for {
 24776  		x := v_0
 24777  		v.Reset(ssaop.OpARM64ZFRINTMS)
 24778  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24779  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 24780  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24781  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24782  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24783  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 24784  		v1.AddArg2(v2, v3)
 24785  		v0.AddArg(v1)
 24786  		v.AddArg2(x, v0)
 24787  		return true
 24788  	}
 24789  }
 24790  func rewriteValue_OpFloorFloat64s(v *ssa.Value) bool {
 24791  	v_0 := v.Args[0]
 24792  	b := v.Block
 24793  	typ := &b.Func.Config.Types
 24794  	// match: (FloorFloat64s x)
 24795  	// result: (ZFRINTMD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 24796  	for {
 24797  		x := v_0
 24798  		v.Reset(ssaop.OpARM64ZFRINTMD)
 24799  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24800  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 24801  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24802  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24803  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24804  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 24805  		v1.AddArg2(v2, v3)
 24806  		v0.AddArg(v1)
 24807  		v.AddArg2(x, v0)
 24808  		return true
 24809  	}
 24810  }
 24811  func rewriteValue_OpGreaterEqualFloat32s(v *ssa.Value) bool {
 24812  	v_1 := v.Args[1]
 24813  	v_0 := v.Args[0]
 24814  	b := v.Block
 24815  	typ := &b.Func.Config.Types
 24816  	// match: (GreaterEqualFloat32s x y)
 24817  	// result: (ZFCMGES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 24818  	for {
 24819  		x := v_0
 24820  		y := v_1
 24821  		v.Reset(ssaop.OpARM64ZFCMGES)
 24822  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24823  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 24824  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24825  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24826  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24827  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 24828  		v1.AddArg2(v2, v3)
 24829  		v0.AddArg(v1)
 24830  		v.AddArg3(x, y, v0)
 24831  		return true
 24832  	}
 24833  }
 24834  func rewriteValue_OpGreaterEqualFloat64s(v *ssa.Value) bool {
 24835  	v_1 := v.Args[1]
 24836  	v_0 := v.Args[0]
 24837  	b := v.Block
 24838  	typ := &b.Func.Config.Types
 24839  	// match: (GreaterEqualFloat64s x y)
 24840  	// result: (ZFCMGED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 24841  	for {
 24842  		x := v_0
 24843  		y := v_1
 24844  		v.Reset(ssaop.OpARM64ZFCMGED)
 24845  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24846  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 24847  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24848  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24849  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24850  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 24851  		v1.AddArg2(v2, v3)
 24852  		v0.AddArg(v1)
 24853  		v.AddArg3(x, y, v0)
 24854  		return true
 24855  	}
 24856  }
 24857  func rewriteValue_OpGreaterEqualInt16s(v *ssa.Value) bool {
 24858  	v_1 := v.Args[1]
 24859  	v_0 := v.Args[0]
 24860  	b := v.Block
 24861  	typ := &b.Func.Config.Types
 24862  	// match: (GreaterEqualInt16s x y)
 24863  	// result: (ZCMPGEH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 24864  	for {
 24865  		x := v_0
 24866  		y := v_1
 24867  		v.Reset(ssaop.OpARM64ZCMPGEH)
 24868  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24869  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 24870  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24871  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24872  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24873  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 24874  		v1.AddArg2(v2, v3)
 24875  		v0.AddArg(v1)
 24876  		v.AddArg3(x, y, v0)
 24877  		return true
 24878  	}
 24879  }
 24880  func rewriteValue_OpGreaterEqualInt32s(v *ssa.Value) bool {
 24881  	v_1 := v.Args[1]
 24882  	v_0 := v.Args[0]
 24883  	b := v.Block
 24884  	typ := &b.Func.Config.Types
 24885  	// match: (GreaterEqualInt32s x y)
 24886  	// result: (ZCMPGES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 24887  	for {
 24888  		x := v_0
 24889  		y := v_1
 24890  		v.Reset(ssaop.OpARM64ZCMPGES)
 24891  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24892  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 24893  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24894  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24895  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24896  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 24897  		v1.AddArg2(v2, v3)
 24898  		v0.AddArg(v1)
 24899  		v.AddArg3(x, y, v0)
 24900  		return true
 24901  	}
 24902  }
 24903  func rewriteValue_OpGreaterEqualInt64s(v *ssa.Value) bool {
 24904  	v_1 := v.Args[1]
 24905  	v_0 := v.Args[0]
 24906  	b := v.Block
 24907  	typ := &b.Func.Config.Types
 24908  	// match: (GreaterEqualInt64s x y)
 24909  	// result: (ZCMPGED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 24910  	for {
 24911  		x := v_0
 24912  		y := v_1
 24913  		v.Reset(ssaop.OpARM64ZCMPGED)
 24914  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24915  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 24916  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24917  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24918  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24919  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 24920  		v1.AddArg2(v2, v3)
 24921  		v0.AddArg(v1)
 24922  		v.AddArg3(x, y, v0)
 24923  		return true
 24924  	}
 24925  }
 24926  func rewriteValue_OpGreaterEqualInt8s(v *ssa.Value) bool {
 24927  	v_1 := v.Args[1]
 24928  	v_0 := v.Args[0]
 24929  	b := v.Block
 24930  	typ := &b.Func.Config.Types
 24931  	// match: (GreaterEqualInt8s x y)
 24932  	// result: (ZCMPGEB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 24933  	for {
 24934  		x := v_0
 24935  		y := v_1
 24936  		v.Reset(ssaop.OpARM64ZCMPGEB)
 24937  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24938  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 24939  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24940  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24941  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24942  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 24943  		v1.AddArg2(v2, v3)
 24944  		v0.AddArg(v1)
 24945  		v.AddArg3(x, y, v0)
 24946  		return true
 24947  	}
 24948  }
 24949  func rewriteValue_OpGreaterEqualUint16s(v *ssa.Value) bool {
 24950  	v_1 := v.Args[1]
 24951  	v_0 := v.Args[0]
 24952  	b := v.Block
 24953  	typ := &b.Func.Config.Types
 24954  	// match: (GreaterEqualUint16s x y)
 24955  	// result: (ZCMPHSH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 24956  	for {
 24957  		x := v_0
 24958  		y := v_1
 24959  		v.Reset(ssaop.OpARM64ZCMPHSH)
 24960  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24961  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 24962  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24963  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24964  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24965  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 24966  		v1.AddArg2(v2, v3)
 24967  		v0.AddArg(v1)
 24968  		v.AddArg3(x, y, v0)
 24969  		return true
 24970  	}
 24971  }
 24972  func rewriteValue_OpGreaterEqualUint32s(v *ssa.Value) bool {
 24973  	v_1 := v.Args[1]
 24974  	v_0 := v.Args[0]
 24975  	b := v.Block
 24976  	typ := &b.Func.Config.Types
 24977  	// match: (GreaterEqualUint32s x y)
 24978  	// result: (ZCMPHSS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 24979  	for {
 24980  		x := v_0
 24981  		y := v_1
 24982  		v.Reset(ssaop.OpARM64ZCMPHSS)
 24983  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 24984  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 24985  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24986  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 24987  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24988  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 24989  		v1.AddArg2(v2, v3)
 24990  		v0.AddArg(v1)
 24991  		v.AddArg3(x, y, v0)
 24992  		return true
 24993  	}
 24994  }
 24995  func rewriteValue_OpGreaterEqualUint64s(v *ssa.Value) bool {
 24996  	v_1 := v.Args[1]
 24997  	v_0 := v.Args[0]
 24998  	b := v.Block
 24999  	typ := &b.Func.Config.Types
 25000  	// match: (GreaterEqualUint64s x y)
 25001  	// result: (ZCMPHSD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 25002  	for {
 25003  		x := v_0
 25004  		y := v_1
 25005  		v.Reset(ssaop.OpARM64ZCMPHSD)
 25006  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25007  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 25008  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25009  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25010  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25011  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 25012  		v1.AddArg2(v2, v3)
 25013  		v0.AddArg(v1)
 25014  		v.AddArg3(x, y, v0)
 25015  		return true
 25016  	}
 25017  }
 25018  func rewriteValue_OpGreaterEqualUint8s(v *ssa.Value) bool {
 25019  	v_1 := v.Args[1]
 25020  	v_0 := v.Args[0]
 25021  	b := v.Block
 25022  	typ := &b.Func.Config.Types
 25023  	// match: (GreaterEqualUint8s x y)
 25024  	// result: (ZCMPHSB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 25025  	for {
 25026  		x := v_0
 25027  		y := v_1
 25028  		v.Reset(ssaop.OpARM64ZCMPHSB)
 25029  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25030  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 25031  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25032  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25033  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25034  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 25035  		v1.AddArg2(v2, v3)
 25036  		v0.AddArg(v1)
 25037  		v.AddArg3(x, y, v0)
 25038  		return true
 25039  	}
 25040  }
 25041  func rewriteValue_OpGreaterFloat32s(v *ssa.Value) bool {
 25042  	v_1 := v.Args[1]
 25043  	v_0 := v.Args[0]
 25044  	b := v.Block
 25045  	typ := &b.Func.Config.Types
 25046  	// match: (GreaterFloat32s x y)
 25047  	// result: (ZFCMGTS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 25048  	for {
 25049  		x := v_0
 25050  		y := v_1
 25051  		v.Reset(ssaop.OpARM64ZFCMGTS)
 25052  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25053  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 25054  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25055  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25056  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25057  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 25058  		v1.AddArg2(v2, v3)
 25059  		v0.AddArg(v1)
 25060  		v.AddArg3(x, y, v0)
 25061  		return true
 25062  	}
 25063  }
 25064  func rewriteValue_OpGreaterFloat64s(v *ssa.Value) bool {
 25065  	v_1 := v.Args[1]
 25066  	v_0 := v.Args[0]
 25067  	b := v.Block
 25068  	typ := &b.Func.Config.Types
 25069  	// match: (GreaterFloat64s x y)
 25070  	// result: (ZFCMGTD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 25071  	for {
 25072  		x := v_0
 25073  		y := v_1
 25074  		v.Reset(ssaop.OpARM64ZFCMGTD)
 25075  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25076  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 25077  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25078  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25079  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25080  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 25081  		v1.AddArg2(v2, v3)
 25082  		v0.AddArg(v1)
 25083  		v.AddArg3(x, y, v0)
 25084  		return true
 25085  	}
 25086  }
 25087  func rewriteValue_OpGreaterInt16s(v *ssa.Value) bool {
 25088  	v_1 := v.Args[1]
 25089  	v_0 := v.Args[0]
 25090  	b := v.Block
 25091  	typ := &b.Func.Config.Types
 25092  	// match: (GreaterInt16s x y)
 25093  	// result: (ZCMPGTH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 25094  	for {
 25095  		x := v_0
 25096  		y := v_1
 25097  		v.Reset(ssaop.OpARM64ZCMPGTH)
 25098  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25099  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 25100  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25101  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25102  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25103  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 25104  		v1.AddArg2(v2, v3)
 25105  		v0.AddArg(v1)
 25106  		v.AddArg3(x, y, v0)
 25107  		return true
 25108  	}
 25109  }
 25110  func rewriteValue_OpGreaterInt32s(v *ssa.Value) bool {
 25111  	v_1 := v.Args[1]
 25112  	v_0 := v.Args[0]
 25113  	b := v.Block
 25114  	typ := &b.Func.Config.Types
 25115  	// match: (GreaterInt32s x y)
 25116  	// result: (ZCMPGTS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 25117  	for {
 25118  		x := v_0
 25119  		y := v_1
 25120  		v.Reset(ssaop.OpARM64ZCMPGTS)
 25121  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25122  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 25123  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25124  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25125  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25126  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 25127  		v1.AddArg2(v2, v3)
 25128  		v0.AddArg(v1)
 25129  		v.AddArg3(x, y, v0)
 25130  		return true
 25131  	}
 25132  }
 25133  func rewriteValue_OpGreaterInt64s(v *ssa.Value) bool {
 25134  	v_1 := v.Args[1]
 25135  	v_0 := v.Args[0]
 25136  	b := v.Block
 25137  	typ := &b.Func.Config.Types
 25138  	// match: (GreaterInt64s x y)
 25139  	// result: (ZCMPGTD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 25140  	for {
 25141  		x := v_0
 25142  		y := v_1
 25143  		v.Reset(ssaop.OpARM64ZCMPGTD)
 25144  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25145  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 25146  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25147  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25148  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25149  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 25150  		v1.AddArg2(v2, v3)
 25151  		v0.AddArg(v1)
 25152  		v.AddArg3(x, y, v0)
 25153  		return true
 25154  	}
 25155  }
 25156  func rewriteValue_OpGreaterInt8s(v *ssa.Value) bool {
 25157  	v_1 := v.Args[1]
 25158  	v_0 := v.Args[0]
 25159  	b := v.Block
 25160  	typ := &b.Func.Config.Types
 25161  	// match: (GreaterInt8s x y)
 25162  	// result: (ZCMPGTB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 25163  	for {
 25164  		x := v_0
 25165  		y := v_1
 25166  		v.Reset(ssaop.OpARM64ZCMPGTB)
 25167  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25168  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 25169  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25170  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25171  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25172  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 25173  		v1.AddArg2(v2, v3)
 25174  		v0.AddArg(v1)
 25175  		v.AddArg3(x, y, v0)
 25176  		return true
 25177  	}
 25178  }
 25179  func rewriteValue_OpGreaterUint16s(v *ssa.Value) bool {
 25180  	v_1 := v.Args[1]
 25181  	v_0 := v.Args[0]
 25182  	b := v.Block
 25183  	typ := &b.Func.Config.Types
 25184  	// match: (GreaterUint16s x y)
 25185  	// result: (ZCMPHIH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 25186  	for {
 25187  		x := v_0
 25188  		y := v_1
 25189  		v.Reset(ssaop.OpARM64ZCMPHIH)
 25190  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25191  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 25192  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25193  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25194  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25195  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 25196  		v1.AddArg2(v2, v3)
 25197  		v0.AddArg(v1)
 25198  		v.AddArg3(x, y, v0)
 25199  		return true
 25200  	}
 25201  }
 25202  func rewriteValue_OpGreaterUint32s(v *ssa.Value) bool {
 25203  	v_1 := v.Args[1]
 25204  	v_0 := v.Args[0]
 25205  	b := v.Block
 25206  	typ := &b.Func.Config.Types
 25207  	// match: (GreaterUint32s x y)
 25208  	// result: (ZCMPHIS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 25209  	for {
 25210  		x := v_0
 25211  		y := v_1
 25212  		v.Reset(ssaop.OpARM64ZCMPHIS)
 25213  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25214  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 25215  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25216  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25217  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25218  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 25219  		v1.AddArg2(v2, v3)
 25220  		v0.AddArg(v1)
 25221  		v.AddArg3(x, y, v0)
 25222  		return true
 25223  	}
 25224  }
 25225  func rewriteValue_OpGreaterUint64s(v *ssa.Value) bool {
 25226  	v_1 := v.Args[1]
 25227  	v_0 := v.Args[0]
 25228  	b := v.Block
 25229  	typ := &b.Func.Config.Types
 25230  	// match: (GreaterUint64s x y)
 25231  	// result: (ZCMPHID x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 25232  	for {
 25233  		x := v_0
 25234  		y := v_1
 25235  		v.Reset(ssaop.OpARM64ZCMPHID)
 25236  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25237  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 25238  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25239  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25240  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25241  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 25242  		v1.AddArg2(v2, v3)
 25243  		v0.AddArg(v1)
 25244  		v.AddArg3(x, y, v0)
 25245  		return true
 25246  	}
 25247  }
 25248  func rewriteValue_OpGreaterUint8s(v *ssa.Value) bool {
 25249  	v_1 := v.Args[1]
 25250  	v_0 := v.Args[0]
 25251  	b := v.Block
 25252  	typ := &b.Func.Config.Types
 25253  	// match: (GreaterUint8s x y)
 25254  	// result: (ZCMPHIB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 25255  	for {
 25256  		x := v_0
 25257  		y := v_1
 25258  		v.Reset(ssaop.OpARM64ZCMPHIB)
 25259  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 25260  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 25261  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25262  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 25263  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25264  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 25265  		v1.AddArg2(v2, v3)
 25266  		v0.AddArg(v1)
 25267  		v.AddArg3(x, y, v0)
 25268  		return true
 25269  	}
 25270  }
 25271  func rewriteValue_OpHmul32(v *ssa.Value) bool {
 25272  	v_1 := v.Args[1]
 25273  	v_0 := v.Args[0]
 25274  	b := v.Block
 25275  	typ := &b.Func.Config.Types
 25276  	// match: (Hmul32 x y)
 25277  	// result: (SRAconst (MULL <typ.Int64> x y) [32])
 25278  	for {
 25279  		x := v_0
 25280  		y := v_1
 25281  		v.Reset(ssaop.OpARM64SRAconst)
 25282  		v.AuxInt = ssa.Int64ToAuxInt(32)
 25283  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MULL, typ.Int64)
 25284  		v0.AddArg2(x, y)
 25285  		v.AddArg(v0)
 25286  		return true
 25287  	}
 25288  }
 25289  func rewriteValue_OpHmul32u(v *ssa.Value) bool {
 25290  	v_1 := v.Args[1]
 25291  	v_0 := v.Args[0]
 25292  	b := v.Block
 25293  	typ := &b.Func.Config.Types
 25294  	// match: (Hmul32u x y)
 25295  	// result: (SRAconst (UMULL <typ.UInt64> x y) [32])
 25296  	for {
 25297  		x := v_0
 25298  		y := v_1
 25299  		v.Reset(ssaop.OpARM64SRAconst)
 25300  		v.AuxInt = ssa.Int64ToAuxInt(32)
 25301  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UMULL, typ.UInt64)
 25302  		v0.AddArg2(x, y)
 25303  		v.AddArg(v0)
 25304  		return true
 25305  	}
 25306  }
 25307  func rewriteValue_OpIfElseFloat32s(v *ssa.Value) bool {
 25308  	v_2 := v.Args[2]
 25309  	v_1 := v.Args[1]
 25310  	v_0 := v.Args[0]
 25311  	// match: (IfElseFloat32s x mask y)
 25312  	// result: (ZSELS x y mask)
 25313  	for {
 25314  		x := v_0
 25315  		mask := v_1
 25316  		y := v_2
 25317  		v.Reset(ssaop.OpARM64ZSELS)
 25318  		v.AddArg3(x, y, mask)
 25319  		return true
 25320  	}
 25321  }
 25322  func rewriteValue_OpIfElseFloat64s(v *ssa.Value) bool {
 25323  	v_2 := v.Args[2]
 25324  	v_1 := v.Args[1]
 25325  	v_0 := v.Args[0]
 25326  	// match: (IfElseFloat64s x mask y)
 25327  	// result: (ZSELD x y mask)
 25328  	for {
 25329  		x := v_0
 25330  		mask := v_1
 25331  		y := v_2
 25332  		v.Reset(ssaop.OpARM64ZSELD)
 25333  		v.AddArg3(x, y, mask)
 25334  		return true
 25335  	}
 25336  }
 25337  func rewriteValue_OpIfElseInt16s(v *ssa.Value) bool {
 25338  	v_2 := v.Args[2]
 25339  	v_1 := v.Args[1]
 25340  	v_0 := v.Args[0]
 25341  	// match: (IfElseInt16s x mask y)
 25342  	// result: (ZSELH x y mask)
 25343  	for {
 25344  		x := v_0
 25345  		mask := v_1
 25346  		y := v_2
 25347  		v.Reset(ssaop.OpARM64ZSELH)
 25348  		v.AddArg3(x, y, mask)
 25349  		return true
 25350  	}
 25351  }
 25352  func rewriteValue_OpIfElseInt32s(v *ssa.Value) bool {
 25353  	v_2 := v.Args[2]
 25354  	v_1 := v.Args[1]
 25355  	v_0 := v.Args[0]
 25356  	// match: (IfElseInt32s x mask y)
 25357  	// result: (ZSELS x y mask)
 25358  	for {
 25359  		x := v_0
 25360  		mask := v_1
 25361  		y := v_2
 25362  		v.Reset(ssaop.OpARM64ZSELS)
 25363  		v.AddArg3(x, y, mask)
 25364  		return true
 25365  	}
 25366  }
 25367  func rewriteValue_OpIfElseInt64s(v *ssa.Value) bool {
 25368  	v_2 := v.Args[2]
 25369  	v_1 := v.Args[1]
 25370  	v_0 := v.Args[0]
 25371  	// match: (IfElseInt64s x mask y)
 25372  	// result: (ZSELD x y mask)
 25373  	for {
 25374  		x := v_0
 25375  		mask := v_1
 25376  		y := v_2
 25377  		v.Reset(ssaop.OpARM64ZSELD)
 25378  		v.AddArg3(x, y, mask)
 25379  		return true
 25380  	}
 25381  }
 25382  func rewriteValue_OpIfElseInt8s(v *ssa.Value) bool {
 25383  	v_2 := v.Args[2]
 25384  	v_1 := v.Args[1]
 25385  	v_0 := v.Args[0]
 25386  	// match: (IfElseInt8s x mask y)
 25387  	// result: (ZSELB x y mask)
 25388  	for {
 25389  		x := v_0
 25390  		mask := v_1
 25391  		y := v_2
 25392  		v.Reset(ssaop.OpARM64ZSELB)
 25393  		v.AddArg3(x, y, mask)
 25394  		return true
 25395  	}
 25396  }
 25397  func rewriteValue_OpIfElseUint16s(v *ssa.Value) bool {
 25398  	v_2 := v.Args[2]
 25399  	v_1 := v.Args[1]
 25400  	v_0 := v.Args[0]
 25401  	// match: (IfElseUint16s x mask y)
 25402  	// result: (ZSELH x y mask)
 25403  	for {
 25404  		x := v_0
 25405  		mask := v_1
 25406  		y := v_2
 25407  		v.Reset(ssaop.OpARM64ZSELH)
 25408  		v.AddArg3(x, y, mask)
 25409  		return true
 25410  	}
 25411  }
 25412  func rewriteValue_OpIfElseUint32s(v *ssa.Value) bool {
 25413  	v_2 := v.Args[2]
 25414  	v_1 := v.Args[1]
 25415  	v_0 := v.Args[0]
 25416  	// match: (IfElseUint32s x mask y)
 25417  	// result: (ZSELS x y mask)
 25418  	for {
 25419  		x := v_0
 25420  		mask := v_1
 25421  		y := v_2
 25422  		v.Reset(ssaop.OpARM64ZSELS)
 25423  		v.AddArg3(x, y, mask)
 25424  		return true
 25425  	}
 25426  }
 25427  func rewriteValue_OpIfElseUint64s(v *ssa.Value) bool {
 25428  	v_2 := v.Args[2]
 25429  	v_1 := v.Args[1]
 25430  	v_0 := v.Args[0]
 25431  	// match: (IfElseUint64s x mask y)
 25432  	// result: (ZSELD x y mask)
 25433  	for {
 25434  		x := v_0
 25435  		mask := v_1
 25436  		y := v_2
 25437  		v.Reset(ssaop.OpARM64ZSELD)
 25438  		v.AddArg3(x, y, mask)
 25439  		return true
 25440  	}
 25441  }
 25442  func rewriteValue_OpIfElseUint8s(v *ssa.Value) bool {
 25443  	v_2 := v.Args[2]
 25444  	v_1 := v.Args[1]
 25445  	v_0 := v.Args[0]
 25446  	// match: (IfElseUint8s x mask y)
 25447  	// result: (ZSELB x y mask)
 25448  	for {
 25449  		x := v_0
 25450  		mask := v_1
 25451  		y := v_2
 25452  		v.Reset(ssaop.OpARM64ZSELB)
 25453  		v.AddArg3(x, y, mask)
 25454  		return true
 25455  	}
 25456  }
 25457  func rewriteValue_OpIsInBounds(v *ssa.Value) bool {
 25458  	v_1 := v.Args[1]
 25459  	v_0 := v.Args[0]
 25460  	b := v.Block
 25461  	// match: (IsInBounds idx len)
 25462  	// result: (LessThanU (CMP idx len))
 25463  	for {
 25464  		idx := v_0
 25465  		len := v_1
 25466  		v.Reset(ssaop.OpARM64LessThanU)
 25467  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 25468  		v0.AddArg2(idx, len)
 25469  		v.AddArg(v0)
 25470  		return true
 25471  	}
 25472  }
 25473  func rewriteValue_OpIsNonNil(v *ssa.Value) bool {
 25474  	v_0 := v.Args[0]
 25475  	b := v.Block
 25476  	// match: (IsNonNil ptr)
 25477  	// result: (NotEqual (CMPconst [0] ptr))
 25478  	for {
 25479  		ptr := v_0
 25480  		v.Reset(ssaop.OpARM64NotEqual)
 25481  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 25482  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 25483  		v0.AddArg(ptr)
 25484  		v.AddArg(v0)
 25485  		return true
 25486  	}
 25487  }
 25488  func rewriteValue_OpIsSliceInBounds(v *ssa.Value) bool {
 25489  	v_1 := v.Args[1]
 25490  	v_0 := v.Args[0]
 25491  	b := v.Block
 25492  	// match: (IsSliceInBounds idx len)
 25493  	// result: (LessEqualU (CMP idx len))
 25494  	for {
 25495  		idx := v_0
 25496  		len := v_1
 25497  		v.Reset(ssaop.OpARM64LessEqualU)
 25498  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 25499  		v0.AddArg2(idx, len)
 25500  		v.AddArg(v0)
 25501  		return true
 25502  	}
 25503  }
 25504  func rewriteValue_OpLeq16(v *ssa.Value) bool {
 25505  	v_1 := v.Args[1]
 25506  	v_0 := v.Args[0]
 25507  	b := v.Block
 25508  	typ := &b.Func.Config.Types
 25509  	// match: (Leq16 x y)
 25510  	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 25511  	for {
 25512  		x := v_0
 25513  		y := v_1
 25514  		v.Reset(ssaop.OpARM64LessEqual)
 25515  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25516  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 25517  		v1.AddArg(x)
 25518  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 25519  		v2.AddArg(y)
 25520  		v0.AddArg2(v1, v2)
 25521  		v.AddArg(v0)
 25522  		return true
 25523  	}
 25524  }
 25525  func rewriteValue_OpLeq16U(v *ssa.Value) bool {
 25526  	v_1 := v.Args[1]
 25527  	v_0 := v.Args[0]
 25528  	b := v.Block
 25529  	typ := &b.Func.Config.Types
 25530  	// match: (Leq16U x zero:(MOVDconst [0]))
 25531  	// result: (Eq16 x zero)
 25532  	for {
 25533  		x := v_0
 25534  		zero := v_1
 25535  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 25536  			break
 25537  		}
 25538  		v.Reset(ssaop.OpEq16)
 25539  		v.AddArg2(x, zero)
 25540  		return true
 25541  	}
 25542  	// match: (Leq16U (MOVDconst [1]) x)
 25543  	// result: (Neq16 (MOVDconst [0]) x)
 25544  	for {
 25545  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 25546  			break
 25547  		}
 25548  		x := v_1
 25549  		v.Reset(ssaop.OpNeq16)
 25550  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25551  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 25552  		v.AddArg2(v0, x)
 25553  		return true
 25554  	}
 25555  	// match: (Leq16U x y)
 25556  	// result: (LessEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 25557  	for {
 25558  		x := v_0
 25559  		y := v_1
 25560  		v.Reset(ssaop.OpARM64LessEqualU)
 25561  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25562  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 25563  		v1.AddArg(x)
 25564  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 25565  		v2.AddArg(y)
 25566  		v0.AddArg2(v1, v2)
 25567  		v.AddArg(v0)
 25568  		return true
 25569  	}
 25570  }
 25571  func rewriteValue_OpLeq32(v *ssa.Value) bool {
 25572  	v_1 := v.Args[1]
 25573  	v_0 := v.Args[0]
 25574  	b := v.Block
 25575  	// match: (Leq32 x y)
 25576  	// result: (LessEqual (CMPW x y))
 25577  	for {
 25578  		x := v_0
 25579  		y := v_1
 25580  		v.Reset(ssaop.OpARM64LessEqual)
 25581  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25582  		v0.AddArg2(x, y)
 25583  		v.AddArg(v0)
 25584  		return true
 25585  	}
 25586  }
 25587  func rewriteValue_OpLeq32F(v *ssa.Value) bool {
 25588  	v_1 := v.Args[1]
 25589  	v_0 := v.Args[0]
 25590  	b := v.Block
 25591  	// match: (Leq32F x y)
 25592  	// result: (LessEqualF (FCMPS x y))
 25593  	for {
 25594  		x := v_0
 25595  		y := v_1
 25596  		v.Reset(ssaop.OpARM64LessEqualF)
 25597  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 25598  		v0.AddArg2(x, y)
 25599  		v.AddArg(v0)
 25600  		return true
 25601  	}
 25602  }
 25603  func rewriteValue_OpLeq32U(v *ssa.Value) bool {
 25604  	v_1 := v.Args[1]
 25605  	v_0 := v.Args[0]
 25606  	b := v.Block
 25607  	typ := &b.Func.Config.Types
 25608  	// match: (Leq32U x zero:(MOVDconst [0]))
 25609  	// result: (Eq32 x zero)
 25610  	for {
 25611  		x := v_0
 25612  		zero := v_1
 25613  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 25614  			break
 25615  		}
 25616  		v.Reset(ssaop.OpEq32)
 25617  		v.AddArg2(x, zero)
 25618  		return true
 25619  	}
 25620  	// match: (Leq32U (MOVDconst [1]) x)
 25621  	// result: (Neq32 (MOVDconst [0]) x)
 25622  	for {
 25623  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 25624  			break
 25625  		}
 25626  		x := v_1
 25627  		v.Reset(ssaop.OpNeq32)
 25628  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25629  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 25630  		v.AddArg2(v0, x)
 25631  		return true
 25632  	}
 25633  	// match: (Leq32U x y)
 25634  	// result: (LessEqualU (CMPW x y))
 25635  	for {
 25636  		x := v_0
 25637  		y := v_1
 25638  		v.Reset(ssaop.OpARM64LessEqualU)
 25639  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25640  		v0.AddArg2(x, y)
 25641  		v.AddArg(v0)
 25642  		return true
 25643  	}
 25644  }
 25645  func rewriteValue_OpLeq64(v *ssa.Value) bool {
 25646  	v_1 := v.Args[1]
 25647  	v_0 := v.Args[0]
 25648  	b := v.Block
 25649  	// match: (Leq64 x y)
 25650  	// result: (LessEqual (CMP x y))
 25651  	for {
 25652  		x := v_0
 25653  		y := v_1
 25654  		v.Reset(ssaop.OpARM64LessEqual)
 25655  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 25656  		v0.AddArg2(x, y)
 25657  		v.AddArg(v0)
 25658  		return true
 25659  	}
 25660  }
 25661  func rewriteValue_OpLeq64F(v *ssa.Value) bool {
 25662  	v_1 := v.Args[1]
 25663  	v_0 := v.Args[0]
 25664  	b := v.Block
 25665  	// match: (Leq64F x y)
 25666  	// result: (LessEqualF (FCMPD x y))
 25667  	for {
 25668  		x := v_0
 25669  		y := v_1
 25670  		v.Reset(ssaop.OpARM64LessEqualF)
 25671  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 25672  		v0.AddArg2(x, y)
 25673  		v.AddArg(v0)
 25674  		return true
 25675  	}
 25676  }
 25677  func rewriteValue_OpLeq64U(v *ssa.Value) bool {
 25678  	v_1 := v.Args[1]
 25679  	v_0 := v.Args[0]
 25680  	b := v.Block
 25681  	typ := &b.Func.Config.Types
 25682  	// match: (Leq64U x zero:(MOVDconst [0]))
 25683  	// result: (Eq64 x zero)
 25684  	for {
 25685  		x := v_0
 25686  		zero := v_1
 25687  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 25688  			break
 25689  		}
 25690  		v.Reset(ssaop.OpEq64)
 25691  		v.AddArg2(x, zero)
 25692  		return true
 25693  	}
 25694  	// match: (Leq64U (MOVDconst [1]) x)
 25695  	// result: (Neq64 (MOVDconst [0]) x)
 25696  	for {
 25697  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 25698  			break
 25699  		}
 25700  		x := v_1
 25701  		v.Reset(ssaop.OpNeq64)
 25702  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25703  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 25704  		v.AddArg2(v0, x)
 25705  		return true
 25706  	}
 25707  	// match: (Leq64U x y)
 25708  	// result: (LessEqualU (CMP x y))
 25709  	for {
 25710  		x := v_0
 25711  		y := v_1
 25712  		v.Reset(ssaop.OpARM64LessEqualU)
 25713  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 25714  		v0.AddArg2(x, y)
 25715  		v.AddArg(v0)
 25716  		return true
 25717  	}
 25718  }
 25719  func rewriteValue_OpLeq8(v *ssa.Value) bool {
 25720  	v_1 := v.Args[1]
 25721  	v_0 := v.Args[0]
 25722  	b := v.Block
 25723  	typ := &b.Func.Config.Types
 25724  	// match: (Leq8 x y)
 25725  	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 25726  	for {
 25727  		x := v_0
 25728  		y := v_1
 25729  		v.Reset(ssaop.OpARM64LessEqual)
 25730  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25731  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 25732  		v1.AddArg(x)
 25733  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 25734  		v2.AddArg(y)
 25735  		v0.AddArg2(v1, v2)
 25736  		v.AddArg(v0)
 25737  		return true
 25738  	}
 25739  }
 25740  func rewriteValue_OpLeq8U(v *ssa.Value) bool {
 25741  	v_1 := v.Args[1]
 25742  	v_0 := v.Args[0]
 25743  	b := v.Block
 25744  	typ := &b.Func.Config.Types
 25745  	// match: (Leq8U x zero:(MOVDconst [0]))
 25746  	// result: (Eq8 x zero)
 25747  	for {
 25748  		x := v_0
 25749  		zero := v_1
 25750  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 25751  			break
 25752  		}
 25753  		v.Reset(ssaop.OpEq8)
 25754  		v.AddArg2(x, zero)
 25755  		return true
 25756  	}
 25757  	// match: (Leq8U (MOVDconst [1]) x)
 25758  	// result: (Neq8 (MOVDconst [0]) x)
 25759  	for {
 25760  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 25761  			break
 25762  		}
 25763  		x := v_1
 25764  		v.Reset(ssaop.OpNeq8)
 25765  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25766  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 25767  		v.AddArg2(v0, x)
 25768  		return true
 25769  	}
 25770  	// match: (Leq8U x y)
 25771  	// result: (LessEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 25772  	for {
 25773  		x := v_0
 25774  		y := v_1
 25775  		v.Reset(ssaop.OpARM64LessEqualU)
 25776  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25777  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 25778  		v1.AddArg(x)
 25779  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 25780  		v2.AddArg(y)
 25781  		v0.AddArg2(v1, v2)
 25782  		v.AddArg(v0)
 25783  		return true
 25784  	}
 25785  }
 25786  func rewriteValue_OpLess16(v *ssa.Value) bool {
 25787  	v_1 := v.Args[1]
 25788  	v_0 := v.Args[0]
 25789  	b := v.Block
 25790  	typ := &b.Func.Config.Types
 25791  	// match: (Less16 x y)
 25792  	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 25793  	for {
 25794  		x := v_0
 25795  		y := v_1
 25796  		v.Reset(ssaop.OpARM64LessThan)
 25797  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25798  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 25799  		v1.AddArg(x)
 25800  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 25801  		v2.AddArg(y)
 25802  		v0.AddArg2(v1, v2)
 25803  		v.AddArg(v0)
 25804  		return true
 25805  	}
 25806  }
 25807  func rewriteValue_OpLess16U(v *ssa.Value) bool {
 25808  	v_1 := v.Args[1]
 25809  	v_0 := v.Args[0]
 25810  	b := v.Block
 25811  	typ := &b.Func.Config.Types
 25812  	// match: (Less16U zero:(MOVDconst [0]) x)
 25813  	// result: (Neq16 zero x)
 25814  	for {
 25815  		zero := v_0
 25816  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 25817  			break
 25818  		}
 25819  		x := v_1
 25820  		v.Reset(ssaop.OpNeq16)
 25821  		v.AddArg2(zero, x)
 25822  		return true
 25823  	}
 25824  	// match: (Less16U x (MOVDconst [1]))
 25825  	// result: (Eq16 x (MOVDconst [0]))
 25826  	for {
 25827  		x := v_0
 25828  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 25829  			break
 25830  		}
 25831  		v.Reset(ssaop.OpEq16)
 25832  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25833  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 25834  		v.AddArg2(x, v0)
 25835  		return true
 25836  	}
 25837  	// match: (Less16U x y)
 25838  	// result: (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 25839  	for {
 25840  		x := v_0
 25841  		y := v_1
 25842  		v.Reset(ssaop.OpARM64LessThanU)
 25843  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25844  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 25845  		v1.AddArg(x)
 25846  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 25847  		v2.AddArg(y)
 25848  		v0.AddArg2(v1, v2)
 25849  		v.AddArg(v0)
 25850  		return true
 25851  	}
 25852  }
 25853  func rewriteValue_OpLess32(v *ssa.Value) bool {
 25854  	v_1 := v.Args[1]
 25855  	v_0 := v.Args[0]
 25856  	b := v.Block
 25857  	// match: (Less32 x y)
 25858  	// result: (LessThan (CMPW x y))
 25859  	for {
 25860  		x := v_0
 25861  		y := v_1
 25862  		v.Reset(ssaop.OpARM64LessThan)
 25863  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25864  		v0.AddArg2(x, y)
 25865  		v.AddArg(v0)
 25866  		return true
 25867  	}
 25868  }
 25869  func rewriteValue_OpLess32F(v *ssa.Value) bool {
 25870  	v_1 := v.Args[1]
 25871  	v_0 := v.Args[0]
 25872  	b := v.Block
 25873  	// match: (Less32F x y)
 25874  	// result: (LessThanF (FCMPS x y))
 25875  	for {
 25876  		x := v_0
 25877  		y := v_1
 25878  		v.Reset(ssaop.OpARM64LessThanF)
 25879  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 25880  		v0.AddArg2(x, y)
 25881  		v.AddArg(v0)
 25882  		return true
 25883  	}
 25884  }
 25885  func rewriteValue_OpLess32U(v *ssa.Value) bool {
 25886  	v_1 := v.Args[1]
 25887  	v_0 := v.Args[0]
 25888  	b := v.Block
 25889  	typ := &b.Func.Config.Types
 25890  	// match: (Less32U zero:(MOVDconst [0]) x)
 25891  	// result: (Neq32 zero x)
 25892  	for {
 25893  		zero := v_0
 25894  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 25895  			break
 25896  		}
 25897  		x := v_1
 25898  		v.Reset(ssaop.OpNeq32)
 25899  		v.AddArg2(zero, x)
 25900  		return true
 25901  	}
 25902  	// match: (Less32U x (MOVDconst [1]))
 25903  	// result: (Eq32 x (MOVDconst [0]))
 25904  	for {
 25905  		x := v_0
 25906  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 25907  			break
 25908  		}
 25909  		v.Reset(ssaop.OpEq32)
 25910  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25911  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 25912  		v.AddArg2(x, v0)
 25913  		return true
 25914  	}
 25915  	// match: (Less32U x y)
 25916  	// result: (LessThanU (CMPW x y))
 25917  	for {
 25918  		x := v_0
 25919  		y := v_1
 25920  		v.Reset(ssaop.OpARM64LessThanU)
 25921  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25922  		v0.AddArg2(x, y)
 25923  		v.AddArg(v0)
 25924  		return true
 25925  	}
 25926  }
 25927  func rewriteValue_OpLess64(v *ssa.Value) bool {
 25928  	v_1 := v.Args[1]
 25929  	v_0 := v.Args[0]
 25930  	b := v.Block
 25931  	// match: (Less64 x y)
 25932  	// result: (LessThan (CMP x y))
 25933  	for {
 25934  		x := v_0
 25935  		y := v_1
 25936  		v.Reset(ssaop.OpARM64LessThan)
 25937  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 25938  		v0.AddArg2(x, y)
 25939  		v.AddArg(v0)
 25940  		return true
 25941  	}
 25942  }
 25943  func rewriteValue_OpLess64F(v *ssa.Value) bool {
 25944  	v_1 := v.Args[1]
 25945  	v_0 := v.Args[0]
 25946  	b := v.Block
 25947  	// match: (Less64F x y)
 25948  	// result: (LessThanF (FCMPD x y))
 25949  	for {
 25950  		x := v_0
 25951  		y := v_1
 25952  		v.Reset(ssaop.OpARM64LessThanF)
 25953  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 25954  		v0.AddArg2(x, y)
 25955  		v.AddArg(v0)
 25956  		return true
 25957  	}
 25958  }
 25959  func rewriteValue_OpLess64U(v *ssa.Value) bool {
 25960  	v_1 := v.Args[1]
 25961  	v_0 := v.Args[0]
 25962  	b := v.Block
 25963  	typ := &b.Func.Config.Types
 25964  	// match: (Less64U zero:(MOVDconst [0]) x)
 25965  	// result: (Neq64 zero x)
 25966  	for {
 25967  		zero := v_0
 25968  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 25969  			break
 25970  		}
 25971  		x := v_1
 25972  		v.Reset(ssaop.OpNeq64)
 25973  		v.AddArg2(zero, x)
 25974  		return true
 25975  	}
 25976  	// match: (Less64U x (MOVDconst [1]))
 25977  	// result: (Eq64 x (MOVDconst [0]))
 25978  	for {
 25979  		x := v_0
 25980  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 25981  			break
 25982  		}
 25983  		v.Reset(ssaop.OpEq64)
 25984  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 25985  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 25986  		v.AddArg2(x, v0)
 25987  		return true
 25988  	}
 25989  	// match: (Less64U x y)
 25990  	// result: (LessThanU (CMP x y))
 25991  	for {
 25992  		x := v_0
 25993  		y := v_1
 25994  		v.Reset(ssaop.OpARM64LessThanU)
 25995  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 25996  		v0.AddArg2(x, y)
 25997  		v.AddArg(v0)
 25998  		return true
 25999  	}
 26000  }
 26001  func rewriteValue_OpLess8(v *ssa.Value) bool {
 26002  	v_1 := v.Args[1]
 26003  	v_0 := v.Args[0]
 26004  	b := v.Block
 26005  	typ := &b.Func.Config.Types
 26006  	// match: (Less8 x y)
 26007  	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 26008  	for {
 26009  		x := v_0
 26010  		y := v_1
 26011  		v.Reset(ssaop.OpARM64LessThan)
 26012  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 26013  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 26014  		v1.AddArg(x)
 26015  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 26016  		v2.AddArg(y)
 26017  		v0.AddArg2(v1, v2)
 26018  		v.AddArg(v0)
 26019  		return true
 26020  	}
 26021  }
 26022  func rewriteValue_OpLess8U(v *ssa.Value) bool {
 26023  	v_1 := v.Args[1]
 26024  	v_0 := v.Args[0]
 26025  	b := v.Block
 26026  	typ := &b.Func.Config.Types
 26027  	// match: (Less8U zero:(MOVDconst [0]) x)
 26028  	// result: (Neq8 zero x)
 26029  	for {
 26030  		zero := v_0
 26031  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 26032  			break
 26033  		}
 26034  		x := v_1
 26035  		v.Reset(ssaop.OpNeq8)
 26036  		v.AddArg2(zero, x)
 26037  		return true
 26038  	}
 26039  	// match: (Less8U x (MOVDconst [1]))
 26040  	// result: (Eq8 x (MOVDconst [0]))
 26041  	for {
 26042  		x := v_0
 26043  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 26044  			break
 26045  		}
 26046  		v.Reset(ssaop.OpEq8)
 26047  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26048  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 26049  		v.AddArg2(x, v0)
 26050  		return true
 26051  	}
 26052  	// match: (Less8U x y)
 26053  	// result: (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 26054  	for {
 26055  		x := v_0
 26056  		y := v_1
 26057  		v.Reset(ssaop.OpARM64LessThanU)
 26058  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 26059  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 26060  		v1.AddArg(x)
 26061  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 26062  		v2.AddArg(y)
 26063  		v0.AddArg2(v1, v2)
 26064  		v.AddArg(v0)
 26065  		return true
 26066  	}
 26067  }
 26068  func rewriteValue_OpLoad(v *ssa.Value) bool {
 26069  	v_1 := v.Args[1]
 26070  	v_0 := v.Args[0]
 26071  	// match: (Load <t> ptr mem)
 26072  	// cond: t.IsBoolean()
 26073  	// result: (MOVBUload ptr mem)
 26074  	for {
 26075  		t := v.Type
 26076  		ptr := v_0
 26077  		mem := v_1
 26078  		if !(t.IsBoolean()) {
 26079  			break
 26080  		}
 26081  		v.Reset(ssaop.OpARM64MOVBUload)
 26082  		v.AddArg2(ptr, mem)
 26083  		return true
 26084  	}
 26085  	// match: (Load <t> ptr mem)
 26086  	// cond: (ssa.Is8BitInt(t) && t.IsSigned())
 26087  	// result: (MOVBload ptr mem)
 26088  	for {
 26089  		t := v.Type
 26090  		ptr := v_0
 26091  		mem := v_1
 26092  		if !(ssa.Is8BitInt(t) && t.IsSigned()) {
 26093  			break
 26094  		}
 26095  		v.Reset(ssaop.OpARM64MOVBload)
 26096  		v.AddArg2(ptr, mem)
 26097  		return true
 26098  	}
 26099  	// match: (Load <t> ptr mem)
 26100  	// cond: (ssa.Is8BitInt(t) && !t.IsSigned())
 26101  	// result: (MOVBUload ptr mem)
 26102  	for {
 26103  		t := v.Type
 26104  		ptr := v_0
 26105  		mem := v_1
 26106  		if !(ssa.Is8BitInt(t) && !t.IsSigned()) {
 26107  			break
 26108  		}
 26109  		v.Reset(ssaop.OpARM64MOVBUload)
 26110  		v.AddArg2(ptr, mem)
 26111  		return true
 26112  	}
 26113  	// match: (Load <t> ptr mem)
 26114  	// cond: (ssa.Is16BitInt(t) && t.IsSigned())
 26115  	// result: (MOVHload ptr mem)
 26116  	for {
 26117  		t := v.Type
 26118  		ptr := v_0
 26119  		mem := v_1
 26120  		if !(ssa.Is16BitInt(t) && t.IsSigned()) {
 26121  			break
 26122  		}
 26123  		v.Reset(ssaop.OpARM64MOVHload)
 26124  		v.AddArg2(ptr, mem)
 26125  		return true
 26126  	}
 26127  	// match: (Load <t> ptr mem)
 26128  	// cond: (ssa.Is16BitInt(t) && !t.IsSigned())
 26129  	// result: (MOVHUload ptr mem)
 26130  	for {
 26131  		t := v.Type
 26132  		ptr := v_0
 26133  		mem := v_1
 26134  		if !(ssa.Is16BitInt(t) && !t.IsSigned()) {
 26135  			break
 26136  		}
 26137  		v.Reset(ssaop.OpARM64MOVHUload)
 26138  		v.AddArg2(ptr, mem)
 26139  		return true
 26140  	}
 26141  	// match: (Load <t> ptr mem)
 26142  	// cond: (ssa.Is32BitInt(t) && t.IsSigned())
 26143  	// result: (MOVWload ptr mem)
 26144  	for {
 26145  		t := v.Type
 26146  		ptr := v_0
 26147  		mem := v_1
 26148  		if !(ssa.Is32BitInt(t) && t.IsSigned()) {
 26149  			break
 26150  		}
 26151  		v.Reset(ssaop.OpARM64MOVWload)
 26152  		v.AddArg2(ptr, mem)
 26153  		return true
 26154  	}
 26155  	// match: (Load <t> ptr mem)
 26156  	// cond: (ssa.Is32BitInt(t) && !t.IsSigned())
 26157  	// result: (MOVWUload ptr mem)
 26158  	for {
 26159  		t := v.Type
 26160  		ptr := v_0
 26161  		mem := v_1
 26162  		if !(ssa.Is32BitInt(t) && !t.IsSigned()) {
 26163  			break
 26164  		}
 26165  		v.Reset(ssaop.OpARM64MOVWUload)
 26166  		v.AddArg2(ptr, mem)
 26167  		return true
 26168  	}
 26169  	// match: (Load <t> ptr mem)
 26170  	// cond: (ssa.Is64BitInt(t) ||ssa.IsPtr(t))
 26171  	// result: (MOVDload ptr mem)
 26172  	for {
 26173  		t := v.Type
 26174  		ptr := v_0
 26175  		mem := v_1
 26176  		if !(ssa.Is64BitInt(t) || ssa.IsPtr(t)) {
 26177  			break
 26178  		}
 26179  		v.Reset(ssaop.OpARM64MOVDload)
 26180  		v.AddArg2(ptr, mem)
 26181  		return true
 26182  	}
 26183  	// match: (Load <t> ptr mem)
 26184  	// cond: ssa.Is32BitFloat(t)
 26185  	// result: (FMOVSload ptr mem)
 26186  	for {
 26187  		t := v.Type
 26188  		ptr := v_0
 26189  		mem := v_1
 26190  		if !(ssa.Is32BitFloat(t)) {
 26191  			break
 26192  		}
 26193  		v.Reset(ssaop.OpARM64FMOVSload)
 26194  		v.AddArg2(ptr, mem)
 26195  		return true
 26196  	}
 26197  	// match: (Load <t> ptr mem)
 26198  	// cond: ssa.Is64BitFloat(t)
 26199  	// result: (FMOVDload ptr mem)
 26200  	for {
 26201  		t := v.Type
 26202  		ptr := v_0
 26203  		mem := v_1
 26204  		if !(ssa.Is64BitFloat(t)) {
 26205  			break
 26206  		}
 26207  		v.Reset(ssaop.OpARM64FMOVDload)
 26208  		v.AddArg2(ptr, mem)
 26209  		return true
 26210  	}
 26211  	// match: (Load <t> ptr mem)
 26212  	// cond: t.Size() == 16
 26213  	// result: (FMOVQload ptr mem)
 26214  	for {
 26215  		t := v.Type
 26216  		ptr := v_0
 26217  		mem := v_1
 26218  		if !(t.Size() == 16) {
 26219  			break
 26220  		}
 26221  		v.Reset(ssaop.OpARM64FMOVQload)
 26222  		v.AddArg2(ptr, mem)
 26223  		return true
 26224  	}
 26225  	// match: (Load <t> ptr mem)
 26226  	// cond: t.Size() == 32 && t.IsSIMD()
 26227  	// result: (ZLDRload ptr mem)
 26228  	for {
 26229  		t := v.Type
 26230  		ptr := v_0
 26231  		mem := v_1
 26232  		if !(t.Size() == 32 && t.IsSIMD()) {
 26233  			break
 26234  		}
 26235  		v.Reset(ssaop.OpARM64ZLDRload)
 26236  		v.AddArg2(ptr, mem)
 26237  		return true
 26238  	}
 26239  	// match: (Load <t> ptr mem)
 26240  	// cond: t.Size() == 8 && t.IsSIMD()
 26241  	// result: (PLDRload ptr mem)
 26242  	for {
 26243  		t := v.Type
 26244  		ptr := v_0
 26245  		mem := v_1
 26246  		if !(t.Size() == 8 && t.IsSIMD()) {
 26247  			break
 26248  		}
 26249  		v.Reset(ssaop.OpARM64PLDRload)
 26250  		v.AddArg2(ptr, mem)
 26251  		return true
 26252  	}
 26253  	return false
 26254  }
 26255  func rewriteValue_OpLoadMasked8(v *ssa.Value) bool {
 26256  	v_2 := v.Args[2]
 26257  	v_1 := v.Args[1]
 26258  	v_0 := v.Args[0]
 26259  	// match: (LoadMasked8 <t> ptr mask mem)
 26260  	// cond: t.Size() == 32
 26261  	// result: (ZLD1BPredload ptr mask mem)
 26262  	for {
 26263  		t := v.Type
 26264  		ptr := v_0
 26265  		mask := v_1
 26266  		mem := v_2
 26267  		if !(t.Size() == 32) {
 26268  			break
 26269  		}
 26270  		v.Reset(ssaop.OpARM64ZLD1BPredload)
 26271  		v.AddArg3(ptr, mask, mem)
 26272  		return true
 26273  	}
 26274  	return false
 26275  }
 26276  func rewriteValue_OpLocalAddr(v *ssa.Value) bool {
 26277  	v_1 := v.Args[1]
 26278  	v_0 := v.Args[0]
 26279  	b := v.Block
 26280  	typ := &b.Func.Config.Types
 26281  	// match: (LocalAddr <t> {sym} base mem)
 26282  	// cond: t.Elem().HasPointers()
 26283  	// result: (MOVDaddr {sym} (SPanchored base mem))
 26284  	for {
 26285  		t := v.Type
 26286  		sym := ssa.AuxToSym(v.Aux)
 26287  		base := v_0
 26288  		mem := v_1
 26289  		if !(t.Elem().HasPointers()) {
 26290  			break
 26291  		}
 26292  		v.Reset(ssaop.OpARM64MOVDaddr)
 26293  		v.Aux = ssa.SymToAux(sym)
 26294  		v0 := b.NewValue0(v.Pos, ssaop.OpSPanchored, typ.Uintptr)
 26295  		v0.AddArg2(base, mem)
 26296  		v.AddArg(v0)
 26297  		return true
 26298  	}
 26299  	// match: (LocalAddr <t> {sym} base _)
 26300  	// cond: !t.Elem().HasPointers()
 26301  	// result: (MOVDaddr {sym} base)
 26302  	for {
 26303  		t := v.Type
 26304  		sym := ssa.AuxToSym(v.Aux)
 26305  		base := v_0
 26306  		if !(!t.Elem().HasPointers()) {
 26307  			break
 26308  		}
 26309  		v.Reset(ssaop.OpARM64MOVDaddr)
 26310  		v.Aux = ssa.SymToAux(sym)
 26311  		v.AddArg(base)
 26312  		return true
 26313  	}
 26314  	return false
 26315  }
 26316  func rewriteValue_OpLsh64x16(v *ssa.Value) bool {
 26317  	v_1 := v.Args[1]
 26318  	v_0 := v.Args[0]
 26319  	b := v.Block
 26320  	typ := &b.Func.Config.Types
 26321  	// match: (Lsh64x16 <t> x y)
 26322  	// cond: ssa.ShiftIsBounded(v)
 26323  	// result: (SLL <t> x y)
 26324  	for {
 26325  		t := v.Type
 26326  		x := v_0
 26327  		y := v_1
 26328  		if !(ssa.ShiftIsBounded(v)) {
 26329  			break
 26330  		}
 26331  		v.Reset(ssaop.OpARM64SLL)
 26332  		v.Type = t
 26333  		v.AddArg2(x, y)
 26334  		return true
 26335  	}
 26336  	// match: (Lsh64x16 <t> [bounded] x y)
 26337  	// cond: !ssa.ShiftIsBounded(v)
 26338  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 26339  	for {
 26340  		t := v.Type
 26341  		bounded := ssa.AuxIntToBool(v.AuxInt)
 26342  		x := v_0
 26343  		y := v_1
 26344  		if !(!ssa.ShiftIsBounded(v)) {
 26345  			break
 26346  		}
 26347  		v.Reset(ssaop.OpLsh64x32)
 26348  		v.Type = t
 26349  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 26350  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 26351  		v0.AddArg(y)
 26352  		v.AddArg2(x, v0)
 26353  		return true
 26354  	}
 26355  	return false
 26356  }
 26357  func rewriteValue_OpLsh64x32(v *ssa.Value) bool {
 26358  	v_1 := v.Args[1]
 26359  	v_0 := v.Args[0]
 26360  	b := v.Block
 26361  	// match: (Lsh64x32 <t> x y)
 26362  	// cond: ssa.ShiftIsBounded(v)
 26363  	// result: (SLL <t> x y)
 26364  	for {
 26365  		t := v.Type
 26366  		x := v_0
 26367  		y := v_1
 26368  		if !(ssa.ShiftIsBounded(v)) {
 26369  			break
 26370  		}
 26371  		v.Reset(ssaop.OpARM64SLL)
 26372  		v.Type = t
 26373  		v.AddArg2(x, y)
 26374  		return true
 26375  	}
 26376  	// match: (Lsh64x32 <t> x y)
 26377  	// cond: !ssa.ShiftIsBounded(v)
 26378  	// result: (CSEL [ssaop.OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 26379  	for {
 26380  		t := v.Type
 26381  		x := v_0
 26382  		y := v_1
 26383  		if !(!ssa.ShiftIsBounded(v)) {
 26384  			break
 26385  		}
 26386  		v.Reset(ssaop.OpARM64CSEL)
 26387  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 26388  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 26389  		v0.AddArg2(x, y)
 26390  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 26391  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 26392  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 26393  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 26394  		v2.AddArg(y)
 26395  		v.AddArg3(v0, v1, v2)
 26396  		return true
 26397  	}
 26398  	return false
 26399  }
 26400  func rewriteValue_OpLsh64x64(v *ssa.Value) bool {
 26401  	v_1 := v.Args[1]
 26402  	v_0 := v.Args[0]
 26403  	b := v.Block
 26404  	// match: (Lsh64x64 <t> x y)
 26405  	// cond: ssa.ShiftIsBounded(v)
 26406  	// result: (SLL <t> x y)
 26407  	for {
 26408  		t := v.Type
 26409  		x := v_0
 26410  		y := v_1
 26411  		if !(ssa.ShiftIsBounded(v)) {
 26412  			break
 26413  		}
 26414  		v.Reset(ssaop.OpARM64SLL)
 26415  		v.Type = t
 26416  		v.AddArg2(x, y)
 26417  		return true
 26418  	}
 26419  	// match: (Lsh64x64 <t> x y)
 26420  	// cond: !ssa.ShiftIsBounded(v)
 26421  	// result: (CSEL [ssaop.OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 26422  	for {
 26423  		t := v.Type
 26424  		x := v_0
 26425  		y := v_1
 26426  		if !(!ssa.ShiftIsBounded(v)) {
 26427  			break
 26428  		}
 26429  		v.Reset(ssaop.OpARM64CSEL)
 26430  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 26431  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 26432  		v0.AddArg2(x, y)
 26433  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 26434  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 26435  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 26436  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 26437  		v2.AddArg(y)
 26438  		v.AddArg3(v0, v1, v2)
 26439  		return true
 26440  	}
 26441  	return false
 26442  }
 26443  func rewriteValue_OpLsh64x8(v *ssa.Value) bool {
 26444  	v_1 := v.Args[1]
 26445  	v_0 := v.Args[0]
 26446  	b := v.Block
 26447  	typ := &b.Func.Config.Types
 26448  	// match: (Lsh64x8 <t> x y)
 26449  	// cond: ssa.ShiftIsBounded(v)
 26450  	// result: (SLL <t> x y)
 26451  	for {
 26452  		t := v.Type
 26453  		x := v_0
 26454  		y := v_1
 26455  		if !(ssa.ShiftIsBounded(v)) {
 26456  			break
 26457  		}
 26458  		v.Reset(ssaop.OpARM64SLL)
 26459  		v.Type = t
 26460  		v.AddArg2(x, y)
 26461  		return true
 26462  	}
 26463  	// match: (Lsh64x8 <t> [bounded] x y)
 26464  	// cond: !ssa.ShiftIsBounded(v)
 26465  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 26466  	for {
 26467  		t := v.Type
 26468  		bounded := ssa.AuxIntToBool(v.AuxInt)
 26469  		x := v_0
 26470  		y := v_1
 26471  		if !(!ssa.ShiftIsBounded(v)) {
 26472  			break
 26473  		}
 26474  		v.Reset(ssaop.OpLsh64x32)
 26475  		v.Type = t
 26476  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 26477  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 26478  		v0.AddArg(y)
 26479  		v.AddArg2(x, v0)
 26480  		return true
 26481  	}
 26482  	return false
 26483  }
 26484  func rewriteValue_OpMax32FSel(v *ssa.Value) bool {
 26485  	v_1 := v.Args[1]
 26486  	v_0 := v.Args[0]
 26487  	b := v.Block
 26488  	// match: (Max32FSel x y)
 26489  	// result: (FCSELS [ssaop.OpARM64GreaterThanF] x y (FCMPS x y))
 26490  	for {
 26491  		x := v_0
 26492  		y := v_1
 26493  		v.Reset(ssaop.OpARM64FCSELS)
 26494  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64GreaterThanF)
 26495  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 26496  		v0.AddArg2(x, y)
 26497  		v.AddArg3(x, y, v0)
 26498  		return true
 26499  	}
 26500  }
 26501  func rewriteValue_OpMax64FSel(v *ssa.Value) bool {
 26502  	v_1 := v.Args[1]
 26503  	v_0 := v.Args[0]
 26504  	b := v.Block
 26505  	// match: (Max64FSel x y)
 26506  	// result: (FCSELD [ssaop.OpARM64GreaterThanF] x y (FCMPD x y))
 26507  	for {
 26508  		x := v_0
 26509  		y := v_1
 26510  		v.Reset(ssaop.OpARM64FCSELD)
 26511  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64GreaterThanF)
 26512  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 26513  		v0.AddArg2(x, y)
 26514  		v.AddArg3(x, y, v0)
 26515  		return true
 26516  	}
 26517  }
 26518  func rewriteValue_OpMin32FSel(v *ssa.Value) bool {
 26519  	v_1 := v.Args[1]
 26520  	v_0 := v.Args[0]
 26521  	b := v.Block
 26522  	// match: (Min32FSel x y)
 26523  	// result: (FCSELS [ssaop.OpARM64LessThanF] x y (FCMPS x y))
 26524  	for {
 26525  		x := v_0
 26526  		y := v_1
 26527  		v.Reset(ssaop.OpARM64FCSELS)
 26528  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanF)
 26529  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 26530  		v0.AddArg2(x, y)
 26531  		v.AddArg3(x, y, v0)
 26532  		return true
 26533  	}
 26534  }
 26535  func rewriteValue_OpMin64FSel(v *ssa.Value) bool {
 26536  	v_1 := v.Args[1]
 26537  	v_0 := v.Args[0]
 26538  	b := v.Block
 26539  	// match: (Min64FSel x y)
 26540  	// result: (FCSELD [ssaop.OpARM64LessThanF] x y (FCMPD x y))
 26541  	for {
 26542  		x := v_0
 26543  		y := v_1
 26544  		v.Reset(ssaop.OpARM64FCSELD)
 26545  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanF)
 26546  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 26547  		v0.AddArg2(x, y)
 26548  		v.AddArg3(x, y, v0)
 26549  		return true
 26550  	}
 26551  }
 26552  func rewriteValue_OpMod16(v *ssa.Value) bool {
 26553  	v_1 := v.Args[1]
 26554  	v_0 := v.Args[0]
 26555  	b := v.Block
 26556  	typ := &b.Func.Config.Types
 26557  	// match: (Mod16 x y)
 26558  	// result: (MODW (SignExt16to32 x) (SignExt16to32 y))
 26559  	for {
 26560  		x := v_0
 26561  		y := v_1
 26562  		v.Reset(ssaop.OpARM64MODW)
 26563  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 26564  		v0.AddArg(x)
 26565  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 26566  		v1.AddArg(y)
 26567  		v.AddArg2(v0, v1)
 26568  		return true
 26569  	}
 26570  }
 26571  func rewriteValue_OpMod16u(v *ssa.Value) bool {
 26572  	v_1 := v.Args[1]
 26573  	v_0 := v.Args[0]
 26574  	b := v.Block
 26575  	typ := &b.Func.Config.Types
 26576  	// match: (Mod16u x y)
 26577  	// result: (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y))
 26578  	for {
 26579  		x := v_0
 26580  		y := v_1
 26581  		v.Reset(ssaop.OpARM64UMODW)
 26582  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 26583  		v0.AddArg(x)
 26584  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 26585  		v1.AddArg(y)
 26586  		v.AddArg2(v0, v1)
 26587  		return true
 26588  	}
 26589  }
 26590  func rewriteValue_OpMod32(v *ssa.Value) bool {
 26591  	v_1 := v.Args[1]
 26592  	v_0 := v.Args[0]
 26593  	// match: (Mod32 x y)
 26594  	// result: (MODW x y)
 26595  	for {
 26596  		x := v_0
 26597  		y := v_1
 26598  		v.Reset(ssaop.OpARM64MODW)
 26599  		v.AddArg2(x, y)
 26600  		return true
 26601  	}
 26602  }
 26603  func rewriteValue_OpMod64(v *ssa.Value) bool {
 26604  	v_1 := v.Args[1]
 26605  	v_0 := v.Args[0]
 26606  	// match: (Mod64 x y)
 26607  	// result: (MOD x y)
 26608  	for {
 26609  		x := v_0
 26610  		y := v_1
 26611  		v.Reset(ssaop.OpARM64MOD)
 26612  		v.AddArg2(x, y)
 26613  		return true
 26614  	}
 26615  }
 26616  func rewriteValue_OpMod8(v *ssa.Value) bool {
 26617  	v_1 := v.Args[1]
 26618  	v_0 := v.Args[0]
 26619  	b := v.Block
 26620  	typ := &b.Func.Config.Types
 26621  	// match: (Mod8 x y)
 26622  	// result: (MODW (SignExt8to32 x) (SignExt8to32 y))
 26623  	for {
 26624  		x := v_0
 26625  		y := v_1
 26626  		v.Reset(ssaop.OpARM64MODW)
 26627  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 26628  		v0.AddArg(x)
 26629  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 26630  		v1.AddArg(y)
 26631  		v.AddArg2(v0, v1)
 26632  		return true
 26633  	}
 26634  }
 26635  func rewriteValue_OpMod8u(v *ssa.Value) bool {
 26636  	v_1 := v.Args[1]
 26637  	v_0 := v.Args[0]
 26638  	b := v.Block
 26639  	typ := &b.Func.Config.Types
 26640  	// match: (Mod8u x y)
 26641  	// result: (UMODW (ZeroExt8to32 x) (ZeroExt8to32 y))
 26642  	for {
 26643  		x := v_0
 26644  		y := v_1
 26645  		v.Reset(ssaop.OpARM64UMODW)
 26646  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 26647  		v0.AddArg(x)
 26648  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 26649  		v1.AddArg(y)
 26650  		v.AddArg2(v0, v1)
 26651  		return true
 26652  	}
 26653  }
 26654  func rewriteValue_OpMove(v *ssa.Value) bool {
 26655  	v_2 := v.Args[2]
 26656  	v_1 := v.Args[1]
 26657  	v_0 := v.Args[0]
 26658  	b := v.Block
 26659  	typ := &b.Func.Config.Types
 26660  	// match: (Move [0] _ _ mem)
 26661  	// result: mem
 26662  	for {
 26663  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 26664  			break
 26665  		}
 26666  		mem := v_2
 26667  		v.CopyOf(mem)
 26668  		return true
 26669  	}
 26670  	// match: (Move [1] dst src mem)
 26671  	// result: (MOVBstore dst (MOVBUload src mem) mem)
 26672  	for {
 26673  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
 26674  			break
 26675  		}
 26676  		dst := v_0
 26677  		src := v_1
 26678  		mem := v_2
 26679  		v.Reset(ssaop.OpARM64MOVBstore)
 26680  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 26681  		v0.AddArg2(src, mem)
 26682  		v.AddArg3(dst, v0, mem)
 26683  		return true
 26684  	}
 26685  	// match: (Move [2] dst src mem)
 26686  	// result: (MOVHstore dst (MOVHUload src mem) mem)
 26687  	for {
 26688  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
 26689  			break
 26690  		}
 26691  		dst := v_0
 26692  		src := v_1
 26693  		mem := v_2
 26694  		v.Reset(ssaop.OpARM64MOVHstore)
 26695  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 26696  		v0.AddArg2(src, mem)
 26697  		v.AddArg3(dst, v0, mem)
 26698  		return true
 26699  	}
 26700  	// match: (Move [3] dst src mem)
 26701  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
 26702  	for {
 26703  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
 26704  			break
 26705  		}
 26706  		dst := v_0
 26707  		src := v_1
 26708  		mem := v_2
 26709  		v.Reset(ssaop.OpARM64MOVBstore)
 26710  		v.AuxInt = ssa.Int32ToAuxInt(2)
 26711  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 26712  		v0.AuxInt = ssa.Int32ToAuxInt(2)
 26713  		v0.AddArg2(src, mem)
 26714  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHstore, types.TypeMem)
 26715  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 26716  		v2.AddArg2(src, mem)
 26717  		v1.AddArg3(dst, v2, mem)
 26718  		v.AddArg3(dst, v0, v1)
 26719  		return true
 26720  	}
 26721  	// match: (Move [4] dst src mem)
 26722  	// result: (MOVWstore dst (MOVWUload src mem) mem)
 26723  	for {
 26724  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
 26725  			break
 26726  		}
 26727  		dst := v_0
 26728  		src := v_1
 26729  		mem := v_2
 26730  		v.Reset(ssaop.OpARM64MOVWstore)
 26731  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 26732  		v0.AddArg2(src, mem)
 26733  		v.AddArg3(dst, v0, mem)
 26734  		return true
 26735  	}
 26736  	// match: (Move [5] dst src mem)
 26737  	// result: (MOVBstore [4] dst (MOVBUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 26738  	for {
 26739  		if ssa.AuxIntToInt64(v.AuxInt) != 5 {
 26740  			break
 26741  		}
 26742  		dst := v_0
 26743  		src := v_1
 26744  		mem := v_2
 26745  		v.Reset(ssaop.OpARM64MOVBstore)
 26746  		v.AuxInt = ssa.Int32ToAuxInt(4)
 26747  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 26748  		v0.AuxInt = ssa.Int32ToAuxInt(4)
 26749  		v0.AddArg2(src, mem)
 26750  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 26751  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 26752  		v2.AddArg2(src, mem)
 26753  		v1.AddArg3(dst, v2, mem)
 26754  		v.AddArg3(dst, v0, v1)
 26755  		return true
 26756  	}
 26757  	// match: (Move [6] dst src mem)
 26758  	// result: (MOVHstore [4] dst (MOVHUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 26759  	for {
 26760  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
 26761  			break
 26762  		}
 26763  		dst := v_0
 26764  		src := v_1
 26765  		mem := v_2
 26766  		v.Reset(ssaop.OpARM64MOVHstore)
 26767  		v.AuxInt = ssa.Int32ToAuxInt(4)
 26768  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 26769  		v0.AuxInt = ssa.Int32ToAuxInt(4)
 26770  		v0.AddArg2(src, mem)
 26771  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 26772  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 26773  		v2.AddArg2(src, mem)
 26774  		v1.AddArg3(dst, v2, mem)
 26775  		v.AddArg3(dst, v0, v1)
 26776  		return true
 26777  	}
 26778  	// match: (Move [7] dst src mem)
 26779  	// result: (MOVWstore [3] dst (MOVWUload [3] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 26780  	for {
 26781  		if ssa.AuxIntToInt64(v.AuxInt) != 7 {
 26782  			break
 26783  		}
 26784  		dst := v_0
 26785  		src := v_1
 26786  		mem := v_2
 26787  		v.Reset(ssaop.OpARM64MOVWstore)
 26788  		v.AuxInt = ssa.Int32ToAuxInt(3)
 26789  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 26790  		v0.AuxInt = ssa.Int32ToAuxInt(3)
 26791  		v0.AddArg2(src, mem)
 26792  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 26793  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 26794  		v2.AddArg2(src, mem)
 26795  		v1.AddArg3(dst, v2, mem)
 26796  		v.AddArg3(dst, v0, v1)
 26797  		return true
 26798  	}
 26799  	// match: (Move [8] dst src mem)
 26800  	// result: (MOVDstore dst (MOVDload src mem) mem)
 26801  	for {
 26802  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
 26803  			break
 26804  		}
 26805  		dst := v_0
 26806  		src := v_1
 26807  		mem := v_2
 26808  		v.Reset(ssaop.OpARM64MOVDstore)
 26809  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26810  		v0.AddArg2(src, mem)
 26811  		v.AddArg3(dst, v0, mem)
 26812  		return true
 26813  	}
 26814  	// match: (Move [9] dst src mem)
 26815  	// result: (MOVBstore [8] dst (MOVBUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 26816  	for {
 26817  		if ssa.AuxIntToInt64(v.AuxInt) != 9 {
 26818  			break
 26819  		}
 26820  		dst := v_0
 26821  		src := v_1
 26822  		mem := v_2
 26823  		v.Reset(ssaop.OpARM64MOVBstore)
 26824  		v.AuxInt = ssa.Int32ToAuxInt(8)
 26825  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 26826  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 26827  		v0.AddArg2(src, mem)
 26828  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 26829  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26830  		v2.AddArg2(src, mem)
 26831  		v1.AddArg3(dst, v2, mem)
 26832  		v.AddArg3(dst, v0, v1)
 26833  		return true
 26834  	}
 26835  	// match: (Move [10] dst src mem)
 26836  	// result: (MOVHstore [8] dst (MOVHUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 26837  	for {
 26838  		if ssa.AuxIntToInt64(v.AuxInt) != 10 {
 26839  			break
 26840  		}
 26841  		dst := v_0
 26842  		src := v_1
 26843  		mem := v_2
 26844  		v.Reset(ssaop.OpARM64MOVHstore)
 26845  		v.AuxInt = ssa.Int32ToAuxInt(8)
 26846  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 26847  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 26848  		v0.AddArg2(src, mem)
 26849  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 26850  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26851  		v2.AddArg2(src, mem)
 26852  		v1.AddArg3(dst, v2, mem)
 26853  		v.AddArg3(dst, v0, v1)
 26854  		return true
 26855  	}
 26856  	// match: (Move [11] dst src mem)
 26857  	// result: (MOVDstore [3] dst (MOVDload [3] src mem) (MOVDstore dst (MOVDload src mem) mem))
 26858  	for {
 26859  		if ssa.AuxIntToInt64(v.AuxInt) != 11 {
 26860  			break
 26861  		}
 26862  		dst := v_0
 26863  		src := v_1
 26864  		mem := v_2
 26865  		v.Reset(ssaop.OpARM64MOVDstore)
 26866  		v.AuxInt = ssa.Int32ToAuxInt(3)
 26867  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26868  		v0.AuxInt = ssa.Int32ToAuxInt(3)
 26869  		v0.AddArg2(src, mem)
 26870  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 26871  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26872  		v2.AddArg2(src, mem)
 26873  		v1.AddArg3(dst, v2, mem)
 26874  		v.AddArg3(dst, v0, v1)
 26875  		return true
 26876  	}
 26877  	// match: (Move [12] dst src mem)
 26878  	// result: (MOVWstore [8] dst (MOVWUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 26879  	for {
 26880  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
 26881  			break
 26882  		}
 26883  		dst := v_0
 26884  		src := v_1
 26885  		mem := v_2
 26886  		v.Reset(ssaop.OpARM64MOVWstore)
 26887  		v.AuxInt = ssa.Int32ToAuxInt(8)
 26888  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 26889  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 26890  		v0.AddArg2(src, mem)
 26891  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 26892  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26893  		v2.AddArg2(src, mem)
 26894  		v1.AddArg3(dst, v2, mem)
 26895  		v.AddArg3(dst, v0, v1)
 26896  		return true
 26897  	}
 26898  	// match: (Move [13] dst src mem)
 26899  	// result: (MOVDstore [5] dst (MOVDload [5] src mem) (MOVDstore dst (MOVDload src mem) mem))
 26900  	for {
 26901  		if ssa.AuxIntToInt64(v.AuxInt) != 13 {
 26902  			break
 26903  		}
 26904  		dst := v_0
 26905  		src := v_1
 26906  		mem := v_2
 26907  		v.Reset(ssaop.OpARM64MOVDstore)
 26908  		v.AuxInt = ssa.Int32ToAuxInt(5)
 26909  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26910  		v0.AuxInt = ssa.Int32ToAuxInt(5)
 26911  		v0.AddArg2(src, mem)
 26912  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 26913  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26914  		v2.AddArg2(src, mem)
 26915  		v1.AddArg3(dst, v2, mem)
 26916  		v.AddArg3(dst, v0, v1)
 26917  		return true
 26918  	}
 26919  	// match: (Move [14] dst src mem)
 26920  	// result: (MOVDstore [6] dst (MOVDload [6] src mem) (MOVDstore dst (MOVDload src mem) mem))
 26921  	for {
 26922  		if ssa.AuxIntToInt64(v.AuxInt) != 14 {
 26923  			break
 26924  		}
 26925  		dst := v_0
 26926  		src := v_1
 26927  		mem := v_2
 26928  		v.Reset(ssaop.OpARM64MOVDstore)
 26929  		v.AuxInt = ssa.Int32ToAuxInt(6)
 26930  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26931  		v0.AuxInt = ssa.Int32ToAuxInt(6)
 26932  		v0.AddArg2(src, mem)
 26933  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 26934  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26935  		v2.AddArg2(src, mem)
 26936  		v1.AddArg3(dst, v2, mem)
 26937  		v.AddArg3(dst, v0, v1)
 26938  		return true
 26939  	}
 26940  	// match: (Move [15] dst src mem)
 26941  	// result: (MOVDstore [7] dst (MOVDload [7] src mem) (MOVDstore dst (MOVDload src mem) mem))
 26942  	for {
 26943  		if ssa.AuxIntToInt64(v.AuxInt) != 15 {
 26944  			break
 26945  		}
 26946  		dst := v_0
 26947  		src := v_1
 26948  		mem := v_2
 26949  		v.Reset(ssaop.OpARM64MOVDstore)
 26950  		v.AuxInt = ssa.Int32ToAuxInt(7)
 26951  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26952  		v0.AuxInt = ssa.Int32ToAuxInt(7)
 26953  		v0.AddArg2(src, mem)
 26954  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 26955  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26956  		v2.AddArg2(src, mem)
 26957  		v1.AddArg3(dst, v2, mem)
 26958  		v.AddArg3(dst, v0, v1)
 26959  		return true
 26960  	}
 26961  	// match: (Move [16] dst src mem)
 26962  	// result: (FMOVQstore dst (FMOVQload src mem) mem)
 26963  	for {
 26964  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
 26965  			break
 26966  		}
 26967  		dst := v_0
 26968  		src := v_1
 26969  		mem := v_2
 26970  		v.Reset(ssaop.OpARM64FMOVQstore)
 26971  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 26972  		v0.AddArg2(src, mem)
 26973  		v.AddArg3(dst, v0, mem)
 26974  		return true
 26975  	}
 26976  	// match: (Move [s] dst src mem)
 26977  	// cond: s > 16 && s <= 24
 26978  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 26979  	for {
 26980  		s := ssa.AuxIntToInt64(v.AuxInt)
 26981  		dst := v_0
 26982  		src := v_1
 26983  		mem := v_2
 26984  		if !(s > 16 && s <= 24) {
 26985  			break
 26986  		}
 26987  		v.Reset(ssaop.OpARM64MOVDstore)
 26988  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 26989  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 26990  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 26991  		v0.AddArg2(src, mem)
 26992  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQstore, types.TypeMem)
 26993  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 26994  		v2.AddArg2(src, mem)
 26995  		v1.AddArg3(dst, v2, mem)
 26996  		v.AddArg3(dst, v0, v1)
 26997  		return true
 26998  	}
 26999  	// match: (Move [s] dst src mem)
 27000  	// cond: s > 24 && s < 32
 27001  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 27002  	for {
 27003  		s := ssa.AuxIntToInt64(v.AuxInt)
 27004  		dst := v_0
 27005  		src := v_1
 27006  		mem := v_2
 27007  		if !(s > 24 && s < 32) {
 27008  			break
 27009  		}
 27010  		v.Reset(ssaop.OpARM64FMOVQstore)
 27011  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 27012  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 27013  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 27014  		v0.AddArg2(src, mem)
 27015  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQstore, types.TypeMem)
 27016  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 27017  		v2.AddArg2(src, mem)
 27018  		v1.AddArg3(dst, v2, mem)
 27019  		v.AddArg3(dst, v0, v1)
 27020  		return true
 27021  	}
 27022  	// match: (Move [32] dst src mem)
 27023  	// result: (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem)
 27024  	for {
 27025  		if ssa.AuxIntToInt64(v.AuxInt) != 32 {
 27026  			break
 27027  		}
 27028  		dst := v_0
 27029  		src := v_1
 27030  		mem := v_2
 27031  		v.Reset(ssaop.OpARM64FSTPQ)
 27032  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 27033  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 27034  		v1.AddArg2(src, mem)
 27035  		v0.AddArg(v1)
 27036  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 27037  		v2.AddArg(v1)
 27038  		v.AddArg4(dst, v0, v2, mem)
 27039  		return true
 27040  	}
 27041  	// match: (Move [s] dst src mem)
 27042  	// cond: s > 32 && s <= 40
 27043  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 27044  	for {
 27045  		s := ssa.AuxIntToInt64(v.AuxInt)
 27046  		dst := v_0
 27047  		src := v_1
 27048  		mem := v_2
 27049  		if !(s > 32 && s <= 40) {
 27050  			break
 27051  		}
 27052  		v.Reset(ssaop.OpARM64MOVDstore)
 27053  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 27054  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 27055  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 27056  		v0.AddArg2(src, mem)
 27057  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 27058  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 27059  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 27060  		v3.AddArg2(src, mem)
 27061  		v2.AddArg(v3)
 27062  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 27063  		v4.AddArg(v3)
 27064  		v1.AddArg4(dst, v2, v4, mem)
 27065  		v.AddArg3(dst, v0, v1)
 27066  		return true
 27067  	}
 27068  	// match: (Move [s] dst src mem)
 27069  	// cond: s > 40 && s <= 48
 27070  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 27071  	for {
 27072  		s := ssa.AuxIntToInt64(v.AuxInt)
 27073  		dst := v_0
 27074  		src := v_1
 27075  		mem := v_2
 27076  		if !(s > 40 && s <= 48) {
 27077  			break
 27078  		}
 27079  		v.Reset(ssaop.OpARM64FMOVQstore)
 27080  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 27081  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 27082  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 27083  		v0.AddArg2(src, mem)
 27084  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 27085  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 27086  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 27087  		v3.AddArg2(src, mem)
 27088  		v2.AddArg(v3)
 27089  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 27090  		v4.AddArg(v3)
 27091  		v1.AddArg4(dst, v2, v4, mem)
 27092  		v.AddArg3(dst, v0, v1)
 27093  		return true
 27094  	}
 27095  	// match: (Move [s] dst src mem)
 27096  	// cond: s > 48 && s <= 64
 27097  	// result: (FSTPQ [int32(s-32)] dst (Select0 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (Select1 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 27098  	for {
 27099  		s := ssa.AuxIntToInt64(v.AuxInt)
 27100  		dst := v_0
 27101  		src := v_1
 27102  		mem := v_2
 27103  		if !(s > 48 && s <= 64) {
 27104  			break
 27105  		}
 27106  		v.Reset(ssaop.OpARM64FSTPQ)
 27107  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 32))
 27108  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 27109  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 27110  		v1.AuxInt = ssa.Int32ToAuxInt(int32(s - 32))
 27111  		v1.AddArg2(src, mem)
 27112  		v0.AddArg(v1)
 27113  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 27114  		v2.AddArg(v1)
 27115  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 27116  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 27117  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 27118  		v5.AddArg2(src, mem)
 27119  		v4.AddArg(v5)
 27120  		v6 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 27121  		v6.AddArg(v5)
 27122  		v3.AddArg4(dst, v4, v6, mem)
 27123  		v.AddArg4(dst, v0, v2, v3)
 27124  		return true
 27125  	}
 27126  	// match: (Move [s] dst src mem)
 27127  	// cond: s > 64 && s < 192 && ssa.LogLargeCopyValue(v, s)
 27128  	// result: (LoweredMove [s] dst src mem)
 27129  	for {
 27130  		s := ssa.AuxIntToInt64(v.AuxInt)
 27131  		dst := v_0
 27132  		src := v_1
 27133  		mem := v_2
 27134  		if !(s > 64 && s < 192 && ssa.LogLargeCopyValue(v, s)) {
 27135  			break
 27136  		}
 27137  		v.Reset(ssaop.OpARM64LoweredMove)
 27138  		v.AuxInt = ssa.Int64ToAuxInt(s)
 27139  		v.AddArg3(dst, src, mem)
 27140  		return true
 27141  	}
 27142  	// match: (Move [s] dst src mem)
 27143  	// cond: s >= 192 && ssa.LogLargeCopyValue(v, s)
 27144  	// result: (LoweredMoveLoop [s] dst src mem)
 27145  	for {
 27146  		s := ssa.AuxIntToInt64(v.AuxInt)
 27147  		dst := v_0
 27148  		src := v_1
 27149  		mem := v_2
 27150  		if !(s >= 192 && ssa.LogLargeCopyValue(v, s)) {
 27151  			break
 27152  		}
 27153  		v.Reset(ssaop.OpARM64LoweredMoveLoop)
 27154  		v.AuxInt = ssa.Int64ToAuxInt(s)
 27155  		v.AddArg3(dst, src, mem)
 27156  		return true
 27157  	}
 27158  	return false
 27159  }
 27160  func rewriteValue_OpMulAddFloat32x4(v *ssa.Value) bool {
 27161  	v_2 := v.Args[2]
 27162  	v_1 := v.Args[1]
 27163  	v_0 := v.Args[0]
 27164  	// match: (MulAddFloat32x4 x y z)
 27165  	// result: (VFMLA4S z x y)
 27166  	for {
 27167  		x := v_0
 27168  		y := v_1
 27169  		z := v_2
 27170  		v.Reset(ssaop.OpARM64VFMLA4S)
 27171  		v.AddArg3(z, x, y)
 27172  		return true
 27173  	}
 27174  }
 27175  func rewriteValue_OpMulAddFloat64x2(v *ssa.Value) bool {
 27176  	v_2 := v.Args[2]
 27177  	v_1 := v.Args[1]
 27178  	v_0 := v.Args[0]
 27179  	// match: (MulAddFloat64x2 x y z)
 27180  	// result: (VFMLA2D z x y)
 27181  	for {
 27182  		x := v_0
 27183  		y := v_1
 27184  		z := v_2
 27185  		v.Reset(ssaop.OpARM64VFMLA2D)
 27186  		v.AddArg3(z, x, y)
 27187  		return true
 27188  	}
 27189  }
 27190  func rewriteValue_OpMulAddInt16x8(v *ssa.Value) bool {
 27191  	v_2 := v.Args[2]
 27192  	v_1 := v.Args[1]
 27193  	v_0 := v.Args[0]
 27194  	// match: (MulAddInt16x8 x y z)
 27195  	// result: (VMLA8H z x y)
 27196  	for {
 27197  		x := v_0
 27198  		y := v_1
 27199  		z := v_2
 27200  		v.Reset(ssaop.OpARM64VMLA8H)
 27201  		v.AddArg3(z, x, y)
 27202  		return true
 27203  	}
 27204  }
 27205  func rewriteValue_OpMulAddInt32x4(v *ssa.Value) bool {
 27206  	v_2 := v.Args[2]
 27207  	v_1 := v.Args[1]
 27208  	v_0 := v.Args[0]
 27209  	// match: (MulAddInt32x4 x y z)
 27210  	// result: (VMLA4S z x y)
 27211  	for {
 27212  		x := v_0
 27213  		y := v_1
 27214  		z := v_2
 27215  		v.Reset(ssaop.OpARM64VMLA4S)
 27216  		v.AddArg3(z, x, y)
 27217  		return true
 27218  	}
 27219  }
 27220  func rewriteValue_OpMulAddInt8x16(v *ssa.Value) bool {
 27221  	v_2 := v.Args[2]
 27222  	v_1 := v.Args[1]
 27223  	v_0 := v.Args[0]
 27224  	// match: (MulAddInt8x16 x y z)
 27225  	// result: (VMLA16B z x y)
 27226  	for {
 27227  		x := v_0
 27228  		y := v_1
 27229  		z := v_2
 27230  		v.Reset(ssaop.OpARM64VMLA16B)
 27231  		v.AddArg3(z, x, y)
 27232  		return true
 27233  	}
 27234  }
 27235  func rewriteValue_OpMulAddUint16x8(v *ssa.Value) bool {
 27236  	v_2 := v.Args[2]
 27237  	v_1 := v.Args[1]
 27238  	v_0 := v.Args[0]
 27239  	// match: (MulAddUint16x8 x y z)
 27240  	// result: (VMLA8H z x y)
 27241  	for {
 27242  		x := v_0
 27243  		y := v_1
 27244  		z := v_2
 27245  		v.Reset(ssaop.OpARM64VMLA8H)
 27246  		v.AddArg3(z, x, y)
 27247  		return true
 27248  	}
 27249  }
 27250  func rewriteValue_OpMulAddUint32x4(v *ssa.Value) bool {
 27251  	v_2 := v.Args[2]
 27252  	v_1 := v.Args[1]
 27253  	v_0 := v.Args[0]
 27254  	// match: (MulAddUint32x4 x y z)
 27255  	// result: (VMLA4S z x y)
 27256  	for {
 27257  		x := v_0
 27258  		y := v_1
 27259  		z := v_2
 27260  		v.Reset(ssaop.OpARM64VMLA4S)
 27261  		v.AddArg3(z, x, y)
 27262  		return true
 27263  	}
 27264  }
 27265  func rewriteValue_OpMulAddUint8x16(v *ssa.Value) bool {
 27266  	v_2 := v.Args[2]
 27267  	v_1 := v.Args[1]
 27268  	v_0 := v.Args[0]
 27269  	// match: (MulAddUint8x16 x y z)
 27270  	// result: (VMLA16B z x y)
 27271  	for {
 27272  		x := v_0
 27273  		y := v_1
 27274  		z := v_2
 27275  		v.Reset(ssaop.OpARM64VMLA16B)
 27276  		v.AddArg3(z, x, y)
 27277  		return true
 27278  	}
 27279  }
 27280  func rewriteValue_OpMulHighInt16s(v *ssa.Value) bool {
 27281  	v_1 := v.Args[1]
 27282  	v_0 := v.Args[0]
 27283  	b := v.Block
 27284  	typ := &b.Func.Config.Types
 27285  	// match: (MulHighInt16s x y)
 27286  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27287  	// result: (ZSMULHH x y)
 27288  	for {
 27289  		x := v_0
 27290  		y := v_1
 27291  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27292  			break
 27293  		}
 27294  		v.Reset(ssaop.OpARM64ZSMULHH)
 27295  		v.AddArg2(x, y)
 27296  		return true
 27297  	}
 27298  	// match: (MulHighInt16s x y)
 27299  	// result: (ZSMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27300  	for {
 27301  		x := v_0
 27302  		y := v_1
 27303  		v.Reset(ssaop.OpARM64ZSMULHMergingH)
 27304  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27305  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27306  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27307  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27308  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27309  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27310  		v1.AddArg2(v2, v3)
 27311  		v0.AddArg(v1)
 27312  		v.AddArg3(x, y, v0)
 27313  		return true
 27314  	}
 27315  }
 27316  func rewriteValue_OpMulHighInt32s(v *ssa.Value) bool {
 27317  	v_1 := v.Args[1]
 27318  	v_0 := v.Args[0]
 27319  	b := v.Block
 27320  	typ := &b.Func.Config.Types
 27321  	// match: (MulHighInt32s x y)
 27322  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27323  	// result: (ZSMULHS x y)
 27324  	for {
 27325  		x := v_0
 27326  		y := v_1
 27327  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27328  			break
 27329  		}
 27330  		v.Reset(ssaop.OpARM64ZSMULHS)
 27331  		v.AddArg2(x, y)
 27332  		return true
 27333  	}
 27334  	// match: (MulHighInt32s x y)
 27335  	// result: (ZSMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27336  	for {
 27337  		x := v_0
 27338  		y := v_1
 27339  		v.Reset(ssaop.OpARM64ZSMULHMergingS)
 27340  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27341  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27342  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27343  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27344  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27345  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27346  		v1.AddArg2(v2, v3)
 27347  		v0.AddArg(v1)
 27348  		v.AddArg3(x, y, v0)
 27349  		return true
 27350  	}
 27351  }
 27352  func rewriteValue_OpMulHighInt64s(v *ssa.Value) bool {
 27353  	v_1 := v.Args[1]
 27354  	v_0 := v.Args[0]
 27355  	b := v.Block
 27356  	typ := &b.Func.Config.Types
 27357  	// match: (MulHighInt64s x y)
 27358  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27359  	// result: (ZSMULHD x y)
 27360  	for {
 27361  		x := v_0
 27362  		y := v_1
 27363  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27364  			break
 27365  		}
 27366  		v.Reset(ssaop.OpARM64ZSMULHD)
 27367  		v.AddArg2(x, y)
 27368  		return true
 27369  	}
 27370  	// match: (MulHighInt64s x y)
 27371  	// result: (ZSMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27372  	for {
 27373  		x := v_0
 27374  		y := v_1
 27375  		v.Reset(ssaop.OpARM64ZSMULHMergingD)
 27376  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27377  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27378  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27379  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27380  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27381  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27382  		v1.AddArg2(v2, v3)
 27383  		v0.AddArg(v1)
 27384  		v.AddArg3(x, y, v0)
 27385  		return true
 27386  	}
 27387  }
 27388  func rewriteValue_OpMulHighInt8s(v *ssa.Value) bool {
 27389  	v_1 := v.Args[1]
 27390  	v_0 := v.Args[0]
 27391  	b := v.Block
 27392  	typ := &b.Func.Config.Types
 27393  	// match: (MulHighInt8s x y)
 27394  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27395  	// result: (ZSMULHB x y)
 27396  	for {
 27397  		x := v_0
 27398  		y := v_1
 27399  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27400  			break
 27401  		}
 27402  		v.Reset(ssaop.OpARM64ZSMULHB)
 27403  		v.AddArg2(x, y)
 27404  		return true
 27405  	}
 27406  	// match: (MulHighInt8s x y)
 27407  	// result: (ZSMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 27408  	for {
 27409  		x := v_0
 27410  		y := v_1
 27411  		v.Reset(ssaop.OpARM64ZSMULHMergingB)
 27412  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27413  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 27414  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27415  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27416  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27417  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 27418  		v1.AddArg2(v2, v3)
 27419  		v0.AddArg(v1)
 27420  		v.AddArg3(x, y, v0)
 27421  		return true
 27422  	}
 27423  }
 27424  func rewriteValue_OpMulHighUint16s(v *ssa.Value) bool {
 27425  	v_1 := v.Args[1]
 27426  	v_0 := v.Args[0]
 27427  	b := v.Block
 27428  	typ := &b.Func.Config.Types
 27429  	// match: (MulHighUint16s x y)
 27430  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27431  	// result: (ZUMULHH x y)
 27432  	for {
 27433  		x := v_0
 27434  		y := v_1
 27435  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27436  			break
 27437  		}
 27438  		v.Reset(ssaop.OpARM64ZUMULHH)
 27439  		v.AddArg2(x, y)
 27440  		return true
 27441  	}
 27442  	// match: (MulHighUint16s x y)
 27443  	// result: (ZUMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27444  	for {
 27445  		x := v_0
 27446  		y := v_1
 27447  		v.Reset(ssaop.OpARM64ZUMULHMergingH)
 27448  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27449  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27450  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27451  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27452  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27453  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27454  		v1.AddArg2(v2, v3)
 27455  		v0.AddArg(v1)
 27456  		v.AddArg3(x, y, v0)
 27457  		return true
 27458  	}
 27459  }
 27460  func rewriteValue_OpMulHighUint32s(v *ssa.Value) bool {
 27461  	v_1 := v.Args[1]
 27462  	v_0 := v.Args[0]
 27463  	b := v.Block
 27464  	typ := &b.Func.Config.Types
 27465  	// match: (MulHighUint32s x y)
 27466  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27467  	// result: (ZUMULHS x y)
 27468  	for {
 27469  		x := v_0
 27470  		y := v_1
 27471  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27472  			break
 27473  		}
 27474  		v.Reset(ssaop.OpARM64ZUMULHS)
 27475  		v.AddArg2(x, y)
 27476  		return true
 27477  	}
 27478  	// match: (MulHighUint32s x y)
 27479  	// result: (ZUMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27480  	for {
 27481  		x := v_0
 27482  		y := v_1
 27483  		v.Reset(ssaop.OpARM64ZUMULHMergingS)
 27484  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27485  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27486  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27487  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27488  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27489  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27490  		v1.AddArg2(v2, v3)
 27491  		v0.AddArg(v1)
 27492  		v.AddArg3(x, y, v0)
 27493  		return true
 27494  	}
 27495  }
 27496  func rewriteValue_OpMulHighUint64s(v *ssa.Value) bool {
 27497  	v_1 := v.Args[1]
 27498  	v_0 := v.Args[0]
 27499  	b := v.Block
 27500  	typ := &b.Func.Config.Types
 27501  	// match: (MulHighUint64s x y)
 27502  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27503  	// result: (ZUMULHD x y)
 27504  	for {
 27505  		x := v_0
 27506  		y := v_1
 27507  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27508  			break
 27509  		}
 27510  		v.Reset(ssaop.OpARM64ZUMULHD)
 27511  		v.AddArg2(x, y)
 27512  		return true
 27513  	}
 27514  	// match: (MulHighUint64s x y)
 27515  	// result: (ZUMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27516  	for {
 27517  		x := v_0
 27518  		y := v_1
 27519  		v.Reset(ssaop.OpARM64ZUMULHMergingD)
 27520  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27521  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27522  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27523  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27524  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27525  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27526  		v1.AddArg2(v2, v3)
 27527  		v0.AddArg(v1)
 27528  		v.AddArg3(x, y, v0)
 27529  		return true
 27530  	}
 27531  }
 27532  func rewriteValue_OpMulHighUint8s(v *ssa.Value) bool {
 27533  	v_1 := v.Args[1]
 27534  	v_0 := v.Args[0]
 27535  	b := v.Block
 27536  	typ := &b.Func.Config.Types
 27537  	// match: (MulHighUint8s x y)
 27538  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27539  	// result: (ZUMULHB x y)
 27540  	for {
 27541  		x := v_0
 27542  		y := v_1
 27543  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27544  			break
 27545  		}
 27546  		v.Reset(ssaop.OpARM64ZUMULHB)
 27547  		v.AddArg2(x, y)
 27548  		return true
 27549  	}
 27550  	// match: (MulHighUint8s x y)
 27551  	// result: (ZUMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 27552  	for {
 27553  		x := v_0
 27554  		y := v_1
 27555  		v.Reset(ssaop.OpARM64ZUMULHMergingB)
 27556  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27557  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 27558  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27559  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27560  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27561  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 27562  		v1.AddArg2(v2, v3)
 27563  		v0.AddArg(v1)
 27564  		v.AddArg3(x, y, v0)
 27565  		return true
 27566  	}
 27567  }
 27568  func rewriteValue_OpMulInt16s(v *ssa.Value) bool {
 27569  	v_1 := v.Args[1]
 27570  	v_0 := v.Args[0]
 27571  	b := v.Block
 27572  	typ := &b.Func.Config.Types
 27573  	// match: (MulInt16s x y)
 27574  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27575  	// result: (ZMULH x y)
 27576  	for {
 27577  		x := v_0
 27578  		y := v_1
 27579  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27580  			break
 27581  		}
 27582  		v.Reset(ssaop.OpARM64ZMULH)
 27583  		v.AddArg2(x, y)
 27584  		return true
 27585  	}
 27586  	// match: (MulInt16s x y)
 27587  	// result: (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27588  	for {
 27589  		x := v_0
 27590  		y := v_1
 27591  		v.Reset(ssaop.OpARM64ZMULMergingH)
 27592  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27593  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27594  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27595  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27596  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27597  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27598  		v1.AddArg2(v2, v3)
 27599  		v0.AddArg(v1)
 27600  		v.AddArg3(x, y, v0)
 27601  		return true
 27602  	}
 27603  }
 27604  func rewriteValue_OpMulInt32s(v *ssa.Value) bool {
 27605  	v_1 := v.Args[1]
 27606  	v_0 := v.Args[0]
 27607  	b := v.Block
 27608  	typ := &b.Func.Config.Types
 27609  	// match: (MulInt32s x y)
 27610  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27611  	// result: (ZMULS x y)
 27612  	for {
 27613  		x := v_0
 27614  		y := v_1
 27615  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27616  			break
 27617  		}
 27618  		v.Reset(ssaop.OpARM64ZMULS)
 27619  		v.AddArg2(x, y)
 27620  		return true
 27621  	}
 27622  	// match: (MulInt32s x y)
 27623  	// result: (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27624  	for {
 27625  		x := v_0
 27626  		y := v_1
 27627  		v.Reset(ssaop.OpARM64ZMULMergingS)
 27628  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27629  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27630  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27631  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27632  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27633  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27634  		v1.AddArg2(v2, v3)
 27635  		v0.AddArg(v1)
 27636  		v.AddArg3(x, y, v0)
 27637  		return true
 27638  	}
 27639  }
 27640  func rewriteValue_OpMulInt64s(v *ssa.Value) bool {
 27641  	v_1 := v.Args[1]
 27642  	v_0 := v.Args[0]
 27643  	b := v.Block
 27644  	typ := &b.Func.Config.Types
 27645  	// match: (MulInt64s x y)
 27646  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27647  	// result: (ZMULD x y)
 27648  	for {
 27649  		x := v_0
 27650  		y := v_1
 27651  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27652  			break
 27653  		}
 27654  		v.Reset(ssaop.OpARM64ZMULD)
 27655  		v.AddArg2(x, y)
 27656  		return true
 27657  	}
 27658  	// match: (MulInt64s x y)
 27659  	// result: (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27660  	for {
 27661  		x := v_0
 27662  		y := v_1
 27663  		v.Reset(ssaop.OpARM64ZMULMergingD)
 27664  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27665  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27666  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27667  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27668  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27669  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27670  		v1.AddArg2(v2, v3)
 27671  		v0.AddArg(v1)
 27672  		v.AddArg3(x, y, v0)
 27673  		return true
 27674  	}
 27675  }
 27676  func rewriteValue_OpMulInt8s(v *ssa.Value) bool {
 27677  	v_1 := v.Args[1]
 27678  	v_0 := v.Args[0]
 27679  	b := v.Block
 27680  	typ := &b.Func.Config.Types
 27681  	// match: (MulInt8s x y)
 27682  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27683  	// result: (ZMULB x y)
 27684  	for {
 27685  		x := v_0
 27686  		y := v_1
 27687  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27688  			break
 27689  		}
 27690  		v.Reset(ssaop.OpARM64ZMULB)
 27691  		v.AddArg2(x, y)
 27692  		return true
 27693  	}
 27694  	// match: (MulInt8s x y)
 27695  	// result: (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 27696  	for {
 27697  		x := v_0
 27698  		y := v_1
 27699  		v.Reset(ssaop.OpARM64ZMULMergingB)
 27700  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27701  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 27702  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27703  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27704  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27705  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 27706  		v1.AddArg2(v2, v3)
 27707  		v0.AddArg(v1)
 27708  		v.AddArg3(x, y, v0)
 27709  		return true
 27710  	}
 27711  }
 27712  func rewriteValue_OpMulUint16s(v *ssa.Value) bool {
 27713  	v_1 := v.Args[1]
 27714  	v_0 := v.Args[0]
 27715  	b := v.Block
 27716  	typ := &b.Func.Config.Types
 27717  	// match: (MulUint16s x y)
 27718  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27719  	// result: (ZMULH x y)
 27720  	for {
 27721  		x := v_0
 27722  		y := v_1
 27723  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27724  			break
 27725  		}
 27726  		v.Reset(ssaop.OpARM64ZMULH)
 27727  		v.AddArg2(x, y)
 27728  		return true
 27729  	}
 27730  	// match: (MulUint16s x y)
 27731  	// result: (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27732  	for {
 27733  		x := v_0
 27734  		y := v_1
 27735  		v.Reset(ssaop.OpARM64ZMULMergingH)
 27736  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27737  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27738  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27739  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27740  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27741  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27742  		v1.AddArg2(v2, v3)
 27743  		v0.AddArg(v1)
 27744  		v.AddArg3(x, y, v0)
 27745  		return true
 27746  	}
 27747  }
 27748  func rewriteValue_OpMulUint32s(v *ssa.Value) bool {
 27749  	v_1 := v.Args[1]
 27750  	v_0 := v.Args[0]
 27751  	b := v.Block
 27752  	typ := &b.Func.Config.Types
 27753  	// match: (MulUint32s x y)
 27754  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27755  	// result: (ZMULS x y)
 27756  	for {
 27757  		x := v_0
 27758  		y := v_1
 27759  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27760  			break
 27761  		}
 27762  		v.Reset(ssaop.OpARM64ZMULS)
 27763  		v.AddArg2(x, y)
 27764  		return true
 27765  	}
 27766  	// match: (MulUint32s x y)
 27767  	// result: (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27768  	for {
 27769  		x := v_0
 27770  		y := v_1
 27771  		v.Reset(ssaop.OpARM64ZMULMergingS)
 27772  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27773  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27774  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27775  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27776  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27777  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27778  		v1.AddArg2(v2, v3)
 27779  		v0.AddArg(v1)
 27780  		v.AddArg3(x, y, v0)
 27781  		return true
 27782  	}
 27783  }
 27784  func rewriteValue_OpMulUint64s(v *ssa.Value) bool {
 27785  	v_1 := v.Args[1]
 27786  	v_0 := v.Args[0]
 27787  	b := v.Block
 27788  	typ := &b.Func.Config.Types
 27789  	// match: (MulUint64s x y)
 27790  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27791  	// result: (ZMULD x y)
 27792  	for {
 27793  		x := v_0
 27794  		y := v_1
 27795  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27796  			break
 27797  		}
 27798  		v.Reset(ssaop.OpARM64ZMULD)
 27799  		v.AddArg2(x, y)
 27800  		return true
 27801  	}
 27802  	// match: (MulUint64s x y)
 27803  	// result: (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27804  	for {
 27805  		x := v_0
 27806  		y := v_1
 27807  		v.Reset(ssaop.OpARM64ZMULMergingD)
 27808  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27809  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27810  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27811  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27812  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27813  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27814  		v1.AddArg2(v2, v3)
 27815  		v0.AddArg(v1)
 27816  		v.AddArg3(x, y, v0)
 27817  		return true
 27818  	}
 27819  }
 27820  func rewriteValue_OpMulUint8s(v *ssa.Value) bool {
 27821  	v_1 := v.Args[1]
 27822  	v_0 := v.Args[0]
 27823  	b := v.Block
 27824  	typ := &b.Func.Config.Types
 27825  	// match: (MulUint8s x y)
 27826  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 27827  	// result: (ZMULB x y)
 27828  	for {
 27829  		x := v_0
 27830  		y := v_1
 27831  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 27832  			break
 27833  		}
 27834  		v.Reset(ssaop.OpARM64ZMULB)
 27835  		v.AddArg2(x, y)
 27836  		return true
 27837  	}
 27838  	// match: (MulUint8s x y)
 27839  	// result: (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 27840  	for {
 27841  		x := v_0
 27842  		y := v_1
 27843  		v.Reset(ssaop.OpARM64ZMULMergingB)
 27844  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27845  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 27846  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27847  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27848  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27849  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 27850  		v1.AddArg2(v2, v3)
 27851  		v0.AddArg(v1)
 27852  		v.AddArg3(x, y, v0)
 27853  		return true
 27854  	}
 27855  }
 27856  func rewriteValue_OpNegFloat32s(v *ssa.Value) bool {
 27857  	v_0 := v.Args[0]
 27858  	b := v.Block
 27859  	typ := &b.Func.Config.Types
 27860  	// match: (NegFloat32s x)
 27861  	// result: (ZFNEGS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27862  	for {
 27863  		x := v_0
 27864  		v.Reset(ssaop.OpARM64ZFNEGS)
 27865  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27866  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27867  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27868  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27869  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27870  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27871  		v1.AddArg2(v2, v3)
 27872  		v0.AddArg(v1)
 27873  		v.AddArg2(x, v0)
 27874  		return true
 27875  	}
 27876  }
 27877  func rewriteValue_OpNegFloat64s(v *ssa.Value) bool {
 27878  	v_0 := v.Args[0]
 27879  	b := v.Block
 27880  	typ := &b.Func.Config.Types
 27881  	// match: (NegFloat64s x)
 27882  	// result: (ZFNEGD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27883  	for {
 27884  		x := v_0
 27885  		v.Reset(ssaop.OpARM64ZFNEGD)
 27886  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27887  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27888  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27889  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27890  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27891  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27892  		v1.AddArg2(v2, v3)
 27893  		v0.AddArg(v1)
 27894  		v.AddArg2(x, v0)
 27895  		return true
 27896  	}
 27897  }
 27898  func rewriteValue_OpNegInt16s(v *ssa.Value) bool {
 27899  	v_0 := v.Args[0]
 27900  	b := v.Block
 27901  	typ := &b.Func.Config.Types
 27902  	// match: (NegInt16s x)
 27903  	// result: (ZNEGH x (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27904  	for {
 27905  		x := v_0
 27906  		v.Reset(ssaop.OpARM64ZNEGH)
 27907  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27908  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27909  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27910  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27911  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27912  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27913  		v1.AddArg2(v2, v3)
 27914  		v0.AddArg(v1)
 27915  		v.AddArg2(x, v0)
 27916  		return true
 27917  	}
 27918  }
 27919  func rewriteValue_OpNegInt32s(v *ssa.Value) bool {
 27920  	v_0 := v.Args[0]
 27921  	b := v.Block
 27922  	typ := &b.Func.Config.Types
 27923  	// match: (NegInt32s x)
 27924  	// result: (ZNEGS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27925  	for {
 27926  		x := v_0
 27927  		v.Reset(ssaop.OpARM64ZNEGS)
 27928  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27929  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27930  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27931  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27932  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27933  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27934  		v1.AddArg2(v2, v3)
 27935  		v0.AddArg(v1)
 27936  		v.AddArg2(x, v0)
 27937  		return true
 27938  	}
 27939  }
 27940  func rewriteValue_OpNegInt64s(v *ssa.Value) bool {
 27941  	v_0 := v.Args[0]
 27942  	b := v.Block
 27943  	typ := &b.Func.Config.Types
 27944  	// match: (NegInt64s x)
 27945  	// result: (ZNEGD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27946  	for {
 27947  		x := v_0
 27948  		v.Reset(ssaop.OpARM64ZNEGD)
 27949  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27950  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27951  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27952  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27953  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27954  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27955  		v1.AddArg2(v2, v3)
 27956  		v0.AddArg(v1)
 27957  		v.AddArg2(x, v0)
 27958  		return true
 27959  	}
 27960  }
 27961  func rewriteValue_OpNegInt8s(v *ssa.Value) bool {
 27962  	v_0 := v.Args[0]
 27963  	b := v.Block
 27964  	typ := &b.Func.Config.Types
 27965  	// match: (NegInt8s x)
 27966  	// result: (ZNEGB x (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 27967  	for {
 27968  		x := v_0
 27969  		v.Reset(ssaop.OpARM64ZNEGB)
 27970  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27971  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 27972  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27973  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27974  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27975  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 27976  		v1.AddArg2(v2, v3)
 27977  		v0.AddArg(v1)
 27978  		v.AddArg2(x, v0)
 27979  		return true
 27980  	}
 27981  }
 27982  func rewriteValue_OpNeq16(v *ssa.Value) bool {
 27983  	v_1 := v.Args[1]
 27984  	v_0 := v.Args[0]
 27985  	b := v.Block
 27986  	typ := &b.Func.Config.Types
 27987  	// match: (Neq16 x y)
 27988  	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 27989  	for {
 27990  		x := v_0
 27991  		y := v_1
 27992  		v.Reset(ssaop.OpARM64NotEqual)
 27993  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 27994  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 27995  		v1.AddArg(x)
 27996  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 27997  		v2.AddArg(y)
 27998  		v0.AddArg2(v1, v2)
 27999  		v.AddArg(v0)
 28000  		return true
 28001  	}
 28002  }
 28003  func rewriteValue_OpNeq32(v *ssa.Value) bool {
 28004  	v_1 := v.Args[1]
 28005  	v_0 := v.Args[0]
 28006  	b := v.Block
 28007  	// match: (Neq32 x y)
 28008  	// result: (NotEqual (CMPW x y))
 28009  	for {
 28010  		x := v_0
 28011  		y := v_1
 28012  		v.Reset(ssaop.OpARM64NotEqual)
 28013  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28014  		v0.AddArg2(x, y)
 28015  		v.AddArg(v0)
 28016  		return true
 28017  	}
 28018  }
 28019  func rewriteValue_OpNeq32F(v *ssa.Value) bool {
 28020  	v_1 := v.Args[1]
 28021  	v_0 := v.Args[0]
 28022  	b := v.Block
 28023  	// match: (Neq32F x y)
 28024  	// result: (NotEqual (FCMPS x y))
 28025  	for {
 28026  		x := v_0
 28027  		y := v_1
 28028  		v.Reset(ssaop.OpARM64NotEqual)
 28029  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 28030  		v0.AddArg2(x, y)
 28031  		v.AddArg(v0)
 28032  		return true
 28033  	}
 28034  }
 28035  func rewriteValue_OpNeq64(v *ssa.Value) bool {
 28036  	v_1 := v.Args[1]
 28037  	v_0 := v.Args[0]
 28038  	b := v.Block
 28039  	// match: (Neq64 x y)
 28040  	// result: (NotEqual (CMP x y))
 28041  	for {
 28042  		x := v_0
 28043  		y := v_1
 28044  		v.Reset(ssaop.OpARM64NotEqual)
 28045  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28046  		v0.AddArg2(x, y)
 28047  		v.AddArg(v0)
 28048  		return true
 28049  	}
 28050  }
 28051  func rewriteValue_OpNeq64F(v *ssa.Value) bool {
 28052  	v_1 := v.Args[1]
 28053  	v_0 := v.Args[0]
 28054  	b := v.Block
 28055  	// match: (Neq64F x y)
 28056  	// result: (NotEqual (FCMPD x y))
 28057  	for {
 28058  		x := v_0
 28059  		y := v_1
 28060  		v.Reset(ssaop.OpARM64NotEqual)
 28061  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 28062  		v0.AddArg2(x, y)
 28063  		v.AddArg(v0)
 28064  		return true
 28065  	}
 28066  }
 28067  func rewriteValue_OpNeq8(v *ssa.Value) bool {
 28068  	v_1 := v.Args[1]
 28069  	v_0 := v.Args[0]
 28070  	b := v.Block
 28071  	typ := &b.Func.Config.Types
 28072  	// match: (Neq8 x y)
 28073  	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 28074  	for {
 28075  		x := v_0
 28076  		y := v_1
 28077  		v.Reset(ssaop.OpARM64NotEqual)
 28078  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28079  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 28080  		v1.AddArg(x)
 28081  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 28082  		v2.AddArg(y)
 28083  		v0.AddArg2(v1, v2)
 28084  		v.AddArg(v0)
 28085  		return true
 28086  	}
 28087  }
 28088  func rewriteValue_OpNeqPtr(v *ssa.Value) bool {
 28089  	v_1 := v.Args[1]
 28090  	v_0 := v.Args[0]
 28091  	b := v.Block
 28092  	// match: (NeqPtr x y)
 28093  	// result: (NotEqual (CMP x y))
 28094  	for {
 28095  		x := v_0
 28096  		y := v_1
 28097  		v.Reset(ssaop.OpARM64NotEqual)
 28098  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28099  		v0.AddArg2(x, y)
 28100  		v.AddArg(v0)
 28101  		return true
 28102  	}
 28103  }
 28104  func rewriteValue_OpNot(v *ssa.Value) bool {
 28105  	v_0 := v.Args[0]
 28106  	b := v.Block
 28107  	typ := &b.Func.Config.Types
 28108  	// match: (Not x)
 28109  	// result: (XOR (MOVDconst [1]) x)
 28110  	for {
 28111  		x := v_0
 28112  		v.Reset(ssaop.OpARM64XOR)
 28113  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28114  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 28115  		v.AddArg2(v0, x)
 28116  		return true
 28117  	}
 28118  }
 28119  func rewriteValue_OpNotEqualFloat32s(v *ssa.Value) bool {
 28120  	v_1 := v.Args[1]
 28121  	v_0 := v.Args[0]
 28122  	b := v.Block
 28123  	typ := &b.Func.Config.Types
 28124  	// match: (NotEqualFloat32s x y)
 28125  	// result: (ZFCMNES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 28126  	for {
 28127  		x := v_0
 28128  		y := v_1
 28129  		v.Reset(ssaop.OpARM64ZFCMNES)
 28130  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28131  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 28132  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28133  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28134  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28135  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 28136  		v1.AddArg2(v2, v3)
 28137  		v0.AddArg(v1)
 28138  		v.AddArg3(x, y, v0)
 28139  		return true
 28140  	}
 28141  }
 28142  func rewriteValue_OpNotEqualFloat64s(v *ssa.Value) bool {
 28143  	v_1 := v.Args[1]
 28144  	v_0 := v.Args[0]
 28145  	b := v.Block
 28146  	typ := &b.Func.Config.Types
 28147  	// match: (NotEqualFloat64s x y)
 28148  	// result: (ZFCMNED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 28149  	for {
 28150  		x := v_0
 28151  		y := v_1
 28152  		v.Reset(ssaop.OpARM64ZFCMNED)
 28153  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28154  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 28155  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28156  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28157  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28158  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 28159  		v1.AddArg2(v2, v3)
 28160  		v0.AddArg(v1)
 28161  		v.AddArg3(x, y, v0)
 28162  		return true
 28163  	}
 28164  }
 28165  func rewriteValue_OpNotEqualInt16s(v *ssa.Value) bool {
 28166  	v_1 := v.Args[1]
 28167  	v_0 := v.Args[0]
 28168  	b := v.Block
 28169  	typ := &b.Func.Config.Types
 28170  	// match: (NotEqualInt16s x y)
 28171  	// result: (ZCMPNEH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 28172  	for {
 28173  		x := v_0
 28174  		y := v_1
 28175  		v.Reset(ssaop.OpARM64ZCMPNEH)
 28176  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28177  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 28178  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28179  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28180  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28181  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 28182  		v1.AddArg2(v2, v3)
 28183  		v0.AddArg(v1)
 28184  		v.AddArg3(x, y, v0)
 28185  		return true
 28186  	}
 28187  }
 28188  func rewriteValue_OpNotEqualInt32s(v *ssa.Value) bool {
 28189  	v_1 := v.Args[1]
 28190  	v_0 := v.Args[0]
 28191  	b := v.Block
 28192  	typ := &b.Func.Config.Types
 28193  	// match: (NotEqualInt32s x y)
 28194  	// result: (ZCMPNES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 28195  	for {
 28196  		x := v_0
 28197  		y := v_1
 28198  		v.Reset(ssaop.OpARM64ZCMPNES)
 28199  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28200  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 28201  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28202  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28203  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28204  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 28205  		v1.AddArg2(v2, v3)
 28206  		v0.AddArg(v1)
 28207  		v.AddArg3(x, y, v0)
 28208  		return true
 28209  	}
 28210  }
 28211  func rewriteValue_OpNotEqualInt64s(v *ssa.Value) bool {
 28212  	v_1 := v.Args[1]
 28213  	v_0 := v.Args[0]
 28214  	b := v.Block
 28215  	typ := &b.Func.Config.Types
 28216  	// match: (NotEqualInt64s x y)
 28217  	// result: (ZCMPNED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 28218  	for {
 28219  		x := v_0
 28220  		y := v_1
 28221  		v.Reset(ssaop.OpARM64ZCMPNED)
 28222  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28223  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 28224  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28225  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28226  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28227  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 28228  		v1.AddArg2(v2, v3)
 28229  		v0.AddArg(v1)
 28230  		v.AddArg3(x, y, v0)
 28231  		return true
 28232  	}
 28233  }
 28234  func rewriteValue_OpNotEqualInt8s(v *ssa.Value) bool {
 28235  	v_1 := v.Args[1]
 28236  	v_0 := v.Args[0]
 28237  	b := v.Block
 28238  	typ := &b.Func.Config.Types
 28239  	// match: (NotEqualInt8s x y)
 28240  	// result: (ZCMPNEB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 28241  	for {
 28242  		x := v_0
 28243  		y := v_1
 28244  		v.Reset(ssaop.OpARM64ZCMPNEB)
 28245  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28246  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 28247  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28248  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28249  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28250  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 28251  		v1.AddArg2(v2, v3)
 28252  		v0.AddArg(v1)
 28253  		v.AddArg3(x, y, v0)
 28254  		return true
 28255  	}
 28256  }
 28257  func rewriteValue_OpNotEqualUint16s(v *ssa.Value) bool {
 28258  	v_1 := v.Args[1]
 28259  	v_0 := v.Args[0]
 28260  	b := v.Block
 28261  	typ := &b.Func.Config.Types
 28262  	// match: (NotEqualUint16s x y)
 28263  	// result: (ZCMPNEH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 28264  	for {
 28265  		x := v_0
 28266  		y := v_1
 28267  		v.Reset(ssaop.OpARM64ZCMPNEH)
 28268  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28269  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 28270  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28271  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28272  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28273  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 28274  		v1.AddArg2(v2, v3)
 28275  		v0.AddArg(v1)
 28276  		v.AddArg3(x, y, v0)
 28277  		return true
 28278  	}
 28279  }
 28280  func rewriteValue_OpNotEqualUint32s(v *ssa.Value) bool {
 28281  	v_1 := v.Args[1]
 28282  	v_0 := v.Args[0]
 28283  	b := v.Block
 28284  	typ := &b.Func.Config.Types
 28285  	// match: (NotEqualUint32s x y)
 28286  	// result: (ZCMPNES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 28287  	for {
 28288  		x := v_0
 28289  		y := v_1
 28290  		v.Reset(ssaop.OpARM64ZCMPNES)
 28291  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28292  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 28293  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28294  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28295  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28296  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 28297  		v1.AddArg2(v2, v3)
 28298  		v0.AddArg(v1)
 28299  		v.AddArg3(x, y, v0)
 28300  		return true
 28301  	}
 28302  }
 28303  func rewriteValue_OpNotEqualUint64s(v *ssa.Value) bool {
 28304  	v_1 := v.Args[1]
 28305  	v_0 := v.Args[0]
 28306  	b := v.Block
 28307  	typ := &b.Func.Config.Types
 28308  	// match: (NotEqualUint64s x y)
 28309  	// result: (ZCMPNED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 28310  	for {
 28311  		x := v_0
 28312  		y := v_1
 28313  		v.Reset(ssaop.OpARM64ZCMPNED)
 28314  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28315  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 28316  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28317  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28318  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28319  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 28320  		v1.AddArg2(v2, v3)
 28321  		v0.AddArg(v1)
 28322  		v.AddArg3(x, y, v0)
 28323  		return true
 28324  	}
 28325  }
 28326  func rewriteValue_OpNotEqualUint8s(v *ssa.Value) bool {
 28327  	v_1 := v.Args[1]
 28328  	v_0 := v.Args[0]
 28329  	b := v.Block
 28330  	typ := &b.Func.Config.Types
 28331  	// match: (NotEqualUint8s x y)
 28332  	// result: (ZCMPNEB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 28333  	for {
 28334  		x := v_0
 28335  		y := v_1
 28336  		v.Reset(ssaop.OpARM64ZCMPNEB)
 28337  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28338  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 28339  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28340  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28341  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28342  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 28343  		v1.AddArg2(v2, v3)
 28344  		v0.AddArg(v1)
 28345  		v.AddArg3(x, y, v0)
 28346  		return true
 28347  	}
 28348  }
 28349  func rewriteValue_OpOffPtr(v *ssa.Value) bool {
 28350  	v_0 := v.Args[0]
 28351  	// match: (OffPtr [off] ptr:(SP))
 28352  	// cond: ssa.Is32Bit(off)
 28353  	// result: (MOVDaddr [int32(off)] ptr)
 28354  	for {
 28355  		off := ssa.AuxIntToInt64(v.AuxInt)
 28356  		ptr := v_0
 28357  		if ptr.Op != ssaop.OpSP || !(ssa.Is32Bit(off)) {
 28358  			break
 28359  		}
 28360  		v.Reset(ssaop.OpARM64MOVDaddr)
 28361  		v.AuxInt = ssa.Int32ToAuxInt(int32(off))
 28362  		v.AddArg(ptr)
 28363  		return true
 28364  	}
 28365  	// match: (OffPtr [off] ptr)
 28366  	// result: (ADDconst [off] ptr)
 28367  	for {
 28368  		off := ssa.AuxIntToInt64(v.AuxInt)
 28369  		ptr := v_0
 28370  		v.Reset(ssaop.OpARM64ADDconst)
 28371  		v.AuxInt = ssa.Int64ToAuxInt(off)
 28372  		v.AddArg(ptr)
 28373  		return true
 28374  	}
 28375  }
 28376  func rewriteValue_OpPopCount16(v *ssa.Value) bool {
 28377  	v_0 := v.Args[0]
 28378  	b := v.Block
 28379  	typ := &b.Func.Config.Types
 28380  	// match: (PopCount16 <t> x)
 28381  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt16to64 x)))))
 28382  	for {
 28383  		t := v.Type
 28384  		x := v_0
 28385  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 28386  		v.Type = t
 28387  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 28388  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 28389  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 28390  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 28391  		v3.AddArg(x)
 28392  		v2.AddArg(v3)
 28393  		v1.AddArg(v2)
 28394  		v0.AddArg(v1)
 28395  		v.AddArg(v0)
 28396  		return true
 28397  	}
 28398  }
 28399  func rewriteValue_OpPopCount32(v *ssa.Value) bool {
 28400  	v_0 := v.Args[0]
 28401  	b := v.Block
 28402  	typ := &b.Func.Config.Types
 28403  	// match: (PopCount32 <t> x)
 28404  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt32to64 x)))))
 28405  	for {
 28406  		t := v.Type
 28407  		x := v_0
 28408  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 28409  		v.Type = t
 28410  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 28411  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 28412  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 28413  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 28414  		v3.AddArg(x)
 28415  		v2.AddArg(v3)
 28416  		v1.AddArg(v2)
 28417  		v0.AddArg(v1)
 28418  		v.AddArg(v0)
 28419  		return true
 28420  	}
 28421  }
 28422  func rewriteValue_OpPopCount64(v *ssa.Value) bool {
 28423  	v_0 := v.Args[0]
 28424  	b := v.Block
 28425  	typ := &b.Func.Config.Types
 28426  	// match: (PopCount64 <t> x)
 28427  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> x))))
 28428  	for {
 28429  		t := v.Type
 28430  		x := v_0
 28431  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 28432  		v.Type = t
 28433  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 28434  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 28435  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 28436  		v2.AddArg(x)
 28437  		v1.AddArg(v2)
 28438  		v0.AddArg(v1)
 28439  		v.AddArg(v0)
 28440  		return true
 28441  	}
 28442  }
 28443  func rewriteValue_OpPrefetchCache(v *ssa.Value) bool {
 28444  	v_1 := v.Args[1]
 28445  	v_0 := v.Args[0]
 28446  	// match: (PrefetchCache addr mem)
 28447  	// result: (PRFM [0] addr mem)
 28448  	for {
 28449  		addr := v_0
 28450  		mem := v_1
 28451  		v.Reset(ssaop.OpARM64PRFM)
 28452  		v.AuxInt = ssa.Int64ToAuxInt(0)
 28453  		v.AddArg2(addr, mem)
 28454  		return true
 28455  	}
 28456  }
 28457  func rewriteValue_OpPrefetchCacheStreamed(v *ssa.Value) bool {
 28458  	v_1 := v.Args[1]
 28459  	v_0 := v.Args[0]
 28460  	// match: (PrefetchCacheStreamed addr mem)
 28461  	// result: (PRFM [1] addr mem)
 28462  	for {
 28463  		addr := v_0
 28464  		mem := v_1
 28465  		v.Reset(ssaop.OpARM64PRFM)
 28466  		v.AuxInt = ssa.Int64ToAuxInt(1)
 28467  		v.AddArg2(addr, mem)
 28468  		return true
 28469  	}
 28470  }
 28471  func rewriteValue_OpPubBarrier(v *ssa.Value) bool {
 28472  	v_0 := v.Args[0]
 28473  	// match: (PubBarrier mem)
 28474  	// result: (DMB [0xe] mem)
 28475  	for {
 28476  		mem := v_0
 28477  		v.Reset(ssaop.OpARM64DMB)
 28478  		v.AuxInt = ssa.Int64ToAuxInt(0xe)
 28479  		v.AddArg(mem)
 28480  		return true
 28481  	}
 28482  }
 28483  func rewriteValue_OpRotateLeft16(v *ssa.Value) bool {
 28484  	v_1 := v.Args[1]
 28485  	v_0 := v.Args[0]
 28486  	b := v.Block
 28487  	typ := &b.Func.Config.Types
 28488  	// match: (RotateLeft16 <t> x (MOVDconst [c]))
 28489  	// result: (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
 28490  	for {
 28491  		t := v.Type
 28492  		x := v_0
 28493  		if v_1.Op != ssaop.OpARM64MOVDconst {
 28494  			break
 28495  		}
 28496  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 28497  		v.Reset(ssaop.OpOr16)
 28498  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh16x64, t)
 28499  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28500  		v1.AuxInt = ssa.Int64ToAuxInt(c & 15)
 28501  		v0.AddArg2(x, v1)
 28502  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh16Ux64, t)
 28503  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28504  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 15)
 28505  		v2.AddArg2(x, v3)
 28506  		v.AddArg2(v0, v2)
 28507  		return true
 28508  	}
 28509  	// match: (RotateLeft16 <t> x y)
 28510  	// result: (RORW <t> (ORshiftLL <typ.UInt32> (ZeroExt16to32 x) (ZeroExt16to32 x) [16]) (NEG <typ.Int64> y))
 28511  	for {
 28512  		t := v.Type
 28513  		x := v_0
 28514  		y := v_1
 28515  		v.Reset(ssaop.OpARM64RORW)
 28516  		v.Type = t
 28517  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ORshiftLL, typ.UInt32)
 28518  		v0.AuxInt = ssa.Int64ToAuxInt(16)
 28519  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 28520  		v1.AddArg(x)
 28521  		v0.AddArg2(v1, v1)
 28522  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 28523  		v2.AddArg(y)
 28524  		v.AddArg2(v0, v2)
 28525  		return true
 28526  	}
 28527  }
 28528  func rewriteValue_OpRotateLeft32(v *ssa.Value) bool {
 28529  	v_1 := v.Args[1]
 28530  	v_0 := v.Args[0]
 28531  	b := v.Block
 28532  	// match: (RotateLeft32 x y)
 28533  	// result: (RORW x (NEG <y.Type> y))
 28534  	for {
 28535  		x := v_0
 28536  		y := v_1
 28537  		v.Reset(ssaop.OpARM64RORW)
 28538  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, y.Type)
 28539  		v0.AddArg(y)
 28540  		v.AddArg2(x, v0)
 28541  		return true
 28542  	}
 28543  }
 28544  func rewriteValue_OpRotateLeft64(v *ssa.Value) bool {
 28545  	v_1 := v.Args[1]
 28546  	v_0 := v.Args[0]
 28547  	b := v.Block
 28548  	// match: (RotateLeft64 x y)
 28549  	// result: (ROR x (NEG <y.Type> y))
 28550  	for {
 28551  		x := v_0
 28552  		y := v_1
 28553  		v.Reset(ssaop.OpARM64ROR)
 28554  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, y.Type)
 28555  		v0.AddArg(y)
 28556  		v.AddArg2(x, v0)
 28557  		return true
 28558  	}
 28559  }
 28560  func rewriteValue_OpRotateLeft8(v *ssa.Value) bool {
 28561  	v_1 := v.Args[1]
 28562  	v_0 := v.Args[0]
 28563  	b := v.Block
 28564  	typ := &b.Func.Config.Types
 28565  	// match: (RotateLeft8 <t> x (MOVDconst [c]))
 28566  	// result: (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
 28567  	for {
 28568  		t := v.Type
 28569  		x := v_0
 28570  		if v_1.Op != ssaop.OpARM64MOVDconst {
 28571  			break
 28572  		}
 28573  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 28574  		v.Reset(ssaop.OpOr8)
 28575  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh8x64, t)
 28576  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28577  		v1.AuxInt = ssa.Int64ToAuxInt(c & 7)
 28578  		v0.AddArg2(x, v1)
 28579  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh8Ux64, t)
 28580  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28581  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 7)
 28582  		v2.AddArg2(x, v3)
 28583  		v.AddArg2(v0, v2)
 28584  		return true
 28585  	}
 28586  	// match: (RotateLeft8 <t> x y)
 28587  	// result: (OR <t> (SLL <t> x (ANDconst <typ.Int64> [7] y)) (SRL <t> (ZeroExt8to64 x) (ANDconst <typ.Int64> [7] (NEG <typ.Int64> y))))
 28588  	for {
 28589  		t := v.Type
 28590  		x := v_0
 28591  		y := v_1
 28592  		v.Reset(ssaop.OpARM64OR)
 28593  		v.Type = t
 28594  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 28595  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, typ.Int64)
 28596  		v1.AuxInt = ssa.Int64ToAuxInt(7)
 28597  		v1.AddArg(y)
 28598  		v0.AddArg2(x, v1)
 28599  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 28600  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 28601  		v3.AddArg(x)
 28602  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, typ.Int64)
 28603  		v4.AuxInt = ssa.Int64ToAuxInt(7)
 28604  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 28605  		v5.AddArg(y)
 28606  		v4.AddArg(v5)
 28607  		v2.AddArg2(v3, v4)
 28608  		v.AddArg2(v0, v2)
 28609  		return true
 28610  	}
 28611  }
 28612  func rewriteValue_OpRoundFloat32s(v *ssa.Value) bool {
 28613  	v_0 := v.Args[0]
 28614  	b := v.Block
 28615  	typ := &b.Func.Config.Types
 28616  	// match: (RoundFloat32s x)
 28617  	// result: (ZFRINTNS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 28618  	for {
 28619  		x := v_0
 28620  		v.Reset(ssaop.OpARM64ZFRINTNS)
 28621  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28622  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 28623  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28624  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28625  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28626  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 28627  		v1.AddArg2(v2, v3)
 28628  		v0.AddArg(v1)
 28629  		v.AddArg2(x, v0)
 28630  		return true
 28631  	}
 28632  }
 28633  func rewriteValue_OpRoundFloat64s(v *ssa.Value) bool {
 28634  	v_0 := v.Args[0]
 28635  	b := v.Block
 28636  	typ := &b.Func.Config.Types
 28637  	// match: (RoundFloat64s x)
 28638  	// result: (ZFRINTND x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 28639  	for {
 28640  		x := v_0
 28641  		v.Reset(ssaop.OpARM64ZFRINTND)
 28642  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28643  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 28644  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28645  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28646  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28647  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 28648  		v1.AddArg2(v2, v3)
 28649  		v0.AddArg(v1)
 28650  		v.AddArg2(x, v0)
 28651  		return true
 28652  	}
 28653  }
 28654  func rewriteValue_OpRsh16Ux16(v *ssa.Value) bool {
 28655  	v_1 := v.Args[1]
 28656  	v_0 := v.Args[0]
 28657  	b := v.Block
 28658  	typ := &b.Func.Config.Types
 28659  	// match: (Rsh16Ux16 <t> [bounded] x y)
 28660  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt16to64 x) y)
 28661  	for {
 28662  		t := v.Type
 28663  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28664  		x := v_0
 28665  		y := v_1
 28666  		v.Reset(ssaop.OpRsh64Ux16)
 28667  		v.Type = t
 28668  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28669  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 28670  		v0.AddArg(x)
 28671  		v.AddArg2(v0, y)
 28672  		return true
 28673  	}
 28674  }
 28675  func rewriteValue_OpRsh16Ux32(v *ssa.Value) bool {
 28676  	v_1 := v.Args[1]
 28677  	v_0 := v.Args[0]
 28678  	b := v.Block
 28679  	typ := &b.Func.Config.Types
 28680  	// match: (Rsh16Ux32 <t> [bounded] x y)
 28681  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt16to64 x) y)
 28682  	for {
 28683  		t := v.Type
 28684  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28685  		x := v_0
 28686  		y := v_1
 28687  		v.Reset(ssaop.OpRsh64Ux32)
 28688  		v.Type = t
 28689  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28690  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 28691  		v0.AddArg(x)
 28692  		v.AddArg2(v0, y)
 28693  		return true
 28694  	}
 28695  }
 28696  func rewriteValue_OpRsh16Ux64(v *ssa.Value) bool {
 28697  	v_1 := v.Args[1]
 28698  	v_0 := v.Args[0]
 28699  	b := v.Block
 28700  	typ := &b.Func.Config.Types
 28701  	// match: (Rsh16Ux64 <t> [bounded] x y)
 28702  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt16to64 x) y)
 28703  	for {
 28704  		t := v.Type
 28705  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28706  		x := v_0
 28707  		y := v_1
 28708  		v.Reset(ssaop.OpRsh64Ux64)
 28709  		v.Type = t
 28710  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28711  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 28712  		v0.AddArg(x)
 28713  		v.AddArg2(v0, y)
 28714  		return true
 28715  	}
 28716  }
 28717  func rewriteValue_OpRsh16Ux8(v *ssa.Value) bool {
 28718  	v_1 := v.Args[1]
 28719  	v_0 := v.Args[0]
 28720  	b := v.Block
 28721  	typ := &b.Func.Config.Types
 28722  	// match: (Rsh16Ux8 <t> [bounded] x y)
 28723  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt16to64 x) y)
 28724  	for {
 28725  		t := v.Type
 28726  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28727  		x := v_0
 28728  		y := v_1
 28729  		v.Reset(ssaop.OpRsh64Ux8)
 28730  		v.Type = t
 28731  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28732  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 28733  		v0.AddArg(x)
 28734  		v.AddArg2(v0, y)
 28735  		return true
 28736  	}
 28737  }
 28738  func rewriteValue_OpRsh16x16(v *ssa.Value) bool {
 28739  	v_1 := v.Args[1]
 28740  	v_0 := v.Args[0]
 28741  	b := v.Block
 28742  	typ := &b.Func.Config.Types
 28743  	// match: (Rsh16x16 <t> [bounded] x y)
 28744  	// result: (Rsh64x16 <t> [bounded] (SignExt16to64 x) y)
 28745  	for {
 28746  		t := v.Type
 28747  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28748  		x := v_0
 28749  		y := v_1
 28750  		v.Reset(ssaop.OpRsh64x16)
 28751  		v.Type = t
 28752  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28753  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 28754  		v0.AddArg(x)
 28755  		v.AddArg2(v0, y)
 28756  		return true
 28757  	}
 28758  }
 28759  func rewriteValue_OpRsh16x32(v *ssa.Value) bool {
 28760  	v_1 := v.Args[1]
 28761  	v_0 := v.Args[0]
 28762  	b := v.Block
 28763  	typ := &b.Func.Config.Types
 28764  	// match: (Rsh16x32 <t> [bounded] x y)
 28765  	// result: (Rsh64x32 <t> [bounded] (SignExt16to64 x) y)
 28766  	for {
 28767  		t := v.Type
 28768  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28769  		x := v_0
 28770  		y := v_1
 28771  		v.Reset(ssaop.OpRsh64x32)
 28772  		v.Type = t
 28773  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28774  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 28775  		v0.AddArg(x)
 28776  		v.AddArg2(v0, y)
 28777  		return true
 28778  	}
 28779  }
 28780  func rewriteValue_OpRsh16x64(v *ssa.Value) bool {
 28781  	v_1 := v.Args[1]
 28782  	v_0 := v.Args[0]
 28783  	b := v.Block
 28784  	typ := &b.Func.Config.Types
 28785  	// match: (Rsh16x64 <t> [bounded] x y)
 28786  	// result: (Rsh64x64 <t> [bounded] (SignExt16to64 x) y)
 28787  	for {
 28788  		t := v.Type
 28789  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28790  		x := v_0
 28791  		y := v_1
 28792  		v.Reset(ssaop.OpRsh64x64)
 28793  		v.Type = t
 28794  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28795  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 28796  		v0.AddArg(x)
 28797  		v.AddArg2(v0, y)
 28798  		return true
 28799  	}
 28800  }
 28801  func rewriteValue_OpRsh16x8(v *ssa.Value) bool {
 28802  	v_1 := v.Args[1]
 28803  	v_0 := v.Args[0]
 28804  	b := v.Block
 28805  	typ := &b.Func.Config.Types
 28806  	// match: (Rsh16x8 <t> [bounded] x y)
 28807  	// result: (Rsh64x8 <t> [bounded] (SignExt16to64 x) y)
 28808  	for {
 28809  		t := v.Type
 28810  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28811  		x := v_0
 28812  		y := v_1
 28813  		v.Reset(ssaop.OpRsh64x8)
 28814  		v.Type = t
 28815  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28816  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 28817  		v0.AddArg(x)
 28818  		v.AddArg2(v0, y)
 28819  		return true
 28820  	}
 28821  }
 28822  func rewriteValue_OpRsh32Ux16(v *ssa.Value) bool {
 28823  	v_1 := v.Args[1]
 28824  	v_0 := v.Args[0]
 28825  	b := v.Block
 28826  	typ := &b.Func.Config.Types
 28827  	// match: (Rsh32Ux16 <t> [bounded] x y)
 28828  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt32to64 x) y)
 28829  	for {
 28830  		t := v.Type
 28831  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28832  		x := v_0
 28833  		y := v_1
 28834  		v.Reset(ssaop.OpRsh64Ux16)
 28835  		v.Type = t
 28836  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28837  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 28838  		v0.AddArg(x)
 28839  		v.AddArg2(v0, y)
 28840  		return true
 28841  	}
 28842  }
 28843  func rewriteValue_OpRsh32Ux32(v *ssa.Value) bool {
 28844  	v_1 := v.Args[1]
 28845  	v_0 := v.Args[0]
 28846  	b := v.Block
 28847  	typ := &b.Func.Config.Types
 28848  	// match: (Rsh32Ux32 <t> [bounded] x y)
 28849  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt32to64 x) y)
 28850  	for {
 28851  		t := v.Type
 28852  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28853  		x := v_0
 28854  		y := v_1
 28855  		v.Reset(ssaop.OpRsh64Ux32)
 28856  		v.Type = t
 28857  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28858  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 28859  		v0.AddArg(x)
 28860  		v.AddArg2(v0, y)
 28861  		return true
 28862  	}
 28863  }
 28864  func rewriteValue_OpRsh32Ux64(v *ssa.Value) bool {
 28865  	v_1 := v.Args[1]
 28866  	v_0 := v.Args[0]
 28867  	b := v.Block
 28868  	typ := &b.Func.Config.Types
 28869  	// match: (Rsh32Ux64 <t> [bounded] x y)
 28870  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt32to64 x) y)
 28871  	for {
 28872  		t := v.Type
 28873  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28874  		x := v_0
 28875  		y := v_1
 28876  		v.Reset(ssaop.OpRsh64Ux64)
 28877  		v.Type = t
 28878  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28879  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 28880  		v0.AddArg(x)
 28881  		v.AddArg2(v0, y)
 28882  		return true
 28883  	}
 28884  }
 28885  func rewriteValue_OpRsh32Ux8(v *ssa.Value) bool {
 28886  	v_1 := v.Args[1]
 28887  	v_0 := v.Args[0]
 28888  	b := v.Block
 28889  	typ := &b.Func.Config.Types
 28890  	// match: (Rsh32Ux8 <t> [bounded] x y)
 28891  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt32to64 x) y)
 28892  	for {
 28893  		t := v.Type
 28894  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28895  		x := v_0
 28896  		y := v_1
 28897  		v.Reset(ssaop.OpRsh64Ux8)
 28898  		v.Type = t
 28899  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28900  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 28901  		v0.AddArg(x)
 28902  		v.AddArg2(v0, y)
 28903  		return true
 28904  	}
 28905  }
 28906  func rewriteValue_OpRsh32x16(v *ssa.Value) bool {
 28907  	v_1 := v.Args[1]
 28908  	v_0 := v.Args[0]
 28909  	b := v.Block
 28910  	typ := &b.Func.Config.Types
 28911  	// match: (Rsh32x16 <t> [bounded] x y)
 28912  	// result: (Rsh64x16 <t> [bounded] (SignExt32to64 x) y)
 28913  	for {
 28914  		t := v.Type
 28915  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28916  		x := v_0
 28917  		y := v_1
 28918  		v.Reset(ssaop.OpRsh64x16)
 28919  		v.Type = t
 28920  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28921  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 28922  		v0.AddArg(x)
 28923  		v.AddArg2(v0, y)
 28924  		return true
 28925  	}
 28926  }
 28927  func rewriteValue_OpRsh32x32(v *ssa.Value) bool {
 28928  	v_1 := v.Args[1]
 28929  	v_0 := v.Args[0]
 28930  	b := v.Block
 28931  	typ := &b.Func.Config.Types
 28932  	// match: (Rsh32x32 <t> [bounded] x y)
 28933  	// result: (Rsh64x32 <t> [bounded] (SignExt32to64 x) y)
 28934  	for {
 28935  		t := v.Type
 28936  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28937  		x := v_0
 28938  		y := v_1
 28939  		v.Reset(ssaop.OpRsh64x32)
 28940  		v.Type = t
 28941  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28942  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 28943  		v0.AddArg(x)
 28944  		v.AddArg2(v0, y)
 28945  		return true
 28946  	}
 28947  }
 28948  func rewriteValue_OpRsh32x64(v *ssa.Value) bool {
 28949  	v_1 := v.Args[1]
 28950  	v_0 := v.Args[0]
 28951  	b := v.Block
 28952  	typ := &b.Func.Config.Types
 28953  	// match: (Rsh32x64 <t> [bounded] x y)
 28954  	// result: (Rsh64x64 <t> [bounded] (SignExt32to64 x) y)
 28955  	for {
 28956  		t := v.Type
 28957  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28958  		x := v_0
 28959  		y := v_1
 28960  		v.Reset(ssaop.OpRsh64x64)
 28961  		v.Type = t
 28962  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28963  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 28964  		v0.AddArg(x)
 28965  		v.AddArg2(v0, y)
 28966  		return true
 28967  	}
 28968  }
 28969  func rewriteValue_OpRsh32x8(v *ssa.Value) bool {
 28970  	v_1 := v.Args[1]
 28971  	v_0 := v.Args[0]
 28972  	b := v.Block
 28973  	typ := &b.Func.Config.Types
 28974  	// match: (Rsh32x8 <t> [bounded] x y)
 28975  	// result: (Rsh64x8 <t> [bounded] (SignExt32to64 x) y)
 28976  	for {
 28977  		t := v.Type
 28978  		bounded := ssa.AuxIntToBool(v.AuxInt)
 28979  		x := v_0
 28980  		y := v_1
 28981  		v.Reset(ssaop.OpRsh64x8)
 28982  		v.Type = t
 28983  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 28984  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 28985  		v0.AddArg(x)
 28986  		v.AddArg2(v0, y)
 28987  		return true
 28988  	}
 28989  }
 28990  func rewriteValue_OpRsh64Ux16(v *ssa.Value) bool {
 28991  	v_1 := v.Args[1]
 28992  	v_0 := v.Args[0]
 28993  	b := v.Block
 28994  	typ := &b.Func.Config.Types
 28995  	// match: (Rsh64Ux16 <t> x y)
 28996  	// cond: ssa.ShiftIsBounded(v)
 28997  	// result: (SRL <t> x y)
 28998  	for {
 28999  		t := v.Type
 29000  		x := v_0
 29001  		y := v_1
 29002  		if !(ssa.ShiftIsBounded(v)) {
 29003  			break
 29004  		}
 29005  		v.Reset(ssaop.OpARM64SRL)
 29006  		v.Type = t
 29007  		v.AddArg2(x, y)
 29008  		return true
 29009  	}
 29010  	// match: (Rsh64Ux16 <t> [bounded] x y)
 29011  	// cond: !ssa.ShiftIsBounded(v)
 29012  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt16to32 y))
 29013  	for {
 29014  		t := v.Type
 29015  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29016  		x := v_0
 29017  		y := v_1
 29018  		if !(!ssa.ShiftIsBounded(v)) {
 29019  			break
 29020  		}
 29021  		v.Reset(ssaop.OpRsh64Ux32)
 29022  		v.Type = t
 29023  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29024  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 29025  		v0.AddArg(y)
 29026  		v.AddArg2(x, v0)
 29027  		return true
 29028  	}
 29029  	return false
 29030  }
 29031  func rewriteValue_OpRsh64Ux32(v *ssa.Value) bool {
 29032  	v_1 := v.Args[1]
 29033  	v_0 := v.Args[0]
 29034  	b := v.Block
 29035  	// match: (Rsh64Ux32 <t> x y)
 29036  	// cond: ssa.ShiftIsBounded(v)
 29037  	// result: (SRL <t> x y)
 29038  	for {
 29039  		t := v.Type
 29040  		x := v_0
 29041  		y := v_1
 29042  		if !(ssa.ShiftIsBounded(v)) {
 29043  			break
 29044  		}
 29045  		v.Reset(ssaop.OpARM64SRL)
 29046  		v.Type = t
 29047  		v.AddArg2(x, y)
 29048  		return true
 29049  	}
 29050  	// match: (Rsh64Ux32 <t> x y)
 29051  	// cond: !ssa.ShiftIsBounded(v)
 29052  	// result: (CSEL [ssaop.OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 29053  	for {
 29054  		t := v.Type
 29055  		x := v_0
 29056  		y := v_1
 29057  		if !(!ssa.ShiftIsBounded(v)) {
 29058  			break
 29059  		}
 29060  		v.Reset(ssaop.OpARM64CSEL)
 29061  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29062  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 29063  		v0.AddArg2(x, y)
 29064  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 29065  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 29066  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 29067  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 29068  		v2.AddArg(y)
 29069  		v.AddArg3(v0, v1, v2)
 29070  		return true
 29071  	}
 29072  	return false
 29073  }
 29074  func rewriteValue_OpRsh64Ux64(v *ssa.Value) bool {
 29075  	v_1 := v.Args[1]
 29076  	v_0 := v.Args[0]
 29077  	b := v.Block
 29078  	// match: (Rsh64Ux64 <t> x y)
 29079  	// cond: ssa.ShiftIsBounded(v)
 29080  	// result: (SRL <t> x y)
 29081  	for {
 29082  		t := v.Type
 29083  		x := v_0
 29084  		y := v_1
 29085  		if !(ssa.ShiftIsBounded(v)) {
 29086  			break
 29087  		}
 29088  		v.Reset(ssaop.OpARM64SRL)
 29089  		v.Type = t
 29090  		v.AddArg2(x, y)
 29091  		return true
 29092  	}
 29093  	// match: (Rsh64Ux64 <t> x y)
 29094  	// cond: !ssa.ShiftIsBounded(v)
 29095  	// result: (CSEL [ssaop.OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 29096  	for {
 29097  		t := v.Type
 29098  		x := v_0
 29099  		y := v_1
 29100  		if !(!ssa.ShiftIsBounded(v)) {
 29101  			break
 29102  		}
 29103  		v.Reset(ssaop.OpARM64CSEL)
 29104  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29105  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 29106  		v0.AddArg2(x, y)
 29107  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 29108  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 29109  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29110  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 29111  		v2.AddArg(y)
 29112  		v.AddArg3(v0, v1, v2)
 29113  		return true
 29114  	}
 29115  	return false
 29116  }
 29117  func rewriteValue_OpRsh64Ux8(v *ssa.Value) bool {
 29118  	v_1 := v.Args[1]
 29119  	v_0 := v.Args[0]
 29120  	b := v.Block
 29121  	typ := &b.Func.Config.Types
 29122  	// match: (Rsh64Ux8 <t> x y)
 29123  	// cond: ssa.ShiftIsBounded(v)
 29124  	// result: (SRL <t> x y)
 29125  	for {
 29126  		t := v.Type
 29127  		x := v_0
 29128  		y := v_1
 29129  		if !(ssa.ShiftIsBounded(v)) {
 29130  			break
 29131  		}
 29132  		v.Reset(ssaop.OpARM64SRL)
 29133  		v.Type = t
 29134  		v.AddArg2(x, y)
 29135  		return true
 29136  	}
 29137  	// match: (Rsh64Ux8 <t> [bounded] x y)
 29138  	// cond: !ssa.ShiftIsBounded(v)
 29139  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt8to32 y))
 29140  	for {
 29141  		t := v.Type
 29142  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29143  		x := v_0
 29144  		y := v_1
 29145  		if !(!ssa.ShiftIsBounded(v)) {
 29146  			break
 29147  		}
 29148  		v.Reset(ssaop.OpRsh64Ux32)
 29149  		v.Type = t
 29150  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29151  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 29152  		v0.AddArg(y)
 29153  		v.AddArg2(x, v0)
 29154  		return true
 29155  	}
 29156  	return false
 29157  }
 29158  func rewriteValue_OpRsh64x16(v *ssa.Value) bool {
 29159  	v_1 := v.Args[1]
 29160  	v_0 := v.Args[0]
 29161  	b := v.Block
 29162  	typ := &b.Func.Config.Types
 29163  	// match: (Rsh64x16 <t> x y)
 29164  	// cond: ssa.ShiftIsBounded(v)
 29165  	// result: (SRA <t> x y)
 29166  	for {
 29167  		t := v.Type
 29168  		x := v_0
 29169  		y := v_1
 29170  		if !(ssa.ShiftIsBounded(v)) {
 29171  			break
 29172  		}
 29173  		v.Reset(ssaop.OpARM64SRA)
 29174  		v.Type = t
 29175  		v.AddArg2(x, y)
 29176  		return true
 29177  	}
 29178  	// match: (Rsh64x16 <t> [bounded] x y)
 29179  	// cond: !ssa.ShiftIsBounded(v)
 29180  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 29181  	for {
 29182  		t := v.Type
 29183  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29184  		x := v_0
 29185  		y := v_1
 29186  		if !(!ssa.ShiftIsBounded(v)) {
 29187  			break
 29188  		}
 29189  		v.Reset(ssaop.OpRsh64x32)
 29190  		v.Type = t
 29191  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29192  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 29193  		v0.AddArg(y)
 29194  		v.AddArg2(x, v0)
 29195  		return true
 29196  	}
 29197  	return false
 29198  }
 29199  func rewriteValue_OpRsh64x32(v *ssa.Value) bool {
 29200  	v_1 := v.Args[1]
 29201  	v_0 := v.Args[0]
 29202  	b := v.Block
 29203  	// match: (Rsh64x32 <t> x y)
 29204  	// cond: ssa.ShiftIsBounded(v)
 29205  	// result: (SRA <t> x y)
 29206  	for {
 29207  		t := v.Type
 29208  		x := v_0
 29209  		y := v_1
 29210  		if !(ssa.ShiftIsBounded(v)) {
 29211  			break
 29212  		}
 29213  		v.Reset(ssaop.OpARM64SRA)
 29214  		v.Type = t
 29215  		v.AddArg2(x, y)
 29216  		return true
 29217  	}
 29218  	// match: (Rsh64x32 <t> x y)
 29219  	// cond: !ssa.ShiftIsBounded(v)
 29220  	// result: (SRA x (CSEL [ssaop.OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPWconst [64] y)))
 29221  	for {
 29222  		x := v_0
 29223  		y := v_1
 29224  		if !(!ssa.ShiftIsBounded(v)) {
 29225  			break
 29226  		}
 29227  		v.Reset(ssaop.OpARM64SRA)
 29228  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, y.Type)
 29229  		v0.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29230  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, y.Type)
 29231  		v1.AuxInt = ssa.Int64ToAuxInt(63)
 29232  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 29233  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 29234  		v2.AddArg(y)
 29235  		v0.AddArg3(y, v1, v2)
 29236  		v.AddArg2(x, v0)
 29237  		return true
 29238  	}
 29239  	return false
 29240  }
 29241  func rewriteValue_OpRsh64x64(v *ssa.Value) bool {
 29242  	v_1 := v.Args[1]
 29243  	v_0 := v.Args[0]
 29244  	b := v.Block
 29245  	// match: (Rsh64x64 <t> x y)
 29246  	// cond: ssa.ShiftIsBounded(v)
 29247  	// result: (SRA <t> x y)
 29248  	for {
 29249  		t := v.Type
 29250  		x := v_0
 29251  		y := v_1
 29252  		if !(ssa.ShiftIsBounded(v)) {
 29253  			break
 29254  		}
 29255  		v.Reset(ssaop.OpARM64SRA)
 29256  		v.Type = t
 29257  		v.AddArg2(x, y)
 29258  		return true
 29259  	}
 29260  	// match: (Rsh64x64 <t> x y)
 29261  	// cond: !ssa.ShiftIsBounded(v)
 29262  	// result: (SRA x (CSEL [ssaop.OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
 29263  	for {
 29264  		x := v_0
 29265  		y := v_1
 29266  		if !(!ssa.ShiftIsBounded(v)) {
 29267  			break
 29268  		}
 29269  		v.Reset(ssaop.OpARM64SRA)
 29270  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, y.Type)
 29271  		v0.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29272  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, y.Type)
 29273  		v1.AuxInt = ssa.Int64ToAuxInt(63)
 29274  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29275  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 29276  		v2.AddArg(y)
 29277  		v0.AddArg3(y, v1, v2)
 29278  		v.AddArg2(x, v0)
 29279  		return true
 29280  	}
 29281  	return false
 29282  }
 29283  func rewriteValue_OpRsh64x8(v *ssa.Value) bool {
 29284  	v_1 := v.Args[1]
 29285  	v_0 := v.Args[0]
 29286  	b := v.Block
 29287  	typ := &b.Func.Config.Types
 29288  	// match: (Rsh64x8 <t> x y)
 29289  	// cond: ssa.ShiftIsBounded(v)
 29290  	// result: (SRA <t> x y)
 29291  	for {
 29292  		t := v.Type
 29293  		x := v_0
 29294  		y := v_1
 29295  		if !(ssa.ShiftIsBounded(v)) {
 29296  			break
 29297  		}
 29298  		v.Reset(ssaop.OpARM64SRA)
 29299  		v.Type = t
 29300  		v.AddArg2(x, y)
 29301  		return true
 29302  	}
 29303  	// match: (Rsh64x8 <t> [bounded] x y)
 29304  	// cond: !ssa.ShiftIsBounded(v)
 29305  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 29306  	for {
 29307  		t := v.Type
 29308  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29309  		x := v_0
 29310  		y := v_1
 29311  		if !(!ssa.ShiftIsBounded(v)) {
 29312  			break
 29313  		}
 29314  		v.Reset(ssaop.OpRsh64x32)
 29315  		v.Type = t
 29316  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29317  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 29318  		v0.AddArg(y)
 29319  		v.AddArg2(x, v0)
 29320  		return true
 29321  	}
 29322  	return false
 29323  }
 29324  func rewriteValue_OpRsh8Ux16(v *ssa.Value) bool {
 29325  	v_1 := v.Args[1]
 29326  	v_0 := v.Args[0]
 29327  	b := v.Block
 29328  	typ := &b.Func.Config.Types
 29329  	// match: (Rsh8Ux16 <t> [bounded] x y)
 29330  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt8to64 x) y)
 29331  	for {
 29332  		t := v.Type
 29333  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29334  		x := v_0
 29335  		y := v_1
 29336  		v.Reset(ssaop.OpRsh64Ux16)
 29337  		v.Type = t
 29338  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29339  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 29340  		v0.AddArg(x)
 29341  		v.AddArg2(v0, y)
 29342  		return true
 29343  	}
 29344  }
 29345  func rewriteValue_OpRsh8Ux32(v *ssa.Value) bool {
 29346  	v_1 := v.Args[1]
 29347  	v_0 := v.Args[0]
 29348  	b := v.Block
 29349  	typ := &b.Func.Config.Types
 29350  	// match: (Rsh8Ux32 <t> [bounded] x y)
 29351  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt8to64 x) y)
 29352  	for {
 29353  		t := v.Type
 29354  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29355  		x := v_0
 29356  		y := v_1
 29357  		v.Reset(ssaop.OpRsh64Ux32)
 29358  		v.Type = t
 29359  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29360  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 29361  		v0.AddArg(x)
 29362  		v.AddArg2(v0, y)
 29363  		return true
 29364  	}
 29365  }
 29366  func rewriteValue_OpRsh8Ux64(v *ssa.Value) bool {
 29367  	v_1 := v.Args[1]
 29368  	v_0 := v.Args[0]
 29369  	b := v.Block
 29370  	typ := &b.Func.Config.Types
 29371  	// match: (Rsh8Ux64 <t> [bounded] x y)
 29372  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt8to64 x) y)
 29373  	for {
 29374  		t := v.Type
 29375  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29376  		x := v_0
 29377  		y := v_1
 29378  		v.Reset(ssaop.OpRsh64Ux64)
 29379  		v.Type = t
 29380  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29381  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 29382  		v0.AddArg(x)
 29383  		v.AddArg2(v0, y)
 29384  		return true
 29385  	}
 29386  }
 29387  func rewriteValue_OpRsh8Ux8(v *ssa.Value) bool {
 29388  	v_1 := v.Args[1]
 29389  	v_0 := v.Args[0]
 29390  	b := v.Block
 29391  	typ := &b.Func.Config.Types
 29392  	// match: (Rsh8Ux8 <t> [bounded] x y)
 29393  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt8to64 x) y)
 29394  	for {
 29395  		t := v.Type
 29396  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29397  		x := v_0
 29398  		y := v_1
 29399  		v.Reset(ssaop.OpRsh64Ux8)
 29400  		v.Type = t
 29401  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29402  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 29403  		v0.AddArg(x)
 29404  		v.AddArg2(v0, y)
 29405  		return true
 29406  	}
 29407  }
 29408  func rewriteValue_OpRsh8x16(v *ssa.Value) bool {
 29409  	v_1 := v.Args[1]
 29410  	v_0 := v.Args[0]
 29411  	b := v.Block
 29412  	typ := &b.Func.Config.Types
 29413  	// match: (Rsh8x16 <t> [bounded] x y)
 29414  	// result: (Rsh64x16 <t> [bounded] (SignExt8to64 x) y)
 29415  	for {
 29416  		t := v.Type
 29417  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29418  		x := v_0
 29419  		y := v_1
 29420  		v.Reset(ssaop.OpRsh64x16)
 29421  		v.Type = t
 29422  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29423  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 29424  		v0.AddArg(x)
 29425  		v.AddArg2(v0, y)
 29426  		return true
 29427  	}
 29428  }
 29429  func rewriteValue_OpRsh8x32(v *ssa.Value) bool {
 29430  	v_1 := v.Args[1]
 29431  	v_0 := v.Args[0]
 29432  	b := v.Block
 29433  	typ := &b.Func.Config.Types
 29434  	// match: (Rsh8x32 <t> [bounded] x y)
 29435  	// result: (Rsh64x32 <t> [bounded] (SignExt8to64 x) y)
 29436  	for {
 29437  		t := v.Type
 29438  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29439  		x := v_0
 29440  		y := v_1
 29441  		v.Reset(ssaop.OpRsh64x32)
 29442  		v.Type = t
 29443  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29444  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 29445  		v0.AddArg(x)
 29446  		v.AddArg2(v0, y)
 29447  		return true
 29448  	}
 29449  }
 29450  func rewriteValue_OpRsh8x64(v *ssa.Value) bool {
 29451  	v_1 := v.Args[1]
 29452  	v_0 := v.Args[0]
 29453  	b := v.Block
 29454  	typ := &b.Func.Config.Types
 29455  	// match: (Rsh8x64 <t> [bounded] x y)
 29456  	// result: (Rsh64x64 <t> [bounded] (SignExt8to64 x) y)
 29457  	for {
 29458  		t := v.Type
 29459  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29460  		x := v_0
 29461  		y := v_1
 29462  		v.Reset(ssaop.OpRsh64x64)
 29463  		v.Type = t
 29464  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29465  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 29466  		v0.AddArg(x)
 29467  		v.AddArg2(v0, y)
 29468  		return true
 29469  	}
 29470  }
 29471  func rewriteValue_OpRsh8x8(v *ssa.Value) bool {
 29472  	v_1 := v.Args[1]
 29473  	v_0 := v.Args[0]
 29474  	b := v.Block
 29475  	typ := &b.Func.Config.Types
 29476  	// match: (Rsh8x8 <t> [bounded] x y)
 29477  	// result: (Rsh64x8 <t> [bounded] (SignExt8to64 x) y)
 29478  	for {
 29479  		t := v.Type
 29480  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29481  		x := v_0
 29482  		y := v_1
 29483  		v.Reset(ssaop.OpRsh64x8)
 29484  		v.Type = t
 29485  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29486  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 29487  		v0.AddArg(x)
 29488  		v.AddArg2(v0, y)
 29489  		return true
 29490  	}
 29491  }
 29492  func rewriteValue_OpScalableVectorLen(v *ssa.Value) bool {
 29493  	// match: (ScalableVectorLen)
 29494  	// result: (RDVL [1])
 29495  	for {
 29496  		v.Reset(ssaop.OpARM64RDVL)
 29497  		v.AuxInt = ssa.Int64ToAuxInt(1)
 29498  		return true
 29499  	}
 29500  }
 29501  func rewriteValue_OpSelect0(v *ssa.Value) bool {
 29502  	v_0 := v.Args[0]
 29503  	b := v.Block
 29504  	typ := &b.Func.Config.Types
 29505  	// match: (Select0 (Mul64uhilo x y))
 29506  	// result: (UMULH x y)
 29507  	for {
 29508  		if v_0.Op != ssaop.OpMul64uhilo {
 29509  			break
 29510  		}
 29511  		y := v_0.Args[1]
 29512  		x := v_0.Args[0]
 29513  		v.Reset(ssaop.OpARM64UMULH)
 29514  		v.AddArg2(x, y)
 29515  		return true
 29516  	}
 29517  	// match: (Select0 (Add64carry x y c))
 29518  	// result: (Select0 <typ.UInt64> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c))))
 29519  	for {
 29520  		if v_0.Op != ssaop.OpAdd64carry {
 29521  			break
 29522  		}
 29523  		c := v_0.Args[2]
 29524  		x := v_0.Args[0]
 29525  		y := v_0.Args[1]
 29526  		v.Reset(ssaop.OpSelect0)
 29527  		v.Type = typ.UInt64
 29528  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 29529  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29530  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 29531  		v2.AuxInt = ssa.Int64ToAuxInt(-1)
 29532  		v2.AddArg(c)
 29533  		v1.AddArg(v2)
 29534  		v0.AddArg3(x, y, v1)
 29535  		v.AddArg(v0)
 29536  		return true
 29537  	}
 29538  	// match: (Select0 (Sub64borrow x y bo))
 29539  	// result: (Select0 <typ.UInt64> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))
 29540  	for {
 29541  		if v_0.Op != ssaop.OpSub64borrow {
 29542  			break
 29543  		}
 29544  		bo := v_0.Args[2]
 29545  		x := v_0.Args[0]
 29546  		y := v_0.Args[1]
 29547  		v.Reset(ssaop.OpSelect0)
 29548  		v.Type = typ.UInt64
 29549  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 29550  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29551  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 29552  		v2.AddArg(bo)
 29553  		v1.AddArg(v2)
 29554  		v0.AddArg3(x, y, v1)
 29555  		v.AddArg(v0)
 29556  		return true
 29557  	}
 29558  	// match: (Select0 (Mul64uover x y))
 29559  	// result: (MUL x y)
 29560  	for {
 29561  		if v_0.Op != ssaop.OpMul64uover {
 29562  			break
 29563  		}
 29564  		y := v_0.Args[1]
 29565  		x := v_0.Args[0]
 29566  		v.Reset(ssaop.OpARM64MUL)
 29567  		v.AddArg2(x, y)
 29568  		return true
 29569  	}
 29570  	return false
 29571  }
 29572  func rewriteValue_OpSelect1(v *ssa.Value) bool {
 29573  	v_0 := v.Args[0]
 29574  	b := v.Block
 29575  	typ := &b.Func.Config.Types
 29576  	// match: (Select1 (Mul64uhilo x y))
 29577  	// result: (MUL x y)
 29578  	for {
 29579  		if v_0.Op != ssaop.OpMul64uhilo {
 29580  			break
 29581  		}
 29582  		y := v_0.Args[1]
 29583  		x := v_0.Args[0]
 29584  		v.Reset(ssaop.OpARM64MUL)
 29585  		v.AddArg2(x, y)
 29586  		return true
 29587  	}
 29588  	// match: (Select1 (Add64carry x y c))
 29589  	// result: (ADCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c)))))
 29590  	for {
 29591  		if v_0.Op != ssaop.OpAdd64carry {
 29592  			break
 29593  		}
 29594  		c := v_0.Args[2]
 29595  		x := v_0.Args[0]
 29596  		y := v_0.Args[1]
 29597  		v.Reset(ssaop.OpARM64ADCzerocarry)
 29598  		v.Type = typ.UInt64
 29599  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29600  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 29601  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29602  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 29603  		v3.AuxInt = ssa.Int64ToAuxInt(-1)
 29604  		v3.AddArg(c)
 29605  		v2.AddArg(v3)
 29606  		v1.AddArg3(x, y, v2)
 29607  		v0.AddArg(v1)
 29608  		v.AddArg(v0)
 29609  		return true
 29610  	}
 29611  	// match: (Select1 (Sub64borrow x y bo))
 29612  	// result: (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))))
 29613  	for {
 29614  		if v_0.Op != ssaop.OpSub64borrow {
 29615  			break
 29616  		}
 29617  		bo := v_0.Args[2]
 29618  		x := v_0.Args[0]
 29619  		y := v_0.Args[1]
 29620  		v.Reset(ssaop.OpARM64NEG)
 29621  		v.Type = typ.UInt64
 29622  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NGCzerocarry, typ.UInt64)
 29623  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29624  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 29625  		v3 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29626  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 29627  		v4.AddArg(bo)
 29628  		v3.AddArg(v4)
 29629  		v2.AddArg3(x, y, v3)
 29630  		v1.AddArg(v2)
 29631  		v0.AddArg(v1)
 29632  		v.AddArg(v0)
 29633  		return true
 29634  	}
 29635  	// match: (Select1 (Mul64uover x y))
 29636  	// result: (NotEqual (CMPconst (UMULH <typ.UInt64> x y) [0]))
 29637  	for {
 29638  		if v_0.Op != ssaop.OpMul64uover {
 29639  			break
 29640  		}
 29641  		y := v_0.Args[1]
 29642  		x := v_0.Args[0]
 29643  		v.Reset(ssaop.OpARM64NotEqual)
 29644  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29645  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 29646  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64UMULH, typ.UInt64)
 29647  		v1.AddArg2(x, y)
 29648  		v0.AddArg(v1)
 29649  		v.AddArg(v0)
 29650  		return true
 29651  	}
 29652  	return false
 29653  }
 29654  func rewriteValue_OpSelectN(v *ssa.Value) bool {
 29655  	v_0 := v.Args[0]
 29656  	b := v.Block
 29657  	config := b.Func.Config
 29658  	// match: (SelectN [0] call:(CALLstatic {sym} s1:(MOVDstore _ (MOVDconst [sz]) s2:(MOVDstore _ src s3:(MOVDstore {t} _ dst mem)))))
 29659  	// cond: sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(s1, s2, s3, call)
 29660  	// result: (Move [sz] dst src mem)
 29661  	for {
 29662  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 29663  			break
 29664  		}
 29665  		call := v_0
 29666  		if call.Op != ssaop.OpARM64CALLstatic || len(call.Args) != 1 {
 29667  			break
 29668  		}
 29669  		sym := ssa.AuxToCall(call.Aux)
 29670  		s1 := call.Args[0]
 29671  		if s1.Op != ssaop.OpARM64MOVDstore {
 29672  			break
 29673  		}
 29674  		_ = s1.Args[2]
 29675  		s1_1 := s1.Args[1]
 29676  		if s1_1.Op != ssaop.OpARM64MOVDconst {
 29677  			break
 29678  		}
 29679  		sz := ssa.AuxIntToInt64(s1_1.AuxInt)
 29680  		s2 := s1.Args[2]
 29681  		if s2.Op != ssaop.OpARM64MOVDstore {
 29682  			break
 29683  		}
 29684  		_ = s2.Args[2]
 29685  		src := s2.Args[1]
 29686  		s3 := s2.Args[2]
 29687  		if s3.Op != ssaop.OpARM64MOVDstore {
 29688  			break
 29689  		}
 29690  		mem := s3.Args[2]
 29691  		dst := s3.Args[1]
 29692  		if !(sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(s1, s2, s3, call)) {
 29693  			break
 29694  		}
 29695  		v.Reset(ssaop.OpMove)
 29696  		v.AuxInt = ssa.Int64ToAuxInt(sz)
 29697  		v.AddArg3(dst, src, mem)
 29698  		return true
 29699  	}
 29700  	// match: (SelectN [0] call:(CALLstatic {sym} dst src (MOVDconst [sz]) mem))
 29701  	// cond: sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && call.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(call)
 29702  	// result: (Move [sz] dst src mem)
 29703  	for {
 29704  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 29705  			break
 29706  		}
 29707  		call := v_0
 29708  		if call.Op != ssaop.OpARM64CALLstatic || len(call.Args) != 4 {
 29709  			break
 29710  		}
 29711  		sym := ssa.AuxToCall(call.Aux)
 29712  		mem := call.Args[3]
 29713  		dst := call.Args[0]
 29714  		src := call.Args[1]
 29715  		call_2 := call.Args[2]
 29716  		if call_2.Op != ssaop.OpARM64MOVDconst {
 29717  			break
 29718  		}
 29719  		sz := ssa.AuxIntToInt64(call_2.AuxInt)
 29720  		if !(sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && call.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(call)) {
 29721  			break
 29722  		}
 29723  		v.Reset(ssaop.OpMove)
 29724  		v.AuxInt = ssa.Int64ToAuxInt(sz)
 29725  		v.AddArg3(dst, src, mem)
 29726  		return true
 29727  	}
 29728  	return false
 29729  }
 29730  func rewriteValue_OpShiftAllLeftInt16x8(v *ssa.Value) bool {
 29731  	v_1 := v.Args[1]
 29732  	v_0 := v.Args[0]
 29733  	b := v.Block
 29734  	typ := &b.Func.Config.Types
 29735  	// match: (ShiftAllLeftInt16x8 x y)
 29736  	// result: (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 29737  	for {
 29738  		x := v_0
 29739  		y := v_1
 29740  		v.Reset(ssaop.OpARM64VSSHL8H)
 29741  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 29742  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 29743  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 29744  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 29745  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 29746  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29747  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29748  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 29749  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29750  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 29751  		v4.AddArg(y)
 29752  		v2.AddArg3(y, v3, v4)
 29753  		v1.AddArg2(x, v2)
 29754  		v0.AddArg(v1)
 29755  		v.AddArg2(x, v0)
 29756  		return true
 29757  	}
 29758  }
 29759  func rewriteValue_OpShiftAllLeftInt32x4(v *ssa.Value) bool {
 29760  	v_1 := v.Args[1]
 29761  	v_0 := v.Args[0]
 29762  	b := v.Block
 29763  	typ := &b.Func.Config.Types
 29764  	// match: (ShiftAllLeftInt32x4 x y)
 29765  	// result: (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 29766  	for {
 29767  		x := v_0
 29768  		y := v_1
 29769  		v.Reset(ssaop.OpARM64VSSHL4S)
 29770  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 29771  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 29772  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 29773  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 29774  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 29775  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29776  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29777  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 29778  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29779  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 29780  		v4.AddArg(y)
 29781  		v2.AddArg3(y, v3, v4)
 29782  		v1.AddArg2(x, v2)
 29783  		v0.AddArg(v1)
 29784  		v.AddArg2(x, v0)
 29785  		return true
 29786  	}
 29787  }
 29788  func rewriteValue_OpShiftAllLeftInt64x2(v *ssa.Value) bool {
 29789  	v_1 := v.Args[1]
 29790  	v_0 := v.Args[0]
 29791  	b := v.Block
 29792  	typ := &b.Func.Config.Types
 29793  	// match: (ShiftAllLeftInt64x2 x y)
 29794  	// result: (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 29795  	for {
 29796  		x := v_0
 29797  		y := v_1
 29798  		v.Reset(ssaop.OpARM64VSSHL2D)
 29799  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 29800  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 29801  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 29802  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 29803  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 29804  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29805  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29806  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 29807  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29808  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 29809  		v4.AddArg(y)
 29810  		v2.AddArg3(y, v3, v4)
 29811  		v1.AddArg2(x, v2)
 29812  		v0.AddArg(v1)
 29813  		v.AddArg2(x, v0)
 29814  		return true
 29815  	}
 29816  }
 29817  func rewriteValue_OpShiftAllLeftInt8x16(v *ssa.Value) bool {
 29818  	v_1 := v.Args[1]
 29819  	v_0 := v.Args[0]
 29820  	b := v.Block
 29821  	typ := &b.Func.Config.Types
 29822  	// match: (ShiftAllLeftInt8x16 x y)
 29823  	// result: (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 29824  	for {
 29825  		x := v_0
 29826  		y := v_1
 29827  		v.Reset(ssaop.OpARM64VSSHL16B)
 29828  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 29829  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 29830  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 29831  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 29832  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 29833  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29834  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29835  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 29836  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29837  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 29838  		v4.AddArg(y)
 29839  		v2.AddArg3(y, v3, v4)
 29840  		v1.AddArg2(x, v2)
 29841  		v0.AddArg(v1)
 29842  		v.AddArg2(x, v0)
 29843  		return true
 29844  	}
 29845  }
 29846  func rewriteValue_OpShiftAllLeftUint16x8(v *ssa.Value) bool {
 29847  	v_1 := v.Args[1]
 29848  	v_0 := v.Args[0]
 29849  	b := v.Block
 29850  	typ := &b.Func.Config.Types
 29851  	// match: (ShiftAllLeftUint16x8 x y)
 29852  	// result: (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 29853  	for {
 29854  		x := v_0
 29855  		y := v_1
 29856  		v.Reset(ssaop.OpARM64VUSHL8H)
 29857  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 29858  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 29859  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 29860  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 29861  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 29862  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29863  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29864  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 29865  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29866  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 29867  		v4.AddArg(y)
 29868  		v2.AddArg3(y, v3, v4)
 29869  		v1.AddArg2(x, v2)
 29870  		v0.AddArg(v1)
 29871  		v.AddArg2(x, v0)
 29872  		return true
 29873  	}
 29874  }
 29875  func rewriteValue_OpShiftAllLeftUint32x4(v *ssa.Value) bool {
 29876  	v_1 := v.Args[1]
 29877  	v_0 := v.Args[0]
 29878  	b := v.Block
 29879  	typ := &b.Func.Config.Types
 29880  	// match: (ShiftAllLeftUint32x4 x y)
 29881  	// result: (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 29882  	for {
 29883  		x := v_0
 29884  		y := v_1
 29885  		v.Reset(ssaop.OpARM64VUSHL4S)
 29886  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 29887  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 29888  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 29889  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 29890  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 29891  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29892  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29893  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 29894  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29895  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 29896  		v4.AddArg(y)
 29897  		v2.AddArg3(y, v3, v4)
 29898  		v1.AddArg2(x, v2)
 29899  		v0.AddArg(v1)
 29900  		v.AddArg2(x, v0)
 29901  		return true
 29902  	}
 29903  }
 29904  func rewriteValue_OpShiftAllLeftUint64x2(v *ssa.Value) bool {
 29905  	v_1 := v.Args[1]
 29906  	v_0 := v.Args[0]
 29907  	b := v.Block
 29908  	typ := &b.Func.Config.Types
 29909  	// match: (ShiftAllLeftUint64x2 x y)
 29910  	// result: (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 29911  	for {
 29912  		x := v_0
 29913  		y := v_1
 29914  		v.Reset(ssaop.OpARM64VUSHL2D)
 29915  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 29916  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 29917  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 29918  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 29919  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 29920  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29921  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29922  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 29923  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29924  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 29925  		v4.AddArg(y)
 29926  		v2.AddArg3(y, v3, v4)
 29927  		v1.AddArg2(x, v2)
 29928  		v0.AddArg(v1)
 29929  		v.AddArg2(x, v0)
 29930  		return true
 29931  	}
 29932  }
 29933  func rewriteValue_OpShiftAllLeftUint8x16(v *ssa.Value) bool {
 29934  	v_1 := v.Args[1]
 29935  	v_0 := v.Args[0]
 29936  	b := v.Block
 29937  	typ := &b.Func.Config.Types
 29938  	// match: (ShiftAllLeftUint8x16 x y)
 29939  	// result: (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 29940  	for {
 29941  		x := v_0
 29942  		y := v_1
 29943  		v.Reset(ssaop.OpARM64VUSHL16B)
 29944  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 29945  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 29946  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 29947  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 29948  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 29949  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29950  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29951  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 29952  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29953  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 29954  		v4.AddArg(y)
 29955  		v2.AddArg3(y, v3, v4)
 29956  		v1.AddArg2(x, v2)
 29957  		v0.AddArg(v1)
 29958  		v.AddArg2(x, v0)
 29959  		return true
 29960  	}
 29961  }
 29962  func rewriteValue_OpShiftAllRightInt16x8(v *ssa.Value) bool {
 29963  	v_1 := v.Args[1]
 29964  	v_0 := v.Args[0]
 29965  	b := v.Block
 29966  	typ := &b.Func.Config.Types
 29967  	// match: (ShiftAllRightInt16x8 x y)
 29968  	// result: (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 29969  	for {
 29970  		x := v_0
 29971  		y := v_1
 29972  		v.Reset(ssaop.OpARM64VSSHL8H)
 29973  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 29974  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 29975  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 29976  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 29977  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 29978  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 29979  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29980  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29981  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 29982  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29983  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 29984  		v5.AddArg(y)
 29985  		v3.AddArg3(y, v4, v5)
 29986  		v2.AddArg(v3)
 29987  		v1.AddArg2(x, v2)
 29988  		v0.AddArg(v1)
 29989  		v.AddArg2(x, v0)
 29990  		return true
 29991  	}
 29992  }
 29993  func rewriteValue_OpShiftAllRightInt32x4(v *ssa.Value) bool {
 29994  	v_1 := v.Args[1]
 29995  	v_0 := v.Args[0]
 29996  	b := v.Block
 29997  	typ := &b.Func.Config.Types
 29998  	// match: (ShiftAllRightInt32x4 x y)
 29999  	// result: (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 30000  	for {
 30001  		x := v_0
 30002  		y := v_1
 30003  		v.Reset(ssaop.OpARM64VSSHL4S)
 30004  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 30005  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 30006  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 30007  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 30008  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 30009  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 30010  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 30011  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30012  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 30013  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 30014  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 30015  		v5.AddArg(y)
 30016  		v3.AddArg3(y, v4, v5)
 30017  		v2.AddArg(v3)
 30018  		v1.AddArg2(x, v2)
 30019  		v0.AddArg(v1)
 30020  		v.AddArg2(x, v0)
 30021  		return true
 30022  	}
 30023  }
 30024  func rewriteValue_OpShiftAllRightInt64x2(v *ssa.Value) bool {
 30025  	v_1 := v.Args[1]
 30026  	v_0 := v.Args[0]
 30027  	b := v.Block
 30028  	typ := &b.Func.Config.Types
 30029  	// match: (ShiftAllRightInt64x2 x y)
 30030  	// result: (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 30031  	for {
 30032  		x := v_0
 30033  		y := v_1
 30034  		v.Reset(ssaop.OpARM64VSSHL2D)
 30035  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 30036  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 30037  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 30038  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 30039  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 30040  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 30041  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 30042  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30043  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 30044  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 30045  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 30046  		v5.AddArg(y)
 30047  		v3.AddArg3(y, v4, v5)
 30048  		v2.AddArg(v3)
 30049  		v1.AddArg2(x, v2)
 30050  		v0.AddArg(v1)
 30051  		v.AddArg2(x, v0)
 30052  		return true
 30053  	}
 30054  }
 30055  func rewriteValue_OpShiftAllRightInt8x16(v *ssa.Value) bool {
 30056  	v_1 := v.Args[1]
 30057  	v_0 := v.Args[0]
 30058  	b := v.Block
 30059  	typ := &b.Func.Config.Types
 30060  	// match: (ShiftAllRightInt8x16 x y)
 30061  	// result: (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 30062  	for {
 30063  		x := v_0
 30064  		y := v_1
 30065  		v.Reset(ssaop.OpARM64VSSHL16B)
 30066  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 30067  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 30068  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 30069  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 30070  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 30071  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 30072  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 30073  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30074  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 30075  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 30076  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 30077  		v5.AddArg(y)
 30078  		v3.AddArg3(y, v4, v5)
 30079  		v2.AddArg(v3)
 30080  		v1.AddArg2(x, v2)
 30081  		v0.AddArg(v1)
 30082  		v.AddArg2(x, v0)
 30083  		return true
 30084  	}
 30085  }
 30086  func rewriteValue_OpShiftAllRightUint16x8(v *ssa.Value) bool {
 30087  	v_1 := v.Args[1]
 30088  	v_0 := v.Args[0]
 30089  	b := v.Block
 30090  	typ := &b.Func.Config.Types
 30091  	// match: (ShiftAllRightUint16x8 x y)
 30092  	// result: (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 30093  	for {
 30094  		x := v_0
 30095  		y := v_1
 30096  		v.Reset(ssaop.OpARM64VUSHL8H)
 30097  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 30098  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 30099  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 30100  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 30101  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 30102  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 30103  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 30104  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30105  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 30106  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 30107  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 30108  		v5.AddArg(y)
 30109  		v3.AddArg3(y, v4, v5)
 30110  		v2.AddArg(v3)
 30111  		v1.AddArg2(x, v2)
 30112  		v0.AddArg(v1)
 30113  		v.AddArg2(x, v0)
 30114  		return true
 30115  	}
 30116  }
 30117  func rewriteValue_OpShiftAllRightUint32x4(v *ssa.Value) bool {
 30118  	v_1 := v.Args[1]
 30119  	v_0 := v.Args[0]
 30120  	b := v.Block
 30121  	typ := &b.Func.Config.Types
 30122  	// match: (ShiftAllRightUint32x4 x y)
 30123  	// result: (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 30124  	for {
 30125  		x := v_0
 30126  		y := v_1
 30127  		v.Reset(ssaop.OpARM64VUSHL4S)
 30128  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 30129  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 30130  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 30131  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 30132  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 30133  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 30134  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 30135  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30136  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 30137  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 30138  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 30139  		v5.AddArg(y)
 30140  		v3.AddArg3(y, v4, v5)
 30141  		v2.AddArg(v3)
 30142  		v1.AddArg2(x, v2)
 30143  		v0.AddArg(v1)
 30144  		v.AddArg2(x, v0)
 30145  		return true
 30146  	}
 30147  }
 30148  func rewriteValue_OpShiftAllRightUint64x2(v *ssa.Value) bool {
 30149  	v_1 := v.Args[1]
 30150  	v_0 := v.Args[0]
 30151  	b := v.Block
 30152  	typ := &b.Func.Config.Types
 30153  	// match: (ShiftAllRightUint64x2 x y)
 30154  	// result: (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 30155  	for {
 30156  		x := v_0
 30157  		y := v_1
 30158  		v.Reset(ssaop.OpARM64VUSHL2D)
 30159  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 30160  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 30161  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 30162  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 30163  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 30164  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 30165  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 30166  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30167  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 30168  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 30169  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 30170  		v5.AddArg(y)
 30171  		v3.AddArg3(y, v4, v5)
 30172  		v2.AddArg(v3)
 30173  		v1.AddArg2(x, v2)
 30174  		v0.AddArg(v1)
 30175  		v.AddArg2(x, v0)
 30176  		return true
 30177  	}
 30178  }
 30179  func rewriteValue_OpShiftAllRightUint8x16(v *ssa.Value) bool {
 30180  	v_1 := v.Args[1]
 30181  	v_0 := v.Args[0]
 30182  	b := v.Block
 30183  	typ := &b.Func.Config.Types
 30184  	// match: (ShiftAllRightUint8x16 x y)
 30185  	// result: (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 30186  	for {
 30187  		x := v_0
 30188  		y := v_1
 30189  		v.Reset(ssaop.OpARM64VUSHL16B)
 30190  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 30191  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 30192  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 30193  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 30194  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 30195  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 30196  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 30197  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30198  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 30199  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 30200  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 30201  		v5.AddArg(y)
 30202  		v3.AddArg3(y, v4, v5)
 30203  		v2.AddArg(v3)
 30204  		v1.AddArg2(x, v2)
 30205  		v0.AddArg(v1)
 30206  		v.AddArg2(x, v0)
 30207  		return true
 30208  	}
 30209  }
 30210  func rewriteValue_OpSlicemask(v *ssa.Value) bool {
 30211  	v_0 := v.Args[0]
 30212  	b := v.Block
 30213  	// match: (Slicemask <t> x)
 30214  	// result: (SRAconst (NEG <t> x) [63])
 30215  	for {
 30216  		t := v.Type
 30217  		x := v_0
 30218  		v.Reset(ssaop.OpARM64SRAconst)
 30219  		v.AuxInt = ssa.Int64ToAuxInt(63)
 30220  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, t)
 30221  		v0.AddArg(x)
 30222  		v.AddArg(v0)
 30223  		return true
 30224  	}
 30225  }
 30226  func rewriteValue_OpSqrtFloat32s(v *ssa.Value) bool {
 30227  	v_0 := v.Args[0]
 30228  	b := v.Block
 30229  	typ := &b.Func.Config.Types
 30230  	// match: (SqrtFloat32s x)
 30231  	// result: (ZFSQRTS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 30232  	for {
 30233  		x := v_0
 30234  		v.Reset(ssaop.OpARM64ZFSQRTS)
 30235  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30236  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 30237  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30238  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30239  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30240  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 30241  		v1.AddArg2(v2, v3)
 30242  		v0.AddArg(v1)
 30243  		v.AddArg2(x, v0)
 30244  		return true
 30245  	}
 30246  }
 30247  func rewriteValue_OpSqrtFloat64s(v *ssa.Value) bool {
 30248  	v_0 := v.Args[0]
 30249  	b := v.Block
 30250  	typ := &b.Func.Config.Types
 30251  	// match: (SqrtFloat64s x)
 30252  	// result: (ZFSQRTD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 30253  	for {
 30254  		x := v_0
 30255  		v.Reset(ssaop.OpARM64ZFSQRTD)
 30256  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30257  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 30258  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30259  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30260  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30261  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 30262  		v1.AddArg2(v2, v3)
 30263  		v0.AddArg(v1)
 30264  		v.AddArg2(x, v0)
 30265  		return true
 30266  	}
 30267  }
 30268  func rewriteValue_OpStore(v *ssa.Value) bool {
 30269  	v_2 := v.Args[2]
 30270  	v_1 := v.Args[1]
 30271  	v_0 := v.Args[0]
 30272  	// match: (Store {t} ptr val mem)
 30273  	// cond: t.Size() == 1
 30274  	// result: (MOVBstore ptr val mem)
 30275  	for {
 30276  		t := ssa.AuxToType(v.Aux)
 30277  		ptr := v_0
 30278  		val := v_1
 30279  		mem := v_2
 30280  		if !(t.Size() == 1) {
 30281  			break
 30282  		}
 30283  		v.Reset(ssaop.OpARM64MOVBstore)
 30284  		v.AddArg3(ptr, val, mem)
 30285  		return true
 30286  	}
 30287  	// match: (Store {t} ptr val mem)
 30288  	// cond: t.Size() == 2
 30289  	// result: (MOVHstore ptr val mem)
 30290  	for {
 30291  		t := ssa.AuxToType(v.Aux)
 30292  		ptr := v_0
 30293  		val := v_1
 30294  		mem := v_2
 30295  		if !(t.Size() == 2) {
 30296  			break
 30297  		}
 30298  		v.Reset(ssaop.OpARM64MOVHstore)
 30299  		v.AddArg3(ptr, val, mem)
 30300  		return true
 30301  	}
 30302  	// match: (Store {t} ptr val mem)
 30303  	// cond: t.Size() == 4 && !t.IsFloat()
 30304  	// result: (MOVWstore ptr val mem)
 30305  	for {
 30306  		t := ssa.AuxToType(v.Aux)
 30307  		ptr := v_0
 30308  		val := v_1
 30309  		mem := v_2
 30310  		if !(t.Size() == 4 && !t.IsFloat()) {
 30311  			break
 30312  		}
 30313  		v.Reset(ssaop.OpARM64MOVWstore)
 30314  		v.AddArg3(ptr, val, mem)
 30315  		return true
 30316  	}
 30317  	// match: (Store {t} ptr val mem)
 30318  	// cond: t.Size() == 8 && !t.IsFloat() && !t.IsSIMD()
 30319  	// result: (MOVDstore ptr val mem)
 30320  	for {
 30321  		t := ssa.AuxToType(v.Aux)
 30322  		ptr := v_0
 30323  		val := v_1
 30324  		mem := v_2
 30325  		if !(t.Size() == 8 && !t.IsFloat() && !t.IsSIMD()) {
 30326  			break
 30327  		}
 30328  		v.Reset(ssaop.OpARM64MOVDstore)
 30329  		v.AddArg3(ptr, val, mem)
 30330  		return true
 30331  	}
 30332  	// match: (Store {t} ptr val mem)
 30333  	// cond: t.Size() == 4 && t.IsFloat()
 30334  	// result: (FMOVSstore ptr val mem)
 30335  	for {
 30336  		t := ssa.AuxToType(v.Aux)
 30337  		ptr := v_0
 30338  		val := v_1
 30339  		mem := v_2
 30340  		if !(t.Size() == 4 && t.IsFloat()) {
 30341  			break
 30342  		}
 30343  		v.Reset(ssaop.OpARM64FMOVSstore)
 30344  		v.AddArg3(ptr, val, mem)
 30345  		return true
 30346  	}
 30347  	// match: (Store {t} ptr val mem)
 30348  	// cond: t.Size() == 8 && t.IsFloat()
 30349  	// result: (FMOVDstore ptr val mem)
 30350  	for {
 30351  		t := ssa.AuxToType(v.Aux)
 30352  		ptr := v_0
 30353  		val := v_1
 30354  		mem := v_2
 30355  		if !(t.Size() == 8 && t.IsFloat()) {
 30356  			break
 30357  		}
 30358  		v.Reset(ssaop.OpARM64FMOVDstore)
 30359  		v.AddArg3(ptr, val, mem)
 30360  		return true
 30361  	}
 30362  	// match: (Store {t} ptr val mem)
 30363  	// cond: t.Size() == 16
 30364  	// result: (FMOVQstore ptr val mem)
 30365  	for {
 30366  		t := ssa.AuxToType(v.Aux)
 30367  		ptr := v_0
 30368  		val := v_1
 30369  		mem := v_2
 30370  		if !(t.Size() == 16) {
 30371  			break
 30372  		}
 30373  		v.Reset(ssaop.OpARM64FMOVQstore)
 30374  		v.AddArg3(ptr, val, mem)
 30375  		return true
 30376  	}
 30377  	// match: (Store {t} ptr val mem)
 30378  	// cond: t.Size() == 32 && t.IsSIMD()
 30379  	// result: (ZSTRstore ptr val mem)
 30380  	for {
 30381  		t := ssa.AuxToType(v.Aux)
 30382  		ptr := v_0
 30383  		val := v_1
 30384  		mem := v_2
 30385  		if !(t.Size() == 32 && t.IsSIMD()) {
 30386  			break
 30387  		}
 30388  		v.Reset(ssaop.OpARM64ZSTRstore)
 30389  		v.AddArg3(ptr, val, mem)
 30390  		return true
 30391  	}
 30392  	// match: (Store {t} ptr val mem)
 30393  	// cond: t.Size() == 8 && t.IsSIMD()
 30394  	// result: (PSTRstore ptr val mem)
 30395  	for {
 30396  		t := ssa.AuxToType(v.Aux)
 30397  		ptr := v_0
 30398  		val := v_1
 30399  		mem := v_2
 30400  		if !(t.Size() == 8 && t.IsSIMD()) {
 30401  			break
 30402  		}
 30403  		v.Reset(ssaop.OpARM64PSTRstore)
 30404  		v.AddArg3(ptr, val, mem)
 30405  		return true
 30406  	}
 30407  	return false
 30408  }
 30409  func rewriteValue_OpStoreMasked8(v *ssa.Value) bool {
 30410  	v_3 := v.Args[3]
 30411  	v_2 := v.Args[2]
 30412  	v_1 := v.Args[1]
 30413  	v_0 := v.Args[0]
 30414  	// match: (StoreMasked8 {t} ptr mask val mem)
 30415  	// cond: t.Size() == 32
 30416  	// result: (ZST1BPredstore ptr val mask mem)
 30417  	for {
 30418  		t := ssa.AuxToType(v.Aux)
 30419  		ptr := v_0
 30420  		mask := v_1
 30421  		val := v_2
 30422  		mem := v_3
 30423  		if !(t.Size() == 32) {
 30424  			break
 30425  		}
 30426  		v.Reset(ssaop.OpARM64ZST1BPredstore)
 30427  		v.AddArg4(ptr, val, mask, mem)
 30428  		return true
 30429  	}
 30430  	return false
 30431  }
 30432  func rewriteValue_OpTruncFloat32s(v *ssa.Value) bool {
 30433  	v_0 := v.Args[0]
 30434  	b := v.Block
 30435  	typ := &b.Func.Config.Types
 30436  	// match: (TruncFloat32s x)
 30437  	// result: (ZFRINTZS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 30438  	for {
 30439  		x := v_0
 30440  		v.Reset(ssaop.OpARM64ZFRINTZS)
 30441  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30442  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 30443  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30444  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30445  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30446  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 30447  		v1.AddArg2(v2, v3)
 30448  		v0.AddArg(v1)
 30449  		v.AddArg2(x, v0)
 30450  		return true
 30451  	}
 30452  }
 30453  func rewriteValue_OpTruncFloat64s(v *ssa.Value) bool {
 30454  	v_0 := v.Args[0]
 30455  	b := v.Block
 30456  	typ := &b.Func.Config.Types
 30457  	// match: (TruncFloat64s x)
 30458  	// result: (ZFRINTZD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 30459  	for {
 30460  		x := v_0
 30461  		v.Reset(ssaop.OpARM64ZFRINTZD)
 30462  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30463  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 30464  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30465  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30466  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30467  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 30468  		v1.AddArg2(v2, v3)
 30469  		v0.AddArg(v1)
 30470  		v.AddArg2(x, v0)
 30471  		return true
 30472  	}
 30473  }
 30474  func rewriteValue_OpZero(v *ssa.Value) bool {
 30475  	v_1 := v.Args[1]
 30476  	v_0 := v.Args[0]
 30477  	b := v.Block
 30478  	typ := &b.Func.Config.Types
 30479  	// match: (Zero [0] _ mem)
 30480  	// result: mem
 30481  	for {
 30482  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 30483  			break
 30484  		}
 30485  		mem := v_1
 30486  		v.CopyOf(mem)
 30487  		return true
 30488  	}
 30489  	// match: (Zero [1] ptr mem)
 30490  	// result: (MOVBstore ptr (MOVDconst [0]) mem)
 30491  	for {
 30492  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
 30493  			break
 30494  		}
 30495  		ptr := v_0
 30496  		mem := v_1
 30497  		v.Reset(ssaop.OpARM64MOVBstore)
 30498  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30499  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30500  		v.AddArg3(ptr, v0, mem)
 30501  		return true
 30502  	}
 30503  	// match: (Zero [2] ptr mem)
 30504  	// result: (MOVHstore ptr (MOVDconst [0]) mem)
 30505  	for {
 30506  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
 30507  			break
 30508  		}
 30509  		ptr := v_0
 30510  		mem := v_1
 30511  		v.Reset(ssaop.OpARM64MOVHstore)
 30512  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30513  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30514  		v.AddArg3(ptr, v0, mem)
 30515  		return true
 30516  	}
 30517  	// match: (Zero [4] ptr mem)
 30518  	// result: (MOVWstore ptr (MOVDconst [0]) mem)
 30519  	for {
 30520  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
 30521  			break
 30522  		}
 30523  		ptr := v_0
 30524  		mem := v_1
 30525  		v.Reset(ssaop.OpARM64MOVWstore)
 30526  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30527  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30528  		v.AddArg3(ptr, v0, mem)
 30529  		return true
 30530  	}
 30531  	// match: (Zero [3] ptr mem)
 30532  	// result: (MOVBstore [2] ptr (MOVDconst [0]) (MOVHstore ptr (MOVDconst [0]) mem))
 30533  	for {
 30534  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
 30535  			break
 30536  		}
 30537  		ptr := v_0
 30538  		mem := v_1
 30539  		v.Reset(ssaop.OpARM64MOVBstore)
 30540  		v.AuxInt = ssa.Int32ToAuxInt(2)
 30541  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30542  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30543  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHstore, types.TypeMem)
 30544  		v1.AddArg3(ptr, v0, mem)
 30545  		v.AddArg3(ptr, v0, v1)
 30546  		return true
 30547  	}
 30548  	// match: (Zero [5] ptr mem)
 30549  	// result: (MOVBstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 30550  	for {
 30551  		if ssa.AuxIntToInt64(v.AuxInt) != 5 {
 30552  			break
 30553  		}
 30554  		ptr := v_0
 30555  		mem := v_1
 30556  		v.Reset(ssaop.OpARM64MOVBstore)
 30557  		v.AuxInt = ssa.Int32ToAuxInt(4)
 30558  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30559  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30560  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 30561  		v1.AddArg3(ptr, v0, mem)
 30562  		v.AddArg3(ptr, v0, v1)
 30563  		return true
 30564  	}
 30565  	// match: (Zero [6] ptr mem)
 30566  	// result: (MOVHstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 30567  	for {
 30568  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
 30569  			break
 30570  		}
 30571  		ptr := v_0
 30572  		mem := v_1
 30573  		v.Reset(ssaop.OpARM64MOVHstore)
 30574  		v.AuxInt = ssa.Int32ToAuxInt(4)
 30575  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30576  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30577  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 30578  		v1.AddArg3(ptr, v0, mem)
 30579  		v.AddArg3(ptr, v0, v1)
 30580  		return true
 30581  	}
 30582  	// match: (Zero [7] ptr mem)
 30583  	// result: (MOVWstore [3] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 30584  	for {
 30585  		if ssa.AuxIntToInt64(v.AuxInt) != 7 {
 30586  			break
 30587  		}
 30588  		ptr := v_0
 30589  		mem := v_1
 30590  		v.Reset(ssaop.OpARM64MOVWstore)
 30591  		v.AuxInt = ssa.Int32ToAuxInt(3)
 30592  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30593  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30594  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 30595  		v1.AddArg3(ptr, v0, mem)
 30596  		v.AddArg3(ptr, v0, v1)
 30597  		return true
 30598  	}
 30599  	// match: (Zero [8] ptr mem)
 30600  	// result: (MOVDstore ptr (MOVDconst [0]) mem)
 30601  	for {
 30602  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
 30603  			break
 30604  		}
 30605  		ptr := v_0
 30606  		mem := v_1
 30607  		v.Reset(ssaop.OpARM64MOVDstore)
 30608  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30609  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30610  		v.AddArg3(ptr, v0, mem)
 30611  		return true
 30612  	}
 30613  	// match: (Zero [9] ptr mem)
 30614  	// result: (MOVBstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 30615  	for {
 30616  		if ssa.AuxIntToInt64(v.AuxInt) != 9 {
 30617  			break
 30618  		}
 30619  		ptr := v_0
 30620  		mem := v_1
 30621  		v.Reset(ssaop.OpARM64MOVBstore)
 30622  		v.AuxInt = ssa.Int32ToAuxInt(8)
 30623  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30624  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30625  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30626  		v1.AddArg3(ptr, v0, mem)
 30627  		v.AddArg3(ptr, v0, v1)
 30628  		return true
 30629  	}
 30630  	// match: (Zero [10] ptr mem)
 30631  	// result: (MOVHstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 30632  	for {
 30633  		if ssa.AuxIntToInt64(v.AuxInt) != 10 {
 30634  			break
 30635  		}
 30636  		ptr := v_0
 30637  		mem := v_1
 30638  		v.Reset(ssaop.OpARM64MOVHstore)
 30639  		v.AuxInt = ssa.Int32ToAuxInt(8)
 30640  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30641  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30642  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30643  		v1.AddArg3(ptr, v0, mem)
 30644  		v.AddArg3(ptr, v0, v1)
 30645  		return true
 30646  	}
 30647  	// match: (Zero [11] ptr mem)
 30648  	// result: (MOVDstore [3] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 30649  	for {
 30650  		if ssa.AuxIntToInt64(v.AuxInt) != 11 {
 30651  			break
 30652  		}
 30653  		ptr := v_0
 30654  		mem := v_1
 30655  		v.Reset(ssaop.OpARM64MOVDstore)
 30656  		v.AuxInt = ssa.Int32ToAuxInt(3)
 30657  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30658  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30659  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30660  		v1.AddArg3(ptr, v0, mem)
 30661  		v.AddArg3(ptr, v0, v1)
 30662  		return true
 30663  	}
 30664  	// match: (Zero [12] ptr mem)
 30665  	// result: (MOVWstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 30666  	for {
 30667  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
 30668  			break
 30669  		}
 30670  		ptr := v_0
 30671  		mem := v_1
 30672  		v.Reset(ssaop.OpARM64MOVWstore)
 30673  		v.AuxInt = ssa.Int32ToAuxInt(8)
 30674  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30675  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30676  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30677  		v1.AddArg3(ptr, v0, mem)
 30678  		v.AddArg3(ptr, v0, v1)
 30679  		return true
 30680  	}
 30681  	// match: (Zero [13] ptr mem)
 30682  	// result: (MOVDstore [5] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 30683  	for {
 30684  		if ssa.AuxIntToInt64(v.AuxInt) != 13 {
 30685  			break
 30686  		}
 30687  		ptr := v_0
 30688  		mem := v_1
 30689  		v.Reset(ssaop.OpARM64MOVDstore)
 30690  		v.AuxInt = ssa.Int32ToAuxInt(5)
 30691  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30692  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30693  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30694  		v1.AddArg3(ptr, v0, mem)
 30695  		v.AddArg3(ptr, v0, v1)
 30696  		return true
 30697  	}
 30698  	// match: (Zero [14] ptr mem)
 30699  	// result: (MOVDstore [6] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 30700  	for {
 30701  		if ssa.AuxIntToInt64(v.AuxInt) != 14 {
 30702  			break
 30703  		}
 30704  		ptr := v_0
 30705  		mem := v_1
 30706  		v.Reset(ssaop.OpARM64MOVDstore)
 30707  		v.AuxInt = ssa.Int32ToAuxInt(6)
 30708  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30709  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30710  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30711  		v1.AddArg3(ptr, v0, mem)
 30712  		v.AddArg3(ptr, v0, v1)
 30713  		return true
 30714  	}
 30715  	// match: (Zero [15] ptr mem)
 30716  	// result: (MOVDstore [7] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 30717  	for {
 30718  		if ssa.AuxIntToInt64(v.AuxInt) != 15 {
 30719  			break
 30720  		}
 30721  		ptr := v_0
 30722  		mem := v_1
 30723  		v.Reset(ssaop.OpARM64MOVDstore)
 30724  		v.AuxInt = ssa.Int32ToAuxInt(7)
 30725  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30726  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30727  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30728  		v1.AddArg3(ptr, v0, mem)
 30729  		v.AddArg3(ptr, v0, v1)
 30730  		return true
 30731  	}
 30732  	// match: (Zero [16] ptr mem)
 30733  	// result: (STP [0] ptr (MOVDconst [0]) (MOVDconst [0]) mem)
 30734  	for {
 30735  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
 30736  			break
 30737  		}
 30738  		ptr := v_0
 30739  		mem := v_1
 30740  		v.Reset(ssaop.OpARM64STP)
 30741  		v.AuxInt = ssa.Int32ToAuxInt(0)
 30742  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30743  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 30744  		v.AddArg4(ptr, v0, v0, mem)
 30745  		return true
 30746  	}
 30747  	// match: (Zero [s] ptr mem)
 30748  	// cond: s > 16 && s < 192
 30749  	// result: (LoweredZero [s] ptr mem)
 30750  	for {
 30751  		s := ssa.AuxIntToInt64(v.AuxInt)
 30752  		ptr := v_0
 30753  		mem := v_1
 30754  		if !(s > 16 && s < 192) {
 30755  			break
 30756  		}
 30757  		v.Reset(ssaop.OpARM64LoweredZero)
 30758  		v.AuxInt = ssa.Int64ToAuxInt(s)
 30759  		v.AddArg2(ptr, mem)
 30760  		return true
 30761  	}
 30762  	// match: (Zero [s] ptr mem)
 30763  	// cond: s >= 192
 30764  	// result: (LoweredZeroLoop [s] ptr mem)
 30765  	for {
 30766  		s := ssa.AuxIntToInt64(v.AuxInt)
 30767  		ptr := v_0
 30768  		mem := v_1
 30769  		if !(s >= 192) {
 30770  			break
 30771  		}
 30772  		v.Reset(ssaop.OpARM64LoweredZeroLoop)
 30773  		v.AuxInt = ssa.Int64ToAuxInt(s)
 30774  		v.AddArg2(ptr, mem)
 30775  		return true
 30776  	}
 30777  	return false
 30778  }
 30779  func rewriteValue_OpZeroSIMD(v *ssa.Value) bool {
 30780  	// match: (ZeroSIMD <t>)
 30781  	// cond: t.Size() == 16
 30782  	// result: (VMOVI16B [0] <t>)
 30783  	for {
 30784  		t := v.Type
 30785  		if !(t.Size() == 16) {
 30786  			break
 30787  		}
 30788  		v.Reset(ssaop.OpARM64VMOVI16B)
 30789  		v.Type = t
 30790  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30791  		return true
 30792  	}
 30793  	// match: (ZeroSIMD <t>)
 30794  	// cond: t.Size() == 32 && t.IsSIMD()
 30795  	// result: (ZDUPBconst [0])
 30796  	for {
 30797  		t := v.Type
 30798  		if !(t.Size() == 32 && t.IsSIMD()) {
 30799  			break
 30800  		}
 30801  		v.Reset(ssaop.OpARM64ZDUPBconst)
 30802  		v.AuxInt = ssa.Int8ToAuxInt(0)
 30803  		return true
 30804  	}
 30805  	// match: (ZeroSIMD <t>)
 30806  	// cond: t.Size() == 8 && t.IsSIMD()
 30807  	// result: (PPFALSEB)
 30808  	for {
 30809  		t := v.Type
 30810  		if !(t.Size() == 8 && t.IsSIMD()) {
 30811  			break
 30812  		}
 30813  		v.Reset(ssaop.OpARM64PPFALSEB)
 30814  		return true
 30815  	}
 30816  	return false
 30817  }
 30818  func rewriteValue_Opbroadcast1To16Int8x16(v *ssa.Value) bool {
 30819  	v_0 := v.Args[0]
 30820  	// match: (broadcast1To16Int8x16 x)
 30821  	// result: (VDUPBbcast [0] x)
 30822  	for {
 30823  		x := v_0
 30824  		v.Reset(ssaop.OpARM64VDUPBbcast)
 30825  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30826  		v.AddArg(x)
 30827  		return true
 30828  	}
 30829  }
 30830  func rewriteValue_Opbroadcast1To16Uint8x16(v *ssa.Value) bool {
 30831  	v_0 := v.Args[0]
 30832  	// match: (broadcast1To16Uint8x16 x)
 30833  	// result: (VDUPBbcast [0] x)
 30834  	for {
 30835  		x := v_0
 30836  		v.Reset(ssaop.OpARM64VDUPBbcast)
 30837  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30838  		v.AddArg(x)
 30839  		return true
 30840  	}
 30841  }
 30842  func rewriteValue_Opbroadcast1To2Float64x2(v *ssa.Value) bool {
 30843  	v_0 := v.Args[0]
 30844  	// match: (broadcast1To2Float64x2 x)
 30845  	// result: (VDUPDbcast [0] x)
 30846  	for {
 30847  		x := v_0
 30848  		v.Reset(ssaop.OpARM64VDUPDbcast)
 30849  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30850  		v.AddArg(x)
 30851  		return true
 30852  	}
 30853  }
 30854  func rewriteValue_Opbroadcast1To2Int64x2(v *ssa.Value) bool {
 30855  	v_0 := v.Args[0]
 30856  	// match: (broadcast1To2Int64x2 x)
 30857  	// result: (VDUPDbcast [0] x)
 30858  	for {
 30859  		x := v_0
 30860  		v.Reset(ssaop.OpARM64VDUPDbcast)
 30861  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30862  		v.AddArg(x)
 30863  		return true
 30864  	}
 30865  }
 30866  func rewriteValue_Opbroadcast1To2Uint64x2(v *ssa.Value) bool {
 30867  	v_0 := v.Args[0]
 30868  	// match: (broadcast1To2Uint64x2 x)
 30869  	// result: (VDUPDbcast [0] x)
 30870  	for {
 30871  		x := v_0
 30872  		v.Reset(ssaop.OpARM64VDUPDbcast)
 30873  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30874  		v.AddArg(x)
 30875  		return true
 30876  	}
 30877  }
 30878  func rewriteValue_Opbroadcast1To4Float32x4(v *ssa.Value) bool {
 30879  	v_0 := v.Args[0]
 30880  	// match: (broadcast1To4Float32x4 x)
 30881  	// result: (VDUPSbcast [0] x)
 30882  	for {
 30883  		x := v_0
 30884  		v.Reset(ssaop.OpARM64VDUPSbcast)
 30885  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30886  		v.AddArg(x)
 30887  		return true
 30888  	}
 30889  }
 30890  func rewriteValue_Opbroadcast1To4Int32x4(v *ssa.Value) bool {
 30891  	v_0 := v.Args[0]
 30892  	// match: (broadcast1To4Int32x4 x)
 30893  	// result: (VDUPSbcast [0] x)
 30894  	for {
 30895  		x := v_0
 30896  		v.Reset(ssaop.OpARM64VDUPSbcast)
 30897  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30898  		v.AddArg(x)
 30899  		return true
 30900  	}
 30901  }
 30902  func rewriteValue_Opbroadcast1To4Uint32x4(v *ssa.Value) bool {
 30903  	v_0 := v.Args[0]
 30904  	// match: (broadcast1To4Uint32x4 x)
 30905  	// result: (VDUPSbcast [0] x)
 30906  	for {
 30907  		x := v_0
 30908  		v.Reset(ssaop.OpARM64VDUPSbcast)
 30909  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30910  		v.AddArg(x)
 30911  		return true
 30912  	}
 30913  }
 30914  func rewriteValue_Opbroadcast1To8Int16x8(v *ssa.Value) bool {
 30915  	v_0 := v.Args[0]
 30916  	// match: (broadcast1To8Int16x8 x)
 30917  	// result: (VDUPHbcast [0] x)
 30918  	for {
 30919  		x := v_0
 30920  		v.Reset(ssaop.OpARM64VDUPHbcast)
 30921  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30922  		v.AddArg(x)
 30923  		return true
 30924  	}
 30925  }
 30926  func rewriteValue_Opbroadcast1To8Uint16x8(v *ssa.Value) bool {
 30927  	v_0 := v.Args[0]
 30928  	// match: (broadcast1To8Uint16x8 x)
 30929  	// result: (VDUPHbcast [0] x)
 30930  	for {
 30931  		x := v_0
 30932  		v.Reset(ssaop.OpARM64VDUPHbcast)
 30933  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 30934  		v.AddArg(x)
 30935  		return true
 30936  	}
 30937  }
 30938  func RewriteBlock(b *ssa.Block) bool {
 30939  	typ := &b.Func.Config.Types
 30940  	switch b.Kind {
 30941  	case block.BlockARM64EQ:
 30942  		// match: (EQ (CMPconst [0] z:(AND x y)) yes no)
 30943  		// cond: z.Uses == 1
 30944  		// result: (EQ (TST x y) yes no)
 30945  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 30946  			v_0 := b.Controls[0]
 30947  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 30948  				break
 30949  			}
 30950  			z := v_0.Args[0]
 30951  			if z.Op != ssaop.OpARM64AND {
 30952  				break
 30953  			}
 30954  			_ = z.Args[1]
 30955  			z_0 := z.Args[0]
 30956  			z_1 := z.Args[1]
 30957  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 30958  				x := z_0
 30959  				y := z_1
 30960  				if !(z.Uses == 1) {
 30961  					continue
 30962  				}
 30963  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 30964  				v0.AddArg2(x, y)
 30965  				b.ResetWithControl(block.BlockARM64EQ, v0)
 30966  				return true
 30967  			}
 30968  			break
 30969  		}
 30970  		// match: (EQ (CMPconst [0] x:(ANDconst [c] y)) yes no)
 30971  		// cond: x.Uses == 1
 30972  		// result: (EQ (TSTconst [c] y) yes no)
 30973  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 30974  			v_0 := b.Controls[0]
 30975  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 30976  				break
 30977  			}
 30978  			x := v_0.Args[0]
 30979  			if x.Op != ssaop.OpARM64ANDconst {
 30980  				break
 30981  			}
 30982  			c := ssa.AuxIntToInt64(x.AuxInt)
 30983  			y := x.Args[0]
 30984  			if !(x.Uses == 1) {
 30985  				break
 30986  			}
 30987  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 30988  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 30989  			v0.AddArg(y)
 30990  			b.ResetWithControl(block.BlockARM64EQ, v0)
 30991  			return true
 30992  		}
 30993  		// match: (EQ (CMPWconst [0] z:(AND x y)) yes no)
 30994  		// cond: z.Uses == 1
 30995  		// result: (EQ (TSTW x y) yes no)
 30996  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 30997  			v_0 := b.Controls[0]
 30998  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 30999  				break
 31000  			}
 31001  			z := v_0.Args[0]
 31002  			if z.Op != ssaop.OpARM64AND {
 31003  				break
 31004  			}
 31005  			_ = z.Args[1]
 31006  			z_0 := z.Args[0]
 31007  			z_1 := z.Args[1]
 31008  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31009  				x := z_0
 31010  				y := z_1
 31011  				if !(z.Uses == 1) {
 31012  					continue
 31013  				}
 31014  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 31015  				v0.AddArg2(x, y)
 31016  				b.ResetWithControl(block.BlockARM64EQ, v0)
 31017  				return true
 31018  			}
 31019  			break
 31020  		}
 31021  		// match: (EQ (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 31022  		// cond: x.Uses == 1
 31023  		// result: (EQ (TSTWconst [int32(c)] y) yes no)
 31024  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31025  			v_0 := b.Controls[0]
 31026  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31027  				break
 31028  			}
 31029  			x := v_0.Args[0]
 31030  			if x.Op != ssaop.OpARM64ANDconst {
 31031  				break
 31032  			}
 31033  			c := ssa.AuxIntToInt64(x.AuxInt)
 31034  			y := x.Args[0]
 31035  			if !(x.Uses == 1) {
 31036  				break
 31037  			}
 31038  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 31039  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 31040  			v0.AddArg(y)
 31041  			b.ResetWithControl(block.BlockARM64EQ, v0)
 31042  			return true
 31043  		}
 31044  		// match: (EQ (CMPconst [0] x:(ADDconst [c] y)) yes no)
 31045  		// cond: x.Uses == 1
 31046  		// result: (EQ (CMNconst [c] y) yes no)
 31047  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31048  			v_0 := b.Controls[0]
 31049  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31050  				break
 31051  			}
 31052  			x := v_0.Args[0]
 31053  			if x.Op != ssaop.OpARM64ADDconst {
 31054  				break
 31055  			}
 31056  			c := ssa.AuxIntToInt64(x.AuxInt)
 31057  			y := x.Args[0]
 31058  			if !(x.Uses == 1) {
 31059  				break
 31060  			}
 31061  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 31062  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 31063  			v0.AddArg(y)
 31064  			b.ResetWithControl(block.BlockARM64EQ, v0)
 31065  			return true
 31066  		}
 31067  		// match: (EQ (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 31068  		// cond: x.Uses == 1
 31069  		// result: (EQ (CMNWconst [int32(c)] y) yes no)
 31070  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31071  			v_0 := b.Controls[0]
 31072  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31073  				break
 31074  			}
 31075  			x := v_0.Args[0]
 31076  			if x.Op != ssaop.OpARM64ADDconst {
 31077  				break
 31078  			}
 31079  			c := ssa.AuxIntToInt64(x.AuxInt)
 31080  			y := x.Args[0]
 31081  			if !(x.Uses == 1) {
 31082  				break
 31083  			}
 31084  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 31085  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 31086  			v0.AddArg(y)
 31087  			b.ResetWithControl(block.BlockARM64EQ, v0)
 31088  			return true
 31089  		}
 31090  		// match: (EQ (CMPconst [0] z:(ADD x y)) yes no)
 31091  		// cond: z.Uses == 1
 31092  		// result: (EQ (CMN x y) yes no)
 31093  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31094  			v_0 := b.Controls[0]
 31095  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31096  				break
 31097  			}
 31098  			z := v_0.Args[0]
 31099  			if z.Op != ssaop.OpARM64ADD {
 31100  				break
 31101  			}
 31102  			_ = z.Args[1]
 31103  			z_0 := z.Args[0]
 31104  			z_1 := z.Args[1]
 31105  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31106  				x := z_0
 31107  				y := z_1
 31108  				if !(z.Uses == 1) {
 31109  					continue
 31110  				}
 31111  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 31112  				v0.AddArg2(x, y)
 31113  				b.ResetWithControl(block.BlockARM64EQ, v0)
 31114  				return true
 31115  			}
 31116  			break
 31117  		}
 31118  		// match: (EQ (CMPWconst [0] z:(ADD x y)) yes no)
 31119  		// cond: z.Uses == 1
 31120  		// result: (EQ (CMNW x y) yes no)
 31121  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31122  			v_0 := b.Controls[0]
 31123  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31124  				break
 31125  			}
 31126  			z := v_0.Args[0]
 31127  			if z.Op != ssaop.OpARM64ADD {
 31128  				break
 31129  			}
 31130  			_ = z.Args[1]
 31131  			z_0 := z.Args[0]
 31132  			z_1 := z.Args[1]
 31133  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31134  				x := z_0
 31135  				y := z_1
 31136  				if !(z.Uses == 1) {
 31137  					continue
 31138  				}
 31139  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 31140  				v0.AddArg2(x, y)
 31141  				b.ResetWithControl(block.BlockARM64EQ, v0)
 31142  				return true
 31143  			}
 31144  			break
 31145  		}
 31146  		// match: (EQ (CMP x z:(NEG y)) yes no)
 31147  		// cond: z.Uses == 1
 31148  		// result: (EQ (CMN x y) yes no)
 31149  		for b.Controls[0].Op == ssaop.OpARM64CMP {
 31150  			v_0 := b.Controls[0]
 31151  			_ = v_0.Args[1]
 31152  			x := v_0.Args[0]
 31153  			z := v_0.Args[1]
 31154  			if z.Op != ssaop.OpARM64NEG {
 31155  				break
 31156  			}
 31157  			y := z.Args[0]
 31158  			if !(z.Uses == 1) {
 31159  				break
 31160  			}
 31161  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 31162  			v0.AddArg2(x, y)
 31163  			b.ResetWithControl(block.BlockARM64EQ, v0)
 31164  			return true
 31165  		}
 31166  		// match: (EQ (CMPW x z:(NEG y)) yes no)
 31167  		// cond: z.Uses == 1
 31168  		// result: (EQ (CMNW x y) yes no)
 31169  		for b.Controls[0].Op == ssaop.OpARM64CMPW {
 31170  			v_0 := b.Controls[0]
 31171  			_ = v_0.Args[1]
 31172  			x := v_0.Args[0]
 31173  			z := v_0.Args[1]
 31174  			if z.Op != ssaop.OpARM64NEG {
 31175  				break
 31176  			}
 31177  			y := z.Args[0]
 31178  			if !(z.Uses == 1) {
 31179  				break
 31180  			}
 31181  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 31182  			v0.AddArg2(x, y)
 31183  			b.ResetWithControl(block.BlockARM64EQ, v0)
 31184  			return true
 31185  		}
 31186  		// match: (EQ (CMPconst [0] x) yes no)
 31187  		// result: (Z x yes no)
 31188  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31189  			v_0 := b.Controls[0]
 31190  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31191  				break
 31192  			}
 31193  			x := v_0.Args[0]
 31194  			b.ResetWithControl(block.BlockARM64Z, x)
 31195  			return true
 31196  		}
 31197  		// match: (EQ (CMPWconst [0] x) yes no)
 31198  		// result: (ZW x yes no)
 31199  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31200  			v_0 := b.Controls[0]
 31201  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31202  				break
 31203  			}
 31204  			x := v_0.Args[0]
 31205  			b.ResetWithControl(block.BlockARM64ZW, x)
 31206  			return true
 31207  		}
 31208  		// match: (EQ (CMPconst [0] z:(MADD a x y)) yes no)
 31209  		// cond: z.Uses==1
 31210  		// result: (EQ (CMN a (MUL <x.Type> x y)) yes no)
 31211  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31212  			v_0 := b.Controls[0]
 31213  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31214  				break
 31215  			}
 31216  			z := v_0.Args[0]
 31217  			if z.Op != ssaop.OpARM64MADD {
 31218  				break
 31219  			}
 31220  			y := z.Args[2]
 31221  			a := z.Args[0]
 31222  			x := z.Args[1]
 31223  			if !(z.Uses == 1) {
 31224  				break
 31225  			}
 31226  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 31227  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 31228  			v1.AddArg2(x, y)
 31229  			v0.AddArg2(a, v1)
 31230  			b.ResetWithControl(block.BlockARM64EQ, v0)
 31231  			return true
 31232  		}
 31233  		// match: (EQ (CMPWconst [0] z:(MADDW a x y)) yes no)
 31234  		// cond: z.Uses==1
 31235  		// result: (EQ (CMNW a (MULW <x.Type> x y)) yes no)
 31236  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31237  			v_0 := b.Controls[0]
 31238  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31239  				break
 31240  			}
 31241  			z := v_0.Args[0]
 31242  			if z.Op != ssaop.OpARM64MADDW {
 31243  				break
 31244  			}
 31245  			y := z.Args[2]
 31246  			a := z.Args[0]
 31247  			x := z.Args[1]
 31248  			if !(z.Uses == 1) {
 31249  				break
 31250  			}
 31251  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 31252  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 31253  			v1.AddArg2(x, y)
 31254  			v0.AddArg2(a, v1)
 31255  			b.ResetWithControl(block.BlockARM64EQ, v0)
 31256  			return true
 31257  		}
 31258  		// match: (EQ (CMPconst [0] z:(MSUB a x y)) yes no)
 31259  		// cond: z.Uses==1
 31260  		// result: (EQ (CMP a (MUL <x.Type> x y)) yes no)
 31261  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31262  			v_0 := b.Controls[0]
 31263  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31264  				break
 31265  			}
 31266  			z := v_0.Args[0]
 31267  			if z.Op != ssaop.OpARM64MSUB {
 31268  				break
 31269  			}
 31270  			y := z.Args[2]
 31271  			a := z.Args[0]
 31272  			x := z.Args[1]
 31273  			if !(z.Uses == 1) {
 31274  				break
 31275  			}
 31276  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 31277  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 31278  			v1.AddArg2(x, y)
 31279  			v0.AddArg2(a, v1)
 31280  			b.ResetWithControl(block.BlockARM64EQ, v0)
 31281  			return true
 31282  		}
 31283  		// match: (EQ (CMPWconst [0] z:(MSUBW a x y)) yes no)
 31284  		// cond: z.Uses==1
 31285  		// result: (EQ (CMPW a (MULW <x.Type> x y)) yes no)
 31286  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31287  			v_0 := b.Controls[0]
 31288  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31289  				break
 31290  			}
 31291  			z := v_0.Args[0]
 31292  			if z.Op != ssaop.OpARM64MSUBW {
 31293  				break
 31294  			}
 31295  			y := z.Args[2]
 31296  			a := z.Args[0]
 31297  			x := z.Args[1]
 31298  			if !(z.Uses == 1) {
 31299  				break
 31300  			}
 31301  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 31302  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 31303  			v1.AddArg2(x, y)
 31304  			v0.AddArg2(a, v1)
 31305  			b.ResetWithControl(block.BlockARM64EQ, v0)
 31306  			return true
 31307  		}
 31308  		// match: (EQ (TSTconst [c] x) yes no)
 31309  		// cond: ssa.OneBit(c)
 31310  		// result: (TBZ [int64(ssa.Ntz64(c))] x yes no)
 31311  		for b.Controls[0].Op == ssaop.OpARM64TSTconst {
 31312  			v_0 := b.Controls[0]
 31313  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 31314  			x := v_0.Args[0]
 31315  			if !(ssa.OneBit(c)) {
 31316  				break
 31317  			}
 31318  			b.ResetWithControl(block.BlockARM64TBZ, x)
 31319  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 31320  			return true
 31321  		}
 31322  		// match: (EQ (TSTWconst [c] x) yes no)
 31323  		// cond: ssa.OneBit(int64(uint32(c)))
 31324  		// result: (TBZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 31325  		for b.Controls[0].Op == ssaop.OpARM64TSTWconst {
 31326  			v_0 := b.Controls[0]
 31327  			c := ssa.AuxIntToInt32(v_0.AuxInt)
 31328  			x := v_0.Args[0]
 31329  			if !(ssa.OneBit(int64(uint32(c)))) {
 31330  				break
 31331  			}
 31332  			b.ResetWithControl(block.BlockARM64TBZ, x)
 31333  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 31334  			return true
 31335  		}
 31336  		// match: (EQ (FlagConstant [fc]) yes no)
 31337  		// cond: fc.Eq()
 31338  		// result: (First yes no)
 31339  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 31340  			v_0 := b.Controls[0]
 31341  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 31342  			if !(fc.Eq()) {
 31343  				break
 31344  			}
 31345  			b.Reset(block.BlockFirst)
 31346  			return true
 31347  		}
 31348  		// match: (EQ (FlagConstant [fc]) yes no)
 31349  		// cond: !fc.Eq()
 31350  		// result: (First no yes)
 31351  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 31352  			v_0 := b.Controls[0]
 31353  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 31354  			if !(!fc.Eq()) {
 31355  				break
 31356  			}
 31357  			b.Reset(block.BlockFirst)
 31358  			b.SwapSuccessors()
 31359  			return true
 31360  		}
 31361  		// match: (EQ (InvertFlags cmp) yes no)
 31362  		// result: (EQ cmp yes no)
 31363  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 31364  			v_0 := b.Controls[0]
 31365  			cmp := v_0.Args[0]
 31366  			b.ResetWithControl(block.BlockARM64EQ, cmp)
 31367  			return true
 31368  		}
 31369  	case block.BlockARM64FGE:
 31370  		// match: (FGE (InvertFlags cmp) yes no)
 31371  		// result: (FLE cmp yes no)
 31372  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 31373  			v_0 := b.Controls[0]
 31374  			cmp := v_0.Args[0]
 31375  			b.ResetWithControl(block.BlockARM64FLE, cmp)
 31376  			return true
 31377  		}
 31378  	case block.BlockARM64FGT:
 31379  		// match: (FGT (InvertFlags cmp) yes no)
 31380  		// result: (FLT cmp yes no)
 31381  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 31382  			v_0 := b.Controls[0]
 31383  			cmp := v_0.Args[0]
 31384  			b.ResetWithControl(block.BlockARM64FLT, cmp)
 31385  			return true
 31386  		}
 31387  	case block.BlockARM64FLE:
 31388  		// match: (FLE (InvertFlags cmp) yes no)
 31389  		// result: (FGE cmp yes no)
 31390  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 31391  			v_0 := b.Controls[0]
 31392  			cmp := v_0.Args[0]
 31393  			b.ResetWithControl(block.BlockARM64FGE, cmp)
 31394  			return true
 31395  		}
 31396  	case block.BlockARM64FLT:
 31397  		// match: (FLT (InvertFlags cmp) yes no)
 31398  		// result: (FGT cmp yes no)
 31399  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 31400  			v_0 := b.Controls[0]
 31401  			cmp := v_0.Args[0]
 31402  			b.ResetWithControl(block.BlockARM64FGT, cmp)
 31403  			return true
 31404  		}
 31405  	case block.BlockARM64GE:
 31406  		// match: (GE (CMPconst [0] z:(AND x y)) yes no)
 31407  		// cond: z.Uses == 1
 31408  		// result: (GE (TST x y) yes no)
 31409  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31410  			v_0 := b.Controls[0]
 31411  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31412  				break
 31413  			}
 31414  			z := v_0.Args[0]
 31415  			if z.Op != ssaop.OpARM64AND {
 31416  				break
 31417  			}
 31418  			_ = z.Args[1]
 31419  			z_0 := z.Args[0]
 31420  			z_1 := z.Args[1]
 31421  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31422  				x := z_0
 31423  				y := z_1
 31424  				if !(z.Uses == 1) {
 31425  					continue
 31426  				}
 31427  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 31428  				v0.AddArg2(x, y)
 31429  				b.ResetWithControl(block.BlockARM64GE, v0)
 31430  				return true
 31431  			}
 31432  			break
 31433  		}
 31434  		// match: (GE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 31435  		// cond: x.Uses == 1
 31436  		// result: (GE (TSTconst [c] y) yes no)
 31437  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31438  			v_0 := b.Controls[0]
 31439  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31440  				break
 31441  			}
 31442  			x := v_0.Args[0]
 31443  			if x.Op != ssaop.OpARM64ANDconst {
 31444  				break
 31445  			}
 31446  			c := ssa.AuxIntToInt64(x.AuxInt)
 31447  			y := x.Args[0]
 31448  			if !(x.Uses == 1) {
 31449  				break
 31450  			}
 31451  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 31452  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 31453  			v0.AddArg(y)
 31454  			b.ResetWithControl(block.BlockARM64GE, v0)
 31455  			return true
 31456  		}
 31457  		// match: (GE (CMPWconst [0] z:(AND x y)) yes no)
 31458  		// cond: z.Uses == 1
 31459  		// result: (GE (TSTW x y) yes no)
 31460  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31461  			v_0 := b.Controls[0]
 31462  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31463  				break
 31464  			}
 31465  			z := v_0.Args[0]
 31466  			if z.Op != ssaop.OpARM64AND {
 31467  				break
 31468  			}
 31469  			_ = z.Args[1]
 31470  			z_0 := z.Args[0]
 31471  			z_1 := z.Args[1]
 31472  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31473  				x := z_0
 31474  				y := z_1
 31475  				if !(z.Uses == 1) {
 31476  					continue
 31477  				}
 31478  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 31479  				v0.AddArg2(x, y)
 31480  				b.ResetWithControl(block.BlockARM64GE, v0)
 31481  				return true
 31482  			}
 31483  			break
 31484  		}
 31485  		// match: (GE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 31486  		// cond: x.Uses == 1
 31487  		// result: (GE (TSTWconst [int32(c)] y) yes no)
 31488  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31489  			v_0 := b.Controls[0]
 31490  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31491  				break
 31492  			}
 31493  			x := v_0.Args[0]
 31494  			if x.Op != ssaop.OpARM64ANDconst {
 31495  				break
 31496  			}
 31497  			c := ssa.AuxIntToInt64(x.AuxInt)
 31498  			y := x.Args[0]
 31499  			if !(x.Uses == 1) {
 31500  				break
 31501  			}
 31502  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 31503  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 31504  			v0.AddArg(y)
 31505  			b.ResetWithControl(block.BlockARM64GE, v0)
 31506  			return true
 31507  		}
 31508  		// match: (GE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 31509  		// cond: x.Uses == 1
 31510  		// result: (GEnoov (CMNconst [c] y) yes no)
 31511  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31512  			v_0 := b.Controls[0]
 31513  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31514  				break
 31515  			}
 31516  			x := v_0.Args[0]
 31517  			if x.Op != ssaop.OpARM64ADDconst {
 31518  				break
 31519  			}
 31520  			c := ssa.AuxIntToInt64(x.AuxInt)
 31521  			y := x.Args[0]
 31522  			if !(x.Uses == 1) {
 31523  				break
 31524  			}
 31525  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 31526  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 31527  			v0.AddArg(y)
 31528  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 31529  			return true
 31530  		}
 31531  		// match: (GE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 31532  		// cond: x.Uses == 1
 31533  		// result: (GEnoov (CMNWconst [int32(c)] y) yes no)
 31534  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31535  			v_0 := b.Controls[0]
 31536  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31537  				break
 31538  			}
 31539  			x := v_0.Args[0]
 31540  			if x.Op != ssaop.OpARM64ADDconst {
 31541  				break
 31542  			}
 31543  			c := ssa.AuxIntToInt64(x.AuxInt)
 31544  			y := x.Args[0]
 31545  			if !(x.Uses == 1) {
 31546  				break
 31547  			}
 31548  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 31549  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 31550  			v0.AddArg(y)
 31551  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 31552  			return true
 31553  		}
 31554  		// match: (GE (CMPconst [0] z:(ADD x y)) yes no)
 31555  		// cond: z.Uses == 1
 31556  		// result: (GEnoov (CMN x y) yes no)
 31557  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31558  			v_0 := b.Controls[0]
 31559  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31560  				break
 31561  			}
 31562  			z := v_0.Args[0]
 31563  			if z.Op != ssaop.OpARM64ADD {
 31564  				break
 31565  			}
 31566  			_ = z.Args[1]
 31567  			z_0 := z.Args[0]
 31568  			z_1 := z.Args[1]
 31569  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31570  				x := z_0
 31571  				y := z_1
 31572  				if !(z.Uses == 1) {
 31573  					continue
 31574  				}
 31575  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 31576  				v0.AddArg2(x, y)
 31577  				b.ResetWithControl(block.BlockARM64GEnoov, v0)
 31578  				return true
 31579  			}
 31580  			break
 31581  		}
 31582  		// match: (GE (CMPWconst [0] z:(ADD x y)) yes no)
 31583  		// cond: z.Uses == 1
 31584  		// result: (GEnoov (CMNW x y) yes no)
 31585  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31586  			v_0 := b.Controls[0]
 31587  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31588  				break
 31589  			}
 31590  			z := v_0.Args[0]
 31591  			if z.Op != ssaop.OpARM64ADD {
 31592  				break
 31593  			}
 31594  			_ = z.Args[1]
 31595  			z_0 := z.Args[0]
 31596  			z_1 := z.Args[1]
 31597  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31598  				x := z_0
 31599  				y := z_1
 31600  				if !(z.Uses == 1) {
 31601  					continue
 31602  				}
 31603  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 31604  				v0.AddArg2(x, y)
 31605  				b.ResetWithControl(block.BlockARM64GEnoov, v0)
 31606  				return true
 31607  			}
 31608  			break
 31609  		}
 31610  		// match: (GE (CMPconst [0] z:(MADD a x y)) yes no)
 31611  		// cond: z.Uses==1
 31612  		// result: (GEnoov (CMN a (MUL <x.Type> x y)) yes no)
 31613  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31614  			v_0 := b.Controls[0]
 31615  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31616  				break
 31617  			}
 31618  			z := v_0.Args[0]
 31619  			if z.Op != ssaop.OpARM64MADD {
 31620  				break
 31621  			}
 31622  			y := z.Args[2]
 31623  			a := z.Args[0]
 31624  			x := z.Args[1]
 31625  			if !(z.Uses == 1) {
 31626  				break
 31627  			}
 31628  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 31629  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 31630  			v1.AddArg2(x, y)
 31631  			v0.AddArg2(a, v1)
 31632  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 31633  			return true
 31634  		}
 31635  		// match: (GE (CMPWconst [0] z:(MADDW a x y)) yes no)
 31636  		// cond: z.Uses==1
 31637  		// result: (GEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 31638  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31639  			v_0 := b.Controls[0]
 31640  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31641  				break
 31642  			}
 31643  			z := v_0.Args[0]
 31644  			if z.Op != ssaop.OpARM64MADDW {
 31645  				break
 31646  			}
 31647  			y := z.Args[2]
 31648  			a := z.Args[0]
 31649  			x := z.Args[1]
 31650  			if !(z.Uses == 1) {
 31651  				break
 31652  			}
 31653  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 31654  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 31655  			v1.AddArg2(x, y)
 31656  			v0.AddArg2(a, v1)
 31657  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 31658  			return true
 31659  		}
 31660  		// match: (GE (CMPWconst [0] x) yes no)
 31661  		// result: (TBZ [31] x yes no)
 31662  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31663  			v_0 := b.Controls[0]
 31664  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31665  				break
 31666  			}
 31667  			x := v_0.Args[0]
 31668  			b.ResetWithControl(block.BlockARM64TBZ, x)
 31669  			b.AuxInt = ssa.Int64ToAuxInt(31)
 31670  			return true
 31671  		}
 31672  		// match: (GE (CMPconst [0] x) yes no)
 31673  		// result: (TBZ [63] x yes no)
 31674  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31675  			v_0 := b.Controls[0]
 31676  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31677  				break
 31678  			}
 31679  			x := v_0.Args[0]
 31680  			b.ResetWithControl(block.BlockARM64TBZ, x)
 31681  			b.AuxInt = ssa.Int64ToAuxInt(63)
 31682  			return true
 31683  		}
 31684  		// match: (GE (CMPWconst [128] x) yes no)
 31685  		// cond: ssa.ZeroUpper56Bits(x)
 31686  		// result: (TBNZ [7] x yes no)
 31687  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31688  			v_0 := b.Controls[0]
 31689  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 31690  				break
 31691  			}
 31692  			x := v_0.Args[0]
 31693  			if !(ssa.ZeroUpper56Bits(x)) {
 31694  				break
 31695  			}
 31696  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 31697  			b.AuxInt = ssa.Int64ToAuxInt(7)
 31698  			return true
 31699  		}
 31700  		// match: (GE (CMPconst [128] x) yes no)
 31701  		// cond: ssa.ZeroUpper56Bits(x)
 31702  		// result: (TBNZ [7] x yes no)
 31703  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31704  			v_0 := b.Controls[0]
 31705  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 31706  				break
 31707  			}
 31708  			x := v_0.Args[0]
 31709  			if !(ssa.ZeroUpper56Bits(x)) {
 31710  				break
 31711  			}
 31712  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 31713  			b.AuxInt = ssa.Int64ToAuxInt(7)
 31714  			return true
 31715  		}
 31716  		// match: (GE (FlagConstant [fc]) yes no)
 31717  		// cond: fc.Ge()
 31718  		// result: (First yes no)
 31719  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 31720  			v_0 := b.Controls[0]
 31721  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 31722  			if !(fc.Ge()) {
 31723  				break
 31724  			}
 31725  			b.Reset(block.BlockFirst)
 31726  			return true
 31727  		}
 31728  		// match: (GE (FlagConstant [fc]) yes no)
 31729  		// cond: !fc.Ge()
 31730  		// result: (First no yes)
 31731  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 31732  			v_0 := b.Controls[0]
 31733  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 31734  			if !(!fc.Ge()) {
 31735  				break
 31736  			}
 31737  			b.Reset(block.BlockFirst)
 31738  			b.SwapSuccessors()
 31739  			return true
 31740  		}
 31741  		// match: (GE (InvertFlags cmp) yes no)
 31742  		// result: (LE cmp yes no)
 31743  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 31744  			v_0 := b.Controls[0]
 31745  			cmp := v_0.Args[0]
 31746  			b.ResetWithControl(block.BlockARM64LE, cmp)
 31747  			return true
 31748  		}
 31749  	case block.BlockARM64GEnoov:
 31750  		// match: (GEnoov (FlagConstant [fc]) yes no)
 31751  		// cond: fc.GeNoov()
 31752  		// result: (First yes no)
 31753  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 31754  			v_0 := b.Controls[0]
 31755  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 31756  			if !(fc.GeNoov()) {
 31757  				break
 31758  			}
 31759  			b.Reset(block.BlockFirst)
 31760  			return true
 31761  		}
 31762  		// match: (GEnoov (FlagConstant [fc]) yes no)
 31763  		// cond: !fc.GeNoov()
 31764  		// result: (First no yes)
 31765  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 31766  			v_0 := b.Controls[0]
 31767  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 31768  			if !(!fc.GeNoov()) {
 31769  				break
 31770  			}
 31771  			b.Reset(block.BlockFirst)
 31772  			b.SwapSuccessors()
 31773  			return true
 31774  		}
 31775  	case block.BlockARM64GT:
 31776  		// match: (GT (CMPconst [0] z:(AND x y)) yes no)
 31777  		// cond: z.Uses == 1
 31778  		// result: (GT (TST x y) yes no)
 31779  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31780  			v_0 := b.Controls[0]
 31781  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31782  				break
 31783  			}
 31784  			z := v_0.Args[0]
 31785  			if z.Op != ssaop.OpARM64AND {
 31786  				break
 31787  			}
 31788  			_ = z.Args[1]
 31789  			z_0 := z.Args[0]
 31790  			z_1 := z.Args[1]
 31791  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31792  				x := z_0
 31793  				y := z_1
 31794  				if !(z.Uses == 1) {
 31795  					continue
 31796  				}
 31797  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 31798  				v0.AddArg2(x, y)
 31799  				b.ResetWithControl(block.BlockARM64GT, v0)
 31800  				return true
 31801  			}
 31802  			break
 31803  		}
 31804  		// match: (GT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 31805  		// cond: x.Uses == 1
 31806  		// result: (GT (TSTconst [c] y) yes no)
 31807  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31808  			v_0 := b.Controls[0]
 31809  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31810  				break
 31811  			}
 31812  			x := v_0.Args[0]
 31813  			if x.Op != ssaop.OpARM64ANDconst {
 31814  				break
 31815  			}
 31816  			c := ssa.AuxIntToInt64(x.AuxInt)
 31817  			y := x.Args[0]
 31818  			if !(x.Uses == 1) {
 31819  				break
 31820  			}
 31821  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 31822  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 31823  			v0.AddArg(y)
 31824  			b.ResetWithControl(block.BlockARM64GT, v0)
 31825  			return true
 31826  		}
 31827  		// match: (GT (CMPWconst [0] z:(AND x y)) yes no)
 31828  		// cond: z.Uses == 1
 31829  		// result: (GT (TSTW x y) yes no)
 31830  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31831  			v_0 := b.Controls[0]
 31832  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31833  				break
 31834  			}
 31835  			z := v_0.Args[0]
 31836  			if z.Op != ssaop.OpARM64AND {
 31837  				break
 31838  			}
 31839  			_ = z.Args[1]
 31840  			z_0 := z.Args[0]
 31841  			z_1 := z.Args[1]
 31842  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31843  				x := z_0
 31844  				y := z_1
 31845  				if !(z.Uses == 1) {
 31846  					continue
 31847  				}
 31848  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 31849  				v0.AddArg2(x, y)
 31850  				b.ResetWithControl(block.BlockARM64GT, v0)
 31851  				return true
 31852  			}
 31853  			break
 31854  		}
 31855  		// match: (GT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 31856  		// cond: x.Uses == 1
 31857  		// result: (GT (TSTWconst [int32(c)] y) yes no)
 31858  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31859  			v_0 := b.Controls[0]
 31860  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31861  				break
 31862  			}
 31863  			x := v_0.Args[0]
 31864  			if x.Op != ssaop.OpARM64ANDconst {
 31865  				break
 31866  			}
 31867  			c := ssa.AuxIntToInt64(x.AuxInt)
 31868  			y := x.Args[0]
 31869  			if !(x.Uses == 1) {
 31870  				break
 31871  			}
 31872  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 31873  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 31874  			v0.AddArg(y)
 31875  			b.ResetWithControl(block.BlockARM64GT, v0)
 31876  			return true
 31877  		}
 31878  		// match: (GT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 31879  		// cond: x.Uses == 1
 31880  		// result: (GTnoov (CMNconst [c] y) yes no)
 31881  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31882  			v_0 := b.Controls[0]
 31883  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31884  				break
 31885  			}
 31886  			x := v_0.Args[0]
 31887  			if x.Op != ssaop.OpARM64ADDconst {
 31888  				break
 31889  			}
 31890  			c := ssa.AuxIntToInt64(x.AuxInt)
 31891  			y := x.Args[0]
 31892  			if !(x.Uses == 1) {
 31893  				break
 31894  			}
 31895  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 31896  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 31897  			v0.AddArg(y)
 31898  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 31899  			return true
 31900  		}
 31901  		// match: (GT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 31902  		// cond: x.Uses == 1
 31903  		// result: (GTnoov (CMNWconst [int32(c)] y) yes no)
 31904  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31905  			v_0 := b.Controls[0]
 31906  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31907  				break
 31908  			}
 31909  			x := v_0.Args[0]
 31910  			if x.Op != ssaop.OpARM64ADDconst {
 31911  				break
 31912  			}
 31913  			c := ssa.AuxIntToInt64(x.AuxInt)
 31914  			y := x.Args[0]
 31915  			if !(x.Uses == 1) {
 31916  				break
 31917  			}
 31918  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 31919  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 31920  			v0.AddArg(y)
 31921  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 31922  			return true
 31923  		}
 31924  		// match: (GT (CMPconst [0] z:(ADD x y)) yes no)
 31925  		// cond: z.Uses == 1
 31926  		// result: (GTnoov (CMN x y) yes no)
 31927  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31928  			v_0 := b.Controls[0]
 31929  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31930  				break
 31931  			}
 31932  			z := v_0.Args[0]
 31933  			if z.Op != ssaop.OpARM64ADD {
 31934  				break
 31935  			}
 31936  			_ = z.Args[1]
 31937  			z_0 := z.Args[0]
 31938  			z_1 := z.Args[1]
 31939  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31940  				x := z_0
 31941  				y := z_1
 31942  				if !(z.Uses == 1) {
 31943  					continue
 31944  				}
 31945  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 31946  				v0.AddArg2(x, y)
 31947  				b.ResetWithControl(block.BlockARM64GTnoov, v0)
 31948  				return true
 31949  			}
 31950  			break
 31951  		}
 31952  		// match: (GT (CMPWconst [0] z:(ADD x y)) yes no)
 31953  		// cond: z.Uses == 1
 31954  		// result: (GTnoov (CMNW x y) yes no)
 31955  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 31956  			v_0 := b.Controls[0]
 31957  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 31958  				break
 31959  			}
 31960  			z := v_0.Args[0]
 31961  			if z.Op != ssaop.OpARM64ADD {
 31962  				break
 31963  			}
 31964  			_ = z.Args[1]
 31965  			z_0 := z.Args[0]
 31966  			z_1 := z.Args[1]
 31967  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 31968  				x := z_0
 31969  				y := z_1
 31970  				if !(z.Uses == 1) {
 31971  					continue
 31972  				}
 31973  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 31974  				v0.AddArg2(x, y)
 31975  				b.ResetWithControl(block.BlockARM64GTnoov, v0)
 31976  				return true
 31977  			}
 31978  			break
 31979  		}
 31980  		// match: (GT (CMPconst [0] z:(MADD a x y)) yes no)
 31981  		// cond: z.Uses==1
 31982  		// result: (GTnoov (CMN a (MUL <x.Type> x y)) yes no)
 31983  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 31984  			v_0 := b.Controls[0]
 31985  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 31986  				break
 31987  			}
 31988  			z := v_0.Args[0]
 31989  			if z.Op != ssaop.OpARM64MADD {
 31990  				break
 31991  			}
 31992  			y := z.Args[2]
 31993  			a := z.Args[0]
 31994  			x := z.Args[1]
 31995  			if !(z.Uses == 1) {
 31996  				break
 31997  			}
 31998  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 31999  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 32000  			v1.AddArg2(x, y)
 32001  			v0.AddArg2(a, v1)
 32002  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 32003  			return true
 32004  		}
 32005  		// match: (GT (CMPWconst [0] z:(MADDW a x y)) yes no)
 32006  		// cond: z.Uses==1
 32007  		// result: (GTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 32008  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32009  			v_0 := b.Controls[0]
 32010  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32011  				break
 32012  			}
 32013  			z := v_0.Args[0]
 32014  			if z.Op != ssaop.OpARM64MADDW {
 32015  				break
 32016  			}
 32017  			y := z.Args[2]
 32018  			a := z.Args[0]
 32019  			x := z.Args[1]
 32020  			if !(z.Uses == 1) {
 32021  				break
 32022  			}
 32023  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 32024  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 32025  			v1.AddArg2(x, y)
 32026  			v0.AddArg2(a, v1)
 32027  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 32028  			return true
 32029  		}
 32030  		// match: (GT (FlagConstant [fc]) yes no)
 32031  		// cond: fc.Gt()
 32032  		// result: (First yes no)
 32033  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32034  			v_0 := b.Controls[0]
 32035  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32036  			if !(fc.Gt()) {
 32037  				break
 32038  			}
 32039  			b.Reset(block.BlockFirst)
 32040  			return true
 32041  		}
 32042  		// match: (GT (FlagConstant [fc]) yes no)
 32043  		// cond: !fc.Gt()
 32044  		// result: (First no yes)
 32045  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32046  			v_0 := b.Controls[0]
 32047  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32048  			if !(!fc.Gt()) {
 32049  				break
 32050  			}
 32051  			b.Reset(block.BlockFirst)
 32052  			b.SwapSuccessors()
 32053  			return true
 32054  		}
 32055  		// match: (GT (InvertFlags cmp) yes no)
 32056  		// result: (LT cmp yes no)
 32057  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 32058  			v_0 := b.Controls[0]
 32059  			cmp := v_0.Args[0]
 32060  			b.ResetWithControl(block.BlockARM64LT, cmp)
 32061  			return true
 32062  		}
 32063  	case block.BlockARM64GTnoov:
 32064  		// match: (GTnoov (FlagConstant [fc]) yes no)
 32065  		// cond: fc.GtNoov()
 32066  		// result: (First yes no)
 32067  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32068  			v_0 := b.Controls[0]
 32069  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32070  			if !(fc.GtNoov()) {
 32071  				break
 32072  			}
 32073  			b.Reset(block.BlockFirst)
 32074  			return true
 32075  		}
 32076  		// match: (GTnoov (FlagConstant [fc]) yes no)
 32077  		// cond: !fc.GtNoov()
 32078  		// result: (First no yes)
 32079  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32080  			v_0 := b.Controls[0]
 32081  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32082  			if !(!fc.GtNoov()) {
 32083  				break
 32084  			}
 32085  			b.Reset(block.BlockFirst)
 32086  			b.SwapSuccessors()
 32087  			return true
 32088  		}
 32089  	case block.BlockIf:
 32090  		// match: (If (Equal cc) yes no)
 32091  		// result: (EQ cc yes no)
 32092  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 32093  			v_0 := b.Controls[0]
 32094  			cc := v_0.Args[0]
 32095  			b.ResetWithControl(block.BlockARM64EQ, cc)
 32096  			return true
 32097  		}
 32098  		// match: (If (NotEqual cc) yes no)
 32099  		// result: (NE cc yes no)
 32100  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 32101  			v_0 := b.Controls[0]
 32102  			cc := v_0.Args[0]
 32103  			b.ResetWithControl(block.BlockARM64NE, cc)
 32104  			return true
 32105  		}
 32106  		// match: (If (LessThan cc) yes no)
 32107  		// result: (LT cc yes no)
 32108  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 32109  			v_0 := b.Controls[0]
 32110  			cc := v_0.Args[0]
 32111  			b.ResetWithControl(block.BlockARM64LT, cc)
 32112  			return true
 32113  		}
 32114  		// match: (If (LessThanU cc) yes no)
 32115  		// result: (ULT cc yes no)
 32116  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 32117  			v_0 := b.Controls[0]
 32118  			cc := v_0.Args[0]
 32119  			b.ResetWithControl(block.BlockARM64ULT, cc)
 32120  			return true
 32121  		}
 32122  		// match: (If (LessEqual cc) yes no)
 32123  		// result: (LE cc yes no)
 32124  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 32125  			v_0 := b.Controls[0]
 32126  			cc := v_0.Args[0]
 32127  			b.ResetWithControl(block.BlockARM64LE, cc)
 32128  			return true
 32129  		}
 32130  		// match: (If (LessEqualU cc) yes no)
 32131  		// result: (ULE cc yes no)
 32132  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 32133  			v_0 := b.Controls[0]
 32134  			cc := v_0.Args[0]
 32135  			b.ResetWithControl(block.BlockARM64ULE, cc)
 32136  			return true
 32137  		}
 32138  		// match: (If (GreaterThan cc) yes no)
 32139  		// result: (GT cc yes no)
 32140  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 32141  			v_0 := b.Controls[0]
 32142  			cc := v_0.Args[0]
 32143  			b.ResetWithControl(block.BlockARM64GT, cc)
 32144  			return true
 32145  		}
 32146  		// match: (If (GreaterThanU cc) yes no)
 32147  		// result: (UGT cc yes no)
 32148  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 32149  			v_0 := b.Controls[0]
 32150  			cc := v_0.Args[0]
 32151  			b.ResetWithControl(block.BlockARM64UGT, cc)
 32152  			return true
 32153  		}
 32154  		// match: (If (GreaterEqual cc) yes no)
 32155  		// result: (GE cc yes no)
 32156  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 32157  			v_0 := b.Controls[0]
 32158  			cc := v_0.Args[0]
 32159  			b.ResetWithControl(block.BlockARM64GE, cc)
 32160  			return true
 32161  		}
 32162  		// match: (If (GreaterEqualU cc) yes no)
 32163  		// result: (UGE cc yes no)
 32164  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 32165  			v_0 := b.Controls[0]
 32166  			cc := v_0.Args[0]
 32167  			b.ResetWithControl(block.BlockARM64UGE, cc)
 32168  			return true
 32169  		}
 32170  		// match: (If (LessThanF cc) yes no)
 32171  		// result: (FLT cc yes no)
 32172  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 32173  			v_0 := b.Controls[0]
 32174  			cc := v_0.Args[0]
 32175  			b.ResetWithControl(block.BlockARM64FLT, cc)
 32176  			return true
 32177  		}
 32178  		// match: (If (LessEqualF cc) yes no)
 32179  		// result: (FLE cc yes no)
 32180  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 32181  			v_0 := b.Controls[0]
 32182  			cc := v_0.Args[0]
 32183  			b.ResetWithControl(block.BlockARM64FLE, cc)
 32184  			return true
 32185  		}
 32186  		// match: (If (GreaterThanF cc) yes no)
 32187  		// result: (FGT cc yes no)
 32188  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 32189  			v_0 := b.Controls[0]
 32190  			cc := v_0.Args[0]
 32191  			b.ResetWithControl(block.BlockARM64FGT, cc)
 32192  			return true
 32193  		}
 32194  		// match: (If (GreaterEqualF cc) yes no)
 32195  		// result: (FGE cc yes no)
 32196  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 32197  			v_0 := b.Controls[0]
 32198  			cc := v_0.Args[0]
 32199  			b.ResetWithControl(block.BlockARM64FGE, cc)
 32200  			return true
 32201  		}
 32202  		// match: (If cond yes no)
 32203  		// result: (TBNZ [0] cond yes no)
 32204  		for {
 32205  			cond := b.Controls[0]
 32206  			b.ResetWithControl(block.BlockARM64TBNZ, cond)
 32207  			b.AuxInt = ssa.Int64ToAuxInt(0)
 32208  			return true
 32209  		}
 32210  	case block.BlockJumpTable:
 32211  		// match: (JumpTable idx)
 32212  		// result: (JUMPTABLE {ssa.MakeJumpTableSym(b)} idx (MOVDaddr <typ.Uintptr> {ssa.MakeJumpTableSym(b)} (SB)))
 32213  		for {
 32214  			idx := b.Controls[0]
 32215  			v0 := b.NewValue0(b.Pos, ssaop.OpARM64MOVDaddr, typ.Uintptr)
 32216  			v0.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
 32217  			v1 := b.NewValue0(b.Pos, ssaop.OpSB, typ.Uintptr)
 32218  			v0.AddArg(v1)
 32219  			b.ResetWithControl2(block.BlockARM64JUMPTABLE, idx, v0)
 32220  			b.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
 32221  			return true
 32222  		}
 32223  	case block.BlockARM64LE:
 32224  		// match: (LE (CMPconst [0] z:(AND x y)) yes no)
 32225  		// cond: z.Uses == 1
 32226  		// result: (LE (TST x y) yes no)
 32227  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32228  			v_0 := b.Controls[0]
 32229  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32230  				break
 32231  			}
 32232  			z := v_0.Args[0]
 32233  			if z.Op != ssaop.OpARM64AND {
 32234  				break
 32235  			}
 32236  			_ = z.Args[1]
 32237  			z_0 := z.Args[0]
 32238  			z_1 := z.Args[1]
 32239  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32240  				x := z_0
 32241  				y := z_1
 32242  				if !(z.Uses == 1) {
 32243  					continue
 32244  				}
 32245  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 32246  				v0.AddArg2(x, y)
 32247  				b.ResetWithControl(block.BlockARM64LE, v0)
 32248  				return true
 32249  			}
 32250  			break
 32251  		}
 32252  		// match: (LE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 32253  		// cond: x.Uses == 1
 32254  		// result: (LE (TSTconst [c] y) yes no)
 32255  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32256  			v_0 := b.Controls[0]
 32257  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32258  				break
 32259  			}
 32260  			x := v_0.Args[0]
 32261  			if x.Op != ssaop.OpARM64ANDconst {
 32262  				break
 32263  			}
 32264  			c := ssa.AuxIntToInt64(x.AuxInt)
 32265  			y := x.Args[0]
 32266  			if !(x.Uses == 1) {
 32267  				break
 32268  			}
 32269  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 32270  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 32271  			v0.AddArg(y)
 32272  			b.ResetWithControl(block.BlockARM64LE, v0)
 32273  			return true
 32274  		}
 32275  		// match: (LE (CMPWconst [0] z:(AND x y)) yes no)
 32276  		// cond: z.Uses == 1
 32277  		// result: (LE (TSTW x y) yes no)
 32278  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32279  			v_0 := b.Controls[0]
 32280  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32281  				break
 32282  			}
 32283  			z := v_0.Args[0]
 32284  			if z.Op != ssaop.OpARM64AND {
 32285  				break
 32286  			}
 32287  			_ = z.Args[1]
 32288  			z_0 := z.Args[0]
 32289  			z_1 := z.Args[1]
 32290  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32291  				x := z_0
 32292  				y := z_1
 32293  				if !(z.Uses == 1) {
 32294  					continue
 32295  				}
 32296  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 32297  				v0.AddArg2(x, y)
 32298  				b.ResetWithControl(block.BlockARM64LE, v0)
 32299  				return true
 32300  			}
 32301  			break
 32302  		}
 32303  		// match: (LE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 32304  		// cond: x.Uses == 1
 32305  		// result: (LE (TSTWconst [int32(c)] y) yes no)
 32306  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32307  			v_0 := b.Controls[0]
 32308  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32309  				break
 32310  			}
 32311  			x := v_0.Args[0]
 32312  			if x.Op != ssaop.OpARM64ANDconst {
 32313  				break
 32314  			}
 32315  			c := ssa.AuxIntToInt64(x.AuxInt)
 32316  			y := x.Args[0]
 32317  			if !(x.Uses == 1) {
 32318  				break
 32319  			}
 32320  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 32321  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 32322  			v0.AddArg(y)
 32323  			b.ResetWithControl(block.BlockARM64LE, v0)
 32324  			return true
 32325  		}
 32326  		// match: (LE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 32327  		// cond: x.Uses == 1
 32328  		// result: (LEnoov (CMNconst [c] y) yes no)
 32329  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32330  			v_0 := b.Controls[0]
 32331  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32332  				break
 32333  			}
 32334  			x := v_0.Args[0]
 32335  			if x.Op != ssaop.OpARM64ADDconst {
 32336  				break
 32337  			}
 32338  			c := ssa.AuxIntToInt64(x.AuxInt)
 32339  			y := x.Args[0]
 32340  			if !(x.Uses == 1) {
 32341  				break
 32342  			}
 32343  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 32344  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 32345  			v0.AddArg(y)
 32346  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 32347  			return true
 32348  		}
 32349  		// match: (LE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 32350  		// cond: x.Uses == 1
 32351  		// result: (LEnoov (CMNWconst [int32(c)] y) yes no)
 32352  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32353  			v_0 := b.Controls[0]
 32354  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32355  				break
 32356  			}
 32357  			x := v_0.Args[0]
 32358  			if x.Op != ssaop.OpARM64ADDconst {
 32359  				break
 32360  			}
 32361  			c := ssa.AuxIntToInt64(x.AuxInt)
 32362  			y := x.Args[0]
 32363  			if !(x.Uses == 1) {
 32364  				break
 32365  			}
 32366  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 32367  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 32368  			v0.AddArg(y)
 32369  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 32370  			return true
 32371  		}
 32372  		// match: (LE (CMPconst [0] z:(ADD x y)) yes no)
 32373  		// cond: z.Uses == 1
 32374  		// result: (LEnoov (CMN x y) yes no)
 32375  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32376  			v_0 := b.Controls[0]
 32377  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32378  				break
 32379  			}
 32380  			z := v_0.Args[0]
 32381  			if z.Op != ssaop.OpARM64ADD {
 32382  				break
 32383  			}
 32384  			_ = z.Args[1]
 32385  			z_0 := z.Args[0]
 32386  			z_1 := z.Args[1]
 32387  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32388  				x := z_0
 32389  				y := z_1
 32390  				if !(z.Uses == 1) {
 32391  					continue
 32392  				}
 32393  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 32394  				v0.AddArg2(x, y)
 32395  				b.ResetWithControl(block.BlockARM64LEnoov, v0)
 32396  				return true
 32397  			}
 32398  			break
 32399  		}
 32400  		// match: (LE (CMPWconst [0] z:(ADD x y)) yes no)
 32401  		// cond: z.Uses == 1
 32402  		// result: (LEnoov (CMNW x y) yes no)
 32403  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32404  			v_0 := b.Controls[0]
 32405  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32406  				break
 32407  			}
 32408  			z := v_0.Args[0]
 32409  			if z.Op != ssaop.OpARM64ADD {
 32410  				break
 32411  			}
 32412  			_ = z.Args[1]
 32413  			z_0 := z.Args[0]
 32414  			z_1 := z.Args[1]
 32415  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32416  				x := z_0
 32417  				y := z_1
 32418  				if !(z.Uses == 1) {
 32419  					continue
 32420  				}
 32421  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 32422  				v0.AddArg2(x, y)
 32423  				b.ResetWithControl(block.BlockARM64LEnoov, v0)
 32424  				return true
 32425  			}
 32426  			break
 32427  		}
 32428  		// match: (LE (CMPconst [0] z:(MADD a x y)) yes no)
 32429  		// cond: z.Uses==1
 32430  		// result: (LEnoov (CMN a (MUL <x.Type> x y)) yes no)
 32431  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32432  			v_0 := b.Controls[0]
 32433  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32434  				break
 32435  			}
 32436  			z := v_0.Args[0]
 32437  			if z.Op != ssaop.OpARM64MADD {
 32438  				break
 32439  			}
 32440  			y := z.Args[2]
 32441  			a := z.Args[0]
 32442  			x := z.Args[1]
 32443  			if !(z.Uses == 1) {
 32444  				break
 32445  			}
 32446  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 32447  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 32448  			v1.AddArg2(x, y)
 32449  			v0.AddArg2(a, v1)
 32450  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 32451  			return true
 32452  		}
 32453  		// match: (LE (CMPWconst [0] z:(MADDW a x y)) yes no)
 32454  		// cond: z.Uses==1
 32455  		// result: (LEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 32456  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32457  			v_0 := b.Controls[0]
 32458  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32459  				break
 32460  			}
 32461  			z := v_0.Args[0]
 32462  			if z.Op != ssaop.OpARM64MADDW {
 32463  				break
 32464  			}
 32465  			y := z.Args[2]
 32466  			a := z.Args[0]
 32467  			x := z.Args[1]
 32468  			if !(z.Uses == 1) {
 32469  				break
 32470  			}
 32471  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 32472  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 32473  			v1.AddArg2(x, y)
 32474  			v0.AddArg2(a, v1)
 32475  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 32476  			return true
 32477  		}
 32478  		// match: (LE (FlagConstant [fc]) yes no)
 32479  		// cond: fc.Le()
 32480  		// result: (First yes no)
 32481  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32482  			v_0 := b.Controls[0]
 32483  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32484  			if !(fc.Le()) {
 32485  				break
 32486  			}
 32487  			b.Reset(block.BlockFirst)
 32488  			return true
 32489  		}
 32490  		// match: (LE (FlagConstant [fc]) yes no)
 32491  		// cond: !fc.Le()
 32492  		// result: (First no yes)
 32493  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32494  			v_0 := b.Controls[0]
 32495  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32496  			if !(!fc.Le()) {
 32497  				break
 32498  			}
 32499  			b.Reset(block.BlockFirst)
 32500  			b.SwapSuccessors()
 32501  			return true
 32502  		}
 32503  		// match: (LE (InvertFlags cmp) yes no)
 32504  		// result: (GE cmp yes no)
 32505  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 32506  			v_0 := b.Controls[0]
 32507  			cmp := v_0.Args[0]
 32508  			b.ResetWithControl(block.BlockARM64GE, cmp)
 32509  			return true
 32510  		}
 32511  	case block.BlockARM64LEnoov:
 32512  		// match: (LEnoov (FlagConstant [fc]) yes no)
 32513  		// cond: fc.LeNoov()
 32514  		// result: (First yes no)
 32515  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32516  			v_0 := b.Controls[0]
 32517  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32518  			if !(fc.LeNoov()) {
 32519  				break
 32520  			}
 32521  			b.Reset(block.BlockFirst)
 32522  			return true
 32523  		}
 32524  		// match: (LEnoov (FlagConstant [fc]) yes no)
 32525  		// cond: !fc.LeNoov()
 32526  		// result: (First no yes)
 32527  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32528  			v_0 := b.Controls[0]
 32529  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32530  			if !(!fc.LeNoov()) {
 32531  				break
 32532  			}
 32533  			b.Reset(block.BlockFirst)
 32534  			b.SwapSuccessors()
 32535  			return true
 32536  		}
 32537  	case block.BlockARM64LT:
 32538  		// match: (LT (CMPconst [0] z:(AND x y)) yes no)
 32539  		// cond: z.Uses == 1
 32540  		// result: (LT (TST x y) yes no)
 32541  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32542  			v_0 := b.Controls[0]
 32543  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32544  				break
 32545  			}
 32546  			z := v_0.Args[0]
 32547  			if z.Op != ssaop.OpARM64AND {
 32548  				break
 32549  			}
 32550  			_ = z.Args[1]
 32551  			z_0 := z.Args[0]
 32552  			z_1 := z.Args[1]
 32553  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32554  				x := z_0
 32555  				y := z_1
 32556  				if !(z.Uses == 1) {
 32557  					continue
 32558  				}
 32559  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 32560  				v0.AddArg2(x, y)
 32561  				b.ResetWithControl(block.BlockARM64LT, v0)
 32562  				return true
 32563  			}
 32564  			break
 32565  		}
 32566  		// match: (LT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 32567  		// cond: x.Uses == 1
 32568  		// result: (LT (TSTconst [c] y) yes no)
 32569  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32570  			v_0 := b.Controls[0]
 32571  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32572  				break
 32573  			}
 32574  			x := v_0.Args[0]
 32575  			if x.Op != ssaop.OpARM64ANDconst {
 32576  				break
 32577  			}
 32578  			c := ssa.AuxIntToInt64(x.AuxInt)
 32579  			y := x.Args[0]
 32580  			if !(x.Uses == 1) {
 32581  				break
 32582  			}
 32583  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 32584  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 32585  			v0.AddArg(y)
 32586  			b.ResetWithControl(block.BlockARM64LT, v0)
 32587  			return true
 32588  		}
 32589  		// match: (LT (CMPWconst [0] z:(AND x y)) yes no)
 32590  		// cond: z.Uses == 1
 32591  		// result: (LT (TSTW x y) yes no)
 32592  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32593  			v_0 := b.Controls[0]
 32594  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32595  				break
 32596  			}
 32597  			z := v_0.Args[0]
 32598  			if z.Op != ssaop.OpARM64AND {
 32599  				break
 32600  			}
 32601  			_ = z.Args[1]
 32602  			z_0 := z.Args[0]
 32603  			z_1 := z.Args[1]
 32604  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32605  				x := z_0
 32606  				y := z_1
 32607  				if !(z.Uses == 1) {
 32608  					continue
 32609  				}
 32610  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 32611  				v0.AddArg2(x, y)
 32612  				b.ResetWithControl(block.BlockARM64LT, v0)
 32613  				return true
 32614  			}
 32615  			break
 32616  		}
 32617  		// match: (LT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 32618  		// cond: x.Uses == 1
 32619  		// result: (LT (TSTWconst [int32(c)] y) yes no)
 32620  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32621  			v_0 := b.Controls[0]
 32622  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32623  				break
 32624  			}
 32625  			x := v_0.Args[0]
 32626  			if x.Op != ssaop.OpARM64ANDconst {
 32627  				break
 32628  			}
 32629  			c := ssa.AuxIntToInt64(x.AuxInt)
 32630  			y := x.Args[0]
 32631  			if !(x.Uses == 1) {
 32632  				break
 32633  			}
 32634  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 32635  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 32636  			v0.AddArg(y)
 32637  			b.ResetWithControl(block.BlockARM64LT, v0)
 32638  			return true
 32639  		}
 32640  		// match: (LT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 32641  		// cond: x.Uses == 1
 32642  		// result: (LTnoov (CMNconst [c] y) yes no)
 32643  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32644  			v_0 := b.Controls[0]
 32645  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32646  				break
 32647  			}
 32648  			x := v_0.Args[0]
 32649  			if x.Op != ssaop.OpARM64ADDconst {
 32650  				break
 32651  			}
 32652  			c := ssa.AuxIntToInt64(x.AuxInt)
 32653  			y := x.Args[0]
 32654  			if !(x.Uses == 1) {
 32655  				break
 32656  			}
 32657  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 32658  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 32659  			v0.AddArg(y)
 32660  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 32661  			return true
 32662  		}
 32663  		// match: (LT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 32664  		// cond: x.Uses == 1
 32665  		// result: (LTnoov (CMNWconst [int32(c)] y) yes no)
 32666  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32667  			v_0 := b.Controls[0]
 32668  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32669  				break
 32670  			}
 32671  			x := v_0.Args[0]
 32672  			if x.Op != ssaop.OpARM64ADDconst {
 32673  				break
 32674  			}
 32675  			c := ssa.AuxIntToInt64(x.AuxInt)
 32676  			y := x.Args[0]
 32677  			if !(x.Uses == 1) {
 32678  				break
 32679  			}
 32680  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 32681  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 32682  			v0.AddArg(y)
 32683  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 32684  			return true
 32685  		}
 32686  		// match: (LT (CMPconst [0] z:(ADD x y)) yes no)
 32687  		// cond: z.Uses == 1
 32688  		// result: (LTnoov (CMN x y) yes no)
 32689  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32690  			v_0 := b.Controls[0]
 32691  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32692  				break
 32693  			}
 32694  			z := v_0.Args[0]
 32695  			if z.Op != ssaop.OpARM64ADD {
 32696  				break
 32697  			}
 32698  			_ = z.Args[1]
 32699  			z_0 := z.Args[0]
 32700  			z_1 := z.Args[1]
 32701  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32702  				x := z_0
 32703  				y := z_1
 32704  				if !(z.Uses == 1) {
 32705  					continue
 32706  				}
 32707  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 32708  				v0.AddArg2(x, y)
 32709  				b.ResetWithControl(block.BlockARM64LTnoov, v0)
 32710  				return true
 32711  			}
 32712  			break
 32713  		}
 32714  		// match: (LT (CMPWconst [0] z:(ADD x y)) yes no)
 32715  		// cond: z.Uses == 1
 32716  		// result: (LTnoov (CMNW x y) yes no)
 32717  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32718  			v_0 := b.Controls[0]
 32719  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32720  				break
 32721  			}
 32722  			z := v_0.Args[0]
 32723  			if z.Op != ssaop.OpARM64ADD {
 32724  				break
 32725  			}
 32726  			_ = z.Args[1]
 32727  			z_0 := z.Args[0]
 32728  			z_1 := z.Args[1]
 32729  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32730  				x := z_0
 32731  				y := z_1
 32732  				if !(z.Uses == 1) {
 32733  					continue
 32734  				}
 32735  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 32736  				v0.AddArg2(x, y)
 32737  				b.ResetWithControl(block.BlockARM64LTnoov, v0)
 32738  				return true
 32739  			}
 32740  			break
 32741  		}
 32742  		// match: (LT (CMPconst [0] z:(MADD a x y)) yes no)
 32743  		// cond: z.Uses==1
 32744  		// result: (LTnoov (CMN a (MUL <x.Type> x y)) yes no)
 32745  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32746  			v_0 := b.Controls[0]
 32747  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32748  				break
 32749  			}
 32750  			z := v_0.Args[0]
 32751  			if z.Op != ssaop.OpARM64MADD {
 32752  				break
 32753  			}
 32754  			y := z.Args[2]
 32755  			a := z.Args[0]
 32756  			x := z.Args[1]
 32757  			if !(z.Uses == 1) {
 32758  				break
 32759  			}
 32760  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 32761  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 32762  			v1.AddArg2(x, y)
 32763  			v0.AddArg2(a, v1)
 32764  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 32765  			return true
 32766  		}
 32767  		// match: (LT (CMPWconst [0] z:(MADDW a x y)) yes no)
 32768  		// cond: z.Uses==1
 32769  		// result: (LTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 32770  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32771  			v_0 := b.Controls[0]
 32772  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32773  				break
 32774  			}
 32775  			z := v_0.Args[0]
 32776  			if z.Op != ssaop.OpARM64MADDW {
 32777  				break
 32778  			}
 32779  			y := z.Args[2]
 32780  			a := z.Args[0]
 32781  			x := z.Args[1]
 32782  			if !(z.Uses == 1) {
 32783  				break
 32784  			}
 32785  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 32786  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 32787  			v1.AddArg2(x, y)
 32788  			v0.AddArg2(a, v1)
 32789  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 32790  			return true
 32791  		}
 32792  		// match: (LT (CMPWconst [0] x) yes no)
 32793  		// result: (TBNZ [31] x yes no)
 32794  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32795  			v_0 := b.Controls[0]
 32796  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32797  				break
 32798  			}
 32799  			x := v_0.Args[0]
 32800  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 32801  			b.AuxInt = ssa.Int64ToAuxInt(31)
 32802  			return true
 32803  		}
 32804  		// match: (LT (CMPconst [0] x) yes no)
 32805  		// result: (TBNZ [63] x yes no)
 32806  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32807  			v_0 := b.Controls[0]
 32808  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32809  				break
 32810  			}
 32811  			x := v_0.Args[0]
 32812  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 32813  			b.AuxInt = ssa.Int64ToAuxInt(63)
 32814  			return true
 32815  		}
 32816  		// match: (LT (CMPWconst [128] x) yes no)
 32817  		// cond: ssa.ZeroUpper56Bits(x)
 32818  		// result: (TBZ [7] x yes no)
 32819  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32820  			v_0 := b.Controls[0]
 32821  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 32822  				break
 32823  			}
 32824  			x := v_0.Args[0]
 32825  			if !(ssa.ZeroUpper56Bits(x)) {
 32826  				break
 32827  			}
 32828  			b.ResetWithControl(block.BlockARM64TBZ, x)
 32829  			b.AuxInt = ssa.Int64ToAuxInt(7)
 32830  			return true
 32831  		}
 32832  		// match: (LT (CMPconst [128] x) yes no)
 32833  		// cond: ssa.ZeroUpper56Bits(x)
 32834  		// result: (TBZ [7] x yes no)
 32835  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32836  			v_0 := b.Controls[0]
 32837  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 32838  				break
 32839  			}
 32840  			x := v_0.Args[0]
 32841  			if !(ssa.ZeroUpper56Bits(x)) {
 32842  				break
 32843  			}
 32844  			b.ResetWithControl(block.BlockARM64TBZ, x)
 32845  			b.AuxInt = ssa.Int64ToAuxInt(7)
 32846  			return true
 32847  		}
 32848  		// match: (LT (FlagConstant [fc]) yes no)
 32849  		// cond: fc.Lt()
 32850  		// result: (First yes no)
 32851  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32852  			v_0 := b.Controls[0]
 32853  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32854  			if !(fc.Lt()) {
 32855  				break
 32856  			}
 32857  			b.Reset(block.BlockFirst)
 32858  			return true
 32859  		}
 32860  		// match: (LT (FlagConstant [fc]) yes no)
 32861  		// cond: !fc.Lt()
 32862  		// result: (First no yes)
 32863  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32864  			v_0 := b.Controls[0]
 32865  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32866  			if !(!fc.Lt()) {
 32867  				break
 32868  			}
 32869  			b.Reset(block.BlockFirst)
 32870  			b.SwapSuccessors()
 32871  			return true
 32872  		}
 32873  		// match: (LT (InvertFlags cmp) yes no)
 32874  		// result: (GT cmp yes no)
 32875  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 32876  			v_0 := b.Controls[0]
 32877  			cmp := v_0.Args[0]
 32878  			b.ResetWithControl(block.BlockARM64GT, cmp)
 32879  			return true
 32880  		}
 32881  	case block.BlockARM64LTnoov:
 32882  		// match: (LTnoov (FlagConstant [fc]) yes no)
 32883  		// cond: fc.LtNoov()
 32884  		// result: (First yes no)
 32885  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32886  			v_0 := b.Controls[0]
 32887  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32888  			if !(fc.LtNoov()) {
 32889  				break
 32890  			}
 32891  			b.Reset(block.BlockFirst)
 32892  			return true
 32893  		}
 32894  		// match: (LTnoov (FlagConstant [fc]) yes no)
 32895  		// cond: !fc.LtNoov()
 32896  		// result: (First no yes)
 32897  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 32898  			v_0 := b.Controls[0]
 32899  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 32900  			if !(!fc.LtNoov()) {
 32901  				break
 32902  			}
 32903  			b.Reset(block.BlockFirst)
 32904  			b.SwapSuccessors()
 32905  			return true
 32906  		}
 32907  	case block.BlockARM64NE:
 32908  		// match: (NE (CMPconst [0] z:(AND x y)) yes no)
 32909  		// cond: z.Uses == 1
 32910  		// result: (NE (TST x y) yes no)
 32911  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32912  			v_0 := b.Controls[0]
 32913  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32914  				break
 32915  			}
 32916  			z := v_0.Args[0]
 32917  			if z.Op != ssaop.OpARM64AND {
 32918  				break
 32919  			}
 32920  			_ = z.Args[1]
 32921  			z_0 := z.Args[0]
 32922  			z_1 := z.Args[1]
 32923  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32924  				x := z_0
 32925  				y := z_1
 32926  				if !(z.Uses == 1) {
 32927  					continue
 32928  				}
 32929  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 32930  				v0.AddArg2(x, y)
 32931  				b.ResetWithControl(block.BlockARM64NE, v0)
 32932  				return true
 32933  			}
 32934  			break
 32935  		}
 32936  		// match: (NE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 32937  		// cond: x.Uses == 1
 32938  		// result: (NE (TSTconst [c] y) yes no)
 32939  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 32940  			v_0 := b.Controls[0]
 32941  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 32942  				break
 32943  			}
 32944  			x := v_0.Args[0]
 32945  			if x.Op != ssaop.OpARM64ANDconst {
 32946  				break
 32947  			}
 32948  			c := ssa.AuxIntToInt64(x.AuxInt)
 32949  			y := x.Args[0]
 32950  			if !(x.Uses == 1) {
 32951  				break
 32952  			}
 32953  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 32954  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 32955  			v0.AddArg(y)
 32956  			b.ResetWithControl(block.BlockARM64NE, v0)
 32957  			return true
 32958  		}
 32959  		// match: (NE (CMPWconst [0] z:(AND x y)) yes no)
 32960  		// cond: z.Uses == 1
 32961  		// result: (NE (TSTW x y) yes no)
 32962  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32963  			v_0 := b.Controls[0]
 32964  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32965  				break
 32966  			}
 32967  			z := v_0.Args[0]
 32968  			if z.Op != ssaop.OpARM64AND {
 32969  				break
 32970  			}
 32971  			_ = z.Args[1]
 32972  			z_0 := z.Args[0]
 32973  			z_1 := z.Args[1]
 32974  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 32975  				x := z_0
 32976  				y := z_1
 32977  				if !(z.Uses == 1) {
 32978  					continue
 32979  				}
 32980  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 32981  				v0.AddArg2(x, y)
 32982  				b.ResetWithControl(block.BlockARM64NE, v0)
 32983  				return true
 32984  			}
 32985  			break
 32986  		}
 32987  		// match: (NE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 32988  		// cond: x.Uses == 1
 32989  		// result: (NE (TSTWconst [int32(c)] y) yes no)
 32990  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 32991  			v_0 := b.Controls[0]
 32992  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 32993  				break
 32994  			}
 32995  			x := v_0.Args[0]
 32996  			if x.Op != ssaop.OpARM64ANDconst {
 32997  				break
 32998  			}
 32999  			c := ssa.AuxIntToInt64(x.AuxInt)
 33000  			y := x.Args[0]
 33001  			if !(x.Uses == 1) {
 33002  				break
 33003  			}
 33004  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 33005  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 33006  			v0.AddArg(y)
 33007  			b.ResetWithControl(block.BlockARM64NE, v0)
 33008  			return true
 33009  		}
 33010  		// match: (NE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 33011  		// cond: x.Uses == 1
 33012  		// result: (NE (CMNconst [c] y) yes no)
 33013  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 33014  			v_0 := b.Controls[0]
 33015  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 33016  				break
 33017  			}
 33018  			x := v_0.Args[0]
 33019  			if x.Op != ssaop.OpARM64ADDconst {
 33020  				break
 33021  			}
 33022  			c := ssa.AuxIntToInt64(x.AuxInt)
 33023  			y := x.Args[0]
 33024  			if !(x.Uses == 1) {
 33025  				break
 33026  			}
 33027  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 33028  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 33029  			v0.AddArg(y)
 33030  			b.ResetWithControl(block.BlockARM64NE, v0)
 33031  			return true
 33032  		}
 33033  		// match: (NE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 33034  		// cond: x.Uses == 1
 33035  		// result: (NE (CMNWconst [int32(c)] y) yes no)
 33036  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 33037  			v_0 := b.Controls[0]
 33038  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 33039  				break
 33040  			}
 33041  			x := v_0.Args[0]
 33042  			if x.Op != ssaop.OpARM64ADDconst {
 33043  				break
 33044  			}
 33045  			c := ssa.AuxIntToInt64(x.AuxInt)
 33046  			y := x.Args[0]
 33047  			if !(x.Uses == 1) {
 33048  				break
 33049  			}
 33050  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 33051  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 33052  			v0.AddArg(y)
 33053  			b.ResetWithControl(block.BlockARM64NE, v0)
 33054  			return true
 33055  		}
 33056  		// match: (NE (CMPconst [0] z:(ADD x y)) yes no)
 33057  		// cond: z.Uses == 1
 33058  		// result: (NE (CMN x y) yes no)
 33059  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 33060  			v_0 := b.Controls[0]
 33061  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 33062  				break
 33063  			}
 33064  			z := v_0.Args[0]
 33065  			if z.Op != ssaop.OpARM64ADD {
 33066  				break
 33067  			}
 33068  			_ = z.Args[1]
 33069  			z_0 := z.Args[0]
 33070  			z_1 := z.Args[1]
 33071  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 33072  				x := z_0
 33073  				y := z_1
 33074  				if !(z.Uses == 1) {
 33075  					continue
 33076  				}
 33077  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 33078  				v0.AddArg2(x, y)
 33079  				b.ResetWithControl(block.BlockARM64NE, v0)
 33080  				return true
 33081  			}
 33082  			break
 33083  		}
 33084  		// match: (NE (CMPWconst [0] z:(ADD x y)) yes no)
 33085  		// cond: z.Uses == 1
 33086  		// result: (NE (CMNW x y) yes no)
 33087  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 33088  			v_0 := b.Controls[0]
 33089  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 33090  				break
 33091  			}
 33092  			z := v_0.Args[0]
 33093  			if z.Op != ssaop.OpARM64ADD {
 33094  				break
 33095  			}
 33096  			_ = z.Args[1]
 33097  			z_0 := z.Args[0]
 33098  			z_1 := z.Args[1]
 33099  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 33100  				x := z_0
 33101  				y := z_1
 33102  				if !(z.Uses == 1) {
 33103  					continue
 33104  				}
 33105  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 33106  				v0.AddArg2(x, y)
 33107  				b.ResetWithControl(block.BlockARM64NE, v0)
 33108  				return true
 33109  			}
 33110  			break
 33111  		}
 33112  		// match: (NE (CMP x z:(NEG y)) yes no)
 33113  		// cond: z.Uses == 1
 33114  		// result: (NE (CMN x y) yes no)
 33115  		for b.Controls[0].Op == ssaop.OpARM64CMP {
 33116  			v_0 := b.Controls[0]
 33117  			_ = v_0.Args[1]
 33118  			x := v_0.Args[0]
 33119  			z := v_0.Args[1]
 33120  			if z.Op != ssaop.OpARM64NEG {
 33121  				break
 33122  			}
 33123  			y := z.Args[0]
 33124  			if !(z.Uses == 1) {
 33125  				break
 33126  			}
 33127  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 33128  			v0.AddArg2(x, y)
 33129  			b.ResetWithControl(block.BlockARM64NE, v0)
 33130  			return true
 33131  		}
 33132  		// match: (NE (CMPW x z:(NEG y)) yes no)
 33133  		// cond: z.Uses == 1
 33134  		// result: (NE (CMNW x y) yes no)
 33135  		for b.Controls[0].Op == ssaop.OpARM64CMPW {
 33136  			v_0 := b.Controls[0]
 33137  			_ = v_0.Args[1]
 33138  			x := v_0.Args[0]
 33139  			z := v_0.Args[1]
 33140  			if z.Op != ssaop.OpARM64NEG {
 33141  				break
 33142  			}
 33143  			y := z.Args[0]
 33144  			if !(z.Uses == 1) {
 33145  				break
 33146  			}
 33147  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 33148  			v0.AddArg2(x, y)
 33149  			b.ResetWithControl(block.BlockARM64NE, v0)
 33150  			return true
 33151  		}
 33152  		// match: (NE (CMPconst [0] x) yes no)
 33153  		// result: (NZ x yes no)
 33154  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 33155  			v_0 := b.Controls[0]
 33156  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 33157  				break
 33158  			}
 33159  			x := v_0.Args[0]
 33160  			b.ResetWithControl(block.BlockARM64NZ, x)
 33161  			return true
 33162  		}
 33163  		// match: (NE (CMPWconst [0] x) yes no)
 33164  		// result: (NZW x yes no)
 33165  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 33166  			v_0 := b.Controls[0]
 33167  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 33168  				break
 33169  			}
 33170  			x := v_0.Args[0]
 33171  			b.ResetWithControl(block.BlockARM64NZW, x)
 33172  			return true
 33173  		}
 33174  		// match: (NE (CMPconst [0] z:(MADD a x y)) yes no)
 33175  		// cond: z.Uses==1
 33176  		// result: (NE (CMN a (MUL <x.Type> x y)) yes no)
 33177  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 33178  			v_0 := b.Controls[0]
 33179  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 33180  				break
 33181  			}
 33182  			z := v_0.Args[0]
 33183  			if z.Op != ssaop.OpARM64MADD {
 33184  				break
 33185  			}
 33186  			y := z.Args[2]
 33187  			a := z.Args[0]
 33188  			x := z.Args[1]
 33189  			if !(z.Uses == 1) {
 33190  				break
 33191  			}
 33192  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 33193  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 33194  			v1.AddArg2(x, y)
 33195  			v0.AddArg2(a, v1)
 33196  			b.ResetWithControl(block.BlockARM64NE, v0)
 33197  			return true
 33198  		}
 33199  		// match: (NE (CMPWconst [0] z:(MADDW a x y)) yes no)
 33200  		// cond: z.Uses==1
 33201  		// result: (NE (CMNW a (MULW <x.Type> x y)) yes no)
 33202  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 33203  			v_0 := b.Controls[0]
 33204  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 33205  				break
 33206  			}
 33207  			z := v_0.Args[0]
 33208  			if z.Op != ssaop.OpARM64MADDW {
 33209  				break
 33210  			}
 33211  			y := z.Args[2]
 33212  			a := z.Args[0]
 33213  			x := z.Args[1]
 33214  			if !(z.Uses == 1) {
 33215  				break
 33216  			}
 33217  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 33218  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 33219  			v1.AddArg2(x, y)
 33220  			v0.AddArg2(a, v1)
 33221  			b.ResetWithControl(block.BlockARM64NE, v0)
 33222  			return true
 33223  		}
 33224  		// match: (NE (CMPconst [0] z:(MSUB a x y)) yes no)
 33225  		// cond: z.Uses==1
 33226  		// result: (NE (CMP a (MUL <x.Type> x y)) yes no)
 33227  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 33228  			v_0 := b.Controls[0]
 33229  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 33230  				break
 33231  			}
 33232  			z := v_0.Args[0]
 33233  			if z.Op != ssaop.OpARM64MSUB {
 33234  				break
 33235  			}
 33236  			y := z.Args[2]
 33237  			a := z.Args[0]
 33238  			x := z.Args[1]
 33239  			if !(z.Uses == 1) {
 33240  				break
 33241  			}
 33242  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 33243  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 33244  			v1.AddArg2(x, y)
 33245  			v0.AddArg2(a, v1)
 33246  			b.ResetWithControl(block.BlockARM64NE, v0)
 33247  			return true
 33248  		}
 33249  		// match: (NE (CMPWconst [0] z:(MSUBW a x y)) yes no)
 33250  		// cond: z.Uses==1
 33251  		// result: (NE (CMPW a (MULW <x.Type> x y)) yes no)
 33252  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 33253  			v_0 := b.Controls[0]
 33254  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 33255  				break
 33256  			}
 33257  			z := v_0.Args[0]
 33258  			if z.Op != ssaop.OpARM64MSUBW {
 33259  				break
 33260  			}
 33261  			y := z.Args[2]
 33262  			a := z.Args[0]
 33263  			x := z.Args[1]
 33264  			if !(z.Uses == 1) {
 33265  				break
 33266  			}
 33267  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 33268  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 33269  			v1.AddArg2(x, y)
 33270  			v0.AddArg2(a, v1)
 33271  			b.ResetWithControl(block.BlockARM64NE, v0)
 33272  			return true
 33273  		}
 33274  		// match: (NE (TSTconst [c] x) yes no)
 33275  		// cond: ssa.OneBit(c)
 33276  		// result: (TBNZ [int64(ssa.Ntz64(c))] x yes no)
 33277  		for b.Controls[0].Op == ssaop.OpARM64TSTconst {
 33278  			v_0 := b.Controls[0]
 33279  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 33280  			x := v_0.Args[0]
 33281  			if !(ssa.OneBit(c)) {
 33282  				break
 33283  			}
 33284  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33285  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 33286  			return true
 33287  		}
 33288  		// match: (NE (TSTWconst [c] x) yes no)
 33289  		// cond: ssa.OneBit(int64(uint32(c)))
 33290  		// result: (TBNZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 33291  		for b.Controls[0].Op == ssaop.OpARM64TSTWconst {
 33292  			v_0 := b.Controls[0]
 33293  			c := ssa.AuxIntToInt32(v_0.AuxInt)
 33294  			x := v_0.Args[0]
 33295  			if !(ssa.OneBit(int64(uint32(c)))) {
 33296  				break
 33297  			}
 33298  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33299  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 33300  			return true
 33301  		}
 33302  		// match: (NE (FlagConstant [fc]) yes no)
 33303  		// cond: fc.Ne()
 33304  		// result: (First yes no)
 33305  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 33306  			v_0 := b.Controls[0]
 33307  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 33308  			if !(fc.Ne()) {
 33309  				break
 33310  			}
 33311  			b.Reset(block.BlockFirst)
 33312  			return true
 33313  		}
 33314  		// match: (NE (FlagConstant [fc]) yes no)
 33315  		// cond: !fc.Ne()
 33316  		// result: (First no yes)
 33317  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 33318  			v_0 := b.Controls[0]
 33319  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 33320  			if !(!fc.Ne()) {
 33321  				break
 33322  			}
 33323  			b.Reset(block.BlockFirst)
 33324  			b.SwapSuccessors()
 33325  			return true
 33326  		}
 33327  		// match: (NE (InvertFlags cmp) yes no)
 33328  		// result: (NE cmp yes no)
 33329  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 33330  			v_0 := b.Controls[0]
 33331  			cmp := v_0.Args[0]
 33332  			b.ResetWithControl(block.BlockARM64NE, cmp)
 33333  			return true
 33334  		}
 33335  	case block.BlockARM64NZ:
 33336  		// match: (NZ (Equal cc) yes no)
 33337  		// result: (EQ cc yes no)
 33338  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 33339  			v_0 := b.Controls[0]
 33340  			cc := v_0.Args[0]
 33341  			b.ResetWithControl(block.BlockARM64EQ, cc)
 33342  			return true
 33343  		}
 33344  		// match: (NZ (NotEqual cc) yes no)
 33345  		// result: (NE cc yes no)
 33346  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 33347  			v_0 := b.Controls[0]
 33348  			cc := v_0.Args[0]
 33349  			b.ResetWithControl(block.BlockARM64NE, cc)
 33350  			return true
 33351  		}
 33352  		// match: (NZ (LessThan cc) yes no)
 33353  		// result: (LT cc yes no)
 33354  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 33355  			v_0 := b.Controls[0]
 33356  			cc := v_0.Args[0]
 33357  			b.ResetWithControl(block.BlockARM64LT, cc)
 33358  			return true
 33359  		}
 33360  		// match: (NZ (LessThanU cc) yes no)
 33361  		// result: (ULT cc yes no)
 33362  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 33363  			v_0 := b.Controls[0]
 33364  			cc := v_0.Args[0]
 33365  			b.ResetWithControl(block.BlockARM64ULT, cc)
 33366  			return true
 33367  		}
 33368  		// match: (NZ (LessEqual cc) yes no)
 33369  		// result: (LE cc yes no)
 33370  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 33371  			v_0 := b.Controls[0]
 33372  			cc := v_0.Args[0]
 33373  			b.ResetWithControl(block.BlockARM64LE, cc)
 33374  			return true
 33375  		}
 33376  		// match: (NZ (LessEqualU cc) yes no)
 33377  		// result: (ULE cc yes no)
 33378  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 33379  			v_0 := b.Controls[0]
 33380  			cc := v_0.Args[0]
 33381  			b.ResetWithControl(block.BlockARM64ULE, cc)
 33382  			return true
 33383  		}
 33384  		// match: (NZ (GreaterThan cc) yes no)
 33385  		// result: (GT cc yes no)
 33386  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 33387  			v_0 := b.Controls[0]
 33388  			cc := v_0.Args[0]
 33389  			b.ResetWithControl(block.BlockARM64GT, cc)
 33390  			return true
 33391  		}
 33392  		// match: (NZ (GreaterThanU cc) yes no)
 33393  		// result: (UGT cc yes no)
 33394  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 33395  			v_0 := b.Controls[0]
 33396  			cc := v_0.Args[0]
 33397  			b.ResetWithControl(block.BlockARM64UGT, cc)
 33398  			return true
 33399  		}
 33400  		// match: (NZ (GreaterEqual cc) yes no)
 33401  		// result: (GE cc yes no)
 33402  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 33403  			v_0 := b.Controls[0]
 33404  			cc := v_0.Args[0]
 33405  			b.ResetWithControl(block.BlockARM64GE, cc)
 33406  			return true
 33407  		}
 33408  		// match: (NZ (GreaterEqualU cc) yes no)
 33409  		// result: (UGE cc yes no)
 33410  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 33411  			v_0 := b.Controls[0]
 33412  			cc := v_0.Args[0]
 33413  			b.ResetWithControl(block.BlockARM64UGE, cc)
 33414  			return true
 33415  		}
 33416  		// match: (NZ (LessThanF cc) yes no)
 33417  		// result: (FLT cc yes no)
 33418  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 33419  			v_0 := b.Controls[0]
 33420  			cc := v_0.Args[0]
 33421  			b.ResetWithControl(block.BlockARM64FLT, cc)
 33422  			return true
 33423  		}
 33424  		// match: (NZ (LessEqualF cc) yes no)
 33425  		// result: (FLE cc yes no)
 33426  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 33427  			v_0 := b.Controls[0]
 33428  			cc := v_0.Args[0]
 33429  			b.ResetWithControl(block.BlockARM64FLE, cc)
 33430  			return true
 33431  		}
 33432  		// match: (NZ (GreaterThanF cc) yes no)
 33433  		// result: (FGT cc yes no)
 33434  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 33435  			v_0 := b.Controls[0]
 33436  			cc := v_0.Args[0]
 33437  			b.ResetWithControl(block.BlockARM64FGT, cc)
 33438  			return true
 33439  		}
 33440  		// match: (NZ (GreaterEqualF cc) yes no)
 33441  		// result: (FGE cc yes no)
 33442  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 33443  			v_0 := b.Controls[0]
 33444  			cc := v_0.Args[0]
 33445  			b.ResetWithControl(block.BlockARM64FGE, cc)
 33446  			return true
 33447  		}
 33448  		// match: (NZ sub:(SUB x y))
 33449  		// cond: sub.Uses == 1
 33450  		// result: (NE (CMP x y))
 33451  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 33452  			sub := b.Controls[0]
 33453  			y := sub.Args[1]
 33454  			x := sub.Args[0]
 33455  			if !(sub.Uses == 1) {
 33456  				break
 33457  			}
 33458  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 33459  			v0.AddArg2(x, y)
 33460  			b.ResetWithControl(block.BlockARM64NE, v0)
 33461  			return true
 33462  		}
 33463  		// match: (NZ sub:(SUBconst [c] y))
 33464  		// cond: sub.Uses == 1
 33465  		// result: (NE (CMPconst [c] y))
 33466  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 33467  			sub := b.Controls[0]
 33468  			c := ssa.AuxIntToInt64(sub.AuxInt)
 33469  			y := sub.Args[0]
 33470  			if !(sub.Uses == 1) {
 33471  				break
 33472  			}
 33473  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33474  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 33475  			v0.AddArg(y)
 33476  			b.ResetWithControl(block.BlockARM64NE, v0)
 33477  			return true
 33478  		}
 33479  		// match: (NZ (ANDconst [c] x) yes no)
 33480  		// cond: ssa.OneBit(c)
 33481  		// result: (TBNZ [int64(ssa.Ntz64(c))] x yes no)
 33482  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 33483  			v_0 := b.Controls[0]
 33484  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 33485  			x := v_0.Args[0]
 33486  			if !(ssa.OneBit(c)) {
 33487  				break
 33488  			}
 33489  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33490  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 33491  			return true
 33492  		}
 33493  		// match: (NZ s:(SRLconst [63] x) yes no)
 33494  		// cond: s.Uses == 1
 33495  		// result: (TBNZ [63] x yes no)
 33496  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 33497  			s := b.Controls[0]
 33498  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 33499  				break
 33500  			}
 33501  			x := s.Args[0]
 33502  			if !(s.Uses == 1) {
 33503  				break
 33504  			}
 33505  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33506  			b.AuxInt = ssa.Int64ToAuxInt(63)
 33507  			return true
 33508  		}
 33509  		// match: (NZ s:(SRAconst [63] x) yes no)
 33510  		// cond: s.Uses == 1
 33511  		// result: (TBNZ [63] x yes no)
 33512  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 33513  			s := b.Controls[0]
 33514  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 33515  				break
 33516  			}
 33517  			x := s.Args[0]
 33518  			if !(s.Uses == 1) {
 33519  				break
 33520  			}
 33521  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33522  			b.AuxInt = ssa.Int64ToAuxInt(63)
 33523  			return true
 33524  		}
 33525  		// match: (NZ (MOVDconst [0]) yes no)
 33526  		// result: (First no yes)
 33527  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 33528  			v_0 := b.Controls[0]
 33529  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 33530  				break
 33531  			}
 33532  			b.Reset(block.BlockFirst)
 33533  			b.SwapSuccessors()
 33534  			return true
 33535  		}
 33536  		// match: (NZ (MOVDconst [c]) yes no)
 33537  		// cond: c != 0
 33538  		// result: (First yes no)
 33539  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 33540  			v_0 := b.Controls[0]
 33541  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 33542  			if !(c != 0) {
 33543  				break
 33544  			}
 33545  			b.Reset(block.BlockFirst)
 33546  			return true
 33547  		}
 33548  	case block.BlockARM64NZW:
 33549  		// match: (NZW sub:(SUB x y))
 33550  		// cond: sub.Uses == 1
 33551  		// result: (NE (CMPW x y))
 33552  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 33553  			sub := b.Controls[0]
 33554  			y := sub.Args[1]
 33555  			x := sub.Args[0]
 33556  			if !(sub.Uses == 1) {
 33557  				break
 33558  			}
 33559  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 33560  			v0.AddArg2(x, y)
 33561  			b.ResetWithControl(block.BlockARM64NE, v0)
 33562  			return true
 33563  		}
 33564  		// match: (NZW sub:(SUBconst [c] y))
 33565  		// cond: sub.Uses == 1
 33566  		// result: (NE (CMPWconst [int32(c)] y))
 33567  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 33568  			sub := b.Controls[0]
 33569  			c := ssa.AuxIntToInt64(sub.AuxInt)
 33570  			y := sub.Args[0]
 33571  			if !(sub.Uses == 1) {
 33572  				break
 33573  			}
 33574  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 33575  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 33576  			v0.AddArg(y)
 33577  			b.ResetWithControl(block.BlockARM64NE, v0)
 33578  			return true
 33579  		}
 33580  		// match: (NZW (ANDconst [c] x) yes no)
 33581  		// cond: ssa.OneBit(int64(uint32(c)))
 33582  		// result: (TBNZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 33583  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 33584  			v_0 := b.Controls[0]
 33585  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 33586  			x := v_0.Args[0]
 33587  			if !(ssa.OneBit(int64(uint32(c)))) {
 33588  				break
 33589  			}
 33590  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33591  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 33592  			return true
 33593  		}
 33594  		// match: (NZW (MOVDconst [c]) yes no)
 33595  		// cond: int32(c) == 0
 33596  		// result: (First no yes)
 33597  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 33598  			v_0 := b.Controls[0]
 33599  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 33600  			if !(int32(c) == 0) {
 33601  				break
 33602  			}
 33603  			b.Reset(block.BlockFirst)
 33604  			b.SwapSuccessors()
 33605  			return true
 33606  		}
 33607  		// match: (NZW (MOVDconst [c]) yes no)
 33608  		// cond: int32(c) != 0
 33609  		// result: (First yes no)
 33610  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 33611  			v_0 := b.Controls[0]
 33612  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 33613  			if !(int32(c) != 0) {
 33614  				break
 33615  			}
 33616  			b.Reset(block.BlockFirst)
 33617  			return true
 33618  		}
 33619  	case block.BlockARM64TBNZ:
 33620  		// match: (TBNZ [0] (Equal cc) yes no)
 33621  		// result: (EQ cc yes no)
 33622  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 33623  			v_0 := b.Controls[0]
 33624  			cc := v_0.Args[0]
 33625  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33626  				break
 33627  			}
 33628  			b.ResetWithControl(block.BlockARM64EQ, cc)
 33629  			return true
 33630  		}
 33631  		// match: (TBNZ [0] (NotEqual cc) yes no)
 33632  		// result: (NE cc yes no)
 33633  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 33634  			v_0 := b.Controls[0]
 33635  			cc := v_0.Args[0]
 33636  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33637  				break
 33638  			}
 33639  			b.ResetWithControl(block.BlockARM64NE, cc)
 33640  			return true
 33641  		}
 33642  		// match: (TBNZ [0] (LessThan cc) yes no)
 33643  		// result: (LT cc yes no)
 33644  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 33645  			v_0 := b.Controls[0]
 33646  			cc := v_0.Args[0]
 33647  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33648  				break
 33649  			}
 33650  			b.ResetWithControl(block.BlockARM64LT, cc)
 33651  			return true
 33652  		}
 33653  		// match: (TBNZ [0] (LessThanU cc) yes no)
 33654  		// result: (ULT cc yes no)
 33655  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 33656  			v_0 := b.Controls[0]
 33657  			cc := v_0.Args[0]
 33658  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33659  				break
 33660  			}
 33661  			b.ResetWithControl(block.BlockARM64ULT, cc)
 33662  			return true
 33663  		}
 33664  		// match: (TBNZ [0] (LessEqual cc) yes no)
 33665  		// result: (LE cc yes no)
 33666  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 33667  			v_0 := b.Controls[0]
 33668  			cc := v_0.Args[0]
 33669  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33670  				break
 33671  			}
 33672  			b.ResetWithControl(block.BlockARM64LE, cc)
 33673  			return true
 33674  		}
 33675  		// match: (TBNZ [0] (LessEqualU cc) yes no)
 33676  		// result: (ULE cc yes no)
 33677  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 33678  			v_0 := b.Controls[0]
 33679  			cc := v_0.Args[0]
 33680  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33681  				break
 33682  			}
 33683  			b.ResetWithControl(block.BlockARM64ULE, cc)
 33684  			return true
 33685  		}
 33686  		// match: (TBNZ [0] (GreaterThan cc) yes no)
 33687  		// result: (GT cc yes no)
 33688  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 33689  			v_0 := b.Controls[0]
 33690  			cc := v_0.Args[0]
 33691  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33692  				break
 33693  			}
 33694  			b.ResetWithControl(block.BlockARM64GT, cc)
 33695  			return true
 33696  		}
 33697  		// match: (TBNZ [0] (GreaterThanU cc) yes no)
 33698  		// result: (UGT cc yes no)
 33699  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 33700  			v_0 := b.Controls[0]
 33701  			cc := v_0.Args[0]
 33702  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33703  				break
 33704  			}
 33705  			b.ResetWithControl(block.BlockARM64UGT, cc)
 33706  			return true
 33707  		}
 33708  		// match: (TBNZ [0] (GreaterEqual cc) yes no)
 33709  		// result: (GE cc yes no)
 33710  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 33711  			v_0 := b.Controls[0]
 33712  			cc := v_0.Args[0]
 33713  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33714  				break
 33715  			}
 33716  			b.ResetWithControl(block.BlockARM64GE, cc)
 33717  			return true
 33718  		}
 33719  		// match: (TBNZ [0] (GreaterEqualU cc) yes no)
 33720  		// result: (UGE cc yes no)
 33721  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 33722  			v_0 := b.Controls[0]
 33723  			cc := v_0.Args[0]
 33724  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33725  				break
 33726  			}
 33727  			b.ResetWithControl(block.BlockARM64UGE, cc)
 33728  			return true
 33729  		}
 33730  		// match: (TBNZ [0] (LessThanF cc) yes no)
 33731  		// result: (FLT cc yes no)
 33732  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 33733  			v_0 := b.Controls[0]
 33734  			cc := v_0.Args[0]
 33735  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33736  				break
 33737  			}
 33738  			b.ResetWithControl(block.BlockARM64FLT, cc)
 33739  			return true
 33740  		}
 33741  		// match: (TBNZ [0] (LessEqualF cc) yes no)
 33742  		// result: (FLE cc yes no)
 33743  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 33744  			v_0 := b.Controls[0]
 33745  			cc := v_0.Args[0]
 33746  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33747  				break
 33748  			}
 33749  			b.ResetWithControl(block.BlockARM64FLE, cc)
 33750  			return true
 33751  		}
 33752  		// match: (TBNZ [0] (GreaterThanF cc) yes no)
 33753  		// result: (FGT cc yes no)
 33754  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 33755  			v_0 := b.Controls[0]
 33756  			cc := v_0.Args[0]
 33757  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33758  				break
 33759  			}
 33760  			b.ResetWithControl(block.BlockARM64FGT, cc)
 33761  			return true
 33762  		}
 33763  		// match: (TBNZ [0] (GreaterEqualF cc) yes no)
 33764  		// result: (FGE cc yes no)
 33765  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 33766  			v_0 := b.Controls[0]
 33767  			cc := v_0.Args[0]
 33768  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33769  				break
 33770  			}
 33771  			b.ResetWithControl(block.BlockARM64FGE, cc)
 33772  			return true
 33773  		}
 33774  		// match: (TBNZ [0] (XORconst [1] x) yes no)
 33775  		// result: (TBZ [0] x yes no)
 33776  		for b.Controls[0].Op == ssaop.OpARM64XORconst {
 33777  			v_0 := b.Controls[0]
 33778  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 33779  				break
 33780  			}
 33781  			x := v_0.Args[0]
 33782  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33783  				break
 33784  			}
 33785  			b.ResetWithControl(block.BlockARM64TBZ, x)
 33786  			b.AuxInt = ssa.Int64ToAuxInt(0)
 33787  			return true
 33788  		}
 33789  		// match: (TBNZ [t] sv:(SRLconst [s] x) yes no)
 33790  		// cond: t+s < 64 && sv.Uses == 1
 33791  		// result: (TBNZ [t+s] x yes no )
 33792  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 33793  			sv := b.Controls[0]
 33794  			s := ssa.AuxIntToInt64(sv.AuxInt)
 33795  			x := sv.Args[0]
 33796  			t := ssa.AuxIntToInt64(b.AuxInt)
 33797  			if !(t+s < 64 && sv.Uses == 1) {
 33798  				break
 33799  			}
 33800  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33801  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 33802  			return true
 33803  		}
 33804  		// match: (TBNZ [t] (SRLconst [s] x) yes no)
 33805  		// cond: t+s >= 64
 33806  		// result: (First no yes)
 33807  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 33808  			v_0 := b.Controls[0]
 33809  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 33810  			t := ssa.AuxIntToInt64(b.AuxInt)
 33811  			if !(t+s >= 64) {
 33812  				break
 33813  			}
 33814  			b.Reset(block.BlockFirst)
 33815  			b.SwapSuccessors()
 33816  			return true
 33817  		}
 33818  		// match: (TBNZ [t] sv:(SLLconst [s] x) yes no)
 33819  		// cond: t-s >= 0 && sv.Uses == 1
 33820  		// result: (TBNZ [t-s] x yes no )
 33821  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 33822  			sv := b.Controls[0]
 33823  			s := ssa.AuxIntToInt64(sv.AuxInt)
 33824  			x := sv.Args[0]
 33825  			t := ssa.AuxIntToInt64(b.AuxInt)
 33826  			if !(t-s >= 0 && sv.Uses == 1) {
 33827  				break
 33828  			}
 33829  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33830  			b.AuxInt = ssa.Int64ToAuxInt(t - s)
 33831  			return true
 33832  		}
 33833  		// match: (TBNZ [t] (SLLconst [s] x) yes no)
 33834  		// cond: t-s < 0
 33835  		// result: (First no yes)
 33836  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 33837  			v_0 := b.Controls[0]
 33838  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 33839  			t := ssa.AuxIntToInt64(b.AuxInt)
 33840  			if !(t-s < 0) {
 33841  				break
 33842  			}
 33843  			b.Reset(block.BlockFirst)
 33844  			b.SwapSuccessors()
 33845  			return true
 33846  		}
 33847  		// match: (TBNZ [t] rv:(RORconst [r] x) yes no)
 33848  		// cond: rv.Uses == 1
 33849  		// result: (TBNZ [int64(uint64(t+r)%64)] x yes no)
 33850  		for b.Controls[0].Op == ssaop.OpARM64RORconst {
 33851  			rv := b.Controls[0]
 33852  			r := ssa.AuxIntToInt64(rv.AuxInt)
 33853  			x := rv.Args[0]
 33854  			t := ssa.AuxIntToInt64(b.AuxInt)
 33855  			if !(rv.Uses == 1) {
 33856  				break
 33857  			}
 33858  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33859  			b.AuxInt = ssa.Int64ToAuxInt(int64(uint64(t+r) % 64))
 33860  			return true
 33861  		}
 33862  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 33863  		// cond: t+s < 64 && sv.Uses == 1
 33864  		// result: (TBNZ [t+s] x yes no)
 33865  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 33866  			sv := b.Controls[0]
 33867  			s := ssa.AuxIntToInt64(sv.AuxInt)
 33868  			x := sv.Args[0]
 33869  			t := ssa.AuxIntToInt64(b.AuxInt)
 33870  			if !(t+s < 64 && sv.Uses == 1) {
 33871  				break
 33872  			}
 33873  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33874  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 33875  			return true
 33876  		}
 33877  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 33878  		// cond: t+s >= 64 && sv.Uses == 1
 33879  		// result: (TBNZ [63 ] x yes no)
 33880  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 33881  			sv := b.Controls[0]
 33882  			s := ssa.AuxIntToInt64(sv.AuxInt)
 33883  			x := sv.Args[0]
 33884  			t := ssa.AuxIntToInt64(b.AuxInt)
 33885  			if !(t+s >= 64 && sv.Uses == 1) {
 33886  				break
 33887  			}
 33888  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33889  			b.AuxInt = ssa.Int64ToAuxInt(63)
 33890  			return true
 33891  		}
 33892  	case block.BlockARM64TBZ:
 33893  		// match: (TBZ [0] (XORconst [1] x) yes no)
 33894  		// result: (TBNZ [0] x yes no)
 33895  		for b.Controls[0].Op == ssaop.OpARM64XORconst {
 33896  			v_0 := b.Controls[0]
 33897  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 33898  				break
 33899  			}
 33900  			x := v_0.Args[0]
 33901  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 33902  				break
 33903  			}
 33904  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 33905  			b.AuxInt = ssa.Int64ToAuxInt(0)
 33906  			return true
 33907  		}
 33908  		// match: (TBZ [t] sv:(SRLconst [s] x) yes no)
 33909  		// cond: t+s < 64 && sv.Uses == 1
 33910  		// result: (TBZ [t+s] x yes no )
 33911  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 33912  			sv := b.Controls[0]
 33913  			s := ssa.AuxIntToInt64(sv.AuxInt)
 33914  			x := sv.Args[0]
 33915  			t := ssa.AuxIntToInt64(b.AuxInt)
 33916  			if !(t+s < 64 && sv.Uses == 1) {
 33917  				break
 33918  			}
 33919  			b.ResetWithControl(block.BlockARM64TBZ, x)
 33920  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 33921  			return true
 33922  		}
 33923  		// match: (TBZ [t] (SRLconst [s] x) yes no)
 33924  		// cond: t+s >= 64
 33925  		// result: (First yes no )
 33926  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 33927  			v_0 := b.Controls[0]
 33928  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 33929  			t := ssa.AuxIntToInt64(b.AuxInt)
 33930  			if !(t+s >= 64) {
 33931  				break
 33932  			}
 33933  			b.Reset(block.BlockFirst)
 33934  			return true
 33935  		}
 33936  		// match: (TBZ [t] sv:(SLLconst [s] x) yes no)
 33937  		// cond: t-s >= 0 && sv.Uses == 1
 33938  		// result: (TBZ [t-s] x yes no )
 33939  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 33940  			sv := b.Controls[0]
 33941  			s := ssa.AuxIntToInt64(sv.AuxInt)
 33942  			x := sv.Args[0]
 33943  			t := ssa.AuxIntToInt64(b.AuxInt)
 33944  			if !(t-s >= 0 && sv.Uses == 1) {
 33945  				break
 33946  			}
 33947  			b.ResetWithControl(block.BlockARM64TBZ, x)
 33948  			b.AuxInt = ssa.Int64ToAuxInt(t - s)
 33949  			return true
 33950  		}
 33951  		// match: (TBZ [t] (SLLconst [s] x) yes no)
 33952  		// cond: t-s < 0
 33953  		// result: (First yes no )
 33954  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 33955  			v_0 := b.Controls[0]
 33956  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 33957  			t := ssa.AuxIntToInt64(b.AuxInt)
 33958  			if !(t-s < 0) {
 33959  				break
 33960  			}
 33961  			b.Reset(block.BlockFirst)
 33962  			return true
 33963  		}
 33964  		// match: (TBZ [t] rv:(RORconst [r] x) yes no)
 33965  		// cond: rv.Uses == 1
 33966  		// result: (TBZ [int64(uint64(t+r)%64)] x yes no)
 33967  		for b.Controls[0].Op == ssaop.OpARM64RORconst {
 33968  			rv := b.Controls[0]
 33969  			r := ssa.AuxIntToInt64(rv.AuxInt)
 33970  			x := rv.Args[0]
 33971  			t := ssa.AuxIntToInt64(b.AuxInt)
 33972  			if !(rv.Uses == 1) {
 33973  				break
 33974  			}
 33975  			b.ResetWithControl(block.BlockARM64TBZ, x)
 33976  			b.AuxInt = ssa.Int64ToAuxInt(int64(uint64(t+r) % 64))
 33977  			return true
 33978  		}
 33979  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 33980  		// cond: t+s < 64 && sv.Uses == 1
 33981  		// result: (TBZ [t+s] x yes no)
 33982  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 33983  			sv := b.Controls[0]
 33984  			s := ssa.AuxIntToInt64(sv.AuxInt)
 33985  			x := sv.Args[0]
 33986  			t := ssa.AuxIntToInt64(b.AuxInt)
 33987  			if !(t+s < 64 && sv.Uses == 1) {
 33988  				break
 33989  			}
 33990  			b.ResetWithControl(block.BlockARM64TBZ, x)
 33991  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 33992  			return true
 33993  		}
 33994  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 33995  		// cond: t+s >= 64 && sv.Uses == 1
 33996  		// result: (TBZ [63 ] x yes no)
 33997  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 33998  			sv := b.Controls[0]
 33999  			s := ssa.AuxIntToInt64(sv.AuxInt)
 34000  			x := sv.Args[0]
 34001  			t := ssa.AuxIntToInt64(b.AuxInt)
 34002  			if !(t+s >= 64 && sv.Uses == 1) {
 34003  				break
 34004  			}
 34005  			b.ResetWithControl(block.BlockARM64TBZ, x)
 34006  			b.AuxInt = ssa.Int64ToAuxInt(63)
 34007  			return true
 34008  		}
 34009  	case block.BlockARM64UGE:
 34010  		// match: (UGE (CMPWconst [128] x) yes no)
 34011  		// cond: ssa.ZeroUpper56Bits(x)
 34012  		// result: (TBNZ [7] x yes no)
 34013  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 34014  			v_0 := b.Controls[0]
 34015  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 34016  				break
 34017  			}
 34018  			x := v_0.Args[0]
 34019  			if !(ssa.ZeroUpper56Bits(x)) {
 34020  				break
 34021  			}
 34022  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 34023  			b.AuxInt = ssa.Int64ToAuxInt(7)
 34024  			return true
 34025  		}
 34026  		// match: (UGE (CMPconst [128] x) yes no)
 34027  		// cond: ssa.ZeroUpper56Bits(x)
 34028  		// result: (TBNZ [7] x yes no)
 34029  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 34030  			v_0 := b.Controls[0]
 34031  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 34032  				break
 34033  			}
 34034  			x := v_0.Args[0]
 34035  			if !(ssa.ZeroUpper56Bits(x)) {
 34036  				break
 34037  			}
 34038  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 34039  			b.AuxInt = ssa.Int64ToAuxInt(7)
 34040  			return true
 34041  		}
 34042  		// match: (UGE (FlagConstant [fc]) yes no)
 34043  		// cond: fc.Uge()
 34044  		// result: (First yes no)
 34045  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 34046  			v_0 := b.Controls[0]
 34047  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 34048  			if !(fc.Uge()) {
 34049  				break
 34050  			}
 34051  			b.Reset(block.BlockFirst)
 34052  			return true
 34053  		}
 34054  		// match: (UGE (FlagConstant [fc]) yes no)
 34055  		// cond: !fc.Uge()
 34056  		// result: (First no yes)
 34057  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 34058  			v_0 := b.Controls[0]
 34059  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 34060  			if !(!fc.Uge()) {
 34061  				break
 34062  			}
 34063  			b.Reset(block.BlockFirst)
 34064  			b.SwapSuccessors()
 34065  			return true
 34066  		}
 34067  		// match: (UGE (InvertFlags cmp) yes no)
 34068  		// result: (ULE cmp yes no)
 34069  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 34070  			v_0 := b.Controls[0]
 34071  			cmp := v_0.Args[0]
 34072  			b.ResetWithControl(block.BlockARM64ULE, cmp)
 34073  			return true
 34074  		}
 34075  	case block.BlockARM64UGT:
 34076  		// match: (UGT (CMPconst [0] x))
 34077  		// result: (NE (CMPconst [0] x))
 34078  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 34079  			v_0 := b.Controls[0]
 34080  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 34081  				break
 34082  			}
 34083  			x := v_0.Args[0]
 34084  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 34085  			v0.AuxInt = ssa.Int64ToAuxInt(0)
 34086  			v0.AddArg(x)
 34087  			b.ResetWithControl(block.BlockARM64NE, v0)
 34088  			return true
 34089  		}
 34090  		// match: (UGT (CMPWconst [0] x))
 34091  		// result: (NE (CMPWconst [0] x))
 34092  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 34093  			v_0 := b.Controls[0]
 34094  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 34095  				break
 34096  			}
 34097  			x := v_0.Args[0]
 34098  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 34099  			v0.AuxInt = ssa.Int32ToAuxInt(0)
 34100  			v0.AddArg(x)
 34101  			b.ResetWithControl(block.BlockARM64NE, v0)
 34102  			return true
 34103  		}
 34104  		// match: (UGT (FlagConstant [fc]) yes no)
 34105  		// cond: fc.Ugt()
 34106  		// result: (First yes no)
 34107  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 34108  			v_0 := b.Controls[0]
 34109  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 34110  			if !(fc.Ugt()) {
 34111  				break
 34112  			}
 34113  			b.Reset(block.BlockFirst)
 34114  			return true
 34115  		}
 34116  		// match: (UGT (FlagConstant [fc]) yes no)
 34117  		// cond: !fc.Ugt()
 34118  		// result: (First no yes)
 34119  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 34120  			v_0 := b.Controls[0]
 34121  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 34122  			if !(!fc.Ugt()) {
 34123  				break
 34124  			}
 34125  			b.Reset(block.BlockFirst)
 34126  			b.SwapSuccessors()
 34127  			return true
 34128  		}
 34129  		// match: (UGT (InvertFlags cmp) yes no)
 34130  		// result: (ULT cmp yes no)
 34131  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 34132  			v_0 := b.Controls[0]
 34133  			cmp := v_0.Args[0]
 34134  			b.ResetWithControl(block.BlockARM64ULT, cmp)
 34135  			return true
 34136  		}
 34137  	case block.BlockARM64ULE:
 34138  		// match: (ULE (CMPconst [0] x))
 34139  		// result: (EQ (CMPconst [0] x))
 34140  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 34141  			v_0 := b.Controls[0]
 34142  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 34143  				break
 34144  			}
 34145  			x := v_0.Args[0]
 34146  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 34147  			v0.AuxInt = ssa.Int64ToAuxInt(0)
 34148  			v0.AddArg(x)
 34149  			b.ResetWithControl(block.BlockARM64EQ, v0)
 34150  			return true
 34151  		}
 34152  		// match: (ULE (CMPWconst [0] x))
 34153  		// result: (EQ (CMPWconst [0] x))
 34154  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 34155  			v_0 := b.Controls[0]
 34156  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 34157  				break
 34158  			}
 34159  			x := v_0.Args[0]
 34160  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 34161  			v0.AuxInt = ssa.Int32ToAuxInt(0)
 34162  			v0.AddArg(x)
 34163  			b.ResetWithControl(block.BlockARM64EQ, v0)
 34164  			return true
 34165  		}
 34166  		// match: (ULE (FlagConstant [fc]) yes no)
 34167  		// cond: fc.Ule()
 34168  		// result: (First yes no)
 34169  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 34170  			v_0 := b.Controls[0]
 34171  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 34172  			if !(fc.Ule()) {
 34173  				break
 34174  			}
 34175  			b.Reset(block.BlockFirst)
 34176  			return true
 34177  		}
 34178  		// match: (ULE (FlagConstant [fc]) yes no)
 34179  		// cond: !fc.Ule()
 34180  		// result: (First no yes)
 34181  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 34182  			v_0 := b.Controls[0]
 34183  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 34184  			if !(!fc.Ule()) {
 34185  				break
 34186  			}
 34187  			b.Reset(block.BlockFirst)
 34188  			b.SwapSuccessors()
 34189  			return true
 34190  		}
 34191  		// match: (ULE (InvertFlags cmp) yes no)
 34192  		// result: (UGE cmp yes no)
 34193  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 34194  			v_0 := b.Controls[0]
 34195  			cmp := v_0.Args[0]
 34196  			b.ResetWithControl(block.BlockARM64UGE, cmp)
 34197  			return true
 34198  		}
 34199  	case block.BlockARM64ULT:
 34200  		// match: (ULT (CMPWconst [128] x) yes no)
 34201  		// cond: ssa.ZeroUpper56Bits(x)
 34202  		// result: (TBZ [7] x yes no)
 34203  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 34204  			v_0 := b.Controls[0]
 34205  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 34206  				break
 34207  			}
 34208  			x := v_0.Args[0]
 34209  			if !(ssa.ZeroUpper56Bits(x)) {
 34210  				break
 34211  			}
 34212  			b.ResetWithControl(block.BlockARM64TBZ, x)
 34213  			b.AuxInt = ssa.Int64ToAuxInt(7)
 34214  			return true
 34215  		}
 34216  		// match: (ULT (CMPconst [128] x) yes no)
 34217  		// cond: ssa.ZeroUpper56Bits(x)
 34218  		// result: (TBZ [7] x yes no)
 34219  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 34220  			v_0 := b.Controls[0]
 34221  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 34222  				break
 34223  			}
 34224  			x := v_0.Args[0]
 34225  			if !(ssa.ZeroUpper56Bits(x)) {
 34226  				break
 34227  			}
 34228  			b.ResetWithControl(block.BlockARM64TBZ, x)
 34229  			b.AuxInt = ssa.Int64ToAuxInt(7)
 34230  			return true
 34231  		}
 34232  		// match: (ULT (FlagConstant [fc]) yes no)
 34233  		// cond: fc.Ult()
 34234  		// result: (First yes no)
 34235  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 34236  			v_0 := b.Controls[0]
 34237  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 34238  			if !(fc.Ult()) {
 34239  				break
 34240  			}
 34241  			b.Reset(block.BlockFirst)
 34242  			return true
 34243  		}
 34244  		// match: (ULT (FlagConstant [fc]) yes no)
 34245  		// cond: !fc.Ult()
 34246  		// result: (First no yes)
 34247  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 34248  			v_0 := b.Controls[0]
 34249  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 34250  			if !(!fc.Ult()) {
 34251  				break
 34252  			}
 34253  			b.Reset(block.BlockFirst)
 34254  			b.SwapSuccessors()
 34255  			return true
 34256  		}
 34257  		// match: (ULT (InvertFlags cmp) yes no)
 34258  		// result: (UGT cmp yes no)
 34259  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 34260  			v_0 := b.Controls[0]
 34261  			cmp := v_0.Args[0]
 34262  			b.ResetWithControl(block.BlockARM64UGT, cmp)
 34263  			return true
 34264  		}
 34265  	case block.BlockARM64Z:
 34266  		// match: (Z sub:(SUB x y))
 34267  		// cond: sub.Uses == 1
 34268  		// result: (EQ (CMP x y))
 34269  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 34270  			sub := b.Controls[0]
 34271  			y := sub.Args[1]
 34272  			x := sub.Args[0]
 34273  			if !(sub.Uses == 1) {
 34274  				break
 34275  			}
 34276  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 34277  			v0.AddArg2(x, y)
 34278  			b.ResetWithControl(block.BlockARM64EQ, v0)
 34279  			return true
 34280  		}
 34281  		// match: (Z sub:(SUBconst [c] y))
 34282  		// cond: sub.Uses == 1
 34283  		// result: (EQ (CMPconst [c] y))
 34284  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 34285  			sub := b.Controls[0]
 34286  			c := ssa.AuxIntToInt64(sub.AuxInt)
 34287  			y := sub.Args[0]
 34288  			if !(sub.Uses == 1) {
 34289  				break
 34290  			}
 34291  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 34292  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 34293  			v0.AddArg(y)
 34294  			b.ResetWithControl(block.BlockARM64EQ, v0)
 34295  			return true
 34296  		}
 34297  		// match: (Z (ANDconst [c] x) yes no)
 34298  		// cond: ssa.OneBit(c)
 34299  		// result: (TBZ [int64(ssa.Ntz64(c))] x yes no)
 34300  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 34301  			v_0 := b.Controls[0]
 34302  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 34303  			x := v_0.Args[0]
 34304  			if !(ssa.OneBit(c)) {
 34305  				break
 34306  			}
 34307  			b.ResetWithControl(block.BlockARM64TBZ, x)
 34308  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 34309  			return true
 34310  		}
 34311  		// match: (Z s:(SRLconst [63] x) yes no)
 34312  		// cond: s.Uses == 1
 34313  		// result: (TBZ [63] x yes no)
 34314  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 34315  			s := b.Controls[0]
 34316  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 34317  				break
 34318  			}
 34319  			x := s.Args[0]
 34320  			if !(s.Uses == 1) {
 34321  				break
 34322  			}
 34323  			b.ResetWithControl(block.BlockARM64TBZ, x)
 34324  			b.AuxInt = ssa.Int64ToAuxInt(63)
 34325  			return true
 34326  		}
 34327  		// match: (Z s:(SRAconst [63] x) yes no)
 34328  		// cond: s.Uses == 1
 34329  		// result: (TBZ [63] x yes no)
 34330  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 34331  			s := b.Controls[0]
 34332  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 34333  				break
 34334  			}
 34335  			x := s.Args[0]
 34336  			if !(s.Uses == 1) {
 34337  				break
 34338  			}
 34339  			b.ResetWithControl(block.BlockARM64TBZ, x)
 34340  			b.AuxInt = ssa.Int64ToAuxInt(63)
 34341  			return true
 34342  		}
 34343  		// match: (Z (MOVDconst [0]) yes no)
 34344  		// result: (First yes no)
 34345  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 34346  			v_0 := b.Controls[0]
 34347  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 34348  				break
 34349  			}
 34350  			b.Reset(block.BlockFirst)
 34351  			return true
 34352  		}
 34353  		// match: (Z (MOVDconst [c]) yes no)
 34354  		// cond: c != 0
 34355  		// result: (First no yes)
 34356  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 34357  			v_0 := b.Controls[0]
 34358  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 34359  			if !(c != 0) {
 34360  				break
 34361  			}
 34362  			b.Reset(block.BlockFirst)
 34363  			b.SwapSuccessors()
 34364  			return true
 34365  		}
 34366  	case block.BlockARM64ZW:
 34367  		// match: (ZW sub:(SUB x y))
 34368  		// cond: sub.Uses == 1
 34369  		// result: (EQ (CMPW x y))
 34370  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 34371  			sub := b.Controls[0]
 34372  			y := sub.Args[1]
 34373  			x := sub.Args[0]
 34374  			if !(sub.Uses == 1) {
 34375  				break
 34376  			}
 34377  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 34378  			v0.AddArg2(x, y)
 34379  			b.ResetWithControl(block.BlockARM64EQ, v0)
 34380  			return true
 34381  		}
 34382  		// match: (ZW sub:(SUBconst [c] y))
 34383  		// cond: sub.Uses == 1
 34384  		// result: (EQ (CMPWconst [int32(c)] y))
 34385  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 34386  			sub := b.Controls[0]
 34387  			c := ssa.AuxIntToInt64(sub.AuxInt)
 34388  			y := sub.Args[0]
 34389  			if !(sub.Uses == 1) {
 34390  				break
 34391  			}
 34392  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 34393  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 34394  			v0.AddArg(y)
 34395  			b.ResetWithControl(block.BlockARM64EQ, v0)
 34396  			return true
 34397  		}
 34398  		// match: (ZW (ANDconst [c] x) yes no)
 34399  		// cond: ssa.OneBit(int64(uint32(c)))
 34400  		// result: (TBZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 34401  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 34402  			v_0 := b.Controls[0]
 34403  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 34404  			x := v_0.Args[0]
 34405  			if !(ssa.OneBit(int64(uint32(c)))) {
 34406  				break
 34407  			}
 34408  			b.ResetWithControl(block.BlockARM64TBZ, x)
 34409  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 34410  			return true
 34411  		}
 34412  		// match: (ZW (MOVDconst [c]) yes no)
 34413  		// cond: int32(c) == 0
 34414  		// result: (First yes no)
 34415  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 34416  			v_0 := b.Controls[0]
 34417  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 34418  			if !(int32(c) == 0) {
 34419  				break
 34420  			}
 34421  			b.Reset(block.BlockFirst)
 34422  			return true
 34423  		}
 34424  		// match: (ZW (MOVDconst [c]) yes no)
 34425  		// cond: int32(c) != 0
 34426  		// result: (First no yes)
 34427  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 34428  			v_0 := b.Controls[0]
 34429  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 34430  			if !(int32(c) != 0) {
 34431  				break
 34432  			}
 34433  			b.Reset(block.BlockFirst)
 34434  			b.SwapSuccessors()
 34435  			return true
 34436  		}
 34437  	}
 34438  	return false
 34439  }
 34440  

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