Source file src/cmd/compile/internal/ssa/rewrite/mips64/rewriteMIPS64.go

     1  // Code generated from _gen/MIPS64.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package mips64
     4  
     5  import "cmd/compile/internal/types"
     6  import "cmd/compile/internal/ssa/block"
     7  import "cmd/compile/internal/ssa/ssaop"
     8  import "cmd/compile/internal/ssa"
     9  
    10  func RewriteValue(v *ssa.Value) bool {
    11  	switch v.Op {
    12  	case ssaop.OpAbs:
    13  		v.Op = ssaop.OpMIPS64ABSD
    14  		return true
    15  	case ssaop.OpAdd16:
    16  		v.Op = ssaop.OpMIPS64ADDV
    17  		return true
    18  	case ssaop.OpAdd32:
    19  		v.Op = ssaop.OpMIPS64ADDV
    20  		return true
    21  	case ssaop.OpAdd32F:
    22  		v.Op = ssaop.OpMIPS64ADDF
    23  		return true
    24  	case ssaop.OpAdd64:
    25  		v.Op = ssaop.OpMIPS64ADDV
    26  		return true
    27  	case ssaop.OpAdd64F:
    28  		v.Op = ssaop.OpMIPS64ADDD
    29  		return true
    30  	case ssaop.OpAdd8:
    31  		v.Op = ssaop.OpMIPS64ADDV
    32  		return true
    33  	case ssaop.OpAddPtr:
    34  		v.Op = ssaop.OpMIPS64ADDV
    35  		return true
    36  	case ssaop.OpAddr:
    37  		return rewriteValue_OpAddr(v)
    38  	case ssaop.OpAnd16:
    39  		v.Op = ssaop.OpMIPS64AND
    40  		return true
    41  	case ssaop.OpAnd32:
    42  		v.Op = ssaop.OpMIPS64AND
    43  		return true
    44  	case ssaop.OpAnd64:
    45  		v.Op = ssaop.OpMIPS64AND
    46  		return true
    47  	case ssaop.OpAnd8:
    48  		v.Op = ssaop.OpMIPS64AND
    49  		return true
    50  	case ssaop.OpAndB:
    51  		v.Op = ssaop.OpMIPS64AND
    52  		return true
    53  	case ssaop.OpAtomicAdd32:
    54  		v.Op = ssaop.OpMIPS64LoweredAtomicAdd32
    55  		return true
    56  	case ssaop.OpAtomicAdd64:
    57  		v.Op = ssaop.OpMIPS64LoweredAtomicAdd64
    58  		return true
    59  	case ssaop.OpAtomicAnd32:
    60  		v.Op = ssaop.OpMIPS64LoweredAtomicAnd32
    61  		return true
    62  	case ssaop.OpAtomicAnd8:
    63  		return rewriteValue_OpAtomicAnd8(v)
    64  	case ssaop.OpAtomicCompareAndSwap32:
    65  		return rewriteValue_OpAtomicCompareAndSwap32(v)
    66  	case ssaop.OpAtomicCompareAndSwap64:
    67  		v.Op = ssaop.OpMIPS64LoweredAtomicCas64
    68  		return true
    69  	case ssaop.OpAtomicExchange32:
    70  		v.Op = ssaop.OpMIPS64LoweredAtomicExchange32
    71  		return true
    72  	case ssaop.OpAtomicExchange64:
    73  		v.Op = ssaop.OpMIPS64LoweredAtomicExchange64
    74  		return true
    75  	case ssaop.OpAtomicLoad32:
    76  		v.Op = ssaop.OpMIPS64LoweredAtomicLoad32
    77  		return true
    78  	case ssaop.OpAtomicLoad64:
    79  		v.Op = ssaop.OpMIPS64LoweredAtomicLoad64
    80  		return true
    81  	case ssaop.OpAtomicLoad8:
    82  		v.Op = ssaop.OpMIPS64LoweredAtomicLoad8
    83  		return true
    84  	case ssaop.OpAtomicLoadPtr:
    85  		v.Op = ssaop.OpMIPS64LoweredAtomicLoad64
    86  		return true
    87  	case ssaop.OpAtomicOr32:
    88  		v.Op = ssaop.OpMIPS64LoweredAtomicOr32
    89  		return true
    90  	case ssaop.OpAtomicOr8:
    91  		return rewriteValue_OpAtomicOr8(v)
    92  	case ssaop.OpAtomicStore32:
    93  		v.Op = ssaop.OpMIPS64LoweredAtomicStore32
    94  		return true
    95  	case ssaop.OpAtomicStore64:
    96  		v.Op = ssaop.OpMIPS64LoweredAtomicStore64
    97  		return true
    98  	case ssaop.OpAtomicStore8:
    99  		v.Op = ssaop.OpMIPS64LoweredAtomicStore8
   100  		return true
   101  	case ssaop.OpAtomicStorePtrNoWB:
   102  		v.Op = ssaop.OpMIPS64LoweredAtomicStore64
   103  		return true
   104  	case ssaop.OpAvg64u:
   105  		return rewriteValue_OpAvg64u(v)
   106  	case ssaop.OpClosureCall:
   107  		v.Op = ssaop.OpMIPS64CALLclosure
   108  		return true
   109  	case ssaop.OpCom16:
   110  		return rewriteValue_OpCom16(v)
   111  	case ssaop.OpCom32:
   112  		return rewriteValue_OpCom32(v)
   113  	case ssaop.OpCom64:
   114  		return rewriteValue_OpCom64(v)
   115  	case ssaop.OpCom8:
   116  		return rewriteValue_OpCom8(v)
   117  	case ssaop.OpConst16:
   118  		return rewriteValue_OpConst16(v)
   119  	case ssaop.OpConst32:
   120  		return rewriteValue_OpConst32(v)
   121  	case ssaop.OpConst32F:
   122  		return rewriteValue_OpConst32F(v)
   123  	case ssaop.OpConst64:
   124  		return rewriteValue_OpConst64(v)
   125  	case ssaop.OpConst64F:
   126  		return rewriteValue_OpConst64F(v)
   127  	case ssaop.OpConst8:
   128  		return rewriteValue_OpConst8(v)
   129  	case ssaop.OpConstBool:
   130  		return rewriteValue_OpConstBool(v)
   131  	case ssaop.OpConstNil:
   132  		return rewriteValue_OpConstNil(v)
   133  	case ssaop.OpCvt32Fto32:
   134  		v.Op = ssaop.OpMIPS64TRUNCFW
   135  		return true
   136  	case ssaop.OpCvt32Fto64:
   137  		v.Op = ssaop.OpMIPS64TRUNCFV
   138  		return true
   139  	case ssaop.OpCvt32Fto64F:
   140  		v.Op = ssaop.OpMIPS64MOVFD
   141  		return true
   142  	case ssaop.OpCvt32to32F:
   143  		v.Op = ssaop.OpMIPS64MOVWF
   144  		return true
   145  	case ssaop.OpCvt32to64F:
   146  		v.Op = ssaop.OpMIPS64MOVWD
   147  		return true
   148  	case ssaop.OpCvt64Fto32:
   149  		v.Op = ssaop.OpMIPS64TRUNCDW
   150  		return true
   151  	case ssaop.OpCvt64Fto32F:
   152  		v.Op = ssaop.OpMIPS64MOVDF
   153  		return true
   154  	case ssaop.OpCvt64Fto64:
   155  		v.Op = ssaop.OpMIPS64TRUNCDV
   156  		return true
   157  	case ssaop.OpCvt64to32F:
   158  		v.Op = ssaop.OpMIPS64MOVVF
   159  		return true
   160  	case ssaop.OpCvt64to64F:
   161  		v.Op = ssaop.OpMIPS64MOVVD
   162  		return true
   163  	case ssaop.OpCvtBoolToUint8:
   164  		v.Op = ssaop.OpCopy
   165  		return true
   166  	case ssaop.OpDiv16:
   167  		return rewriteValue_OpDiv16(v)
   168  	case ssaop.OpDiv16u:
   169  		return rewriteValue_OpDiv16u(v)
   170  	case ssaop.OpDiv32:
   171  		return rewriteValue_OpDiv32(v)
   172  	case ssaop.OpDiv32F:
   173  		v.Op = ssaop.OpMIPS64DIVF
   174  		return true
   175  	case ssaop.OpDiv32u:
   176  		return rewriteValue_OpDiv32u(v)
   177  	case ssaop.OpDiv64:
   178  		return rewriteValue_OpDiv64(v)
   179  	case ssaop.OpDiv64F:
   180  		v.Op = ssaop.OpMIPS64DIVD
   181  		return true
   182  	case ssaop.OpDiv64u:
   183  		return rewriteValue_OpDiv64u(v)
   184  	case ssaop.OpDiv8:
   185  		return rewriteValue_OpDiv8(v)
   186  	case ssaop.OpDiv8u:
   187  		return rewriteValue_OpDiv8u(v)
   188  	case ssaop.OpEq16:
   189  		return rewriteValue_OpEq16(v)
   190  	case ssaop.OpEq32:
   191  		return rewriteValue_OpEq32(v)
   192  	case ssaop.OpEq32F:
   193  		return rewriteValue_OpEq32F(v)
   194  	case ssaop.OpEq64:
   195  		return rewriteValue_OpEq64(v)
   196  	case ssaop.OpEq64F:
   197  		return rewriteValue_OpEq64F(v)
   198  	case ssaop.OpEq8:
   199  		return rewriteValue_OpEq8(v)
   200  	case ssaop.OpEqB:
   201  		return rewriteValue_OpEqB(v)
   202  	case ssaop.OpEqPtr:
   203  		return rewriteValue_OpEqPtr(v)
   204  	case ssaop.OpGetCallerPC:
   205  		v.Op = ssaop.OpMIPS64LoweredGetCallerPC
   206  		return true
   207  	case ssaop.OpGetCallerSP:
   208  		v.Op = ssaop.OpMIPS64LoweredGetCallerSP
   209  		return true
   210  	case ssaop.OpGetClosurePtr:
   211  		v.Op = ssaop.OpMIPS64LoweredGetClosurePtr
   212  		return true
   213  	case ssaop.OpHmul32:
   214  		return rewriteValue_OpHmul32(v)
   215  	case ssaop.OpHmul32u:
   216  		return rewriteValue_OpHmul32u(v)
   217  	case ssaop.OpHmul64:
   218  		return rewriteValue_OpHmul64(v)
   219  	case ssaop.OpHmul64u:
   220  		return rewriteValue_OpHmul64u(v)
   221  	case ssaop.OpInterCall:
   222  		v.Op = ssaop.OpMIPS64CALLinter
   223  		return true
   224  	case ssaop.OpIsInBounds:
   225  		return rewriteValue_OpIsInBounds(v)
   226  	case ssaop.OpIsNonNil:
   227  		return rewriteValue_OpIsNonNil(v)
   228  	case ssaop.OpIsSliceInBounds:
   229  		return rewriteValue_OpIsSliceInBounds(v)
   230  	case ssaop.OpLeq16:
   231  		return rewriteValue_OpLeq16(v)
   232  	case ssaop.OpLeq16U:
   233  		return rewriteValue_OpLeq16U(v)
   234  	case ssaop.OpLeq32:
   235  		return rewriteValue_OpLeq32(v)
   236  	case ssaop.OpLeq32F:
   237  		return rewriteValue_OpLeq32F(v)
   238  	case ssaop.OpLeq32U:
   239  		return rewriteValue_OpLeq32U(v)
   240  	case ssaop.OpLeq64:
   241  		return rewriteValue_OpLeq64(v)
   242  	case ssaop.OpLeq64F:
   243  		return rewriteValue_OpLeq64F(v)
   244  	case ssaop.OpLeq64U:
   245  		return rewriteValue_OpLeq64U(v)
   246  	case ssaop.OpLeq8:
   247  		return rewriteValue_OpLeq8(v)
   248  	case ssaop.OpLeq8U:
   249  		return rewriteValue_OpLeq8U(v)
   250  	case ssaop.OpLess16:
   251  		return rewriteValue_OpLess16(v)
   252  	case ssaop.OpLess16U:
   253  		return rewriteValue_OpLess16U(v)
   254  	case ssaop.OpLess32:
   255  		return rewriteValue_OpLess32(v)
   256  	case ssaop.OpLess32F:
   257  		return rewriteValue_OpLess32F(v)
   258  	case ssaop.OpLess32U:
   259  		return rewriteValue_OpLess32U(v)
   260  	case ssaop.OpLess64:
   261  		return rewriteValue_OpLess64(v)
   262  	case ssaop.OpLess64F:
   263  		return rewriteValue_OpLess64F(v)
   264  	case ssaop.OpLess64U:
   265  		return rewriteValue_OpLess64U(v)
   266  	case ssaop.OpLess8:
   267  		return rewriteValue_OpLess8(v)
   268  	case ssaop.OpLess8U:
   269  		return rewriteValue_OpLess8U(v)
   270  	case ssaop.OpLoad:
   271  		return rewriteValue_OpLoad(v)
   272  	case ssaop.OpLocalAddr:
   273  		return rewriteValue_OpLocalAddr(v)
   274  	case ssaop.OpLsh16x16:
   275  		return rewriteValue_OpLsh16x16(v)
   276  	case ssaop.OpLsh16x32:
   277  		return rewriteValue_OpLsh16x32(v)
   278  	case ssaop.OpLsh16x64:
   279  		return rewriteValue_OpLsh16x64(v)
   280  	case ssaop.OpLsh16x8:
   281  		return rewriteValue_OpLsh16x8(v)
   282  	case ssaop.OpLsh32x16:
   283  		return rewriteValue_OpLsh32x16(v)
   284  	case ssaop.OpLsh32x32:
   285  		return rewriteValue_OpLsh32x32(v)
   286  	case ssaop.OpLsh32x64:
   287  		return rewriteValue_OpLsh32x64(v)
   288  	case ssaop.OpLsh32x8:
   289  		return rewriteValue_OpLsh32x8(v)
   290  	case ssaop.OpLsh64x16:
   291  		return rewriteValue_OpLsh64x16(v)
   292  	case ssaop.OpLsh64x32:
   293  		return rewriteValue_OpLsh64x32(v)
   294  	case ssaop.OpLsh64x64:
   295  		return rewriteValue_OpLsh64x64(v)
   296  	case ssaop.OpLsh64x8:
   297  		return rewriteValue_OpLsh64x8(v)
   298  	case ssaop.OpLsh8x16:
   299  		return rewriteValue_OpLsh8x16(v)
   300  	case ssaop.OpLsh8x32:
   301  		return rewriteValue_OpLsh8x32(v)
   302  	case ssaop.OpLsh8x64:
   303  		return rewriteValue_OpLsh8x64(v)
   304  	case ssaop.OpLsh8x8:
   305  		return rewriteValue_OpLsh8x8(v)
   306  	case ssaop.OpMIPS64ADDV:
   307  		return rewriteValue_OpMIPS64ADDV(v)
   308  	case ssaop.OpMIPS64ADDVconst:
   309  		return rewriteValue_OpMIPS64ADDVconst(v)
   310  	case ssaop.OpMIPS64AND:
   311  		return rewriteValue_OpMIPS64AND(v)
   312  	case ssaop.OpMIPS64ANDconst:
   313  		return rewriteValue_OpMIPS64ANDconst(v)
   314  	case ssaop.OpMIPS64LoweredAtomicAdd32:
   315  		return rewriteValue_OpMIPS64LoweredAtomicAdd32(v)
   316  	case ssaop.OpMIPS64LoweredAtomicAdd64:
   317  		return rewriteValue_OpMIPS64LoweredAtomicAdd64(v)
   318  	case ssaop.OpMIPS64LoweredAtomicStore32:
   319  		return rewriteValue_OpMIPS64LoweredAtomicStore32(v)
   320  	case ssaop.OpMIPS64LoweredAtomicStore64:
   321  		return rewriteValue_OpMIPS64LoweredAtomicStore64(v)
   322  	case ssaop.OpMIPS64LoweredPanicBoundsCR:
   323  		return rewriteValue_OpMIPS64LoweredPanicBoundsCR(v)
   324  	case ssaop.OpMIPS64LoweredPanicBoundsRC:
   325  		return rewriteValue_OpMIPS64LoweredPanicBoundsRC(v)
   326  	case ssaop.OpMIPS64LoweredPanicBoundsRR:
   327  		return rewriteValue_OpMIPS64LoweredPanicBoundsRR(v)
   328  	case ssaop.OpMIPS64MOVBUload:
   329  		return rewriteValue_OpMIPS64MOVBUload(v)
   330  	case ssaop.OpMIPS64MOVBUreg:
   331  		return rewriteValue_OpMIPS64MOVBUreg(v)
   332  	case ssaop.OpMIPS64MOVBload:
   333  		return rewriteValue_OpMIPS64MOVBload(v)
   334  	case ssaop.OpMIPS64MOVBreg:
   335  		return rewriteValue_OpMIPS64MOVBreg(v)
   336  	case ssaop.OpMIPS64MOVBstore:
   337  		return rewriteValue_OpMIPS64MOVBstore(v)
   338  	case ssaop.OpMIPS64MOVDF:
   339  		return rewriteValue_OpMIPS64MOVDF(v)
   340  	case ssaop.OpMIPS64MOVDload:
   341  		return rewriteValue_OpMIPS64MOVDload(v)
   342  	case ssaop.OpMIPS64MOVDstore:
   343  		return rewriteValue_OpMIPS64MOVDstore(v)
   344  	case ssaop.OpMIPS64MOVFload:
   345  		return rewriteValue_OpMIPS64MOVFload(v)
   346  	case ssaop.OpMIPS64MOVFstore:
   347  		return rewriteValue_OpMIPS64MOVFstore(v)
   348  	case ssaop.OpMIPS64MOVHUload:
   349  		return rewriteValue_OpMIPS64MOVHUload(v)
   350  	case ssaop.OpMIPS64MOVHUreg:
   351  		return rewriteValue_OpMIPS64MOVHUreg(v)
   352  	case ssaop.OpMIPS64MOVHload:
   353  		return rewriteValue_OpMIPS64MOVHload(v)
   354  	case ssaop.OpMIPS64MOVHreg:
   355  		return rewriteValue_OpMIPS64MOVHreg(v)
   356  	case ssaop.OpMIPS64MOVHstore:
   357  		return rewriteValue_OpMIPS64MOVHstore(v)
   358  	case ssaop.OpMIPS64MOVVload:
   359  		return rewriteValue_OpMIPS64MOVVload(v)
   360  	case ssaop.OpMIPS64MOVVnop:
   361  		return rewriteValue_OpMIPS64MOVVnop(v)
   362  	case ssaop.OpMIPS64MOVVreg:
   363  		return rewriteValue_OpMIPS64MOVVreg(v)
   364  	case ssaop.OpMIPS64MOVVstore:
   365  		return rewriteValue_OpMIPS64MOVVstore(v)
   366  	case ssaop.OpMIPS64MOVWUload:
   367  		return rewriteValue_OpMIPS64MOVWUload(v)
   368  	case ssaop.OpMIPS64MOVWUreg:
   369  		return rewriteValue_OpMIPS64MOVWUreg(v)
   370  	case ssaop.OpMIPS64MOVWload:
   371  		return rewriteValue_OpMIPS64MOVWload(v)
   372  	case ssaop.OpMIPS64MOVWreg:
   373  		return rewriteValue_OpMIPS64MOVWreg(v)
   374  	case ssaop.OpMIPS64MOVWstore:
   375  		return rewriteValue_OpMIPS64MOVWstore(v)
   376  	case ssaop.OpMIPS64NEGV:
   377  		return rewriteValue_OpMIPS64NEGV(v)
   378  	case ssaop.OpMIPS64OR:
   379  		return rewriteValue_OpMIPS64OR(v)
   380  	case ssaop.OpMIPS64ORconst:
   381  		return rewriteValue_OpMIPS64ORconst(v)
   382  	case ssaop.OpMIPS64SGT:
   383  		return rewriteValue_OpMIPS64SGT(v)
   384  	case ssaop.OpMIPS64SGTU:
   385  		return rewriteValue_OpMIPS64SGTU(v)
   386  	case ssaop.OpMIPS64SGTUconst:
   387  		return rewriteValue_OpMIPS64SGTUconst(v)
   388  	case ssaop.OpMIPS64SGTconst:
   389  		return rewriteValue_OpMIPS64SGTconst(v)
   390  	case ssaop.OpMIPS64SLLV:
   391  		return rewriteValue_OpMIPS64SLLV(v)
   392  	case ssaop.OpMIPS64SLLVconst:
   393  		return rewriteValue_OpMIPS64SLLVconst(v)
   394  	case ssaop.OpMIPS64SRAV:
   395  		return rewriteValue_OpMIPS64SRAV(v)
   396  	case ssaop.OpMIPS64SRAVconst:
   397  		return rewriteValue_OpMIPS64SRAVconst(v)
   398  	case ssaop.OpMIPS64SRLV:
   399  		return rewriteValue_OpMIPS64SRLV(v)
   400  	case ssaop.OpMIPS64SRLVconst:
   401  		return rewriteValue_OpMIPS64SRLVconst(v)
   402  	case ssaop.OpMIPS64SUBV:
   403  		return rewriteValue_OpMIPS64SUBV(v)
   404  	case ssaop.OpMIPS64SUBVconst:
   405  		return rewriteValue_OpMIPS64SUBVconst(v)
   406  	case ssaop.OpMIPS64XOR:
   407  		return rewriteValue_OpMIPS64XOR(v)
   408  	case ssaop.OpMIPS64XORconst:
   409  		return rewriteValue_OpMIPS64XORconst(v)
   410  	case ssaop.OpMod16:
   411  		return rewriteValue_OpMod16(v)
   412  	case ssaop.OpMod16u:
   413  		return rewriteValue_OpMod16u(v)
   414  	case ssaop.OpMod32:
   415  		return rewriteValue_OpMod32(v)
   416  	case ssaop.OpMod32u:
   417  		return rewriteValue_OpMod32u(v)
   418  	case ssaop.OpMod64:
   419  		return rewriteValue_OpMod64(v)
   420  	case ssaop.OpMod64u:
   421  		return rewriteValue_OpMod64u(v)
   422  	case ssaop.OpMod8:
   423  		return rewriteValue_OpMod8(v)
   424  	case ssaop.OpMod8u:
   425  		return rewriteValue_OpMod8u(v)
   426  	case ssaop.OpMove:
   427  		return rewriteValue_OpMove(v)
   428  	case ssaop.OpMul16:
   429  		return rewriteValue_OpMul16(v)
   430  	case ssaop.OpMul32:
   431  		return rewriteValue_OpMul32(v)
   432  	case ssaop.OpMul32F:
   433  		v.Op = ssaop.OpMIPS64MULF
   434  		return true
   435  	case ssaop.OpMul64:
   436  		return rewriteValue_OpMul64(v)
   437  	case ssaop.OpMul64F:
   438  		v.Op = ssaop.OpMIPS64MULD
   439  		return true
   440  	case ssaop.OpMul64uhilo:
   441  		v.Op = ssaop.OpMIPS64MULVU
   442  		return true
   443  	case ssaop.OpMul8:
   444  		return rewriteValue_OpMul8(v)
   445  	case ssaop.OpNeg16:
   446  		v.Op = ssaop.OpMIPS64NEGV
   447  		return true
   448  	case ssaop.OpNeg32:
   449  		v.Op = ssaop.OpMIPS64NEGV
   450  		return true
   451  	case ssaop.OpNeg32F:
   452  		v.Op = ssaop.OpMIPS64NEGF
   453  		return true
   454  	case ssaop.OpNeg64:
   455  		v.Op = ssaop.OpMIPS64NEGV
   456  		return true
   457  	case ssaop.OpNeg64F:
   458  		v.Op = ssaop.OpMIPS64NEGD
   459  		return true
   460  	case ssaop.OpNeg8:
   461  		v.Op = ssaop.OpMIPS64NEGV
   462  		return true
   463  	case ssaop.OpNeq16:
   464  		return rewriteValue_OpNeq16(v)
   465  	case ssaop.OpNeq32:
   466  		return rewriteValue_OpNeq32(v)
   467  	case ssaop.OpNeq32F:
   468  		return rewriteValue_OpNeq32F(v)
   469  	case ssaop.OpNeq64:
   470  		return rewriteValue_OpNeq64(v)
   471  	case ssaop.OpNeq64F:
   472  		return rewriteValue_OpNeq64F(v)
   473  	case ssaop.OpNeq8:
   474  		return rewriteValue_OpNeq8(v)
   475  	case ssaop.OpNeqB:
   476  		v.Op = ssaop.OpMIPS64XOR
   477  		return true
   478  	case ssaop.OpNeqPtr:
   479  		return rewriteValue_OpNeqPtr(v)
   480  	case ssaop.OpNilCheck:
   481  		v.Op = ssaop.OpMIPS64LoweredNilCheck
   482  		return true
   483  	case ssaop.OpNot:
   484  		return rewriteValue_OpNot(v)
   485  	case ssaop.OpOffPtr:
   486  		return rewriteValue_OpOffPtr(v)
   487  	case ssaop.OpOr16:
   488  		v.Op = ssaop.OpMIPS64OR
   489  		return true
   490  	case ssaop.OpOr32:
   491  		v.Op = ssaop.OpMIPS64OR
   492  		return true
   493  	case ssaop.OpOr64:
   494  		v.Op = ssaop.OpMIPS64OR
   495  		return true
   496  	case ssaop.OpOr8:
   497  		v.Op = ssaop.OpMIPS64OR
   498  		return true
   499  	case ssaop.OpOrB:
   500  		v.Op = ssaop.OpMIPS64OR
   501  		return true
   502  	case ssaop.OpPanicBounds:
   503  		v.Op = ssaop.OpMIPS64LoweredPanicBoundsRR
   504  		return true
   505  	case ssaop.OpPubBarrier:
   506  		v.Op = ssaop.OpMIPS64LoweredPubBarrier
   507  		return true
   508  	case ssaop.OpRotateLeft16:
   509  		return rewriteValue_OpRotateLeft16(v)
   510  	case ssaop.OpRotateLeft32:
   511  		return rewriteValue_OpRotateLeft32(v)
   512  	case ssaop.OpRotateLeft64:
   513  		return rewriteValue_OpRotateLeft64(v)
   514  	case ssaop.OpRotateLeft8:
   515  		return rewriteValue_OpRotateLeft8(v)
   516  	case ssaop.OpRound32F:
   517  		v.Op = ssaop.OpCopy
   518  		return true
   519  	case ssaop.OpRound64F:
   520  		v.Op = ssaop.OpCopy
   521  		return true
   522  	case ssaop.OpRsh16Ux16:
   523  		return rewriteValue_OpRsh16Ux16(v)
   524  	case ssaop.OpRsh16Ux32:
   525  		return rewriteValue_OpRsh16Ux32(v)
   526  	case ssaop.OpRsh16Ux64:
   527  		return rewriteValue_OpRsh16Ux64(v)
   528  	case ssaop.OpRsh16Ux8:
   529  		return rewriteValue_OpRsh16Ux8(v)
   530  	case ssaop.OpRsh16x16:
   531  		return rewriteValue_OpRsh16x16(v)
   532  	case ssaop.OpRsh16x32:
   533  		return rewriteValue_OpRsh16x32(v)
   534  	case ssaop.OpRsh16x64:
   535  		return rewriteValue_OpRsh16x64(v)
   536  	case ssaop.OpRsh16x8:
   537  		return rewriteValue_OpRsh16x8(v)
   538  	case ssaop.OpRsh32Ux16:
   539  		return rewriteValue_OpRsh32Ux16(v)
   540  	case ssaop.OpRsh32Ux32:
   541  		return rewriteValue_OpRsh32Ux32(v)
   542  	case ssaop.OpRsh32Ux64:
   543  		return rewriteValue_OpRsh32Ux64(v)
   544  	case ssaop.OpRsh32Ux8:
   545  		return rewriteValue_OpRsh32Ux8(v)
   546  	case ssaop.OpRsh32x16:
   547  		return rewriteValue_OpRsh32x16(v)
   548  	case ssaop.OpRsh32x32:
   549  		return rewriteValue_OpRsh32x32(v)
   550  	case ssaop.OpRsh32x64:
   551  		return rewriteValue_OpRsh32x64(v)
   552  	case ssaop.OpRsh32x8:
   553  		return rewriteValue_OpRsh32x8(v)
   554  	case ssaop.OpRsh64Ux16:
   555  		return rewriteValue_OpRsh64Ux16(v)
   556  	case ssaop.OpRsh64Ux32:
   557  		return rewriteValue_OpRsh64Ux32(v)
   558  	case ssaop.OpRsh64Ux64:
   559  		return rewriteValue_OpRsh64Ux64(v)
   560  	case ssaop.OpRsh64Ux8:
   561  		return rewriteValue_OpRsh64Ux8(v)
   562  	case ssaop.OpRsh64x16:
   563  		return rewriteValue_OpRsh64x16(v)
   564  	case ssaop.OpRsh64x32:
   565  		return rewriteValue_OpRsh64x32(v)
   566  	case ssaop.OpRsh64x64:
   567  		return rewriteValue_OpRsh64x64(v)
   568  	case ssaop.OpRsh64x8:
   569  		return rewriteValue_OpRsh64x8(v)
   570  	case ssaop.OpRsh8Ux16:
   571  		return rewriteValue_OpRsh8Ux16(v)
   572  	case ssaop.OpRsh8Ux32:
   573  		return rewriteValue_OpRsh8Ux32(v)
   574  	case ssaop.OpRsh8Ux64:
   575  		return rewriteValue_OpRsh8Ux64(v)
   576  	case ssaop.OpRsh8Ux8:
   577  		return rewriteValue_OpRsh8Ux8(v)
   578  	case ssaop.OpRsh8x16:
   579  		return rewriteValue_OpRsh8x16(v)
   580  	case ssaop.OpRsh8x32:
   581  		return rewriteValue_OpRsh8x32(v)
   582  	case ssaop.OpRsh8x64:
   583  		return rewriteValue_OpRsh8x64(v)
   584  	case ssaop.OpRsh8x8:
   585  		return rewriteValue_OpRsh8x8(v)
   586  	case ssaop.OpSelect0:
   587  		return rewriteValue_OpSelect0(v)
   588  	case ssaop.OpSelect1:
   589  		return rewriteValue_OpSelect1(v)
   590  	case ssaop.OpSignExt16to32:
   591  		v.Op = ssaop.OpMIPS64MOVHreg
   592  		return true
   593  	case ssaop.OpSignExt16to64:
   594  		v.Op = ssaop.OpMIPS64MOVHreg
   595  		return true
   596  	case ssaop.OpSignExt32to64:
   597  		v.Op = ssaop.OpMIPS64MOVWreg
   598  		return true
   599  	case ssaop.OpSignExt8to16:
   600  		v.Op = ssaop.OpMIPS64MOVBreg
   601  		return true
   602  	case ssaop.OpSignExt8to32:
   603  		v.Op = ssaop.OpMIPS64MOVBreg
   604  		return true
   605  	case ssaop.OpSignExt8to64:
   606  		v.Op = ssaop.OpMIPS64MOVBreg
   607  		return true
   608  	case ssaop.OpSlicemask:
   609  		return rewriteValue_OpSlicemask(v)
   610  	case ssaop.OpSqrt:
   611  		v.Op = ssaop.OpMIPS64SQRTD
   612  		return true
   613  	case ssaop.OpSqrt32:
   614  		v.Op = ssaop.OpMIPS64SQRTF
   615  		return true
   616  	case ssaop.OpStaticCall:
   617  		v.Op = ssaop.OpMIPS64CALLstatic
   618  		return true
   619  	case ssaop.OpStore:
   620  		return rewriteValue_OpStore(v)
   621  	case ssaop.OpSub16:
   622  		v.Op = ssaop.OpMIPS64SUBV
   623  		return true
   624  	case ssaop.OpSub32:
   625  		v.Op = ssaop.OpMIPS64SUBV
   626  		return true
   627  	case ssaop.OpSub32F:
   628  		v.Op = ssaop.OpMIPS64SUBF
   629  		return true
   630  	case ssaop.OpSub64:
   631  		v.Op = ssaop.OpMIPS64SUBV
   632  		return true
   633  	case ssaop.OpSub64F:
   634  		v.Op = ssaop.OpMIPS64SUBD
   635  		return true
   636  	case ssaop.OpSub8:
   637  		v.Op = ssaop.OpMIPS64SUBV
   638  		return true
   639  	case ssaop.OpSubPtr:
   640  		v.Op = ssaop.OpMIPS64SUBV
   641  		return true
   642  	case ssaop.OpTailCall:
   643  		v.Op = ssaop.OpMIPS64CALLtail
   644  		return true
   645  	case ssaop.OpTailCallInter:
   646  		v.Op = ssaop.OpMIPS64CALLtailinter
   647  		return true
   648  	case ssaop.OpTrunc16to8:
   649  		v.Op = ssaop.OpCopy
   650  		return true
   651  	case ssaop.OpTrunc32to16:
   652  		v.Op = ssaop.OpCopy
   653  		return true
   654  	case ssaop.OpTrunc32to8:
   655  		v.Op = ssaop.OpCopy
   656  		return true
   657  	case ssaop.OpTrunc64to16:
   658  		v.Op = ssaop.OpCopy
   659  		return true
   660  	case ssaop.OpTrunc64to32:
   661  		v.Op = ssaop.OpCopy
   662  		return true
   663  	case ssaop.OpTrunc64to8:
   664  		v.Op = ssaop.OpCopy
   665  		return true
   666  	case ssaop.OpWB:
   667  		v.Op = ssaop.OpMIPS64LoweredWB
   668  		return true
   669  	case ssaop.OpXor16:
   670  		v.Op = ssaop.OpMIPS64XOR
   671  		return true
   672  	case ssaop.OpXor32:
   673  		v.Op = ssaop.OpMIPS64XOR
   674  		return true
   675  	case ssaop.OpXor64:
   676  		v.Op = ssaop.OpMIPS64XOR
   677  		return true
   678  	case ssaop.OpXor8:
   679  		v.Op = ssaop.OpMIPS64XOR
   680  		return true
   681  	case ssaop.OpZero:
   682  		return rewriteValue_OpZero(v)
   683  	case ssaop.OpZeroExt16to32:
   684  		v.Op = ssaop.OpMIPS64MOVHUreg
   685  		return true
   686  	case ssaop.OpZeroExt16to64:
   687  		v.Op = ssaop.OpMIPS64MOVHUreg
   688  		return true
   689  	case ssaop.OpZeroExt32to64:
   690  		v.Op = ssaop.OpMIPS64MOVWUreg
   691  		return true
   692  	case ssaop.OpZeroExt8to16:
   693  		v.Op = ssaop.OpMIPS64MOVBUreg
   694  		return true
   695  	case ssaop.OpZeroExt8to32:
   696  		v.Op = ssaop.OpMIPS64MOVBUreg
   697  		return true
   698  	case ssaop.OpZeroExt8to64:
   699  		v.Op = ssaop.OpMIPS64MOVBUreg
   700  		return true
   701  	}
   702  	return false
   703  }
   704  func rewriteValue_OpAddr(v *ssa.Value) bool {
   705  	v_0 := v.Args[0]
   706  	// match: (Addr {sym} base)
   707  	// result: (MOVVaddr {sym} base)
   708  	for {
   709  		sym := ssa.AuxToSym(v.Aux)
   710  		base := v_0
   711  		v.Reset(ssaop.OpMIPS64MOVVaddr)
   712  		v.Aux = ssa.SymToAux(sym)
   713  		v.AddArg(base)
   714  		return true
   715  	}
   716  }
   717  func rewriteValue_OpAtomicAnd8(v *ssa.Value) bool {
   718  	v_2 := v.Args[2]
   719  	v_1 := v.Args[1]
   720  	v_0 := v.Args[0]
   721  	b := v.Block
   722  	config := b.Func.Config
   723  	typ := &b.Func.Config.Types
   724  	// match: (AtomicAnd8 ptr val mem)
   725  	// cond: !config.BigEndian
   726  	// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))) (NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))))) mem)
   727  	for {
   728  		ptr := v_0
   729  		val := v_1
   730  		mem := v_2
   731  		if !(!config.BigEndian) {
   732  			break
   733  		}
   734  		v.Reset(ssaop.OpMIPS64LoweredAtomicAnd32)
   735  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64AND, typ.UInt32Ptr)
   736  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   737  		v1.AuxInt = ssa.Int64ToAuxInt(^3)
   738  		v0.AddArg2(v1, ptr)
   739  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, typ.UInt64)
   740  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt32)
   741  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
   742  		v4.AddArg(val)
   743  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLVconst, typ.UInt64)
   744  		v5.AuxInt = ssa.Int64ToAuxInt(3)
   745  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64ANDconst, typ.UInt64)
   746  		v6.AuxInt = ssa.Int64ToAuxInt(3)
   747  		v6.AddArg(ptr)
   748  		v5.AddArg(v6)
   749  		v3.AddArg2(v4, v5)
   750  		v7 := b.NewValue0(v.Pos, ssaop.OpMIPS64NOR, typ.UInt64)
   751  		v8 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   752  		v8.AuxInt = ssa.Int64ToAuxInt(0)
   753  		v9 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt64)
   754  		v10 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   755  		v10.AuxInt = ssa.Int64ToAuxInt(0xff)
   756  		v9.AddArg2(v10, v5)
   757  		v7.AddArg2(v8, v9)
   758  		v2.AddArg2(v3, v7)
   759  		v.AddArg3(v0, v2, mem)
   760  		return true
   761  	}
   762  	// match: (AtomicAnd8 ptr val mem)
   763  	// cond: config.BigEndian
   764  	// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))) (NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))))) mem)
   765  	for {
   766  		ptr := v_0
   767  		val := v_1
   768  		mem := v_2
   769  		if !(config.BigEndian) {
   770  			break
   771  		}
   772  		v.Reset(ssaop.OpMIPS64LoweredAtomicAnd32)
   773  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64AND, typ.UInt32Ptr)
   774  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   775  		v1.AuxInt = ssa.Int64ToAuxInt(^3)
   776  		v0.AddArg2(v1, ptr)
   777  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, typ.UInt64)
   778  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt32)
   779  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
   780  		v4.AddArg(val)
   781  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLVconst, typ.UInt64)
   782  		v5.AuxInt = ssa.Int64ToAuxInt(3)
   783  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64ANDconst, typ.UInt64)
   784  		v6.AuxInt = ssa.Int64ToAuxInt(3)
   785  		v7 := b.NewValue0(v.Pos, ssaop.OpMIPS64XORconst, typ.UInt64)
   786  		v7.AuxInt = ssa.Int64ToAuxInt(3)
   787  		v7.AddArg(ptr)
   788  		v6.AddArg(v7)
   789  		v5.AddArg(v6)
   790  		v3.AddArg2(v4, v5)
   791  		v8 := b.NewValue0(v.Pos, ssaop.OpMIPS64NOR, typ.UInt64)
   792  		v9 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   793  		v9.AuxInt = ssa.Int64ToAuxInt(0)
   794  		v10 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt64)
   795  		v11 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   796  		v11.AuxInt = ssa.Int64ToAuxInt(0xff)
   797  		v10.AddArg2(v11, v5)
   798  		v8.AddArg2(v9, v10)
   799  		v2.AddArg2(v3, v8)
   800  		v.AddArg3(v0, v2, mem)
   801  		return true
   802  	}
   803  	return false
   804  }
   805  func rewriteValue_OpAtomicCompareAndSwap32(v *ssa.Value) bool {
   806  	v_3 := v.Args[3]
   807  	v_2 := v.Args[2]
   808  	v_1 := v.Args[1]
   809  	v_0 := v.Args[0]
   810  	b := v.Block
   811  	typ := &b.Func.Config.Types
   812  	// match: (AtomicCompareAndSwap32 ptr old new mem)
   813  	// result: (LoweredAtomicCas32 ptr (SignExt32to64 old) new mem)
   814  	for {
   815  		ptr := v_0
   816  		old := v_1
   817  		new := v_2
   818  		mem := v_3
   819  		v.Reset(ssaop.OpMIPS64LoweredAtomicCas32)
   820  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
   821  		v0.AddArg(old)
   822  		v.AddArg4(ptr, v0, new, mem)
   823  		return true
   824  	}
   825  }
   826  func rewriteValue_OpAtomicOr8(v *ssa.Value) bool {
   827  	v_2 := v.Args[2]
   828  	v_1 := v.Args[1]
   829  	v_0 := v.Args[0]
   830  	b := v.Block
   831  	config := b.Func.Config
   832  	typ := &b.Func.Config.Types
   833  	// match: (AtomicOr8 ptr val mem)
   834  	// cond: !config.BigEndian
   835  	// result: (LoweredAtomicOr32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))) mem)
   836  	for {
   837  		ptr := v_0
   838  		val := v_1
   839  		mem := v_2
   840  		if !(!config.BigEndian) {
   841  			break
   842  		}
   843  		v.Reset(ssaop.OpMIPS64LoweredAtomicOr32)
   844  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64AND, typ.UInt32Ptr)
   845  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   846  		v1.AuxInt = ssa.Int64ToAuxInt(^3)
   847  		v0.AddArg2(v1, ptr)
   848  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt32)
   849  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
   850  		v3.AddArg(val)
   851  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLVconst, typ.UInt64)
   852  		v4.AuxInt = ssa.Int64ToAuxInt(3)
   853  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64ANDconst, typ.UInt64)
   854  		v5.AuxInt = ssa.Int64ToAuxInt(3)
   855  		v5.AddArg(ptr)
   856  		v4.AddArg(v5)
   857  		v2.AddArg2(v3, v4)
   858  		v.AddArg3(v0, v2, mem)
   859  		return true
   860  	}
   861  	// match: (AtomicOr8 ptr val mem)
   862  	// cond: config.BigEndian
   863  	// result: (LoweredAtomicOr32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))) mem)
   864  	for {
   865  		ptr := v_0
   866  		val := v_1
   867  		mem := v_2
   868  		if !(config.BigEndian) {
   869  			break
   870  		}
   871  		v.Reset(ssaop.OpMIPS64LoweredAtomicOr32)
   872  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64AND, typ.UInt32Ptr)
   873  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   874  		v1.AuxInt = ssa.Int64ToAuxInt(^3)
   875  		v0.AddArg2(v1, ptr)
   876  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt32)
   877  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
   878  		v3.AddArg(val)
   879  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLVconst, typ.UInt64)
   880  		v4.AuxInt = ssa.Int64ToAuxInt(3)
   881  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64ANDconst, typ.UInt64)
   882  		v5.AuxInt = ssa.Int64ToAuxInt(3)
   883  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64XORconst, typ.UInt64)
   884  		v6.AuxInt = ssa.Int64ToAuxInt(3)
   885  		v6.AddArg(ptr)
   886  		v5.AddArg(v6)
   887  		v4.AddArg(v5)
   888  		v2.AddArg2(v3, v4)
   889  		v.AddArg3(v0, v2, mem)
   890  		return true
   891  	}
   892  	return false
   893  }
   894  func rewriteValue_OpAvg64u(v *ssa.Value) bool {
   895  	v_1 := v.Args[1]
   896  	v_0 := v.Args[0]
   897  	b := v.Block
   898  	// match: (Avg64u <t> x y)
   899  	// result: (ADDV (SRLVconst <t> (SUBV <t> x y) [1]) y)
   900  	for {
   901  		t := v.Type
   902  		x := v_0
   903  		y := v_1
   904  		v.Reset(ssaop.OpMIPS64ADDV)
   905  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLVconst, t)
   906  		v0.AuxInt = ssa.Int64ToAuxInt(1)
   907  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SUBV, t)
   908  		v1.AddArg2(x, y)
   909  		v0.AddArg(v1)
   910  		v.AddArg2(v0, y)
   911  		return true
   912  	}
   913  }
   914  func rewriteValue_OpCom16(v *ssa.Value) bool {
   915  	v_0 := v.Args[0]
   916  	b := v.Block
   917  	typ := &b.Func.Config.Types
   918  	// match: (Com16 x)
   919  	// result: (NOR (MOVVconst [0]) x)
   920  	for {
   921  		x := v_0
   922  		v.Reset(ssaop.OpMIPS64NOR)
   923  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   924  		v0.AuxInt = ssa.Int64ToAuxInt(0)
   925  		v.AddArg2(v0, x)
   926  		return true
   927  	}
   928  }
   929  func rewriteValue_OpCom32(v *ssa.Value) bool {
   930  	v_0 := v.Args[0]
   931  	b := v.Block
   932  	typ := &b.Func.Config.Types
   933  	// match: (Com32 x)
   934  	// result: (NOR (MOVVconst [0]) x)
   935  	for {
   936  		x := v_0
   937  		v.Reset(ssaop.OpMIPS64NOR)
   938  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   939  		v0.AuxInt = ssa.Int64ToAuxInt(0)
   940  		v.AddArg2(v0, x)
   941  		return true
   942  	}
   943  }
   944  func rewriteValue_OpCom64(v *ssa.Value) bool {
   945  	v_0 := v.Args[0]
   946  	b := v.Block
   947  	typ := &b.Func.Config.Types
   948  	// match: (Com64 x)
   949  	// result: (NOR (MOVVconst [0]) x)
   950  	for {
   951  		x := v_0
   952  		v.Reset(ssaop.OpMIPS64NOR)
   953  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   954  		v0.AuxInt = ssa.Int64ToAuxInt(0)
   955  		v.AddArg2(v0, x)
   956  		return true
   957  	}
   958  }
   959  func rewriteValue_OpCom8(v *ssa.Value) bool {
   960  	v_0 := v.Args[0]
   961  	b := v.Block
   962  	typ := &b.Func.Config.Types
   963  	// match: (Com8 x)
   964  	// result: (NOR (MOVVconst [0]) x)
   965  	for {
   966  		x := v_0
   967  		v.Reset(ssaop.OpMIPS64NOR)
   968  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   969  		v0.AuxInt = ssa.Int64ToAuxInt(0)
   970  		v.AddArg2(v0, x)
   971  		return true
   972  	}
   973  }
   974  func rewriteValue_OpConst16(v *ssa.Value) bool {
   975  	// match: (Const16 [val])
   976  	// result: (MOVVconst [int64(val)])
   977  	for {
   978  		val := ssa.AuxIntToInt16(v.AuxInt)
   979  		v.Reset(ssaop.OpMIPS64MOVVconst)
   980  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
   981  		return true
   982  	}
   983  }
   984  func rewriteValue_OpConst32(v *ssa.Value) bool {
   985  	// match: (Const32 [val])
   986  	// result: (MOVVconst [int64(val)])
   987  	for {
   988  		val := ssa.AuxIntToInt32(v.AuxInt)
   989  		v.Reset(ssaop.OpMIPS64MOVVconst)
   990  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
   991  		return true
   992  	}
   993  }
   994  func rewriteValue_OpConst32F(v *ssa.Value) bool {
   995  	// match: (Const32F [val])
   996  	// result: (MOVFconst [float64(val)])
   997  	for {
   998  		val := ssa.AuxIntToFloat32(v.AuxInt)
   999  		v.Reset(ssaop.OpMIPS64MOVFconst)
  1000  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
  1001  		return true
  1002  	}
  1003  }
  1004  func rewriteValue_OpConst64(v *ssa.Value) bool {
  1005  	// match: (Const64 [val])
  1006  	// result: (MOVVconst [int64(val)])
  1007  	for {
  1008  		val := ssa.AuxIntToInt64(v.AuxInt)
  1009  		v.Reset(ssaop.OpMIPS64MOVVconst)
  1010  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
  1011  		return true
  1012  	}
  1013  }
  1014  func rewriteValue_OpConst64F(v *ssa.Value) bool {
  1015  	// match: (Const64F [val])
  1016  	// result: (MOVDconst [float64(val)])
  1017  	for {
  1018  		val := ssa.AuxIntToFloat64(v.AuxInt)
  1019  		v.Reset(ssaop.OpMIPS64MOVDconst)
  1020  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
  1021  		return true
  1022  	}
  1023  }
  1024  func rewriteValue_OpConst8(v *ssa.Value) bool {
  1025  	// match: (Const8 [val])
  1026  	// result: (MOVVconst [int64(val)])
  1027  	for {
  1028  		val := ssa.AuxIntToInt8(v.AuxInt)
  1029  		v.Reset(ssaop.OpMIPS64MOVVconst)
  1030  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
  1031  		return true
  1032  	}
  1033  }
  1034  func rewriteValue_OpConstBool(v *ssa.Value) bool {
  1035  	// match: (ConstBool [t])
  1036  	// result: (MOVVconst [int64(ssa.B2i(t))])
  1037  	for {
  1038  		t := ssa.AuxIntToBool(v.AuxInt)
  1039  		v.Reset(ssaop.OpMIPS64MOVVconst)
  1040  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.B2i(t)))
  1041  		return true
  1042  	}
  1043  }
  1044  func rewriteValue_OpConstNil(v *ssa.Value) bool {
  1045  	// match: (ConstNil)
  1046  	// result: (MOVVconst [0])
  1047  	for {
  1048  		v.Reset(ssaop.OpMIPS64MOVVconst)
  1049  		v.AuxInt = ssa.Int64ToAuxInt(0)
  1050  		return true
  1051  	}
  1052  }
  1053  func rewriteValue_OpDiv16(v *ssa.Value) bool {
  1054  	v_1 := v.Args[1]
  1055  	v_0 := v.Args[0]
  1056  	b := v.Block
  1057  	typ := &b.Func.Config.Types
  1058  	// match: (Div16 x y)
  1059  	// result: (Select1 (DIVV (SignExt16to64 x) (SignExt16to64 y)))
  1060  	for {
  1061  		x := v_0
  1062  		y := v_1
  1063  		v.Reset(ssaop.OpSelect1)
  1064  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1065  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1066  		v1.AddArg(x)
  1067  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1068  		v2.AddArg(y)
  1069  		v0.AddArg2(v1, v2)
  1070  		v.AddArg(v0)
  1071  		return true
  1072  	}
  1073  }
  1074  func rewriteValue_OpDiv16u(v *ssa.Value) bool {
  1075  	v_1 := v.Args[1]
  1076  	v_0 := v.Args[0]
  1077  	b := v.Block
  1078  	typ := &b.Func.Config.Types
  1079  	// match: (Div16u x y)
  1080  	// result: (Select1 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)))
  1081  	for {
  1082  		x := v_0
  1083  		y := v_1
  1084  		v.Reset(ssaop.OpSelect1)
  1085  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1086  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1087  		v1.AddArg(x)
  1088  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1089  		v2.AddArg(y)
  1090  		v0.AddArg2(v1, v2)
  1091  		v.AddArg(v0)
  1092  		return true
  1093  	}
  1094  }
  1095  func rewriteValue_OpDiv32(v *ssa.Value) bool {
  1096  	v_1 := v.Args[1]
  1097  	v_0 := v.Args[0]
  1098  	b := v.Block
  1099  	typ := &b.Func.Config.Types
  1100  	// match: (Div32 x y)
  1101  	// result: (Select1 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
  1102  	for {
  1103  		x := v_0
  1104  		y := v_1
  1105  		v.Reset(ssaop.OpSelect1)
  1106  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1107  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1108  		v1.AddArg(x)
  1109  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1110  		v2.AddArg(y)
  1111  		v0.AddArg2(v1, v2)
  1112  		v.AddArg(v0)
  1113  		return true
  1114  	}
  1115  }
  1116  func rewriteValue_OpDiv32u(v *ssa.Value) bool {
  1117  	v_1 := v.Args[1]
  1118  	v_0 := v.Args[0]
  1119  	b := v.Block
  1120  	typ := &b.Func.Config.Types
  1121  	// match: (Div32u x y)
  1122  	// result: (Select1 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)))
  1123  	for {
  1124  		x := v_0
  1125  		y := v_1
  1126  		v.Reset(ssaop.OpSelect1)
  1127  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1128  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1129  		v1.AddArg(x)
  1130  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1131  		v2.AddArg(y)
  1132  		v0.AddArg2(v1, v2)
  1133  		v.AddArg(v0)
  1134  		return true
  1135  	}
  1136  }
  1137  func rewriteValue_OpDiv64(v *ssa.Value) bool {
  1138  	v_1 := v.Args[1]
  1139  	v_0 := v.Args[0]
  1140  	b := v.Block
  1141  	typ := &b.Func.Config.Types
  1142  	// match: (Div64 x y)
  1143  	// result: (Select1 (DIVV x y))
  1144  	for {
  1145  		x := v_0
  1146  		y := v_1
  1147  		v.Reset(ssaop.OpSelect1)
  1148  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1149  		v0.AddArg2(x, y)
  1150  		v.AddArg(v0)
  1151  		return true
  1152  	}
  1153  }
  1154  func rewriteValue_OpDiv64u(v *ssa.Value) bool {
  1155  	v_1 := v.Args[1]
  1156  	v_0 := v.Args[0]
  1157  	b := v.Block
  1158  	typ := &b.Func.Config.Types
  1159  	// match: (Div64u x y)
  1160  	// result: (Select1 (DIVVU x y))
  1161  	for {
  1162  		x := v_0
  1163  		y := v_1
  1164  		v.Reset(ssaop.OpSelect1)
  1165  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1166  		v0.AddArg2(x, y)
  1167  		v.AddArg(v0)
  1168  		return true
  1169  	}
  1170  }
  1171  func rewriteValue_OpDiv8(v *ssa.Value) bool {
  1172  	v_1 := v.Args[1]
  1173  	v_0 := v.Args[0]
  1174  	b := v.Block
  1175  	typ := &b.Func.Config.Types
  1176  	// match: (Div8 x y)
  1177  	// result: (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
  1178  	for {
  1179  		x := v_0
  1180  		y := v_1
  1181  		v.Reset(ssaop.OpSelect1)
  1182  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1183  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1184  		v1.AddArg(x)
  1185  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1186  		v2.AddArg(y)
  1187  		v0.AddArg2(v1, v2)
  1188  		v.AddArg(v0)
  1189  		return true
  1190  	}
  1191  }
  1192  func rewriteValue_OpDiv8u(v *ssa.Value) bool {
  1193  	v_1 := v.Args[1]
  1194  	v_0 := v.Args[0]
  1195  	b := v.Block
  1196  	typ := &b.Func.Config.Types
  1197  	// match: (Div8u x y)
  1198  	// result: (Select1 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)))
  1199  	for {
  1200  		x := v_0
  1201  		y := v_1
  1202  		v.Reset(ssaop.OpSelect1)
  1203  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1204  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1205  		v1.AddArg(x)
  1206  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1207  		v2.AddArg(y)
  1208  		v0.AddArg2(v1, v2)
  1209  		v.AddArg(v0)
  1210  		return true
  1211  	}
  1212  }
  1213  func rewriteValue_OpEq16(v *ssa.Value) bool {
  1214  	v_1 := v.Args[1]
  1215  	v_0 := v.Args[0]
  1216  	b := v.Block
  1217  	typ := &b.Func.Config.Types
  1218  	// match: (Eq16 x y)
  1219  	// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt16to64 x) (ZeroExt16to64 y)))
  1220  	for {
  1221  		x := v_0
  1222  		y := v_1
  1223  		v.Reset(ssaop.OpMIPS64SGTU)
  1224  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1225  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1226  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1227  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1228  		v2.AddArg(x)
  1229  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1230  		v3.AddArg(y)
  1231  		v1.AddArg2(v2, v3)
  1232  		v.AddArg2(v0, v1)
  1233  		return true
  1234  	}
  1235  }
  1236  func rewriteValue_OpEq32(v *ssa.Value) bool {
  1237  	v_1 := v.Args[1]
  1238  	v_0 := v.Args[0]
  1239  	b := v.Block
  1240  	typ := &b.Func.Config.Types
  1241  	// match: (Eq32 x y)
  1242  	// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt32to64 x) (ZeroExt32to64 y)))
  1243  	for {
  1244  		x := v_0
  1245  		y := v_1
  1246  		v.Reset(ssaop.OpMIPS64SGTU)
  1247  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1248  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1249  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1250  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1251  		v2.AddArg(x)
  1252  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1253  		v3.AddArg(y)
  1254  		v1.AddArg2(v2, v3)
  1255  		v.AddArg2(v0, v1)
  1256  		return true
  1257  	}
  1258  }
  1259  func rewriteValue_OpEq32F(v *ssa.Value) bool {
  1260  	v_1 := v.Args[1]
  1261  	v_0 := v.Args[0]
  1262  	b := v.Block
  1263  	// match: (Eq32F x y)
  1264  	// result: (FPFlagTrue (CMPEQF x y))
  1265  	for {
  1266  		x := v_0
  1267  		y := v_1
  1268  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1269  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPEQF, types.TypeFlags)
  1270  		v0.AddArg2(x, y)
  1271  		v.AddArg(v0)
  1272  		return true
  1273  	}
  1274  }
  1275  func rewriteValue_OpEq64(v *ssa.Value) bool {
  1276  	v_1 := v.Args[1]
  1277  	v_0 := v.Args[0]
  1278  	b := v.Block
  1279  	typ := &b.Func.Config.Types
  1280  	// match: (Eq64 x y)
  1281  	// result: (SGTU (MOVVconst [1]) (XOR x y))
  1282  	for {
  1283  		x := v_0
  1284  		y := v_1
  1285  		v.Reset(ssaop.OpMIPS64SGTU)
  1286  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1287  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1288  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1289  		v1.AddArg2(x, y)
  1290  		v.AddArg2(v0, v1)
  1291  		return true
  1292  	}
  1293  }
  1294  func rewriteValue_OpEq64F(v *ssa.Value) bool {
  1295  	v_1 := v.Args[1]
  1296  	v_0 := v.Args[0]
  1297  	b := v.Block
  1298  	// match: (Eq64F x y)
  1299  	// result: (FPFlagTrue (CMPEQD x y))
  1300  	for {
  1301  		x := v_0
  1302  		y := v_1
  1303  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1304  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPEQD, types.TypeFlags)
  1305  		v0.AddArg2(x, y)
  1306  		v.AddArg(v0)
  1307  		return true
  1308  	}
  1309  }
  1310  func rewriteValue_OpEq8(v *ssa.Value) bool {
  1311  	v_1 := v.Args[1]
  1312  	v_0 := v.Args[0]
  1313  	b := v.Block
  1314  	typ := &b.Func.Config.Types
  1315  	// match: (Eq8 x y)
  1316  	// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt8to64 x) (ZeroExt8to64 y)))
  1317  	for {
  1318  		x := v_0
  1319  		y := v_1
  1320  		v.Reset(ssaop.OpMIPS64SGTU)
  1321  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1322  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1323  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1324  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1325  		v2.AddArg(x)
  1326  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1327  		v3.AddArg(y)
  1328  		v1.AddArg2(v2, v3)
  1329  		v.AddArg2(v0, v1)
  1330  		return true
  1331  	}
  1332  }
  1333  func rewriteValue_OpEqB(v *ssa.Value) bool {
  1334  	v_1 := v.Args[1]
  1335  	v_0 := v.Args[0]
  1336  	b := v.Block
  1337  	typ := &b.Func.Config.Types
  1338  	// match: (EqB x y)
  1339  	// result: (XOR (MOVVconst [1]) (XOR <typ.Bool> x y))
  1340  	for {
  1341  		x := v_0
  1342  		y := v_1
  1343  		v.Reset(ssaop.OpMIPS64XOR)
  1344  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1345  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1346  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.Bool)
  1347  		v1.AddArg2(x, y)
  1348  		v.AddArg2(v0, v1)
  1349  		return true
  1350  	}
  1351  }
  1352  func rewriteValue_OpEqPtr(v *ssa.Value) bool {
  1353  	v_1 := v.Args[1]
  1354  	v_0 := v.Args[0]
  1355  	b := v.Block
  1356  	typ := &b.Func.Config.Types
  1357  	// match: (EqPtr x y)
  1358  	// result: (SGTU (MOVVconst [1]) (XOR x y))
  1359  	for {
  1360  		x := v_0
  1361  		y := v_1
  1362  		v.Reset(ssaop.OpMIPS64SGTU)
  1363  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1364  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1365  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1366  		v1.AddArg2(x, y)
  1367  		v.AddArg2(v0, v1)
  1368  		return true
  1369  	}
  1370  }
  1371  func rewriteValue_OpHmul32(v *ssa.Value) bool {
  1372  	v_1 := v.Args[1]
  1373  	v_0 := v.Args[0]
  1374  	b := v.Block
  1375  	typ := &b.Func.Config.Types
  1376  	// match: (Hmul32 x y)
  1377  	// result: (SRAVconst (Select1 <typ.Int64> (MULV (SignExt32to64 x) (SignExt32to64 y))) [32])
  1378  	for {
  1379  		x := v_0
  1380  		y := v_1
  1381  		v.Reset(ssaop.OpMIPS64SRAVconst)
  1382  		v.AuxInt = ssa.Int64ToAuxInt(32)
  1383  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Int64)
  1384  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULV, types.NewTuple(typ.Int64, typ.Int64))
  1385  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1386  		v2.AddArg(x)
  1387  		v3 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1388  		v3.AddArg(y)
  1389  		v1.AddArg2(v2, v3)
  1390  		v0.AddArg(v1)
  1391  		v.AddArg(v0)
  1392  		return true
  1393  	}
  1394  }
  1395  func rewriteValue_OpHmul32u(v *ssa.Value) bool {
  1396  	v_1 := v.Args[1]
  1397  	v_0 := v.Args[0]
  1398  	b := v.Block
  1399  	typ := &b.Func.Config.Types
  1400  	// match: (Hmul32u x y)
  1401  	// result: (SRLVconst (Select1 <typ.UInt64> (MULVU (ZeroExt32to64 x) (ZeroExt32to64 y))) [32])
  1402  	for {
  1403  		x := v_0
  1404  		y := v_1
  1405  		v.Reset(ssaop.OpMIPS64SRLVconst)
  1406  		v.AuxInt = ssa.Int64ToAuxInt(32)
  1407  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.UInt64)
  1408  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1409  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1410  		v2.AddArg(x)
  1411  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1412  		v3.AddArg(y)
  1413  		v1.AddArg2(v2, v3)
  1414  		v0.AddArg(v1)
  1415  		v.AddArg(v0)
  1416  		return true
  1417  	}
  1418  }
  1419  func rewriteValue_OpHmul64(v *ssa.Value) bool {
  1420  	v_1 := v.Args[1]
  1421  	v_0 := v.Args[0]
  1422  	b := v.Block
  1423  	typ := &b.Func.Config.Types
  1424  	// match: (Hmul64 x y)
  1425  	// result: (Select0 (MULV x y))
  1426  	for {
  1427  		x := v_0
  1428  		y := v_1
  1429  		v.Reset(ssaop.OpSelect0)
  1430  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULV, types.NewTuple(typ.Int64, typ.Int64))
  1431  		v0.AddArg2(x, y)
  1432  		v.AddArg(v0)
  1433  		return true
  1434  	}
  1435  }
  1436  func rewriteValue_OpHmul64u(v *ssa.Value) bool {
  1437  	v_1 := v.Args[1]
  1438  	v_0 := v.Args[0]
  1439  	b := v.Block
  1440  	typ := &b.Func.Config.Types
  1441  	// match: (Hmul64u x y)
  1442  	// result: (Select0 (MULVU x y))
  1443  	for {
  1444  		x := v_0
  1445  		y := v_1
  1446  		v.Reset(ssaop.OpSelect0)
  1447  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1448  		v0.AddArg2(x, y)
  1449  		v.AddArg(v0)
  1450  		return true
  1451  	}
  1452  }
  1453  func rewriteValue_OpIsInBounds(v *ssa.Value) bool {
  1454  	v_1 := v.Args[1]
  1455  	v_0 := v.Args[0]
  1456  	// match: (IsInBounds idx len)
  1457  	// result: (SGTU len idx)
  1458  	for {
  1459  		idx := v_0
  1460  		len := v_1
  1461  		v.Reset(ssaop.OpMIPS64SGTU)
  1462  		v.AddArg2(len, idx)
  1463  		return true
  1464  	}
  1465  }
  1466  func rewriteValue_OpIsNonNil(v *ssa.Value) bool {
  1467  	v_0 := v.Args[0]
  1468  	b := v.Block
  1469  	typ := &b.Func.Config.Types
  1470  	// match: (IsNonNil ptr)
  1471  	// result: (SGTU ptr (MOVVconst [0]))
  1472  	for {
  1473  		ptr := v_0
  1474  		v.Reset(ssaop.OpMIPS64SGTU)
  1475  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1476  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  1477  		v.AddArg2(ptr, v0)
  1478  		return true
  1479  	}
  1480  }
  1481  func rewriteValue_OpIsSliceInBounds(v *ssa.Value) bool {
  1482  	v_1 := v.Args[1]
  1483  	v_0 := v.Args[0]
  1484  	b := v.Block
  1485  	typ := &b.Func.Config.Types
  1486  	// match: (IsSliceInBounds idx len)
  1487  	// result: (XOR (MOVVconst [1]) (SGTU idx len))
  1488  	for {
  1489  		idx := v_0
  1490  		len := v_1
  1491  		v.Reset(ssaop.OpMIPS64XOR)
  1492  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1493  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1494  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1495  		v1.AddArg2(idx, len)
  1496  		v.AddArg2(v0, v1)
  1497  		return true
  1498  	}
  1499  }
  1500  func rewriteValue_OpLeq16(v *ssa.Value) bool {
  1501  	v_1 := v.Args[1]
  1502  	v_0 := v.Args[0]
  1503  	b := v.Block
  1504  	typ := &b.Func.Config.Types
  1505  	// match: (Leq16 x y)
  1506  	// result: (XOR (MOVVconst [1]) (SGT (SignExt16to64 x) (SignExt16to64 y)))
  1507  	for {
  1508  		x := v_0
  1509  		y := v_1
  1510  		v.Reset(ssaop.OpMIPS64XOR)
  1511  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1512  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1513  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGT, typ.Bool)
  1514  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1515  		v2.AddArg(x)
  1516  		v3 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1517  		v3.AddArg(y)
  1518  		v1.AddArg2(v2, v3)
  1519  		v.AddArg2(v0, v1)
  1520  		return true
  1521  	}
  1522  }
  1523  func rewriteValue_OpLeq16U(v *ssa.Value) bool {
  1524  	v_1 := v.Args[1]
  1525  	v_0 := v.Args[0]
  1526  	b := v.Block
  1527  	typ := &b.Func.Config.Types
  1528  	// match: (Leq16U x y)
  1529  	// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt16to64 x) (ZeroExt16to64 y)))
  1530  	for {
  1531  		x := v_0
  1532  		y := v_1
  1533  		v.Reset(ssaop.OpMIPS64XOR)
  1534  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1535  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1536  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1537  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1538  		v2.AddArg(x)
  1539  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1540  		v3.AddArg(y)
  1541  		v1.AddArg2(v2, v3)
  1542  		v.AddArg2(v0, v1)
  1543  		return true
  1544  	}
  1545  }
  1546  func rewriteValue_OpLeq32(v *ssa.Value) bool {
  1547  	v_1 := v.Args[1]
  1548  	v_0 := v.Args[0]
  1549  	b := v.Block
  1550  	typ := &b.Func.Config.Types
  1551  	// match: (Leq32 x y)
  1552  	// result: (XOR (MOVVconst [1]) (SGT (SignExt32to64 x) (SignExt32to64 y)))
  1553  	for {
  1554  		x := v_0
  1555  		y := v_1
  1556  		v.Reset(ssaop.OpMIPS64XOR)
  1557  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1558  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1559  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGT, typ.Bool)
  1560  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1561  		v2.AddArg(x)
  1562  		v3 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1563  		v3.AddArg(y)
  1564  		v1.AddArg2(v2, v3)
  1565  		v.AddArg2(v0, v1)
  1566  		return true
  1567  	}
  1568  }
  1569  func rewriteValue_OpLeq32F(v *ssa.Value) bool {
  1570  	v_1 := v.Args[1]
  1571  	v_0 := v.Args[0]
  1572  	b := v.Block
  1573  	// match: (Leq32F x y)
  1574  	// result: (FPFlagTrue (CMPGEF y x))
  1575  	for {
  1576  		x := v_0
  1577  		y := v_1
  1578  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1579  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPGEF, types.TypeFlags)
  1580  		v0.AddArg2(y, x)
  1581  		v.AddArg(v0)
  1582  		return true
  1583  	}
  1584  }
  1585  func rewriteValue_OpLeq32U(v *ssa.Value) bool {
  1586  	v_1 := v.Args[1]
  1587  	v_0 := v.Args[0]
  1588  	b := v.Block
  1589  	typ := &b.Func.Config.Types
  1590  	// match: (Leq32U x y)
  1591  	// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt32to64 x) (ZeroExt32to64 y)))
  1592  	for {
  1593  		x := v_0
  1594  		y := v_1
  1595  		v.Reset(ssaop.OpMIPS64XOR)
  1596  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1597  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1598  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1599  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1600  		v2.AddArg(x)
  1601  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1602  		v3.AddArg(y)
  1603  		v1.AddArg2(v2, v3)
  1604  		v.AddArg2(v0, v1)
  1605  		return true
  1606  	}
  1607  }
  1608  func rewriteValue_OpLeq64(v *ssa.Value) bool {
  1609  	v_1 := v.Args[1]
  1610  	v_0 := v.Args[0]
  1611  	b := v.Block
  1612  	typ := &b.Func.Config.Types
  1613  	// match: (Leq64 x y)
  1614  	// result: (XOR (MOVVconst [1]) (SGT x y))
  1615  	for {
  1616  		x := v_0
  1617  		y := v_1
  1618  		v.Reset(ssaop.OpMIPS64XOR)
  1619  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1620  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1621  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGT, typ.Bool)
  1622  		v1.AddArg2(x, y)
  1623  		v.AddArg2(v0, v1)
  1624  		return true
  1625  	}
  1626  }
  1627  func rewriteValue_OpLeq64F(v *ssa.Value) bool {
  1628  	v_1 := v.Args[1]
  1629  	v_0 := v.Args[0]
  1630  	b := v.Block
  1631  	// match: (Leq64F x y)
  1632  	// result: (FPFlagTrue (CMPGED y x))
  1633  	for {
  1634  		x := v_0
  1635  		y := v_1
  1636  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1637  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPGED, types.TypeFlags)
  1638  		v0.AddArg2(y, x)
  1639  		v.AddArg(v0)
  1640  		return true
  1641  	}
  1642  }
  1643  func rewriteValue_OpLeq64U(v *ssa.Value) bool {
  1644  	v_1 := v.Args[1]
  1645  	v_0 := v.Args[0]
  1646  	b := v.Block
  1647  	typ := &b.Func.Config.Types
  1648  	// match: (Leq64U x y)
  1649  	// result: (XOR (MOVVconst [1]) (SGTU x y))
  1650  	for {
  1651  		x := v_0
  1652  		y := v_1
  1653  		v.Reset(ssaop.OpMIPS64XOR)
  1654  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1655  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1656  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1657  		v1.AddArg2(x, y)
  1658  		v.AddArg2(v0, v1)
  1659  		return true
  1660  	}
  1661  }
  1662  func rewriteValue_OpLeq8(v *ssa.Value) bool {
  1663  	v_1 := v.Args[1]
  1664  	v_0 := v.Args[0]
  1665  	b := v.Block
  1666  	typ := &b.Func.Config.Types
  1667  	// match: (Leq8 x y)
  1668  	// result: (XOR (MOVVconst [1]) (SGT (SignExt8to64 x) (SignExt8to64 y)))
  1669  	for {
  1670  		x := v_0
  1671  		y := v_1
  1672  		v.Reset(ssaop.OpMIPS64XOR)
  1673  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1674  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1675  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGT, typ.Bool)
  1676  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1677  		v2.AddArg(x)
  1678  		v3 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1679  		v3.AddArg(y)
  1680  		v1.AddArg2(v2, v3)
  1681  		v.AddArg2(v0, v1)
  1682  		return true
  1683  	}
  1684  }
  1685  func rewriteValue_OpLeq8U(v *ssa.Value) bool {
  1686  	v_1 := v.Args[1]
  1687  	v_0 := v.Args[0]
  1688  	b := v.Block
  1689  	typ := &b.Func.Config.Types
  1690  	// match: (Leq8U x y)
  1691  	// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt8to64 x) (ZeroExt8to64 y)))
  1692  	for {
  1693  		x := v_0
  1694  		y := v_1
  1695  		v.Reset(ssaop.OpMIPS64XOR)
  1696  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1697  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1698  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1699  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1700  		v2.AddArg(x)
  1701  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1702  		v3.AddArg(y)
  1703  		v1.AddArg2(v2, v3)
  1704  		v.AddArg2(v0, v1)
  1705  		return true
  1706  	}
  1707  }
  1708  func rewriteValue_OpLess16(v *ssa.Value) bool {
  1709  	v_1 := v.Args[1]
  1710  	v_0 := v.Args[0]
  1711  	b := v.Block
  1712  	typ := &b.Func.Config.Types
  1713  	// match: (Less16 x y)
  1714  	// result: (SGT (SignExt16to64 y) (SignExt16to64 x))
  1715  	for {
  1716  		x := v_0
  1717  		y := v_1
  1718  		v.Reset(ssaop.OpMIPS64SGT)
  1719  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1720  		v0.AddArg(y)
  1721  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1722  		v1.AddArg(x)
  1723  		v.AddArg2(v0, v1)
  1724  		return true
  1725  	}
  1726  }
  1727  func rewriteValue_OpLess16U(v *ssa.Value) bool {
  1728  	v_1 := v.Args[1]
  1729  	v_0 := v.Args[0]
  1730  	b := v.Block
  1731  	typ := &b.Func.Config.Types
  1732  	// match: (Less16U x y)
  1733  	// result: (SGTU (ZeroExt16to64 y) (ZeroExt16to64 x))
  1734  	for {
  1735  		x := v_0
  1736  		y := v_1
  1737  		v.Reset(ssaop.OpMIPS64SGTU)
  1738  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1739  		v0.AddArg(y)
  1740  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1741  		v1.AddArg(x)
  1742  		v.AddArg2(v0, v1)
  1743  		return true
  1744  	}
  1745  }
  1746  func rewriteValue_OpLess32(v *ssa.Value) bool {
  1747  	v_1 := v.Args[1]
  1748  	v_0 := v.Args[0]
  1749  	b := v.Block
  1750  	typ := &b.Func.Config.Types
  1751  	// match: (Less32 x y)
  1752  	// result: (SGT (SignExt32to64 y) (SignExt32to64 x))
  1753  	for {
  1754  		x := v_0
  1755  		y := v_1
  1756  		v.Reset(ssaop.OpMIPS64SGT)
  1757  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1758  		v0.AddArg(y)
  1759  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1760  		v1.AddArg(x)
  1761  		v.AddArg2(v0, v1)
  1762  		return true
  1763  	}
  1764  }
  1765  func rewriteValue_OpLess32F(v *ssa.Value) bool {
  1766  	v_1 := v.Args[1]
  1767  	v_0 := v.Args[0]
  1768  	b := v.Block
  1769  	// match: (Less32F x y)
  1770  	// result: (FPFlagTrue (CMPGTF y x))
  1771  	for {
  1772  		x := v_0
  1773  		y := v_1
  1774  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1775  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPGTF, types.TypeFlags)
  1776  		v0.AddArg2(y, x)
  1777  		v.AddArg(v0)
  1778  		return true
  1779  	}
  1780  }
  1781  func rewriteValue_OpLess32U(v *ssa.Value) bool {
  1782  	v_1 := v.Args[1]
  1783  	v_0 := v.Args[0]
  1784  	b := v.Block
  1785  	typ := &b.Func.Config.Types
  1786  	// match: (Less32U x y)
  1787  	// result: (SGTU (ZeroExt32to64 y) (ZeroExt32to64 x))
  1788  	for {
  1789  		x := v_0
  1790  		y := v_1
  1791  		v.Reset(ssaop.OpMIPS64SGTU)
  1792  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1793  		v0.AddArg(y)
  1794  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1795  		v1.AddArg(x)
  1796  		v.AddArg2(v0, v1)
  1797  		return true
  1798  	}
  1799  }
  1800  func rewriteValue_OpLess64(v *ssa.Value) bool {
  1801  	v_1 := v.Args[1]
  1802  	v_0 := v.Args[0]
  1803  	// match: (Less64 x y)
  1804  	// result: (SGT y x)
  1805  	for {
  1806  		x := v_0
  1807  		y := v_1
  1808  		v.Reset(ssaop.OpMIPS64SGT)
  1809  		v.AddArg2(y, x)
  1810  		return true
  1811  	}
  1812  }
  1813  func rewriteValue_OpLess64F(v *ssa.Value) bool {
  1814  	v_1 := v.Args[1]
  1815  	v_0 := v.Args[0]
  1816  	b := v.Block
  1817  	// match: (Less64F x y)
  1818  	// result: (FPFlagTrue (CMPGTD y x))
  1819  	for {
  1820  		x := v_0
  1821  		y := v_1
  1822  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1823  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPGTD, types.TypeFlags)
  1824  		v0.AddArg2(y, x)
  1825  		v.AddArg(v0)
  1826  		return true
  1827  	}
  1828  }
  1829  func rewriteValue_OpLess64U(v *ssa.Value) bool {
  1830  	v_1 := v.Args[1]
  1831  	v_0 := v.Args[0]
  1832  	// match: (Less64U x y)
  1833  	// result: (SGTU y x)
  1834  	for {
  1835  		x := v_0
  1836  		y := v_1
  1837  		v.Reset(ssaop.OpMIPS64SGTU)
  1838  		v.AddArg2(y, x)
  1839  		return true
  1840  	}
  1841  }
  1842  func rewriteValue_OpLess8(v *ssa.Value) bool {
  1843  	v_1 := v.Args[1]
  1844  	v_0 := v.Args[0]
  1845  	b := v.Block
  1846  	typ := &b.Func.Config.Types
  1847  	// match: (Less8 x y)
  1848  	// result: (SGT (SignExt8to64 y) (SignExt8to64 x))
  1849  	for {
  1850  		x := v_0
  1851  		y := v_1
  1852  		v.Reset(ssaop.OpMIPS64SGT)
  1853  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1854  		v0.AddArg(y)
  1855  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1856  		v1.AddArg(x)
  1857  		v.AddArg2(v0, v1)
  1858  		return true
  1859  	}
  1860  }
  1861  func rewriteValue_OpLess8U(v *ssa.Value) bool {
  1862  	v_1 := v.Args[1]
  1863  	v_0 := v.Args[0]
  1864  	b := v.Block
  1865  	typ := &b.Func.Config.Types
  1866  	// match: (Less8U x y)
  1867  	// result: (SGTU (ZeroExt8to64 y) (ZeroExt8to64 x))
  1868  	for {
  1869  		x := v_0
  1870  		y := v_1
  1871  		v.Reset(ssaop.OpMIPS64SGTU)
  1872  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1873  		v0.AddArg(y)
  1874  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1875  		v1.AddArg(x)
  1876  		v.AddArg2(v0, v1)
  1877  		return true
  1878  	}
  1879  }
  1880  func rewriteValue_OpLoad(v *ssa.Value) bool {
  1881  	v_1 := v.Args[1]
  1882  	v_0 := v.Args[0]
  1883  	// match: (Load <t> ptr mem)
  1884  	// cond: t.IsBoolean()
  1885  	// result: (MOVBUload ptr mem)
  1886  	for {
  1887  		t := v.Type
  1888  		ptr := v_0
  1889  		mem := v_1
  1890  		if !(t.IsBoolean()) {
  1891  			break
  1892  		}
  1893  		v.Reset(ssaop.OpMIPS64MOVBUload)
  1894  		v.AddArg2(ptr, mem)
  1895  		return true
  1896  	}
  1897  	// match: (Load <t> ptr mem)
  1898  	// cond: (ssa.Is8BitInt(t) && t.IsSigned())
  1899  	// result: (MOVBload ptr mem)
  1900  	for {
  1901  		t := v.Type
  1902  		ptr := v_0
  1903  		mem := v_1
  1904  		if !(ssa.Is8BitInt(t) && t.IsSigned()) {
  1905  			break
  1906  		}
  1907  		v.Reset(ssaop.OpMIPS64MOVBload)
  1908  		v.AddArg2(ptr, mem)
  1909  		return true
  1910  	}
  1911  	// match: (Load <t> ptr mem)
  1912  	// cond: (ssa.Is8BitInt(t) && !t.IsSigned())
  1913  	// result: (MOVBUload ptr mem)
  1914  	for {
  1915  		t := v.Type
  1916  		ptr := v_0
  1917  		mem := v_1
  1918  		if !(ssa.Is8BitInt(t) && !t.IsSigned()) {
  1919  			break
  1920  		}
  1921  		v.Reset(ssaop.OpMIPS64MOVBUload)
  1922  		v.AddArg2(ptr, mem)
  1923  		return true
  1924  	}
  1925  	// match: (Load <t> ptr mem)
  1926  	// cond: (ssa.Is16BitInt(t) && t.IsSigned())
  1927  	// result: (MOVHload ptr mem)
  1928  	for {
  1929  		t := v.Type
  1930  		ptr := v_0
  1931  		mem := v_1
  1932  		if !(ssa.Is16BitInt(t) && t.IsSigned()) {
  1933  			break
  1934  		}
  1935  		v.Reset(ssaop.OpMIPS64MOVHload)
  1936  		v.AddArg2(ptr, mem)
  1937  		return true
  1938  	}
  1939  	// match: (Load <t> ptr mem)
  1940  	// cond: (ssa.Is16BitInt(t) && !t.IsSigned())
  1941  	// result: (MOVHUload ptr mem)
  1942  	for {
  1943  		t := v.Type
  1944  		ptr := v_0
  1945  		mem := v_1
  1946  		if !(ssa.Is16BitInt(t) && !t.IsSigned()) {
  1947  			break
  1948  		}
  1949  		v.Reset(ssaop.OpMIPS64MOVHUload)
  1950  		v.AddArg2(ptr, mem)
  1951  		return true
  1952  	}
  1953  	// match: (Load <t> ptr mem)
  1954  	// cond: (ssa.Is32BitInt(t) && t.IsSigned())
  1955  	// result: (MOVWload ptr mem)
  1956  	for {
  1957  		t := v.Type
  1958  		ptr := v_0
  1959  		mem := v_1
  1960  		if !(ssa.Is32BitInt(t) && t.IsSigned()) {
  1961  			break
  1962  		}
  1963  		v.Reset(ssaop.OpMIPS64MOVWload)
  1964  		v.AddArg2(ptr, mem)
  1965  		return true
  1966  	}
  1967  	// match: (Load <t> ptr mem)
  1968  	// cond: (ssa.Is32BitInt(t) && !t.IsSigned())
  1969  	// result: (MOVWUload ptr mem)
  1970  	for {
  1971  		t := v.Type
  1972  		ptr := v_0
  1973  		mem := v_1
  1974  		if !(ssa.Is32BitInt(t) && !t.IsSigned()) {
  1975  			break
  1976  		}
  1977  		v.Reset(ssaop.OpMIPS64MOVWUload)
  1978  		v.AddArg2(ptr, mem)
  1979  		return true
  1980  	}
  1981  	// match: (Load <t> ptr mem)
  1982  	// cond: (ssa.Is64BitInt(t) ||ssa.IsPtr(t))
  1983  	// result: (MOVVload ptr mem)
  1984  	for {
  1985  		t := v.Type
  1986  		ptr := v_0
  1987  		mem := v_1
  1988  		if !(ssa.Is64BitInt(t) || ssa.IsPtr(t)) {
  1989  			break
  1990  		}
  1991  		v.Reset(ssaop.OpMIPS64MOVVload)
  1992  		v.AddArg2(ptr, mem)
  1993  		return true
  1994  	}
  1995  	// match: (Load <t> ptr mem)
  1996  	// cond: ssa.Is32BitFloat(t)
  1997  	// result: (MOVFload ptr mem)
  1998  	for {
  1999  		t := v.Type
  2000  		ptr := v_0
  2001  		mem := v_1
  2002  		if !(ssa.Is32BitFloat(t)) {
  2003  			break
  2004  		}
  2005  		v.Reset(ssaop.OpMIPS64MOVFload)
  2006  		v.AddArg2(ptr, mem)
  2007  		return true
  2008  	}
  2009  	// match: (Load <t> ptr mem)
  2010  	// cond: ssa.Is64BitFloat(t)
  2011  	// result: (MOVDload ptr mem)
  2012  	for {
  2013  		t := v.Type
  2014  		ptr := v_0
  2015  		mem := v_1
  2016  		if !(ssa.Is64BitFloat(t)) {
  2017  			break
  2018  		}
  2019  		v.Reset(ssaop.OpMIPS64MOVDload)
  2020  		v.AddArg2(ptr, mem)
  2021  		return true
  2022  	}
  2023  	return false
  2024  }
  2025  func rewriteValue_OpLocalAddr(v *ssa.Value) bool {
  2026  	v_1 := v.Args[1]
  2027  	v_0 := v.Args[0]
  2028  	b := v.Block
  2029  	typ := &b.Func.Config.Types
  2030  	// match: (LocalAddr <t> {sym} base mem)
  2031  	// cond: t.Elem().HasPointers()
  2032  	// result: (MOVVaddr {sym} (SPanchored base mem))
  2033  	for {
  2034  		t := v.Type
  2035  		sym := ssa.AuxToSym(v.Aux)
  2036  		base := v_0
  2037  		mem := v_1
  2038  		if !(t.Elem().HasPointers()) {
  2039  			break
  2040  		}
  2041  		v.Reset(ssaop.OpMIPS64MOVVaddr)
  2042  		v.Aux = ssa.SymToAux(sym)
  2043  		v0 := b.NewValue0(v.Pos, ssaop.OpSPanchored, typ.Uintptr)
  2044  		v0.AddArg2(base, mem)
  2045  		v.AddArg(v0)
  2046  		return true
  2047  	}
  2048  	// match: (LocalAddr <t> {sym} base _)
  2049  	// cond: !t.Elem().HasPointers()
  2050  	// result: (MOVVaddr {sym} base)
  2051  	for {
  2052  		t := v.Type
  2053  		sym := ssa.AuxToSym(v.Aux)
  2054  		base := v_0
  2055  		if !(!t.Elem().HasPointers()) {
  2056  			break
  2057  		}
  2058  		v.Reset(ssaop.OpMIPS64MOVVaddr)
  2059  		v.Aux = ssa.SymToAux(sym)
  2060  		v.AddArg(base)
  2061  		return true
  2062  	}
  2063  	return false
  2064  }
  2065  func rewriteValue_OpLsh16x16(v *ssa.Value) bool {
  2066  	v_1 := v.Args[1]
  2067  	v_0 := v.Args[0]
  2068  	b := v.Block
  2069  	typ := &b.Func.Config.Types
  2070  	// match: (Lsh16x16 x y)
  2071  	// cond: ssa.ShiftIsBounded(v)
  2072  	// result: (SLLV x y)
  2073  	for {
  2074  		x := v_0
  2075  		y := v_1
  2076  		if !(ssa.ShiftIsBounded(v)) {
  2077  			break
  2078  		}
  2079  		v.Reset(ssaop.OpMIPS64SLLV)
  2080  		v.AddArg2(x, y)
  2081  		return true
  2082  	}
  2083  	// match: (Lsh16x16 <t> x y)
  2084  	// cond: !ssa.ShiftIsBounded(v)
  2085  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2086  	for {
  2087  		t := v.Type
  2088  		x := v_0
  2089  		y := v_1
  2090  		if !(!ssa.ShiftIsBounded(v)) {
  2091  			break
  2092  		}
  2093  		v.Reset(ssaop.OpMIPS64AND)
  2094  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2095  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2096  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2097  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2098  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  2099  		v3.AddArg(y)
  2100  		v1.AddArg2(v2, v3)
  2101  		v0.AddArg(v1)
  2102  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2103  		v4.AddArg2(x, v3)
  2104  		v.AddArg2(v0, v4)
  2105  		return true
  2106  	}
  2107  	return false
  2108  }
  2109  func rewriteValue_OpLsh16x32(v *ssa.Value) bool {
  2110  	v_1 := v.Args[1]
  2111  	v_0 := v.Args[0]
  2112  	b := v.Block
  2113  	typ := &b.Func.Config.Types
  2114  	// match: (Lsh16x32 x y)
  2115  	// cond: ssa.ShiftIsBounded(v)
  2116  	// result: (SLLV x y)
  2117  	for {
  2118  		x := v_0
  2119  		y := v_1
  2120  		if !(ssa.ShiftIsBounded(v)) {
  2121  			break
  2122  		}
  2123  		v.Reset(ssaop.OpMIPS64SLLV)
  2124  		v.AddArg2(x, y)
  2125  		return true
  2126  	}
  2127  	// match: (Lsh16x32 <t> x y)
  2128  	// cond: !ssa.ShiftIsBounded(v)
  2129  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2130  	for {
  2131  		t := v.Type
  2132  		x := v_0
  2133  		y := v_1
  2134  		if !(!ssa.ShiftIsBounded(v)) {
  2135  			break
  2136  		}
  2137  		v.Reset(ssaop.OpMIPS64AND)
  2138  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2139  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2140  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2141  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2142  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  2143  		v3.AddArg(y)
  2144  		v1.AddArg2(v2, v3)
  2145  		v0.AddArg(v1)
  2146  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2147  		v4.AddArg2(x, v3)
  2148  		v.AddArg2(v0, v4)
  2149  		return true
  2150  	}
  2151  	return false
  2152  }
  2153  func rewriteValue_OpLsh16x64(v *ssa.Value) bool {
  2154  	v_1 := v.Args[1]
  2155  	v_0 := v.Args[0]
  2156  	b := v.Block
  2157  	typ := &b.Func.Config.Types
  2158  	// match: (Lsh16x64 x y)
  2159  	// cond: ssa.ShiftIsBounded(v)
  2160  	// result: (SLLV x y)
  2161  	for {
  2162  		x := v_0
  2163  		y := v_1
  2164  		if !(ssa.ShiftIsBounded(v)) {
  2165  			break
  2166  		}
  2167  		v.Reset(ssaop.OpMIPS64SLLV)
  2168  		v.AddArg2(x, y)
  2169  		return true
  2170  	}
  2171  	// match: (Lsh16x64 <t> x y)
  2172  	// cond: !ssa.ShiftIsBounded(v)
  2173  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2174  	for {
  2175  		t := v.Type
  2176  		x := v_0
  2177  		y := v_1
  2178  		if !(!ssa.ShiftIsBounded(v)) {
  2179  			break
  2180  		}
  2181  		v.Reset(ssaop.OpMIPS64AND)
  2182  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2183  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2184  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2185  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2186  		v1.AddArg2(v2, y)
  2187  		v0.AddArg(v1)
  2188  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2189  		v3.AddArg2(x, y)
  2190  		v.AddArg2(v0, v3)
  2191  		return true
  2192  	}
  2193  	return false
  2194  }
  2195  func rewriteValue_OpLsh16x8(v *ssa.Value) bool {
  2196  	v_1 := v.Args[1]
  2197  	v_0 := v.Args[0]
  2198  	b := v.Block
  2199  	typ := &b.Func.Config.Types
  2200  	// match: (Lsh16x8 x y)
  2201  	// cond: ssa.ShiftIsBounded(v)
  2202  	// result: (SLLV x y)
  2203  	for {
  2204  		x := v_0
  2205  		y := v_1
  2206  		if !(ssa.ShiftIsBounded(v)) {
  2207  			break
  2208  		}
  2209  		v.Reset(ssaop.OpMIPS64SLLV)
  2210  		v.AddArg2(x, y)
  2211  		return true
  2212  	}
  2213  	// match: (Lsh16x8 <t> x y)
  2214  	// cond: !ssa.ShiftIsBounded(v)
  2215  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2216  	for {
  2217  		t := v.Type
  2218  		x := v_0
  2219  		y := v_1
  2220  		if !(!ssa.ShiftIsBounded(v)) {
  2221  			break
  2222  		}
  2223  		v.Reset(ssaop.OpMIPS64AND)
  2224  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2225  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2226  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2227  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2228  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  2229  		v3.AddArg(y)
  2230  		v1.AddArg2(v2, v3)
  2231  		v0.AddArg(v1)
  2232  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2233  		v4.AddArg2(x, v3)
  2234  		v.AddArg2(v0, v4)
  2235  		return true
  2236  	}
  2237  	return false
  2238  }
  2239  func rewriteValue_OpLsh32x16(v *ssa.Value) bool {
  2240  	v_1 := v.Args[1]
  2241  	v_0 := v.Args[0]
  2242  	b := v.Block
  2243  	typ := &b.Func.Config.Types
  2244  	// match: (Lsh32x16 x y)
  2245  	// cond: ssa.ShiftIsBounded(v)
  2246  	// result: (SLLV x y)
  2247  	for {
  2248  		x := v_0
  2249  		y := v_1
  2250  		if !(ssa.ShiftIsBounded(v)) {
  2251  			break
  2252  		}
  2253  		v.Reset(ssaop.OpMIPS64SLLV)
  2254  		v.AddArg2(x, y)
  2255  		return true
  2256  	}
  2257  	// match: (Lsh32x16 <t> x y)
  2258  	// cond: !ssa.ShiftIsBounded(v)
  2259  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2260  	for {
  2261  		t := v.Type
  2262  		x := v_0
  2263  		y := v_1
  2264  		if !(!ssa.ShiftIsBounded(v)) {
  2265  			break
  2266  		}
  2267  		v.Reset(ssaop.OpMIPS64AND)
  2268  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2269  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2270  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2271  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2272  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  2273  		v3.AddArg(y)
  2274  		v1.AddArg2(v2, v3)
  2275  		v0.AddArg(v1)
  2276  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2277  		v4.AddArg2(x, v3)
  2278  		v.AddArg2(v0, v4)
  2279  		return true
  2280  	}
  2281  	return false
  2282  }
  2283  func rewriteValue_OpLsh32x32(v *ssa.Value) bool {
  2284  	v_1 := v.Args[1]
  2285  	v_0 := v.Args[0]
  2286  	b := v.Block
  2287  	typ := &b.Func.Config.Types
  2288  	// match: (Lsh32x32 x y)
  2289  	// cond: ssa.ShiftIsBounded(v)
  2290  	// result: (SLLV x y)
  2291  	for {
  2292  		x := v_0
  2293  		y := v_1
  2294  		if !(ssa.ShiftIsBounded(v)) {
  2295  			break
  2296  		}
  2297  		v.Reset(ssaop.OpMIPS64SLLV)
  2298  		v.AddArg2(x, y)
  2299  		return true
  2300  	}
  2301  	// match: (Lsh32x32 <t> x y)
  2302  	// cond: !ssa.ShiftIsBounded(v)
  2303  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2304  	for {
  2305  		t := v.Type
  2306  		x := v_0
  2307  		y := v_1
  2308  		if !(!ssa.ShiftIsBounded(v)) {
  2309  			break
  2310  		}
  2311  		v.Reset(ssaop.OpMIPS64AND)
  2312  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2313  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2314  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2315  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2316  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  2317  		v3.AddArg(y)
  2318  		v1.AddArg2(v2, v3)
  2319  		v0.AddArg(v1)
  2320  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2321  		v4.AddArg2(x, v3)
  2322  		v.AddArg2(v0, v4)
  2323  		return true
  2324  	}
  2325  	return false
  2326  }
  2327  func rewriteValue_OpLsh32x64(v *ssa.Value) bool {
  2328  	v_1 := v.Args[1]
  2329  	v_0 := v.Args[0]
  2330  	b := v.Block
  2331  	typ := &b.Func.Config.Types
  2332  	// match: (Lsh32x64 x y)
  2333  	// cond: ssa.ShiftIsBounded(v)
  2334  	// result: (SLLV x y)
  2335  	for {
  2336  		x := v_0
  2337  		y := v_1
  2338  		if !(ssa.ShiftIsBounded(v)) {
  2339  			break
  2340  		}
  2341  		v.Reset(ssaop.OpMIPS64SLLV)
  2342  		v.AddArg2(x, y)
  2343  		return true
  2344  	}
  2345  	// match: (Lsh32x64 <t> x y)
  2346  	// cond: !ssa.ShiftIsBounded(v)
  2347  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2348  	for {
  2349  		t := v.Type
  2350  		x := v_0
  2351  		y := v_1
  2352  		if !(!ssa.ShiftIsBounded(v)) {
  2353  			break
  2354  		}
  2355  		v.Reset(ssaop.OpMIPS64AND)
  2356  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2357  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2358  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2359  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2360  		v1.AddArg2(v2, y)
  2361  		v0.AddArg(v1)
  2362  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2363  		v3.AddArg2(x, y)
  2364  		v.AddArg2(v0, v3)
  2365  		return true
  2366  	}
  2367  	return false
  2368  }
  2369  func rewriteValue_OpLsh32x8(v *ssa.Value) bool {
  2370  	v_1 := v.Args[1]
  2371  	v_0 := v.Args[0]
  2372  	b := v.Block
  2373  	typ := &b.Func.Config.Types
  2374  	// match: (Lsh32x8 x y)
  2375  	// cond: ssa.ShiftIsBounded(v)
  2376  	// result: (SLLV x y)
  2377  	for {
  2378  		x := v_0
  2379  		y := v_1
  2380  		if !(ssa.ShiftIsBounded(v)) {
  2381  			break
  2382  		}
  2383  		v.Reset(ssaop.OpMIPS64SLLV)
  2384  		v.AddArg2(x, y)
  2385  		return true
  2386  	}
  2387  	// match: (Lsh32x8 <t> x y)
  2388  	// cond: !ssa.ShiftIsBounded(v)
  2389  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2390  	for {
  2391  		t := v.Type
  2392  		x := v_0
  2393  		y := v_1
  2394  		if !(!ssa.ShiftIsBounded(v)) {
  2395  			break
  2396  		}
  2397  		v.Reset(ssaop.OpMIPS64AND)
  2398  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2399  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2400  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2401  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2402  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  2403  		v3.AddArg(y)
  2404  		v1.AddArg2(v2, v3)
  2405  		v0.AddArg(v1)
  2406  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2407  		v4.AddArg2(x, v3)
  2408  		v.AddArg2(v0, v4)
  2409  		return true
  2410  	}
  2411  	return false
  2412  }
  2413  func rewriteValue_OpLsh64x16(v *ssa.Value) bool {
  2414  	v_1 := v.Args[1]
  2415  	v_0 := v.Args[0]
  2416  	b := v.Block
  2417  	typ := &b.Func.Config.Types
  2418  	// match: (Lsh64x16 x y)
  2419  	// cond: ssa.ShiftIsBounded(v)
  2420  	// result: (SLLV x y)
  2421  	for {
  2422  		x := v_0
  2423  		y := v_1
  2424  		if !(ssa.ShiftIsBounded(v)) {
  2425  			break
  2426  		}
  2427  		v.Reset(ssaop.OpMIPS64SLLV)
  2428  		v.AddArg2(x, y)
  2429  		return true
  2430  	}
  2431  	// match: (Lsh64x16 <t> x y)
  2432  	// cond: !ssa.ShiftIsBounded(v)
  2433  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2434  	for {
  2435  		t := v.Type
  2436  		x := v_0
  2437  		y := v_1
  2438  		if !(!ssa.ShiftIsBounded(v)) {
  2439  			break
  2440  		}
  2441  		v.Reset(ssaop.OpMIPS64AND)
  2442  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2443  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2444  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2445  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2446  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  2447  		v3.AddArg(y)
  2448  		v1.AddArg2(v2, v3)
  2449  		v0.AddArg(v1)
  2450  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2451  		v4.AddArg2(x, v3)
  2452  		v.AddArg2(v0, v4)
  2453  		return true
  2454  	}
  2455  	return false
  2456  }
  2457  func rewriteValue_OpLsh64x32(v *ssa.Value) bool {
  2458  	v_1 := v.Args[1]
  2459  	v_0 := v.Args[0]
  2460  	b := v.Block
  2461  	typ := &b.Func.Config.Types
  2462  	// match: (Lsh64x32 x y)
  2463  	// cond: ssa.ShiftIsBounded(v)
  2464  	// result: (SLLV x y)
  2465  	for {
  2466  		x := v_0
  2467  		y := v_1
  2468  		if !(ssa.ShiftIsBounded(v)) {
  2469  			break
  2470  		}
  2471  		v.Reset(ssaop.OpMIPS64SLLV)
  2472  		v.AddArg2(x, y)
  2473  		return true
  2474  	}
  2475  	// match: (Lsh64x32 <t> x y)
  2476  	// cond: !ssa.ShiftIsBounded(v)
  2477  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2478  	for {
  2479  		t := v.Type
  2480  		x := v_0
  2481  		y := v_1
  2482  		if !(!ssa.ShiftIsBounded(v)) {
  2483  			break
  2484  		}
  2485  		v.Reset(ssaop.OpMIPS64AND)
  2486  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2487  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2488  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2489  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2490  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  2491  		v3.AddArg(y)
  2492  		v1.AddArg2(v2, v3)
  2493  		v0.AddArg(v1)
  2494  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2495  		v4.AddArg2(x, v3)
  2496  		v.AddArg2(v0, v4)
  2497  		return true
  2498  	}
  2499  	return false
  2500  }
  2501  func rewriteValue_OpLsh64x64(v *ssa.Value) bool {
  2502  	v_1 := v.Args[1]
  2503  	v_0 := v.Args[0]
  2504  	b := v.Block
  2505  	typ := &b.Func.Config.Types
  2506  	// match: (Lsh64x64 x y)
  2507  	// cond: ssa.ShiftIsBounded(v)
  2508  	// result: (SLLV x y)
  2509  	for {
  2510  		x := v_0
  2511  		y := v_1
  2512  		if !(ssa.ShiftIsBounded(v)) {
  2513  			break
  2514  		}
  2515  		v.Reset(ssaop.OpMIPS64SLLV)
  2516  		v.AddArg2(x, y)
  2517  		return true
  2518  	}
  2519  	// match: (Lsh64x64 <t> x y)
  2520  	// cond: !ssa.ShiftIsBounded(v)
  2521  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2522  	for {
  2523  		t := v.Type
  2524  		x := v_0
  2525  		y := v_1
  2526  		if !(!ssa.ShiftIsBounded(v)) {
  2527  			break
  2528  		}
  2529  		v.Reset(ssaop.OpMIPS64AND)
  2530  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2531  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2532  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2533  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2534  		v1.AddArg2(v2, y)
  2535  		v0.AddArg(v1)
  2536  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2537  		v3.AddArg2(x, y)
  2538  		v.AddArg2(v0, v3)
  2539  		return true
  2540  	}
  2541  	return false
  2542  }
  2543  func rewriteValue_OpLsh64x8(v *ssa.Value) bool {
  2544  	v_1 := v.Args[1]
  2545  	v_0 := v.Args[0]
  2546  	b := v.Block
  2547  	typ := &b.Func.Config.Types
  2548  	// match: (Lsh64x8 x y)
  2549  	// cond: ssa.ShiftIsBounded(v)
  2550  	// result: (SLLV x y)
  2551  	for {
  2552  		x := v_0
  2553  		y := v_1
  2554  		if !(ssa.ShiftIsBounded(v)) {
  2555  			break
  2556  		}
  2557  		v.Reset(ssaop.OpMIPS64SLLV)
  2558  		v.AddArg2(x, y)
  2559  		return true
  2560  	}
  2561  	// match: (Lsh64x8 <t> x y)
  2562  	// cond: !ssa.ShiftIsBounded(v)
  2563  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2564  	for {
  2565  		t := v.Type
  2566  		x := v_0
  2567  		y := v_1
  2568  		if !(!ssa.ShiftIsBounded(v)) {
  2569  			break
  2570  		}
  2571  		v.Reset(ssaop.OpMIPS64AND)
  2572  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2573  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2574  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2575  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2576  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  2577  		v3.AddArg(y)
  2578  		v1.AddArg2(v2, v3)
  2579  		v0.AddArg(v1)
  2580  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2581  		v4.AddArg2(x, v3)
  2582  		v.AddArg2(v0, v4)
  2583  		return true
  2584  	}
  2585  	return false
  2586  }
  2587  func rewriteValue_OpLsh8x16(v *ssa.Value) bool {
  2588  	v_1 := v.Args[1]
  2589  	v_0 := v.Args[0]
  2590  	b := v.Block
  2591  	typ := &b.Func.Config.Types
  2592  	// match: (Lsh8x16 x y)
  2593  	// cond: ssa.ShiftIsBounded(v)
  2594  	// result: (SLLV x y)
  2595  	for {
  2596  		x := v_0
  2597  		y := v_1
  2598  		if !(ssa.ShiftIsBounded(v)) {
  2599  			break
  2600  		}
  2601  		v.Reset(ssaop.OpMIPS64SLLV)
  2602  		v.AddArg2(x, y)
  2603  		return true
  2604  	}
  2605  	// match: (Lsh8x16 <t> x y)
  2606  	// cond: !ssa.ShiftIsBounded(v)
  2607  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2608  	for {
  2609  		t := v.Type
  2610  		x := v_0
  2611  		y := v_1
  2612  		if !(!ssa.ShiftIsBounded(v)) {
  2613  			break
  2614  		}
  2615  		v.Reset(ssaop.OpMIPS64AND)
  2616  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2617  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2618  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2619  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2620  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  2621  		v3.AddArg(y)
  2622  		v1.AddArg2(v2, v3)
  2623  		v0.AddArg(v1)
  2624  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2625  		v4.AddArg2(x, v3)
  2626  		v.AddArg2(v0, v4)
  2627  		return true
  2628  	}
  2629  	return false
  2630  }
  2631  func rewriteValue_OpLsh8x32(v *ssa.Value) bool {
  2632  	v_1 := v.Args[1]
  2633  	v_0 := v.Args[0]
  2634  	b := v.Block
  2635  	typ := &b.Func.Config.Types
  2636  	// match: (Lsh8x32 x y)
  2637  	// cond: ssa.ShiftIsBounded(v)
  2638  	// result: (SLLV x y)
  2639  	for {
  2640  		x := v_0
  2641  		y := v_1
  2642  		if !(ssa.ShiftIsBounded(v)) {
  2643  			break
  2644  		}
  2645  		v.Reset(ssaop.OpMIPS64SLLV)
  2646  		v.AddArg2(x, y)
  2647  		return true
  2648  	}
  2649  	// match: (Lsh8x32 <t> x y)
  2650  	// cond: !ssa.ShiftIsBounded(v)
  2651  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2652  	for {
  2653  		t := v.Type
  2654  		x := v_0
  2655  		y := v_1
  2656  		if !(!ssa.ShiftIsBounded(v)) {
  2657  			break
  2658  		}
  2659  		v.Reset(ssaop.OpMIPS64AND)
  2660  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2661  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2662  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2663  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2664  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  2665  		v3.AddArg(y)
  2666  		v1.AddArg2(v2, v3)
  2667  		v0.AddArg(v1)
  2668  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2669  		v4.AddArg2(x, v3)
  2670  		v.AddArg2(v0, v4)
  2671  		return true
  2672  	}
  2673  	return false
  2674  }
  2675  func rewriteValue_OpLsh8x64(v *ssa.Value) bool {
  2676  	v_1 := v.Args[1]
  2677  	v_0 := v.Args[0]
  2678  	b := v.Block
  2679  	typ := &b.Func.Config.Types
  2680  	// match: (Lsh8x64 x y)
  2681  	// cond: ssa.ShiftIsBounded(v)
  2682  	// result: (SLLV x y)
  2683  	for {
  2684  		x := v_0
  2685  		y := v_1
  2686  		if !(ssa.ShiftIsBounded(v)) {
  2687  			break
  2688  		}
  2689  		v.Reset(ssaop.OpMIPS64SLLV)
  2690  		v.AddArg2(x, y)
  2691  		return true
  2692  	}
  2693  	// match: (Lsh8x64 <t> x y)
  2694  	// cond: !ssa.ShiftIsBounded(v)
  2695  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2696  	for {
  2697  		t := v.Type
  2698  		x := v_0
  2699  		y := v_1
  2700  		if !(!ssa.ShiftIsBounded(v)) {
  2701  			break
  2702  		}
  2703  		v.Reset(ssaop.OpMIPS64AND)
  2704  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2705  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2706  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2707  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2708  		v1.AddArg2(v2, y)
  2709  		v0.AddArg(v1)
  2710  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2711  		v3.AddArg2(x, y)
  2712  		v.AddArg2(v0, v3)
  2713  		return true
  2714  	}
  2715  	return false
  2716  }
  2717  func rewriteValue_OpLsh8x8(v *ssa.Value) bool {
  2718  	v_1 := v.Args[1]
  2719  	v_0 := v.Args[0]
  2720  	b := v.Block
  2721  	typ := &b.Func.Config.Types
  2722  	// match: (Lsh8x8 x y)
  2723  	// cond: ssa.ShiftIsBounded(v)
  2724  	// result: (SLLV x y)
  2725  	for {
  2726  		x := v_0
  2727  		y := v_1
  2728  		if !(ssa.ShiftIsBounded(v)) {
  2729  			break
  2730  		}
  2731  		v.Reset(ssaop.OpMIPS64SLLV)
  2732  		v.AddArg2(x, y)
  2733  		return true
  2734  	}
  2735  	// match: (Lsh8x8 <t> x y)
  2736  	// cond: !ssa.ShiftIsBounded(v)
  2737  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2738  	for {
  2739  		t := v.Type
  2740  		x := v_0
  2741  		y := v_1
  2742  		if !(!ssa.ShiftIsBounded(v)) {
  2743  			break
  2744  		}
  2745  		v.Reset(ssaop.OpMIPS64AND)
  2746  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2747  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2748  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2749  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2750  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  2751  		v3.AddArg(y)
  2752  		v1.AddArg2(v2, v3)
  2753  		v0.AddArg(v1)
  2754  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2755  		v4.AddArg2(x, v3)
  2756  		v.AddArg2(v0, v4)
  2757  		return true
  2758  	}
  2759  	return false
  2760  }
  2761  func rewriteValue_OpMIPS64ADDV(v *ssa.Value) bool {
  2762  	v_1 := v.Args[1]
  2763  	v_0 := v.Args[0]
  2764  	// match: (ADDV x (MOVVconst <t> [c]))
  2765  	// cond: ssa.Is32Bit(c) && !t.IsPtr()
  2766  	// result: (ADDVconst [c] x)
  2767  	for {
  2768  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2769  			x := v_0
  2770  			if v_1.Op != ssaop.OpMIPS64MOVVconst {
  2771  				continue
  2772  			}
  2773  			t := v_1.Type
  2774  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  2775  			if !(ssa.Is32Bit(c) && !t.IsPtr()) {
  2776  				continue
  2777  			}
  2778  			v.Reset(ssaop.OpMIPS64ADDVconst)
  2779  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2780  			v.AddArg(x)
  2781  			return true
  2782  		}
  2783  		break
  2784  	}
  2785  	// match: (ADDV x (NEGV y))
  2786  	// result: (SUBV x y)
  2787  	for {
  2788  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2789  			x := v_0
  2790  			if v_1.Op != ssaop.OpMIPS64NEGV {
  2791  				continue
  2792  			}
  2793  			y := v_1.Args[0]
  2794  			v.Reset(ssaop.OpMIPS64SUBV)
  2795  			v.AddArg2(x, y)
  2796  			return true
  2797  		}
  2798  		break
  2799  	}
  2800  	return false
  2801  }
  2802  func rewriteValue_OpMIPS64ADDVconst(v *ssa.Value) bool {
  2803  	v_0 := v.Args[0]
  2804  	// match: (ADDVconst [off1] (MOVVaddr [off2] {sym} ptr))
  2805  	// cond: ssa.Is32Bit(off1+int64(off2))
  2806  	// result: (MOVVaddr [int32(off1)+int32(off2)] {sym} ptr)
  2807  	for {
  2808  		off1 := ssa.AuxIntToInt64(v.AuxInt)
  2809  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  2810  			break
  2811  		}
  2812  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  2813  		sym := ssa.AuxToSym(v_0.Aux)
  2814  		ptr := v_0.Args[0]
  2815  		if !(ssa.Is32Bit(off1 + int64(off2))) {
  2816  			break
  2817  		}
  2818  		v.Reset(ssaop.OpMIPS64MOVVaddr)
  2819  		v.AuxInt = ssa.Int32ToAuxInt(int32(off1) + int32(off2))
  2820  		v.Aux = ssa.SymToAux(sym)
  2821  		v.AddArg(ptr)
  2822  		return true
  2823  	}
  2824  	// match: (ADDVconst [0] x)
  2825  	// result: x
  2826  	for {
  2827  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  2828  			break
  2829  		}
  2830  		x := v_0
  2831  		v.CopyOf(x)
  2832  		return true
  2833  	}
  2834  	// match: (ADDVconst [c] (MOVVconst [d]))
  2835  	// result: (MOVVconst [c+d])
  2836  	for {
  2837  		c := ssa.AuxIntToInt64(v.AuxInt)
  2838  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  2839  			break
  2840  		}
  2841  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2842  		v.Reset(ssaop.OpMIPS64MOVVconst)
  2843  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  2844  		return true
  2845  	}
  2846  	// match: (ADDVconst [c] (ADDVconst [d] x))
  2847  	// cond: ssa.Is32Bit(c+d)
  2848  	// result: (ADDVconst [c+d] x)
  2849  	for {
  2850  		c := ssa.AuxIntToInt64(v.AuxInt)
  2851  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  2852  			break
  2853  		}
  2854  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2855  		x := v_0.Args[0]
  2856  		if !(ssa.Is32Bit(c + d)) {
  2857  			break
  2858  		}
  2859  		v.Reset(ssaop.OpMIPS64ADDVconst)
  2860  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  2861  		v.AddArg(x)
  2862  		return true
  2863  	}
  2864  	// match: (ADDVconst [c] (SUBVconst [d] x))
  2865  	// cond: ssa.Is32Bit(c-d)
  2866  	// result: (ADDVconst [c-d] x)
  2867  	for {
  2868  		c := ssa.AuxIntToInt64(v.AuxInt)
  2869  		if v_0.Op != ssaop.OpMIPS64SUBVconst {
  2870  			break
  2871  		}
  2872  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2873  		x := v_0.Args[0]
  2874  		if !(ssa.Is32Bit(c - d)) {
  2875  			break
  2876  		}
  2877  		v.Reset(ssaop.OpMIPS64ADDVconst)
  2878  		v.AuxInt = ssa.Int64ToAuxInt(c - d)
  2879  		v.AddArg(x)
  2880  		return true
  2881  	}
  2882  	return false
  2883  }
  2884  func rewriteValue_OpMIPS64AND(v *ssa.Value) bool {
  2885  	v_1 := v.Args[1]
  2886  	v_0 := v.Args[0]
  2887  	// match: (AND x (MOVVconst [c]))
  2888  	// cond: ssa.Is32Bit(c)
  2889  	// result: (ANDconst [c] x)
  2890  	for {
  2891  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2892  			x := v_0
  2893  			if v_1.Op != ssaop.OpMIPS64MOVVconst {
  2894  				continue
  2895  			}
  2896  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  2897  			if !(ssa.Is32Bit(c)) {
  2898  				continue
  2899  			}
  2900  			v.Reset(ssaop.OpMIPS64ANDconst)
  2901  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2902  			v.AddArg(x)
  2903  			return true
  2904  		}
  2905  		break
  2906  	}
  2907  	// match: (AND x x)
  2908  	// result: x
  2909  	for {
  2910  		x := v_0
  2911  		if x != v_1 {
  2912  			break
  2913  		}
  2914  		v.CopyOf(x)
  2915  		return true
  2916  	}
  2917  	return false
  2918  }
  2919  func rewriteValue_OpMIPS64ANDconst(v *ssa.Value) bool {
  2920  	v_0 := v.Args[0]
  2921  	// match: (ANDconst [0] _)
  2922  	// result: (MOVVconst [0])
  2923  	for {
  2924  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  2925  			break
  2926  		}
  2927  		v.Reset(ssaop.OpMIPS64MOVVconst)
  2928  		v.AuxInt = ssa.Int64ToAuxInt(0)
  2929  		return true
  2930  	}
  2931  	// match: (ANDconst [-1] x)
  2932  	// result: x
  2933  	for {
  2934  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
  2935  			break
  2936  		}
  2937  		x := v_0
  2938  		v.CopyOf(x)
  2939  		return true
  2940  	}
  2941  	// match: (ANDconst [c] (MOVVconst [d]))
  2942  	// result: (MOVVconst [c&d])
  2943  	for {
  2944  		c := ssa.AuxIntToInt64(v.AuxInt)
  2945  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  2946  			break
  2947  		}
  2948  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2949  		v.Reset(ssaop.OpMIPS64MOVVconst)
  2950  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  2951  		return true
  2952  	}
  2953  	// match: (ANDconst [c] (ANDconst [d] x))
  2954  	// result: (ANDconst [c&d] x)
  2955  	for {
  2956  		c := ssa.AuxIntToInt64(v.AuxInt)
  2957  		if v_0.Op != ssaop.OpMIPS64ANDconst {
  2958  			break
  2959  		}
  2960  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2961  		x := v_0.Args[0]
  2962  		v.Reset(ssaop.OpMIPS64ANDconst)
  2963  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  2964  		v.AddArg(x)
  2965  		return true
  2966  	}
  2967  	return false
  2968  }
  2969  func rewriteValue_OpMIPS64LoweredAtomicAdd32(v *ssa.Value) bool {
  2970  	v_2 := v.Args[2]
  2971  	v_1 := v.Args[1]
  2972  	v_0 := v.Args[0]
  2973  	// match: (LoweredAtomicAdd32 ptr (MOVVconst [c]) mem)
  2974  	// cond: ssa.Is32Bit(c)
  2975  	// result: (LoweredAtomicAddconst32 [int32(c)] ptr mem)
  2976  	for {
  2977  		ptr := v_0
  2978  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  2979  			break
  2980  		}
  2981  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  2982  		mem := v_2
  2983  		if !(ssa.Is32Bit(c)) {
  2984  			break
  2985  		}
  2986  		v.Reset(ssaop.OpMIPS64LoweredAtomicAddconst32)
  2987  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  2988  		v.AddArg2(ptr, mem)
  2989  		return true
  2990  	}
  2991  	return false
  2992  }
  2993  func rewriteValue_OpMIPS64LoweredAtomicAdd64(v *ssa.Value) bool {
  2994  	v_2 := v.Args[2]
  2995  	v_1 := v.Args[1]
  2996  	v_0 := v.Args[0]
  2997  	// match: (LoweredAtomicAdd64 ptr (MOVVconst [c]) mem)
  2998  	// cond: ssa.Is32Bit(c)
  2999  	// result: (LoweredAtomicAddconst64 [c] ptr mem)
  3000  	for {
  3001  		ptr := v_0
  3002  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  3003  			break
  3004  		}
  3005  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3006  		mem := v_2
  3007  		if !(ssa.Is32Bit(c)) {
  3008  			break
  3009  		}
  3010  		v.Reset(ssaop.OpMIPS64LoweredAtomicAddconst64)
  3011  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3012  		v.AddArg2(ptr, mem)
  3013  		return true
  3014  	}
  3015  	return false
  3016  }
  3017  func rewriteValue_OpMIPS64LoweredAtomicStore32(v *ssa.Value) bool {
  3018  	v_2 := v.Args[2]
  3019  	v_1 := v.Args[1]
  3020  	v_0 := v.Args[0]
  3021  	// match: (LoweredAtomicStore32 ptr (MOVVconst [0]) mem)
  3022  	// result: (LoweredAtomicStorezero32 ptr mem)
  3023  	for {
  3024  		ptr := v_0
  3025  		if v_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  3026  			break
  3027  		}
  3028  		mem := v_2
  3029  		v.Reset(ssaop.OpMIPS64LoweredAtomicStorezero32)
  3030  		v.AddArg2(ptr, mem)
  3031  		return true
  3032  	}
  3033  	return false
  3034  }
  3035  func rewriteValue_OpMIPS64LoweredAtomicStore64(v *ssa.Value) bool {
  3036  	v_2 := v.Args[2]
  3037  	v_1 := v.Args[1]
  3038  	v_0 := v.Args[0]
  3039  	// match: (LoweredAtomicStore64 ptr (MOVVconst [0]) mem)
  3040  	// result: (LoweredAtomicStorezero64 ptr mem)
  3041  	for {
  3042  		ptr := v_0
  3043  		if v_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  3044  			break
  3045  		}
  3046  		mem := v_2
  3047  		v.Reset(ssaop.OpMIPS64LoweredAtomicStorezero64)
  3048  		v.AddArg2(ptr, mem)
  3049  		return true
  3050  	}
  3051  	return false
  3052  }
  3053  func rewriteValue_OpMIPS64LoweredPanicBoundsCR(v *ssa.Value) bool {
  3054  	v_1 := v.Args[1]
  3055  	v_0 := v.Args[0]
  3056  	// match: (LoweredPanicBoundsCR [kind] {p} (MOVVconst [c]) mem)
  3057  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:p.C, Cy:c}} mem)
  3058  	for {
  3059  		kind := ssa.AuxIntToInt64(v.AuxInt)
  3060  		p := ssa.AuxToPanicBoundsC(v.Aux)
  3061  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  3062  			break
  3063  		}
  3064  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3065  		mem := v_1
  3066  		v.Reset(ssaop.OpMIPS64LoweredPanicBoundsCC)
  3067  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  3068  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: p.C, Cy: c})
  3069  		v.AddArg(mem)
  3070  		return true
  3071  	}
  3072  	return false
  3073  }
  3074  func rewriteValue_OpMIPS64LoweredPanicBoundsRC(v *ssa.Value) bool {
  3075  	v_1 := v.Args[1]
  3076  	v_0 := v.Args[0]
  3077  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVVconst [c]) mem)
  3078  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:c, Cy:p.C}} mem)
  3079  	for {
  3080  		kind := ssa.AuxIntToInt64(v.AuxInt)
  3081  		p := ssa.AuxToPanicBoundsC(v.Aux)
  3082  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  3083  			break
  3084  		}
  3085  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3086  		mem := v_1
  3087  		v.Reset(ssaop.OpMIPS64LoweredPanicBoundsCC)
  3088  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  3089  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: c, Cy: p.C})
  3090  		v.AddArg(mem)
  3091  		return true
  3092  	}
  3093  	return false
  3094  }
  3095  func rewriteValue_OpMIPS64LoweredPanicBoundsRR(v *ssa.Value) bool {
  3096  	v_2 := v.Args[2]
  3097  	v_1 := v.Args[1]
  3098  	v_0 := v.Args[0]
  3099  	// match: (LoweredPanicBoundsRR [kind] x (MOVVconst [c]) mem)
  3100  	// result: (LoweredPanicBoundsRC [kind] x {ssa.PanicBoundsC{C:c}} mem)
  3101  	for {
  3102  		kind := ssa.AuxIntToInt64(v.AuxInt)
  3103  		x := v_0
  3104  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  3105  			break
  3106  		}
  3107  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3108  		mem := v_2
  3109  		v.Reset(ssaop.OpMIPS64LoweredPanicBoundsRC)
  3110  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  3111  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  3112  		v.AddArg2(x, mem)
  3113  		return true
  3114  	}
  3115  	// match: (LoweredPanicBoundsRR [kind] (MOVVconst [c]) y mem)
  3116  	// result: (LoweredPanicBoundsCR [kind] {ssa.PanicBoundsC{C:c}} y mem)
  3117  	for {
  3118  		kind := ssa.AuxIntToInt64(v.AuxInt)
  3119  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  3120  			break
  3121  		}
  3122  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3123  		y := v_1
  3124  		mem := v_2
  3125  		v.Reset(ssaop.OpMIPS64LoweredPanicBoundsCR)
  3126  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  3127  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  3128  		v.AddArg2(y, mem)
  3129  		return true
  3130  	}
  3131  	return false
  3132  }
  3133  func rewriteValue_OpMIPS64MOVBUload(v *ssa.Value) bool {
  3134  	v_1 := v.Args[1]
  3135  	v_0 := v.Args[0]
  3136  	b := v.Block
  3137  	config := b.Func.Config
  3138  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off] {sym} ptr x _))
  3139  	// result: (MOVBUreg x)
  3140  	for {
  3141  		off := ssa.AuxIntToInt32(v.AuxInt)
  3142  		sym := ssa.AuxToSym(v.Aux)
  3143  		ptr := v_0
  3144  		if v_1.Op != ssaop.OpMIPS64MOVBstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3145  			break
  3146  		}
  3147  		x := v_1.Args[1]
  3148  		if ptr != v_1.Args[0] {
  3149  			break
  3150  		}
  3151  		v.Reset(ssaop.OpMIPS64MOVBUreg)
  3152  		v.AddArg(x)
  3153  		return true
  3154  	}
  3155  	// match: (MOVBUload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3156  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3157  	// result: (MOVBUload [off1+int32(off2)] {sym} ptr mem)
  3158  	for {
  3159  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3160  		sym := ssa.AuxToSym(v.Aux)
  3161  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3162  			break
  3163  		}
  3164  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3165  		ptr := v_0.Args[0]
  3166  		mem := v_1
  3167  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3168  			break
  3169  		}
  3170  		v.Reset(ssaop.OpMIPS64MOVBUload)
  3171  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3172  		v.Aux = ssa.SymToAux(sym)
  3173  		v.AddArg2(ptr, mem)
  3174  		return true
  3175  	}
  3176  	// match: (MOVBUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3177  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3178  	// result: (MOVBUload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3179  	for {
  3180  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3181  		sym1 := ssa.AuxToSym(v.Aux)
  3182  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3183  			break
  3184  		}
  3185  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3186  		sym2 := ssa.AuxToSym(v_0.Aux)
  3187  		ptr := v_0.Args[0]
  3188  		mem := v_1
  3189  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3190  			break
  3191  		}
  3192  		v.Reset(ssaop.OpMIPS64MOVBUload)
  3193  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3194  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3195  		v.AddArg2(ptr, mem)
  3196  		return true
  3197  	}
  3198  	// match: (MOVBUload [off] {sym} (SB) _)
  3199  	// cond: ssa.SymIsRO(sym)
  3200  	// result: (MOVVconst [int64(ssa.Read8(sym, int64(off)))])
  3201  	for {
  3202  		off := ssa.AuxIntToInt32(v.AuxInt)
  3203  		sym := ssa.AuxToSym(v.Aux)
  3204  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  3205  			break
  3206  		}
  3207  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3208  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read8(sym, int64(off))))
  3209  		return true
  3210  	}
  3211  	return false
  3212  }
  3213  func rewriteValue_OpMIPS64MOVBUreg(v *ssa.Value) bool {
  3214  	v_0 := v.Args[0]
  3215  	// match: (MOVBUreg x:(MOVBUload _ _))
  3216  	// result: (MOVVreg x)
  3217  	for {
  3218  		x := v_0
  3219  		if x.Op != ssaop.OpMIPS64MOVBUload {
  3220  			break
  3221  		}
  3222  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3223  		v.AddArg(x)
  3224  		return true
  3225  	}
  3226  	// match: (MOVBUreg x:(MOVBUreg _))
  3227  	// result: (MOVVreg x)
  3228  	for {
  3229  		x := v_0
  3230  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  3231  			break
  3232  		}
  3233  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3234  		v.AddArg(x)
  3235  		return true
  3236  	}
  3237  	// match: (MOVBUreg (MOVVconst [c]))
  3238  	// result: (MOVVconst [int64(uint8(c))])
  3239  	for {
  3240  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  3241  			break
  3242  		}
  3243  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3244  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3245  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint8(c)))
  3246  		return true
  3247  	}
  3248  	return false
  3249  }
  3250  func rewriteValue_OpMIPS64MOVBload(v *ssa.Value) bool {
  3251  	v_1 := v.Args[1]
  3252  	v_0 := v.Args[0]
  3253  	b := v.Block
  3254  	config := b.Func.Config
  3255  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off] {sym} ptr x _))
  3256  	// result: (MOVBreg x)
  3257  	for {
  3258  		off := ssa.AuxIntToInt32(v.AuxInt)
  3259  		sym := ssa.AuxToSym(v.Aux)
  3260  		ptr := v_0
  3261  		if v_1.Op != ssaop.OpMIPS64MOVBstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3262  			break
  3263  		}
  3264  		x := v_1.Args[1]
  3265  		if ptr != v_1.Args[0] {
  3266  			break
  3267  		}
  3268  		v.Reset(ssaop.OpMIPS64MOVBreg)
  3269  		v.AddArg(x)
  3270  		return true
  3271  	}
  3272  	// match: (MOVBload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3273  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3274  	// result: (MOVBload [off1+int32(off2)] {sym} ptr mem)
  3275  	for {
  3276  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3277  		sym := ssa.AuxToSym(v.Aux)
  3278  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3279  			break
  3280  		}
  3281  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3282  		ptr := v_0.Args[0]
  3283  		mem := v_1
  3284  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3285  			break
  3286  		}
  3287  		v.Reset(ssaop.OpMIPS64MOVBload)
  3288  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3289  		v.Aux = ssa.SymToAux(sym)
  3290  		v.AddArg2(ptr, mem)
  3291  		return true
  3292  	}
  3293  	// match: (MOVBload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3294  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3295  	// result: (MOVBload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3296  	for {
  3297  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3298  		sym1 := ssa.AuxToSym(v.Aux)
  3299  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3300  			break
  3301  		}
  3302  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3303  		sym2 := ssa.AuxToSym(v_0.Aux)
  3304  		ptr := v_0.Args[0]
  3305  		mem := v_1
  3306  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3307  			break
  3308  		}
  3309  		v.Reset(ssaop.OpMIPS64MOVBload)
  3310  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3311  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3312  		v.AddArg2(ptr, mem)
  3313  		return true
  3314  	}
  3315  	// match: (MOVBload [off] {sym} (SB) _)
  3316  	// cond: ssa.SymIsRO(sym)
  3317  	// result: (MOVVconst [int64(int8(ssa.Read8(sym, int64(off))))])
  3318  	for {
  3319  		off := ssa.AuxIntToInt32(v.AuxInt)
  3320  		sym := ssa.AuxToSym(v.Aux)
  3321  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  3322  			break
  3323  		}
  3324  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3325  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(ssa.Read8(sym, int64(off)))))
  3326  		return true
  3327  	}
  3328  	return false
  3329  }
  3330  func rewriteValue_OpMIPS64MOVBreg(v *ssa.Value) bool {
  3331  	v_0 := v.Args[0]
  3332  	// match: (MOVBreg x:(MOVBload _ _))
  3333  	// result: (MOVVreg x)
  3334  	for {
  3335  		x := v_0
  3336  		if x.Op != ssaop.OpMIPS64MOVBload {
  3337  			break
  3338  		}
  3339  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3340  		v.AddArg(x)
  3341  		return true
  3342  	}
  3343  	// match: (MOVBreg x:(MOVBreg _))
  3344  	// result: (MOVVreg x)
  3345  	for {
  3346  		x := v_0
  3347  		if x.Op != ssaop.OpMIPS64MOVBreg {
  3348  			break
  3349  		}
  3350  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3351  		v.AddArg(x)
  3352  		return true
  3353  	}
  3354  	// match: (MOVBreg (MOVVconst [c]))
  3355  	// result: (MOVVconst [int64(int8(c))])
  3356  	for {
  3357  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  3358  			break
  3359  		}
  3360  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3361  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3362  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(c)))
  3363  		return true
  3364  	}
  3365  	return false
  3366  }
  3367  func rewriteValue_OpMIPS64MOVBstore(v *ssa.Value) bool {
  3368  	v_2 := v.Args[2]
  3369  	v_1 := v.Args[1]
  3370  	v_0 := v.Args[0]
  3371  	b := v.Block
  3372  	config := b.Func.Config
  3373  	// match: (MOVBstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3374  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3375  	// result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem)
  3376  	for {
  3377  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3378  		sym := ssa.AuxToSym(v.Aux)
  3379  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3380  			break
  3381  		}
  3382  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3383  		ptr := v_0.Args[0]
  3384  		val := v_1
  3385  		mem := v_2
  3386  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3387  			break
  3388  		}
  3389  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3390  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3391  		v.Aux = ssa.SymToAux(sym)
  3392  		v.AddArg3(ptr, val, mem)
  3393  		return true
  3394  	}
  3395  	// match: (MOVBstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3396  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3397  	// result: (MOVBstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  3398  	for {
  3399  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3400  		sym1 := ssa.AuxToSym(v.Aux)
  3401  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3402  			break
  3403  		}
  3404  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3405  		sym2 := ssa.AuxToSym(v_0.Aux)
  3406  		ptr := v_0.Args[0]
  3407  		val := v_1
  3408  		mem := v_2
  3409  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3410  			break
  3411  		}
  3412  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3413  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3414  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3415  		v.AddArg3(ptr, val, mem)
  3416  		return true
  3417  	}
  3418  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  3419  	// result: (MOVBstore [off] {sym} ptr x mem)
  3420  	for {
  3421  		off := ssa.AuxIntToInt32(v.AuxInt)
  3422  		sym := ssa.AuxToSym(v.Aux)
  3423  		ptr := v_0
  3424  		if v_1.Op != ssaop.OpMIPS64MOVBreg {
  3425  			break
  3426  		}
  3427  		x := v_1.Args[0]
  3428  		mem := v_2
  3429  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3430  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3431  		v.Aux = ssa.SymToAux(sym)
  3432  		v.AddArg3(ptr, x, mem)
  3433  		return true
  3434  	}
  3435  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  3436  	// result: (MOVBstore [off] {sym} ptr x mem)
  3437  	for {
  3438  		off := ssa.AuxIntToInt32(v.AuxInt)
  3439  		sym := ssa.AuxToSym(v.Aux)
  3440  		ptr := v_0
  3441  		if v_1.Op != ssaop.OpMIPS64MOVBUreg {
  3442  			break
  3443  		}
  3444  		x := v_1.Args[0]
  3445  		mem := v_2
  3446  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3447  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3448  		v.Aux = ssa.SymToAux(sym)
  3449  		v.AddArg3(ptr, x, mem)
  3450  		return true
  3451  	}
  3452  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  3453  	// result: (MOVBstore [off] {sym} ptr x mem)
  3454  	for {
  3455  		off := ssa.AuxIntToInt32(v.AuxInt)
  3456  		sym := ssa.AuxToSym(v.Aux)
  3457  		ptr := v_0
  3458  		if v_1.Op != ssaop.OpMIPS64MOVHreg {
  3459  			break
  3460  		}
  3461  		x := v_1.Args[0]
  3462  		mem := v_2
  3463  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3464  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3465  		v.Aux = ssa.SymToAux(sym)
  3466  		v.AddArg3(ptr, x, mem)
  3467  		return true
  3468  	}
  3469  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  3470  	// result: (MOVBstore [off] {sym} ptr x mem)
  3471  	for {
  3472  		off := ssa.AuxIntToInt32(v.AuxInt)
  3473  		sym := ssa.AuxToSym(v.Aux)
  3474  		ptr := v_0
  3475  		if v_1.Op != ssaop.OpMIPS64MOVHUreg {
  3476  			break
  3477  		}
  3478  		x := v_1.Args[0]
  3479  		mem := v_2
  3480  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3481  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3482  		v.Aux = ssa.SymToAux(sym)
  3483  		v.AddArg3(ptr, x, mem)
  3484  		return true
  3485  	}
  3486  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  3487  	// result: (MOVBstore [off] {sym} ptr x mem)
  3488  	for {
  3489  		off := ssa.AuxIntToInt32(v.AuxInt)
  3490  		sym := ssa.AuxToSym(v.Aux)
  3491  		ptr := v_0
  3492  		if v_1.Op != ssaop.OpMIPS64MOVWreg {
  3493  			break
  3494  		}
  3495  		x := v_1.Args[0]
  3496  		mem := v_2
  3497  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3498  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3499  		v.Aux = ssa.SymToAux(sym)
  3500  		v.AddArg3(ptr, x, mem)
  3501  		return true
  3502  	}
  3503  	// match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem)
  3504  	// result: (MOVBstore [off] {sym} ptr x mem)
  3505  	for {
  3506  		off := ssa.AuxIntToInt32(v.AuxInt)
  3507  		sym := ssa.AuxToSym(v.Aux)
  3508  		ptr := v_0
  3509  		if v_1.Op != ssaop.OpMIPS64MOVWUreg {
  3510  			break
  3511  		}
  3512  		x := v_1.Args[0]
  3513  		mem := v_2
  3514  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3515  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3516  		v.Aux = ssa.SymToAux(sym)
  3517  		v.AddArg3(ptr, x, mem)
  3518  		return true
  3519  	}
  3520  	return false
  3521  }
  3522  func rewriteValue_OpMIPS64MOVDF(v *ssa.Value) bool {
  3523  	v_0 := v.Args[0]
  3524  	// match: (MOVDF (ABSD (MOVFD x)))
  3525  	// result: (ABSF x)
  3526  	for {
  3527  		if v_0.Op != ssaop.OpMIPS64ABSD {
  3528  			break
  3529  		}
  3530  		v_0_0 := v_0.Args[0]
  3531  		if v_0_0.Op != ssaop.OpMIPS64MOVFD {
  3532  			break
  3533  		}
  3534  		x := v_0_0.Args[0]
  3535  		v.Reset(ssaop.OpMIPS64ABSF)
  3536  		v.AddArg(x)
  3537  		return true
  3538  	}
  3539  	// match: (MOVDF (SQRTD (MOVFD x)))
  3540  	// result: (SQRTF x)
  3541  	for {
  3542  		if v_0.Op != ssaop.OpMIPS64SQRTD {
  3543  			break
  3544  		}
  3545  		v_0_0 := v_0.Args[0]
  3546  		if v_0_0.Op != ssaop.OpMIPS64MOVFD {
  3547  			break
  3548  		}
  3549  		x := v_0_0.Args[0]
  3550  		v.Reset(ssaop.OpMIPS64SQRTF)
  3551  		v.AddArg(x)
  3552  		return true
  3553  	}
  3554  	return false
  3555  }
  3556  func rewriteValue_OpMIPS64MOVDload(v *ssa.Value) bool {
  3557  	v_1 := v.Args[1]
  3558  	v_0 := v.Args[0]
  3559  	b := v.Block
  3560  	config := b.Func.Config
  3561  	// match: (MOVDload [off] {sym} ptr (MOVVstore [off] {sym} ptr val _))
  3562  	// result: (MOVVgpfp val)
  3563  	for {
  3564  		off := ssa.AuxIntToInt32(v.AuxInt)
  3565  		sym := ssa.AuxToSym(v.Aux)
  3566  		ptr := v_0
  3567  		if v_1.Op != ssaop.OpMIPS64MOVVstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3568  			break
  3569  		}
  3570  		val := v_1.Args[1]
  3571  		if ptr != v_1.Args[0] {
  3572  			break
  3573  		}
  3574  		v.Reset(ssaop.OpMIPS64MOVVgpfp)
  3575  		v.AddArg(val)
  3576  		return true
  3577  	}
  3578  	// match: (MOVDload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3579  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3580  	// result: (MOVDload [off1+int32(off2)] {sym} ptr mem)
  3581  	for {
  3582  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3583  		sym := ssa.AuxToSym(v.Aux)
  3584  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3585  			break
  3586  		}
  3587  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3588  		ptr := v_0.Args[0]
  3589  		mem := v_1
  3590  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3591  			break
  3592  		}
  3593  		v.Reset(ssaop.OpMIPS64MOVDload)
  3594  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3595  		v.Aux = ssa.SymToAux(sym)
  3596  		v.AddArg2(ptr, mem)
  3597  		return true
  3598  	}
  3599  	// match: (MOVDload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3600  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3601  	// result: (MOVDload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3602  	for {
  3603  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3604  		sym1 := ssa.AuxToSym(v.Aux)
  3605  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3606  			break
  3607  		}
  3608  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3609  		sym2 := ssa.AuxToSym(v_0.Aux)
  3610  		ptr := v_0.Args[0]
  3611  		mem := v_1
  3612  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3613  			break
  3614  		}
  3615  		v.Reset(ssaop.OpMIPS64MOVDload)
  3616  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3617  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3618  		v.AddArg2(ptr, mem)
  3619  		return true
  3620  	}
  3621  	return false
  3622  }
  3623  func rewriteValue_OpMIPS64MOVDstore(v *ssa.Value) bool {
  3624  	v_2 := v.Args[2]
  3625  	v_1 := v.Args[1]
  3626  	v_0 := v.Args[0]
  3627  	b := v.Block
  3628  	config := b.Func.Config
  3629  	// match: (MOVDstore [off] {sym} ptr (MOVVgpfp val) mem)
  3630  	// result: (MOVVstore [off] {sym} ptr val mem)
  3631  	for {
  3632  		off := ssa.AuxIntToInt32(v.AuxInt)
  3633  		sym := ssa.AuxToSym(v.Aux)
  3634  		ptr := v_0
  3635  		if v_1.Op != ssaop.OpMIPS64MOVVgpfp {
  3636  			break
  3637  		}
  3638  		val := v_1.Args[0]
  3639  		mem := v_2
  3640  		v.Reset(ssaop.OpMIPS64MOVVstore)
  3641  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3642  		v.Aux = ssa.SymToAux(sym)
  3643  		v.AddArg3(ptr, val, mem)
  3644  		return true
  3645  	}
  3646  	// match: (MOVDstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3647  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3648  	// result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem)
  3649  	for {
  3650  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3651  		sym := ssa.AuxToSym(v.Aux)
  3652  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3653  			break
  3654  		}
  3655  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3656  		ptr := v_0.Args[0]
  3657  		val := v_1
  3658  		mem := v_2
  3659  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3660  			break
  3661  		}
  3662  		v.Reset(ssaop.OpMIPS64MOVDstore)
  3663  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3664  		v.Aux = ssa.SymToAux(sym)
  3665  		v.AddArg3(ptr, val, mem)
  3666  		return true
  3667  	}
  3668  	// match: (MOVDstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3669  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3670  	// result: (MOVDstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  3671  	for {
  3672  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3673  		sym1 := ssa.AuxToSym(v.Aux)
  3674  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3675  			break
  3676  		}
  3677  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3678  		sym2 := ssa.AuxToSym(v_0.Aux)
  3679  		ptr := v_0.Args[0]
  3680  		val := v_1
  3681  		mem := v_2
  3682  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3683  			break
  3684  		}
  3685  		v.Reset(ssaop.OpMIPS64MOVDstore)
  3686  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3687  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3688  		v.AddArg3(ptr, val, mem)
  3689  		return true
  3690  	}
  3691  	return false
  3692  }
  3693  func rewriteValue_OpMIPS64MOVFload(v *ssa.Value) bool {
  3694  	v_1 := v.Args[1]
  3695  	v_0 := v.Args[0]
  3696  	b := v.Block
  3697  	config := b.Func.Config
  3698  	// match: (MOVFload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  3699  	// result: (MOVWgpfp val)
  3700  	for {
  3701  		off := ssa.AuxIntToInt32(v.AuxInt)
  3702  		sym := ssa.AuxToSym(v.Aux)
  3703  		ptr := v_0
  3704  		if v_1.Op != ssaop.OpMIPS64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3705  			break
  3706  		}
  3707  		val := v_1.Args[1]
  3708  		if ptr != v_1.Args[0] {
  3709  			break
  3710  		}
  3711  		v.Reset(ssaop.OpMIPS64MOVWgpfp)
  3712  		v.AddArg(val)
  3713  		return true
  3714  	}
  3715  	// match: (MOVFload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3716  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3717  	// result: (MOVFload [off1+int32(off2)] {sym} ptr mem)
  3718  	for {
  3719  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3720  		sym := ssa.AuxToSym(v.Aux)
  3721  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3722  			break
  3723  		}
  3724  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3725  		ptr := v_0.Args[0]
  3726  		mem := v_1
  3727  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3728  			break
  3729  		}
  3730  		v.Reset(ssaop.OpMIPS64MOVFload)
  3731  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3732  		v.Aux = ssa.SymToAux(sym)
  3733  		v.AddArg2(ptr, mem)
  3734  		return true
  3735  	}
  3736  	// match: (MOVFload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3737  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3738  	// result: (MOVFload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3739  	for {
  3740  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3741  		sym1 := ssa.AuxToSym(v.Aux)
  3742  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3743  			break
  3744  		}
  3745  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3746  		sym2 := ssa.AuxToSym(v_0.Aux)
  3747  		ptr := v_0.Args[0]
  3748  		mem := v_1
  3749  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3750  			break
  3751  		}
  3752  		v.Reset(ssaop.OpMIPS64MOVFload)
  3753  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3754  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3755  		v.AddArg2(ptr, mem)
  3756  		return true
  3757  	}
  3758  	return false
  3759  }
  3760  func rewriteValue_OpMIPS64MOVFstore(v *ssa.Value) bool {
  3761  	v_2 := v.Args[2]
  3762  	v_1 := v.Args[1]
  3763  	v_0 := v.Args[0]
  3764  	b := v.Block
  3765  	config := b.Func.Config
  3766  	// match: (MOVFstore [off] {sym} ptr (MOVWgpfp val) mem)
  3767  	// result: (MOVWstore [off] {sym} ptr val mem)
  3768  	for {
  3769  		off := ssa.AuxIntToInt32(v.AuxInt)
  3770  		sym := ssa.AuxToSym(v.Aux)
  3771  		ptr := v_0
  3772  		if v_1.Op != ssaop.OpMIPS64MOVWgpfp {
  3773  			break
  3774  		}
  3775  		val := v_1.Args[0]
  3776  		mem := v_2
  3777  		v.Reset(ssaop.OpMIPS64MOVWstore)
  3778  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3779  		v.Aux = ssa.SymToAux(sym)
  3780  		v.AddArg3(ptr, val, mem)
  3781  		return true
  3782  	}
  3783  	// match: (MOVFstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3784  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3785  	// result: (MOVFstore [off1+int32(off2)] {sym} ptr val mem)
  3786  	for {
  3787  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3788  		sym := ssa.AuxToSym(v.Aux)
  3789  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3790  			break
  3791  		}
  3792  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3793  		ptr := v_0.Args[0]
  3794  		val := v_1
  3795  		mem := v_2
  3796  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3797  			break
  3798  		}
  3799  		v.Reset(ssaop.OpMIPS64MOVFstore)
  3800  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3801  		v.Aux = ssa.SymToAux(sym)
  3802  		v.AddArg3(ptr, val, mem)
  3803  		return true
  3804  	}
  3805  	// match: (MOVFstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3806  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3807  	// result: (MOVFstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  3808  	for {
  3809  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3810  		sym1 := ssa.AuxToSym(v.Aux)
  3811  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3812  			break
  3813  		}
  3814  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3815  		sym2 := ssa.AuxToSym(v_0.Aux)
  3816  		ptr := v_0.Args[0]
  3817  		val := v_1
  3818  		mem := v_2
  3819  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3820  			break
  3821  		}
  3822  		v.Reset(ssaop.OpMIPS64MOVFstore)
  3823  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3824  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3825  		v.AddArg3(ptr, val, mem)
  3826  		return true
  3827  	}
  3828  	return false
  3829  }
  3830  func rewriteValue_OpMIPS64MOVHUload(v *ssa.Value) bool {
  3831  	v_1 := v.Args[1]
  3832  	v_0 := v.Args[0]
  3833  	b := v.Block
  3834  	config := b.Func.Config
  3835  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off] {sym} ptr x _))
  3836  	// result: (MOVHUreg x)
  3837  	for {
  3838  		off := ssa.AuxIntToInt32(v.AuxInt)
  3839  		sym := ssa.AuxToSym(v.Aux)
  3840  		ptr := v_0
  3841  		if v_1.Op != ssaop.OpMIPS64MOVHstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3842  			break
  3843  		}
  3844  		x := v_1.Args[1]
  3845  		if ptr != v_1.Args[0] {
  3846  			break
  3847  		}
  3848  		v.Reset(ssaop.OpMIPS64MOVHUreg)
  3849  		v.AddArg(x)
  3850  		return true
  3851  	}
  3852  	// match: (MOVHUload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3853  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3854  	// result: (MOVHUload [off1+int32(off2)] {sym} ptr mem)
  3855  	for {
  3856  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3857  		sym := ssa.AuxToSym(v.Aux)
  3858  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3859  			break
  3860  		}
  3861  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3862  		ptr := v_0.Args[0]
  3863  		mem := v_1
  3864  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3865  			break
  3866  		}
  3867  		v.Reset(ssaop.OpMIPS64MOVHUload)
  3868  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3869  		v.Aux = ssa.SymToAux(sym)
  3870  		v.AddArg2(ptr, mem)
  3871  		return true
  3872  	}
  3873  	// match: (MOVHUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3874  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3875  	// result: (MOVHUload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3876  	for {
  3877  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3878  		sym1 := ssa.AuxToSym(v.Aux)
  3879  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3880  			break
  3881  		}
  3882  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3883  		sym2 := ssa.AuxToSym(v_0.Aux)
  3884  		ptr := v_0.Args[0]
  3885  		mem := v_1
  3886  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3887  			break
  3888  		}
  3889  		v.Reset(ssaop.OpMIPS64MOVHUload)
  3890  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3891  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3892  		v.AddArg2(ptr, mem)
  3893  		return true
  3894  	}
  3895  	// match: (MOVHUload [off] {sym} (SB) _)
  3896  	// cond: ssa.SymIsRO(sym)
  3897  	// result: (MOVVconst [int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
  3898  	for {
  3899  		off := ssa.AuxIntToInt32(v.AuxInt)
  3900  		sym := ssa.AuxToSym(v.Aux)
  3901  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  3902  			break
  3903  		}
  3904  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3905  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
  3906  		return true
  3907  	}
  3908  	return false
  3909  }
  3910  func rewriteValue_OpMIPS64MOVHUreg(v *ssa.Value) bool {
  3911  	v_0 := v.Args[0]
  3912  	// match: (MOVHUreg x:(MOVBUload _ _))
  3913  	// result: (MOVVreg x)
  3914  	for {
  3915  		x := v_0
  3916  		if x.Op != ssaop.OpMIPS64MOVBUload {
  3917  			break
  3918  		}
  3919  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3920  		v.AddArg(x)
  3921  		return true
  3922  	}
  3923  	// match: (MOVHUreg x:(MOVHUload _ _))
  3924  	// result: (MOVVreg x)
  3925  	for {
  3926  		x := v_0
  3927  		if x.Op != ssaop.OpMIPS64MOVHUload {
  3928  			break
  3929  		}
  3930  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3931  		v.AddArg(x)
  3932  		return true
  3933  	}
  3934  	// match: (MOVHUreg x:(MOVBUreg _))
  3935  	// result: (MOVVreg x)
  3936  	for {
  3937  		x := v_0
  3938  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  3939  			break
  3940  		}
  3941  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3942  		v.AddArg(x)
  3943  		return true
  3944  	}
  3945  	// match: (MOVHUreg x:(MOVHUreg _))
  3946  	// result: (MOVVreg x)
  3947  	for {
  3948  		x := v_0
  3949  		if x.Op != ssaop.OpMIPS64MOVHUreg {
  3950  			break
  3951  		}
  3952  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3953  		v.AddArg(x)
  3954  		return true
  3955  	}
  3956  	// match: (MOVHUreg (MOVVconst [c]))
  3957  	// result: (MOVVconst [int64(uint16(c))])
  3958  	for {
  3959  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  3960  			break
  3961  		}
  3962  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3963  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3964  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint16(c)))
  3965  		return true
  3966  	}
  3967  	return false
  3968  }
  3969  func rewriteValue_OpMIPS64MOVHload(v *ssa.Value) bool {
  3970  	v_1 := v.Args[1]
  3971  	v_0 := v.Args[0]
  3972  	b := v.Block
  3973  	config := b.Func.Config
  3974  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off] {sym} ptr x _))
  3975  	// result: (MOVHreg x)
  3976  	for {
  3977  		off := ssa.AuxIntToInt32(v.AuxInt)
  3978  		sym := ssa.AuxToSym(v.Aux)
  3979  		ptr := v_0
  3980  		if v_1.Op != ssaop.OpMIPS64MOVHstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3981  			break
  3982  		}
  3983  		x := v_1.Args[1]
  3984  		if ptr != v_1.Args[0] {
  3985  			break
  3986  		}
  3987  		v.Reset(ssaop.OpMIPS64MOVHreg)
  3988  		v.AddArg(x)
  3989  		return true
  3990  	}
  3991  	// match: (MOVHload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3992  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3993  	// result: (MOVHload [off1+int32(off2)] {sym} ptr mem)
  3994  	for {
  3995  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3996  		sym := ssa.AuxToSym(v.Aux)
  3997  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3998  			break
  3999  		}
  4000  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4001  		ptr := v_0.Args[0]
  4002  		mem := v_1
  4003  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4004  			break
  4005  		}
  4006  		v.Reset(ssaop.OpMIPS64MOVHload)
  4007  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4008  		v.Aux = ssa.SymToAux(sym)
  4009  		v.AddArg2(ptr, mem)
  4010  		return true
  4011  	}
  4012  	// match: (MOVHload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  4013  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4014  	// result: (MOVHload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  4015  	for {
  4016  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4017  		sym1 := ssa.AuxToSym(v.Aux)
  4018  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4019  			break
  4020  		}
  4021  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4022  		sym2 := ssa.AuxToSym(v_0.Aux)
  4023  		ptr := v_0.Args[0]
  4024  		mem := v_1
  4025  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4026  			break
  4027  		}
  4028  		v.Reset(ssaop.OpMIPS64MOVHload)
  4029  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4030  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4031  		v.AddArg2(ptr, mem)
  4032  		return true
  4033  	}
  4034  	// match: (MOVHload [off] {sym} (SB) _)
  4035  	// cond: ssa.SymIsRO(sym)
  4036  	// result: (MOVVconst [int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
  4037  	for {
  4038  		off := ssa.AuxIntToInt32(v.AuxInt)
  4039  		sym := ssa.AuxToSym(v.Aux)
  4040  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  4041  			break
  4042  		}
  4043  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4044  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
  4045  		return true
  4046  	}
  4047  	return false
  4048  }
  4049  func rewriteValue_OpMIPS64MOVHreg(v *ssa.Value) bool {
  4050  	v_0 := v.Args[0]
  4051  	// match: (MOVHreg x:(MOVBload _ _))
  4052  	// result: (MOVVreg x)
  4053  	for {
  4054  		x := v_0
  4055  		if x.Op != ssaop.OpMIPS64MOVBload {
  4056  			break
  4057  		}
  4058  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4059  		v.AddArg(x)
  4060  		return true
  4061  	}
  4062  	// match: (MOVHreg x:(MOVBUload _ _))
  4063  	// result: (MOVVreg x)
  4064  	for {
  4065  		x := v_0
  4066  		if x.Op != ssaop.OpMIPS64MOVBUload {
  4067  			break
  4068  		}
  4069  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4070  		v.AddArg(x)
  4071  		return true
  4072  	}
  4073  	// match: (MOVHreg x:(MOVHload _ _))
  4074  	// result: (MOVVreg x)
  4075  	for {
  4076  		x := v_0
  4077  		if x.Op != ssaop.OpMIPS64MOVHload {
  4078  			break
  4079  		}
  4080  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4081  		v.AddArg(x)
  4082  		return true
  4083  	}
  4084  	// match: (MOVHreg x:(MOVBreg _))
  4085  	// result: (MOVVreg x)
  4086  	for {
  4087  		x := v_0
  4088  		if x.Op != ssaop.OpMIPS64MOVBreg {
  4089  			break
  4090  		}
  4091  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4092  		v.AddArg(x)
  4093  		return true
  4094  	}
  4095  	// match: (MOVHreg x:(MOVBUreg _))
  4096  	// result: (MOVVreg x)
  4097  	for {
  4098  		x := v_0
  4099  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  4100  			break
  4101  		}
  4102  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4103  		v.AddArg(x)
  4104  		return true
  4105  	}
  4106  	// match: (MOVHreg x:(MOVHreg _))
  4107  	// result: (MOVVreg x)
  4108  	for {
  4109  		x := v_0
  4110  		if x.Op != ssaop.OpMIPS64MOVHreg {
  4111  			break
  4112  		}
  4113  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4114  		v.AddArg(x)
  4115  		return true
  4116  	}
  4117  	// match: (MOVHreg (MOVVconst [c]))
  4118  	// result: (MOVVconst [int64(int16(c))])
  4119  	for {
  4120  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4121  			break
  4122  		}
  4123  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4124  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4125  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(c)))
  4126  		return true
  4127  	}
  4128  	return false
  4129  }
  4130  func rewriteValue_OpMIPS64MOVHstore(v *ssa.Value) bool {
  4131  	v_2 := v.Args[2]
  4132  	v_1 := v.Args[1]
  4133  	v_0 := v.Args[0]
  4134  	b := v.Block
  4135  	config := b.Func.Config
  4136  	// match: (MOVHstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  4137  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4138  	// result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem)
  4139  	for {
  4140  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4141  		sym := ssa.AuxToSym(v.Aux)
  4142  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4143  			break
  4144  		}
  4145  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4146  		ptr := v_0.Args[0]
  4147  		val := v_1
  4148  		mem := v_2
  4149  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4150  			break
  4151  		}
  4152  		v.Reset(ssaop.OpMIPS64MOVHstore)
  4153  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4154  		v.Aux = ssa.SymToAux(sym)
  4155  		v.AddArg3(ptr, val, mem)
  4156  		return true
  4157  	}
  4158  	// match: (MOVHstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  4159  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4160  	// result: (MOVHstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  4161  	for {
  4162  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4163  		sym1 := ssa.AuxToSym(v.Aux)
  4164  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4165  			break
  4166  		}
  4167  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4168  		sym2 := ssa.AuxToSym(v_0.Aux)
  4169  		ptr := v_0.Args[0]
  4170  		val := v_1
  4171  		mem := v_2
  4172  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4173  			break
  4174  		}
  4175  		v.Reset(ssaop.OpMIPS64MOVHstore)
  4176  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4177  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4178  		v.AddArg3(ptr, val, mem)
  4179  		return true
  4180  	}
  4181  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  4182  	// result: (MOVHstore [off] {sym} ptr x mem)
  4183  	for {
  4184  		off := ssa.AuxIntToInt32(v.AuxInt)
  4185  		sym := ssa.AuxToSym(v.Aux)
  4186  		ptr := v_0
  4187  		if v_1.Op != ssaop.OpMIPS64MOVHreg {
  4188  			break
  4189  		}
  4190  		x := v_1.Args[0]
  4191  		mem := v_2
  4192  		v.Reset(ssaop.OpMIPS64MOVHstore)
  4193  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4194  		v.Aux = ssa.SymToAux(sym)
  4195  		v.AddArg3(ptr, x, mem)
  4196  		return true
  4197  	}
  4198  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  4199  	// result: (MOVHstore [off] {sym} ptr x mem)
  4200  	for {
  4201  		off := ssa.AuxIntToInt32(v.AuxInt)
  4202  		sym := ssa.AuxToSym(v.Aux)
  4203  		ptr := v_0
  4204  		if v_1.Op != ssaop.OpMIPS64MOVHUreg {
  4205  			break
  4206  		}
  4207  		x := v_1.Args[0]
  4208  		mem := v_2
  4209  		v.Reset(ssaop.OpMIPS64MOVHstore)
  4210  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4211  		v.Aux = ssa.SymToAux(sym)
  4212  		v.AddArg3(ptr, x, mem)
  4213  		return true
  4214  	}
  4215  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  4216  	// result: (MOVHstore [off] {sym} ptr x mem)
  4217  	for {
  4218  		off := ssa.AuxIntToInt32(v.AuxInt)
  4219  		sym := ssa.AuxToSym(v.Aux)
  4220  		ptr := v_0
  4221  		if v_1.Op != ssaop.OpMIPS64MOVWreg {
  4222  			break
  4223  		}
  4224  		x := v_1.Args[0]
  4225  		mem := v_2
  4226  		v.Reset(ssaop.OpMIPS64MOVHstore)
  4227  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4228  		v.Aux = ssa.SymToAux(sym)
  4229  		v.AddArg3(ptr, x, mem)
  4230  		return true
  4231  	}
  4232  	// match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
  4233  	// result: (MOVHstore [off] {sym} ptr x mem)
  4234  	for {
  4235  		off := ssa.AuxIntToInt32(v.AuxInt)
  4236  		sym := ssa.AuxToSym(v.Aux)
  4237  		ptr := v_0
  4238  		if v_1.Op != ssaop.OpMIPS64MOVWUreg {
  4239  			break
  4240  		}
  4241  		x := v_1.Args[0]
  4242  		mem := v_2
  4243  		v.Reset(ssaop.OpMIPS64MOVHstore)
  4244  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4245  		v.Aux = ssa.SymToAux(sym)
  4246  		v.AddArg3(ptr, x, mem)
  4247  		return true
  4248  	}
  4249  	return false
  4250  }
  4251  func rewriteValue_OpMIPS64MOVVload(v *ssa.Value) bool {
  4252  	v_1 := v.Args[1]
  4253  	v_0 := v.Args[0]
  4254  	b := v.Block
  4255  	config := b.Func.Config
  4256  	// match: (MOVVload [off] {sym} ptr (MOVDstore [off] {sym} ptr val _))
  4257  	// result: (MOVVfpgp val)
  4258  	for {
  4259  		off := ssa.AuxIntToInt32(v.AuxInt)
  4260  		sym := ssa.AuxToSym(v.Aux)
  4261  		ptr := v_0
  4262  		if v_1.Op != ssaop.OpMIPS64MOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  4263  			break
  4264  		}
  4265  		val := v_1.Args[1]
  4266  		if ptr != v_1.Args[0] {
  4267  			break
  4268  		}
  4269  		v.Reset(ssaop.OpMIPS64MOVVfpgp)
  4270  		v.AddArg(val)
  4271  		return true
  4272  	}
  4273  	// match: (MOVVload [off] {sym} ptr (MOVVstore [off] {sym} ptr x _))
  4274  	// result: (MOVVreg x)
  4275  	for {
  4276  		off := ssa.AuxIntToInt32(v.AuxInt)
  4277  		sym := ssa.AuxToSym(v.Aux)
  4278  		ptr := v_0
  4279  		if v_1.Op != ssaop.OpMIPS64MOVVstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  4280  			break
  4281  		}
  4282  		x := v_1.Args[1]
  4283  		if ptr != v_1.Args[0] {
  4284  			break
  4285  		}
  4286  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4287  		v.AddArg(x)
  4288  		return true
  4289  	}
  4290  	// match: (MOVVload [off1] {sym} (ADDVconst [off2] ptr) mem)
  4291  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4292  	// result: (MOVVload [off1+int32(off2)] {sym} ptr mem)
  4293  	for {
  4294  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4295  		sym := ssa.AuxToSym(v.Aux)
  4296  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4297  			break
  4298  		}
  4299  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4300  		ptr := v_0.Args[0]
  4301  		mem := v_1
  4302  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4303  			break
  4304  		}
  4305  		v.Reset(ssaop.OpMIPS64MOVVload)
  4306  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4307  		v.Aux = ssa.SymToAux(sym)
  4308  		v.AddArg2(ptr, mem)
  4309  		return true
  4310  	}
  4311  	// match: (MOVVload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  4312  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4313  	// result: (MOVVload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  4314  	for {
  4315  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4316  		sym1 := ssa.AuxToSym(v.Aux)
  4317  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4318  			break
  4319  		}
  4320  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4321  		sym2 := ssa.AuxToSym(v_0.Aux)
  4322  		ptr := v_0.Args[0]
  4323  		mem := v_1
  4324  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4325  			break
  4326  		}
  4327  		v.Reset(ssaop.OpMIPS64MOVVload)
  4328  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4329  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4330  		v.AddArg2(ptr, mem)
  4331  		return true
  4332  	}
  4333  	// match: (MOVVload [off] {sym} (SB) _)
  4334  	// cond: ssa.SymIsRO(sym)
  4335  	// result: (MOVVconst [int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
  4336  	for {
  4337  		off := ssa.AuxIntToInt32(v.AuxInt)
  4338  		sym := ssa.AuxToSym(v.Aux)
  4339  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  4340  			break
  4341  		}
  4342  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4343  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
  4344  		return true
  4345  	}
  4346  	return false
  4347  }
  4348  func rewriteValue_OpMIPS64MOVVnop(v *ssa.Value) bool {
  4349  	v_0 := v.Args[0]
  4350  	// match: (MOVVnop (MOVVconst [c]))
  4351  	// result: (MOVVconst [c])
  4352  	for {
  4353  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4354  			break
  4355  		}
  4356  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4357  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4358  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4359  		return true
  4360  	}
  4361  	return false
  4362  }
  4363  func rewriteValue_OpMIPS64MOVVreg(v *ssa.Value) bool {
  4364  	v_0 := v.Args[0]
  4365  	// match: (MOVVreg x)
  4366  	// cond: x.Uses == 1
  4367  	// result: (MOVVnop x)
  4368  	for {
  4369  		x := v_0
  4370  		if !(x.Uses == 1) {
  4371  			break
  4372  		}
  4373  		v.Reset(ssaop.OpMIPS64MOVVnop)
  4374  		v.AddArg(x)
  4375  		return true
  4376  	}
  4377  	// match: (MOVVreg (MOVVconst [c]))
  4378  	// result: (MOVVconst [c])
  4379  	for {
  4380  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4381  			break
  4382  		}
  4383  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4384  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4385  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4386  		return true
  4387  	}
  4388  	return false
  4389  }
  4390  func rewriteValue_OpMIPS64MOVVstore(v *ssa.Value) bool {
  4391  	v_2 := v.Args[2]
  4392  	v_1 := v.Args[1]
  4393  	v_0 := v.Args[0]
  4394  	b := v.Block
  4395  	config := b.Func.Config
  4396  	// match: (MOVVstore [off] {sym} ptr (MOVVfpgp val) mem)
  4397  	// result: (MOVDstore [off] {sym} ptr val mem)
  4398  	for {
  4399  		off := ssa.AuxIntToInt32(v.AuxInt)
  4400  		sym := ssa.AuxToSym(v.Aux)
  4401  		ptr := v_0
  4402  		if v_1.Op != ssaop.OpMIPS64MOVVfpgp {
  4403  			break
  4404  		}
  4405  		val := v_1.Args[0]
  4406  		mem := v_2
  4407  		v.Reset(ssaop.OpMIPS64MOVDstore)
  4408  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4409  		v.Aux = ssa.SymToAux(sym)
  4410  		v.AddArg3(ptr, val, mem)
  4411  		return true
  4412  	}
  4413  	// match: (MOVVstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  4414  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4415  	// result: (MOVVstore [off1+int32(off2)] {sym} ptr val mem)
  4416  	for {
  4417  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4418  		sym := ssa.AuxToSym(v.Aux)
  4419  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4420  			break
  4421  		}
  4422  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4423  		ptr := v_0.Args[0]
  4424  		val := v_1
  4425  		mem := v_2
  4426  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4427  			break
  4428  		}
  4429  		v.Reset(ssaop.OpMIPS64MOVVstore)
  4430  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4431  		v.Aux = ssa.SymToAux(sym)
  4432  		v.AddArg3(ptr, val, mem)
  4433  		return true
  4434  	}
  4435  	// match: (MOVVstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  4436  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4437  	// result: (MOVVstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  4438  	for {
  4439  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4440  		sym1 := ssa.AuxToSym(v.Aux)
  4441  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4442  			break
  4443  		}
  4444  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4445  		sym2 := ssa.AuxToSym(v_0.Aux)
  4446  		ptr := v_0.Args[0]
  4447  		val := v_1
  4448  		mem := v_2
  4449  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4450  			break
  4451  		}
  4452  		v.Reset(ssaop.OpMIPS64MOVVstore)
  4453  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4454  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4455  		v.AddArg3(ptr, val, mem)
  4456  		return true
  4457  	}
  4458  	return false
  4459  }
  4460  func rewriteValue_OpMIPS64MOVWUload(v *ssa.Value) bool {
  4461  	v_1 := v.Args[1]
  4462  	v_0 := v.Args[0]
  4463  	b := v.Block
  4464  	config := b.Func.Config
  4465  	typ := &b.Func.Config.Types
  4466  	// match: (MOVWUload [off] {sym} ptr (MOVFstore [off] {sym} ptr val _))
  4467  	// result: (ZeroExt32to64 (MOVWfpgp <typ.Float32> val))
  4468  	for {
  4469  		off := ssa.AuxIntToInt32(v.AuxInt)
  4470  		sym := ssa.AuxToSym(v.Aux)
  4471  		ptr := v_0
  4472  		if v_1.Op != ssaop.OpMIPS64MOVFstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  4473  			break
  4474  		}
  4475  		val := v_1.Args[1]
  4476  		if ptr != v_1.Args[0] {
  4477  			break
  4478  		}
  4479  		v.Reset(ssaop.OpZeroExt32to64)
  4480  		v0 := b.NewValue0(v_1.Pos, ssaop.OpMIPS64MOVWfpgp, typ.Float32)
  4481  		v0.AddArg(val)
  4482  		v.AddArg(v0)
  4483  		return true
  4484  	}
  4485  	// match: (MOVWUload [off] {sym} ptr (MOVWstore [off] {sym} ptr x _))
  4486  	// result: (MOVWUreg x)
  4487  	for {
  4488  		off := ssa.AuxIntToInt32(v.AuxInt)
  4489  		sym := ssa.AuxToSym(v.Aux)
  4490  		ptr := v_0
  4491  		if v_1.Op != ssaop.OpMIPS64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  4492  			break
  4493  		}
  4494  		x := v_1.Args[1]
  4495  		if ptr != v_1.Args[0] {
  4496  			break
  4497  		}
  4498  		v.Reset(ssaop.OpMIPS64MOVWUreg)
  4499  		v.AddArg(x)
  4500  		return true
  4501  	}
  4502  	// match: (MOVWUload [off1] {sym} (ADDVconst [off2] ptr) mem)
  4503  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4504  	// result: (MOVWUload [off1+int32(off2)] {sym} ptr mem)
  4505  	for {
  4506  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4507  		sym := ssa.AuxToSym(v.Aux)
  4508  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4509  			break
  4510  		}
  4511  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4512  		ptr := v_0.Args[0]
  4513  		mem := v_1
  4514  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4515  			break
  4516  		}
  4517  		v.Reset(ssaop.OpMIPS64MOVWUload)
  4518  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4519  		v.Aux = ssa.SymToAux(sym)
  4520  		v.AddArg2(ptr, mem)
  4521  		return true
  4522  	}
  4523  	// match: (MOVWUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  4524  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4525  	// result: (MOVWUload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  4526  	for {
  4527  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4528  		sym1 := ssa.AuxToSym(v.Aux)
  4529  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4530  			break
  4531  		}
  4532  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4533  		sym2 := ssa.AuxToSym(v_0.Aux)
  4534  		ptr := v_0.Args[0]
  4535  		mem := v_1
  4536  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4537  			break
  4538  		}
  4539  		v.Reset(ssaop.OpMIPS64MOVWUload)
  4540  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4541  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4542  		v.AddArg2(ptr, mem)
  4543  		return true
  4544  	}
  4545  	// match: (MOVWUload [off] {sym} (SB) _)
  4546  	// cond: ssa.SymIsRO(sym)
  4547  	// result: (MOVVconst [int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
  4548  	for {
  4549  		off := ssa.AuxIntToInt32(v.AuxInt)
  4550  		sym := ssa.AuxToSym(v.Aux)
  4551  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  4552  			break
  4553  		}
  4554  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4555  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
  4556  		return true
  4557  	}
  4558  	return false
  4559  }
  4560  func rewriteValue_OpMIPS64MOVWUreg(v *ssa.Value) bool {
  4561  	v_0 := v.Args[0]
  4562  	// match: (MOVWUreg x:(MOVBUload _ _))
  4563  	// result: (MOVVreg x)
  4564  	for {
  4565  		x := v_0
  4566  		if x.Op != ssaop.OpMIPS64MOVBUload {
  4567  			break
  4568  		}
  4569  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4570  		v.AddArg(x)
  4571  		return true
  4572  	}
  4573  	// match: (MOVWUreg x:(MOVHUload _ _))
  4574  	// result: (MOVVreg x)
  4575  	for {
  4576  		x := v_0
  4577  		if x.Op != ssaop.OpMIPS64MOVHUload {
  4578  			break
  4579  		}
  4580  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4581  		v.AddArg(x)
  4582  		return true
  4583  	}
  4584  	// match: (MOVWUreg x:(MOVWUload _ _))
  4585  	// result: (MOVVreg x)
  4586  	for {
  4587  		x := v_0
  4588  		if x.Op != ssaop.OpMIPS64MOVWUload {
  4589  			break
  4590  		}
  4591  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4592  		v.AddArg(x)
  4593  		return true
  4594  	}
  4595  	// match: (MOVWUreg x:(MOVBUreg _))
  4596  	// result: (MOVVreg x)
  4597  	for {
  4598  		x := v_0
  4599  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  4600  			break
  4601  		}
  4602  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4603  		v.AddArg(x)
  4604  		return true
  4605  	}
  4606  	// match: (MOVWUreg x:(MOVHUreg _))
  4607  	// result: (MOVVreg x)
  4608  	for {
  4609  		x := v_0
  4610  		if x.Op != ssaop.OpMIPS64MOVHUreg {
  4611  			break
  4612  		}
  4613  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4614  		v.AddArg(x)
  4615  		return true
  4616  	}
  4617  	// match: (MOVWUreg x:(MOVWUreg _))
  4618  	// result: (MOVVreg x)
  4619  	for {
  4620  		x := v_0
  4621  		if x.Op != ssaop.OpMIPS64MOVWUreg {
  4622  			break
  4623  		}
  4624  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4625  		v.AddArg(x)
  4626  		return true
  4627  	}
  4628  	// match: (MOVWUreg (MOVVconst [c]))
  4629  	// result: (MOVVconst [int64(uint32(c))])
  4630  	for {
  4631  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4632  			break
  4633  		}
  4634  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4635  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4636  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c)))
  4637  		return true
  4638  	}
  4639  	return false
  4640  }
  4641  func rewriteValue_OpMIPS64MOVWload(v *ssa.Value) bool {
  4642  	v_1 := v.Args[1]
  4643  	v_0 := v.Args[0]
  4644  	b := v.Block
  4645  	config := b.Func.Config
  4646  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off] {sym} ptr x _))
  4647  	// result: (MOVWreg x)
  4648  	for {
  4649  		off := ssa.AuxIntToInt32(v.AuxInt)
  4650  		sym := ssa.AuxToSym(v.Aux)
  4651  		ptr := v_0
  4652  		if v_1.Op != ssaop.OpMIPS64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  4653  			break
  4654  		}
  4655  		x := v_1.Args[1]
  4656  		if ptr != v_1.Args[0] {
  4657  			break
  4658  		}
  4659  		v.Reset(ssaop.OpMIPS64MOVWreg)
  4660  		v.AddArg(x)
  4661  		return true
  4662  	}
  4663  	// match: (MOVWload [off1] {sym} (ADDVconst [off2] ptr) mem)
  4664  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4665  	// result: (MOVWload [off1+int32(off2)] {sym} ptr mem)
  4666  	for {
  4667  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4668  		sym := ssa.AuxToSym(v.Aux)
  4669  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4670  			break
  4671  		}
  4672  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4673  		ptr := v_0.Args[0]
  4674  		mem := v_1
  4675  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4676  			break
  4677  		}
  4678  		v.Reset(ssaop.OpMIPS64MOVWload)
  4679  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4680  		v.Aux = ssa.SymToAux(sym)
  4681  		v.AddArg2(ptr, mem)
  4682  		return true
  4683  	}
  4684  	// match: (MOVWload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  4685  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4686  	// result: (MOVWload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  4687  	for {
  4688  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4689  		sym1 := ssa.AuxToSym(v.Aux)
  4690  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4691  			break
  4692  		}
  4693  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4694  		sym2 := ssa.AuxToSym(v_0.Aux)
  4695  		ptr := v_0.Args[0]
  4696  		mem := v_1
  4697  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4698  			break
  4699  		}
  4700  		v.Reset(ssaop.OpMIPS64MOVWload)
  4701  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4702  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4703  		v.AddArg2(ptr, mem)
  4704  		return true
  4705  	}
  4706  	// match: (MOVWload [off] {sym} (SB) _)
  4707  	// cond: ssa.SymIsRO(sym)
  4708  	// result: (MOVVconst [int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
  4709  	for {
  4710  		off := ssa.AuxIntToInt32(v.AuxInt)
  4711  		sym := ssa.AuxToSym(v.Aux)
  4712  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  4713  			break
  4714  		}
  4715  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4716  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
  4717  		return true
  4718  	}
  4719  	return false
  4720  }
  4721  func rewriteValue_OpMIPS64MOVWreg(v *ssa.Value) bool {
  4722  	v_0 := v.Args[0]
  4723  	// match: (MOVWreg x:(MOVBload _ _))
  4724  	// result: (MOVVreg x)
  4725  	for {
  4726  		x := v_0
  4727  		if x.Op != ssaop.OpMIPS64MOVBload {
  4728  			break
  4729  		}
  4730  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4731  		v.AddArg(x)
  4732  		return true
  4733  	}
  4734  	// match: (MOVWreg x:(MOVBUload _ _))
  4735  	// result: (MOVVreg x)
  4736  	for {
  4737  		x := v_0
  4738  		if x.Op != ssaop.OpMIPS64MOVBUload {
  4739  			break
  4740  		}
  4741  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4742  		v.AddArg(x)
  4743  		return true
  4744  	}
  4745  	// match: (MOVWreg x:(MOVHload _ _))
  4746  	// result: (MOVVreg x)
  4747  	for {
  4748  		x := v_0
  4749  		if x.Op != ssaop.OpMIPS64MOVHload {
  4750  			break
  4751  		}
  4752  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4753  		v.AddArg(x)
  4754  		return true
  4755  	}
  4756  	// match: (MOVWreg x:(MOVHUload _ _))
  4757  	// result: (MOVVreg x)
  4758  	for {
  4759  		x := v_0
  4760  		if x.Op != ssaop.OpMIPS64MOVHUload {
  4761  			break
  4762  		}
  4763  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4764  		v.AddArg(x)
  4765  		return true
  4766  	}
  4767  	// match: (MOVWreg x:(MOVWload _ _))
  4768  	// result: (MOVVreg x)
  4769  	for {
  4770  		x := v_0
  4771  		if x.Op != ssaop.OpMIPS64MOVWload {
  4772  			break
  4773  		}
  4774  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4775  		v.AddArg(x)
  4776  		return true
  4777  	}
  4778  	// match: (MOVWreg x:(MOVBreg _))
  4779  	// result: (MOVVreg x)
  4780  	for {
  4781  		x := v_0
  4782  		if x.Op != ssaop.OpMIPS64MOVBreg {
  4783  			break
  4784  		}
  4785  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4786  		v.AddArg(x)
  4787  		return true
  4788  	}
  4789  	// match: (MOVWreg x:(MOVBUreg _))
  4790  	// result: (MOVVreg x)
  4791  	for {
  4792  		x := v_0
  4793  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  4794  			break
  4795  		}
  4796  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4797  		v.AddArg(x)
  4798  		return true
  4799  	}
  4800  	// match: (MOVWreg x:(MOVHreg _))
  4801  	// result: (MOVVreg x)
  4802  	for {
  4803  		x := v_0
  4804  		if x.Op != ssaop.OpMIPS64MOVHreg {
  4805  			break
  4806  		}
  4807  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4808  		v.AddArg(x)
  4809  		return true
  4810  	}
  4811  	// match: (MOVWreg x:(MOVWreg _))
  4812  	// result: (MOVVreg x)
  4813  	for {
  4814  		x := v_0
  4815  		if x.Op != ssaop.OpMIPS64MOVWreg {
  4816  			break
  4817  		}
  4818  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4819  		v.AddArg(x)
  4820  		return true
  4821  	}
  4822  	// match: (MOVWreg (MOVVconst [c]))
  4823  	// result: (MOVVconst [int64(int32(c))])
  4824  	for {
  4825  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4826  			break
  4827  		}
  4828  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4829  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4830  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(c)))
  4831  		return true
  4832  	}
  4833  	return false
  4834  }
  4835  func rewriteValue_OpMIPS64MOVWstore(v *ssa.Value) bool {
  4836  	v_2 := v.Args[2]
  4837  	v_1 := v.Args[1]
  4838  	v_0 := v.Args[0]
  4839  	b := v.Block
  4840  	config := b.Func.Config
  4841  	// match: (MOVWstore [off] {sym} ptr (MOVWfpgp val) mem)
  4842  	// result: (MOVFstore [off] {sym} ptr val mem)
  4843  	for {
  4844  		off := ssa.AuxIntToInt32(v.AuxInt)
  4845  		sym := ssa.AuxToSym(v.Aux)
  4846  		ptr := v_0
  4847  		if v_1.Op != ssaop.OpMIPS64MOVWfpgp {
  4848  			break
  4849  		}
  4850  		val := v_1.Args[0]
  4851  		mem := v_2
  4852  		v.Reset(ssaop.OpMIPS64MOVFstore)
  4853  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4854  		v.Aux = ssa.SymToAux(sym)
  4855  		v.AddArg3(ptr, val, mem)
  4856  		return true
  4857  	}
  4858  	// match: (MOVWstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  4859  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4860  	// result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem)
  4861  	for {
  4862  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4863  		sym := ssa.AuxToSym(v.Aux)
  4864  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4865  			break
  4866  		}
  4867  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4868  		ptr := v_0.Args[0]
  4869  		val := v_1
  4870  		mem := v_2
  4871  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4872  			break
  4873  		}
  4874  		v.Reset(ssaop.OpMIPS64MOVWstore)
  4875  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4876  		v.Aux = ssa.SymToAux(sym)
  4877  		v.AddArg3(ptr, val, mem)
  4878  		return true
  4879  	}
  4880  	// match: (MOVWstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  4881  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4882  	// result: (MOVWstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  4883  	for {
  4884  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4885  		sym1 := ssa.AuxToSym(v.Aux)
  4886  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4887  			break
  4888  		}
  4889  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4890  		sym2 := ssa.AuxToSym(v_0.Aux)
  4891  		ptr := v_0.Args[0]
  4892  		val := v_1
  4893  		mem := v_2
  4894  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4895  			break
  4896  		}
  4897  		v.Reset(ssaop.OpMIPS64MOVWstore)
  4898  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4899  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4900  		v.AddArg3(ptr, val, mem)
  4901  		return true
  4902  	}
  4903  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  4904  	// result: (MOVWstore [off] {sym} ptr x mem)
  4905  	for {
  4906  		off := ssa.AuxIntToInt32(v.AuxInt)
  4907  		sym := ssa.AuxToSym(v.Aux)
  4908  		ptr := v_0
  4909  		if v_1.Op != ssaop.OpMIPS64MOVWreg {
  4910  			break
  4911  		}
  4912  		x := v_1.Args[0]
  4913  		mem := v_2
  4914  		v.Reset(ssaop.OpMIPS64MOVWstore)
  4915  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4916  		v.Aux = ssa.SymToAux(sym)
  4917  		v.AddArg3(ptr, x, mem)
  4918  		return true
  4919  	}
  4920  	// match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
  4921  	// result: (MOVWstore [off] {sym} ptr x mem)
  4922  	for {
  4923  		off := ssa.AuxIntToInt32(v.AuxInt)
  4924  		sym := ssa.AuxToSym(v.Aux)
  4925  		ptr := v_0
  4926  		if v_1.Op != ssaop.OpMIPS64MOVWUreg {
  4927  			break
  4928  		}
  4929  		x := v_1.Args[0]
  4930  		mem := v_2
  4931  		v.Reset(ssaop.OpMIPS64MOVWstore)
  4932  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4933  		v.Aux = ssa.SymToAux(sym)
  4934  		v.AddArg3(ptr, x, mem)
  4935  		return true
  4936  	}
  4937  	return false
  4938  }
  4939  func rewriteValue_OpMIPS64NEGV(v *ssa.Value) bool {
  4940  	v_0 := v.Args[0]
  4941  	// match: (NEGV (SUBV x y))
  4942  	// result: (SUBV y x)
  4943  	for {
  4944  		if v_0.Op != ssaop.OpMIPS64SUBV {
  4945  			break
  4946  		}
  4947  		y := v_0.Args[1]
  4948  		x := v_0.Args[0]
  4949  		v.Reset(ssaop.OpMIPS64SUBV)
  4950  		v.AddArg2(y, x)
  4951  		return true
  4952  	}
  4953  	// match: (NEGV (NEGV x))
  4954  	// result: x
  4955  	for {
  4956  		if v_0.Op != ssaop.OpMIPS64NEGV {
  4957  			break
  4958  		}
  4959  		x := v_0.Args[0]
  4960  		v.CopyOf(x)
  4961  		return true
  4962  	}
  4963  	// match: (NEGV (MOVVconst [c]))
  4964  	// result: (MOVVconst [-c])
  4965  	for {
  4966  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4967  			break
  4968  		}
  4969  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4970  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4971  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  4972  		return true
  4973  	}
  4974  	return false
  4975  }
  4976  func rewriteValue_OpMIPS64OR(v *ssa.Value) bool {
  4977  	v_1 := v.Args[1]
  4978  	v_0 := v.Args[0]
  4979  	// match: (OR x (MOVVconst [c]))
  4980  	// cond: ssa.Is32Bit(c)
  4981  	// result: (ORconst [c] x)
  4982  	for {
  4983  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4984  			x := v_0
  4985  			if v_1.Op != ssaop.OpMIPS64MOVVconst {
  4986  				continue
  4987  			}
  4988  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4989  			if !(ssa.Is32Bit(c)) {
  4990  				continue
  4991  			}
  4992  			v.Reset(ssaop.OpMIPS64ORconst)
  4993  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4994  			v.AddArg(x)
  4995  			return true
  4996  		}
  4997  		break
  4998  	}
  4999  	// match: (OR x x)
  5000  	// result: x
  5001  	for {
  5002  		x := v_0
  5003  		if x != v_1 {
  5004  			break
  5005  		}
  5006  		v.CopyOf(x)
  5007  		return true
  5008  	}
  5009  	return false
  5010  }
  5011  func rewriteValue_OpMIPS64ORconst(v *ssa.Value) bool {
  5012  	v_0 := v.Args[0]
  5013  	// match: (ORconst [0] x)
  5014  	// result: x
  5015  	for {
  5016  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  5017  			break
  5018  		}
  5019  		x := v_0
  5020  		v.CopyOf(x)
  5021  		return true
  5022  	}
  5023  	// match: (ORconst [-1] _)
  5024  	// result: (MOVVconst [-1])
  5025  	for {
  5026  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
  5027  			break
  5028  		}
  5029  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5030  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5031  		return true
  5032  	}
  5033  	// match: (ORconst [c] (MOVVconst [d]))
  5034  	// result: (MOVVconst [c|d])
  5035  	for {
  5036  		c := ssa.AuxIntToInt64(v.AuxInt)
  5037  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5038  			break
  5039  		}
  5040  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5041  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5042  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
  5043  		return true
  5044  	}
  5045  	// match: (ORconst [c] (ORconst [d] x))
  5046  	// cond: ssa.Is32Bit(c|d)
  5047  	// result: (ORconst [c|d] x)
  5048  	for {
  5049  		c := ssa.AuxIntToInt64(v.AuxInt)
  5050  		if v_0.Op != ssaop.OpMIPS64ORconst {
  5051  			break
  5052  		}
  5053  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5054  		x := v_0.Args[0]
  5055  		if !(ssa.Is32Bit(c | d)) {
  5056  			break
  5057  		}
  5058  		v.Reset(ssaop.OpMIPS64ORconst)
  5059  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
  5060  		v.AddArg(x)
  5061  		return true
  5062  	}
  5063  	return false
  5064  }
  5065  func rewriteValue_OpMIPS64SGT(v *ssa.Value) bool {
  5066  	v_1 := v.Args[1]
  5067  	v_0 := v.Args[0]
  5068  	// match: (SGT (MOVVconst [c]) x)
  5069  	// cond: ssa.Is32Bit(c)
  5070  	// result: (SGTconst [c] x)
  5071  	for {
  5072  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5073  			break
  5074  		}
  5075  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5076  		x := v_1
  5077  		if !(ssa.Is32Bit(c)) {
  5078  			break
  5079  		}
  5080  		v.Reset(ssaop.OpMIPS64SGTconst)
  5081  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5082  		v.AddArg(x)
  5083  		return true
  5084  	}
  5085  	// match: (SGT x x)
  5086  	// result: (MOVVconst [0])
  5087  	for {
  5088  		x := v_0
  5089  		if x != v_1 {
  5090  			break
  5091  		}
  5092  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5093  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5094  		return true
  5095  	}
  5096  	return false
  5097  }
  5098  func rewriteValue_OpMIPS64SGTU(v *ssa.Value) bool {
  5099  	v_1 := v.Args[1]
  5100  	v_0 := v.Args[0]
  5101  	// match: (SGTU (MOVVconst [c]) x)
  5102  	// cond: ssa.Is32Bit(c)
  5103  	// result: (SGTUconst [c] x)
  5104  	for {
  5105  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5106  			break
  5107  		}
  5108  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5109  		x := v_1
  5110  		if !(ssa.Is32Bit(c)) {
  5111  			break
  5112  		}
  5113  		v.Reset(ssaop.OpMIPS64SGTUconst)
  5114  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5115  		v.AddArg(x)
  5116  		return true
  5117  	}
  5118  	// match: (SGTU x x)
  5119  	// result: (MOVVconst [0])
  5120  	for {
  5121  		x := v_0
  5122  		if x != v_1 {
  5123  			break
  5124  		}
  5125  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5126  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5127  		return true
  5128  	}
  5129  	return false
  5130  }
  5131  func rewriteValue_OpMIPS64SGTUconst(v *ssa.Value) bool {
  5132  	v_0 := v.Args[0]
  5133  	// match: (SGTUconst [c] (MOVVconst [d]))
  5134  	// cond: uint64(c)>uint64(d)
  5135  	// result: (MOVVconst [1])
  5136  	for {
  5137  		c := ssa.AuxIntToInt64(v.AuxInt)
  5138  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5139  			break
  5140  		}
  5141  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5142  		if !(uint64(c) > uint64(d)) {
  5143  			break
  5144  		}
  5145  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5146  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5147  		return true
  5148  	}
  5149  	// match: (SGTUconst [c] (MOVVconst [d]))
  5150  	// cond: uint64(c)<=uint64(d)
  5151  	// result: (MOVVconst [0])
  5152  	for {
  5153  		c := ssa.AuxIntToInt64(v.AuxInt)
  5154  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5155  			break
  5156  		}
  5157  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5158  		if !(uint64(c) <= uint64(d)) {
  5159  			break
  5160  		}
  5161  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5162  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5163  		return true
  5164  	}
  5165  	// match: (SGTUconst [c] (MOVBUreg _))
  5166  	// cond: 0xff < uint64(c)
  5167  	// result: (MOVVconst [1])
  5168  	for {
  5169  		c := ssa.AuxIntToInt64(v.AuxInt)
  5170  		if v_0.Op != ssaop.OpMIPS64MOVBUreg || !(0xff < uint64(c)) {
  5171  			break
  5172  		}
  5173  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5174  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5175  		return true
  5176  	}
  5177  	// match: (SGTUconst [c] (MOVHUreg _))
  5178  	// cond: 0xffff < uint64(c)
  5179  	// result: (MOVVconst [1])
  5180  	for {
  5181  		c := ssa.AuxIntToInt64(v.AuxInt)
  5182  		if v_0.Op != ssaop.OpMIPS64MOVHUreg || !(0xffff < uint64(c)) {
  5183  			break
  5184  		}
  5185  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5186  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5187  		return true
  5188  	}
  5189  	// match: (SGTUconst [c] (ANDconst [m] _))
  5190  	// cond: uint64(m) < uint64(c)
  5191  	// result: (MOVVconst [1])
  5192  	for {
  5193  		c := ssa.AuxIntToInt64(v.AuxInt)
  5194  		if v_0.Op != ssaop.OpMIPS64ANDconst {
  5195  			break
  5196  		}
  5197  		m := ssa.AuxIntToInt64(v_0.AuxInt)
  5198  		if !(uint64(m) < uint64(c)) {
  5199  			break
  5200  		}
  5201  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5202  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5203  		return true
  5204  	}
  5205  	// match: (SGTUconst [c] (SRLVconst _ [d]))
  5206  	// cond: 0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)
  5207  	// result: (MOVVconst [1])
  5208  	for {
  5209  		c := ssa.AuxIntToInt64(v.AuxInt)
  5210  		if v_0.Op != ssaop.OpMIPS64SRLVconst {
  5211  			break
  5212  		}
  5213  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5214  		if !(0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)) {
  5215  			break
  5216  		}
  5217  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5218  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5219  		return true
  5220  	}
  5221  	return false
  5222  }
  5223  func rewriteValue_OpMIPS64SGTconst(v *ssa.Value) bool {
  5224  	v_0 := v.Args[0]
  5225  	// match: (SGTconst [c] (MOVVconst [d]))
  5226  	// cond: c>d
  5227  	// result: (MOVVconst [1])
  5228  	for {
  5229  		c := ssa.AuxIntToInt64(v.AuxInt)
  5230  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5231  			break
  5232  		}
  5233  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5234  		if !(c > d) {
  5235  			break
  5236  		}
  5237  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5238  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5239  		return true
  5240  	}
  5241  	// match: (SGTconst [c] (MOVVconst [d]))
  5242  	// cond: c<=d
  5243  	// result: (MOVVconst [0])
  5244  	for {
  5245  		c := ssa.AuxIntToInt64(v.AuxInt)
  5246  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5247  			break
  5248  		}
  5249  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5250  		if !(c <= d) {
  5251  			break
  5252  		}
  5253  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5254  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5255  		return true
  5256  	}
  5257  	// match: (SGTconst [c] (MOVBreg _))
  5258  	// cond: 0x7f < c
  5259  	// result: (MOVVconst [1])
  5260  	for {
  5261  		c := ssa.AuxIntToInt64(v.AuxInt)
  5262  		if v_0.Op != ssaop.OpMIPS64MOVBreg || !(0x7f < c) {
  5263  			break
  5264  		}
  5265  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5266  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5267  		return true
  5268  	}
  5269  	// match: (SGTconst [c] (MOVBreg _))
  5270  	// cond: c <= -0x80
  5271  	// result: (MOVVconst [0])
  5272  	for {
  5273  		c := ssa.AuxIntToInt64(v.AuxInt)
  5274  		if v_0.Op != ssaop.OpMIPS64MOVBreg || !(c <= -0x80) {
  5275  			break
  5276  		}
  5277  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5278  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5279  		return true
  5280  	}
  5281  	// match: (SGTconst [c] (MOVBUreg _))
  5282  	// cond: 0xff < c
  5283  	// result: (MOVVconst [1])
  5284  	for {
  5285  		c := ssa.AuxIntToInt64(v.AuxInt)
  5286  		if v_0.Op != ssaop.OpMIPS64MOVBUreg || !(0xff < c) {
  5287  			break
  5288  		}
  5289  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5290  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5291  		return true
  5292  	}
  5293  	// match: (SGTconst [c] (MOVBUreg _))
  5294  	// cond: c < 0
  5295  	// result: (MOVVconst [0])
  5296  	for {
  5297  		c := ssa.AuxIntToInt64(v.AuxInt)
  5298  		if v_0.Op != ssaop.OpMIPS64MOVBUreg || !(c < 0) {
  5299  			break
  5300  		}
  5301  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5302  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5303  		return true
  5304  	}
  5305  	// match: (SGTconst [c] (MOVHreg _))
  5306  	// cond: 0x7fff < c
  5307  	// result: (MOVVconst [1])
  5308  	for {
  5309  		c := ssa.AuxIntToInt64(v.AuxInt)
  5310  		if v_0.Op != ssaop.OpMIPS64MOVHreg || !(0x7fff < c) {
  5311  			break
  5312  		}
  5313  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5314  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5315  		return true
  5316  	}
  5317  	// match: (SGTconst [c] (MOVHreg _))
  5318  	// cond: c <= -0x8000
  5319  	// result: (MOVVconst [0])
  5320  	for {
  5321  		c := ssa.AuxIntToInt64(v.AuxInt)
  5322  		if v_0.Op != ssaop.OpMIPS64MOVHreg || !(c <= -0x8000) {
  5323  			break
  5324  		}
  5325  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5326  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5327  		return true
  5328  	}
  5329  	// match: (SGTconst [c] (MOVHUreg _))
  5330  	// cond: 0xffff < c
  5331  	// result: (MOVVconst [1])
  5332  	for {
  5333  		c := ssa.AuxIntToInt64(v.AuxInt)
  5334  		if v_0.Op != ssaop.OpMIPS64MOVHUreg || !(0xffff < c) {
  5335  			break
  5336  		}
  5337  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5338  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5339  		return true
  5340  	}
  5341  	// match: (SGTconst [c] (MOVHUreg _))
  5342  	// cond: c < 0
  5343  	// result: (MOVVconst [0])
  5344  	for {
  5345  		c := ssa.AuxIntToInt64(v.AuxInt)
  5346  		if v_0.Op != ssaop.OpMIPS64MOVHUreg || !(c < 0) {
  5347  			break
  5348  		}
  5349  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5350  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5351  		return true
  5352  	}
  5353  	// match: (SGTconst [c] (MOVWUreg _))
  5354  	// cond: c < 0
  5355  	// result: (MOVVconst [0])
  5356  	for {
  5357  		c := ssa.AuxIntToInt64(v.AuxInt)
  5358  		if v_0.Op != ssaop.OpMIPS64MOVWUreg || !(c < 0) {
  5359  			break
  5360  		}
  5361  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5362  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5363  		return true
  5364  	}
  5365  	// match: (SGTconst [c] (ANDconst [m] _))
  5366  	// cond: 0 <= m && m < c
  5367  	// result: (MOVVconst [1])
  5368  	for {
  5369  		c := ssa.AuxIntToInt64(v.AuxInt)
  5370  		if v_0.Op != ssaop.OpMIPS64ANDconst {
  5371  			break
  5372  		}
  5373  		m := ssa.AuxIntToInt64(v_0.AuxInt)
  5374  		if !(0 <= m && m < c) {
  5375  			break
  5376  		}
  5377  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5378  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5379  		return true
  5380  	}
  5381  	// match: (SGTconst [c] (SRLVconst _ [d]))
  5382  	// cond: 0 <= c && 0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)
  5383  	// result: (MOVVconst [1])
  5384  	for {
  5385  		c := ssa.AuxIntToInt64(v.AuxInt)
  5386  		if v_0.Op != ssaop.OpMIPS64SRLVconst {
  5387  			break
  5388  		}
  5389  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5390  		if !(0 <= c && 0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)) {
  5391  			break
  5392  		}
  5393  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5394  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5395  		return true
  5396  	}
  5397  	return false
  5398  }
  5399  func rewriteValue_OpMIPS64SLLV(v *ssa.Value) bool {
  5400  	v_1 := v.Args[1]
  5401  	v_0 := v.Args[0]
  5402  	// match: (SLLV _ (MOVVconst [c]))
  5403  	// cond: uint64(c)>=64
  5404  	// result: (MOVVconst [0])
  5405  	for {
  5406  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5407  			break
  5408  		}
  5409  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5410  		if !(uint64(c) >= 64) {
  5411  			break
  5412  		}
  5413  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5414  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5415  		return true
  5416  	}
  5417  	// match: (SLLV x (MOVVconst [c]))
  5418  	// result: (SLLVconst x [c])
  5419  	for {
  5420  		x := v_0
  5421  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5422  			break
  5423  		}
  5424  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5425  		v.Reset(ssaop.OpMIPS64SLLVconst)
  5426  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5427  		v.AddArg(x)
  5428  		return true
  5429  	}
  5430  	return false
  5431  }
  5432  func rewriteValue_OpMIPS64SLLVconst(v *ssa.Value) bool {
  5433  	v_0 := v.Args[0]
  5434  	// match: (SLLVconst [c] (MOVVconst [d]))
  5435  	// result: (MOVVconst [d<<uint64(c)])
  5436  	for {
  5437  		c := ssa.AuxIntToInt64(v.AuxInt)
  5438  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5439  			break
  5440  		}
  5441  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5442  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5443  		v.AuxInt = ssa.Int64ToAuxInt(d << uint64(c))
  5444  		return true
  5445  	}
  5446  	return false
  5447  }
  5448  func rewriteValue_OpMIPS64SRAV(v *ssa.Value) bool {
  5449  	v_1 := v.Args[1]
  5450  	v_0 := v.Args[0]
  5451  	// match: (SRAV x (MOVVconst [c]))
  5452  	// cond: uint64(c)>=64
  5453  	// result: (SRAVconst x [63])
  5454  	for {
  5455  		x := v_0
  5456  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5457  			break
  5458  		}
  5459  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5460  		if !(uint64(c) >= 64) {
  5461  			break
  5462  		}
  5463  		v.Reset(ssaop.OpMIPS64SRAVconst)
  5464  		v.AuxInt = ssa.Int64ToAuxInt(63)
  5465  		v.AddArg(x)
  5466  		return true
  5467  	}
  5468  	// match: (SRAV x (MOVVconst [c]))
  5469  	// result: (SRAVconst x [c])
  5470  	for {
  5471  		x := v_0
  5472  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5473  			break
  5474  		}
  5475  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5476  		v.Reset(ssaop.OpMIPS64SRAVconst)
  5477  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5478  		v.AddArg(x)
  5479  		return true
  5480  	}
  5481  	return false
  5482  }
  5483  func rewriteValue_OpMIPS64SRAVconst(v *ssa.Value) bool {
  5484  	v_0 := v.Args[0]
  5485  	// match: (SRAVconst [c] (MOVVconst [d]))
  5486  	// result: (MOVVconst [d>>uint64(c)])
  5487  	for {
  5488  		c := ssa.AuxIntToInt64(v.AuxInt)
  5489  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5490  			break
  5491  		}
  5492  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5493  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5494  		v.AuxInt = ssa.Int64ToAuxInt(d >> uint64(c))
  5495  		return true
  5496  	}
  5497  	return false
  5498  }
  5499  func rewriteValue_OpMIPS64SRLV(v *ssa.Value) bool {
  5500  	v_1 := v.Args[1]
  5501  	v_0 := v.Args[0]
  5502  	// match: (SRLV _ (MOVVconst [c]))
  5503  	// cond: uint64(c)>=64
  5504  	// result: (MOVVconst [0])
  5505  	for {
  5506  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5507  			break
  5508  		}
  5509  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5510  		if !(uint64(c) >= 64) {
  5511  			break
  5512  		}
  5513  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5514  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5515  		return true
  5516  	}
  5517  	// match: (SRLV x (MOVVconst [c]))
  5518  	// result: (SRLVconst x [c])
  5519  	for {
  5520  		x := v_0
  5521  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5522  			break
  5523  		}
  5524  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5525  		v.Reset(ssaop.OpMIPS64SRLVconst)
  5526  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5527  		v.AddArg(x)
  5528  		return true
  5529  	}
  5530  	return false
  5531  }
  5532  func rewriteValue_OpMIPS64SRLVconst(v *ssa.Value) bool {
  5533  	v_0 := v.Args[0]
  5534  	// match: (SRLVconst [c] (MOVVconst [d]))
  5535  	// result: (MOVVconst [int64(uint64(d)>>uint64(c))])
  5536  	for {
  5537  		c := ssa.AuxIntToInt64(v.AuxInt)
  5538  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5539  			break
  5540  		}
  5541  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5542  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5543  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(d) >> uint64(c)))
  5544  		return true
  5545  	}
  5546  	return false
  5547  }
  5548  func rewriteValue_OpMIPS64SUBV(v *ssa.Value) bool {
  5549  	v_1 := v.Args[1]
  5550  	v_0 := v.Args[0]
  5551  	// match: (SUBV x (MOVVconst [c]))
  5552  	// cond: ssa.Is32Bit(c)
  5553  	// result: (SUBVconst [c] x)
  5554  	for {
  5555  		x := v_0
  5556  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5557  			break
  5558  		}
  5559  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5560  		if !(ssa.Is32Bit(c)) {
  5561  			break
  5562  		}
  5563  		v.Reset(ssaop.OpMIPS64SUBVconst)
  5564  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5565  		v.AddArg(x)
  5566  		return true
  5567  	}
  5568  	// match: (SUBV x (NEGV y))
  5569  	// result: (ADDV x y)
  5570  	for {
  5571  		x := v_0
  5572  		if v_1.Op != ssaop.OpMIPS64NEGV {
  5573  			break
  5574  		}
  5575  		y := v_1.Args[0]
  5576  		v.Reset(ssaop.OpMIPS64ADDV)
  5577  		v.AddArg2(x, y)
  5578  		return true
  5579  	}
  5580  	// match: (SUBV x x)
  5581  	// result: (MOVVconst [0])
  5582  	for {
  5583  		x := v_0
  5584  		if x != v_1 {
  5585  			break
  5586  		}
  5587  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5588  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5589  		return true
  5590  	}
  5591  	// match: (SUBV (MOVVconst [0]) x)
  5592  	// result: (NEGV x)
  5593  	for {
  5594  		if v_0.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5595  			break
  5596  		}
  5597  		x := v_1
  5598  		v.Reset(ssaop.OpMIPS64NEGV)
  5599  		v.AddArg(x)
  5600  		return true
  5601  	}
  5602  	return false
  5603  }
  5604  func rewriteValue_OpMIPS64SUBVconst(v *ssa.Value) bool {
  5605  	v_0 := v.Args[0]
  5606  	// match: (SUBVconst [0] x)
  5607  	// result: x
  5608  	for {
  5609  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  5610  			break
  5611  		}
  5612  		x := v_0
  5613  		v.CopyOf(x)
  5614  		return true
  5615  	}
  5616  	// match: (SUBVconst [c] (MOVVconst [d]))
  5617  	// result: (MOVVconst [d-c])
  5618  	for {
  5619  		c := ssa.AuxIntToInt64(v.AuxInt)
  5620  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5621  			break
  5622  		}
  5623  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5624  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5625  		v.AuxInt = ssa.Int64ToAuxInt(d - c)
  5626  		return true
  5627  	}
  5628  	// match: (SUBVconst [c] (SUBVconst [d] x))
  5629  	// cond: ssa.Is32Bit(-c-d)
  5630  	// result: (ADDVconst [-c-d] x)
  5631  	for {
  5632  		c := ssa.AuxIntToInt64(v.AuxInt)
  5633  		if v_0.Op != ssaop.OpMIPS64SUBVconst {
  5634  			break
  5635  		}
  5636  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5637  		x := v_0.Args[0]
  5638  		if !(ssa.Is32Bit(-c - d)) {
  5639  			break
  5640  		}
  5641  		v.Reset(ssaop.OpMIPS64ADDVconst)
  5642  		v.AuxInt = ssa.Int64ToAuxInt(-c - d)
  5643  		v.AddArg(x)
  5644  		return true
  5645  	}
  5646  	// match: (SUBVconst [c] (ADDVconst [d] x))
  5647  	// cond: ssa.Is32Bit(-c+d)
  5648  	// result: (ADDVconst [-c+d] x)
  5649  	for {
  5650  		c := ssa.AuxIntToInt64(v.AuxInt)
  5651  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  5652  			break
  5653  		}
  5654  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5655  		x := v_0.Args[0]
  5656  		if !(ssa.Is32Bit(-c + d)) {
  5657  			break
  5658  		}
  5659  		v.Reset(ssaop.OpMIPS64ADDVconst)
  5660  		v.AuxInt = ssa.Int64ToAuxInt(-c + d)
  5661  		v.AddArg(x)
  5662  		return true
  5663  	}
  5664  	return false
  5665  }
  5666  func rewriteValue_OpMIPS64XOR(v *ssa.Value) bool {
  5667  	v_1 := v.Args[1]
  5668  	v_0 := v.Args[0]
  5669  	// match: (XOR x (MOVVconst [c]))
  5670  	// cond: ssa.Is32Bit(c)
  5671  	// result: (XORconst [c] x)
  5672  	for {
  5673  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5674  			x := v_0
  5675  			if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5676  				continue
  5677  			}
  5678  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  5679  			if !(ssa.Is32Bit(c)) {
  5680  				continue
  5681  			}
  5682  			v.Reset(ssaop.OpMIPS64XORconst)
  5683  			v.AuxInt = ssa.Int64ToAuxInt(c)
  5684  			v.AddArg(x)
  5685  			return true
  5686  		}
  5687  		break
  5688  	}
  5689  	// match: (XOR x x)
  5690  	// result: (MOVVconst [0])
  5691  	for {
  5692  		x := v_0
  5693  		if x != v_1 {
  5694  			break
  5695  		}
  5696  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5697  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5698  		return true
  5699  	}
  5700  	return false
  5701  }
  5702  func rewriteValue_OpMIPS64XORconst(v *ssa.Value) bool {
  5703  	v_0 := v.Args[0]
  5704  	// match: (XORconst [0] x)
  5705  	// result: x
  5706  	for {
  5707  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  5708  			break
  5709  		}
  5710  		x := v_0
  5711  		v.CopyOf(x)
  5712  		return true
  5713  	}
  5714  	// match: (XORconst [c] (MOVVconst [d]))
  5715  	// result: (MOVVconst [c^d])
  5716  	for {
  5717  		c := ssa.AuxIntToInt64(v.AuxInt)
  5718  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5719  			break
  5720  		}
  5721  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5722  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5723  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
  5724  		return true
  5725  	}
  5726  	// match: (XORconst [c] (XORconst [d] x))
  5727  	// cond: ssa.Is32Bit(c^d)
  5728  	// result: (XORconst [c^d] x)
  5729  	for {
  5730  		c := ssa.AuxIntToInt64(v.AuxInt)
  5731  		if v_0.Op != ssaop.OpMIPS64XORconst {
  5732  			break
  5733  		}
  5734  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5735  		x := v_0.Args[0]
  5736  		if !(ssa.Is32Bit(c ^ d)) {
  5737  			break
  5738  		}
  5739  		v.Reset(ssaop.OpMIPS64XORconst)
  5740  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
  5741  		v.AddArg(x)
  5742  		return true
  5743  	}
  5744  	return false
  5745  }
  5746  func rewriteValue_OpMod16(v *ssa.Value) bool {
  5747  	v_1 := v.Args[1]
  5748  	v_0 := v.Args[0]
  5749  	b := v.Block
  5750  	typ := &b.Func.Config.Types
  5751  	// match: (Mod16 x y)
  5752  	// result: (Select0 (DIVV (SignExt16to64 x) (SignExt16to64 y)))
  5753  	for {
  5754  		x := v_0
  5755  		y := v_1
  5756  		v.Reset(ssaop.OpSelect0)
  5757  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5758  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  5759  		v1.AddArg(x)
  5760  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  5761  		v2.AddArg(y)
  5762  		v0.AddArg2(v1, v2)
  5763  		v.AddArg(v0)
  5764  		return true
  5765  	}
  5766  }
  5767  func rewriteValue_OpMod16u(v *ssa.Value) bool {
  5768  	v_1 := v.Args[1]
  5769  	v_0 := v.Args[0]
  5770  	b := v.Block
  5771  	typ := &b.Func.Config.Types
  5772  	// match: (Mod16u x y)
  5773  	// result: (Select0 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)))
  5774  	for {
  5775  		x := v_0
  5776  		y := v_1
  5777  		v.Reset(ssaop.OpSelect0)
  5778  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5779  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  5780  		v1.AddArg(x)
  5781  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  5782  		v2.AddArg(y)
  5783  		v0.AddArg2(v1, v2)
  5784  		v.AddArg(v0)
  5785  		return true
  5786  	}
  5787  }
  5788  func rewriteValue_OpMod32(v *ssa.Value) bool {
  5789  	v_1 := v.Args[1]
  5790  	v_0 := v.Args[0]
  5791  	b := v.Block
  5792  	typ := &b.Func.Config.Types
  5793  	// match: (Mod32 x y)
  5794  	// result: (Select0 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
  5795  	for {
  5796  		x := v_0
  5797  		y := v_1
  5798  		v.Reset(ssaop.OpSelect0)
  5799  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5800  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  5801  		v1.AddArg(x)
  5802  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  5803  		v2.AddArg(y)
  5804  		v0.AddArg2(v1, v2)
  5805  		v.AddArg(v0)
  5806  		return true
  5807  	}
  5808  }
  5809  func rewriteValue_OpMod32u(v *ssa.Value) bool {
  5810  	v_1 := v.Args[1]
  5811  	v_0 := v.Args[0]
  5812  	b := v.Block
  5813  	typ := &b.Func.Config.Types
  5814  	// match: (Mod32u x y)
  5815  	// result: (Select0 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)))
  5816  	for {
  5817  		x := v_0
  5818  		y := v_1
  5819  		v.Reset(ssaop.OpSelect0)
  5820  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5821  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  5822  		v1.AddArg(x)
  5823  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  5824  		v2.AddArg(y)
  5825  		v0.AddArg2(v1, v2)
  5826  		v.AddArg(v0)
  5827  		return true
  5828  	}
  5829  }
  5830  func rewriteValue_OpMod64(v *ssa.Value) bool {
  5831  	v_1 := v.Args[1]
  5832  	v_0 := v.Args[0]
  5833  	b := v.Block
  5834  	typ := &b.Func.Config.Types
  5835  	// match: (Mod64 x y)
  5836  	// result: (Select0 (DIVV x y))
  5837  	for {
  5838  		x := v_0
  5839  		y := v_1
  5840  		v.Reset(ssaop.OpSelect0)
  5841  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5842  		v0.AddArg2(x, y)
  5843  		v.AddArg(v0)
  5844  		return true
  5845  	}
  5846  }
  5847  func rewriteValue_OpMod64u(v *ssa.Value) bool {
  5848  	v_1 := v.Args[1]
  5849  	v_0 := v.Args[0]
  5850  	b := v.Block
  5851  	typ := &b.Func.Config.Types
  5852  	// match: (Mod64u x y)
  5853  	// result: (Select0 (DIVVU x y))
  5854  	for {
  5855  		x := v_0
  5856  		y := v_1
  5857  		v.Reset(ssaop.OpSelect0)
  5858  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5859  		v0.AddArg2(x, y)
  5860  		v.AddArg(v0)
  5861  		return true
  5862  	}
  5863  }
  5864  func rewriteValue_OpMod8(v *ssa.Value) bool {
  5865  	v_1 := v.Args[1]
  5866  	v_0 := v.Args[0]
  5867  	b := v.Block
  5868  	typ := &b.Func.Config.Types
  5869  	// match: (Mod8 x y)
  5870  	// result: (Select0 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
  5871  	for {
  5872  		x := v_0
  5873  		y := v_1
  5874  		v.Reset(ssaop.OpSelect0)
  5875  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5876  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  5877  		v1.AddArg(x)
  5878  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  5879  		v2.AddArg(y)
  5880  		v0.AddArg2(v1, v2)
  5881  		v.AddArg(v0)
  5882  		return true
  5883  	}
  5884  }
  5885  func rewriteValue_OpMod8u(v *ssa.Value) bool {
  5886  	v_1 := v.Args[1]
  5887  	v_0 := v.Args[0]
  5888  	b := v.Block
  5889  	typ := &b.Func.Config.Types
  5890  	// match: (Mod8u x y)
  5891  	// result: (Select0 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)))
  5892  	for {
  5893  		x := v_0
  5894  		y := v_1
  5895  		v.Reset(ssaop.OpSelect0)
  5896  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5897  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  5898  		v1.AddArg(x)
  5899  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  5900  		v2.AddArg(y)
  5901  		v0.AddArg2(v1, v2)
  5902  		v.AddArg(v0)
  5903  		return true
  5904  	}
  5905  }
  5906  func rewriteValue_OpMove(v *ssa.Value) bool {
  5907  	v_2 := v.Args[2]
  5908  	v_1 := v.Args[1]
  5909  	v_0 := v.Args[0]
  5910  	b := v.Block
  5911  	config := b.Func.Config
  5912  	typ := &b.Func.Config.Types
  5913  	// match: (Move [0] _ _ mem)
  5914  	// result: mem
  5915  	for {
  5916  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  5917  			break
  5918  		}
  5919  		mem := v_2
  5920  		v.CopyOf(mem)
  5921  		return true
  5922  	}
  5923  	// match: (Move [1] dst src mem)
  5924  	// result: (MOVBstore dst (MOVBload src mem) mem)
  5925  	for {
  5926  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
  5927  			break
  5928  		}
  5929  		dst := v_0
  5930  		src := v_1
  5931  		mem := v_2
  5932  		v.Reset(ssaop.OpMIPS64MOVBstore)
  5933  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5934  		v0.AddArg2(src, mem)
  5935  		v.AddArg3(dst, v0, mem)
  5936  		return true
  5937  	}
  5938  	// match: (Move [2] {t} dst src mem)
  5939  	// cond: t.Alignment()%2 == 0
  5940  	// result: (MOVHstore dst (MOVHload src mem) mem)
  5941  	for {
  5942  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
  5943  			break
  5944  		}
  5945  		t := ssa.AuxToType(v.Aux)
  5946  		dst := v_0
  5947  		src := v_1
  5948  		mem := v_2
  5949  		if !(t.Alignment()%2 == 0) {
  5950  			break
  5951  		}
  5952  		v.Reset(ssaop.OpMIPS64MOVHstore)
  5953  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5954  		v0.AddArg2(src, mem)
  5955  		v.AddArg3(dst, v0, mem)
  5956  		return true
  5957  	}
  5958  	// match: (Move [2] dst src mem)
  5959  	// result: (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem))
  5960  	for {
  5961  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
  5962  			break
  5963  		}
  5964  		dst := v_0
  5965  		src := v_1
  5966  		mem := v_2
  5967  		v.Reset(ssaop.OpMIPS64MOVBstore)
  5968  		v.AuxInt = ssa.Int32ToAuxInt(1)
  5969  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5970  		v0.AuxInt = ssa.Int32ToAuxInt(1)
  5971  		v0.AddArg2(src, mem)
  5972  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  5973  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5974  		v2.AddArg2(src, mem)
  5975  		v1.AddArg3(dst, v2, mem)
  5976  		v.AddArg3(dst, v0, v1)
  5977  		return true
  5978  	}
  5979  	// match: (Move [4] {t} dst src mem)
  5980  	// cond: t.Alignment()%4 == 0
  5981  	// result: (MOVWstore dst (MOVWload src mem) mem)
  5982  	for {
  5983  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  5984  			break
  5985  		}
  5986  		t := ssa.AuxToType(v.Aux)
  5987  		dst := v_0
  5988  		src := v_1
  5989  		mem := v_2
  5990  		if !(t.Alignment()%4 == 0) {
  5991  			break
  5992  		}
  5993  		v.Reset(ssaop.OpMIPS64MOVWstore)
  5994  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  5995  		v0.AddArg2(src, mem)
  5996  		v.AddArg3(dst, v0, mem)
  5997  		return true
  5998  	}
  5999  	// match: (Move [4] {t} dst src mem)
  6000  	// cond: t.Alignment()%2 == 0
  6001  	// result: (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))
  6002  	for {
  6003  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  6004  			break
  6005  		}
  6006  		t := ssa.AuxToType(v.Aux)
  6007  		dst := v_0
  6008  		src := v_1
  6009  		mem := v_2
  6010  		if !(t.Alignment()%2 == 0) {
  6011  			break
  6012  		}
  6013  		v.Reset(ssaop.OpMIPS64MOVHstore)
  6014  		v.AuxInt = ssa.Int32ToAuxInt(2)
  6015  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  6016  		v0.AuxInt = ssa.Int32ToAuxInt(2)
  6017  		v0.AddArg2(src, mem)
  6018  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  6019  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  6020  		v2.AddArg2(src, mem)
  6021  		v1.AddArg3(dst, v2, mem)
  6022  		v.AddArg3(dst, v0, v1)
  6023  		return true
  6024  	}
  6025  	// match: (Move [4] dst src mem)
  6026  	// result: (MOVBstore [3] dst (MOVBload [3] src mem) (MOVBstore [2] dst (MOVBload [2] src mem) (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem))))
  6027  	for {
  6028  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  6029  			break
  6030  		}
  6031  		dst := v_0
  6032  		src := v_1
  6033  		mem := v_2
  6034  		v.Reset(ssaop.OpMIPS64MOVBstore)
  6035  		v.AuxInt = ssa.Int32ToAuxInt(3)
  6036  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  6037  		v0.AuxInt = ssa.Int32ToAuxInt(3)
  6038  		v0.AddArg2(src, mem)
  6039  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  6040  		v1.AuxInt = ssa.Int32ToAuxInt(2)
  6041  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  6042  		v2.AuxInt = ssa.Int32ToAuxInt(2)
  6043  		v2.AddArg2(src, mem)
  6044  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  6045  		v3.AuxInt = ssa.Int32ToAuxInt(1)
  6046  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  6047  		v4.AuxInt = ssa.Int32ToAuxInt(1)
  6048  		v4.AddArg2(src, mem)
  6049  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  6050  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  6051  		v6.AddArg2(src, mem)
  6052  		v5.AddArg3(dst, v6, mem)
  6053  		v3.AddArg3(dst, v4, v5)
  6054  		v1.AddArg3(dst, v2, v3)
  6055  		v.AddArg3(dst, v0, v1)
  6056  		return true
  6057  	}
  6058  	// match: (Move [8] {t} dst src mem)
  6059  	// cond: t.Alignment()%8 == 0
  6060  	// result: (MOVVstore dst (MOVVload src mem) mem)
  6061  	for {
  6062  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  6063  			break
  6064  		}
  6065  		t := ssa.AuxToType(v.Aux)
  6066  		dst := v_0
  6067  		src := v_1
  6068  		mem := v_2
  6069  		if !(t.Alignment()%8 == 0) {
  6070  			break
  6071  		}
  6072  		v.Reset(ssaop.OpMIPS64MOVVstore)
  6073  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  6074  		v0.AddArg2(src, mem)
  6075  		v.AddArg3(dst, v0, mem)
  6076  		return true
  6077  	}
  6078  	// match: (Move [8] {t} dst src mem)
  6079  	// cond: t.Alignment()%4 == 0
  6080  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  6081  	for {
  6082  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  6083  			break
  6084  		}
  6085  		t := ssa.AuxToType(v.Aux)
  6086  		dst := v_0
  6087  		src := v_1
  6088  		mem := v_2
  6089  		if !(t.Alignment()%4 == 0) {
  6090  			break
  6091  		}
  6092  		v.Reset(ssaop.OpMIPS64MOVWstore)
  6093  		v.AuxInt = ssa.Int32ToAuxInt(4)
  6094  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  6095  		v0.AuxInt = ssa.Int32ToAuxInt(4)
  6096  		v0.AddArg2(src, mem)
  6097  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  6098  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  6099  		v2.AddArg2(src, mem)
  6100  		v1.AddArg3(dst, v2, mem)
  6101  		v.AddArg3(dst, v0, v1)
  6102  		return true
  6103  	}
  6104  	// match: (Move [8] {t} dst src mem)
  6105  	// cond: t.Alignment()%2 == 0
  6106  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  6107  	for {
  6108  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  6109  			break
  6110  		}
  6111  		t := ssa.AuxToType(v.Aux)
  6112  		dst := v_0
  6113  		src := v_1
  6114  		mem := v_2
  6115  		if !(t.Alignment()%2 == 0) {
  6116  			break
  6117  		}
  6118  		v.Reset(ssaop.OpMIPS64MOVHstore)
  6119  		v.AuxInt = ssa.Int32ToAuxInt(6)
  6120  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  6121  		v0.AuxInt = ssa.Int32ToAuxInt(6)
  6122  		v0.AddArg2(src, mem)
  6123  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  6124  		v1.AuxInt = ssa.Int32ToAuxInt(4)
  6125  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  6126  		v2.AuxInt = ssa.Int32ToAuxInt(4)
  6127  		v2.AddArg2(src, mem)
  6128  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  6129  		v3.AuxInt = ssa.Int32ToAuxInt(2)
  6130  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  6131  		v4.AuxInt = ssa.Int32ToAuxInt(2)
  6132  		v4.AddArg2(src, mem)
  6133  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  6134  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  6135  		v6.AddArg2(src, mem)
  6136  		v5.AddArg3(dst, v6, mem)
  6137  		v3.AddArg3(dst, v4, v5)
  6138  		v1.AddArg3(dst, v2, v3)
  6139  		v.AddArg3(dst, v0, v1)
  6140  		return true
  6141  	}
  6142  	// match: (Move [3] dst src mem)
  6143  	// result: (MOVBstore [2] dst (MOVBload [2] src mem) (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem)))
  6144  	for {
  6145  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
  6146  			break
  6147  		}
  6148  		dst := v_0
  6149  		src := v_1
  6150  		mem := v_2
  6151  		v.Reset(ssaop.OpMIPS64MOVBstore)
  6152  		v.AuxInt = ssa.Int32ToAuxInt(2)
  6153  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  6154  		v0.AuxInt = ssa.Int32ToAuxInt(2)
  6155  		v0.AddArg2(src, mem)
  6156  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  6157  		v1.AuxInt = ssa.Int32ToAuxInt(1)
  6158  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  6159  		v2.AuxInt = ssa.Int32ToAuxInt(1)
  6160  		v2.AddArg2(src, mem)
  6161  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  6162  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  6163  		v4.AddArg2(src, mem)
  6164  		v3.AddArg3(dst, v4, mem)
  6165  		v1.AddArg3(dst, v2, v3)
  6166  		v.AddArg3(dst, v0, v1)
  6167  		return true
  6168  	}
  6169  	// match: (Move [6] {t} dst src mem)
  6170  	// cond: t.Alignment()%2 == 0
  6171  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  6172  	for {
  6173  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
  6174  			break
  6175  		}
  6176  		t := ssa.AuxToType(v.Aux)
  6177  		dst := v_0
  6178  		src := v_1
  6179  		mem := v_2
  6180  		if !(t.Alignment()%2 == 0) {
  6181  			break
  6182  		}
  6183  		v.Reset(ssaop.OpMIPS64MOVHstore)
  6184  		v.AuxInt = ssa.Int32ToAuxInt(4)
  6185  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  6186  		v0.AuxInt = ssa.Int32ToAuxInt(4)
  6187  		v0.AddArg2(src, mem)
  6188  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  6189  		v1.AuxInt = ssa.Int32ToAuxInt(2)
  6190  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  6191  		v2.AuxInt = ssa.Int32ToAuxInt(2)
  6192  		v2.AddArg2(src, mem)
  6193  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  6194  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  6195  		v4.AddArg2(src, mem)
  6196  		v3.AddArg3(dst, v4, mem)
  6197  		v1.AddArg3(dst, v2, v3)
  6198  		v.AddArg3(dst, v0, v1)
  6199  		return true
  6200  	}
  6201  	// match: (Move [12] {t} dst src mem)
  6202  	// cond: t.Alignment()%4 == 0
  6203  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  6204  	for {
  6205  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
  6206  			break
  6207  		}
  6208  		t := ssa.AuxToType(v.Aux)
  6209  		dst := v_0
  6210  		src := v_1
  6211  		mem := v_2
  6212  		if !(t.Alignment()%4 == 0) {
  6213  			break
  6214  		}
  6215  		v.Reset(ssaop.OpMIPS64MOVWstore)
  6216  		v.AuxInt = ssa.Int32ToAuxInt(8)
  6217  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  6218  		v0.AuxInt = ssa.Int32ToAuxInt(8)
  6219  		v0.AddArg2(src, mem)
  6220  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  6221  		v1.AuxInt = ssa.Int32ToAuxInt(4)
  6222  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  6223  		v2.AuxInt = ssa.Int32ToAuxInt(4)
  6224  		v2.AddArg2(src, mem)
  6225  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  6226  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  6227  		v4.AddArg2(src, mem)
  6228  		v3.AddArg3(dst, v4, mem)
  6229  		v1.AddArg3(dst, v2, v3)
  6230  		v.AddArg3(dst, v0, v1)
  6231  		return true
  6232  	}
  6233  	// match: (Move [16] {t} dst src mem)
  6234  	// cond: t.Alignment()%8 == 0
  6235  	// result: (MOVVstore [8] dst (MOVVload [8] src mem) (MOVVstore dst (MOVVload src mem) mem))
  6236  	for {
  6237  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
  6238  			break
  6239  		}
  6240  		t := ssa.AuxToType(v.Aux)
  6241  		dst := v_0
  6242  		src := v_1
  6243  		mem := v_2
  6244  		if !(t.Alignment()%8 == 0) {
  6245  			break
  6246  		}
  6247  		v.Reset(ssaop.OpMIPS64MOVVstore)
  6248  		v.AuxInt = ssa.Int32ToAuxInt(8)
  6249  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  6250  		v0.AuxInt = ssa.Int32ToAuxInt(8)
  6251  		v0.AddArg2(src, mem)
  6252  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  6253  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  6254  		v2.AddArg2(src, mem)
  6255  		v1.AddArg3(dst, v2, mem)
  6256  		v.AddArg3(dst, v0, v1)
  6257  		return true
  6258  	}
  6259  	// match: (Move [24] {t} dst src mem)
  6260  	// cond: t.Alignment()%8 == 0
  6261  	// result: (MOVVstore [16] dst (MOVVload [16] src mem) (MOVVstore [8] dst (MOVVload [8] src mem) (MOVVstore dst (MOVVload src mem) mem)))
  6262  	for {
  6263  		if ssa.AuxIntToInt64(v.AuxInt) != 24 {
  6264  			break
  6265  		}
  6266  		t := ssa.AuxToType(v.Aux)
  6267  		dst := v_0
  6268  		src := v_1
  6269  		mem := v_2
  6270  		if !(t.Alignment()%8 == 0) {
  6271  			break
  6272  		}
  6273  		v.Reset(ssaop.OpMIPS64MOVVstore)
  6274  		v.AuxInt = ssa.Int32ToAuxInt(16)
  6275  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  6276  		v0.AuxInt = ssa.Int32ToAuxInt(16)
  6277  		v0.AddArg2(src, mem)
  6278  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  6279  		v1.AuxInt = ssa.Int32ToAuxInt(8)
  6280  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  6281  		v2.AuxInt = ssa.Int32ToAuxInt(8)
  6282  		v2.AddArg2(src, mem)
  6283  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  6284  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  6285  		v4.AddArg2(src, mem)
  6286  		v3.AddArg3(dst, v4, mem)
  6287  		v1.AddArg3(dst, v2, v3)
  6288  		v.AddArg3(dst, v0, v1)
  6289  		return true
  6290  	}
  6291  	// match: (Move [s] {t} dst src mem)
  6292  	// cond: s%8 == 0 && s >= 24 && s <= 8*128 && t.Alignment()%8 == 0 && ssa.LogLargeCopyValue(v, s)
  6293  	// result: (DUFFCOPY [16 * (128 - s/8)] dst src mem)
  6294  	for {
  6295  		s := ssa.AuxIntToInt64(v.AuxInt)
  6296  		t := ssa.AuxToType(v.Aux)
  6297  		dst := v_0
  6298  		src := v_1
  6299  		mem := v_2
  6300  		if !(s%8 == 0 && s >= 24 && s <= 8*128 && t.Alignment()%8 == 0 && ssa.LogLargeCopyValue(v, s)) {
  6301  			break
  6302  		}
  6303  		v.Reset(ssaop.OpMIPS64DUFFCOPY)
  6304  		v.AuxInt = ssa.Int64ToAuxInt(16 * (128 - s/8))
  6305  		v.AddArg3(dst, src, mem)
  6306  		return true
  6307  	}
  6308  	// match: (Move [s] {t} dst src mem)
  6309  	// cond: s > 24 && ssa.LogLargeCopyValue(v, s) || t.Alignment()%8 != 0
  6310  	// result: (LoweredMove [t.Alignment()] dst src (ADDVconst <src.Type> src [s-ssa.MoveSize(t.Alignment(), config)]) mem)
  6311  	for {
  6312  		s := ssa.AuxIntToInt64(v.AuxInt)
  6313  		t := ssa.AuxToType(v.Aux)
  6314  		dst := v_0
  6315  		src := v_1
  6316  		mem := v_2
  6317  		if !(s > 24 && ssa.LogLargeCopyValue(v, s) || t.Alignment()%8 != 0) {
  6318  			break
  6319  		}
  6320  		v.Reset(ssaop.OpMIPS64LoweredMove)
  6321  		v.AuxInt = ssa.Int64ToAuxInt(t.Alignment())
  6322  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDVconst, src.Type)
  6323  		v0.AuxInt = ssa.Int64ToAuxInt(s - ssa.MoveSize(t.Alignment(), config))
  6324  		v0.AddArg(src)
  6325  		v.AddArg4(dst, src, v0, mem)
  6326  		return true
  6327  	}
  6328  	return false
  6329  }
  6330  func rewriteValue_OpMul16(v *ssa.Value) bool {
  6331  	v_1 := v.Args[1]
  6332  	v_0 := v.Args[0]
  6333  	b := v.Block
  6334  	typ := &b.Func.Config.Types
  6335  	// match: (Mul16 x y)
  6336  	// result: (Select1 (MULVU x y))
  6337  	for {
  6338  		x := v_0
  6339  		y := v_1
  6340  		v.Reset(ssaop.OpSelect1)
  6341  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  6342  		v0.AddArg2(x, y)
  6343  		v.AddArg(v0)
  6344  		return true
  6345  	}
  6346  }
  6347  func rewriteValue_OpMul32(v *ssa.Value) bool {
  6348  	v_1 := v.Args[1]
  6349  	v_0 := v.Args[0]
  6350  	b := v.Block
  6351  	typ := &b.Func.Config.Types
  6352  	// match: (Mul32 x y)
  6353  	// result: (Select1 (MULVU x y))
  6354  	for {
  6355  		x := v_0
  6356  		y := v_1
  6357  		v.Reset(ssaop.OpSelect1)
  6358  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  6359  		v0.AddArg2(x, y)
  6360  		v.AddArg(v0)
  6361  		return true
  6362  	}
  6363  }
  6364  func rewriteValue_OpMul64(v *ssa.Value) bool {
  6365  	v_1 := v.Args[1]
  6366  	v_0 := v.Args[0]
  6367  	b := v.Block
  6368  	typ := &b.Func.Config.Types
  6369  	// match: (Mul64 x y)
  6370  	// result: (Select1 (MULVU x y))
  6371  	for {
  6372  		x := v_0
  6373  		y := v_1
  6374  		v.Reset(ssaop.OpSelect1)
  6375  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  6376  		v0.AddArg2(x, y)
  6377  		v.AddArg(v0)
  6378  		return true
  6379  	}
  6380  }
  6381  func rewriteValue_OpMul8(v *ssa.Value) bool {
  6382  	v_1 := v.Args[1]
  6383  	v_0 := v.Args[0]
  6384  	b := v.Block
  6385  	typ := &b.Func.Config.Types
  6386  	// match: (Mul8 x y)
  6387  	// result: (Select1 (MULVU x y))
  6388  	for {
  6389  		x := v_0
  6390  		y := v_1
  6391  		v.Reset(ssaop.OpSelect1)
  6392  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  6393  		v0.AddArg2(x, y)
  6394  		v.AddArg(v0)
  6395  		return true
  6396  	}
  6397  }
  6398  func rewriteValue_OpNeq16(v *ssa.Value) bool {
  6399  	v_1 := v.Args[1]
  6400  	v_0 := v.Args[0]
  6401  	b := v.Block
  6402  	typ := &b.Func.Config.Types
  6403  	// match: (Neq16 x y)
  6404  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to64 y)) (MOVVconst [0]))
  6405  	for {
  6406  		x := v_0
  6407  		y := v_1
  6408  		v.Reset(ssaop.OpMIPS64SGTU)
  6409  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6410  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
  6411  		v1.AddArg(x)
  6412  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6413  		v2.AddArg(y)
  6414  		v0.AddArg2(v1, v2)
  6415  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6416  		v3.AuxInt = ssa.Int64ToAuxInt(0)
  6417  		v.AddArg2(v0, v3)
  6418  		return true
  6419  	}
  6420  }
  6421  func rewriteValue_OpNeq32(v *ssa.Value) bool {
  6422  	v_1 := v.Args[1]
  6423  	v_0 := v.Args[0]
  6424  	b := v.Block
  6425  	typ := &b.Func.Config.Types
  6426  	// match: (Neq32 x y)
  6427  	// result: (SGTU (XOR (ZeroExt32to64 x) (ZeroExt32to64 y)) (MOVVconst [0]))
  6428  	for {
  6429  		x := v_0
  6430  		y := v_1
  6431  		v.Reset(ssaop.OpMIPS64SGTU)
  6432  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6433  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6434  		v1.AddArg(x)
  6435  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6436  		v2.AddArg(y)
  6437  		v0.AddArg2(v1, v2)
  6438  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6439  		v3.AuxInt = ssa.Int64ToAuxInt(0)
  6440  		v.AddArg2(v0, v3)
  6441  		return true
  6442  	}
  6443  }
  6444  func rewriteValue_OpNeq32F(v *ssa.Value) bool {
  6445  	v_1 := v.Args[1]
  6446  	v_0 := v.Args[0]
  6447  	b := v.Block
  6448  	// match: (Neq32F x y)
  6449  	// result: (FPFlagFalse (CMPEQF x y))
  6450  	for {
  6451  		x := v_0
  6452  		y := v_1
  6453  		v.Reset(ssaop.OpMIPS64FPFlagFalse)
  6454  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPEQF, types.TypeFlags)
  6455  		v0.AddArg2(x, y)
  6456  		v.AddArg(v0)
  6457  		return true
  6458  	}
  6459  }
  6460  func rewriteValue_OpNeq64(v *ssa.Value) bool {
  6461  	v_1 := v.Args[1]
  6462  	v_0 := v.Args[0]
  6463  	b := v.Block
  6464  	typ := &b.Func.Config.Types
  6465  	// match: (Neq64 x y)
  6466  	// result: (SGTU (XOR x y) (MOVVconst [0]))
  6467  	for {
  6468  		x := v_0
  6469  		y := v_1
  6470  		v.Reset(ssaop.OpMIPS64SGTU)
  6471  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6472  		v0.AddArg2(x, y)
  6473  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6474  		v1.AuxInt = ssa.Int64ToAuxInt(0)
  6475  		v.AddArg2(v0, v1)
  6476  		return true
  6477  	}
  6478  }
  6479  func rewriteValue_OpNeq64F(v *ssa.Value) bool {
  6480  	v_1 := v.Args[1]
  6481  	v_0 := v.Args[0]
  6482  	b := v.Block
  6483  	// match: (Neq64F x y)
  6484  	// result: (FPFlagFalse (CMPEQD x y))
  6485  	for {
  6486  		x := v_0
  6487  		y := v_1
  6488  		v.Reset(ssaop.OpMIPS64FPFlagFalse)
  6489  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPEQD, types.TypeFlags)
  6490  		v0.AddArg2(x, y)
  6491  		v.AddArg(v0)
  6492  		return true
  6493  	}
  6494  }
  6495  func rewriteValue_OpNeq8(v *ssa.Value) bool {
  6496  	v_1 := v.Args[1]
  6497  	v_0 := v.Args[0]
  6498  	b := v.Block
  6499  	typ := &b.Func.Config.Types
  6500  	// match: (Neq8 x y)
  6501  	// result: (SGTU (XOR (ZeroExt8to64 x) (ZeroExt8to64 y)) (MOVVconst [0]))
  6502  	for {
  6503  		x := v_0
  6504  		y := v_1
  6505  		v.Reset(ssaop.OpMIPS64SGTU)
  6506  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6507  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6508  		v1.AddArg(x)
  6509  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6510  		v2.AddArg(y)
  6511  		v0.AddArg2(v1, v2)
  6512  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6513  		v3.AuxInt = ssa.Int64ToAuxInt(0)
  6514  		v.AddArg2(v0, v3)
  6515  		return true
  6516  	}
  6517  }
  6518  func rewriteValue_OpNeqPtr(v *ssa.Value) bool {
  6519  	v_1 := v.Args[1]
  6520  	v_0 := v.Args[0]
  6521  	b := v.Block
  6522  	typ := &b.Func.Config.Types
  6523  	// match: (NeqPtr x y)
  6524  	// result: (SGTU (XOR x y) (MOVVconst [0]))
  6525  	for {
  6526  		x := v_0
  6527  		y := v_1
  6528  		v.Reset(ssaop.OpMIPS64SGTU)
  6529  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6530  		v0.AddArg2(x, y)
  6531  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6532  		v1.AuxInt = ssa.Int64ToAuxInt(0)
  6533  		v.AddArg2(v0, v1)
  6534  		return true
  6535  	}
  6536  }
  6537  func rewriteValue_OpNot(v *ssa.Value) bool {
  6538  	v_0 := v.Args[0]
  6539  	// match: (Not x)
  6540  	// result: (XORconst [1] x)
  6541  	for {
  6542  		x := v_0
  6543  		v.Reset(ssaop.OpMIPS64XORconst)
  6544  		v.AuxInt = ssa.Int64ToAuxInt(1)
  6545  		v.AddArg(x)
  6546  		return true
  6547  	}
  6548  }
  6549  func rewriteValue_OpOffPtr(v *ssa.Value) bool {
  6550  	v_0 := v.Args[0]
  6551  	b := v.Block
  6552  	typ := &b.Func.Config.Types
  6553  	// match: (OffPtr [off] ptr:(SP))
  6554  	// cond: ssa.Is32Bit(off)
  6555  	// result: (MOVVaddr [int32(off)] ptr)
  6556  	for {
  6557  		off := ssa.AuxIntToInt64(v.AuxInt)
  6558  		ptr := v_0
  6559  		if ptr.Op != ssaop.OpSP || !(ssa.Is32Bit(off)) {
  6560  			break
  6561  		}
  6562  		v.Reset(ssaop.OpMIPS64MOVVaddr)
  6563  		v.AuxInt = ssa.Int32ToAuxInt(int32(off))
  6564  		v.AddArg(ptr)
  6565  		return true
  6566  	}
  6567  	// match: (OffPtr [off] ptr)
  6568  	// cond: ssa.Is32Bit(off)
  6569  	// result: (ADDVconst [off] ptr)
  6570  	for {
  6571  		off := ssa.AuxIntToInt64(v.AuxInt)
  6572  		ptr := v_0
  6573  		if !(ssa.Is32Bit(off)) {
  6574  			break
  6575  		}
  6576  		v.Reset(ssaop.OpMIPS64ADDVconst)
  6577  		v.AuxInt = ssa.Int64ToAuxInt(off)
  6578  		v.AddArg(ptr)
  6579  		return true
  6580  	}
  6581  	// match: (OffPtr [off] ptr)
  6582  	// cond: !ssa.Is32Bit(off)
  6583  	// result: (ADDV ptr (MOVVconst <typ.UInt64> [off]))
  6584  	for {
  6585  		off := ssa.AuxIntToInt64(v.AuxInt)
  6586  		ptr := v_0
  6587  		if !(!ssa.Is32Bit(off)) {
  6588  			break
  6589  		}
  6590  		v.Reset(ssaop.OpMIPS64ADDV)
  6591  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6592  		v0.AuxInt = ssa.Int64ToAuxInt(off)
  6593  		v.AddArg2(ptr, v0)
  6594  		return true
  6595  	}
  6596  	return false
  6597  }
  6598  func rewriteValue_OpRotateLeft16(v *ssa.Value) bool {
  6599  	v_1 := v.Args[1]
  6600  	v_0 := v.Args[0]
  6601  	b := v.Block
  6602  	typ := &b.Func.Config.Types
  6603  	// match: (RotateLeft16 <t> x (MOVVconst [c]))
  6604  	// result: (Or16 (Lsh16x64 <t> x (MOVVconst [c&15])) (Rsh16Ux64 <t> x (MOVVconst [-c&15])))
  6605  	for {
  6606  		t := v.Type
  6607  		x := v_0
  6608  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  6609  			break
  6610  		}
  6611  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6612  		v.Reset(ssaop.OpOr16)
  6613  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh16x64, t)
  6614  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6615  		v1.AuxInt = ssa.Int64ToAuxInt(c & 15)
  6616  		v0.AddArg2(x, v1)
  6617  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh16Ux64, t)
  6618  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6619  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 15)
  6620  		v2.AddArg2(x, v3)
  6621  		v.AddArg2(v0, v2)
  6622  		return true
  6623  	}
  6624  	return false
  6625  }
  6626  func rewriteValue_OpRotateLeft32(v *ssa.Value) bool {
  6627  	v_1 := v.Args[1]
  6628  	v_0 := v.Args[0]
  6629  	b := v.Block
  6630  	typ := &b.Func.Config.Types
  6631  	// match: (RotateLeft32 <t> x (MOVVconst [c]))
  6632  	// result: (Or32 (Lsh32x64 <t> x (MOVVconst [c&31])) (Rsh32Ux64 <t> x (MOVVconst [-c&31])))
  6633  	for {
  6634  		t := v.Type
  6635  		x := v_0
  6636  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  6637  			break
  6638  		}
  6639  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6640  		v.Reset(ssaop.OpOr32)
  6641  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh32x64, t)
  6642  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6643  		v1.AuxInt = ssa.Int64ToAuxInt(c & 31)
  6644  		v0.AddArg2(x, v1)
  6645  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh32Ux64, t)
  6646  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6647  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 31)
  6648  		v2.AddArg2(x, v3)
  6649  		v.AddArg2(v0, v2)
  6650  		return true
  6651  	}
  6652  	return false
  6653  }
  6654  func rewriteValue_OpRotateLeft64(v *ssa.Value) bool {
  6655  	v_1 := v.Args[1]
  6656  	v_0 := v.Args[0]
  6657  	b := v.Block
  6658  	typ := &b.Func.Config.Types
  6659  	// match: (RotateLeft64 <t> x (MOVVconst [c]))
  6660  	// result: (Or64 (Lsh64x64 <t> x (MOVVconst [c&63])) (Rsh64Ux64 <t> x (MOVVconst [-c&63])))
  6661  	for {
  6662  		t := v.Type
  6663  		x := v_0
  6664  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  6665  			break
  6666  		}
  6667  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6668  		v.Reset(ssaop.OpOr64)
  6669  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh64x64, t)
  6670  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6671  		v1.AuxInt = ssa.Int64ToAuxInt(c & 63)
  6672  		v0.AddArg2(x, v1)
  6673  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh64Ux64, t)
  6674  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6675  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 63)
  6676  		v2.AddArg2(x, v3)
  6677  		v.AddArg2(v0, v2)
  6678  		return true
  6679  	}
  6680  	return false
  6681  }
  6682  func rewriteValue_OpRotateLeft8(v *ssa.Value) bool {
  6683  	v_1 := v.Args[1]
  6684  	v_0 := v.Args[0]
  6685  	b := v.Block
  6686  	typ := &b.Func.Config.Types
  6687  	// match: (RotateLeft8 <t> x (MOVVconst [c]))
  6688  	// result: (Or8 (Lsh8x64 <t> x (MOVVconst [c&7])) (Rsh8Ux64 <t> x (MOVVconst [-c&7])))
  6689  	for {
  6690  		t := v.Type
  6691  		x := v_0
  6692  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  6693  			break
  6694  		}
  6695  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6696  		v.Reset(ssaop.OpOr8)
  6697  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh8x64, t)
  6698  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6699  		v1.AuxInt = ssa.Int64ToAuxInt(c & 7)
  6700  		v0.AddArg2(x, v1)
  6701  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh8Ux64, t)
  6702  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6703  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 7)
  6704  		v2.AddArg2(x, v3)
  6705  		v.AddArg2(v0, v2)
  6706  		return true
  6707  	}
  6708  	return false
  6709  }
  6710  func rewriteValue_OpRsh16Ux16(v *ssa.Value) bool {
  6711  	v_1 := v.Args[1]
  6712  	v_0 := v.Args[0]
  6713  	b := v.Block
  6714  	typ := &b.Func.Config.Types
  6715  	// match: (Rsh16Ux16 x y)
  6716  	// cond: ssa.ShiftIsBounded(v)
  6717  	// result: (SRLV (ZeroExt16to64 x) y)
  6718  	for {
  6719  		x := v_0
  6720  		y := v_1
  6721  		if !(ssa.ShiftIsBounded(v)) {
  6722  			break
  6723  		}
  6724  		v.Reset(ssaop.OpMIPS64SRLV)
  6725  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6726  		v0.AddArg(x)
  6727  		v.AddArg2(v0, y)
  6728  		return true
  6729  	}
  6730  	// match: (Rsh16Ux16 <t> x y)
  6731  	// cond: !ssa.ShiftIsBounded(v)
  6732  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt16to64 y)))
  6733  	for {
  6734  		t := v.Type
  6735  		x := v_0
  6736  		y := v_1
  6737  		if !(!ssa.ShiftIsBounded(v)) {
  6738  			break
  6739  		}
  6740  		v.Reset(ssaop.OpMIPS64AND)
  6741  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6742  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6743  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6744  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6745  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6746  		v3.AddArg(y)
  6747  		v1.AddArg2(v2, v3)
  6748  		v0.AddArg(v1)
  6749  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6750  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6751  		v5.AddArg(x)
  6752  		v4.AddArg2(v5, v3)
  6753  		v.AddArg2(v0, v4)
  6754  		return true
  6755  	}
  6756  	return false
  6757  }
  6758  func rewriteValue_OpRsh16Ux32(v *ssa.Value) bool {
  6759  	v_1 := v.Args[1]
  6760  	v_0 := v.Args[0]
  6761  	b := v.Block
  6762  	typ := &b.Func.Config.Types
  6763  	// match: (Rsh16Ux32 x y)
  6764  	// cond: ssa.ShiftIsBounded(v)
  6765  	// result: (SRLV (ZeroExt16to64 x) y)
  6766  	for {
  6767  		x := v_0
  6768  		y := v_1
  6769  		if !(ssa.ShiftIsBounded(v)) {
  6770  			break
  6771  		}
  6772  		v.Reset(ssaop.OpMIPS64SRLV)
  6773  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6774  		v0.AddArg(x)
  6775  		v.AddArg2(v0, y)
  6776  		return true
  6777  	}
  6778  	// match: (Rsh16Ux32 <t> x y)
  6779  	// cond: !ssa.ShiftIsBounded(v)
  6780  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt32to64 y)))
  6781  	for {
  6782  		t := v.Type
  6783  		x := v_0
  6784  		y := v_1
  6785  		if !(!ssa.ShiftIsBounded(v)) {
  6786  			break
  6787  		}
  6788  		v.Reset(ssaop.OpMIPS64AND)
  6789  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6790  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6791  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6792  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6793  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6794  		v3.AddArg(y)
  6795  		v1.AddArg2(v2, v3)
  6796  		v0.AddArg(v1)
  6797  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6798  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6799  		v5.AddArg(x)
  6800  		v4.AddArg2(v5, v3)
  6801  		v.AddArg2(v0, v4)
  6802  		return true
  6803  	}
  6804  	return false
  6805  }
  6806  func rewriteValue_OpRsh16Ux64(v *ssa.Value) bool {
  6807  	v_1 := v.Args[1]
  6808  	v_0 := v.Args[0]
  6809  	b := v.Block
  6810  	typ := &b.Func.Config.Types
  6811  	// match: (Rsh16Ux64 x y)
  6812  	// cond: ssa.ShiftIsBounded(v)
  6813  	// result: (SRLV (ZeroExt16to64 x) y)
  6814  	for {
  6815  		x := v_0
  6816  		y := v_1
  6817  		if !(ssa.ShiftIsBounded(v)) {
  6818  			break
  6819  		}
  6820  		v.Reset(ssaop.OpMIPS64SRLV)
  6821  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6822  		v0.AddArg(x)
  6823  		v.AddArg2(v0, y)
  6824  		return true
  6825  	}
  6826  	// match: (Rsh16Ux64 <t> x y)
  6827  	// cond: !ssa.ShiftIsBounded(v)
  6828  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt16to64 x) y))
  6829  	for {
  6830  		t := v.Type
  6831  		x := v_0
  6832  		y := v_1
  6833  		if !(!ssa.ShiftIsBounded(v)) {
  6834  			break
  6835  		}
  6836  		v.Reset(ssaop.OpMIPS64AND)
  6837  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6838  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6839  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6840  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6841  		v1.AddArg2(v2, y)
  6842  		v0.AddArg(v1)
  6843  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6844  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6845  		v4.AddArg(x)
  6846  		v3.AddArg2(v4, y)
  6847  		v.AddArg2(v0, v3)
  6848  		return true
  6849  	}
  6850  	return false
  6851  }
  6852  func rewriteValue_OpRsh16Ux8(v *ssa.Value) bool {
  6853  	v_1 := v.Args[1]
  6854  	v_0 := v.Args[0]
  6855  	b := v.Block
  6856  	typ := &b.Func.Config.Types
  6857  	// match: (Rsh16Ux8 x y)
  6858  	// cond: ssa.ShiftIsBounded(v)
  6859  	// result: (SRLV (ZeroExt16to64 x) y)
  6860  	for {
  6861  		x := v_0
  6862  		y := v_1
  6863  		if !(ssa.ShiftIsBounded(v)) {
  6864  			break
  6865  		}
  6866  		v.Reset(ssaop.OpMIPS64SRLV)
  6867  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6868  		v0.AddArg(x)
  6869  		v.AddArg2(v0, y)
  6870  		return true
  6871  	}
  6872  	// match: (Rsh16Ux8 <t> x y)
  6873  	// cond: !ssa.ShiftIsBounded(v)
  6874  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt8to64 y)))
  6875  	for {
  6876  		t := v.Type
  6877  		x := v_0
  6878  		y := v_1
  6879  		if !(!ssa.ShiftIsBounded(v)) {
  6880  			break
  6881  		}
  6882  		v.Reset(ssaop.OpMIPS64AND)
  6883  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6884  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6885  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6886  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6887  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6888  		v3.AddArg(y)
  6889  		v1.AddArg2(v2, v3)
  6890  		v0.AddArg(v1)
  6891  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6892  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6893  		v5.AddArg(x)
  6894  		v4.AddArg2(v5, v3)
  6895  		v.AddArg2(v0, v4)
  6896  		return true
  6897  	}
  6898  	return false
  6899  }
  6900  func rewriteValue_OpRsh16x16(v *ssa.Value) bool {
  6901  	v_1 := v.Args[1]
  6902  	v_0 := v.Args[0]
  6903  	b := v.Block
  6904  	typ := &b.Func.Config.Types
  6905  	// match: (Rsh16x16 x y)
  6906  	// cond: ssa.ShiftIsBounded(v)
  6907  	// result: (SRAV (SignExt16to64 x) y)
  6908  	for {
  6909  		x := v_0
  6910  		y := v_1
  6911  		if !(ssa.ShiftIsBounded(v)) {
  6912  			break
  6913  		}
  6914  		v.Reset(ssaop.OpMIPS64SRAV)
  6915  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  6916  		v0.AddArg(x)
  6917  		v.AddArg2(v0, y)
  6918  		return true
  6919  	}
  6920  	// match: (Rsh16x16 <t> x y)
  6921  	// cond: !ssa.ShiftIsBounded(v)
  6922  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  6923  	for {
  6924  		t := v.Type
  6925  		x := v_0
  6926  		y := v_1
  6927  		if !(!ssa.ShiftIsBounded(v)) {
  6928  			break
  6929  		}
  6930  		v.Reset(ssaop.OpMIPS64SRAV)
  6931  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  6932  		v0.AddArg(x)
  6933  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6934  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6935  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6936  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6937  		v4.AddArg(y)
  6938  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6939  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  6940  		v3.AddArg2(v4, v5)
  6941  		v2.AddArg(v3)
  6942  		v1.AddArg2(v2, v4)
  6943  		v.AddArg2(v0, v1)
  6944  		return true
  6945  	}
  6946  	return false
  6947  }
  6948  func rewriteValue_OpRsh16x32(v *ssa.Value) bool {
  6949  	v_1 := v.Args[1]
  6950  	v_0 := v.Args[0]
  6951  	b := v.Block
  6952  	typ := &b.Func.Config.Types
  6953  	// match: (Rsh16x32 x y)
  6954  	// cond: ssa.ShiftIsBounded(v)
  6955  	// result: (SRAV (SignExt16to64 x) y)
  6956  	for {
  6957  		x := v_0
  6958  		y := v_1
  6959  		if !(ssa.ShiftIsBounded(v)) {
  6960  			break
  6961  		}
  6962  		v.Reset(ssaop.OpMIPS64SRAV)
  6963  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  6964  		v0.AddArg(x)
  6965  		v.AddArg2(v0, y)
  6966  		return true
  6967  	}
  6968  	// match: (Rsh16x32 <t> x y)
  6969  	// cond: !ssa.ShiftIsBounded(v)
  6970  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  6971  	for {
  6972  		t := v.Type
  6973  		x := v_0
  6974  		y := v_1
  6975  		if !(!ssa.ShiftIsBounded(v)) {
  6976  			break
  6977  		}
  6978  		v.Reset(ssaop.OpMIPS64SRAV)
  6979  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  6980  		v0.AddArg(x)
  6981  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6982  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6983  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6984  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6985  		v4.AddArg(y)
  6986  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6987  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  6988  		v3.AddArg2(v4, v5)
  6989  		v2.AddArg(v3)
  6990  		v1.AddArg2(v2, v4)
  6991  		v.AddArg2(v0, v1)
  6992  		return true
  6993  	}
  6994  	return false
  6995  }
  6996  func rewriteValue_OpRsh16x64(v *ssa.Value) bool {
  6997  	v_1 := v.Args[1]
  6998  	v_0 := v.Args[0]
  6999  	b := v.Block
  7000  	typ := &b.Func.Config.Types
  7001  	// match: (Rsh16x64 x y)
  7002  	// cond: ssa.ShiftIsBounded(v)
  7003  	// result: (SRAV (SignExt16to64 x) y)
  7004  	for {
  7005  		x := v_0
  7006  		y := v_1
  7007  		if !(ssa.ShiftIsBounded(v)) {
  7008  			break
  7009  		}
  7010  		v.Reset(ssaop.OpMIPS64SRAV)
  7011  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  7012  		v0.AddArg(x)
  7013  		v.AddArg2(v0, y)
  7014  		return true
  7015  	}
  7016  	// match: (Rsh16x64 <t> x y)
  7017  	// cond: !ssa.ShiftIsBounded(v)
  7018  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  7019  	for {
  7020  		t := v.Type
  7021  		x := v_0
  7022  		y := v_1
  7023  		if !(!ssa.ShiftIsBounded(v)) {
  7024  			break
  7025  		}
  7026  		v.Reset(ssaop.OpMIPS64SRAV)
  7027  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  7028  		v0.AddArg(x)
  7029  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7030  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7031  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7032  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7033  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  7034  		v3.AddArg2(y, v4)
  7035  		v2.AddArg(v3)
  7036  		v1.AddArg2(v2, y)
  7037  		v.AddArg2(v0, v1)
  7038  		return true
  7039  	}
  7040  	return false
  7041  }
  7042  func rewriteValue_OpRsh16x8(v *ssa.Value) bool {
  7043  	v_1 := v.Args[1]
  7044  	v_0 := v.Args[0]
  7045  	b := v.Block
  7046  	typ := &b.Func.Config.Types
  7047  	// match: (Rsh16x8 x y)
  7048  	// cond: ssa.ShiftIsBounded(v)
  7049  	// result: (SRAV (SignExt16to64 x) y)
  7050  	for {
  7051  		x := v_0
  7052  		y := v_1
  7053  		if !(ssa.ShiftIsBounded(v)) {
  7054  			break
  7055  		}
  7056  		v.Reset(ssaop.OpMIPS64SRAV)
  7057  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  7058  		v0.AddArg(x)
  7059  		v.AddArg2(v0, y)
  7060  		return true
  7061  	}
  7062  	// match: (Rsh16x8 <t> x y)
  7063  	// cond: !ssa.ShiftIsBounded(v)
  7064  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  7065  	for {
  7066  		t := v.Type
  7067  		x := v_0
  7068  		y := v_1
  7069  		if !(!ssa.ShiftIsBounded(v)) {
  7070  			break
  7071  		}
  7072  		v.Reset(ssaop.OpMIPS64SRAV)
  7073  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  7074  		v0.AddArg(x)
  7075  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7076  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7077  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7078  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7079  		v4.AddArg(y)
  7080  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7081  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  7082  		v3.AddArg2(v4, v5)
  7083  		v2.AddArg(v3)
  7084  		v1.AddArg2(v2, v4)
  7085  		v.AddArg2(v0, v1)
  7086  		return true
  7087  	}
  7088  	return false
  7089  }
  7090  func rewriteValue_OpRsh32Ux16(v *ssa.Value) bool {
  7091  	v_1 := v.Args[1]
  7092  	v_0 := v.Args[0]
  7093  	b := v.Block
  7094  	typ := &b.Func.Config.Types
  7095  	// match: (Rsh32Ux16 x y)
  7096  	// cond: ssa.ShiftIsBounded(v)
  7097  	// result: (SRLV (ZeroExt32to64 x) y)
  7098  	for {
  7099  		x := v_0
  7100  		y := v_1
  7101  		if !(ssa.ShiftIsBounded(v)) {
  7102  			break
  7103  		}
  7104  		v.Reset(ssaop.OpMIPS64SRLV)
  7105  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7106  		v0.AddArg(x)
  7107  		v.AddArg2(v0, y)
  7108  		return true
  7109  	}
  7110  	// match: (Rsh32Ux16 <t> x y)
  7111  	// cond: !ssa.ShiftIsBounded(v)
  7112  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt16to64 y)))
  7113  	for {
  7114  		t := v.Type
  7115  		x := v_0
  7116  		y := v_1
  7117  		if !(!ssa.ShiftIsBounded(v)) {
  7118  			break
  7119  		}
  7120  		v.Reset(ssaop.OpMIPS64AND)
  7121  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7122  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7123  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7124  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7125  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  7126  		v3.AddArg(y)
  7127  		v1.AddArg2(v2, v3)
  7128  		v0.AddArg(v1)
  7129  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7130  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7131  		v5.AddArg(x)
  7132  		v4.AddArg2(v5, v3)
  7133  		v.AddArg2(v0, v4)
  7134  		return true
  7135  	}
  7136  	return false
  7137  }
  7138  func rewriteValue_OpRsh32Ux32(v *ssa.Value) bool {
  7139  	v_1 := v.Args[1]
  7140  	v_0 := v.Args[0]
  7141  	b := v.Block
  7142  	typ := &b.Func.Config.Types
  7143  	// match: (Rsh32Ux32 x y)
  7144  	// cond: ssa.ShiftIsBounded(v)
  7145  	// result: (SRLV (ZeroExt32to64 x) y)
  7146  	for {
  7147  		x := v_0
  7148  		y := v_1
  7149  		if !(ssa.ShiftIsBounded(v)) {
  7150  			break
  7151  		}
  7152  		v.Reset(ssaop.OpMIPS64SRLV)
  7153  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7154  		v0.AddArg(x)
  7155  		v.AddArg2(v0, y)
  7156  		return true
  7157  	}
  7158  	// match: (Rsh32Ux32 <t> x y)
  7159  	// cond: !ssa.ShiftIsBounded(v)
  7160  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt32to64 y)))
  7161  	for {
  7162  		t := v.Type
  7163  		x := v_0
  7164  		y := v_1
  7165  		if !(!ssa.ShiftIsBounded(v)) {
  7166  			break
  7167  		}
  7168  		v.Reset(ssaop.OpMIPS64AND)
  7169  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7170  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7171  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7172  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7173  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7174  		v3.AddArg(y)
  7175  		v1.AddArg2(v2, v3)
  7176  		v0.AddArg(v1)
  7177  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7178  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7179  		v5.AddArg(x)
  7180  		v4.AddArg2(v5, v3)
  7181  		v.AddArg2(v0, v4)
  7182  		return true
  7183  	}
  7184  	return false
  7185  }
  7186  func rewriteValue_OpRsh32Ux64(v *ssa.Value) bool {
  7187  	v_1 := v.Args[1]
  7188  	v_0 := v.Args[0]
  7189  	b := v.Block
  7190  	typ := &b.Func.Config.Types
  7191  	// match: (Rsh32Ux64 x y)
  7192  	// cond: ssa.ShiftIsBounded(v)
  7193  	// result: (SRLV (ZeroExt32to64 x) y)
  7194  	for {
  7195  		x := v_0
  7196  		y := v_1
  7197  		if !(ssa.ShiftIsBounded(v)) {
  7198  			break
  7199  		}
  7200  		v.Reset(ssaop.OpMIPS64SRLV)
  7201  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7202  		v0.AddArg(x)
  7203  		v.AddArg2(v0, y)
  7204  		return true
  7205  	}
  7206  	// match: (Rsh32Ux64 <t> x y)
  7207  	// cond: !ssa.ShiftIsBounded(v)
  7208  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt32to64 x) y))
  7209  	for {
  7210  		t := v.Type
  7211  		x := v_0
  7212  		y := v_1
  7213  		if !(!ssa.ShiftIsBounded(v)) {
  7214  			break
  7215  		}
  7216  		v.Reset(ssaop.OpMIPS64AND)
  7217  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7218  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7219  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7220  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7221  		v1.AddArg2(v2, y)
  7222  		v0.AddArg(v1)
  7223  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7224  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7225  		v4.AddArg(x)
  7226  		v3.AddArg2(v4, y)
  7227  		v.AddArg2(v0, v3)
  7228  		return true
  7229  	}
  7230  	return false
  7231  }
  7232  func rewriteValue_OpRsh32Ux8(v *ssa.Value) bool {
  7233  	v_1 := v.Args[1]
  7234  	v_0 := v.Args[0]
  7235  	b := v.Block
  7236  	typ := &b.Func.Config.Types
  7237  	// match: (Rsh32Ux8 x y)
  7238  	// cond: ssa.ShiftIsBounded(v)
  7239  	// result: (SRLV (ZeroExt32to64 x) y)
  7240  	for {
  7241  		x := v_0
  7242  		y := v_1
  7243  		if !(ssa.ShiftIsBounded(v)) {
  7244  			break
  7245  		}
  7246  		v.Reset(ssaop.OpMIPS64SRLV)
  7247  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7248  		v0.AddArg(x)
  7249  		v.AddArg2(v0, y)
  7250  		return true
  7251  	}
  7252  	// match: (Rsh32Ux8 <t> x y)
  7253  	// cond: !ssa.ShiftIsBounded(v)
  7254  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt8to64 y)))
  7255  	for {
  7256  		t := v.Type
  7257  		x := v_0
  7258  		y := v_1
  7259  		if !(!ssa.ShiftIsBounded(v)) {
  7260  			break
  7261  		}
  7262  		v.Reset(ssaop.OpMIPS64AND)
  7263  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7264  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7265  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7266  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7267  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7268  		v3.AddArg(y)
  7269  		v1.AddArg2(v2, v3)
  7270  		v0.AddArg(v1)
  7271  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7272  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7273  		v5.AddArg(x)
  7274  		v4.AddArg2(v5, v3)
  7275  		v.AddArg2(v0, v4)
  7276  		return true
  7277  	}
  7278  	return false
  7279  }
  7280  func rewriteValue_OpRsh32x16(v *ssa.Value) bool {
  7281  	v_1 := v.Args[1]
  7282  	v_0 := v.Args[0]
  7283  	b := v.Block
  7284  	typ := &b.Func.Config.Types
  7285  	// match: (Rsh32x16 x y)
  7286  	// cond: ssa.ShiftIsBounded(v)
  7287  	// result: (SRAV (SignExt32to64 x) y)
  7288  	for {
  7289  		x := v_0
  7290  		y := v_1
  7291  		if !(ssa.ShiftIsBounded(v)) {
  7292  			break
  7293  		}
  7294  		v.Reset(ssaop.OpMIPS64SRAV)
  7295  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  7296  		v0.AddArg(x)
  7297  		v.AddArg2(v0, y)
  7298  		return true
  7299  	}
  7300  	// match: (Rsh32x16 <t> x y)
  7301  	// cond: !ssa.ShiftIsBounded(v)
  7302  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  7303  	for {
  7304  		t := v.Type
  7305  		x := v_0
  7306  		y := v_1
  7307  		if !(!ssa.ShiftIsBounded(v)) {
  7308  			break
  7309  		}
  7310  		v.Reset(ssaop.OpMIPS64SRAV)
  7311  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  7312  		v0.AddArg(x)
  7313  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7314  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7315  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7316  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  7317  		v4.AddArg(y)
  7318  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7319  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  7320  		v3.AddArg2(v4, v5)
  7321  		v2.AddArg(v3)
  7322  		v1.AddArg2(v2, v4)
  7323  		v.AddArg2(v0, v1)
  7324  		return true
  7325  	}
  7326  	return false
  7327  }
  7328  func rewriteValue_OpRsh32x32(v *ssa.Value) bool {
  7329  	v_1 := v.Args[1]
  7330  	v_0 := v.Args[0]
  7331  	b := v.Block
  7332  	typ := &b.Func.Config.Types
  7333  	// match: (Rsh32x32 x y)
  7334  	// cond: ssa.ShiftIsBounded(v)
  7335  	// result: (SRAV (SignExt32to64 x) y)
  7336  	for {
  7337  		x := v_0
  7338  		y := v_1
  7339  		if !(ssa.ShiftIsBounded(v)) {
  7340  			break
  7341  		}
  7342  		v.Reset(ssaop.OpMIPS64SRAV)
  7343  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  7344  		v0.AddArg(x)
  7345  		v.AddArg2(v0, y)
  7346  		return true
  7347  	}
  7348  	// match: (Rsh32x32 <t> x y)
  7349  	// cond: !ssa.ShiftIsBounded(v)
  7350  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  7351  	for {
  7352  		t := v.Type
  7353  		x := v_0
  7354  		y := v_1
  7355  		if !(!ssa.ShiftIsBounded(v)) {
  7356  			break
  7357  		}
  7358  		v.Reset(ssaop.OpMIPS64SRAV)
  7359  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  7360  		v0.AddArg(x)
  7361  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7362  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7363  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7364  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7365  		v4.AddArg(y)
  7366  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7367  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  7368  		v3.AddArg2(v4, v5)
  7369  		v2.AddArg(v3)
  7370  		v1.AddArg2(v2, v4)
  7371  		v.AddArg2(v0, v1)
  7372  		return true
  7373  	}
  7374  	return false
  7375  }
  7376  func rewriteValue_OpRsh32x64(v *ssa.Value) bool {
  7377  	v_1 := v.Args[1]
  7378  	v_0 := v.Args[0]
  7379  	b := v.Block
  7380  	typ := &b.Func.Config.Types
  7381  	// match: (Rsh32x64 x y)
  7382  	// cond: ssa.ShiftIsBounded(v)
  7383  	// result: (SRAV (SignExt32to64 x) y)
  7384  	for {
  7385  		x := v_0
  7386  		y := v_1
  7387  		if !(ssa.ShiftIsBounded(v)) {
  7388  			break
  7389  		}
  7390  		v.Reset(ssaop.OpMIPS64SRAV)
  7391  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  7392  		v0.AddArg(x)
  7393  		v.AddArg2(v0, y)
  7394  		return true
  7395  	}
  7396  	// match: (Rsh32x64 <t> x y)
  7397  	// cond: !ssa.ShiftIsBounded(v)
  7398  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  7399  	for {
  7400  		t := v.Type
  7401  		x := v_0
  7402  		y := v_1
  7403  		if !(!ssa.ShiftIsBounded(v)) {
  7404  			break
  7405  		}
  7406  		v.Reset(ssaop.OpMIPS64SRAV)
  7407  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  7408  		v0.AddArg(x)
  7409  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7410  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7411  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7412  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7413  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  7414  		v3.AddArg2(y, v4)
  7415  		v2.AddArg(v3)
  7416  		v1.AddArg2(v2, y)
  7417  		v.AddArg2(v0, v1)
  7418  		return true
  7419  	}
  7420  	return false
  7421  }
  7422  func rewriteValue_OpRsh32x8(v *ssa.Value) bool {
  7423  	v_1 := v.Args[1]
  7424  	v_0 := v.Args[0]
  7425  	b := v.Block
  7426  	typ := &b.Func.Config.Types
  7427  	// match: (Rsh32x8 x y)
  7428  	// cond: ssa.ShiftIsBounded(v)
  7429  	// result: (SRAV (SignExt32to64 x) y)
  7430  	for {
  7431  		x := v_0
  7432  		y := v_1
  7433  		if !(ssa.ShiftIsBounded(v)) {
  7434  			break
  7435  		}
  7436  		v.Reset(ssaop.OpMIPS64SRAV)
  7437  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  7438  		v0.AddArg(x)
  7439  		v.AddArg2(v0, y)
  7440  		return true
  7441  	}
  7442  	// match: (Rsh32x8 <t> x y)
  7443  	// cond: !ssa.ShiftIsBounded(v)
  7444  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  7445  	for {
  7446  		t := v.Type
  7447  		x := v_0
  7448  		y := v_1
  7449  		if !(!ssa.ShiftIsBounded(v)) {
  7450  			break
  7451  		}
  7452  		v.Reset(ssaop.OpMIPS64SRAV)
  7453  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  7454  		v0.AddArg(x)
  7455  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7456  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7457  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7458  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7459  		v4.AddArg(y)
  7460  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7461  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  7462  		v3.AddArg2(v4, v5)
  7463  		v2.AddArg(v3)
  7464  		v1.AddArg2(v2, v4)
  7465  		v.AddArg2(v0, v1)
  7466  		return true
  7467  	}
  7468  	return false
  7469  }
  7470  func rewriteValue_OpRsh64Ux16(v *ssa.Value) bool {
  7471  	v_1 := v.Args[1]
  7472  	v_0 := v.Args[0]
  7473  	b := v.Block
  7474  	typ := &b.Func.Config.Types
  7475  	// match: (Rsh64Ux16 x y)
  7476  	// cond: ssa.ShiftIsBounded(v)
  7477  	// result: (SRLV x y)
  7478  	for {
  7479  		x := v_0
  7480  		y := v_1
  7481  		if !(ssa.ShiftIsBounded(v)) {
  7482  			break
  7483  		}
  7484  		v.Reset(ssaop.OpMIPS64SRLV)
  7485  		v.AddArg2(x, y)
  7486  		return true
  7487  	}
  7488  	// match: (Rsh64Ux16 <t> x y)
  7489  	// cond: !ssa.ShiftIsBounded(v)
  7490  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> x (ZeroExt16to64 y)))
  7491  	for {
  7492  		t := v.Type
  7493  		x := v_0
  7494  		y := v_1
  7495  		if !(!ssa.ShiftIsBounded(v)) {
  7496  			break
  7497  		}
  7498  		v.Reset(ssaop.OpMIPS64AND)
  7499  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7500  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7501  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7502  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7503  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  7504  		v3.AddArg(y)
  7505  		v1.AddArg2(v2, v3)
  7506  		v0.AddArg(v1)
  7507  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7508  		v4.AddArg2(x, v3)
  7509  		v.AddArg2(v0, v4)
  7510  		return true
  7511  	}
  7512  	return false
  7513  }
  7514  func rewriteValue_OpRsh64Ux32(v *ssa.Value) bool {
  7515  	v_1 := v.Args[1]
  7516  	v_0 := v.Args[0]
  7517  	b := v.Block
  7518  	typ := &b.Func.Config.Types
  7519  	// match: (Rsh64Ux32 x y)
  7520  	// cond: ssa.ShiftIsBounded(v)
  7521  	// result: (SRLV x y)
  7522  	for {
  7523  		x := v_0
  7524  		y := v_1
  7525  		if !(ssa.ShiftIsBounded(v)) {
  7526  			break
  7527  		}
  7528  		v.Reset(ssaop.OpMIPS64SRLV)
  7529  		v.AddArg2(x, y)
  7530  		return true
  7531  	}
  7532  	// match: (Rsh64Ux32 <t> x y)
  7533  	// cond: !ssa.ShiftIsBounded(v)
  7534  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> x (ZeroExt32to64 y)))
  7535  	for {
  7536  		t := v.Type
  7537  		x := v_0
  7538  		y := v_1
  7539  		if !(!ssa.ShiftIsBounded(v)) {
  7540  			break
  7541  		}
  7542  		v.Reset(ssaop.OpMIPS64AND)
  7543  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7544  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7545  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7546  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7547  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7548  		v3.AddArg(y)
  7549  		v1.AddArg2(v2, v3)
  7550  		v0.AddArg(v1)
  7551  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7552  		v4.AddArg2(x, v3)
  7553  		v.AddArg2(v0, v4)
  7554  		return true
  7555  	}
  7556  	return false
  7557  }
  7558  func rewriteValue_OpRsh64Ux64(v *ssa.Value) bool {
  7559  	v_1 := v.Args[1]
  7560  	v_0 := v.Args[0]
  7561  	b := v.Block
  7562  	typ := &b.Func.Config.Types
  7563  	// match: (Rsh64Ux64 x y)
  7564  	// cond: ssa.ShiftIsBounded(v)
  7565  	// result: (SRLV x y)
  7566  	for {
  7567  		x := v_0
  7568  		y := v_1
  7569  		if !(ssa.ShiftIsBounded(v)) {
  7570  			break
  7571  		}
  7572  		v.Reset(ssaop.OpMIPS64SRLV)
  7573  		v.AddArg2(x, y)
  7574  		return true
  7575  	}
  7576  	// match: (Rsh64Ux64 <t> x y)
  7577  	// cond: !ssa.ShiftIsBounded(v)
  7578  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> x y))
  7579  	for {
  7580  		t := v.Type
  7581  		x := v_0
  7582  		y := v_1
  7583  		if !(!ssa.ShiftIsBounded(v)) {
  7584  			break
  7585  		}
  7586  		v.Reset(ssaop.OpMIPS64AND)
  7587  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7588  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7589  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7590  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7591  		v1.AddArg2(v2, y)
  7592  		v0.AddArg(v1)
  7593  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7594  		v3.AddArg2(x, y)
  7595  		v.AddArg2(v0, v3)
  7596  		return true
  7597  	}
  7598  	return false
  7599  }
  7600  func rewriteValue_OpRsh64Ux8(v *ssa.Value) bool {
  7601  	v_1 := v.Args[1]
  7602  	v_0 := v.Args[0]
  7603  	b := v.Block
  7604  	typ := &b.Func.Config.Types
  7605  	// match: (Rsh64Ux8 x y)
  7606  	// cond: ssa.ShiftIsBounded(v)
  7607  	// result: (SRLV x y)
  7608  	for {
  7609  		x := v_0
  7610  		y := v_1
  7611  		if !(ssa.ShiftIsBounded(v)) {
  7612  			break
  7613  		}
  7614  		v.Reset(ssaop.OpMIPS64SRLV)
  7615  		v.AddArg2(x, y)
  7616  		return true
  7617  	}
  7618  	// match: (Rsh64Ux8 <t> x y)
  7619  	// cond: !ssa.ShiftIsBounded(v)
  7620  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> x (ZeroExt8to64 y)))
  7621  	for {
  7622  		t := v.Type
  7623  		x := v_0
  7624  		y := v_1
  7625  		if !(!ssa.ShiftIsBounded(v)) {
  7626  			break
  7627  		}
  7628  		v.Reset(ssaop.OpMIPS64AND)
  7629  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7630  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7631  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7632  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7633  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7634  		v3.AddArg(y)
  7635  		v1.AddArg2(v2, v3)
  7636  		v0.AddArg(v1)
  7637  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7638  		v4.AddArg2(x, v3)
  7639  		v.AddArg2(v0, v4)
  7640  		return true
  7641  	}
  7642  	return false
  7643  }
  7644  func rewriteValue_OpRsh64x16(v *ssa.Value) bool {
  7645  	v_1 := v.Args[1]
  7646  	v_0 := v.Args[0]
  7647  	b := v.Block
  7648  	typ := &b.Func.Config.Types
  7649  	// match: (Rsh64x16 x y)
  7650  	// cond: ssa.ShiftIsBounded(v)
  7651  	// result: (SRAV x y)
  7652  	for {
  7653  		x := v_0
  7654  		y := v_1
  7655  		if !(ssa.ShiftIsBounded(v)) {
  7656  			break
  7657  		}
  7658  		v.Reset(ssaop.OpMIPS64SRAV)
  7659  		v.AddArg2(x, y)
  7660  		return true
  7661  	}
  7662  	// match: (Rsh64x16 <t> x y)
  7663  	// cond: !ssa.ShiftIsBounded(v)
  7664  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  7665  	for {
  7666  		t := v.Type
  7667  		x := v_0
  7668  		y := v_1
  7669  		if !(!ssa.ShiftIsBounded(v)) {
  7670  			break
  7671  		}
  7672  		v.Reset(ssaop.OpMIPS64SRAV)
  7673  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7674  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7675  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7676  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  7677  		v3.AddArg(y)
  7678  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7679  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  7680  		v2.AddArg2(v3, v4)
  7681  		v1.AddArg(v2)
  7682  		v0.AddArg2(v1, v3)
  7683  		v.AddArg2(x, v0)
  7684  		return true
  7685  	}
  7686  	return false
  7687  }
  7688  func rewriteValue_OpRsh64x32(v *ssa.Value) bool {
  7689  	v_1 := v.Args[1]
  7690  	v_0 := v.Args[0]
  7691  	b := v.Block
  7692  	typ := &b.Func.Config.Types
  7693  	// match: (Rsh64x32 x y)
  7694  	// cond: ssa.ShiftIsBounded(v)
  7695  	// result: (SRAV x y)
  7696  	for {
  7697  		x := v_0
  7698  		y := v_1
  7699  		if !(ssa.ShiftIsBounded(v)) {
  7700  			break
  7701  		}
  7702  		v.Reset(ssaop.OpMIPS64SRAV)
  7703  		v.AddArg2(x, y)
  7704  		return true
  7705  	}
  7706  	// match: (Rsh64x32 <t> x y)
  7707  	// cond: !ssa.ShiftIsBounded(v)
  7708  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  7709  	for {
  7710  		t := v.Type
  7711  		x := v_0
  7712  		y := v_1
  7713  		if !(!ssa.ShiftIsBounded(v)) {
  7714  			break
  7715  		}
  7716  		v.Reset(ssaop.OpMIPS64SRAV)
  7717  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7718  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7719  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7720  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7721  		v3.AddArg(y)
  7722  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7723  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  7724  		v2.AddArg2(v3, v4)
  7725  		v1.AddArg(v2)
  7726  		v0.AddArg2(v1, v3)
  7727  		v.AddArg2(x, v0)
  7728  		return true
  7729  	}
  7730  	return false
  7731  }
  7732  func rewriteValue_OpRsh64x64(v *ssa.Value) bool {
  7733  	v_1 := v.Args[1]
  7734  	v_0 := v.Args[0]
  7735  	b := v.Block
  7736  	typ := &b.Func.Config.Types
  7737  	// match: (Rsh64x64 x y)
  7738  	// cond: ssa.ShiftIsBounded(v)
  7739  	// result: (SRAV x y)
  7740  	for {
  7741  		x := v_0
  7742  		y := v_1
  7743  		if !(ssa.ShiftIsBounded(v)) {
  7744  			break
  7745  		}
  7746  		v.Reset(ssaop.OpMIPS64SRAV)
  7747  		v.AddArg2(x, y)
  7748  		return true
  7749  	}
  7750  	// match: (Rsh64x64 <t> x y)
  7751  	// cond: !ssa.ShiftIsBounded(v)
  7752  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  7753  	for {
  7754  		t := v.Type
  7755  		x := v_0
  7756  		y := v_1
  7757  		if !(!ssa.ShiftIsBounded(v)) {
  7758  			break
  7759  		}
  7760  		v.Reset(ssaop.OpMIPS64SRAV)
  7761  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7762  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7763  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7764  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7765  		v3.AuxInt = ssa.Int64ToAuxInt(63)
  7766  		v2.AddArg2(y, v3)
  7767  		v1.AddArg(v2)
  7768  		v0.AddArg2(v1, y)
  7769  		v.AddArg2(x, v0)
  7770  		return true
  7771  	}
  7772  	return false
  7773  }
  7774  func rewriteValue_OpRsh64x8(v *ssa.Value) bool {
  7775  	v_1 := v.Args[1]
  7776  	v_0 := v.Args[0]
  7777  	b := v.Block
  7778  	typ := &b.Func.Config.Types
  7779  	// match: (Rsh64x8 x y)
  7780  	// cond: ssa.ShiftIsBounded(v)
  7781  	// result: (SRAV x y)
  7782  	for {
  7783  		x := v_0
  7784  		y := v_1
  7785  		if !(ssa.ShiftIsBounded(v)) {
  7786  			break
  7787  		}
  7788  		v.Reset(ssaop.OpMIPS64SRAV)
  7789  		v.AddArg2(x, y)
  7790  		return true
  7791  	}
  7792  	// match: (Rsh64x8 <t> x y)
  7793  	// cond: !ssa.ShiftIsBounded(v)
  7794  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  7795  	for {
  7796  		t := v.Type
  7797  		x := v_0
  7798  		y := v_1
  7799  		if !(!ssa.ShiftIsBounded(v)) {
  7800  			break
  7801  		}
  7802  		v.Reset(ssaop.OpMIPS64SRAV)
  7803  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7804  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7805  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7806  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7807  		v3.AddArg(y)
  7808  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7809  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  7810  		v2.AddArg2(v3, v4)
  7811  		v1.AddArg(v2)
  7812  		v0.AddArg2(v1, v3)
  7813  		v.AddArg2(x, v0)
  7814  		return true
  7815  	}
  7816  	return false
  7817  }
  7818  func rewriteValue_OpRsh8Ux16(v *ssa.Value) bool {
  7819  	v_1 := v.Args[1]
  7820  	v_0 := v.Args[0]
  7821  	b := v.Block
  7822  	typ := &b.Func.Config.Types
  7823  	// match: (Rsh8Ux16 x y)
  7824  	// cond: ssa.ShiftIsBounded(v)
  7825  	// result: (SRLV (ZeroExt8to64 x) y)
  7826  	for {
  7827  		x := v_0
  7828  		y := v_1
  7829  		if !(ssa.ShiftIsBounded(v)) {
  7830  			break
  7831  		}
  7832  		v.Reset(ssaop.OpMIPS64SRLV)
  7833  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7834  		v0.AddArg(x)
  7835  		v.AddArg2(v0, y)
  7836  		return true
  7837  	}
  7838  	// match: (Rsh8Ux16 <t> x y)
  7839  	// cond: !ssa.ShiftIsBounded(v)
  7840  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt16to64 y)))
  7841  	for {
  7842  		t := v.Type
  7843  		x := v_0
  7844  		y := v_1
  7845  		if !(!ssa.ShiftIsBounded(v)) {
  7846  			break
  7847  		}
  7848  		v.Reset(ssaop.OpMIPS64AND)
  7849  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7850  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7851  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7852  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7853  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  7854  		v3.AddArg(y)
  7855  		v1.AddArg2(v2, v3)
  7856  		v0.AddArg(v1)
  7857  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7858  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7859  		v5.AddArg(x)
  7860  		v4.AddArg2(v5, v3)
  7861  		v.AddArg2(v0, v4)
  7862  		return true
  7863  	}
  7864  	return false
  7865  }
  7866  func rewriteValue_OpRsh8Ux32(v *ssa.Value) bool {
  7867  	v_1 := v.Args[1]
  7868  	v_0 := v.Args[0]
  7869  	b := v.Block
  7870  	typ := &b.Func.Config.Types
  7871  	// match: (Rsh8Ux32 x y)
  7872  	// cond: ssa.ShiftIsBounded(v)
  7873  	// result: (SRLV (ZeroExt8to64 x) y)
  7874  	for {
  7875  		x := v_0
  7876  		y := v_1
  7877  		if !(ssa.ShiftIsBounded(v)) {
  7878  			break
  7879  		}
  7880  		v.Reset(ssaop.OpMIPS64SRLV)
  7881  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7882  		v0.AddArg(x)
  7883  		v.AddArg2(v0, y)
  7884  		return true
  7885  	}
  7886  	// match: (Rsh8Ux32 <t> x y)
  7887  	// cond: !ssa.ShiftIsBounded(v)
  7888  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt32to64 y)))
  7889  	for {
  7890  		t := v.Type
  7891  		x := v_0
  7892  		y := v_1
  7893  		if !(!ssa.ShiftIsBounded(v)) {
  7894  			break
  7895  		}
  7896  		v.Reset(ssaop.OpMIPS64AND)
  7897  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7898  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7899  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7900  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7901  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7902  		v3.AddArg(y)
  7903  		v1.AddArg2(v2, v3)
  7904  		v0.AddArg(v1)
  7905  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7906  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7907  		v5.AddArg(x)
  7908  		v4.AddArg2(v5, v3)
  7909  		v.AddArg2(v0, v4)
  7910  		return true
  7911  	}
  7912  	return false
  7913  }
  7914  func rewriteValue_OpRsh8Ux64(v *ssa.Value) bool {
  7915  	v_1 := v.Args[1]
  7916  	v_0 := v.Args[0]
  7917  	b := v.Block
  7918  	typ := &b.Func.Config.Types
  7919  	// match: (Rsh8Ux64 x y)
  7920  	// cond: ssa.ShiftIsBounded(v)
  7921  	// result: (SRLV (ZeroExt8to64 x) y)
  7922  	for {
  7923  		x := v_0
  7924  		y := v_1
  7925  		if !(ssa.ShiftIsBounded(v)) {
  7926  			break
  7927  		}
  7928  		v.Reset(ssaop.OpMIPS64SRLV)
  7929  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7930  		v0.AddArg(x)
  7931  		v.AddArg2(v0, y)
  7932  		return true
  7933  	}
  7934  	// match: (Rsh8Ux64 <t> x y)
  7935  	// cond: !ssa.ShiftIsBounded(v)
  7936  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt8to64 x) y))
  7937  	for {
  7938  		t := v.Type
  7939  		x := v_0
  7940  		y := v_1
  7941  		if !(!ssa.ShiftIsBounded(v)) {
  7942  			break
  7943  		}
  7944  		v.Reset(ssaop.OpMIPS64AND)
  7945  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7946  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7947  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7948  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7949  		v1.AddArg2(v2, y)
  7950  		v0.AddArg(v1)
  7951  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7952  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7953  		v4.AddArg(x)
  7954  		v3.AddArg2(v4, y)
  7955  		v.AddArg2(v0, v3)
  7956  		return true
  7957  	}
  7958  	return false
  7959  }
  7960  func rewriteValue_OpRsh8Ux8(v *ssa.Value) bool {
  7961  	v_1 := v.Args[1]
  7962  	v_0 := v.Args[0]
  7963  	b := v.Block
  7964  	typ := &b.Func.Config.Types
  7965  	// match: (Rsh8Ux8 x y)
  7966  	// cond: ssa.ShiftIsBounded(v)
  7967  	// result: (SRLV (ZeroExt8to64 x) y)
  7968  	for {
  7969  		x := v_0
  7970  		y := v_1
  7971  		if !(ssa.ShiftIsBounded(v)) {
  7972  			break
  7973  		}
  7974  		v.Reset(ssaop.OpMIPS64SRLV)
  7975  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7976  		v0.AddArg(x)
  7977  		v.AddArg2(v0, y)
  7978  		return true
  7979  	}
  7980  	// match: (Rsh8Ux8 <t> x y)
  7981  	// cond: !ssa.ShiftIsBounded(v)
  7982  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt8to64 y)))
  7983  	for {
  7984  		t := v.Type
  7985  		x := v_0
  7986  		y := v_1
  7987  		if !(!ssa.ShiftIsBounded(v)) {
  7988  			break
  7989  		}
  7990  		v.Reset(ssaop.OpMIPS64AND)
  7991  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7992  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7993  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7994  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7995  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7996  		v3.AddArg(y)
  7997  		v1.AddArg2(v2, v3)
  7998  		v0.AddArg(v1)
  7999  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  8000  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  8001  		v5.AddArg(x)
  8002  		v4.AddArg2(v5, v3)
  8003  		v.AddArg2(v0, v4)
  8004  		return true
  8005  	}
  8006  	return false
  8007  }
  8008  func rewriteValue_OpRsh8x16(v *ssa.Value) bool {
  8009  	v_1 := v.Args[1]
  8010  	v_0 := v.Args[0]
  8011  	b := v.Block
  8012  	typ := &b.Func.Config.Types
  8013  	// match: (Rsh8x16 x y)
  8014  	// cond: ssa.ShiftIsBounded(v)
  8015  	// result: (SRAV (SignExt8to64 x) y)
  8016  	for {
  8017  		x := v_0
  8018  		y := v_1
  8019  		if !(ssa.ShiftIsBounded(v)) {
  8020  			break
  8021  		}
  8022  		v.Reset(ssaop.OpMIPS64SRAV)
  8023  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  8024  		v0.AddArg(x)
  8025  		v.AddArg2(v0, y)
  8026  		return true
  8027  	}
  8028  	// match: (Rsh8x16 <t> x y)
  8029  	// cond: !ssa.ShiftIsBounded(v)
  8030  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  8031  	for {
  8032  		t := v.Type
  8033  		x := v_0
  8034  		y := v_1
  8035  		if !(!ssa.ShiftIsBounded(v)) {
  8036  			break
  8037  		}
  8038  		v.Reset(ssaop.OpMIPS64SRAV)
  8039  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  8040  		v0.AddArg(x)
  8041  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  8042  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  8043  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  8044  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  8045  		v4.AddArg(y)
  8046  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8047  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  8048  		v3.AddArg2(v4, v5)
  8049  		v2.AddArg(v3)
  8050  		v1.AddArg2(v2, v4)
  8051  		v.AddArg2(v0, v1)
  8052  		return true
  8053  	}
  8054  	return false
  8055  }
  8056  func rewriteValue_OpRsh8x32(v *ssa.Value) bool {
  8057  	v_1 := v.Args[1]
  8058  	v_0 := v.Args[0]
  8059  	b := v.Block
  8060  	typ := &b.Func.Config.Types
  8061  	// match: (Rsh8x32 x y)
  8062  	// cond: ssa.ShiftIsBounded(v)
  8063  	// result: (SRAV (SignExt8to64 x) y)
  8064  	for {
  8065  		x := v_0
  8066  		y := v_1
  8067  		if !(ssa.ShiftIsBounded(v)) {
  8068  			break
  8069  		}
  8070  		v.Reset(ssaop.OpMIPS64SRAV)
  8071  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  8072  		v0.AddArg(x)
  8073  		v.AddArg2(v0, y)
  8074  		return true
  8075  	}
  8076  	// match: (Rsh8x32 <t> x y)
  8077  	// cond: !ssa.ShiftIsBounded(v)
  8078  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  8079  	for {
  8080  		t := v.Type
  8081  		x := v_0
  8082  		y := v_1
  8083  		if !(!ssa.ShiftIsBounded(v)) {
  8084  			break
  8085  		}
  8086  		v.Reset(ssaop.OpMIPS64SRAV)
  8087  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  8088  		v0.AddArg(x)
  8089  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  8090  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  8091  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  8092  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  8093  		v4.AddArg(y)
  8094  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8095  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  8096  		v3.AddArg2(v4, v5)
  8097  		v2.AddArg(v3)
  8098  		v1.AddArg2(v2, v4)
  8099  		v.AddArg2(v0, v1)
  8100  		return true
  8101  	}
  8102  	return false
  8103  }
  8104  func rewriteValue_OpRsh8x64(v *ssa.Value) bool {
  8105  	v_1 := v.Args[1]
  8106  	v_0 := v.Args[0]
  8107  	b := v.Block
  8108  	typ := &b.Func.Config.Types
  8109  	// match: (Rsh8x64 x y)
  8110  	// cond: ssa.ShiftIsBounded(v)
  8111  	// result: (SRAV (SignExt8to64 x) y)
  8112  	for {
  8113  		x := v_0
  8114  		y := v_1
  8115  		if !(ssa.ShiftIsBounded(v)) {
  8116  			break
  8117  		}
  8118  		v.Reset(ssaop.OpMIPS64SRAV)
  8119  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  8120  		v0.AddArg(x)
  8121  		v.AddArg2(v0, y)
  8122  		return true
  8123  	}
  8124  	// match: (Rsh8x64 <t> x y)
  8125  	// cond: !ssa.ShiftIsBounded(v)
  8126  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  8127  	for {
  8128  		t := v.Type
  8129  		x := v_0
  8130  		y := v_1
  8131  		if !(!ssa.ShiftIsBounded(v)) {
  8132  			break
  8133  		}
  8134  		v.Reset(ssaop.OpMIPS64SRAV)
  8135  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  8136  		v0.AddArg(x)
  8137  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  8138  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  8139  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  8140  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8141  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  8142  		v3.AddArg2(y, v4)
  8143  		v2.AddArg(v3)
  8144  		v1.AddArg2(v2, y)
  8145  		v.AddArg2(v0, v1)
  8146  		return true
  8147  	}
  8148  	return false
  8149  }
  8150  func rewriteValue_OpRsh8x8(v *ssa.Value) bool {
  8151  	v_1 := v.Args[1]
  8152  	v_0 := v.Args[0]
  8153  	b := v.Block
  8154  	typ := &b.Func.Config.Types
  8155  	// match: (Rsh8x8 x y)
  8156  	// cond: ssa.ShiftIsBounded(v)
  8157  	// result: (SRAV (SignExt8to64 x) y)
  8158  	for {
  8159  		x := v_0
  8160  		y := v_1
  8161  		if !(ssa.ShiftIsBounded(v)) {
  8162  			break
  8163  		}
  8164  		v.Reset(ssaop.OpMIPS64SRAV)
  8165  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  8166  		v0.AddArg(x)
  8167  		v.AddArg2(v0, y)
  8168  		return true
  8169  	}
  8170  	// match: (Rsh8x8 <t> x y)
  8171  	// cond: !ssa.ShiftIsBounded(v)
  8172  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  8173  	for {
  8174  		t := v.Type
  8175  		x := v_0
  8176  		y := v_1
  8177  		if !(!ssa.ShiftIsBounded(v)) {
  8178  			break
  8179  		}
  8180  		v.Reset(ssaop.OpMIPS64SRAV)
  8181  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  8182  		v0.AddArg(x)
  8183  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  8184  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  8185  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  8186  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  8187  		v4.AddArg(y)
  8188  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8189  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  8190  		v3.AddArg2(v4, v5)
  8191  		v2.AddArg(v3)
  8192  		v1.AddArg2(v2, v4)
  8193  		v.AddArg2(v0, v1)
  8194  		return true
  8195  	}
  8196  	return false
  8197  }
  8198  func rewriteValue_OpSelect0(v *ssa.Value) bool {
  8199  	v_0 := v.Args[0]
  8200  	b := v.Block
  8201  	typ := &b.Func.Config.Types
  8202  	// match: (Select0 (Mul64uover x y))
  8203  	// result: (Select1 <typ.UInt64> (MULVU x y))
  8204  	for {
  8205  		if v_0.Op != ssaop.OpMul64uover {
  8206  			break
  8207  		}
  8208  		y := v_0.Args[1]
  8209  		x := v_0.Args[0]
  8210  		v.Reset(ssaop.OpSelect1)
  8211  		v.Type = typ.UInt64
  8212  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  8213  		v0.AddArg2(x, y)
  8214  		v.AddArg(v0)
  8215  		return true
  8216  	}
  8217  	// match: (Select0 <t> (Add64carry x y c))
  8218  	// result: (ADDV (ADDV <t> x y) c)
  8219  	for {
  8220  		t := v.Type
  8221  		if v_0.Op != ssaop.OpAdd64carry {
  8222  			break
  8223  		}
  8224  		c := v_0.Args[2]
  8225  		x := v_0.Args[0]
  8226  		y := v_0.Args[1]
  8227  		v.Reset(ssaop.OpMIPS64ADDV)
  8228  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDV, t)
  8229  		v0.AddArg2(x, y)
  8230  		v.AddArg2(v0, c)
  8231  		return true
  8232  	}
  8233  	// match: (Select0 <t> (Sub64borrow x y c))
  8234  	// result: (SUBV (SUBV <t> x y) c)
  8235  	for {
  8236  		t := v.Type
  8237  		if v_0.Op != ssaop.OpSub64borrow {
  8238  			break
  8239  		}
  8240  		c := v_0.Args[2]
  8241  		x := v_0.Args[0]
  8242  		y := v_0.Args[1]
  8243  		v.Reset(ssaop.OpMIPS64SUBV)
  8244  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64SUBV, t)
  8245  		v0.AddArg2(x, y)
  8246  		v.AddArg2(v0, c)
  8247  		return true
  8248  	}
  8249  	// match: (Select0 (DIVVU _ (MOVVconst [1])))
  8250  	// result: (MOVVconst [0])
  8251  	for {
  8252  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  8253  			break
  8254  		}
  8255  		_ = v_0.Args[1]
  8256  		v_0_1 := v_0.Args[1]
  8257  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 1 {
  8258  			break
  8259  		}
  8260  		v.Reset(ssaop.OpMIPS64MOVVconst)
  8261  		v.AuxInt = ssa.Int64ToAuxInt(0)
  8262  		return true
  8263  	}
  8264  	// match: (Select0 (DIVVU x (MOVVconst [c])))
  8265  	// cond: ssa.IsPowerOfTwo(c)
  8266  	// result: (ANDconst [c-1] x)
  8267  	for {
  8268  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  8269  			break
  8270  		}
  8271  		_ = v_0.Args[1]
  8272  		x := v_0.Args[0]
  8273  		v_0_1 := v_0.Args[1]
  8274  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  8275  			break
  8276  		}
  8277  		c := ssa.AuxIntToInt64(v_0_1.AuxInt)
  8278  		if !(ssa.IsPowerOfTwo(c)) {
  8279  			break
  8280  		}
  8281  		v.Reset(ssaop.OpMIPS64ANDconst)
  8282  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
  8283  		v.AddArg(x)
  8284  		return true
  8285  	}
  8286  	// match: (Select0 (DIVV (MOVVconst [c]) (MOVVconst [d])))
  8287  	// cond: d != 0
  8288  	// result: (MOVVconst [c%d])
  8289  	for {
  8290  		if v_0.Op != ssaop.OpMIPS64DIVV {
  8291  			break
  8292  		}
  8293  		_ = v_0.Args[1]
  8294  		v_0_0 := v_0.Args[0]
  8295  		if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  8296  			break
  8297  		}
  8298  		c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  8299  		v_0_1 := v_0.Args[1]
  8300  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  8301  			break
  8302  		}
  8303  		d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  8304  		if !(d != 0) {
  8305  			break
  8306  		}
  8307  		v.Reset(ssaop.OpMIPS64MOVVconst)
  8308  		v.AuxInt = ssa.Int64ToAuxInt(c % d)
  8309  		return true
  8310  	}
  8311  	// match: (Select0 (DIVVU (MOVVconst [c]) (MOVVconst [d])))
  8312  	// cond: d != 0
  8313  	// result: (MOVVconst [int64(uint64(c)%uint64(d))])
  8314  	for {
  8315  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  8316  			break
  8317  		}
  8318  		_ = v_0.Args[1]
  8319  		v_0_0 := v_0.Args[0]
  8320  		if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  8321  			break
  8322  		}
  8323  		c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  8324  		v_0_1 := v_0.Args[1]
  8325  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  8326  			break
  8327  		}
  8328  		d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  8329  		if !(d != 0) {
  8330  			break
  8331  		}
  8332  		v.Reset(ssaop.OpMIPS64MOVVconst)
  8333  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) % uint64(d)))
  8334  		return true
  8335  	}
  8336  	return false
  8337  }
  8338  func rewriteValue_OpSelect1(v *ssa.Value) bool {
  8339  	v_0 := v.Args[0]
  8340  	b := v.Block
  8341  	typ := &b.Func.Config.Types
  8342  	// match: (Select1 (Mul64uover x y))
  8343  	// result: (SGTU <typ.Bool> (Select0 <typ.UInt64> (MULVU x y)) (MOVVconst <typ.UInt64> [0]))
  8344  	for {
  8345  		if v_0.Op != ssaop.OpMul64uover {
  8346  			break
  8347  		}
  8348  		y := v_0.Args[1]
  8349  		x := v_0.Args[0]
  8350  		v.Reset(ssaop.OpMIPS64SGTU)
  8351  		v.Type = typ.Bool
  8352  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.UInt64)
  8353  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  8354  		v1.AddArg2(x, y)
  8355  		v0.AddArg(v1)
  8356  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8357  		v2.AuxInt = ssa.Int64ToAuxInt(0)
  8358  		v.AddArg2(v0, v2)
  8359  		return true
  8360  	}
  8361  	// match: (Select1 <t> (Add64carry x y c))
  8362  	// result: (OR (SGTU <t> x s:(ADDV <t> x y)) (SGTU <t> s (ADDV <t> s c)))
  8363  	for {
  8364  		t := v.Type
  8365  		if v_0.Op != ssaop.OpAdd64carry {
  8366  			break
  8367  		}
  8368  		c := v_0.Args[2]
  8369  		x := v_0.Args[0]
  8370  		y := v_0.Args[1]
  8371  		v.Reset(ssaop.OpMIPS64OR)
  8372  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, t)
  8373  		s := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDV, t)
  8374  		s.AddArg2(x, y)
  8375  		v0.AddArg2(x, s)
  8376  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, t)
  8377  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDV, t)
  8378  		v3.AddArg2(s, c)
  8379  		v2.AddArg2(s, v3)
  8380  		v.AddArg2(v0, v2)
  8381  		return true
  8382  	}
  8383  	// match: (Select1 <t> (Sub64borrow x y c))
  8384  	// result: (OR (SGTU <t> s:(SUBV <t> x y) x) (SGTU <t> (SUBV <t> s c) s))
  8385  	for {
  8386  		t := v.Type
  8387  		if v_0.Op != ssaop.OpSub64borrow {
  8388  			break
  8389  		}
  8390  		c := v_0.Args[2]
  8391  		x := v_0.Args[0]
  8392  		y := v_0.Args[1]
  8393  		v.Reset(ssaop.OpMIPS64OR)
  8394  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, t)
  8395  		s := b.NewValue0(v.Pos, ssaop.OpMIPS64SUBV, t)
  8396  		s.AddArg2(x, y)
  8397  		v0.AddArg2(s, x)
  8398  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, t)
  8399  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SUBV, t)
  8400  		v3.AddArg2(s, c)
  8401  		v2.AddArg2(v3, s)
  8402  		v.AddArg2(v0, v2)
  8403  		return true
  8404  	}
  8405  	// match: (Select1 (MULVU x (MOVVconst [-1])))
  8406  	// result: (NEGV x)
  8407  	for {
  8408  		if v_0.Op != ssaop.OpMIPS64MULVU {
  8409  			break
  8410  		}
  8411  		_ = v_0.Args[1]
  8412  		v_0_0 := v_0.Args[0]
  8413  		v_0_1 := v_0.Args[1]
  8414  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  8415  			x := v_0_0
  8416  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != -1 {
  8417  				continue
  8418  			}
  8419  			v.Reset(ssaop.OpMIPS64NEGV)
  8420  			v.AddArg(x)
  8421  			return true
  8422  		}
  8423  		break
  8424  	}
  8425  	// match: (Select1 (MULVU _ (MOVVconst [0])))
  8426  	// result: (MOVVconst [0])
  8427  	for {
  8428  		if v_0.Op != ssaop.OpMIPS64MULVU {
  8429  			break
  8430  		}
  8431  		_ = v_0.Args[1]
  8432  		v_0_0 := v_0.Args[0]
  8433  		v_0_1 := v_0.Args[1]
  8434  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  8435  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  8436  				continue
  8437  			}
  8438  			v.Reset(ssaop.OpMIPS64MOVVconst)
  8439  			v.AuxInt = ssa.Int64ToAuxInt(0)
  8440  			return true
  8441  		}
  8442  		break
  8443  	}
  8444  	// match: (Select1 (MULVU x (MOVVconst [1])))
  8445  	// result: x
  8446  	for {
  8447  		if v_0.Op != ssaop.OpMIPS64MULVU {
  8448  			break
  8449  		}
  8450  		_ = v_0.Args[1]
  8451  		v_0_0 := v_0.Args[0]
  8452  		v_0_1 := v_0.Args[1]
  8453  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  8454  			x := v_0_0
  8455  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 1 {
  8456  				continue
  8457  			}
  8458  			v.CopyOf(x)
  8459  			return true
  8460  		}
  8461  		break
  8462  	}
  8463  	// match: (Select1 (MULVU x (MOVVconst [c])))
  8464  	// cond: ssa.IsPowerOfTwo(c)
  8465  	// result: (SLLVconst [ssa.Log64(c)] x)
  8466  	for {
  8467  		if v_0.Op != ssaop.OpMIPS64MULVU {
  8468  			break
  8469  		}
  8470  		_ = v_0.Args[1]
  8471  		v_0_0 := v_0.Args[0]
  8472  		v_0_1 := v_0.Args[1]
  8473  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  8474  			x := v_0_0
  8475  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  8476  				continue
  8477  			}
  8478  			c := ssa.AuxIntToInt64(v_0_1.AuxInt)
  8479  			if !(ssa.IsPowerOfTwo(c)) {
  8480  				continue
  8481  			}
  8482  			v.Reset(ssaop.OpMIPS64SLLVconst)
  8483  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  8484  			v.AddArg(x)
  8485  			return true
  8486  		}
  8487  		break
  8488  	}
  8489  	// match: (Select1 (DIVVU x (MOVVconst [1])))
  8490  	// result: x
  8491  	for {
  8492  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  8493  			break
  8494  		}
  8495  		_ = v_0.Args[1]
  8496  		x := v_0.Args[0]
  8497  		v_0_1 := v_0.Args[1]
  8498  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 1 {
  8499  			break
  8500  		}
  8501  		v.CopyOf(x)
  8502  		return true
  8503  	}
  8504  	// match: (Select1 (DIVVU x (MOVVconst [c])))
  8505  	// cond: ssa.IsPowerOfTwo(c)
  8506  	// result: (SRLVconst [ssa.Log64(c)] x)
  8507  	for {
  8508  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  8509  			break
  8510  		}
  8511  		_ = v_0.Args[1]
  8512  		x := v_0.Args[0]
  8513  		v_0_1 := v_0.Args[1]
  8514  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  8515  			break
  8516  		}
  8517  		c := ssa.AuxIntToInt64(v_0_1.AuxInt)
  8518  		if !(ssa.IsPowerOfTwo(c)) {
  8519  			break
  8520  		}
  8521  		v.Reset(ssaop.OpMIPS64SRLVconst)
  8522  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  8523  		v.AddArg(x)
  8524  		return true
  8525  	}
  8526  	// match: (Select1 (MULVU (MOVVconst [c]) (MOVVconst [d])))
  8527  	// result: (MOVVconst [c*d])
  8528  	for {
  8529  		if v_0.Op != ssaop.OpMIPS64MULVU {
  8530  			break
  8531  		}
  8532  		_ = v_0.Args[1]
  8533  		v_0_0 := v_0.Args[0]
  8534  		v_0_1 := v_0.Args[1]
  8535  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  8536  			if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  8537  				continue
  8538  			}
  8539  			c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  8540  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  8541  				continue
  8542  			}
  8543  			d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  8544  			v.Reset(ssaop.OpMIPS64MOVVconst)
  8545  			v.AuxInt = ssa.Int64ToAuxInt(c * d)
  8546  			return true
  8547  		}
  8548  		break
  8549  	}
  8550  	// match: (Select1 (DIVV (MOVVconst [c]) (MOVVconst [d])))
  8551  	// cond: d != 0
  8552  	// result: (MOVVconst [c/d])
  8553  	for {
  8554  		if v_0.Op != ssaop.OpMIPS64DIVV {
  8555  			break
  8556  		}
  8557  		_ = v_0.Args[1]
  8558  		v_0_0 := v_0.Args[0]
  8559  		if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  8560  			break
  8561  		}
  8562  		c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  8563  		v_0_1 := v_0.Args[1]
  8564  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  8565  			break
  8566  		}
  8567  		d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  8568  		if !(d != 0) {
  8569  			break
  8570  		}
  8571  		v.Reset(ssaop.OpMIPS64MOVVconst)
  8572  		v.AuxInt = ssa.Int64ToAuxInt(c / d)
  8573  		return true
  8574  	}
  8575  	// match: (Select1 (DIVVU (MOVVconst [c]) (MOVVconst [d])))
  8576  	// cond: d != 0
  8577  	// result: (MOVVconst [int64(uint64(c)/uint64(d))])
  8578  	for {
  8579  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  8580  			break
  8581  		}
  8582  		_ = v_0.Args[1]
  8583  		v_0_0 := v_0.Args[0]
  8584  		if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  8585  			break
  8586  		}
  8587  		c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  8588  		v_0_1 := v_0.Args[1]
  8589  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  8590  			break
  8591  		}
  8592  		d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  8593  		if !(d != 0) {
  8594  			break
  8595  		}
  8596  		v.Reset(ssaop.OpMIPS64MOVVconst)
  8597  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) / uint64(d)))
  8598  		return true
  8599  	}
  8600  	return false
  8601  }
  8602  func rewriteValue_OpSlicemask(v *ssa.Value) bool {
  8603  	v_0 := v.Args[0]
  8604  	b := v.Block
  8605  	// match: (Slicemask <t> x)
  8606  	// result: (SRAVconst (NEGV <t> x) [63])
  8607  	for {
  8608  		t := v.Type
  8609  		x := v_0
  8610  		v.Reset(ssaop.OpMIPS64SRAVconst)
  8611  		v.AuxInt = ssa.Int64ToAuxInt(63)
  8612  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  8613  		v0.AddArg(x)
  8614  		v.AddArg(v0)
  8615  		return true
  8616  	}
  8617  }
  8618  func rewriteValue_OpStore(v *ssa.Value) bool {
  8619  	v_2 := v.Args[2]
  8620  	v_1 := v.Args[1]
  8621  	v_0 := v.Args[0]
  8622  	// match: (Store {t} ptr val mem)
  8623  	// cond: t.Size() == 1
  8624  	// result: (MOVBstore ptr val mem)
  8625  	for {
  8626  		t := ssa.AuxToType(v.Aux)
  8627  		ptr := v_0
  8628  		val := v_1
  8629  		mem := v_2
  8630  		if !(t.Size() == 1) {
  8631  			break
  8632  		}
  8633  		v.Reset(ssaop.OpMIPS64MOVBstore)
  8634  		v.AddArg3(ptr, val, mem)
  8635  		return true
  8636  	}
  8637  	// match: (Store {t} ptr val mem)
  8638  	// cond: t.Size() == 2
  8639  	// result: (MOVHstore ptr val mem)
  8640  	for {
  8641  		t := ssa.AuxToType(v.Aux)
  8642  		ptr := v_0
  8643  		val := v_1
  8644  		mem := v_2
  8645  		if !(t.Size() == 2) {
  8646  			break
  8647  		}
  8648  		v.Reset(ssaop.OpMIPS64MOVHstore)
  8649  		v.AddArg3(ptr, val, mem)
  8650  		return true
  8651  	}
  8652  	// match: (Store {t} ptr val mem)
  8653  	// cond: t.Size() == 4 && !t.IsFloat()
  8654  	// result: (MOVWstore ptr val mem)
  8655  	for {
  8656  		t := ssa.AuxToType(v.Aux)
  8657  		ptr := v_0
  8658  		val := v_1
  8659  		mem := v_2
  8660  		if !(t.Size() == 4 && !t.IsFloat()) {
  8661  			break
  8662  		}
  8663  		v.Reset(ssaop.OpMIPS64MOVWstore)
  8664  		v.AddArg3(ptr, val, mem)
  8665  		return true
  8666  	}
  8667  	// match: (Store {t} ptr val mem)
  8668  	// cond: t.Size() == 8 && !t.IsFloat()
  8669  	// result: (MOVVstore ptr val mem)
  8670  	for {
  8671  		t := ssa.AuxToType(v.Aux)
  8672  		ptr := v_0
  8673  		val := v_1
  8674  		mem := v_2
  8675  		if !(t.Size() == 8 && !t.IsFloat()) {
  8676  			break
  8677  		}
  8678  		v.Reset(ssaop.OpMIPS64MOVVstore)
  8679  		v.AddArg3(ptr, val, mem)
  8680  		return true
  8681  	}
  8682  	// match: (Store {t} ptr val mem)
  8683  	// cond: t.Size() == 4 && t.IsFloat()
  8684  	// result: (MOVFstore ptr val mem)
  8685  	for {
  8686  		t := ssa.AuxToType(v.Aux)
  8687  		ptr := v_0
  8688  		val := v_1
  8689  		mem := v_2
  8690  		if !(t.Size() == 4 && t.IsFloat()) {
  8691  			break
  8692  		}
  8693  		v.Reset(ssaop.OpMIPS64MOVFstore)
  8694  		v.AddArg3(ptr, val, mem)
  8695  		return true
  8696  	}
  8697  	// match: (Store {t} ptr val mem)
  8698  	// cond: t.Size() == 8 && t.IsFloat()
  8699  	// result: (MOVDstore ptr val mem)
  8700  	for {
  8701  		t := ssa.AuxToType(v.Aux)
  8702  		ptr := v_0
  8703  		val := v_1
  8704  		mem := v_2
  8705  		if !(t.Size() == 8 && t.IsFloat()) {
  8706  			break
  8707  		}
  8708  		v.Reset(ssaop.OpMIPS64MOVDstore)
  8709  		v.AddArg3(ptr, val, mem)
  8710  		return true
  8711  	}
  8712  	return false
  8713  }
  8714  func rewriteValue_OpZero(v *ssa.Value) bool {
  8715  	v_1 := v.Args[1]
  8716  	v_0 := v.Args[0]
  8717  	b := v.Block
  8718  	config := b.Func.Config
  8719  	typ := &b.Func.Config.Types
  8720  	// match: (Zero [0] _ mem)
  8721  	// result: mem
  8722  	for {
  8723  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  8724  			break
  8725  		}
  8726  		mem := v_1
  8727  		v.CopyOf(mem)
  8728  		return true
  8729  	}
  8730  	// match: (Zero [1] ptr mem)
  8731  	// result: (MOVBstore ptr (MOVVconst [0]) mem)
  8732  	for {
  8733  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
  8734  			break
  8735  		}
  8736  		ptr := v_0
  8737  		mem := v_1
  8738  		v.Reset(ssaop.OpMIPS64MOVBstore)
  8739  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8740  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8741  		v.AddArg3(ptr, v0, mem)
  8742  		return true
  8743  	}
  8744  	// match: (Zero [2] {t} ptr mem)
  8745  	// cond: t.Alignment()%2 == 0
  8746  	// result: (MOVHstore ptr (MOVVconst [0]) mem)
  8747  	for {
  8748  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
  8749  			break
  8750  		}
  8751  		t := ssa.AuxToType(v.Aux)
  8752  		ptr := v_0
  8753  		mem := v_1
  8754  		if !(t.Alignment()%2 == 0) {
  8755  			break
  8756  		}
  8757  		v.Reset(ssaop.OpMIPS64MOVHstore)
  8758  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8759  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8760  		v.AddArg3(ptr, v0, mem)
  8761  		return true
  8762  	}
  8763  	// match: (Zero [2] ptr mem)
  8764  	// result: (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem))
  8765  	for {
  8766  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
  8767  			break
  8768  		}
  8769  		ptr := v_0
  8770  		mem := v_1
  8771  		v.Reset(ssaop.OpMIPS64MOVBstore)
  8772  		v.AuxInt = ssa.Int32ToAuxInt(1)
  8773  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8774  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8775  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  8776  		v1.AuxInt = ssa.Int32ToAuxInt(0)
  8777  		v1.AddArg3(ptr, v0, mem)
  8778  		v.AddArg3(ptr, v0, v1)
  8779  		return true
  8780  	}
  8781  	// match: (Zero [4] {t} ptr mem)
  8782  	// cond: t.Alignment()%4 == 0
  8783  	// result: (MOVWstore ptr (MOVVconst [0]) mem)
  8784  	for {
  8785  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  8786  			break
  8787  		}
  8788  		t := ssa.AuxToType(v.Aux)
  8789  		ptr := v_0
  8790  		mem := v_1
  8791  		if !(t.Alignment()%4 == 0) {
  8792  			break
  8793  		}
  8794  		v.Reset(ssaop.OpMIPS64MOVWstore)
  8795  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8796  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8797  		v.AddArg3(ptr, v0, mem)
  8798  		return true
  8799  	}
  8800  	// match: (Zero [4] {t} ptr mem)
  8801  	// cond: t.Alignment()%2 == 0
  8802  	// result: (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem))
  8803  	for {
  8804  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  8805  			break
  8806  		}
  8807  		t := ssa.AuxToType(v.Aux)
  8808  		ptr := v_0
  8809  		mem := v_1
  8810  		if !(t.Alignment()%2 == 0) {
  8811  			break
  8812  		}
  8813  		v.Reset(ssaop.OpMIPS64MOVHstore)
  8814  		v.AuxInt = ssa.Int32ToAuxInt(2)
  8815  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8816  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8817  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  8818  		v1.AuxInt = ssa.Int32ToAuxInt(0)
  8819  		v1.AddArg3(ptr, v0, mem)
  8820  		v.AddArg3(ptr, v0, v1)
  8821  		return true
  8822  	}
  8823  	// match: (Zero [4] ptr mem)
  8824  	// result: (MOVBstore [3] ptr (MOVVconst [0]) (MOVBstore [2] ptr (MOVVconst [0]) (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem))))
  8825  	for {
  8826  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  8827  			break
  8828  		}
  8829  		ptr := v_0
  8830  		mem := v_1
  8831  		v.Reset(ssaop.OpMIPS64MOVBstore)
  8832  		v.AuxInt = ssa.Int32ToAuxInt(3)
  8833  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8834  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8835  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  8836  		v1.AuxInt = ssa.Int32ToAuxInt(2)
  8837  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  8838  		v2.AuxInt = ssa.Int32ToAuxInt(1)
  8839  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  8840  		v3.AuxInt = ssa.Int32ToAuxInt(0)
  8841  		v3.AddArg3(ptr, v0, mem)
  8842  		v2.AddArg3(ptr, v0, v3)
  8843  		v1.AddArg3(ptr, v0, v2)
  8844  		v.AddArg3(ptr, v0, v1)
  8845  		return true
  8846  	}
  8847  	// match: (Zero [8] {t} ptr mem)
  8848  	// cond: t.Alignment()%8 == 0
  8849  	// result: (MOVVstore ptr (MOVVconst [0]) mem)
  8850  	for {
  8851  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  8852  			break
  8853  		}
  8854  		t := ssa.AuxToType(v.Aux)
  8855  		ptr := v_0
  8856  		mem := v_1
  8857  		if !(t.Alignment()%8 == 0) {
  8858  			break
  8859  		}
  8860  		v.Reset(ssaop.OpMIPS64MOVVstore)
  8861  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8862  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8863  		v.AddArg3(ptr, v0, mem)
  8864  		return true
  8865  	}
  8866  	// match: (Zero [8] {t} ptr mem)
  8867  	// cond: t.Alignment()%4 == 0
  8868  	// result: (MOVWstore [4] ptr (MOVVconst [0]) (MOVWstore [0] ptr (MOVVconst [0]) mem))
  8869  	for {
  8870  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  8871  			break
  8872  		}
  8873  		t := ssa.AuxToType(v.Aux)
  8874  		ptr := v_0
  8875  		mem := v_1
  8876  		if !(t.Alignment()%4 == 0) {
  8877  			break
  8878  		}
  8879  		v.Reset(ssaop.OpMIPS64MOVWstore)
  8880  		v.AuxInt = ssa.Int32ToAuxInt(4)
  8881  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8882  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8883  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  8884  		v1.AuxInt = ssa.Int32ToAuxInt(0)
  8885  		v1.AddArg3(ptr, v0, mem)
  8886  		v.AddArg3(ptr, v0, v1)
  8887  		return true
  8888  	}
  8889  	// match: (Zero [8] {t} ptr mem)
  8890  	// cond: t.Alignment()%2 == 0
  8891  	// result: (MOVHstore [6] ptr (MOVVconst [0]) (MOVHstore [4] ptr (MOVVconst [0]) (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem))))
  8892  	for {
  8893  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  8894  			break
  8895  		}
  8896  		t := ssa.AuxToType(v.Aux)
  8897  		ptr := v_0
  8898  		mem := v_1
  8899  		if !(t.Alignment()%2 == 0) {
  8900  			break
  8901  		}
  8902  		v.Reset(ssaop.OpMIPS64MOVHstore)
  8903  		v.AuxInt = ssa.Int32ToAuxInt(6)
  8904  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8905  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8906  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  8907  		v1.AuxInt = ssa.Int32ToAuxInt(4)
  8908  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  8909  		v2.AuxInt = ssa.Int32ToAuxInt(2)
  8910  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  8911  		v3.AuxInt = ssa.Int32ToAuxInt(0)
  8912  		v3.AddArg3(ptr, v0, mem)
  8913  		v2.AddArg3(ptr, v0, v3)
  8914  		v1.AddArg3(ptr, v0, v2)
  8915  		v.AddArg3(ptr, v0, v1)
  8916  		return true
  8917  	}
  8918  	// match: (Zero [3] ptr mem)
  8919  	// result: (MOVBstore [2] ptr (MOVVconst [0]) (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem)))
  8920  	for {
  8921  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
  8922  			break
  8923  		}
  8924  		ptr := v_0
  8925  		mem := v_1
  8926  		v.Reset(ssaop.OpMIPS64MOVBstore)
  8927  		v.AuxInt = ssa.Int32ToAuxInt(2)
  8928  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8929  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8930  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  8931  		v1.AuxInt = ssa.Int32ToAuxInt(1)
  8932  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  8933  		v2.AuxInt = ssa.Int32ToAuxInt(0)
  8934  		v2.AddArg3(ptr, v0, mem)
  8935  		v1.AddArg3(ptr, v0, v2)
  8936  		v.AddArg3(ptr, v0, v1)
  8937  		return true
  8938  	}
  8939  	// match: (Zero [6] {t} ptr mem)
  8940  	// cond: t.Alignment()%2 == 0
  8941  	// result: (MOVHstore [4] ptr (MOVVconst [0]) (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem)))
  8942  	for {
  8943  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
  8944  			break
  8945  		}
  8946  		t := ssa.AuxToType(v.Aux)
  8947  		ptr := v_0
  8948  		mem := v_1
  8949  		if !(t.Alignment()%2 == 0) {
  8950  			break
  8951  		}
  8952  		v.Reset(ssaop.OpMIPS64MOVHstore)
  8953  		v.AuxInt = ssa.Int32ToAuxInt(4)
  8954  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8955  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8956  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  8957  		v1.AuxInt = ssa.Int32ToAuxInt(2)
  8958  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  8959  		v2.AuxInt = ssa.Int32ToAuxInt(0)
  8960  		v2.AddArg3(ptr, v0, mem)
  8961  		v1.AddArg3(ptr, v0, v2)
  8962  		v.AddArg3(ptr, v0, v1)
  8963  		return true
  8964  	}
  8965  	// match: (Zero [12] {t} ptr mem)
  8966  	// cond: t.Alignment()%4 == 0
  8967  	// result: (MOVWstore [8] ptr (MOVVconst [0]) (MOVWstore [4] ptr (MOVVconst [0]) (MOVWstore [0] ptr (MOVVconst [0]) mem)))
  8968  	for {
  8969  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
  8970  			break
  8971  		}
  8972  		t := ssa.AuxToType(v.Aux)
  8973  		ptr := v_0
  8974  		mem := v_1
  8975  		if !(t.Alignment()%4 == 0) {
  8976  			break
  8977  		}
  8978  		v.Reset(ssaop.OpMIPS64MOVWstore)
  8979  		v.AuxInt = ssa.Int32ToAuxInt(8)
  8980  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8981  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8982  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  8983  		v1.AuxInt = ssa.Int32ToAuxInt(4)
  8984  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  8985  		v2.AuxInt = ssa.Int32ToAuxInt(0)
  8986  		v2.AddArg3(ptr, v0, mem)
  8987  		v1.AddArg3(ptr, v0, v2)
  8988  		v.AddArg3(ptr, v0, v1)
  8989  		return true
  8990  	}
  8991  	// match: (Zero [16] {t} ptr mem)
  8992  	// cond: t.Alignment()%8 == 0
  8993  	// result: (MOVVstore [8] ptr (MOVVconst [0]) (MOVVstore [0] ptr (MOVVconst [0]) mem))
  8994  	for {
  8995  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
  8996  			break
  8997  		}
  8998  		t := ssa.AuxToType(v.Aux)
  8999  		ptr := v_0
  9000  		mem := v_1
  9001  		if !(t.Alignment()%8 == 0) {
  9002  			break
  9003  		}
  9004  		v.Reset(ssaop.OpMIPS64MOVVstore)
  9005  		v.AuxInt = ssa.Int32ToAuxInt(8)
  9006  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  9007  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  9008  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  9009  		v1.AuxInt = ssa.Int32ToAuxInt(0)
  9010  		v1.AddArg3(ptr, v0, mem)
  9011  		v.AddArg3(ptr, v0, v1)
  9012  		return true
  9013  	}
  9014  	// match: (Zero [24] {t} ptr mem)
  9015  	// cond: t.Alignment()%8 == 0
  9016  	// result: (MOVVstore [16] ptr (MOVVconst [0]) (MOVVstore [8] ptr (MOVVconst [0]) (MOVVstore [0] ptr (MOVVconst [0]) mem)))
  9017  	for {
  9018  		if ssa.AuxIntToInt64(v.AuxInt) != 24 {
  9019  			break
  9020  		}
  9021  		t := ssa.AuxToType(v.Aux)
  9022  		ptr := v_0
  9023  		mem := v_1
  9024  		if !(t.Alignment()%8 == 0) {
  9025  			break
  9026  		}
  9027  		v.Reset(ssaop.OpMIPS64MOVVstore)
  9028  		v.AuxInt = ssa.Int32ToAuxInt(16)
  9029  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  9030  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  9031  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  9032  		v1.AuxInt = ssa.Int32ToAuxInt(8)
  9033  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  9034  		v2.AuxInt = ssa.Int32ToAuxInt(0)
  9035  		v2.AddArg3(ptr, v0, mem)
  9036  		v1.AddArg3(ptr, v0, v2)
  9037  		v.AddArg3(ptr, v0, v1)
  9038  		return true
  9039  	}
  9040  	// match: (Zero [s] {t} ptr mem)
  9041  	// cond: s%8 == 0 && s > 24 && s <= 8*128 && t.Alignment()%8 == 0
  9042  	// result: (DUFFZERO [8 * (128 - s/8)] ptr mem)
  9043  	for {
  9044  		s := ssa.AuxIntToInt64(v.AuxInt)
  9045  		t := ssa.AuxToType(v.Aux)
  9046  		ptr := v_0
  9047  		mem := v_1
  9048  		if !(s%8 == 0 && s > 24 && s <= 8*128 && t.Alignment()%8 == 0) {
  9049  			break
  9050  		}
  9051  		v.Reset(ssaop.OpMIPS64DUFFZERO)
  9052  		v.AuxInt = ssa.Int64ToAuxInt(8 * (128 - s/8))
  9053  		v.AddArg2(ptr, mem)
  9054  		return true
  9055  	}
  9056  	// match: (Zero [s] {t} ptr mem)
  9057  	// cond: s > 8*128 || t.Alignment()%8 != 0
  9058  	// result: (LoweredZero [t.Alignment()] ptr (ADDVconst <ptr.Type> ptr [s-ssa.MoveSize(t.Alignment(), config)]) mem)
  9059  	for {
  9060  		s := ssa.AuxIntToInt64(v.AuxInt)
  9061  		t := ssa.AuxToType(v.Aux)
  9062  		ptr := v_0
  9063  		mem := v_1
  9064  		if !(s > 8*128 || t.Alignment()%8 != 0) {
  9065  			break
  9066  		}
  9067  		v.Reset(ssaop.OpMIPS64LoweredZero)
  9068  		v.AuxInt = ssa.Int64ToAuxInt(t.Alignment())
  9069  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDVconst, ptr.Type)
  9070  		v0.AuxInt = ssa.Int64ToAuxInt(s - ssa.MoveSize(t.Alignment(), config))
  9071  		v0.AddArg(ptr)
  9072  		v.AddArg3(ptr, v0, mem)
  9073  		return true
  9074  	}
  9075  	return false
  9076  }
  9077  func RewriteBlock(b *ssa.Block) bool {
  9078  	typ := &b.Func.Config.Types
  9079  	switch b.Kind {
  9080  	case block.BlockMIPS64EQ:
  9081  		// match: (EQ (FPFlagTrue cmp) yes no)
  9082  		// result: (FPF cmp yes no)
  9083  		for b.Controls[0].Op == ssaop.OpMIPS64FPFlagTrue {
  9084  			v_0 := b.Controls[0]
  9085  			cmp := v_0.Args[0]
  9086  			b.ResetWithControl(block.BlockMIPS64FPF, cmp)
  9087  			return true
  9088  		}
  9089  		// match: (EQ (FPFlagFalse cmp) yes no)
  9090  		// result: (FPT cmp yes no)
  9091  		for b.Controls[0].Op == ssaop.OpMIPS64FPFlagFalse {
  9092  			v_0 := b.Controls[0]
  9093  			cmp := v_0.Args[0]
  9094  			b.ResetWithControl(block.BlockMIPS64FPT, cmp)
  9095  			return true
  9096  		}
  9097  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  9098  		// result: (NE cmp yes no)
  9099  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  9100  			v_0 := b.Controls[0]
  9101  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9102  				break
  9103  			}
  9104  			cmp := v_0.Args[0]
  9105  			if cmp.Op != ssaop.OpMIPS64SGT {
  9106  				break
  9107  			}
  9108  			b.ResetWithControl(block.BlockMIPS64NE, cmp)
  9109  			return true
  9110  		}
  9111  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  9112  		// result: (NE cmp yes no)
  9113  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  9114  			v_0 := b.Controls[0]
  9115  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9116  				break
  9117  			}
  9118  			cmp := v_0.Args[0]
  9119  			if cmp.Op != ssaop.OpMIPS64SGTU {
  9120  				break
  9121  			}
  9122  			b.ResetWithControl(block.BlockMIPS64NE, cmp)
  9123  			return true
  9124  		}
  9125  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  9126  		// result: (NE cmp yes no)
  9127  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  9128  			v_0 := b.Controls[0]
  9129  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9130  				break
  9131  			}
  9132  			cmp := v_0.Args[0]
  9133  			if cmp.Op != ssaop.OpMIPS64SGTconst {
  9134  				break
  9135  			}
  9136  			b.ResetWithControl(block.BlockMIPS64NE, cmp)
  9137  			return true
  9138  		}
  9139  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  9140  		// result: (NE cmp yes no)
  9141  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  9142  			v_0 := b.Controls[0]
  9143  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9144  				break
  9145  			}
  9146  			cmp := v_0.Args[0]
  9147  			if cmp.Op != ssaop.OpMIPS64SGTUconst {
  9148  				break
  9149  			}
  9150  			b.ResetWithControl(block.BlockMIPS64NE, cmp)
  9151  			return true
  9152  		}
  9153  		// match: (EQ (SGTUconst [1] x) yes no)
  9154  		// result: (NE x yes no)
  9155  		for b.Controls[0].Op == ssaop.OpMIPS64SGTUconst {
  9156  			v_0 := b.Controls[0]
  9157  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9158  				break
  9159  			}
  9160  			x := v_0.Args[0]
  9161  			b.ResetWithControl(block.BlockMIPS64NE, x)
  9162  			return true
  9163  		}
  9164  		// match: (EQ (SGTU x (MOVVconst [0])) yes no)
  9165  		// result: (EQ x yes no)
  9166  		for b.Controls[0].Op == ssaop.OpMIPS64SGTU {
  9167  			v_0 := b.Controls[0]
  9168  			_ = v_0.Args[1]
  9169  			x := v_0.Args[0]
  9170  			v_0_1 := v_0.Args[1]
  9171  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  9172  				break
  9173  			}
  9174  			b.ResetWithControl(block.BlockMIPS64EQ, x)
  9175  			return true
  9176  		}
  9177  		// match: (EQ (SGTconst [0] x) yes no)
  9178  		// result: (GEZ x yes no)
  9179  		for b.Controls[0].Op == ssaop.OpMIPS64SGTconst {
  9180  			v_0 := b.Controls[0]
  9181  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  9182  				break
  9183  			}
  9184  			x := v_0.Args[0]
  9185  			b.ResetWithControl(block.BlockMIPS64GEZ, x)
  9186  			return true
  9187  		}
  9188  		// match: (EQ (SGT x (MOVVconst [0])) yes no)
  9189  		// result: (LEZ x yes no)
  9190  		for b.Controls[0].Op == ssaop.OpMIPS64SGT {
  9191  			v_0 := b.Controls[0]
  9192  			_ = v_0.Args[1]
  9193  			x := v_0.Args[0]
  9194  			v_0_1 := v_0.Args[1]
  9195  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  9196  				break
  9197  			}
  9198  			b.ResetWithControl(block.BlockMIPS64LEZ, x)
  9199  			return true
  9200  		}
  9201  		// match: (EQ (MOVVconst [0]) yes no)
  9202  		// result: (First yes no)
  9203  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9204  			v_0 := b.Controls[0]
  9205  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  9206  				break
  9207  			}
  9208  			b.Reset(block.BlockFirst)
  9209  			return true
  9210  		}
  9211  		// match: (EQ (MOVVconst [c]) yes no)
  9212  		// cond: c != 0
  9213  		// result: (First no yes)
  9214  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9215  			v_0 := b.Controls[0]
  9216  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9217  			if !(c != 0) {
  9218  				break
  9219  			}
  9220  			b.Reset(block.BlockFirst)
  9221  			b.SwapSuccessors()
  9222  			return true
  9223  		}
  9224  	case block.BlockMIPS64GEZ:
  9225  		// match: (GEZ (MOVVconst [c]) yes no)
  9226  		// cond: c >= 0
  9227  		// result: (First yes no)
  9228  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9229  			v_0 := b.Controls[0]
  9230  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9231  			if !(c >= 0) {
  9232  				break
  9233  			}
  9234  			b.Reset(block.BlockFirst)
  9235  			return true
  9236  		}
  9237  		// match: (GEZ (MOVVconst [c]) yes no)
  9238  		// cond: c < 0
  9239  		// result: (First no yes)
  9240  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9241  			v_0 := b.Controls[0]
  9242  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9243  			if !(c < 0) {
  9244  				break
  9245  			}
  9246  			b.Reset(block.BlockFirst)
  9247  			b.SwapSuccessors()
  9248  			return true
  9249  		}
  9250  	case block.BlockMIPS64GTZ:
  9251  		// match: (GTZ (MOVVconst [c]) yes no)
  9252  		// cond: c > 0
  9253  		// result: (First yes no)
  9254  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9255  			v_0 := b.Controls[0]
  9256  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9257  			if !(c > 0) {
  9258  				break
  9259  			}
  9260  			b.Reset(block.BlockFirst)
  9261  			return true
  9262  		}
  9263  		// match: (GTZ (MOVVconst [c]) yes no)
  9264  		// cond: c <= 0
  9265  		// result: (First no yes)
  9266  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9267  			v_0 := b.Controls[0]
  9268  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9269  			if !(c <= 0) {
  9270  				break
  9271  			}
  9272  			b.Reset(block.BlockFirst)
  9273  			b.SwapSuccessors()
  9274  			return true
  9275  		}
  9276  	case block.BlockIf:
  9277  		// match: (If cond yes no)
  9278  		// result: (NE cond yes no)
  9279  		for {
  9280  			cond := b.Controls[0]
  9281  			b.ResetWithControl(block.BlockMIPS64NE, cond)
  9282  			return true
  9283  		}
  9284  	case block.BlockJumpTable:
  9285  		// match: (JumpTable idx)
  9286  		// result: (JUMPTABLE {ssa.MakeJumpTableSym(b)} idx (MOVVaddr <typ.Uintptr> {ssa.MakeJumpTableSym(b)} (SB)))
  9287  		for {
  9288  			idx := b.Controls[0]
  9289  			v0 := b.NewValue0(b.Pos, ssaop.OpMIPS64MOVVaddr, typ.Uintptr)
  9290  			v0.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
  9291  			v1 := b.NewValue0(b.Pos, ssaop.OpSB, typ.Uintptr)
  9292  			v0.AddArg(v1)
  9293  			b.ResetWithControl2(block.BlockMIPS64JUMPTABLE, idx, v0)
  9294  			b.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
  9295  			return true
  9296  		}
  9297  	case block.BlockMIPS64LEZ:
  9298  		// match: (LEZ (MOVVconst [c]) yes no)
  9299  		// cond: c <= 0
  9300  		// result: (First yes no)
  9301  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9302  			v_0 := b.Controls[0]
  9303  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9304  			if !(c <= 0) {
  9305  				break
  9306  			}
  9307  			b.Reset(block.BlockFirst)
  9308  			return true
  9309  		}
  9310  		// match: (LEZ (MOVVconst [c]) yes no)
  9311  		// cond: c > 0
  9312  		// result: (First no yes)
  9313  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9314  			v_0 := b.Controls[0]
  9315  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9316  			if !(c > 0) {
  9317  				break
  9318  			}
  9319  			b.Reset(block.BlockFirst)
  9320  			b.SwapSuccessors()
  9321  			return true
  9322  		}
  9323  	case block.BlockMIPS64LTZ:
  9324  		// match: (LTZ (MOVVconst [c]) yes no)
  9325  		// cond: c < 0
  9326  		// result: (First yes no)
  9327  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9328  			v_0 := b.Controls[0]
  9329  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9330  			if !(c < 0) {
  9331  				break
  9332  			}
  9333  			b.Reset(block.BlockFirst)
  9334  			return true
  9335  		}
  9336  		// match: (LTZ (MOVVconst [c]) yes no)
  9337  		// cond: c >= 0
  9338  		// result: (First no yes)
  9339  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9340  			v_0 := b.Controls[0]
  9341  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9342  			if !(c >= 0) {
  9343  				break
  9344  			}
  9345  			b.Reset(block.BlockFirst)
  9346  			b.SwapSuccessors()
  9347  			return true
  9348  		}
  9349  	case block.BlockMIPS64NE:
  9350  		// match: (NE (FPFlagTrue cmp) yes no)
  9351  		// result: (FPT cmp yes no)
  9352  		for b.Controls[0].Op == ssaop.OpMIPS64FPFlagTrue {
  9353  			v_0 := b.Controls[0]
  9354  			cmp := v_0.Args[0]
  9355  			b.ResetWithControl(block.BlockMIPS64FPT, cmp)
  9356  			return true
  9357  		}
  9358  		// match: (NE (FPFlagFalse cmp) yes no)
  9359  		// result: (FPF cmp yes no)
  9360  		for b.Controls[0].Op == ssaop.OpMIPS64FPFlagFalse {
  9361  			v_0 := b.Controls[0]
  9362  			cmp := v_0.Args[0]
  9363  			b.ResetWithControl(block.BlockMIPS64FPF, cmp)
  9364  			return true
  9365  		}
  9366  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  9367  		// result: (EQ cmp yes no)
  9368  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  9369  			v_0 := b.Controls[0]
  9370  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9371  				break
  9372  			}
  9373  			cmp := v_0.Args[0]
  9374  			if cmp.Op != ssaop.OpMIPS64SGT {
  9375  				break
  9376  			}
  9377  			b.ResetWithControl(block.BlockMIPS64EQ, cmp)
  9378  			return true
  9379  		}
  9380  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  9381  		// result: (EQ cmp yes no)
  9382  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  9383  			v_0 := b.Controls[0]
  9384  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9385  				break
  9386  			}
  9387  			cmp := v_0.Args[0]
  9388  			if cmp.Op != ssaop.OpMIPS64SGTU {
  9389  				break
  9390  			}
  9391  			b.ResetWithControl(block.BlockMIPS64EQ, cmp)
  9392  			return true
  9393  		}
  9394  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  9395  		// result: (EQ cmp yes no)
  9396  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  9397  			v_0 := b.Controls[0]
  9398  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9399  				break
  9400  			}
  9401  			cmp := v_0.Args[0]
  9402  			if cmp.Op != ssaop.OpMIPS64SGTconst {
  9403  				break
  9404  			}
  9405  			b.ResetWithControl(block.BlockMIPS64EQ, cmp)
  9406  			return true
  9407  		}
  9408  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  9409  		// result: (EQ cmp yes no)
  9410  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  9411  			v_0 := b.Controls[0]
  9412  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9413  				break
  9414  			}
  9415  			cmp := v_0.Args[0]
  9416  			if cmp.Op != ssaop.OpMIPS64SGTUconst {
  9417  				break
  9418  			}
  9419  			b.ResetWithControl(block.BlockMIPS64EQ, cmp)
  9420  			return true
  9421  		}
  9422  		// match: (NE (SGTUconst [1] x) yes no)
  9423  		// result: (EQ x yes no)
  9424  		for b.Controls[0].Op == ssaop.OpMIPS64SGTUconst {
  9425  			v_0 := b.Controls[0]
  9426  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  9427  				break
  9428  			}
  9429  			x := v_0.Args[0]
  9430  			b.ResetWithControl(block.BlockMIPS64EQ, x)
  9431  			return true
  9432  		}
  9433  		// match: (NE (SGTU x (MOVVconst [0])) yes no)
  9434  		// result: (NE x yes no)
  9435  		for b.Controls[0].Op == ssaop.OpMIPS64SGTU {
  9436  			v_0 := b.Controls[0]
  9437  			_ = v_0.Args[1]
  9438  			x := v_0.Args[0]
  9439  			v_0_1 := v_0.Args[1]
  9440  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  9441  				break
  9442  			}
  9443  			b.ResetWithControl(block.BlockMIPS64NE, x)
  9444  			return true
  9445  		}
  9446  		// match: (NE (SGTconst [0] x) yes no)
  9447  		// result: (LTZ x yes no)
  9448  		for b.Controls[0].Op == ssaop.OpMIPS64SGTconst {
  9449  			v_0 := b.Controls[0]
  9450  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  9451  				break
  9452  			}
  9453  			x := v_0.Args[0]
  9454  			b.ResetWithControl(block.BlockMIPS64LTZ, x)
  9455  			return true
  9456  		}
  9457  		// match: (NE (SGT x (MOVVconst [0])) yes no)
  9458  		// result: (GTZ x yes no)
  9459  		for b.Controls[0].Op == ssaop.OpMIPS64SGT {
  9460  			v_0 := b.Controls[0]
  9461  			_ = v_0.Args[1]
  9462  			x := v_0.Args[0]
  9463  			v_0_1 := v_0.Args[1]
  9464  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  9465  				break
  9466  			}
  9467  			b.ResetWithControl(block.BlockMIPS64GTZ, x)
  9468  			return true
  9469  		}
  9470  		// match: (NE (MOVVconst [0]) yes no)
  9471  		// result: (First no yes)
  9472  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9473  			v_0 := b.Controls[0]
  9474  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  9475  				break
  9476  			}
  9477  			b.Reset(block.BlockFirst)
  9478  			b.SwapSuccessors()
  9479  			return true
  9480  		}
  9481  		// match: (NE (MOVVconst [c]) yes no)
  9482  		// cond: c != 0
  9483  		// result: (First yes no)
  9484  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  9485  			v_0 := b.Controls[0]
  9486  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9487  			if !(c != 0) {
  9488  				break
  9489  			}
  9490  			b.Reset(block.BlockFirst)
  9491  			return true
  9492  		}
  9493  	}
  9494  	return false
  9495  }
  9496  

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