Source file src/cmd/compile/internal/ssarewrite/rewritearm64/rewriteARM64.go

     1  // Code generated from _gen/ARM64.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package rewritearm64
     4  
     5  import "cmd/compile/internal/types"
     6  import "cmd/compile/internal/ssa/block"
     7  import "cmd/compile/internal/ssa/ssaop"
     8  import "cmd/compile/internal/ssa"
     9  
    10  func RewriteValue(v *ssa.Value) bool {
    11  	switch v.Op {
    12  	case ssaop.OpARM64ADCSflags:
    13  		return rewriteValue_OpARM64ADCSflags(v)
    14  	case ssaop.OpARM64ADD:
    15  		return rewriteValue_OpARM64ADD(v)
    16  	case ssaop.OpARM64ADDSflags:
    17  		return rewriteValue_OpARM64ADDSflags(v)
    18  	case ssaop.OpARM64ADDconst:
    19  		return rewriteValue_OpARM64ADDconst(v)
    20  	case ssaop.OpARM64ADDshiftLL:
    21  		return rewriteValue_OpARM64ADDshiftLL(v)
    22  	case ssaop.OpARM64ADDshiftRA:
    23  		return rewriteValue_OpARM64ADDshiftRA(v)
    24  	case ssaop.OpARM64ADDshiftRL:
    25  		return rewriteValue_OpARM64ADDshiftRL(v)
    26  	case ssaop.OpARM64AND:
    27  		return rewriteValue_OpARM64AND(v)
    28  	case ssaop.OpARM64ANDconst:
    29  		return rewriteValue_OpARM64ANDconst(v)
    30  	case ssaop.OpARM64ANDshiftLL:
    31  		return rewriteValue_OpARM64ANDshiftLL(v)
    32  	case ssaop.OpARM64ANDshiftRA:
    33  		return rewriteValue_OpARM64ANDshiftRA(v)
    34  	case ssaop.OpARM64ANDshiftRL:
    35  		return rewriteValue_OpARM64ANDshiftRL(v)
    36  	case ssaop.OpARM64ANDshiftRO:
    37  		return rewriteValue_OpARM64ANDshiftRO(v)
    38  	case ssaop.OpARM64BIC:
    39  		return rewriteValue_OpARM64BIC(v)
    40  	case ssaop.OpARM64BICshiftLL:
    41  		return rewriteValue_OpARM64BICshiftLL(v)
    42  	case ssaop.OpARM64BICshiftRA:
    43  		return rewriteValue_OpARM64BICshiftRA(v)
    44  	case ssaop.OpARM64BICshiftRL:
    45  		return rewriteValue_OpARM64BICshiftRL(v)
    46  	case ssaop.OpARM64BICshiftRO:
    47  		return rewriteValue_OpARM64BICshiftRO(v)
    48  	case ssaop.OpARM64CMN:
    49  		return rewriteValue_OpARM64CMN(v)
    50  	case ssaop.OpARM64CMNW:
    51  		return rewriteValue_OpARM64CMNW(v)
    52  	case ssaop.OpARM64CMNWconst:
    53  		return rewriteValue_OpARM64CMNWconst(v)
    54  	case ssaop.OpARM64CMNconst:
    55  		return rewriteValue_OpARM64CMNconst(v)
    56  	case ssaop.OpARM64CMNshiftLL:
    57  		return rewriteValue_OpARM64CMNshiftLL(v)
    58  	case ssaop.OpARM64CMNshiftRA:
    59  		return rewriteValue_OpARM64CMNshiftRA(v)
    60  	case ssaop.OpARM64CMNshiftRL:
    61  		return rewriteValue_OpARM64CMNshiftRL(v)
    62  	case ssaop.OpARM64CMP:
    63  		return rewriteValue_OpARM64CMP(v)
    64  	case ssaop.OpARM64CMPW:
    65  		return rewriteValue_OpARM64CMPW(v)
    66  	case ssaop.OpARM64CMPWconst:
    67  		return rewriteValue_OpARM64CMPWconst(v)
    68  	case ssaop.OpARM64CMPconst:
    69  		return rewriteValue_OpARM64CMPconst(v)
    70  	case ssaop.OpARM64CMPshiftLL:
    71  		return rewriteValue_OpARM64CMPshiftLL(v)
    72  	case ssaop.OpARM64CMPshiftRA:
    73  		return rewriteValue_OpARM64CMPshiftRA(v)
    74  	case ssaop.OpARM64CMPshiftRL:
    75  		return rewriteValue_OpARM64CMPshiftRL(v)
    76  	case ssaop.OpARM64CSEL:
    77  		return rewriteValue_OpARM64CSEL(v)
    78  	case ssaop.OpARM64CSEL0:
    79  		return rewriteValue_OpARM64CSEL0(v)
    80  	case ssaop.OpARM64CSETM:
    81  		return rewriteValue_OpARM64CSETM(v)
    82  	case ssaop.OpARM64CSINC:
    83  		return rewriteValue_OpARM64CSINC(v)
    84  	case ssaop.OpARM64CSINV:
    85  		return rewriteValue_OpARM64CSINV(v)
    86  	case ssaop.OpARM64CSNEG:
    87  		return rewriteValue_OpARM64CSNEG(v)
    88  	case ssaop.OpARM64DIV:
    89  		return rewriteValue_OpARM64DIV(v)
    90  	case ssaop.OpARM64DIVW:
    91  		return rewriteValue_OpARM64DIVW(v)
    92  	case ssaop.OpARM64EON:
    93  		return rewriteValue_OpARM64EON(v)
    94  	case ssaop.OpARM64EONshiftLL:
    95  		return rewriteValue_OpARM64EONshiftLL(v)
    96  	case ssaop.OpARM64EONshiftRA:
    97  		return rewriteValue_OpARM64EONshiftRA(v)
    98  	case ssaop.OpARM64EONshiftRL:
    99  		return rewriteValue_OpARM64EONshiftRL(v)
   100  	case ssaop.OpARM64EONshiftRO:
   101  		return rewriteValue_OpARM64EONshiftRO(v)
   102  	case ssaop.OpARM64Equal:
   103  		return rewriteValue_OpARM64Equal(v)
   104  	case ssaop.OpARM64FADDD:
   105  		return rewriteValue_OpARM64FADDD(v)
   106  	case ssaop.OpARM64FADDS:
   107  		return rewriteValue_OpARM64FADDS(v)
   108  	case ssaop.OpARM64FCMPD:
   109  		return rewriteValue_OpARM64FCMPD(v)
   110  	case ssaop.OpARM64FCMPS:
   111  		return rewriteValue_OpARM64FCMPS(v)
   112  	case ssaop.OpARM64FCSELD:
   113  		return rewriteValue_OpARM64FCSELD(v)
   114  	case ssaop.OpARM64FCSELS:
   115  		return rewriteValue_OpARM64FCSELS(v)
   116  	case ssaop.OpARM64FCVTDS:
   117  		return rewriteValue_OpARM64FCVTDS(v)
   118  	case ssaop.OpARM64FLDPQ:
   119  		return rewriteValue_OpARM64FLDPQ(v)
   120  	case ssaop.OpARM64FMOVDfpgp:
   121  		return rewriteValue_OpARM64FMOVDfpgp(v)
   122  	case ssaop.OpARM64FMOVDgpfp:
   123  		return rewriteValue_OpARM64FMOVDgpfp(v)
   124  	case ssaop.OpARM64FMOVDload:
   125  		return rewriteValue_OpARM64FMOVDload(v)
   126  	case ssaop.OpARM64FMOVDloadidx:
   127  		return rewriteValue_OpARM64FMOVDloadidx(v)
   128  	case ssaop.OpARM64FMOVDloadidx8:
   129  		return rewriteValue_OpARM64FMOVDloadidx8(v)
   130  	case ssaop.OpARM64FMOVDstore:
   131  		return rewriteValue_OpARM64FMOVDstore(v)
   132  	case ssaop.OpARM64FMOVDstoreidx:
   133  		return rewriteValue_OpARM64FMOVDstoreidx(v)
   134  	case ssaop.OpARM64FMOVDstoreidx8:
   135  		return rewriteValue_OpARM64FMOVDstoreidx8(v)
   136  	case ssaop.OpARM64FMOVQload:
   137  		return rewriteValue_OpARM64FMOVQload(v)
   138  	case ssaop.OpARM64FMOVQstore:
   139  		return rewriteValue_OpARM64FMOVQstore(v)
   140  	case ssaop.OpARM64FMOVSload:
   141  		return rewriteValue_OpARM64FMOVSload(v)
   142  	case ssaop.OpARM64FMOVSloadidx:
   143  		return rewriteValue_OpARM64FMOVSloadidx(v)
   144  	case ssaop.OpARM64FMOVSloadidx4:
   145  		return rewriteValue_OpARM64FMOVSloadidx4(v)
   146  	case ssaop.OpARM64FMOVSstore:
   147  		return rewriteValue_OpARM64FMOVSstore(v)
   148  	case ssaop.OpARM64FMOVSstoreidx:
   149  		return rewriteValue_OpARM64FMOVSstoreidx(v)
   150  	case ssaop.OpARM64FMOVSstoreidx4:
   151  		return rewriteValue_OpARM64FMOVSstoreidx4(v)
   152  	case ssaop.OpARM64FMULD:
   153  		return rewriteValue_OpARM64FMULD(v)
   154  	case ssaop.OpARM64FMULS:
   155  		return rewriteValue_OpARM64FMULS(v)
   156  	case ssaop.OpARM64FNEGD:
   157  		return rewriteValue_OpARM64FNEGD(v)
   158  	case ssaop.OpARM64FNEGS:
   159  		return rewriteValue_OpARM64FNEGS(v)
   160  	case ssaop.OpARM64FNMULD:
   161  		return rewriteValue_OpARM64FNMULD(v)
   162  	case ssaop.OpARM64FNMULS:
   163  		return rewriteValue_OpARM64FNMULS(v)
   164  	case ssaop.OpARM64FSTPQ:
   165  		return rewriteValue_OpARM64FSTPQ(v)
   166  	case ssaop.OpARM64FSUBD:
   167  		return rewriteValue_OpARM64FSUBD(v)
   168  	case ssaop.OpARM64FSUBS:
   169  		return rewriteValue_OpARM64FSUBS(v)
   170  	case ssaop.OpARM64GreaterEqual:
   171  		return rewriteValue_OpARM64GreaterEqual(v)
   172  	case ssaop.OpARM64GreaterEqualF:
   173  		return rewriteValue_OpARM64GreaterEqualF(v)
   174  	case ssaop.OpARM64GreaterEqualNoov:
   175  		return rewriteValue_OpARM64GreaterEqualNoov(v)
   176  	case ssaop.OpARM64GreaterEqualU:
   177  		return rewriteValue_OpARM64GreaterEqualU(v)
   178  	case ssaop.OpARM64GreaterThan:
   179  		return rewriteValue_OpARM64GreaterThan(v)
   180  	case ssaop.OpARM64GreaterThanF:
   181  		return rewriteValue_OpARM64GreaterThanF(v)
   182  	case ssaop.OpARM64GreaterThanU:
   183  		return rewriteValue_OpARM64GreaterThanU(v)
   184  	case ssaop.OpARM64LDP:
   185  		return rewriteValue_OpARM64LDP(v)
   186  	case ssaop.OpARM64LessEqual:
   187  		return rewriteValue_OpARM64LessEqual(v)
   188  	case ssaop.OpARM64LessEqualF:
   189  		return rewriteValue_OpARM64LessEqualF(v)
   190  	case ssaop.OpARM64LessEqualU:
   191  		return rewriteValue_OpARM64LessEqualU(v)
   192  	case ssaop.OpARM64LessThan:
   193  		return rewriteValue_OpARM64LessThan(v)
   194  	case ssaop.OpARM64LessThanF:
   195  		return rewriteValue_OpARM64LessThanF(v)
   196  	case ssaop.OpARM64LessThanNoov:
   197  		return rewriteValue_OpARM64LessThanNoov(v)
   198  	case ssaop.OpARM64LessThanU:
   199  		return rewriteValue_OpARM64LessThanU(v)
   200  	case ssaop.OpARM64LoweredPanicBoundsCR:
   201  		return rewriteValue_OpARM64LoweredPanicBoundsCR(v)
   202  	case ssaop.OpARM64LoweredPanicBoundsRC:
   203  		return rewriteValue_OpARM64LoweredPanicBoundsRC(v)
   204  	case ssaop.OpARM64LoweredPanicBoundsRR:
   205  		return rewriteValue_OpARM64LoweredPanicBoundsRR(v)
   206  	case ssaop.OpARM64MADD:
   207  		return rewriteValue_OpARM64MADD(v)
   208  	case ssaop.OpARM64MADDW:
   209  		return rewriteValue_OpARM64MADDW(v)
   210  	case ssaop.OpARM64MNEG:
   211  		return rewriteValue_OpARM64MNEG(v)
   212  	case ssaop.OpARM64MNEGW:
   213  		return rewriteValue_OpARM64MNEGW(v)
   214  	case ssaop.OpARM64MOD:
   215  		return rewriteValue_OpARM64MOD(v)
   216  	case ssaop.OpARM64MODW:
   217  		return rewriteValue_OpARM64MODW(v)
   218  	case ssaop.OpARM64MOVBUload:
   219  		return rewriteValue_OpARM64MOVBUload(v)
   220  	case ssaop.OpARM64MOVBUloadidx:
   221  		return rewriteValue_OpARM64MOVBUloadidx(v)
   222  	case ssaop.OpARM64MOVBUreg:
   223  		return rewriteValue_OpARM64MOVBUreg(v)
   224  	case ssaop.OpARM64MOVBload:
   225  		return rewriteValue_OpARM64MOVBload(v)
   226  	case ssaop.OpARM64MOVBloadidx:
   227  		return rewriteValue_OpARM64MOVBloadidx(v)
   228  	case ssaop.OpARM64MOVBreg:
   229  		return rewriteValue_OpARM64MOVBreg(v)
   230  	case ssaop.OpARM64MOVBstore:
   231  		return rewriteValue_OpARM64MOVBstore(v)
   232  	case ssaop.OpARM64MOVBstoreidx:
   233  		return rewriteValue_OpARM64MOVBstoreidx(v)
   234  	case ssaop.OpARM64MOVDload:
   235  		return rewriteValue_OpARM64MOVDload(v)
   236  	case ssaop.OpARM64MOVDloadidx:
   237  		return rewriteValue_OpARM64MOVDloadidx(v)
   238  	case ssaop.OpARM64MOVDloadidx8:
   239  		return rewriteValue_OpARM64MOVDloadidx8(v)
   240  	case ssaop.OpARM64MOVDnop:
   241  		return rewriteValue_OpARM64MOVDnop(v)
   242  	case ssaop.OpARM64MOVDreg:
   243  		return rewriteValue_OpARM64MOVDreg(v)
   244  	case ssaop.OpARM64MOVDstore:
   245  		return rewriteValue_OpARM64MOVDstore(v)
   246  	case ssaop.OpARM64MOVDstoreidx:
   247  		return rewriteValue_OpARM64MOVDstoreidx(v)
   248  	case ssaop.OpARM64MOVDstoreidx8:
   249  		return rewriteValue_OpARM64MOVDstoreidx8(v)
   250  	case ssaop.OpARM64MOVHUload:
   251  		return rewriteValue_OpARM64MOVHUload(v)
   252  	case ssaop.OpARM64MOVHUloadidx:
   253  		return rewriteValue_OpARM64MOVHUloadidx(v)
   254  	case ssaop.OpARM64MOVHUloadidx2:
   255  		return rewriteValue_OpARM64MOVHUloadidx2(v)
   256  	case ssaop.OpARM64MOVHUreg:
   257  		return rewriteValue_OpARM64MOVHUreg(v)
   258  	case ssaop.OpARM64MOVHload:
   259  		return rewriteValue_OpARM64MOVHload(v)
   260  	case ssaop.OpARM64MOVHloadidx:
   261  		return rewriteValue_OpARM64MOVHloadidx(v)
   262  	case ssaop.OpARM64MOVHloadidx2:
   263  		return rewriteValue_OpARM64MOVHloadidx2(v)
   264  	case ssaop.OpARM64MOVHreg:
   265  		return rewriteValue_OpARM64MOVHreg(v)
   266  	case ssaop.OpARM64MOVHstore:
   267  		return rewriteValue_OpARM64MOVHstore(v)
   268  	case ssaop.OpARM64MOVHstoreidx:
   269  		return rewriteValue_OpARM64MOVHstoreidx(v)
   270  	case ssaop.OpARM64MOVHstoreidx2:
   271  		return rewriteValue_OpARM64MOVHstoreidx2(v)
   272  	case ssaop.OpARM64MOVWUload:
   273  		return rewriteValue_OpARM64MOVWUload(v)
   274  	case ssaop.OpARM64MOVWUloadidx:
   275  		return rewriteValue_OpARM64MOVWUloadidx(v)
   276  	case ssaop.OpARM64MOVWUloadidx4:
   277  		return rewriteValue_OpARM64MOVWUloadidx4(v)
   278  	case ssaop.OpARM64MOVWUreg:
   279  		return rewriteValue_OpARM64MOVWUreg(v)
   280  	case ssaop.OpARM64MOVWload:
   281  		return rewriteValue_OpARM64MOVWload(v)
   282  	case ssaop.OpARM64MOVWloadidx:
   283  		return rewriteValue_OpARM64MOVWloadidx(v)
   284  	case ssaop.OpARM64MOVWloadidx4:
   285  		return rewriteValue_OpARM64MOVWloadidx4(v)
   286  	case ssaop.OpARM64MOVWreg:
   287  		return rewriteValue_OpARM64MOVWreg(v)
   288  	case ssaop.OpARM64MOVWstore:
   289  		return rewriteValue_OpARM64MOVWstore(v)
   290  	case ssaop.OpARM64MOVWstoreidx:
   291  		return rewriteValue_OpARM64MOVWstoreidx(v)
   292  	case ssaop.OpARM64MOVWstoreidx4:
   293  		return rewriteValue_OpARM64MOVWstoreidx4(v)
   294  	case ssaop.OpARM64MSUB:
   295  		return rewriteValue_OpARM64MSUB(v)
   296  	case ssaop.OpARM64MSUBW:
   297  		return rewriteValue_OpARM64MSUBW(v)
   298  	case ssaop.OpARM64MUL:
   299  		return rewriteValue_OpARM64MUL(v)
   300  	case ssaop.OpARM64MULW:
   301  		return rewriteValue_OpARM64MULW(v)
   302  	case ssaop.OpARM64MVN:
   303  		return rewriteValue_OpARM64MVN(v)
   304  	case ssaop.OpARM64MVNshiftLL:
   305  		return rewriteValue_OpARM64MVNshiftLL(v)
   306  	case ssaop.OpARM64MVNshiftRA:
   307  		return rewriteValue_OpARM64MVNshiftRA(v)
   308  	case ssaop.OpARM64MVNshiftRL:
   309  		return rewriteValue_OpARM64MVNshiftRL(v)
   310  	case ssaop.OpARM64MVNshiftRO:
   311  		return rewriteValue_OpARM64MVNshiftRO(v)
   312  	case ssaop.OpARM64NEG:
   313  		return rewriteValue_OpARM64NEG(v)
   314  	case ssaop.OpARM64NEGshiftLL:
   315  		return rewriteValue_OpARM64NEGshiftLL(v)
   316  	case ssaop.OpARM64NEGshiftRA:
   317  		return rewriteValue_OpARM64NEGshiftRA(v)
   318  	case ssaop.OpARM64NEGshiftRL:
   319  		return rewriteValue_OpARM64NEGshiftRL(v)
   320  	case ssaop.OpARM64NotEqual:
   321  		return rewriteValue_OpARM64NotEqual(v)
   322  	case ssaop.OpARM64OR:
   323  		return rewriteValue_OpARM64OR(v)
   324  	case ssaop.OpARM64ORN:
   325  		return rewriteValue_OpARM64ORN(v)
   326  	case ssaop.OpARM64ORNshiftLL:
   327  		return rewriteValue_OpARM64ORNshiftLL(v)
   328  	case ssaop.OpARM64ORNshiftRA:
   329  		return rewriteValue_OpARM64ORNshiftRA(v)
   330  	case ssaop.OpARM64ORNshiftRL:
   331  		return rewriteValue_OpARM64ORNshiftRL(v)
   332  	case ssaop.OpARM64ORNshiftRO:
   333  		return rewriteValue_OpARM64ORNshiftRO(v)
   334  	case ssaop.OpARM64ORconst:
   335  		return rewriteValue_OpARM64ORconst(v)
   336  	case ssaop.OpARM64ORshiftLL:
   337  		return rewriteValue_OpARM64ORshiftLL(v)
   338  	case ssaop.OpARM64ORshiftRA:
   339  		return rewriteValue_OpARM64ORshiftRA(v)
   340  	case ssaop.OpARM64ORshiftRL:
   341  		return rewriteValue_OpARM64ORshiftRL(v)
   342  	case ssaop.OpARM64ORshiftRO:
   343  		return rewriteValue_OpARM64ORshiftRO(v)
   344  	case ssaop.OpARM64REV:
   345  		return rewriteValue_OpARM64REV(v)
   346  	case ssaop.OpARM64REV16:
   347  		return rewriteValue_OpARM64REV16(v)
   348  	case ssaop.OpARM64REVW:
   349  		return rewriteValue_OpARM64REVW(v)
   350  	case ssaop.OpARM64ROR:
   351  		return rewriteValue_OpARM64ROR(v)
   352  	case ssaop.OpARM64RORW:
   353  		return rewriteValue_OpARM64RORW(v)
   354  	case ssaop.OpARM64SBCSflags:
   355  		return rewriteValue_OpARM64SBCSflags(v)
   356  	case ssaop.OpARM64SBFX:
   357  		return rewriteValue_OpARM64SBFX(v)
   358  	case ssaop.OpARM64SLL:
   359  		return rewriteValue_OpARM64SLL(v)
   360  	case ssaop.OpARM64SLLconst:
   361  		return rewriteValue_OpARM64SLLconst(v)
   362  	case ssaop.OpARM64SRA:
   363  		return rewriteValue_OpARM64SRA(v)
   364  	case ssaop.OpARM64SRAconst:
   365  		return rewriteValue_OpARM64SRAconst(v)
   366  	case ssaop.OpARM64SRL:
   367  		return rewriteValue_OpARM64SRL(v)
   368  	case ssaop.OpARM64SRLconst:
   369  		return rewriteValue_OpARM64SRLconst(v)
   370  	case ssaop.OpARM64STP:
   371  		return rewriteValue_OpARM64STP(v)
   372  	case ssaop.OpARM64SUB:
   373  		return rewriteValue_OpARM64SUB(v)
   374  	case ssaop.OpARM64SUBconst:
   375  		return rewriteValue_OpARM64SUBconst(v)
   376  	case ssaop.OpARM64SUBshiftLL:
   377  		return rewriteValue_OpARM64SUBshiftLL(v)
   378  	case ssaop.OpARM64SUBshiftRA:
   379  		return rewriteValue_OpARM64SUBshiftRA(v)
   380  	case ssaop.OpARM64SUBshiftRL:
   381  		return rewriteValue_OpARM64SUBshiftRL(v)
   382  	case ssaop.OpARM64TST:
   383  		return rewriteValue_OpARM64TST(v)
   384  	case ssaop.OpARM64TSTW:
   385  		return rewriteValue_OpARM64TSTW(v)
   386  	case ssaop.OpARM64TSTWconst:
   387  		return rewriteValue_OpARM64TSTWconst(v)
   388  	case ssaop.OpARM64TSTconst:
   389  		return rewriteValue_OpARM64TSTconst(v)
   390  	case ssaop.OpARM64TSTshiftLL:
   391  		return rewriteValue_OpARM64TSTshiftLL(v)
   392  	case ssaop.OpARM64TSTshiftRA:
   393  		return rewriteValue_OpARM64TSTshiftRA(v)
   394  	case ssaop.OpARM64TSTshiftRL:
   395  		return rewriteValue_OpARM64TSTshiftRL(v)
   396  	case ssaop.OpARM64TSTshiftRO:
   397  		return rewriteValue_OpARM64TSTshiftRO(v)
   398  	case ssaop.OpARM64UBFIZ:
   399  		return rewriteValue_OpARM64UBFIZ(v)
   400  	case ssaop.OpARM64UBFX:
   401  		return rewriteValue_OpARM64UBFX(v)
   402  	case ssaop.OpARM64UDIV:
   403  		return rewriteValue_OpARM64UDIV(v)
   404  	case ssaop.OpARM64UDIVW:
   405  		return rewriteValue_OpARM64UDIVW(v)
   406  	case ssaop.OpARM64UMOD:
   407  		return rewriteValue_OpARM64UMOD(v)
   408  	case ssaop.OpARM64UMODW:
   409  		return rewriteValue_OpARM64UMODW(v)
   410  	case ssaop.OpARM64VBIF16B:
   411  		return rewriteValue_OpARM64VBIF16B(v)
   412  	case ssaop.OpARM64VBIT16B:
   413  		return rewriteValue_OpARM64VBIT16B(v)
   414  	case ssaop.OpARM64VDUPBbcast:
   415  		return rewriteValue_OpARM64VDUPBbcast(v)
   416  	case ssaop.OpARM64VFCVTL4S:
   417  		return rewriteValue_OpARM64VFCVTL4S(v)
   418  	case ssaop.OpARM64VMOVDins0:
   419  		return rewriteValue_OpARM64VMOVDins0(v)
   420  	case ssaop.OpARM64VMOVSins0:
   421  		return rewriteValue_OpARM64VMOVSins0(v)
   422  	case ssaop.OpARM64VPMULL2D:
   423  		return rewriteValue_OpARM64VPMULL2D(v)
   424  	case ssaop.OpARM64VSHL16B:
   425  		return rewriteValue_OpARM64VSHL16B(v)
   426  	case ssaop.OpARM64VSHL2D:
   427  		return rewriteValue_OpARM64VSHL2D(v)
   428  	case ssaop.OpARM64VSHL4S:
   429  		return rewriteValue_OpARM64VSHL4S(v)
   430  	case ssaop.OpARM64VSHL8H:
   431  		return rewriteValue_OpARM64VSHL8H(v)
   432  	case ssaop.OpARM64VSHRN2D:
   433  		return rewriteValue_OpARM64VSHRN2D(v)
   434  	case ssaop.OpARM64VSHRN4S:
   435  		return rewriteValue_OpARM64VSHRN4S(v)
   436  	case ssaop.OpARM64VSHRN8H:
   437  		return rewriteValue_OpARM64VSHRN8H(v)
   438  	case ssaop.OpARM64VSMULL16B:
   439  		return rewriteValue_OpARM64VSMULL16B(v)
   440  	case ssaop.OpARM64VSMULL4S:
   441  		return rewriteValue_OpARM64VSMULL4S(v)
   442  	case ssaop.OpARM64VSMULL8H:
   443  		return rewriteValue_OpARM64VSMULL8H(v)
   444  	case ssaop.OpARM64VSQSHL16Bconst:
   445  		return rewriteValue_OpARM64VSQSHL16Bconst(v)
   446  	case ssaop.OpARM64VSQSHL2Dconst:
   447  		return rewriteValue_OpARM64VSQSHL2Dconst(v)
   448  	case ssaop.OpARM64VSQSHL4Sconst:
   449  		return rewriteValue_OpARM64VSQSHL4Sconst(v)
   450  	case ssaop.OpARM64VSQSHL8Hconst:
   451  		return rewriteValue_OpARM64VSQSHL8Hconst(v)
   452  	case ssaop.OpARM64VSSHLL16B:
   453  		return rewriteValue_OpARM64VSSHLL16B(v)
   454  	case ssaop.OpARM64VSSHLL4S:
   455  		return rewriteValue_OpARM64VSSHLL4S(v)
   456  	case ssaop.OpARM64VSSHLL8H:
   457  		return rewriteValue_OpARM64VSSHLL8H(v)
   458  	case ssaop.OpARM64VSSHR16B:
   459  		return rewriteValue_OpARM64VSSHR16B(v)
   460  	case ssaop.OpARM64VSSHR2D:
   461  		return rewriteValue_OpARM64VSSHR2D(v)
   462  	case ssaop.OpARM64VSSHR4S:
   463  		return rewriteValue_OpARM64VSSHR4S(v)
   464  	case ssaop.OpARM64VSSHR8H:
   465  		return rewriteValue_OpARM64VSSHR8H(v)
   466  	case ssaop.OpARM64VSXTL16B:
   467  		return rewriteValue_OpARM64VSXTL16B(v)
   468  	case ssaop.OpARM64VSXTL4S:
   469  		return rewriteValue_OpARM64VSXTL4S(v)
   470  	case ssaop.OpARM64VSXTL8H:
   471  		return rewriteValue_OpARM64VSXTL8H(v)
   472  	case ssaop.OpARM64VUMULL16B:
   473  		return rewriteValue_OpARM64VUMULL16B(v)
   474  	case ssaop.OpARM64VUMULL4S:
   475  		return rewriteValue_OpARM64VUMULL4S(v)
   476  	case ssaop.OpARM64VUMULL8H:
   477  		return rewriteValue_OpARM64VUMULL8H(v)
   478  	case ssaop.OpARM64VUQSHL16Bconst:
   479  		return rewriteValue_OpARM64VUQSHL16Bconst(v)
   480  	case ssaop.OpARM64VUQSHL2Dconst:
   481  		return rewriteValue_OpARM64VUQSHL2Dconst(v)
   482  	case ssaop.OpARM64VUQSHL4Sconst:
   483  		return rewriteValue_OpARM64VUQSHL4Sconst(v)
   484  	case ssaop.OpARM64VUQSHL8Hconst:
   485  		return rewriteValue_OpARM64VUQSHL8Hconst(v)
   486  	case ssaop.OpARM64VUSHLL16B:
   487  		return rewriteValue_OpARM64VUSHLL16B(v)
   488  	case ssaop.OpARM64VUSHLL4S:
   489  		return rewriteValue_OpARM64VUSHLL4S(v)
   490  	case ssaop.OpARM64VUSHLL8H:
   491  		return rewriteValue_OpARM64VUSHLL8H(v)
   492  	case ssaop.OpARM64VUSHR16B:
   493  		return rewriteValue_OpARM64VUSHR16B(v)
   494  	case ssaop.OpARM64VUSHR2D:
   495  		return rewriteValue_OpARM64VUSHR2D(v)
   496  	case ssaop.OpARM64VUSHR4S:
   497  		return rewriteValue_OpARM64VUSHR4S(v)
   498  	case ssaop.OpARM64VUSHR8H:
   499  		return rewriteValue_OpARM64VUSHR8H(v)
   500  	case ssaop.OpARM64VUXTL16B:
   501  		return rewriteValue_OpARM64VUXTL16B(v)
   502  	case ssaop.OpARM64VUXTL4S:
   503  		return rewriteValue_OpARM64VUXTL4S(v)
   504  	case ssaop.OpARM64VUXTL8H:
   505  		return rewriteValue_OpARM64VUXTL8H(v)
   506  	case ssaop.OpARM64XOR:
   507  		return rewriteValue_OpARM64XOR(v)
   508  	case ssaop.OpARM64XORconst:
   509  		return rewriteValue_OpARM64XORconst(v)
   510  	case ssaop.OpARM64XORshiftLL:
   511  		return rewriteValue_OpARM64XORshiftLL(v)
   512  	case ssaop.OpARM64XORshiftRA:
   513  		return rewriteValue_OpARM64XORshiftRA(v)
   514  	case ssaop.OpARM64XORshiftRL:
   515  		return rewriteValue_OpARM64XORshiftRL(v)
   516  	case ssaop.OpARM64XORshiftRO:
   517  		return rewriteValue_OpARM64XORshiftRO(v)
   518  	case ssaop.OpAbs:
   519  		v.Op = ssaop.OpARM64FABSD
   520  		return true
   521  	case ssaop.OpAbsFloat32x4:
   522  		v.Op = ssaop.OpARM64VFABS4S
   523  		return true
   524  	case ssaop.OpAbsFloat64x2:
   525  		v.Op = ssaop.OpARM64VFABS2D
   526  		return true
   527  	case ssaop.OpAbsInt16x8:
   528  		v.Op = ssaop.OpARM64VABS8H
   529  		return true
   530  	case ssaop.OpAbsInt32x4:
   531  		v.Op = ssaop.OpARM64VABS4S
   532  		return true
   533  	case ssaop.OpAbsInt64x2:
   534  		v.Op = ssaop.OpARM64VABS2D
   535  		return true
   536  	case ssaop.OpAbsInt8x16:
   537  		v.Op = ssaop.OpARM64VABS16B
   538  		return true
   539  	case ssaop.OpAdd16:
   540  		v.Op = ssaop.OpARM64ADD
   541  		return true
   542  	case ssaop.OpAdd32:
   543  		v.Op = ssaop.OpARM64ADD
   544  		return true
   545  	case ssaop.OpAdd32F:
   546  		v.Op = ssaop.OpARM64FADDS
   547  		return true
   548  	case ssaop.OpAdd64:
   549  		v.Op = ssaop.OpARM64ADD
   550  		return true
   551  	case ssaop.OpAdd64F:
   552  		v.Op = ssaop.OpARM64FADDD
   553  		return true
   554  	case ssaop.OpAdd8:
   555  		v.Op = ssaop.OpARM64ADD
   556  		return true
   557  	case ssaop.OpAddFloat32x4:
   558  		v.Op = ssaop.OpARM64VFADD4S
   559  		return true
   560  	case ssaop.OpAddFloat64x2:
   561  		v.Op = ssaop.OpARM64VFADD2D
   562  		return true
   563  	case ssaop.OpAddInt16x8:
   564  		v.Op = ssaop.OpARM64VADD8H
   565  		return true
   566  	case ssaop.OpAddInt32x4:
   567  		v.Op = ssaop.OpARM64VADD4S
   568  		return true
   569  	case ssaop.OpAddInt64x2:
   570  		v.Op = ssaop.OpARM64VADD2D
   571  		return true
   572  	case ssaop.OpAddInt8s:
   573  		return rewriteValue_OpAddInt8s(v)
   574  	case ssaop.OpAddInt8x16:
   575  		v.Op = ssaop.OpARM64VADD16B
   576  		return true
   577  	case ssaop.OpAddPtr:
   578  		v.Op = ssaop.OpARM64ADD
   579  		return true
   580  	case ssaop.OpAddSaturatedInt16x8:
   581  		v.Op = ssaop.OpARM64VSQADD8H
   582  		return true
   583  	case ssaop.OpAddSaturatedInt32x4:
   584  		v.Op = ssaop.OpARM64VSQADD4S
   585  		return true
   586  	case ssaop.OpAddSaturatedInt64x2:
   587  		v.Op = ssaop.OpARM64VSQADD2D
   588  		return true
   589  	case ssaop.OpAddSaturatedInt8x16:
   590  		v.Op = ssaop.OpARM64VSQADD16B
   591  		return true
   592  	case ssaop.OpAddSaturatedUint16x8:
   593  		v.Op = ssaop.OpARM64VUQADD8H
   594  		return true
   595  	case ssaop.OpAddSaturatedUint32x4:
   596  		v.Op = ssaop.OpARM64VUQADD4S
   597  		return true
   598  	case ssaop.OpAddSaturatedUint64x2:
   599  		v.Op = ssaop.OpARM64VUQADD2D
   600  		return true
   601  	case ssaop.OpAddSaturatedUint8x16:
   602  		v.Op = ssaop.OpARM64VUQADD16B
   603  		return true
   604  	case ssaop.OpAddUint16x8:
   605  		v.Op = ssaop.OpARM64VADD8H
   606  		return true
   607  	case ssaop.OpAddUint32x4:
   608  		v.Op = ssaop.OpARM64VADD4S
   609  		return true
   610  	case ssaop.OpAddUint64x2:
   611  		v.Op = ssaop.OpARM64VADD2D
   612  		return true
   613  	case ssaop.OpAddUint8x16:
   614  		v.Op = ssaop.OpARM64VADD16B
   615  		return true
   616  	case ssaop.OpAddr:
   617  		return rewriteValue_OpAddr(v)
   618  	case ssaop.OpAnd16:
   619  		v.Op = ssaop.OpARM64AND
   620  		return true
   621  	case ssaop.OpAnd32:
   622  		v.Op = ssaop.OpARM64AND
   623  		return true
   624  	case ssaop.OpAnd64:
   625  		v.Op = ssaop.OpARM64AND
   626  		return true
   627  	case ssaop.OpAnd8:
   628  		v.Op = ssaop.OpARM64AND
   629  		return true
   630  	case ssaop.OpAndB:
   631  		v.Op = ssaop.OpARM64AND
   632  		return true
   633  	case ssaop.OpAndInt16x8:
   634  		v.Op = ssaop.OpARM64VAND16B
   635  		return true
   636  	case ssaop.OpAndInt32x4:
   637  		v.Op = ssaop.OpARM64VAND16B
   638  		return true
   639  	case ssaop.OpAndInt64x2:
   640  		v.Op = ssaop.OpARM64VAND16B
   641  		return true
   642  	case ssaop.OpAndInt8x16:
   643  		v.Op = ssaop.OpARM64VAND16B
   644  		return true
   645  	case ssaop.OpAndNotInt16x8:
   646  		v.Op = ssaop.OpARM64VBIC16B
   647  		return true
   648  	case ssaop.OpAndNotInt32x4:
   649  		v.Op = ssaop.OpARM64VBIC16B
   650  		return true
   651  	case ssaop.OpAndNotInt64x2:
   652  		v.Op = ssaop.OpARM64VBIC16B
   653  		return true
   654  	case ssaop.OpAndNotInt8x16:
   655  		v.Op = ssaop.OpARM64VBIC16B
   656  		return true
   657  	case ssaop.OpAndNotUint16x8:
   658  		v.Op = ssaop.OpARM64VBIC16B
   659  		return true
   660  	case ssaop.OpAndNotUint32x4:
   661  		v.Op = ssaop.OpARM64VBIC16B
   662  		return true
   663  	case ssaop.OpAndNotUint64x2:
   664  		v.Op = ssaop.OpARM64VBIC16B
   665  		return true
   666  	case ssaop.OpAndNotUint8x16:
   667  		v.Op = ssaop.OpARM64VBIC16B
   668  		return true
   669  	case ssaop.OpAndUint16x8:
   670  		v.Op = ssaop.OpARM64VAND16B
   671  		return true
   672  	case ssaop.OpAndUint32x4:
   673  		v.Op = ssaop.OpARM64VAND16B
   674  		return true
   675  	case ssaop.OpAndUint64x2:
   676  		v.Op = ssaop.OpARM64VAND16B
   677  		return true
   678  	case ssaop.OpAndUint8x16:
   679  		v.Op = ssaop.OpARM64VAND16B
   680  		return true
   681  	case ssaop.OpAtomicAdd32:
   682  		v.Op = ssaop.OpARM64LoweredAtomicAdd32
   683  		return true
   684  	case ssaop.OpAtomicAdd32Variant:
   685  		v.Op = ssaop.OpARM64LoweredAtomicAdd32Variant
   686  		return true
   687  	case ssaop.OpAtomicAdd64:
   688  		v.Op = ssaop.OpARM64LoweredAtomicAdd64
   689  		return true
   690  	case ssaop.OpAtomicAdd64Variant:
   691  		v.Op = ssaop.OpARM64LoweredAtomicAdd64Variant
   692  		return true
   693  	case ssaop.OpAtomicAnd32value:
   694  		v.Op = ssaop.OpARM64LoweredAtomicAnd32
   695  		return true
   696  	case ssaop.OpAtomicAnd32valueVariant:
   697  		v.Op = ssaop.OpARM64LoweredAtomicAnd32Variant
   698  		return true
   699  	case ssaop.OpAtomicAnd64value:
   700  		v.Op = ssaop.OpARM64LoweredAtomicAnd64
   701  		return true
   702  	case ssaop.OpAtomicAnd64valueVariant:
   703  		v.Op = ssaop.OpARM64LoweredAtomicAnd64Variant
   704  		return true
   705  	case ssaop.OpAtomicAnd8value:
   706  		v.Op = ssaop.OpARM64LoweredAtomicAnd8
   707  		return true
   708  	case ssaop.OpAtomicAnd8valueVariant:
   709  		v.Op = ssaop.OpARM64LoweredAtomicAnd8Variant
   710  		return true
   711  	case ssaop.OpAtomicCompareAndSwap32:
   712  		v.Op = ssaop.OpARM64LoweredAtomicCas32
   713  		return true
   714  	case ssaop.OpAtomicCompareAndSwap32Variant:
   715  		v.Op = ssaop.OpARM64LoweredAtomicCas32Variant
   716  		return true
   717  	case ssaop.OpAtomicCompareAndSwap64:
   718  		v.Op = ssaop.OpARM64LoweredAtomicCas64
   719  		return true
   720  	case ssaop.OpAtomicCompareAndSwap64Variant:
   721  		v.Op = ssaop.OpARM64LoweredAtomicCas64Variant
   722  		return true
   723  	case ssaop.OpAtomicExchange32:
   724  		v.Op = ssaop.OpARM64LoweredAtomicExchange32
   725  		return true
   726  	case ssaop.OpAtomicExchange32Variant:
   727  		v.Op = ssaop.OpARM64LoweredAtomicExchange32Variant
   728  		return true
   729  	case ssaop.OpAtomicExchange64:
   730  		v.Op = ssaop.OpARM64LoweredAtomicExchange64
   731  		return true
   732  	case ssaop.OpAtomicExchange64Variant:
   733  		v.Op = ssaop.OpARM64LoweredAtomicExchange64Variant
   734  		return true
   735  	case ssaop.OpAtomicExchange8:
   736  		v.Op = ssaop.OpARM64LoweredAtomicExchange8
   737  		return true
   738  	case ssaop.OpAtomicExchange8Variant:
   739  		v.Op = ssaop.OpARM64LoweredAtomicExchange8Variant
   740  		return true
   741  	case ssaop.OpAtomicLoad32:
   742  		v.Op = ssaop.OpARM64LDARW
   743  		return true
   744  	case ssaop.OpAtomicLoad64:
   745  		v.Op = ssaop.OpARM64LDAR
   746  		return true
   747  	case ssaop.OpAtomicLoad8:
   748  		v.Op = ssaop.OpARM64LDARB
   749  		return true
   750  	case ssaop.OpAtomicLoadPtr:
   751  		v.Op = ssaop.OpARM64LDAR
   752  		return true
   753  	case ssaop.OpAtomicOr32value:
   754  		v.Op = ssaop.OpARM64LoweredAtomicOr32
   755  		return true
   756  	case ssaop.OpAtomicOr32valueVariant:
   757  		v.Op = ssaop.OpARM64LoweredAtomicOr32Variant
   758  		return true
   759  	case ssaop.OpAtomicOr64value:
   760  		v.Op = ssaop.OpARM64LoweredAtomicOr64
   761  		return true
   762  	case ssaop.OpAtomicOr64valueVariant:
   763  		v.Op = ssaop.OpARM64LoweredAtomicOr64Variant
   764  		return true
   765  	case ssaop.OpAtomicOr8value:
   766  		v.Op = ssaop.OpARM64LoweredAtomicOr8
   767  		return true
   768  	case ssaop.OpAtomicOr8valueVariant:
   769  		v.Op = ssaop.OpARM64LoweredAtomicOr8Variant
   770  		return true
   771  	case ssaop.OpAtomicStore32:
   772  		v.Op = ssaop.OpARM64STLRW
   773  		return true
   774  	case ssaop.OpAtomicStore64:
   775  		v.Op = ssaop.OpARM64STLR
   776  		return true
   777  	case ssaop.OpAtomicStore8:
   778  		v.Op = ssaop.OpARM64STLRB
   779  		return true
   780  	case ssaop.OpAtomicStorePtrNoWB:
   781  		v.Op = ssaop.OpARM64STLR
   782  		return true
   783  	case ssaop.OpAverageInt16x8:
   784  		v.Op = ssaop.OpARM64VSRHADD8H
   785  		return true
   786  	case ssaop.OpAverageInt32x4:
   787  		v.Op = ssaop.OpARM64VSRHADD4S
   788  		return true
   789  	case ssaop.OpAverageInt8x16:
   790  		v.Op = ssaop.OpARM64VSRHADD16B
   791  		return true
   792  	case ssaop.OpAverageUint16x8:
   793  		v.Op = ssaop.OpARM64VURHADD8H
   794  		return true
   795  	case ssaop.OpAverageUint32x4:
   796  		v.Op = ssaop.OpARM64VURHADD4S
   797  		return true
   798  	case ssaop.OpAverageUint8x16:
   799  		v.Op = ssaop.OpARM64VURHADD16B
   800  		return true
   801  	case ssaop.OpAvg64u:
   802  		return rewriteValue_OpAvg64u(v)
   803  	case ssaop.OpBitLen16:
   804  		return rewriteValue_OpBitLen16(v)
   805  	case ssaop.OpBitLen32:
   806  		return rewriteValue_OpBitLen32(v)
   807  	case ssaop.OpBitLen64:
   808  		return rewriteValue_OpBitLen64(v)
   809  	case ssaop.OpBitLen8:
   810  		return rewriteValue_OpBitLen8(v)
   811  	case ssaop.OpBitRev16:
   812  		return rewriteValue_OpBitRev16(v)
   813  	case ssaop.OpBitRev32:
   814  		v.Op = ssaop.OpARM64RBITW
   815  		return true
   816  	case ssaop.OpBitRev64:
   817  		v.Op = ssaop.OpARM64RBIT
   818  		return true
   819  	case ssaop.OpBitRev8:
   820  		return rewriteValue_OpBitRev8(v)
   821  	case ssaop.OpBswap16:
   822  		v.Op = ssaop.OpARM64REV16W
   823  		return true
   824  	case ssaop.OpBswap32:
   825  		v.Op = ssaop.OpARM64REVW
   826  		return true
   827  	case ssaop.OpBswap64:
   828  		v.Op = ssaop.OpARM64REV
   829  		return true
   830  	case ssaop.OpCeil:
   831  		v.Op = ssaop.OpARM64FRINTPD
   832  		return true
   833  	case ssaop.OpCeilFloat32x4:
   834  		v.Op = ssaop.OpARM64VFRINTP4S
   835  		return true
   836  	case ssaop.OpCeilFloat64x2:
   837  		v.Op = ssaop.OpARM64VFRINTP2D
   838  		return true
   839  	case ssaop.OpClosureCall:
   840  		v.Op = ssaop.OpARM64CALLclosure
   841  		return true
   842  	case ssaop.OpCom16:
   843  		v.Op = ssaop.OpARM64MVN
   844  		return true
   845  	case ssaop.OpCom32:
   846  		v.Op = ssaop.OpARM64MVN
   847  		return true
   848  	case ssaop.OpCom64:
   849  		v.Op = ssaop.OpARM64MVN
   850  		return true
   851  	case ssaop.OpCom8:
   852  		v.Op = ssaop.OpARM64MVN
   853  		return true
   854  	case ssaop.OpConcatAddPairsFloat32x4:
   855  		v.Op = ssaop.OpARM64VFADDP4S
   856  		return true
   857  	case ssaop.OpConcatAddPairsFloat64x2:
   858  		v.Op = ssaop.OpARM64VFADDP2D
   859  		return true
   860  	case ssaop.OpConcatAddPairsInt16x8:
   861  		v.Op = ssaop.OpARM64VADDP8H
   862  		return true
   863  	case ssaop.OpConcatAddPairsInt32x4:
   864  		v.Op = ssaop.OpARM64VADDP4S
   865  		return true
   866  	case ssaop.OpConcatAddPairsInt64x2:
   867  		v.Op = ssaop.OpARM64VADDP2D
   868  		return true
   869  	case ssaop.OpConcatAddPairsUint16x8:
   870  		v.Op = ssaop.OpARM64VADDP8H
   871  		return true
   872  	case ssaop.OpConcatAddPairsUint32x4:
   873  		v.Op = ssaop.OpARM64VADDP4S
   874  		return true
   875  	case ssaop.OpConcatAddPairsUint64x2:
   876  		v.Op = ssaop.OpARM64VADDP2D
   877  		return true
   878  	case ssaop.OpConcatEvenInt16x8:
   879  		v.Op = ssaop.OpARM64VUZP18H
   880  		return true
   881  	case ssaop.OpConcatEvenInt32x4:
   882  		v.Op = ssaop.OpARM64VUZP14S
   883  		return true
   884  	case ssaop.OpConcatEvenInt64x2:
   885  		v.Op = ssaop.OpARM64VUZP12D
   886  		return true
   887  	case ssaop.OpConcatEvenInt8x16:
   888  		v.Op = ssaop.OpARM64VUZP116B
   889  		return true
   890  	case ssaop.OpConcatEvenUint16x8:
   891  		v.Op = ssaop.OpARM64VUZP18H
   892  		return true
   893  	case ssaop.OpConcatEvenUint32x4:
   894  		v.Op = ssaop.OpARM64VUZP14S
   895  		return true
   896  	case ssaop.OpConcatEvenUint64x2:
   897  		v.Op = ssaop.OpARM64VUZP12D
   898  		return true
   899  	case ssaop.OpConcatEvenUint8x16:
   900  		v.Op = ssaop.OpARM64VUZP116B
   901  		return true
   902  	case ssaop.OpConcatOddInt16x8:
   903  		v.Op = ssaop.OpARM64VUZP28H
   904  		return true
   905  	case ssaop.OpConcatOddInt32x4:
   906  		v.Op = ssaop.OpARM64VUZP24S
   907  		return true
   908  	case ssaop.OpConcatOddInt64x2:
   909  		v.Op = ssaop.OpARM64VUZP22D
   910  		return true
   911  	case ssaop.OpConcatOddInt8x16:
   912  		v.Op = ssaop.OpARM64VUZP216B
   913  		return true
   914  	case ssaop.OpConcatOddUint16x8:
   915  		v.Op = ssaop.OpARM64VUZP28H
   916  		return true
   917  	case ssaop.OpConcatOddUint32x4:
   918  		v.Op = ssaop.OpARM64VUZP24S
   919  		return true
   920  	case ssaop.OpConcatOddUint64x2:
   921  		v.Op = ssaop.OpARM64VUZP22D
   922  		return true
   923  	case ssaop.OpConcatOddUint8x16:
   924  		v.Op = ssaop.OpARM64VUZP216B
   925  		return true
   926  	case ssaop.OpConcatShiftBytesRightUint8x16:
   927  		v.Op = ssaop.OpARM64VEXT16B
   928  		return true
   929  	case ssaop.OpCondSelect:
   930  		return rewriteValue_OpCondSelect(v)
   931  	case ssaop.OpConst16:
   932  		return rewriteValue_OpConst16(v)
   933  	case ssaop.OpConst32:
   934  		return rewriteValue_OpConst32(v)
   935  	case ssaop.OpConst32F:
   936  		return rewriteValue_OpConst32F(v)
   937  	case ssaop.OpConst64:
   938  		return rewriteValue_OpConst64(v)
   939  	case ssaop.OpConst64F:
   940  		return rewriteValue_OpConst64F(v)
   941  	case ssaop.OpConst8:
   942  		return rewriteValue_OpConst8(v)
   943  	case ssaop.OpConstBool:
   944  		return rewriteValue_OpConstBool(v)
   945  	case ssaop.OpConstNil:
   946  		return rewriteValue_OpConstNil(v)
   947  	case ssaop.OpConvertLo2ToFloat64Float32x4:
   948  		v.Op = ssaop.OpARM64VFCVTL4S
   949  		return true
   950  	case ssaop.OpConvertToFloat32Float64x2:
   951  		v.Op = ssaop.OpARM64VFCVTN2D
   952  		return true
   953  	case ssaop.OpConvertToFloat32Int32x4:
   954  		v.Op = ssaop.OpARM64VSCVTF4S
   955  		return true
   956  	case ssaop.OpConvertToFloat32Uint32x4:
   957  		v.Op = ssaop.OpARM64VUCVTF4S
   958  		return true
   959  	case ssaop.OpConvertToFloat64Int64x2:
   960  		v.Op = ssaop.OpARM64VSCVTF2D
   961  		return true
   962  	case ssaop.OpConvertToFloat64Uint64x2:
   963  		v.Op = ssaop.OpARM64VUCVTF2D
   964  		return true
   965  	case ssaop.OpConvertToInt32Float32x4:
   966  		v.Op = ssaop.OpARM64VFCVTZS4S
   967  		return true
   968  	case ssaop.OpConvertToInt64Float64x2:
   969  		v.Op = ssaop.OpARM64VFCVTZS2D
   970  		return true
   971  	case ssaop.OpConvertToUint32Float32x4:
   972  		v.Op = ssaop.OpARM64VFCVTZU4S
   973  		return true
   974  	case ssaop.OpConvertToUint64Float64x2:
   975  		v.Op = ssaop.OpARM64VFCVTZU2D
   976  		return true
   977  	case ssaop.OpCount8s:
   978  		return rewriteValue_OpCount8s(v)
   979  	case ssaop.OpCtz16:
   980  		return rewriteValue_OpCtz16(v)
   981  	case ssaop.OpCtz16NonZero:
   982  		v.Op = ssaop.OpCtz32
   983  		return true
   984  	case ssaop.OpCtz32:
   985  		return rewriteValue_OpCtz32(v)
   986  	case ssaop.OpCtz32NonZero:
   987  		v.Op = ssaop.OpCtz32
   988  		return true
   989  	case ssaop.OpCtz64:
   990  		return rewriteValue_OpCtz64(v)
   991  	case ssaop.OpCtz64NonZero:
   992  		v.Op = ssaop.OpCtz64
   993  		return true
   994  	case ssaop.OpCtz8:
   995  		return rewriteValue_OpCtz8(v)
   996  	case ssaop.OpCtz8NonZero:
   997  		v.Op = ssaop.OpCtz32
   998  		return true
   999  	case ssaop.OpCvt32Fto32:
  1000  		v.Op = ssaop.OpARM64FCVTZSSW
  1001  		return true
  1002  	case ssaop.OpCvt32Fto32U:
  1003  		v.Op = ssaop.OpARM64FCVTZUSW
  1004  		return true
  1005  	case ssaop.OpCvt32Fto64:
  1006  		v.Op = ssaop.OpARM64FCVTZSS
  1007  		return true
  1008  	case ssaop.OpCvt32Fto64F:
  1009  		v.Op = ssaop.OpARM64FCVTSD
  1010  		return true
  1011  	case ssaop.OpCvt32Fto64U:
  1012  		v.Op = ssaop.OpARM64FCVTZUS
  1013  		return true
  1014  	case ssaop.OpCvt32Uto32F:
  1015  		v.Op = ssaop.OpARM64UCVTFWS
  1016  		return true
  1017  	case ssaop.OpCvt32Uto64F:
  1018  		v.Op = ssaop.OpARM64UCVTFWD
  1019  		return true
  1020  	case ssaop.OpCvt32to32F:
  1021  		v.Op = ssaop.OpARM64SCVTFWS
  1022  		return true
  1023  	case ssaop.OpCvt32to64F:
  1024  		v.Op = ssaop.OpARM64SCVTFWD
  1025  		return true
  1026  	case ssaop.OpCvt64Fto32:
  1027  		v.Op = ssaop.OpARM64FCVTZSDW
  1028  		return true
  1029  	case ssaop.OpCvt64Fto32F:
  1030  		v.Op = ssaop.OpARM64FCVTDS
  1031  		return true
  1032  	case ssaop.OpCvt64Fto32U:
  1033  		v.Op = ssaop.OpARM64FCVTZUDW
  1034  		return true
  1035  	case ssaop.OpCvt64Fto64:
  1036  		v.Op = ssaop.OpARM64FCVTZSD
  1037  		return true
  1038  	case ssaop.OpCvt64Fto64U:
  1039  		v.Op = ssaop.OpARM64FCVTZUD
  1040  		return true
  1041  	case ssaop.OpCvt64Uto32F:
  1042  		v.Op = ssaop.OpARM64UCVTFS
  1043  		return true
  1044  	case ssaop.OpCvt64Uto64F:
  1045  		v.Op = ssaop.OpARM64UCVTFD
  1046  		return true
  1047  	case ssaop.OpCvt64to32F:
  1048  		v.Op = ssaop.OpARM64SCVTFS
  1049  		return true
  1050  	case ssaop.OpCvt64to64F:
  1051  		v.Op = ssaop.OpARM64SCVTFD
  1052  		return true
  1053  	case ssaop.OpCvtBoolToUint8:
  1054  		v.Op = ssaop.OpCopy
  1055  		return true
  1056  	case ssaop.OpDiv16:
  1057  		return rewriteValue_OpDiv16(v)
  1058  	case ssaop.OpDiv16u:
  1059  		return rewriteValue_OpDiv16u(v)
  1060  	case ssaop.OpDiv32:
  1061  		return rewriteValue_OpDiv32(v)
  1062  	case ssaop.OpDiv32F:
  1063  		v.Op = ssaop.OpARM64FDIVS
  1064  		return true
  1065  	case ssaop.OpDiv32u:
  1066  		v.Op = ssaop.OpARM64UDIVW
  1067  		return true
  1068  	case ssaop.OpDiv64:
  1069  		return rewriteValue_OpDiv64(v)
  1070  	case ssaop.OpDiv64F:
  1071  		v.Op = ssaop.OpARM64FDIVD
  1072  		return true
  1073  	case ssaop.OpDiv64u:
  1074  		v.Op = ssaop.OpARM64UDIV
  1075  		return true
  1076  	case ssaop.OpDiv8:
  1077  		return rewriteValue_OpDiv8(v)
  1078  	case ssaop.OpDiv8u:
  1079  		return rewriteValue_OpDiv8u(v)
  1080  	case ssaop.OpDivFloat32x4:
  1081  		v.Op = ssaop.OpARM64VFDIV4S
  1082  		return true
  1083  	case ssaop.OpDivFloat64x2:
  1084  		v.Op = ssaop.OpARM64VFDIV2D
  1085  		return true
  1086  	case ssaop.OpEq16:
  1087  		return rewriteValue_OpEq16(v)
  1088  	case ssaop.OpEq32:
  1089  		return rewriteValue_OpEq32(v)
  1090  	case ssaop.OpEq32F:
  1091  		return rewriteValue_OpEq32F(v)
  1092  	case ssaop.OpEq64:
  1093  		return rewriteValue_OpEq64(v)
  1094  	case ssaop.OpEq64F:
  1095  		return rewriteValue_OpEq64F(v)
  1096  	case ssaop.OpEq8:
  1097  		return rewriteValue_OpEq8(v)
  1098  	case ssaop.OpEqB:
  1099  		return rewriteValue_OpEqB(v)
  1100  	case ssaop.OpEqPtr:
  1101  		return rewriteValue_OpEqPtr(v)
  1102  	case ssaop.OpEqualFloat32x4:
  1103  		v.Op = ssaop.OpARM64VFCMEQ4S
  1104  		return true
  1105  	case ssaop.OpEqualFloat64x2:
  1106  		v.Op = ssaop.OpARM64VFCMEQ2D
  1107  		return true
  1108  	case ssaop.OpEqualInt16x8:
  1109  		v.Op = ssaop.OpARM64VCMEQ8H
  1110  		return true
  1111  	case ssaop.OpEqualInt32x4:
  1112  		v.Op = ssaop.OpARM64VCMEQ4S
  1113  		return true
  1114  	case ssaop.OpEqualInt64x2:
  1115  		v.Op = ssaop.OpARM64VCMEQ2D
  1116  		return true
  1117  	case ssaop.OpEqualInt8x16:
  1118  		v.Op = ssaop.OpARM64VCMEQ16B
  1119  		return true
  1120  	case ssaop.OpEqualUint16x8:
  1121  		v.Op = ssaop.OpARM64VCMEQ8H
  1122  		return true
  1123  	case ssaop.OpEqualUint32x4:
  1124  		v.Op = ssaop.OpARM64VCMEQ4S
  1125  		return true
  1126  	case ssaop.OpEqualUint64x2:
  1127  		v.Op = ssaop.OpARM64VCMEQ2D
  1128  		return true
  1129  	case ssaop.OpEqualUint8x16:
  1130  		v.Op = ssaop.OpARM64VCMEQ16B
  1131  		return true
  1132  	case ssaop.OpExtendLo2ToInt64Int32x4:
  1133  		v.Op = ssaop.OpARM64VSXTL4S
  1134  		return true
  1135  	case ssaop.OpExtendLo2ToUint64Uint32x4:
  1136  		v.Op = ssaop.OpARM64VUXTL4S
  1137  		return true
  1138  	case ssaop.OpExtendLo4ToInt32Int16x8:
  1139  		v.Op = ssaop.OpARM64VSXTL8H
  1140  		return true
  1141  	case ssaop.OpExtendLo4ToUint32Uint16x8:
  1142  		v.Op = ssaop.OpARM64VUXTL8H
  1143  		return true
  1144  	case ssaop.OpExtendLo8ToInt16Int8x16:
  1145  		v.Op = ssaop.OpARM64VSXTL16B
  1146  		return true
  1147  	case ssaop.OpExtendLo8ToUint16Uint8x16:
  1148  		v.Op = ssaop.OpARM64VUXTL16B
  1149  		return true
  1150  	case ssaop.OpFMA:
  1151  		return rewriteValue_OpFMA(v)
  1152  	case ssaop.OpFloor:
  1153  		v.Op = ssaop.OpARM64FRINTMD
  1154  		return true
  1155  	case ssaop.OpFloorFloat32x4:
  1156  		v.Op = ssaop.OpARM64VFRINTM4S
  1157  		return true
  1158  	case ssaop.OpFloorFloat64x2:
  1159  		v.Op = ssaop.OpARM64VFRINTM2D
  1160  		return true
  1161  	case ssaop.OpGetCallerPC:
  1162  		v.Op = ssaop.OpARM64LoweredGetCallerPC
  1163  		return true
  1164  	case ssaop.OpGetCallerSP:
  1165  		v.Op = ssaop.OpARM64LoweredGetCallerSP
  1166  		return true
  1167  	case ssaop.OpGetClosurePtr:
  1168  		v.Op = ssaop.OpARM64LoweredGetClosurePtr
  1169  		return true
  1170  	case ssaop.OpGetElemFloat32x4:
  1171  		v.Op = ssaop.OpARM64VDUPSextr
  1172  		return true
  1173  	case ssaop.OpGetElemFloat64x2:
  1174  		v.Op = ssaop.OpARM64VDUPDextr
  1175  		return true
  1176  	case ssaop.OpGetElemInt16x8:
  1177  		v.Op = ssaop.OpARM64VMOVHextr
  1178  		return true
  1179  	case ssaop.OpGetElemInt32x4:
  1180  		v.Op = ssaop.OpARM64VMOVSextr
  1181  		return true
  1182  	case ssaop.OpGetElemInt64x2:
  1183  		v.Op = ssaop.OpARM64VMOVDextr
  1184  		return true
  1185  	case ssaop.OpGetElemInt8x16:
  1186  		v.Op = ssaop.OpARM64VMOVBextr
  1187  		return true
  1188  	case ssaop.OpGetElemUint16x8:
  1189  		v.Op = ssaop.OpARM64VMOVHextr
  1190  		return true
  1191  	case ssaop.OpGetElemUint32x4:
  1192  		v.Op = ssaop.OpARM64VMOVSextr
  1193  		return true
  1194  	case ssaop.OpGetElemUint64x2:
  1195  		v.Op = ssaop.OpARM64VMOVDextr
  1196  		return true
  1197  	case ssaop.OpGetElemUint8x16:
  1198  		v.Op = ssaop.OpARM64VMOVBextr
  1199  		return true
  1200  	case ssaop.OpGreaterEqualFloat32x4:
  1201  		v.Op = ssaop.OpARM64VFCMGE4S
  1202  		return true
  1203  	case ssaop.OpGreaterEqualFloat64x2:
  1204  		v.Op = ssaop.OpARM64VFCMGE2D
  1205  		return true
  1206  	case ssaop.OpGreaterEqualInt16x8:
  1207  		v.Op = ssaop.OpARM64VCMGE8H
  1208  		return true
  1209  	case ssaop.OpGreaterEqualInt32x4:
  1210  		v.Op = ssaop.OpARM64VCMGE4S
  1211  		return true
  1212  	case ssaop.OpGreaterEqualInt64x2:
  1213  		v.Op = ssaop.OpARM64VCMGE2D
  1214  		return true
  1215  	case ssaop.OpGreaterEqualInt8x16:
  1216  		v.Op = ssaop.OpARM64VCMGE16B
  1217  		return true
  1218  	case ssaop.OpGreaterEqualUint16x8:
  1219  		v.Op = ssaop.OpARM64VCMHS8H
  1220  		return true
  1221  	case ssaop.OpGreaterEqualUint32x4:
  1222  		v.Op = ssaop.OpARM64VCMHS4S
  1223  		return true
  1224  	case ssaop.OpGreaterEqualUint64x2:
  1225  		v.Op = ssaop.OpARM64VCMHS2D
  1226  		return true
  1227  	case ssaop.OpGreaterEqualUint8x16:
  1228  		v.Op = ssaop.OpARM64VCMHS16B
  1229  		return true
  1230  	case ssaop.OpGreaterFloat32x4:
  1231  		v.Op = ssaop.OpARM64VFCMGT4S
  1232  		return true
  1233  	case ssaop.OpGreaterFloat64x2:
  1234  		v.Op = ssaop.OpARM64VFCMGT2D
  1235  		return true
  1236  	case ssaop.OpGreaterInt16x8:
  1237  		v.Op = ssaop.OpARM64VCMGT8H
  1238  		return true
  1239  	case ssaop.OpGreaterInt32x4:
  1240  		v.Op = ssaop.OpARM64VCMGT4S
  1241  		return true
  1242  	case ssaop.OpGreaterInt64x2:
  1243  		v.Op = ssaop.OpARM64VCMGT2D
  1244  		return true
  1245  	case ssaop.OpGreaterInt8s:
  1246  		return rewriteValue_OpGreaterInt8s(v)
  1247  	case ssaop.OpGreaterInt8x16:
  1248  		v.Op = ssaop.OpARM64VCMGT16B
  1249  		return true
  1250  	case ssaop.OpGreaterUint16x8:
  1251  		v.Op = ssaop.OpARM64VCMHI8H
  1252  		return true
  1253  	case ssaop.OpGreaterUint32x4:
  1254  		v.Op = ssaop.OpARM64VCMHI4S
  1255  		return true
  1256  	case ssaop.OpGreaterUint64x2:
  1257  		v.Op = ssaop.OpARM64VCMHI2D
  1258  		return true
  1259  	case ssaop.OpGreaterUint8x16:
  1260  		v.Op = ssaop.OpARM64VCMHI16B
  1261  		return true
  1262  	case ssaop.OpHmul32:
  1263  		return rewriteValue_OpHmul32(v)
  1264  	case ssaop.OpHmul32u:
  1265  		return rewriteValue_OpHmul32u(v)
  1266  	case ssaop.OpHmul64:
  1267  		v.Op = ssaop.OpARM64MULH
  1268  		return true
  1269  	case ssaop.OpHmul64u:
  1270  		v.Op = ssaop.OpARM64UMULH
  1271  		return true
  1272  	case ssaop.OpInterCall:
  1273  		v.Op = ssaop.OpARM64CALLinter
  1274  		return true
  1275  	case ssaop.OpInterleaveEvenInt16x8:
  1276  		v.Op = ssaop.OpARM64VTRN18H
  1277  		return true
  1278  	case ssaop.OpInterleaveEvenInt32x4:
  1279  		v.Op = ssaop.OpARM64VTRN14S
  1280  		return true
  1281  	case ssaop.OpInterleaveEvenInt64x2:
  1282  		v.Op = ssaop.OpARM64VTRN12D
  1283  		return true
  1284  	case ssaop.OpInterleaveEvenInt8x16:
  1285  		v.Op = ssaop.OpARM64VTRN116B
  1286  		return true
  1287  	case ssaop.OpInterleaveEvenUint16x8:
  1288  		v.Op = ssaop.OpARM64VTRN18H
  1289  		return true
  1290  	case ssaop.OpInterleaveEvenUint32x4:
  1291  		v.Op = ssaop.OpARM64VTRN14S
  1292  		return true
  1293  	case ssaop.OpInterleaveEvenUint64x2:
  1294  		v.Op = ssaop.OpARM64VTRN12D
  1295  		return true
  1296  	case ssaop.OpInterleaveEvenUint8x16:
  1297  		v.Op = ssaop.OpARM64VTRN116B
  1298  		return true
  1299  	case ssaop.OpInterleaveHiInt16x8:
  1300  		v.Op = ssaop.OpARM64VZIP28H
  1301  		return true
  1302  	case ssaop.OpInterleaveHiInt32x4:
  1303  		v.Op = ssaop.OpARM64VZIP24S
  1304  		return true
  1305  	case ssaop.OpInterleaveHiInt64x2:
  1306  		v.Op = ssaop.OpARM64VZIP22D
  1307  		return true
  1308  	case ssaop.OpInterleaveHiInt8x16:
  1309  		v.Op = ssaop.OpARM64VZIP216B
  1310  		return true
  1311  	case ssaop.OpInterleaveHiUint16x8:
  1312  		v.Op = ssaop.OpARM64VZIP28H
  1313  		return true
  1314  	case ssaop.OpInterleaveHiUint32x4:
  1315  		v.Op = ssaop.OpARM64VZIP24S
  1316  		return true
  1317  	case ssaop.OpInterleaveHiUint64x2:
  1318  		v.Op = ssaop.OpARM64VZIP22D
  1319  		return true
  1320  	case ssaop.OpInterleaveHiUint8x16:
  1321  		v.Op = ssaop.OpARM64VZIP216B
  1322  		return true
  1323  	case ssaop.OpInterleaveLoInt16x8:
  1324  		v.Op = ssaop.OpARM64VZIP18H
  1325  		return true
  1326  	case ssaop.OpInterleaveLoInt32x4:
  1327  		v.Op = ssaop.OpARM64VZIP14S
  1328  		return true
  1329  	case ssaop.OpInterleaveLoInt64x2:
  1330  		v.Op = ssaop.OpARM64VZIP12D
  1331  		return true
  1332  	case ssaop.OpInterleaveLoInt8x16:
  1333  		v.Op = ssaop.OpARM64VZIP116B
  1334  		return true
  1335  	case ssaop.OpInterleaveLoUint16x8:
  1336  		v.Op = ssaop.OpARM64VZIP18H
  1337  		return true
  1338  	case ssaop.OpInterleaveLoUint32x4:
  1339  		v.Op = ssaop.OpARM64VZIP14S
  1340  		return true
  1341  	case ssaop.OpInterleaveLoUint64x2:
  1342  		v.Op = ssaop.OpARM64VZIP12D
  1343  		return true
  1344  	case ssaop.OpInterleaveLoUint8x16:
  1345  		v.Op = ssaop.OpARM64VZIP116B
  1346  		return true
  1347  	case ssaop.OpInterleaveOddInt16x8:
  1348  		v.Op = ssaop.OpARM64VTRN28H
  1349  		return true
  1350  	case ssaop.OpInterleaveOddInt32x4:
  1351  		v.Op = ssaop.OpARM64VTRN24S
  1352  		return true
  1353  	case ssaop.OpInterleaveOddInt64x2:
  1354  		v.Op = ssaop.OpARM64VTRN22D
  1355  		return true
  1356  	case ssaop.OpInterleaveOddInt8x16:
  1357  		v.Op = ssaop.OpARM64VTRN216B
  1358  		return true
  1359  	case ssaop.OpInterleaveOddUint16x8:
  1360  		v.Op = ssaop.OpARM64VTRN28H
  1361  		return true
  1362  	case ssaop.OpInterleaveOddUint32x4:
  1363  		v.Op = ssaop.OpARM64VTRN24S
  1364  		return true
  1365  	case ssaop.OpInterleaveOddUint64x2:
  1366  		v.Op = ssaop.OpARM64VTRN22D
  1367  		return true
  1368  	case ssaop.OpInterleaveOddUint8x16:
  1369  		v.Op = ssaop.OpARM64VTRN216B
  1370  		return true
  1371  	case ssaop.OpIsInBounds:
  1372  		return rewriteValue_OpIsInBounds(v)
  1373  	case ssaop.OpIsNonNil:
  1374  		return rewriteValue_OpIsNonNil(v)
  1375  	case ssaop.OpIsSliceInBounds:
  1376  		return rewriteValue_OpIsSliceInBounds(v)
  1377  	case ssaop.OpLeadingSignBitsInt16x8:
  1378  		v.Op = ssaop.OpARM64VCLS8H
  1379  		return true
  1380  	case ssaop.OpLeadingSignBitsInt32x4:
  1381  		v.Op = ssaop.OpARM64VCLS4S
  1382  		return true
  1383  	case ssaop.OpLeadingSignBitsInt8x16:
  1384  		v.Op = ssaop.OpARM64VCLS16B
  1385  		return true
  1386  	case ssaop.OpLeadingSignBitsUint16x8:
  1387  		v.Op = ssaop.OpARM64VCLS8H
  1388  		return true
  1389  	case ssaop.OpLeadingSignBitsUint32x4:
  1390  		v.Op = ssaop.OpARM64VCLS4S
  1391  		return true
  1392  	case ssaop.OpLeadingSignBitsUint8x16:
  1393  		v.Op = ssaop.OpARM64VCLS16B
  1394  		return true
  1395  	case ssaop.OpLeadingZerosInt16x8:
  1396  		v.Op = ssaop.OpARM64VCLZ8H
  1397  		return true
  1398  	case ssaop.OpLeadingZerosInt32x4:
  1399  		v.Op = ssaop.OpARM64VCLZ4S
  1400  		return true
  1401  	case ssaop.OpLeadingZerosInt8x16:
  1402  		v.Op = ssaop.OpARM64VCLZ16B
  1403  		return true
  1404  	case ssaop.OpLeadingZerosUint16x8:
  1405  		v.Op = ssaop.OpARM64VCLZ8H
  1406  		return true
  1407  	case ssaop.OpLeadingZerosUint32x4:
  1408  		v.Op = ssaop.OpARM64VCLZ4S
  1409  		return true
  1410  	case ssaop.OpLeadingZerosUint8x16:
  1411  		v.Op = ssaop.OpARM64VCLZ16B
  1412  		return true
  1413  	case ssaop.OpLeq16:
  1414  		return rewriteValue_OpLeq16(v)
  1415  	case ssaop.OpLeq16U:
  1416  		return rewriteValue_OpLeq16U(v)
  1417  	case ssaop.OpLeq32:
  1418  		return rewriteValue_OpLeq32(v)
  1419  	case ssaop.OpLeq32F:
  1420  		return rewriteValue_OpLeq32F(v)
  1421  	case ssaop.OpLeq32U:
  1422  		return rewriteValue_OpLeq32U(v)
  1423  	case ssaop.OpLeq64:
  1424  		return rewriteValue_OpLeq64(v)
  1425  	case ssaop.OpLeq64F:
  1426  		return rewriteValue_OpLeq64F(v)
  1427  	case ssaop.OpLeq64U:
  1428  		return rewriteValue_OpLeq64U(v)
  1429  	case ssaop.OpLeq8:
  1430  		return rewriteValue_OpLeq8(v)
  1431  	case ssaop.OpLeq8U:
  1432  		return rewriteValue_OpLeq8U(v)
  1433  	case ssaop.OpLess16:
  1434  		return rewriteValue_OpLess16(v)
  1435  	case ssaop.OpLess16U:
  1436  		return rewriteValue_OpLess16U(v)
  1437  	case ssaop.OpLess32:
  1438  		return rewriteValue_OpLess32(v)
  1439  	case ssaop.OpLess32F:
  1440  		return rewriteValue_OpLess32F(v)
  1441  	case ssaop.OpLess32U:
  1442  		return rewriteValue_OpLess32U(v)
  1443  	case ssaop.OpLess64:
  1444  		return rewriteValue_OpLess64(v)
  1445  	case ssaop.OpLess64F:
  1446  		return rewriteValue_OpLess64F(v)
  1447  	case ssaop.OpLess64U:
  1448  		return rewriteValue_OpLess64U(v)
  1449  	case ssaop.OpLess8:
  1450  		return rewriteValue_OpLess8(v)
  1451  	case ssaop.OpLess8U:
  1452  		return rewriteValue_OpLess8U(v)
  1453  	case ssaop.OpLoad:
  1454  		return rewriteValue_OpLoad(v)
  1455  	case ssaop.OpLoadMasked8:
  1456  		return rewriteValue_OpLoadMasked8(v)
  1457  	case ssaop.OpLocalAddr:
  1458  		return rewriteValue_OpLocalAddr(v)
  1459  	case ssaop.OpLookupOrZeroInt8x16:
  1460  		v.Op = ssaop.OpARM64VTBL16B
  1461  		return true
  1462  	case ssaop.OpLookupOrZeroUint8x16:
  1463  		v.Op = ssaop.OpARM64VTBL16B
  1464  		return true
  1465  	case ssaop.OpLsh16x16:
  1466  		v.Op = ssaop.OpLsh64x16
  1467  		return true
  1468  	case ssaop.OpLsh16x32:
  1469  		v.Op = ssaop.OpLsh64x32
  1470  		return true
  1471  	case ssaop.OpLsh16x64:
  1472  		v.Op = ssaop.OpLsh64x64
  1473  		return true
  1474  	case ssaop.OpLsh16x8:
  1475  		v.Op = ssaop.OpLsh64x8
  1476  		return true
  1477  	case ssaop.OpLsh32x16:
  1478  		v.Op = ssaop.OpLsh64x16
  1479  		return true
  1480  	case ssaop.OpLsh32x32:
  1481  		v.Op = ssaop.OpLsh64x32
  1482  		return true
  1483  	case ssaop.OpLsh32x64:
  1484  		v.Op = ssaop.OpLsh64x64
  1485  		return true
  1486  	case ssaop.OpLsh32x8:
  1487  		v.Op = ssaop.OpLsh64x8
  1488  		return true
  1489  	case ssaop.OpLsh64x16:
  1490  		return rewriteValue_OpLsh64x16(v)
  1491  	case ssaop.OpLsh64x32:
  1492  		return rewriteValue_OpLsh64x32(v)
  1493  	case ssaop.OpLsh64x64:
  1494  		return rewriteValue_OpLsh64x64(v)
  1495  	case ssaop.OpLsh64x8:
  1496  		return rewriteValue_OpLsh64x8(v)
  1497  	case ssaop.OpLsh8x16:
  1498  		v.Op = ssaop.OpLsh64x16
  1499  		return true
  1500  	case ssaop.OpLsh8x32:
  1501  		v.Op = ssaop.OpLsh64x32
  1502  		return true
  1503  	case ssaop.OpLsh8x64:
  1504  		v.Op = ssaop.OpLsh64x64
  1505  		return true
  1506  	case ssaop.OpLsh8x8:
  1507  		v.Op = ssaop.OpLsh64x8
  1508  		return true
  1509  	case ssaop.OpMax32F:
  1510  		v.Op = ssaop.OpARM64FMAXS
  1511  		return true
  1512  	case ssaop.OpMax32FSel:
  1513  		return rewriteValue_OpMax32FSel(v)
  1514  	case ssaop.OpMax64F:
  1515  		v.Op = ssaop.OpARM64FMAXD
  1516  		return true
  1517  	case ssaop.OpMax64FSel:
  1518  		return rewriteValue_OpMax64FSel(v)
  1519  	case ssaop.OpMaxFloat32x4:
  1520  		v.Op = ssaop.OpARM64VFMAX4S
  1521  		return true
  1522  	case ssaop.OpMaxFloat64x2:
  1523  		v.Op = ssaop.OpARM64VFMAX2D
  1524  		return true
  1525  	case ssaop.OpMaxInt16x8:
  1526  		v.Op = ssaop.OpARM64VSMAX8H
  1527  		return true
  1528  	case ssaop.OpMaxInt32x4:
  1529  		v.Op = ssaop.OpARM64VSMAX4S
  1530  		return true
  1531  	case ssaop.OpMaxInt8x16:
  1532  		v.Op = ssaop.OpARM64VSMAX16B
  1533  		return true
  1534  	case ssaop.OpMaxUint16x8:
  1535  		v.Op = ssaop.OpARM64VUMAX8H
  1536  		return true
  1537  	case ssaop.OpMaxUint32x4:
  1538  		v.Op = ssaop.OpARM64VUMAX4S
  1539  		return true
  1540  	case ssaop.OpMaxUint8x16:
  1541  		v.Op = ssaop.OpARM64VUMAX16B
  1542  		return true
  1543  	case ssaop.OpMemEq:
  1544  		v.Op = ssaop.OpARM64LoweredMemEq
  1545  		return true
  1546  	case ssaop.OpMergeInt8s:
  1547  		v.Op = ssaop.OpARM64ZSELB
  1548  		return true
  1549  	case ssaop.OpMin32F:
  1550  		v.Op = ssaop.OpARM64FMINS
  1551  		return true
  1552  	case ssaop.OpMin32FSel:
  1553  		return rewriteValue_OpMin32FSel(v)
  1554  	case ssaop.OpMin64F:
  1555  		v.Op = ssaop.OpARM64FMIND
  1556  		return true
  1557  	case ssaop.OpMin64FSel:
  1558  		return rewriteValue_OpMin64FSel(v)
  1559  	case ssaop.OpMinFloat32x4:
  1560  		v.Op = ssaop.OpARM64VFMIN4S
  1561  		return true
  1562  	case ssaop.OpMinFloat64x2:
  1563  		v.Op = ssaop.OpARM64VFMIN2D
  1564  		return true
  1565  	case ssaop.OpMinInt16x8:
  1566  		v.Op = ssaop.OpARM64VSMIN8H
  1567  		return true
  1568  	case ssaop.OpMinInt32x4:
  1569  		v.Op = ssaop.OpARM64VSMIN4S
  1570  		return true
  1571  	case ssaop.OpMinInt8x16:
  1572  		v.Op = ssaop.OpARM64VSMIN16B
  1573  		return true
  1574  	case ssaop.OpMinUint16x8:
  1575  		v.Op = ssaop.OpARM64VUMIN8H
  1576  		return true
  1577  	case ssaop.OpMinUint32x4:
  1578  		v.Op = ssaop.OpARM64VUMIN4S
  1579  		return true
  1580  	case ssaop.OpMinUint8x16:
  1581  		v.Op = ssaop.OpARM64VUMIN16B
  1582  		return true
  1583  	case ssaop.OpMod16:
  1584  		return rewriteValue_OpMod16(v)
  1585  	case ssaop.OpMod16u:
  1586  		return rewriteValue_OpMod16u(v)
  1587  	case ssaop.OpMod32:
  1588  		return rewriteValue_OpMod32(v)
  1589  	case ssaop.OpMod32u:
  1590  		v.Op = ssaop.OpARM64UMODW
  1591  		return true
  1592  	case ssaop.OpMod64:
  1593  		return rewriteValue_OpMod64(v)
  1594  	case ssaop.OpMod64u:
  1595  		v.Op = ssaop.OpARM64UMOD
  1596  		return true
  1597  	case ssaop.OpMod8:
  1598  		return rewriteValue_OpMod8(v)
  1599  	case ssaop.OpMod8u:
  1600  		return rewriteValue_OpMod8u(v)
  1601  	case ssaop.OpMove:
  1602  		return rewriteValue_OpMove(v)
  1603  	case ssaop.OpMul16:
  1604  		v.Op = ssaop.OpARM64MULW
  1605  		return true
  1606  	case ssaop.OpMul32:
  1607  		v.Op = ssaop.OpARM64MULW
  1608  		return true
  1609  	case ssaop.OpMul32F:
  1610  		v.Op = ssaop.OpARM64FMULS
  1611  		return true
  1612  	case ssaop.OpMul64:
  1613  		v.Op = ssaop.OpARM64MUL
  1614  		return true
  1615  	case ssaop.OpMul64F:
  1616  		v.Op = ssaop.OpARM64FMULD
  1617  		return true
  1618  	case ssaop.OpMul8:
  1619  		v.Op = ssaop.OpARM64MULW
  1620  		return true
  1621  	case ssaop.OpMulAddFloat32x4:
  1622  		return rewriteValue_OpMulAddFloat32x4(v)
  1623  	case ssaop.OpMulAddFloat64x2:
  1624  		return rewriteValue_OpMulAddFloat64x2(v)
  1625  	case ssaop.OpMulAddInt16x8:
  1626  		return rewriteValue_OpMulAddInt16x8(v)
  1627  	case ssaop.OpMulAddInt32x4:
  1628  		return rewriteValue_OpMulAddInt32x4(v)
  1629  	case ssaop.OpMulAddInt8x16:
  1630  		return rewriteValue_OpMulAddInt8x16(v)
  1631  	case ssaop.OpMulAddUint16x8:
  1632  		return rewriteValue_OpMulAddUint16x8(v)
  1633  	case ssaop.OpMulAddUint32x4:
  1634  		return rewriteValue_OpMulAddUint32x4(v)
  1635  	case ssaop.OpMulAddUint8x16:
  1636  		return rewriteValue_OpMulAddUint8x16(v)
  1637  	case ssaop.OpMulFloat32x4:
  1638  		v.Op = ssaop.OpARM64VFMUL4S
  1639  		return true
  1640  	case ssaop.OpMulFloat64x2:
  1641  		v.Op = ssaop.OpARM64VFMUL2D
  1642  		return true
  1643  	case ssaop.OpMulInt16x8:
  1644  		v.Op = ssaop.OpARM64VMUL8H
  1645  		return true
  1646  	case ssaop.OpMulInt32x4:
  1647  		v.Op = ssaop.OpARM64VMUL4S
  1648  		return true
  1649  	case ssaop.OpMulInt8x16:
  1650  		v.Op = ssaop.OpARM64VMUL16B
  1651  		return true
  1652  	case ssaop.OpMulUint16x8:
  1653  		v.Op = ssaop.OpARM64VMUL8H
  1654  		return true
  1655  	case ssaop.OpMulUint32x4:
  1656  		v.Op = ssaop.OpARM64VMUL4S
  1657  		return true
  1658  	case ssaop.OpMulUint8x16:
  1659  		v.Op = ssaop.OpARM64VMUL16B
  1660  		return true
  1661  	case ssaop.OpMulWidenLoInt16x8:
  1662  		v.Op = ssaop.OpARM64VSMULL8H
  1663  		return true
  1664  	case ssaop.OpMulWidenLoInt32x4:
  1665  		v.Op = ssaop.OpARM64VSMULL4S
  1666  		return true
  1667  	case ssaop.OpMulWidenLoInt8x16:
  1668  		v.Op = ssaop.OpARM64VSMULL16B
  1669  		return true
  1670  	case ssaop.OpMulWidenLoUint16x8:
  1671  		v.Op = ssaop.OpARM64VUMULL8H
  1672  		return true
  1673  	case ssaop.OpMulWidenLoUint32x4:
  1674  		v.Op = ssaop.OpARM64VUMULL4S
  1675  		return true
  1676  	case ssaop.OpMulWidenLoUint8x16:
  1677  		v.Op = ssaop.OpARM64VUMULL16B
  1678  		return true
  1679  	case ssaop.OpNeg16:
  1680  		v.Op = ssaop.OpARM64NEG
  1681  		return true
  1682  	case ssaop.OpNeg32:
  1683  		v.Op = ssaop.OpARM64NEG
  1684  		return true
  1685  	case ssaop.OpNeg32F:
  1686  		v.Op = ssaop.OpARM64FNEGS
  1687  		return true
  1688  	case ssaop.OpNeg64:
  1689  		v.Op = ssaop.OpARM64NEG
  1690  		return true
  1691  	case ssaop.OpNeg64F:
  1692  		v.Op = ssaop.OpARM64FNEGD
  1693  		return true
  1694  	case ssaop.OpNeg8:
  1695  		v.Op = ssaop.OpARM64NEG
  1696  		return true
  1697  	case ssaop.OpNegFloat32x4:
  1698  		v.Op = ssaop.OpARM64VFNEG4S
  1699  		return true
  1700  	case ssaop.OpNegFloat64x2:
  1701  		v.Op = ssaop.OpARM64VFNEG2D
  1702  		return true
  1703  	case ssaop.OpNegInt16x8:
  1704  		v.Op = ssaop.OpARM64VNEG8H
  1705  		return true
  1706  	case ssaop.OpNegInt32x4:
  1707  		v.Op = ssaop.OpARM64VNEG4S
  1708  		return true
  1709  	case ssaop.OpNegInt64x2:
  1710  		v.Op = ssaop.OpARM64VNEG2D
  1711  		return true
  1712  	case ssaop.OpNegInt8x16:
  1713  		v.Op = ssaop.OpARM64VNEG16B
  1714  		return true
  1715  	case ssaop.OpNeq16:
  1716  		return rewriteValue_OpNeq16(v)
  1717  	case ssaop.OpNeq32:
  1718  		return rewriteValue_OpNeq32(v)
  1719  	case ssaop.OpNeq32F:
  1720  		return rewriteValue_OpNeq32F(v)
  1721  	case ssaop.OpNeq64:
  1722  		return rewriteValue_OpNeq64(v)
  1723  	case ssaop.OpNeq64F:
  1724  		return rewriteValue_OpNeq64F(v)
  1725  	case ssaop.OpNeq8:
  1726  		return rewriteValue_OpNeq8(v)
  1727  	case ssaop.OpNeqB:
  1728  		v.Op = ssaop.OpARM64XOR
  1729  		return true
  1730  	case ssaop.OpNeqPtr:
  1731  		return rewriteValue_OpNeqPtr(v)
  1732  	case ssaop.OpNilCheck:
  1733  		v.Op = ssaop.OpARM64LoweredNilCheck
  1734  		return true
  1735  	case ssaop.OpNot:
  1736  		return rewriteValue_OpNot(v)
  1737  	case ssaop.OpNotInt16x8:
  1738  		v.Op = ssaop.OpARM64VNOT16B
  1739  		return true
  1740  	case ssaop.OpNotInt32x4:
  1741  		v.Op = ssaop.OpARM64VNOT16B
  1742  		return true
  1743  	case ssaop.OpNotInt64x2:
  1744  		v.Op = ssaop.OpARM64VNOT16B
  1745  		return true
  1746  	case ssaop.OpNotInt8x16:
  1747  		v.Op = ssaop.OpARM64VNOT16B
  1748  		return true
  1749  	case ssaop.OpNotUint16x8:
  1750  		v.Op = ssaop.OpARM64VNOT16B
  1751  		return true
  1752  	case ssaop.OpNotUint32x4:
  1753  		v.Op = ssaop.OpARM64VNOT16B
  1754  		return true
  1755  	case ssaop.OpNotUint64x2:
  1756  		v.Op = ssaop.OpARM64VNOT16B
  1757  		return true
  1758  	case ssaop.OpNotUint8x16:
  1759  		v.Op = ssaop.OpARM64VNOT16B
  1760  		return true
  1761  	case ssaop.OpOffPtr:
  1762  		return rewriteValue_OpOffPtr(v)
  1763  	case ssaop.OpOnesCountInt8x16:
  1764  		v.Op = ssaop.OpARM64VCNT16B
  1765  		return true
  1766  	case ssaop.OpOnesCountUint8x16:
  1767  		v.Op = ssaop.OpARM64VCNT16B
  1768  		return true
  1769  	case ssaop.OpOr16:
  1770  		v.Op = ssaop.OpARM64OR
  1771  		return true
  1772  	case ssaop.OpOr32:
  1773  		v.Op = ssaop.OpARM64OR
  1774  		return true
  1775  	case ssaop.OpOr64:
  1776  		v.Op = ssaop.OpARM64OR
  1777  		return true
  1778  	case ssaop.OpOr8:
  1779  		v.Op = ssaop.OpARM64OR
  1780  		return true
  1781  	case ssaop.OpOrB:
  1782  		v.Op = ssaop.OpARM64OR
  1783  		return true
  1784  	case ssaop.OpOrInt16x8:
  1785  		v.Op = ssaop.OpARM64VORR16B
  1786  		return true
  1787  	case ssaop.OpOrInt32x4:
  1788  		v.Op = ssaop.OpARM64VORR16B
  1789  		return true
  1790  	case ssaop.OpOrInt64x2:
  1791  		v.Op = ssaop.OpARM64VORR16B
  1792  		return true
  1793  	case ssaop.OpOrInt8x16:
  1794  		v.Op = ssaop.OpARM64VORR16B
  1795  		return true
  1796  	case ssaop.OpOrNotInt16x8:
  1797  		v.Op = ssaop.OpARM64VORN16B
  1798  		return true
  1799  	case ssaop.OpOrNotInt32x4:
  1800  		v.Op = ssaop.OpARM64VORN16B
  1801  		return true
  1802  	case ssaop.OpOrNotInt64x2:
  1803  		v.Op = ssaop.OpARM64VORN16B
  1804  		return true
  1805  	case ssaop.OpOrNotInt8x16:
  1806  		v.Op = ssaop.OpARM64VORN16B
  1807  		return true
  1808  	case ssaop.OpOrNotUint16x8:
  1809  		v.Op = ssaop.OpARM64VORN16B
  1810  		return true
  1811  	case ssaop.OpOrNotUint32x4:
  1812  		v.Op = ssaop.OpARM64VORN16B
  1813  		return true
  1814  	case ssaop.OpOrNotUint64x2:
  1815  		v.Op = ssaop.OpARM64VORN16B
  1816  		return true
  1817  	case ssaop.OpOrNotUint8x16:
  1818  		v.Op = ssaop.OpARM64VORN16B
  1819  		return true
  1820  	case ssaop.OpOrUint16x8:
  1821  		v.Op = ssaop.OpARM64VORR16B
  1822  		return true
  1823  	case ssaop.OpOrUint32x4:
  1824  		v.Op = ssaop.OpARM64VORR16B
  1825  		return true
  1826  	case ssaop.OpOrUint64x2:
  1827  		v.Op = ssaop.OpARM64VORR16B
  1828  		return true
  1829  	case ssaop.OpOrUint8x16:
  1830  		v.Op = ssaop.OpARM64VORR16B
  1831  		return true
  1832  	case ssaop.OpPanicBounds:
  1833  		v.Op = ssaop.OpARM64LoweredPanicBoundsRR
  1834  		return true
  1835  	case ssaop.OpPopCount16:
  1836  		return rewriteValue_OpPopCount16(v)
  1837  	case ssaop.OpPopCount32:
  1838  		return rewriteValue_OpPopCount32(v)
  1839  	case ssaop.OpPopCount64:
  1840  		return rewriteValue_OpPopCount64(v)
  1841  	case ssaop.OpPrefetchCache:
  1842  		return rewriteValue_OpPrefetchCache(v)
  1843  	case ssaop.OpPrefetchCacheStreamed:
  1844  		return rewriteValue_OpPrefetchCacheStreamed(v)
  1845  	case ssaop.OpPubBarrier:
  1846  		return rewriteValue_OpPubBarrier(v)
  1847  	case ssaop.OpRotateLeft16:
  1848  		return rewriteValue_OpRotateLeft16(v)
  1849  	case ssaop.OpRotateLeft32:
  1850  		return rewriteValue_OpRotateLeft32(v)
  1851  	case ssaop.OpRotateLeft64:
  1852  		return rewriteValue_OpRotateLeft64(v)
  1853  	case ssaop.OpRotateLeft8:
  1854  		return rewriteValue_OpRotateLeft8(v)
  1855  	case ssaop.OpRound:
  1856  		v.Op = ssaop.OpARM64FRINTAD
  1857  		return true
  1858  	case ssaop.OpRound32F:
  1859  		v.Op = ssaop.OpARM64LoweredRound32F
  1860  		return true
  1861  	case ssaop.OpRound64F:
  1862  		v.Op = ssaop.OpARM64LoweredRound64F
  1863  		return true
  1864  	case ssaop.OpRoundFloat32x4:
  1865  		v.Op = ssaop.OpARM64VFRINTN4S
  1866  		return true
  1867  	case ssaop.OpRoundFloat64x2:
  1868  		v.Op = ssaop.OpARM64VFRINTN2D
  1869  		return true
  1870  	case ssaop.OpRoundToEven:
  1871  		v.Op = ssaop.OpARM64FRINTND
  1872  		return true
  1873  	case ssaop.OpRsh16Ux16:
  1874  		return rewriteValue_OpRsh16Ux16(v)
  1875  	case ssaop.OpRsh16Ux32:
  1876  		return rewriteValue_OpRsh16Ux32(v)
  1877  	case ssaop.OpRsh16Ux64:
  1878  		return rewriteValue_OpRsh16Ux64(v)
  1879  	case ssaop.OpRsh16Ux8:
  1880  		return rewriteValue_OpRsh16Ux8(v)
  1881  	case ssaop.OpRsh16x16:
  1882  		return rewriteValue_OpRsh16x16(v)
  1883  	case ssaop.OpRsh16x32:
  1884  		return rewriteValue_OpRsh16x32(v)
  1885  	case ssaop.OpRsh16x64:
  1886  		return rewriteValue_OpRsh16x64(v)
  1887  	case ssaop.OpRsh16x8:
  1888  		return rewriteValue_OpRsh16x8(v)
  1889  	case ssaop.OpRsh32Ux16:
  1890  		return rewriteValue_OpRsh32Ux16(v)
  1891  	case ssaop.OpRsh32Ux32:
  1892  		return rewriteValue_OpRsh32Ux32(v)
  1893  	case ssaop.OpRsh32Ux64:
  1894  		return rewriteValue_OpRsh32Ux64(v)
  1895  	case ssaop.OpRsh32Ux8:
  1896  		return rewriteValue_OpRsh32Ux8(v)
  1897  	case ssaop.OpRsh32x16:
  1898  		return rewriteValue_OpRsh32x16(v)
  1899  	case ssaop.OpRsh32x32:
  1900  		return rewriteValue_OpRsh32x32(v)
  1901  	case ssaop.OpRsh32x64:
  1902  		return rewriteValue_OpRsh32x64(v)
  1903  	case ssaop.OpRsh32x8:
  1904  		return rewriteValue_OpRsh32x8(v)
  1905  	case ssaop.OpRsh64Ux16:
  1906  		return rewriteValue_OpRsh64Ux16(v)
  1907  	case ssaop.OpRsh64Ux32:
  1908  		return rewriteValue_OpRsh64Ux32(v)
  1909  	case ssaop.OpRsh64Ux64:
  1910  		return rewriteValue_OpRsh64Ux64(v)
  1911  	case ssaop.OpRsh64Ux8:
  1912  		return rewriteValue_OpRsh64Ux8(v)
  1913  	case ssaop.OpRsh64x16:
  1914  		return rewriteValue_OpRsh64x16(v)
  1915  	case ssaop.OpRsh64x32:
  1916  		return rewriteValue_OpRsh64x32(v)
  1917  	case ssaop.OpRsh64x64:
  1918  		return rewriteValue_OpRsh64x64(v)
  1919  	case ssaop.OpRsh64x8:
  1920  		return rewriteValue_OpRsh64x8(v)
  1921  	case ssaop.OpRsh8Ux16:
  1922  		return rewriteValue_OpRsh8Ux16(v)
  1923  	case ssaop.OpRsh8Ux32:
  1924  		return rewriteValue_OpRsh8Ux32(v)
  1925  	case ssaop.OpRsh8Ux64:
  1926  		return rewriteValue_OpRsh8Ux64(v)
  1927  	case ssaop.OpRsh8Ux8:
  1928  		return rewriteValue_OpRsh8Ux8(v)
  1929  	case ssaop.OpRsh8x16:
  1930  		return rewriteValue_OpRsh8x16(v)
  1931  	case ssaop.OpRsh8x32:
  1932  		return rewriteValue_OpRsh8x32(v)
  1933  	case ssaop.OpRsh8x64:
  1934  		return rewriteValue_OpRsh8x64(v)
  1935  	case ssaop.OpRsh8x8:
  1936  		return rewriteValue_OpRsh8x8(v)
  1937  	case ssaop.OpSaturateToInt16Int32x4:
  1938  		v.Op = ssaop.OpARM64VSQXTN4S
  1939  		return true
  1940  	case ssaop.OpSaturateToInt32Int64x2:
  1941  		v.Op = ssaop.OpARM64VSQXTN2D
  1942  		return true
  1943  	case ssaop.OpSaturateToInt8Int16x8:
  1944  		v.Op = ssaop.OpARM64VSQXTN8H
  1945  		return true
  1946  	case ssaop.OpSaturateToUint16Int32x4:
  1947  		v.Op = ssaop.OpARM64VSQXTUN4S
  1948  		return true
  1949  	case ssaop.OpSaturateToUint16Uint32x4:
  1950  		v.Op = ssaop.OpARM64VUQXTN4S
  1951  		return true
  1952  	case ssaop.OpSaturateToUint32Int64x2:
  1953  		v.Op = ssaop.OpARM64VSQXTUN2D
  1954  		return true
  1955  	case ssaop.OpSaturateToUint32Uint64x2:
  1956  		v.Op = ssaop.OpARM64VUQXTN2D
  1957  		return true
  1958  	case ssaop.OpSaturateToUint8Int16x8:
  1959  		v.Op = ssaop.OpARM64VSQXTUN8H
  1960  		return true
  1961  	case ssaop.OpSaturateToUint8Uint16x8:
  1962  		v.Op = ssaop.OpARM64VUQXTN8H
  1963  		return true
  1964  	case ssaop.OpScalableVectorLen:
  1965  		return rewriteValue_OpScalableVectorLen(v)
  1966  	case ssaop.OpSelect0:
  1967  		return rewriteValue_OpSelect0(v)
  1968  	case ssaop.OpSelect1:
  1969  		return rewriteValue_OpSelect1(v)
  1970  	case ssaop.OpSelectN:
  1971  		return rewriteValue_OpSelectN(v)
  1972  	case ssaop.OpSetElemFloat32x4:
  1973  		v.Op = ssaop.OpARM64VMOVSins0
  1974  		return true
  1975  	case ssaop.OpSetElemFloat64x2:
  1976  		v.Op = ssaop.OpARM64VMOVDins0
  1977  		return true
  1978  	case ssaop.OpSetElemInt16x8:
  1979  		v.Op = ssaop.OpARM64VMOVHins
  1980  		return true
  1981  	case ssaop.OpSetElemInt32x4:
  1982  		v.Op = ssaop.OpARM64VMOVSins
  1983  		return true
  1984  	case ssaop.OpSetElemInt64x2:
  1985  		v.Op = ssaop.OpARM64VMOVDins
  1986  		return true
  1987  	case ssaop.OpSetElemInt8x16:
  1988  		v.Op = ssaop.OpARM64VMOVBins
  1989  		return true
  1990  	case ssaop.OpSetElemUint16x8:
  1991  		v.Op = ssaop.OpARM64VMOVHins
  1992  		return true
  1993  	case ssaop.OpSetElemUint32x4:
  1994  		v.Op = ssaop.OpARM64VMOVSins
  1995  		return true
  1996  	case ssaop.OpSetElemUint64x2:
  1997  		v.Op = ssaop.OpARM64VMOVDins
  1998  		return true
  1999  	case ssaop.OpSetElemUint8x16:
  2000  		v.Op = ssaop.OpARM64VMOVBins
  2001  		return true
  2002  	case ssaop.OpShiftAllLeftInt16x8:
  2003  		return rewriteValue_OpShiftAllLeftInt16x8(v)
  2004  	case ssaop.OpShiftAllLeftInt32x4:
  2005  		return rewriteValue_OpShiftAllLeftInt32x4(v)
  2006  	case ssaop.OpShiftAllLeftInt64x2:
  2007  		return rewriteValue_OpShiftAllLeftInt64x2(v)
  2008  	case ssaop.OpShiftAllLeftInt8x16:
  2009  		return rewriteValue_OpShiftAllLeftInt8x16(v)
  2010  	case ssaop.OpShiftAllLeftUint16x8:
  2011  		return rewriteValue_OpShiftAllLeftUint16x8(v)
  2012  	case ssaop.OpShiftAllLeftUint32x4:
  2013  		return rewriteValue_OpShiftAllLeftUint32x4(v)
  2014  	case ssaop.OpShiftAllLeftUint64x2:
  2015  		return rewriteValue_OpShiftAllLeftUint64x2(v)
  2016  	case ssaop.OpShiftAllLeftUint8x16:
  2017  		return rewriteValue_OpShiftAllLeftUint8x16(v)
  2018  	case ssaop.OpShiftAllRightInt16x8:
  2019  		return rewriteValue_OpShiftAllRightInt16x8(v)
  2020  	case ssaop.OpShiftAllRightInt32x4:
  2021  		return rewriteValue_OpShiftAllRightInt32x4(v)
  2022  	case ssaop.OpShiftAllRightInt64x2:
  2023  		return rewriteValue_OpShiftAllRightInt64x2(v)
  2024  	case ssaop.OpShiftAllRightInt8x16:
  2025  		return rewriteValue_OpShiftAllRightInt8x16(v)
  2026  	case ssaop.OpShiftAllRightUint16x8:
  2027  		return rewriteValue_OpShiftAllRightUint16x8(v)
  2028  	case ssaop.OpShiftAllRightUint32x4:
  2029  		return rewriteValue_OpShiftAllRightUint32x4(v)
  2030  	case ssaop.OpShiftAllRightUint64x2:
  2031  		return rewriteValue_OpShiftAllRightUint64x2(v)
  2032  	case ssaop.OpShiftAllRightUint8x16:
  2033  		return rewriteValue_OpShiftAllRightUint8x16(v)
  2034  	case ssaop.OpShiftInt16x8:
  2035  		v.Op = ssaop.OpARM64VSSHL8H
  2036  		return true
  2037  	case ssaop.OpShiftInt32x4:
  2038  		v.Op = ssaop.OpARM64VSSHL4S
  2039  		return true
  2040  	case ssaop.OpShiftInt64x2:
  2041  		v.Op = ssaop.OpARM64VSSHL2D
  2042  		return true
  2043  	case ssaop.OpShiftInt8x16:
  2044  		v.Op = ssaop.OpARM64VSSHL16B
  2045  		return true
  2046  	case ssaop.OpShiftSaturatedInt16x8:
  2047  		v.Op = ssaop.OpARM64VSQSHL8H
  2048  		return true
  2049  	case ssaop.OpShiftSaturatedInt32x4:
  2050  		v.Op = ssaop.OpARM64VSQSHL4S
  2051  		return true
  2052  	case ssaop.OpShiftSaturatedInt64x2:
  2053  		v.Op = ssaop.OpARM64VSQSHL2D
  2054  		return true
  2055  	case ssaop.OpShiftSaturatedInt8x16:
  2056  		v.Op = ssaop.OpARM64VSQSHL16B
  2057  		return true
  2058  	case ssaop.OpShiftSaturatedUint16x8:
  2059  		v.Op = ssaop.OpARM64VUQSHL8H
  2060  		return true
  2061  	case ssaop.OpShiftSaturatedUint32x4:
  2062  		v.Op = ssaop.OpARM64VUQSHL4S
  2063  		return true
  2064  	case ssaop.OpShiftSaturatedUint64x2:
  2065  		v.Op = ssaop.OpARM64VUQSHL2D
  2066  		return true
  2067  	case ssaop.OpShiftSaturatedUint8x16:
  2068  		v.Op = ssaop.OpARM64VUQSHL16B
  2069  		return true
  2070  	case ssaop.OpShiftUint16x8:
  2071  		v.Op = ssaop.OpARM64VUSHL8H
  2072  		return true
  2073  	case ssaop.OpShiftUint32x4:
  2074  		v.Op = ssaop.OpARM64VUSHL4S
  2075  		return true
  2076  	case ssaop.OpShiftUint64x2:
  2077  		v.Op = ssaop.OpARM64VUSHL2D
  2078  		return true
  2079  	case ssaop.OpShiftUint8x16:
  2080  		v.Op = ssaop.OpARM64VUSHL16B
  2081  		return true
  2082  	case ssaop.OpSignExt16to32:
  2083  		v.Op = ssaop.OpARM64MOVHreg
  2084  		return true
  2085  	case ssaop.OpSignExt16to64:
  2086  		v.Op = ssaop.OpARM64MOVHreg
  2087  		return true
  2088  	case ssaop.OpSignExt32to64:
  2089  		v.Op = ssaop.OpARM64MOVWreg
  2090  		return true
  2091  	case ssaop.OpSignExt8to16:
  2092  		v.Op = ssaop.OpARM64MOVBreg
  2093  		return true
  2094  	case ssaop.OpSignExt8to32:
  2095  		v.Op = ssaop.OpARM64MOVBreg
  2096  		return true
  2097  	case ssaop.OpSignExt8to64:
  2098  		v.Op = ssaop.OpARM64MOVBreg
  2099  		return true
  2100  	case ssaop.OpSlicemask:
  2101  		return rewriteValue_OpSlicemask(v)
  2102  	case ssaop.OpSqrt:
  2103  		v.Op = ssaop.OpARM64FSQRTD
  2104  		return true
  2105  	case ssaop.OpSqrt32:
  2106  		v.Op = ssaop.OpARM64FSQRTS
  2107  		return true
  2108  	case ssaop.OpSqrtFloat32x4:
  2109  		v.Op = ssaop.OpARM64VFSQRT4S
  2110  		return true
  2111  	case ssaop.OpSqrtFloat64x2:
  2112  		v.Op = ssaop.OpARM64VFSQRT2D
  2113  		return true
  2114  	case ssaop.OpStaticCall:
  2115  		v.Op = ssaop.OpARM64CALLstatic
  2116  		return true
  2117  	case ssaop.OpStore:
  2118  		return rewriteValue_OpStore(v)
  2119  	case ssaop.OpStoreMasked8:
  2120  		return rewriteValue_OpStoreMasked8(v)
  2121  	case ssaop.OpSub16:
  2122  		v.Op = ssaop.OpARM64SUB
  2123  		return true
  2124  	case ssaop.OpSub32:
  2125  		v.Op = ssaop.OpARM64SUB
  2126  		return true
  2127  	case ssaop.OpSub32F:
  2128  		v.Op = ssaop.OpARM64FSUBS
  2129  		return true
  2130  	case ssaop.OpSub64:
  2131  		v.Op = ssaop.OpARM64SUB
  2132  		return true
  2133  	case ssaop.OpSub64F:
  2134  		v.Op = ssaop.OpARM64FSUBD
  2135  		return true
  2136  	case ssaop.OpSub8:
  2137  		v.Op = ssaop.OpARM64SUB
  2138  		return true
  2139  	case ssaop.OpSubFloat32x4:
  2140  		v.Op = ssaop.OpARM64VFSUB4S
  2141  		return true
  2142  	case ssaop.OpSubFloat64x2:
  2143  		v.Op = ssaop.OpARM64VFSUB2D
  2144  		return true
  2145  	case ssaop.OpSubInt16x8:
  2146  		v.Op = ssaop.OpARM64VSUB8H
  2147  		return true
  2148  	case ssaop.OpSubInt32x4:
  2149  		v.Op = ssaop.OpARM64VSUB4S
  2150  		return true
  2151  	case ssaop.OpSubInt64x2:
  2152  		v.Op = ssaop.OpARM64VSUB2D
  2153  		return true
  2154  	case ssaop.OpSubInt8x16:
  2155  		v.Op = ssaop.OpARM64VSUB16B
  2156  		return true
  2157  	case ssaop.OpSubPtr:
  2158  		v.Op = ssaop.OpARM64SUB
  2159  		return true
  2160  	case ssaop.OpSubSaturatedInt16x8:
  2161  		v.Op = ssaop.OpARM64VSQSUB8H
  2162  		return true
  2163  	case ssaop.OpSubSaturatedInt32x4:
  2164  		v.Op = ssaop.OpARM64VSQSUB4S
  2165  		return true
  2166  	case ssaop.OpSubSaturatedInt64x2:
  2167  		v.Op = ssaop.OpARM64VSQSUB2D
  2168  		return true
  2169  	case ssaop.OpSubSaturatedInt8x16:
  2170  		v.Op = ssaop.OpARM64VSQSUB16B
  2171  		return true
  2172  	case ssaop.OpSubSaturatedUint16x8:
  2173  		v.Op = ssaop.OpARM64VUQSUB8H
  2174  		return true
  2175  	case ssaop.OpSubSaturatedUint32x4:
  2176  		v.Op = ssaop.OpARM64VUQSUB4S
  2177  		return true
  2178  	case ssaop.OpSubSaturatedUint64x2:
  2179  		v.Op = ssaop.OpARM64VUQSUB2D
  2180  		return true
  2181  	case ssaop.OpSubSaturatedUint8x16:
  2182  		v.Op = ssaop.OpARM64VUQSUB16B
  2183  		return true
  2184  	case ssaop.OpSubUint16x8:
  2185  		v.Op = ssaop.OpARM64VSUB8H
  2186  		return true
  2187  	case ssaop.OpSubUint32x4:
  2188  		v.Op = ssaop.OpARM64VSUB4S
  2189  		return true
  2190  	case ssaop.OpSubUint64x2:
  2191  		v.Op = ssaop.OpARM64VSUB2D
  2192  		return true
  2193  	case ssaop.OpSubUint8x16:
  2194  		v.Op = ssaop.OpARM64VSUB16B
  2195  		return true
  2196  	case ssaop.OpTailCall:
  2197  		v.Op = ssaop.OpARM64CALLtail
  2198  		return true
  2199  	case ssaop.OpTailCallInter:
  2200  		v.Op = ssaop.OpARM64CALLtailinter
  2201  		return true
  2202  	case ssaop.OpTrunc:
  2203  		v.Op = ssaop.OpARM64FRINTZD
  2204  		return true
  2205  	case ssaop.OpTrunc16to8:
  2206  		v.Op = ssaop.OpCopy
  2207  		return true
  2208  	case ssaop.OpTrunc32to16:
  2209  		v.Op = ssaop.OpCopy
  2210  		return true
  2211  	case ssaop.OpTrunc32to8:
  2212  		v.Op = ssaop.OpCopy
  2213  		return true
  2214  	case ssaop.OpTrunc64to16:
  2215  		v.Op = ssaop.OpCopy
  2216  		return true
  2217  	case ssaop.OpTrunc64to32:
  2218  		v.Op = ssaop.OpCopy
  2219  		return true
  2220  	case ssaop.OpTrunc64to8:
  2221  		v.Op = ssaop.OpCopy
  2222  		return true
  2223  	case ssaop.OpTruncFloat32x4:
  2224  		v.Op = ssaop.OpARM64VFRINTZ4S
  2225  		return true
  2226  	case ssaop.OpTruncFloat64x2:
  2227  		v.Op = ssaop.OpARM64VFRINTZ2D
  2228  		return true
  2229  	case ssaop.OpTruncToInt16Int32x4:
  2230  		v.Op = ssaop.OpARM64VXTN4S
  2231  		return true
  2232  	case ssaop.OpTruncToInt32Int64x2:
  2233  		v.Op = ssaop.OpARM64VXTN2D
  2234  		return true
  2235  	case ssaop.OpTruncToInt8Int16x8:
  2236  		v.Op = ssaop.OpARM64VXTN8H
  2237  		return true
  2238  	case ssaop.OpTruncToUint16Uint32x4:
  2239  		v.Op = ssaop.OpARM64VXTN4S
  2240  		return true
  2241  	case ssaop.OpTruncToUint32Uint64x2:
  2242  		v.Op = ssaop.OpARM64VXTN2D
  2243  		return true
  2244  	case ssaop.OpTruncToUint8Uint16x8:
  2245  		v.Op = ssaop.OpARM64VXTN8H
  2246  		return true
  2247  	case ssaop.OpWB:
  2248  		v.Op = ssaop.OpARM64LoweredWB
  2249  		return true
  2250  	case ssaop.OpXor16:
  2251  		v.Op = ssaop.OpARM64XOR
  2252  		return true
  2253  	case ssaop.OpXor32:
  2254  		v.Op = ssaop.OpARM64XOR
  2255  		return true
  2256  	case ssaop.OpXor64:
  2257  		v.Op = ssaop.OpARM64XOR
  2258  		return true
  2259  	case ssaop.OpXor8:
  2260  		v.Op = ssaop.OpARM64XOR
  2261  		return true
  2262  	case ssaop.OpXorInt16x8:
  2263  		v.Op = ssaop.OpARM64VEOR16B
  2264  		return true
  2265  	case ssaop.OpXorInt32x4:
  2266  		v.Op = ssaop.OpARM64VEOR16B
  2267  		return true
  2268  	case ssaop.OpXorInt64x2:
  2269  		v.Op = ssaop.OpARM64VEOR16B
  2270  		return true
  2271  	case ssaop.OpXorInt8x16:
  2272  		v.Op = ssaop.OpARM64VEOR16B
  2273  		return true
  2274  	case ssaop.OpXorUint16x8:
  2275  		v.Op = ssaop.OpARM64VEOR16B
  2276  		return true
  2277  	case ssaop.OpXorUint32x4:
  2278  		v.Op = ssaop.OpARM64VEOR16B
  2279  		return true
  2280  	case ssaop.OpXorUint64x2:
  2281  		v.Op = ssaop.OpARM64VEOR16B
  2282  		return true
  2283  	case ssaop.OpXorUint8x16:
  2284  		v.Op = ssaop.OpARM64VEOR16B
  2285  		return true
  2286  	case ssaop.OpZero:
  2287  		return rewriteValue_OpZero(v)
  2288  	case ssaop.OpZeroExt16to32:
  2289  		v.Op = ssaop.OpARM64MOVHUreg
  2290  		return true
  2291  	case ssaop.OpZeroExt16to64:
  2292  		v.Op = ssaop.OpARM64MOVHUreg
  2293  		return true
  2294  	case ssaop.OpZeroExt32to64:
  2295  		v.Op = ssaop.OpARM64MOVWUreg
  2296  		return true
  2297  	case ssaop.OpZeroExt8to16:
  2298  		v.Op = ssaop.OpARM64MOVBUreg
  2299  		return true
  2300  	case ssaop.OpZeroExt8to32:
  2301  		v.Op = ssaop.OpARM64MOVBUreg
  2302  		return true
  2303  	case ssaop.OpZeroExt8to64:
  2304  		v.Op = ssaop.OpARM64MOVBUreg
  2305  		return true
  2306  	case ssaop.OpZeroSIMD:
  2307  		return rewriteValue_OpZeroSIMD(v)
  2308  	case ssaop.OpbitSelectInt8x16:
  2309  		v.Op = ssaop.OpARM64VBIF16B
  2310  		return true
  2311  	case ssaop.OpbitSelectNotInt8x16:
  2312  		v.Op = ssaop.OpARM64VBIT16B
  2313  		return true
  2314  	case ssaop.Opbroadcast1To16Int8x16:
  2315  		return rewriteValue_Opbroadcast1To16Int8x16(v)
  2316  	case ssaop.Opbroadcast1To16Uint8x16:
  2317  		return rewriteValue_Opbroadcast1To16Uint8x16(v)
  2318  	case ssaop.Opbroadcast1To2Float64x2:
  2319  		return rewriteValue_Opbroadcast1To2Float64x2(v)
  2320  	case ssaop.Opbroadcast1To2Int64x2:
  2321  		return rewriteValue_Opbroadcast1To2Int64x2(v)
  2322  	case ssaop.Opbroadcast1To2Uint64x2:
  2323  		return rewriteValue_Opbroadcast1To2Uint64x2(v)
  2324  	case ssaop.Opbroadcast1To4Float32x4:
  2325  		return rewriteValue_Opbroadcast1To4Float32x4(v)
  2326  	case ssaop.Opbroadcast1To4Int32x4:
  2327  		return rewriteValue_Opbroadcast1To4Int32x4(v)
  2328  	case ssaop.Opbroadcast1To4Uint32x4:
  2329  		return rewriteValue_Opbroadcast1To4Uint32x4(v)
  2330  	case ssaop.Opbroadcast1To8Int16x8:
  2331  		return rewriteValue_Opbroadcast1To8Int16x8(v)
  2332  	case ssaop.Opbroadcast1To8Uint16x8:
  2333  		return rewriteValue_Opbroadcast1To8Uint16x8(v)
  2334  	case ssaop.OpcarrylessMultiplyWidenLoUint64x2:
  2335  		v.Op = ssaop.OpARM64VPMULL2D
  2336  		return true
  2337  	case ssaop.OpreduceMaxFloat32x4:
  2338  		v.Op = ssaop.OpARM64VFMAXV4S
  2339  		return true
  2340  	case ssaop.OpreduceMaxInt16x8:
  2341  		v.Op = ssaop.OpARM64VSMAXV8H
  2342  		return true
  2343  	case ssaop.OpreduceMaxInt32x4:
  2344  		v.Op = ssaop.OpARM64VSMAXV4S
  2345  		return true
  2346  	case ssaop.OpreduceMaxInt8x16:
  2347  		v.Op = ssaop.OpARM64VSMAXV16B
  2348  		return true
  2349  	case ssaop.OpreduceMaxUint16x8:
  2350  		v.Op = ssaop.OpARM64VUMAXV8H
  2351  		return true
  2352  	case ssaop.OpreduceMaxUint32x4:
  2353  		v.Op = ssaop.OpARM64VUMAXV4S
  2354  		return true
  2355  	case ssaop.OpreduceMaxUint8x16:
  2356  		v.Op = ssaop.OpARM64VUMAXV16B
  2357  		return true
  2358  	case ssaop.OpreduceMinFloat32x4:
  2359  		v.Op = ssaop.OpARM64VFMINV4S
  2360  		return true
  2361  	case ssaop.OpreduceMinInt16x8:
  2362  		v.Op = ssaop.OpARM64VSMINV8H
  2363  		return true
  2364  	case ssaop.OpreduceMinInt32x4:
  2365  		v.Op = ssaop.OpARM64VSMINV4S
  2366  		return true
  2367  	case ssaop.OpreduceMinInt8x16:
  2368  		v.Op = ssaop.OpARM64VSMINV16B
  2369  		return true
  2370  	case ssaop.OpreduceMinUint16x8:
  2371  		v.Op = ssaop.OpARM64VUMINV8H
  2372  		return true
  2373  	case ssaop.OpreduceMinUint32x4:
  2374  		v.Op = ssaop.OpARM64VUMINV4S
  2375  		return true
  2376  	case ssaop.OpreduceMinUint8x16:
  2377  		v.Op = ssaop.OpARM64VUMINV16B
  2378  		return true
  2379  	case ssaop.OpreduceSumInt16x8:
  2380  		v.Op = ssaop.OpARM64VADDV8H
  2381  		return true
  2382  	case ssaop.OpreduceSumInt32x4:
  2383  		v.Op = ssaop.OpARM64VADDV4S
  2384  		return true
  2385  	case ssaop.OpreduceSumInt8x16:
  2386  		v.Op = ssaop.OpARM64VADDV16B
  2387  		return true
  2388  	case ssaop.OpreduceSumUint16x8:
  2389  		v.Op = ssaop.OpARM64VADDV8H
  2390  		return true
  2391  	case ssaop.OpreduceSumUint32x4:
  2392  		v.Op = ssaop.OpARM64VADDV4S
  2393  		return true
  2394  	case ssaop.OpreduceSumUint8x16:
  2395  		v.Op = ssaop.OpARM64VADDV16B
  2396  		return true
  2397  	}
  2398  	return false
  2399  }
  2400  func rewriteValue_OpARM64ADCSflags(v *ssa.Value) bool {
  2401  	v_2 := v.Args[2]
  2402  	v_1 := v.Args[1]
  2403  	v_0 := v.Args[0]
  2404  	b := v.Block
  2405  	typ := &b.Func.Config.Types
  2406  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (ADCzerocarry <typ.UInt64> c))))
  2407  	// result: (ADCSflags x y c)
  2408  	for {
  2409  		x := v_0
  2410  		y := v_1
  2411  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
  2412  			break
  2413  		}
  2414  		v_2_0 := v_2.Args[0]
  2415  		if v_2_0.Op != ssaop.OpARM64ADDSconstflags || ssa.AuxIntToInt64(v_2_0.AuxInt) != -1 {
  2416  			break
  2417  		}
  2418  		v_2_0_0 := v_2_0.Args[0]
  2419  		if v_2_0_0.Op != ssaop.OpARM64ADCzerocarry || v_2_0_0.Type != typ.UInt64 {
  2420  			break
  2421  		}
  2422  		c := v_2_0_0.Args[0]
  2423  		v.Reset(ssaop.OpARM64ADCSflags)
  2424  		v.AddArg3(x, y, c)
  2425  		return true
  2426  	}
  2427  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (MOVDconst [0]))))
  2428  	// result: (ADDSflags x y)
  2429  	for {
  2430  		x := v_0
  2431  		y := v_1
  2432  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
  2433  			break
  2434  		}
  2435  		v_2_0 := v_2.Args[0]
  2436  		if v_2_0.Op != ssaop.OpARM64ADDSconstflags || ssa.AuxIntToInt64(v_2_0.AuxInt) != -1 {
  2437  			break
  2438  		}
  2439  		v_2_0_0 := v_2_0.Args[0]
  2440  		if v_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2_0_0.AuxInt) != 0 {
  2441  			break
  2442  		}
  2443  		v.Reset(ssaop.OpARM64ADDSflags)
  2444  		v.AddArg2(x, y)
  2445  		return true
  2446  	}
  2447  	return false
  2448  }
  2449  func rewriteValue_OpARM64ADD(v *ssa.Value) bool {
  2450  	v_1 := v.Args[1]
  2451  	v_0 := v.Args[0]
  2452  	b := v.Block
  2453  	// match: (ADD x (MOVDconst <t> [c]))
  2454  	// cond: !t.IsPtr()
  2455  	// result: (ADDconst [c] x)
  2456  	for {
  2457  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2458  			x := v_0
  2459  			if v_1.Op != ssaop.OpARM64MOVDconst {
  2460  				continue
  2461  			}
  2462  			t := v_1.Type
  2463  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  2464  			if !(!t.IsPtr()) {
  2465  				continue
  2466  			}
  2467  			v.Reset(ssaop.OpARM64ADDconst)
  2468  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2469  			v.AddArg(x)
  2470  			return true
  2471  		}
  2472  		break
  2473  	}
  2474  	// match: (ADD a l:(MUL x y))
  2475  	// cond: l.Uses==1 && ssa.Clobber(l)
  2476  	// result: (MADD a x y)
  2477  	for {
  2478  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2479  			a := v_0
  2480  			l := v_1
  2481  			if l.Op != ssaop.OpARM64MUL {
  2482  				continue
  2483  			}
  2484  			y := l.Args[1]
  2485  			x := l.Args[0]
  2486  			if !(l.Uses == 1 && ssa.Clobber(l)) {
  2487  				continue
  2488  			}
  2489  			v.Reset(ssaop.OpARM64MADD)
  2490  			v.AddArg3(a, x, y)
  2491  			return true
  2492  		}
  2493  		break
  2494  	}
  2495  	// match: (ADD a l:(MNEG x y))
  2496  	// cond: l.Uses==1 && ssa.Clobber(l)
  2497  	// result: (MSUB a x y)
  2498  	for {
  2499  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2500  			a := v_0
  2501  			l := v_1
  2502  			if l.Op != ssaop.OpARM64MNEG {
  2503  				continue
  2504  			}
  2505  			y := l.Args[1]
  2506  			x := l.Args[0]
  2507  			if !(l.Uses == 1 && ssa.Clobber(l)) {
  2508  				continue
  2509  			}
  2510  			v.Reset(ssaop.OpARM64MSUB)
  2511  			v.AddArg3(a, x, y)
  2512  			return true
  2513  		}
  2514  		break
  2515  	}
  2516  	// match: (ADD a l:(MULW x y))
  2517  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
  2518  	// result: (MADDW a x y)
  2519  	for {
  2520  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2521  			a := v_0
  2522  			l := v_1
  2523  			if l.Op != ssaop.OpARM64MULW {
  2524  				continue
  2525  			}
  2526  			y := l.Args[1]
  2527  			x := l.Args[0]
  2528  			if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
  2529  				continue
  2530  			}
  2531  			v.Reset(ssaop.OpARM64MADDW)
  2532  			v.AddArg3(a, x, y)
  2533  			return true
  2534  		}
  2535  		break
  2536  	}
  2537  	// match: (ADD a l:(MNEGW x y))
  2538  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
  2539  	// result: (MSUBW a x y)
  2540  	for {
  2541  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2542  			a := v_0
  2543  			l := v_1
  2544  			if l.Op != ssaop.OpARM64MNEGW {
  2545  				continue
  2546  			}
  2547  			y := l.Args[1]
  2548  			x := l.Args[0]
  2549  			if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
  2550  				continue
  2551  			}
  2552  			v.Reset(ssaop.OpARM64MSUBW)
  2553  			v.AddArg3(a, x, y)
  2554  			return true
  2555  		}
  2556  		break
  2557  	}
  2558  	// match: (ADD <t> a p:(ADDconst [c] m:(MUL _ _)))
  2559  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2560  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2561  	for {
  2562  		t := v.Type
  2563  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2564  			a := v_0
  2565  			p := v_1
  2566  			if p.Op != ssaop.OpARM64ADDconst {
  2567  				continue
  2568  			}
  2569  			c := ssa.AuxIntToInt64(p.AuxInt)
  2570  			m := p.Args[0]
  2571  			if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2572  				continue
  2573  			}
  2574  			v.Reset(ssaop.OpARM64ADDconst)
  2575  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2576  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2577  			v0.AddArg2(a, m)
  2578  			v.AddArg(v0)
  2579  			return true
  2580  		}
  2581  		break
  2582  	}
  2583  	// match: (ADD <t> a p:(ADDconst [c] m:(MULW _ _)))
  2584  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2585  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2586  	for {
  2587  		t := v.Type
  2588  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2589  			a := v_0
  2590  			p := v_1
  2591  			if p.Op != ssaop.OpARM64ADDconst {
  2592  				continue
  2593  			}
  2594  			c := ssa.AuxIntToInt64(p.AuxInt)
  2595  			m := p.Args[0]
  2596  			if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2597  				continue
  2598  			}
  2599  			v.Reset(ssaop.OpARM64ADDconst)
  2600  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2601  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2602  			v0.AddArg2(a, m)
  2603  			v.AddArg(v0)
  2604  			return true
  2605  		}
  2606  		break
  2607  	}
  2608  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEG _ _)))
  2609  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2610  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2611  	for {
  2612  		t := v.Type
  2613  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2614  			a := v_0
  2615  			p := v_1
  2616  			if p.Op != ssaop.OpARM64ADDconst {
  2617  				continue
  2618  			}
  2619  			c := ssa.AuxIntToInt64(p.AuxInt)
  2620  			m := p.Args[0]
  2621  			if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2622  				continue
  2623  			}
  2624  			v.Reset(ssaop.OpARM64ADDconst)
  2625  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2626  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2627  			v0.AddArg2(a, m)
  2628  			v.AddArg(v0)
  2629  			return true
  2630  		}
  2631  		break
  2632  	}
  2633  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEGW _ _)))
  2634  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2635  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2636  	for {
  2637  		t := v.Type
  2638  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2639  			a := v_0
  2640  			p := v_1
  2641  			if p.Op != ssaop.OpARM64ADDconst {
  2642  				continue
  2643  			}
  2644  			c := ssa.AuxIntToInt64(p.AuxInt)
  2645  			m := p.Args[0]
  2646  			if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2647  				continue
  2648  			}
  2649  			v.Reset(ssaop.OpARM64ADDconst)
  2650  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2651  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2652  			v0.AddArg2(a, m)
  2653  			v.AddArg(v0)
  2654  			return true
  2655  		}
  2656  		break
  2657  	}
  2658  	// match: (ADD <t> a p:(SUBconst [c] m:(MUL _ _)))
  2659  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2660  	// result: (SUBconst [c] (ADD <v.Type> a m))
  2661  	for {
  2662  		t := v.Type
  2663  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2664  			a := v_0
  2665  			p := v_1
  2666  			if p.Op != ssaop.OpARM64SUBconst {
  2667  				continue
  2668  			}
  2669  			c := ssa.AuxIntToInt64(p.AuxInt)
  2670  			m := p.Args[0]
  2671  			if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2672  				continue
  2673  			}
  2674  			v.Reset(ssaop.OpARM64SUBconst)
  2675  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2676  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2677  			v0.AddArg2(a, m)
  2678  			v.AddArg(v0)
  2679  			return true
  2680  		}
  2681  		break
  2682  	}
  2683  	// match: (ADD <t> a p:(SUBconst [c] m:(MULW _ _)))
  2684  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2685  	// result: (SUBconst [c] (ADD <v.Type> a m))
  2686  	for {
  2687  		t := v.Type
  2688  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2689  			a := v_0
  2690  			p := v_1
  2691  			if p.Op != ssaop.OpARM64SUBconst {
  2692  				continue
  2693  			}
  2694  			c := ssa.AuxIntToInt64(p.AuxInt)
  2695  			m := p.Args[0]
  2696  			if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2697  				continue
  2698  			}
  2699  			v.Reset(ssaop.OpARM64SUBconst)
  2700  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2701  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2702  			v0.AddArg2(a, m)
  2703  			v.AddArg(v0)
  2704  			return true
  2705  		}
  2706  		break
  2707  	}
  2708  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEG _ _)))
  2709  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2710  	// result: (SUBconst [c] (ADD <v.Type> a m))
  2711  	for {
  2712  		t := v.Type
  2713  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2714  			a := v_0
  2715  			p := v_1
  2716  			if p.Op != ssaop.OpARM64SUBconst {
  2717  				continue
  2718  			}
  2719  			c := ssa.AuxIntToInt64(p.AuxInt)
  2720  			m := p.Args[0]
  2721  			if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2722  				continue
  2723  			}
  2724  			v.Reset(ssaop.OpARM64SUBconst)
  2725  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2726  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2727  			v0.AddArg2(a, m)
  2728  			v.AddArg(v0)
  2729  			return true
  2730  		}
  2731  		break
  2732  	}
  2733  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEGW _ _)))
  2734  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2735  	// result: (SUBconst [c] (ADD <v.Type> a m))
  2736  	for {
  2737  		t := v.Type
  2738  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2739  			a := v_0
  2740  			p := v_1
  2741  			if p.Op != ssaop.OpARM64SUBconst {
  2742  				continue
  2743  			}
  2744  			c := ssa.AuxIntToInt64(p.AuxInt)
  2745  			m := p.Args[0]
  2746  			if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2747  				continue
  2748  			}
  2749  			v.Reset(ssaop.OpARM64SUBconst)
  2750  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2751  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2752  			v0.AddArg2(a, m)
  2753  			v.AddArg(v0)
  2754  			return true
  2755  		}
  2756  		break
  2757  	}
  2758  	// match: (ADD x (NEG y))
  2759  	// result: (SUB x y)
  2760  	for {
  2761  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2762  			x := v_0
  2763  			if v_1.Op != ssaop.OpARM64NEG {
  2764  				continue
  2765  			}
  2766  			y := v_1.Args[0]
  2767  			v.Reset(ssaop.OpARM64SUB)
  2768  			v.AddArg2(x, y)
  2769  			return true
  2770  		}
  2771  		break
  2772  	}
  2773  	// match: (ADD x0 x1:(SLLconst [c] y))
  2774  	// cond: ssa.ClobberIfDead(x1)
  2775  	// result: (ADDshiftLL x0 y [c])
  2776  	for {
  2777  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2778  			x0 := v_0
  2779  			x1 := v_1
  2780  			if x1.Op != ssaop.OpARM64SLLconst {
  2781  				continue
  2782  			}
  2783  			c := ssa.AuxIntToInt64(x1.AuxInt)
  2784  			y := x1.Args[0]
  2785  			if !(ssa.ClobberIfDead(x1)) {
  2786  				continue
  2787  			}
  2788  			v.Reset(ssaop.OpARM64ADDshiftLL)
  2789  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2790  			v.AddArg2(x0, y)
  2791  			return true
  2792  		}
  2793  		break
  2794  	}
  2795  	// match: (ADD x0 x1:(SRLconst [c] y))
  2796  	// cond: ssa.ClobberIfDead(x1)
  2797  	// result: (ADDshiftRL x0 y [c])
  2798  	for {
  2799  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2800  			x0 := v_0
  2801  			x1 := v_1
  2802  			if x1.Op != ssaop.OpARM64SRLconst {
  2803  				continue
  2804  			}
  2805  			c := ssa.AuxIntToInt64(x1.AuxInt)
  2806  			y := x1.Args[0]
  2807  			if !(ssa.ClobberIfDead(x1)) {
  2808  				continue
  2809  			}
  2810  			v.Reset(ssaop.OpARM64ADDshiftRL)
  2811  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2812  			v.AddArg2(x0, y)
  2813  			return true
  2814  		}
  2815  		break
  2816  	}
  2817  	// match: (ADD x0 x1:(SRAconst [c] y))
  2818  	// cond: ssa.ClobberIfDead(x1)
  2819  	// result: (ADDshiftRA x0 y [c])
  2820  	for {
  2821  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2822  			x0 := v_0
  2823  			x1 := v_1
  2824  			if x1.Op != ssaop.OpARM64SRAconst {
  2825  				continue
  2826  			}
  2827  			c := ssa.AuxIntToInt64(x1.AuxInt)
  2828  			y := x1.Args[0]
  2829  			if !(ssa.ClobberIfDead(x1)) {
  2830  				continue
  2831  			}
  2832  			v.Reset(ssaop.OpARM64ADDshiftRA)
  2833  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2834  			v.AddArg2(x0, y)
  2835  			return true
  2836  		}
  2837  		break
  2838  	}
  2839  	// match: (ADD x0 x1:(ANDshiftRA x2:(SLLconst [sl] y) z [63]))
  2840  	// cond: x1.Uses == 1 && x2.Uses == 1
  2841  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  2842  	for {
  2843  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2844  			x0 := v_0
  2845  			x1 := v_1
  2846  			if x1.Op != ssaop.OpARM64ANDshiftRA || ssa.AuxIntToInt64(x1.AuxInt) != 63 {
  2847  				continue
  2848  			}
  2849  			z := x1.Args[1]
  2850  			x2 := x1.Args[0]
  2851  			if x2.Op != ssaop.OpARM64SLLconst {
  2852  				continue
  2853  			}
  2854  			sl := ssa.AuxIntToInt64(x2.AuxInt)
  2855  			y := x2.Args[0]
  2856  			if !(x1.Uses == 1 && x2.Uses == 1) {
  2857  				continue
  2858  			}
  2859  			v.Reset(ssaop.OpARM64ADDshiftLL)
  2860  			v.AuxInt = ssa.Int64ToAuxInt(sl)
  2861  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDshiftRA, y.Type)
  2862  			v0.AuxInt = ssa.Int64ToAuxInt(63)
  2863  			v0.AddArg2(y, z)
  2864  			v.AddArg2(x0, v0)
  2865  			return true
  2866  		}
  2867  		break
  2868  	}
  2869  	// match: (ADD x0 x1:(ANDshiftLL x2:(SRAconst [63] z) y [sl]))
  2870  	// cond: x1.Uses == 1 && x2.Uses == 1
  2871  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  2872  	for {
  2873  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2874  			x0 := v_0
  2875  			x1 := v_1
  2876  			if x1.Op != ssaop.OpARM64ANDshiftLL {
  2877  				continue
  2878  			}
  2879  			sl := ssa.AuxIntToInt64(x1.AuxInt)
  2880  			y := x1.Args[1]
  2881  			x2 := x1.Args[0]
  2882  			if x2.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(x2.AuxInt) != 63 {
  2883  				continue
  2884  			}
  2885  			z := x2.Args[0]
  2886  			if !(x1.Uses == 1 && x2.Uses == 1) {
  2887  				continue
  2888  			}
  2889  			v.Reset(ssaop.OpARM64ADDshiftLL)
  2890  			v.AuxInt = ssa.Int64ToAuxInt(sl)
  2891  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDshiftRA, y.Type)
  2892  			v0.AuxInt = ssa.Int64ToAuxInt(63)
  2893  			v0.AddArg2(y, z)
  2894  			v.AddArg2(x0, v0)
  2895  			return true
  2896  		}
  2897  		break
  2898  	}
  2899  	return false
  2900  }
  2901  func rewriteValue_OpARM64ADDSflags(v *ssa.Value) bool {
  2902  	v_1 := v.Args[1]
  2903  	v_0 := v.Args[0]
  2904  	// match: (ADDSflags x (MOVDconst [c]))
  2905  	// result: (ADDSconstflags [c] x)
  2906  	for {
  2907  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2908  			x := v_0
  2909  			if v_1.Op != ssaop.OpARM64MOVDconst {
  2910  				continue
  2911  			}
  2912  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  2913  			v.Reset(ssaop.OpARM64ADDSconstflags)
  2914  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2915  			v.AddArg(x)
  2916  			return true
  2917  		}
  2918  		break
  2919  	}
  2920  	return false
  2921  }
  2922  func rewriteValue_OpARM64ADDconst(v *ssa.Value) bool {
  2923  	v_0 := v.Args[0]
  2924  	// match: (ADDconst [off1] (MOVDaddr [off2] {sym} ptr))
  2925  	// cond: ssa.Is32Bit(off1+int64(off2))
  2926  	// result: (MOVDaddr [int32(off1)+off2] {sym} ptr)
  2927  	for {
  2928  		off1 := ssa.AuxIntToInt64(v.AuxInt)
  2929  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  2930  			break
  2931  		}
  2932  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  2933  		sym := ssa.AuxToSym(v_0.Aux)
  2934  		ptr := v_0.Args[0]
  2935  		if !(ssa.Is32Bit(off1 + int64(off2))) {
  2936  			break
  2937  		}
  2938  		v.Reset(ssaop.OpARM64MOVDaddr)
  2939  		v.AuxInt = ssa.Int32ToAuxInt(int32(off1) + off2)
  2940  		v.Aux = ssa.SymToAux(sym)
  2941  		v.AddArg(ptr)
  2942  		return true
  2943  	}
  2944  	// match: (ADDconst [c] y)
  2945  	// cond: c < 0
  2946  	// result: (SUBconst [-c] y)
  2947  	for {
  2948  		c := ssa.AuxIntToInt64(v.AuxInt)
  2949  		y := v_0
  2950  		if !(c < 0) {
  2951  			break
  2952  		}
  2953  		v.Reset(ssaop.OpARM64SUBconst)
  2954  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  2955  		v.AddArg(y)
  2956  		return true
  2957  	}
  2958  	// match: (ADDconst [0] x)
  2959  	// result: x
  2960  	for {
  2961  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  2962  			break
  2963  		}
  2964  		x := v_0
  2965  		v.CopyOf(x)
  2966  		return true
  2967  	}
  2968  	// match: (ADDconst [c] (MOVDconst [d]))
  2969  	// result: (MOVDconst [c+d])
  2970  	for {
  2971  		c := ssa.AuxIntToInt64(v.AuxInt)
  2972  		if v_0.Op != ssaop.OpARM64MOVDconst {
  2973  			break
  2974  		}
  2975  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2976  		v.Reset(ssaop.OpARM64MOVDconst)
  2977  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  2978  		return true
  2979  	}
  2980  	// match: (ADDconst [c] (ADDconst [d] x))
  2981  	// result: (ADDconst [c+d] x)
  2982  	for {
  2983  		c := ssa.AuxIntToInt64(v.AuxInt)
  2984  		if v_0.Op != ssaop.OpARM64ADDconst {
  2985  			break
  2986  		}
  2987  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2988  		x := v_0.Args[0]
  2989  		v.Reset(ssaop.OpARM64ADDconst)
  2990  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  2991  		v.AddArg(x)
  2992  		return true
  2993  	}
  2994  	// match: (ADDconst [c] (SUBconst [d] x))
  2995  	// result: (ADDconst [c-d] x)
  2996  	for {
  2997  		c := ssa.AuxIntToInt64(v.AuxInt)
  2998  		if v_0.Op != ssaop.OpARM64SUBconst {
  2999  			break
  3000  		}
  3001  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3002  		x := v_0.Args[0]
  3003  		v.Reset(ssaop.OpARM64ADDconst)
  3004  		v.AuxInt = ssa.Int64ToAuxInt(c - d)
  3005  		v.AddArg(x)
  3006  		return true
  3007  	}
  3008  	return false
  3009  }
  3010  func rewriteValue_OpARM64ADDshiftLL(v *ssa.Value) bool {
  3011  	v_1 := v.Args[1]
  3012  	v_0 := v.Args[0]
  3013  	b := v.Block
  3014  	typ := &b.Func.Config.Types
  3015  	// match: (ADDshiftLL (MOVDconst [c]) x [d])
  3016  	// result: (ADDconst [c] (SLLconst <x.Type> x [d]))
  3017  	for {
  3018  		d := ssa.AuxIntToInt64(v.AuxInt)
  3019  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3020  			break
  3021  		}
  3022  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3023  		x := v_1
  3024  		v.Reset(ssaop.OpARM64ADDconst)
  3025  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3026  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  3027  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3028  		v0.AddArg(x)
  3029  		v.AddArg(v0)
  3030  		return true
  3031  	}
  3032  	// match: (ADDshiftLL x (MOVDconst [c]) [d])
  3033  	// result: (ADDconst x [int64(uint64(c)<<uint64(d))])
  3034  	for {
  3035  		d := ssa.AuxIntToInt64(v.AuxInt)
  3036  		x := v_0
  3037  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3038  			break
  3039  		}
  3040  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3041  		v.Reset(ssaop.OpARM64ADDconst)
  3042  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  3043  		v.AddArg(x)
  3044  		return true
  3045  	}
  3046  	// match: (ADDshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
  3047  	// result: (REV16W x)
  3048  	for {
  3049  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
  3050  			break
  3051  		}
  3052  		x := v_0.Args[0]
  3053  		if x != v_1 {
  3054  			break
  3055  		}
  3056  		v.Reset(ssaop.OpARM64REV16W)
  3057  		v.AddArg(x)
  3058  		return true
  3059  	}
  3060  	// match: (ADDshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
  3061  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
  3062  	// result: (REV16W x)
  3063  	for {
  3064  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
  3065  			break
  3066  		}
  3067  		v_0_0 := v_0.Args[0]
  3068  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3069  			break
  3070  		}
  3071  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3072  		x := v_0_0.Args[0]
  3073  		if v_1.Op != ssaop.OpARM64ANDconst {
  3074  			break
  3075  		}
  3076  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3077  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
  3078  			break
  3079  		}
  3080  		v.Reset(ssaop.OpARM64REV16W)
  3081  		v.AddArg(x)
  3082  		return true
  3083  	}
  3084  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  3085  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
  3086  	// result: (REV16 x)
  3087  	for {
  3088  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
  3089  			break
  3090  		}
  3091  		v_0_0 := v_0.Args[0]
  3092  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3093  			break
  3094  		}
  3095  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3096  		x := v_0_0.Args[0]
  3097  		if v_1.Op != ssaop.OpARM64ANDconst {
  3098  			break
  3099  		}
  3100  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3101  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
  3102  			break
  3103  		}
  3104  		v.Reset(ssaop.OpARM64REV16)
  3105  		v.AddArg(x)
  3106  		return true
  3107  	}
  3108  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  3109  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
  3110  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
  3111  	for {
  3112  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
  3113  			break
  3114  		}
  3115  		v_0_0 := v_0.Args[0]
  3116  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3117  			break
  3118  		}
  3119  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3120  		x := v_0_0.Args[0]
  3121  		if v_1.Op != ssaop.OpARM64ANDconst {
  3122  			break
  3123  		}
  3124  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3125  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
  3126  			break
  3127  		}
  3128  		v.Reset(ssaop.OpARM64REV16)
  3129  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
  3130  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
  3131  		v0.AddArg(x)
  3132  		v.AddArg(v0)
  3133  		return true
  3134  	}
  3135  	// match: (ADDshiftLL [c] (SRLconst x [64-c]) x2)
  3136  	// result: (EXTRconst [64-c] x2 x)
  3137  	for {
  3138  		c := ssa.AuxIntToInt64(v.AuxInt)
  3139  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
  3140  			break
  3141  		}
  3142  		x := v_0.Args[0]
  3143  		x2 := v_1
  3144  		v.Reset(ssaop.OpARM64EXTRconst)
  3145  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
  3146  		v.AddArg2(x2, x)
  3147  		return true
  3148  	}
  3149  	// match: (ADDshiftLL <t> [c] (UBFX [bfc] x) x2)
  3150  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
  3151  	// result: (EXTRWconst [32-c] x2 x)
  3152  	for {
  3153  		t := v.Type
  3154  		c := ssa.AuxIntToInt64(v.AuxInt)
  3155  		if v_0.Op != ssaop.OpARM64UBFX {
  3156  			break
  3157  		}
  3158  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
  3159  		x := v_0.Args[0]
  3160  		x2 := v_1
  3161  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
  3162  			break
  3163  		}
  3164  		v.Reset(ssaop.OpARM64EXTRWconst)
  3165  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
  3166  		v.AddArg2(x2, x)
  3167  		return true
  3168  	}
  3169  	return false
  3170  }
  3171  func rewriteValue_OpARM64ADDshiftRA(v *ssa.Value) bool {
  3172  	v_1 := v.Args[1]
  3173  	v_0 := v.Args[0]
  3174  	b := v.Block
  3175  	// match: (ADDshiftRA (MOVDconst [c]) x [d])
  3176  	// result: (ADDconst [c] (SRAconst <x.Type> x [d]))
  3177  	for {
  3178  		d := ssa.AuxIntToInt64(v.AuxInt)
  3179  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3180  			break
  3181  		}
  3182  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3183  		x := v_1
  3184  		v.Reset(ssaop.OpARM64ADDconst)
  3185  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3186  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  3187  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3188  		v0.AddArg(x)
  3189  		v.AddArg(v0)
  3190  		return true
  3191  	}
  3192  	// match: (ADDshiftRA x (MOVDconst [c]) [d])
  3193  	// result: (ADDconst x [c>>uint64(d)])
  3194  	for {
  3195  		d := ssa.AuxIntToInt64(v.AuxInt)
  3196  		x := v_0
  3197  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3198  			break
  3199  		}
  3200  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3201  		v.Reset(ssaop.OpARM64ADDconst)
  3202  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  3203  		v.AddArg(x)
  3204  		return true
  3205  	}
  3206  	return false
  3207  }
  3208  func rewriteValue_OpARM64ADDshiftRL(v *ssa.Value) bool {
  3209  	v_1 := v.Args[1]
  3210  	v_0 := v.Args[0]
  3211  	b := v.Block
  3212  	// match: (ADDshiftRL (MOVDconst [c]) x [d])
  3213  	// result: (ADDconst [c] (SRLconst <x.Type> x [d]))
  3214  	for {
  3215  		d := ssa.AuxIntToInt64(v.AuxInt)
  3216  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3217  			break
  3218  		}
  3219  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3220  		x := v_1
  3221  		v.Reset(ssaop.OpARM64ADDconst)
  3222  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3223  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  3224  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3225  		v0.AddArg(x)
  3226  		v.AddArg(v0)
  3227  		return true
  3228  	}
  3229  	// match: (ADDshiftRL x (MOVDconst [c]) [d])
  3230  	// result: (ADDconst x [int64(uint64(c)>>uint64(d))])
  3231  	for {
  3232  		d := ssa.AuxIntToInt64(v.AuxInt)
  3233  		x := v_0
  3234  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3235  			break
  3236  		}
  3237  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3238  		v.Reset(ssaop.OpARM64ADDconst)
  3239  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  3240  		v.AddArg(x)
  3241  		return true
  3242  	}
  3243  	return false
  3244  }
  3245  func rewriteValue_OpARM64AND(v *ssa.Value) bool {
  3246  	v_1 := v.Args[1]
  3247  	v_0 := v.Args[0]
  3248  	// match: (AND x (MOVDconst [c]))
  3249  	// result: (ANDconst [c] x)
  3250  	for {
  3251  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3252  			x := v_0
  3253  			if v_1.Op != ssaop.OpARM64MOVDconst {
  3254  				continue
  3255  			}
  3256  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  3257  			v.Reset(ssaop.OpARM64ANDconst)
  3258  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3259  			v.AddArg(x)
  3260  			return true
  3261  		}
  3262  		break
  3263  	}
  3264  	// match: (AND x x)
  3265  	// result: x
  3266  	for {
  3267  		x := v_0
  3268  		if x != v_1 {
  3269  			break
  3270  		}
  3271  		v.CopyOf(x)
  3272  		return true
  3273  	}
  3274  	// match: (AND x (MVN y))
  3275  	// result: (BIC x y)
  3276  	for {
  3277  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3278  			x := v_0
  3279  			if v_1.Op != ssaop.OpARM64MVN {
  3280  				continue
  3281  			}
  3282  			y := v_1.Args[0]
  3283  			v.Reset(ssaop.OpARM64BIC)
  3284  			v.AddArg2(x, y)
  3285  			return true
  3286  		}
  3287  		break
  3288  	}
  3289  	// match: (AND x0 x1:(SLLconst [c] y))
  3290  	// cond: ssa.ClobberIfDead(x1)
  3291  	// result: (ANDshiftLL x0 y [c])
  3292  	for {
  3293  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3294  			x0 := v_0
  3295  			x1 := v_1
  3296  			if x1.Op != ssaop.OpARM64SLLconst {
  3297  				continue
  3298  			}
  3299  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3300  			y := x1.Args[0]
  3301  			if !(ssa.ClobberIfDead(x1)) {
  3302  				continue
  3303  			}
  3304  			v.Reset(ssaop.OpARM64ANDshiftLL)
  3305  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3306  			v.AddArg2(x0, y)
  3307  			return true
  3308  		}
  3309  		break
  3310  	}
  3311  	// match: (AND x0 x1:(SRLconst [c] y))
  3312  	// cond: ssa.ClobberIfDead(x1)
  3313  	// result: (ANDshiftRL x0 y [c])
  3314  	for {
  3315  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3316  			x0 := v_0
  3317  			x1 := v_1
  3318  			if x1.Op != ssaop.OpARM64SRLconst {
  3319  				continue
  3320  			}
  3321  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3322  			y := x1.Args[0]
  3323  			if !(ssa.ClobberIfDead(x1)) {
  3324  				continue
  3325  			}
  3326  			v.Reset(ssaop.OpARM64ANDshiftRL)
  3327  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3328  			v.AddArg2(x0, y)
  3329  			return true
  3330  		}
  3331  		break
  3332  	}
  3333  	// match: (AND x0 x1:(SRAconst [c] y))
  3334  	// cond: ssa.ClobberIfDead(x1)
  3335  	// result: (ANDshiftRA x0 y [c])
  3336  	for {
  3337  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3338  			x0 := v_0
  3339  			x1 := v_1
  3340  			if x1.Op != ssaop.OpARM64SRAconst {
  3341  				continue
  3342  			}
  3343  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3344  			y := x1.Args[0]
  3345  			if !(ssa.ClobberIfDead(x1)) {
  3346  				continue
  3347  			}
  3348  			v.Reset(ssaop.OpARM64ANDshiftRA)
  3349  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3350  			v.AddArg2(x0, y)
  3351  			return true
  3352  		}
  3353  		break
  3354  	}
  3355  	// match: (AND x0 x1:(RORconst [c] y))
  3356  	// cond: ssa.ClobberIfDead(x1)
  3357  	// result: (ANDshiftRO x0 y [c])
  3358  	for {
  3359  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3360  			x0 := v_0
  3361  			x1 := v_1
  3362  			if x1.Op != ssaop.OpARM64RORconst {
  3363  				continue
  3364  			}
  3365  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3366  			y := x1.Args[0]
  3367  			if !(ssa.ClobberIfDead(x1)) {
  3368  				continue
  3369  			}
  3370  			v.Reset(ssaop.OpARM64ANDshiftRO)
  3371  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3372  			v.AddArg2(x0, y)
  3373  			return true
  3374  		}
  3375  		break
  3376  	}
  3377  	return false
  3378  }
  3379  func rewriteValue_OpARM64ANDconst(v *ssa.Value) bool {
  3380  	v_0 := v.Args[0]
  3381  	// match: (ANDconst [0] _)
  3382  	// result: (MOVDconst [0])
  3383  	for {
  3384  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  3385  			break
  3386  		}
  3387  		v.Reset(ssaop.OpARM64MOVDconst)
  3388  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3389  		return true
  3390  	}
  3391  	// match: (ANDconst [-1] x)
  3392  	// result: x
  3393  	for {
  3394  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
  3395  			break
  3396  		}
  3397  		x := v_0
  3398  		v.CopyOf(x)
  3399  		return true
  3400  	}
  3401  	// match: (ANDconst [c] (MOVDconst [d]))
  3402  	// result: (MOVDconst [c&d])
  3403  	for {
  3404  		c := ssa.AuxIntToInt64(v.AuxInt)
  3405  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3406  			break
  3407  		}
  3408  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3409  		v.Reset(ssaop.OpARM64MOVDconst)
  3410  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  3411  		return true
  3412  	}
  3413  	// match: (ANDconst [c] (ANDconst [d] x))
  3414  	// result: (ANDconst [c&d] x)
  3415  	for {
  3416  		c := ssa.AuxIntToInt64(v.AuxInt)
  3417  		if v_0.Op != ssaop.OpARM64ANDconst {
  3418  			break
  3419  		}
  3420  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3421  		x := v_0.Args[0]
  3422  		v.Reset(ssaop.OpARM64ANDconst)
  3423  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  3424  		v.AddArg(x)
  3425  		return true
  3426  	}
  3427  	// match: (ANDconst [c] (MOVWUreg x))
  3428  	// result: (ANDconst [c&(1<<32-1)] x)
  3429  	for {
  3430  		c := ssa.AuxIntToInt64(v.AuxInt)
  3431  		if v_0.Op != ssaop.OpARM64MOVWUreg {
  3432  			break
  3433  		}
  3434  		x := v_0.Args[0]
  3435  		v.Reset(ssaop.OpARM64ANDconst)
  3436  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<32 - 1))
  3437  		v.AddArg(x)
  3438  		return true
  3439  	}
  3440  	// match: (ANDconst [c] (MOVHUreg x))
  3441  	// result: (ANDconst [c&(1<<16-1)] x)
  3442  	for {
  3443  		c := ssa.AuxIntToInt64(v.AuxInt)
  3444  		if v_0.Op != ssaop.OpARM64MOVHUreg {
  3445  			break
  3446  		}
  3447  		x := v_0.Args[0]
  3448  		v.Reset(ssaop.OpARM64ANDconst)
  3449  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<16 - 1))
  3450  		v.AddArg(x)
  3451  		return true
  3452  	}
  3453  	// match: (ANDconst [c] (MOVBUreg x))
  3454  	// result: (ANDconst [c&(1<<8-1)] x)
  3455  	for {
  3456  		c := ssa.AuxIntToInt64(v.AuxInt)
  3457  		if v_0.Op != ssaop.OpARM64MOVBUreg {
  3458  			break
  3459  		}
  3460  		x := v_0.Args[0]
  3461  		v.Reset(ssaop.OpARM64ANDconst)
  3462  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<8 - 1))
  3463  		v.AddArg(x)
  3464  		return true
  3465  	}
  3466  	// match: (ANDconst [ac] (SLLconst [sc] x))
  3467  	// cond: isARM64BFMask(sc, ac, sc)
  3468  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
  3469  	for {
  3470  		ac := ssa.AuxIntToInt64(v.AuxInt)
  3471  		if v_0.Op != ssaop.OpARM64SLLconst {
  3472  			break
  3473  		}
  3474  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
  3475  		x := v_0.Args[0]
  3476  		if !(isARM64BFMask(sc, ac, sc)) {
  3477  			break
  3478  		}
  3479  		v.Reset(ssaop.OpARM64UBFIZ)
  3480  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc)))
  3481  		v.AddArg(x)
  3482  		return true
  3483  	}
  3484  	// match: (ANDconst [ac] (SRLconst [sc] x))
  3485  	// cond: isARM64BFMask(sc, ac, 0)
  3486  	// result: (UBFX [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
  3487  	for {
  3488  		ac := ssa.AuxIntToInt64(v.AuxInt)
  3489  		if v_0.Op != ssaop.OpARM64SRLconst {
  3490  			break
  3491  		}
  3492  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
  3493  		x := v_0.Args[0]
  3494  		if !(isARM64BFMask(sc, ac, 0)) {
  3495  			break
  3496  		}
  3497  		v.Reset(ssaop.OpARM64UBFX)
  3498  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0)))
  3499  		v.AddArg(x)
  3500  		return true
  3501  	}
  3502  	// match: (ANDconst [c] (UBFX [bfc] x))
  3503  	// cond: isARM64BFMask(0, c, 0)
  3504  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), arm64BFWidth(c, 0)))] x)
  3505  	for {
  3506  		c := ssa.AuxIntToInt64(v.AuxInt)
  3507  		if v_0.Op != ssaop.OpARM64UBFX {
  3508  			break
  3509  		}
  3510  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
  3511  		x := v_0.Args[0]
  3512  		if !(isARM64BFMask(0, c, 0)) {
  3513  			break
  3514  		}
  3515  		v.Reset(ssaop.OpARM64UBFX)
  3516  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), arm64BFWidth(c, 0))))
  3517  		v.AddArg(x)
  3518  		return true
  3519  	}
  3520  	// match: (ANDconst [0xffffffff] x)
  3521  	// result: (MOVWUreg x)
  3522  	for {
  3523  		if ssa.AuxIntToInt64(v.AuxInt) != 0xffffffff {
  3524  			break
  3525  		}
  3526  		x := v_0
  3527  		v.Reset(ssaop.OpARM64MOVWUreg)
  3528  		v.AddArg(x)
  3529  		return true
  3530  	}
  3531  	// match: (ANDconst [0xffff ] x)
  3532  	// result: (MOVHUreg x)
  3533  	for {
  3534  		if ssa.AuxIntToInt64(v.AuxInt) != 0xffff {
  3535  			break
  3536  		}
  3537  		x := v_0
  3538  		v.Reset(ssaop.OpARM64MOVHUreg)
  3539  		v.AddArg(x)
  3540  		return true
  3541  	}
  3542  	// match: (ANDconst [0xff ] x)
  3543  	// result: (MOVBUreg x)
  3544  	for {
  3545  		if ssa.AuxIntToInt64(v.AuxInt) != 0xff {
  3546  			break
  3547  		}
  3548  		x := v_0
  3549  		v.Reset(ssaop.OpARM64MOVBUreg)
  3550  		v.AddArg(x)
  3551  		return true
  3552  	}
  3553  	return false
  3554  }
  3555  func rewriteValue_OpARM64ANDshiftLL(v *ssa.Value) bool {
  3556  	v_1 := v.Args[1]
  3557  	v_0 := v.Args[0]
  3558  	b := v.Block
  3559  	// match: (ANDshiftLL (MOVDconst [c]) x [d])
  3560  	// result: (ANDconst [c] (SLLconst <x.Type> x [d]))
  3561  	for {
  3562  		d := ssa.AuxIntToInt64(v.AuxInt)
  3563  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3564  			break
  3565  		}
  3566  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3567  		x := v_1
  3568  		v.Reset(ssaop.OpARM64ANDconst)
  3569  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3570  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  3571  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3572  		v0.AddArg(x)
  3573  		v.AddArg(v0)
  3574  		return true
  3575  	}
  3576  	// match: (ANDshiftLL x (MOVDconst [c]) [d])
  3577  	// result: (ANDconst x [int64(uint64(c)<<uint64(d))])
  3578  	for {
  3579  		d := ssa.AuxIntToInt64(v.AuxInt)
  3580  		x := v_0
  3581  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3582  			break
  3583  		}
  3584  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3585  		v.Reset(ssaop.OpARM64ANDconst)
  3586  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  3587  		v.AddArg(x)
  3588  		return true
  3589  	}
  3590  	// match: (ANDshiftLL y:(SLLconst x [c]) x [c])
  3591  	// result: y
  3592  	for {
  3593  		c := ssa.AuxIntToInt64(v.AuxInt)
  3594  		y := v_0
  3595  		if y.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  3596  			break
  3597  		}
  3598  		x := y.Args[0]
  3599  		if x != v_1 {
  3600  			break
  3601  		}
  3602  		v.CopyOf(y)
  3603  		return true
  3604  	}
  3605  	return false
  3606  }
  3607  func rewriteValue_OpARM64ANDshiftRA(v *ssa.Value) bool {
  3608  	v_1 := v.Args[1]
  3609  	v_0 := v.Args[0]
  3610  	b := v.Block
  3611  	// match: (ANDshiftRA (MOVDconst [c]) x [d])
  3612  	// result: (ANDconst [c] (SRAconst <x.Type> x [d]))
  3613  	for {
  3614  		d := ssa.AuxIntToInt64(v.AuxInt)
  3615  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3616  			break
  3617  		}
  3618  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3619  		x := v_1
  3620  		v.Reset(ssaop.OpARM64ANDconst)
  3621  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3622  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  3623  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3624  		v0.AddArg(x)
  3625  		v.AddArg(v0)
  3626  		return true
  3627  	}
  3628  	// match: (ANDshiftRA x (MOVDconst [c]) [d])
  3629  	// result: (ANDconst x [c>>uint64(d)])
  3630  	for {
  3631  		d := ssa.AuxIntToInt64(v.AuxInt)
  3632  		x := v_0
  3633  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3634  			break
  3635  		}
  3636  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3637  		v.Reset(ssaop.OpARM64ANDconst)
  3638  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  3639  		v.AddArg(x)
  3640  		return true
  3641  	}
  3642  	// match: (ANDshiftRA y:(SRAconst x [c]) x [c])
  3643  	// result: y
  3644  	for {
  3645  		c := ssa.AuxIntToInt64(v.AuxInt)
  3646  		y := v_0
  3647  		if y.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  3648  			break
  3649  		}
  3650  		x := y.Args[0]
  3651  		if x != v_1 {
  3652  			break
  3653  		}
  3654  		v.CopyOf(y)
  3655  		return true
  3656  	}
  3657  	return false
  3658  }
  3659  func rewriteValue_OpARM64ANDshiftRL(v *ssa.Value) bool {
  3660  	v_1 := v.Args[1]
  3661  	v_0 := v.Args[0]
  3662  	b := v.Block
  3663  	// match: (ANDshiftRL (MOVDconst [c]) x [d])
  3664  	// result: (ANDconst [c] (SRLconst <x.Type> x [d]))
  3665  	for {
  3666  		d := ssa.AuxIntToInt64(v.AuxInt)
  3667  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3668  			break
  3669  		}
  3670  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3671  		x := v_1
  3672  		v.Reset(ssaop.OpARM64ANDconst)
  3673  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3674  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  3675  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3676  		v0.AddArg(x)
  3677  		v.AddArg(v0)
  3678  		return true
  3679  	}
  3680  	// match: (ANDshiftRL x (MOVDconst [c]) [d])
  3681  	// result: (ANDconst x [int64(uint64(c)>>uint64(d))])
  3682  	for {
  3683  		d := ssa.AuxIntToInt64(v.AuxInt)
  3684  		x := v_0
  3685  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3686  			break
  3687  		}
  3688  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3689  		v.Reset(ssaop.OpARM64ANDconst)
  3690  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  3691  		v.AddArg(x)
  3692  		return true
  3693  	}
  3694  	// match: (ANDshiftRL y:(SRLconst x [c]) x [c])
  3695  	// result: y
  3696  	for {
  3697  		c := ssa.AuxIntToInt64(v.AuxInt)
  3698  		y := v_0
  3699  		if y.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  3700  			break
  3701  		}
  3702  		x := y.Args[0]
  3703  		if x != v_1 {
  3704  			break
  3705  		}
  3706  		v.CopyOf(y)
  3707  		return true
  3708  	}
  3709  	return false
  3710  }
  3711  func rewriteValue_OpARM64ANDshiftRO(v *ssa.Value) bool {
  3712  	v_1 := v.Args[1]
  3713  	v_0 := v.Args[0]
  3714  	b := v.Block
  3715  	// match: (ANDshiftRO (MOVDconst [c]) x [d])
  3716  	// result: (ANDconst [c] (RORconst <x.Type> x [d]))
  3717  	for {
  3718  		d := ssa.AuxIntToInt64(v.AuxInt)
  3719  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3720  			break
  3721  		}
  3722  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3723  		x := v_1
  3724  		v.Reset(ssaop.OpARM64ANDconst)
  3725  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3726  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
  3727  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3728  		v0.AddArg(x)
  3729  		v.AddArg(v0)
  3730  		return true
  3731  	}
  3732  	// match: (ANDshiftRO x (MOVDconst [c]) [d])
  3733  	// result: (ANDconst x [rotateRight64(c, d)])
  3734  	for {
  3735  		d := ssa.AuxIntToInt64(v.AuxInt)
  3736  		x := v_0
  3737  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3738  			break
  3739  		}
  3740  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3741  		v.Reset(ssaop.OpARM64ANDconst)
  3742  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
  3743  		v.AddArg(x)
  3744  		return true
  3745  	}
  3746  	// match: (ANDshiftRO y:(RORconst x [c]) x [c])
  3747  	// result: y
  3748  	for {
  3749  		c := ssa.AuxIntToInt64(v.AuxInt)
  3750  		y := v_0
  3751  		if y.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  3752  			break
  3753  		}
  3754  		x := y.Args[0]
  3755  		if x != v_1 {
  3756  			break
  3757  		}
  3758  		v.CopyOf(y)
  3759  		return true
  3760  	}
  3761  	return false
  3762  }
  3763  func rewriteValue_OpARM64BIC(v *ssa.Value) bool {
  3764  	v_1 := v.Args[1]
  3765  	v_0 := v.Args[0]
  3766  	// match: (BIC x (MOVDconst [c]))
  3767  	// result: (ANDconst [^c] x)
  3768  	for {
  3769  		x := v_0
  3770  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3771  			break
  3772  		}
  3773  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3774  		v.Reset(ssaop.OpARM64ANDconst)
  3775  		v.AuxInt = ssa.Int64ToAuxInt(^c)
  3776  		v.AddArg(x)
  3777  		return true
  3778  	}
  3779  	// match: (BIC x x)
  3780  	// result: (MOVDconst [0])
  3781  	for {
  3782  		x := v_0
  3783  		if x != v_1 {
  3784  			break
  3785  		}
  3786  		v.Reset(ssaop.OpARM64MOVDconst)
  3787  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3788  		return true
  3789  	}
  3790  	// match: (BIC x0 x1:(SLLconst [c] y))
  3791  	// cond: ssa.ClobberIfDead(x1)
  3792  	// result: (BICshiftLL x0 y [c])
  3793  	for {
  3794  		x0 := v_0
  3795  		x1 := v_1
  3796  		if x1.Op != ssaop.OpARM64SLLconst {
  3797  			break
  3798  		}
  3799  		c := ssa.AuxIntToInt64(x1.AuxInt)
  3800  		y := x1.Args[0]
  3801  		if !(ssa.ClobberIfDead(x1)) {
  3802  			break
  3803  		}
  3804  		v.Reset(ssaop.OpARM64BICshiftLL)
  3805  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3806  		v.AddArg2(x0, y)
  3807  		return true
  3808  	}
  3809  	// match: (BIC x0 x1:(SRLconst [c] y))
  3810  	// cond: ssa.ClobberIfDead(x1)
  3811  	// result: (BICshiftRL x0 y [c])
  3812  	for {
  3813  		x0 := v_0
  3814  		x1 := v_1
  3815  		if x1.Op != ssaop.OpARM64SRLconst {
  3816  			break
  3817  		}
  3818  		c := ssa.AuxIntToInt64(x1.AuxInt)
  3819  		y := x1.Args[0]
  3820  		if !(ssa.ClobberIfDead(x1)) {
  3821  			break
  3822  		}
  3823  		v.Reset(ssaop.OpARM64BICshiftRL)
  3824  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3825  		v.AddArg2(x0, y)
  3826  		return true
  3827  	}
  3828  	// match: (BIC x0 x1:(SRAconst [c] y))
  3829  	// cond: ssa.ClobberIfDead(x1)
  3830  	// result: (BICshiftRA x0 y [c])
  3831  	for {
  3832  		x0 := v_0
  3833  		x1 := v_1
  3834  		if x1.Op != ssaop.OpARM64SRAconst {
  3835  			break
  3836  		}
  3837  		c := ssa.AuxIntToInt64(x1.AuxInt)
  3838  		y := x1.Args[0]
  3839  		if !(ssa.ClobberIfDead(x1)) {
  3840  			break
  3841  		}
  3842  		v.Reset(ssaop.OpARM64BICshiftRA)
  3843  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3844  		v.AddArg2(x0, y)
  3845  		return true
  3846  	}
  3847  	// match: (BIC x0 x1:(RORconst [c] y))
  3848  	// cond: ssa.ClobberIfDead(x1)
  3849  	// result: (BICshiftRO x0 y [c])
  3850  	for {
  3851  		x0 := v_0
  3852  		x1 := v_1
  3853  		if x1.Op != ssaop.OpARM64RORconst {
  3854  			break
  3855  		}
  3856  		c := ssa.AuxIntToInt64(x1.AuxInt)
  3857  		y := x1.Args[0]
  3858  		if !(ssa.ClobberIfDead(x1)) {
  3859  			break
  3860  		}
  3861  		v.Reset(ssaop.OpARM64BICshiftRO)
  3862  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3863  		v.AddArg2(x0, y)
  3864  		return true
  3865  	}
  3866  	return false
  3867  }
  3868  func rewriteValue_OpARM64BICshiftLL(v *ssa.Value) bool {
  3869  	v_1 := v.Args[1]
  3870  	v_0 := v.Args[0]
  3871  	// match: (BICshiftLL x (MOVDconst [c]) [d])
  3872  	// result: (ANDconst x [^int64(uint64(c)<<uint64(d))])
  3873  	for {
  3874  		d := ssa.AuxIntToInt64(v.AuxInt)
  3875  		x := v_0
  3876  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3877  			break
  3878  		}
  3879  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3880  		v.Reset(ssaop.OpARM64ANDconst)
  3881  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  3882  		v.AddArg(x)
  3883  		return true
  3884  	}
  3885  	// match: (BICshiftLL (SLLconst x [c]) x [c])
  3886  	// result: (MOVDconst [0])
  3887  	for {
  3888  		c := ssa.AuxIntToInt64(v.AuxInt)
  3889  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  3890  			break
  3891  		}
  3892  		x := v_0.Args[0]
  3893  		if x != v_1 {
  3894  			break
  3895  		}
  3896  		v.Reset(ssaop.OpARM64MOVDconst)
  3897  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3898  		return true
  3899  	}
  3900  	return false
  3901  }
  3902  func rewriteValue_OpARM64BICshiftRA(v *ssa.Value) bool {
  3903  	v_1 := v.Args[1]
  3904  	v_0 := v.Args[0]
  3905  	// match: (BICshiftRA x (MOVDconst [c]) [d])
  3906  	// result: (ANDconst x [^(c>>uint64(d))])
  3907  	for {
  3908  		d := ssa.AuxIntToInt64(v.AuxInt)
  3909  		x := v_0
  3910  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3911  			break
  3912  		}
  3913  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3914  		v.Reset(ssaop.OpARM64ANDconst)
  3915  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
  3916  		v.AddArg(x)
  3917  		return true
  3918  	}
  3919  	// match: (BICshiftRA (SRAconst x [c]) x [c])
  3920  	// result: (MOVDconst [0])
  3921  	for {
  3922  		c := ssa.AuxIntToInt64(v.AuxInt)
  3923  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  3924  			break
  3925  		}
  3926  		x := v_0.Args[0]
  3927  		if x != v_1 {
  3928  			break
  3929  		}
  3930  		v.Reset(ssaop.OpARM64MOVDconst)
  3931  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3932  		return true
  3933  	}
  3934  	return false
  3935  }
  3936  func rewriteValue_OpARM64BICshiftRL(v *ssa.Value) bool {
  3937  	v_1 := v.Args[1]
  3938  	v_0 := v.Args[0]
  3939  	// match: (BICshiftRL x (MOVDconst [c]) [d])
  3940  	// result: (ANDconst x [^int64(uint64(c)>>uint64(d))])
  3941  	for {
  3942  		d := ssa.AuxIntToInt64(v.AuxInt)
  3943  		x := v_0
  3944  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3945  			break
  3946  		}
  3947  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3948  		v.Reset(ssaop.OpARM64ANDconst)
  3949  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  3950  		v.AddArg(x)
  3951  		return true
  3952  	}
  3953  	// match: (BICshiftRL (SRLconst x [c]) x [c])
  3954  	// result: (MOVDconst [0])
  3955  	for {
  3956  		c := ssa.AuxIntToInt64(v.AuxInt)
  3957  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  3958  			break
  3959  		}
  3960  		x := v_0.Args[0]
  3961  		if x != v_1 {
  3962  			break
  3963  		}
  3964  		v.Reset(ssaop.OpARM64MOVDconst)
  3965  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3966  		return true
  3967  	}
  3968  	return false
  3969  }
  3970  func rewriteValue_OpARM64BICshiftRO(v *ssa.Value) bool {
  3971  	v_1 := v.Args[1]
  3972  	v_0 := v.Args[0]
  3973  	// match: (BICshiftRO x (MOVDconst [c]) [d])
  3974  	// result: (ANDconst x [^rotateRight64(c, d)])
  3975  	for {
  3976  		d := ssa.AuxIntToInt64(v.AuxInt)
  3977  		x := v_0
  3978  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3979  			break
  3980  		}
  3981  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3982  		v.Reset(ssaop.OpARM64ANDconst)
  3983  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
  3984  		v.AddArg(x)
  3985  		return true
  3986  	}
  3987  	// match: (BICshiftRO (RORconst x [c]) x [c])
  3988  	// result: (MOVDconst [0])
  3989  	for {
  3990  		c := ssa.AuxIntToInt64(v.AuxInt)
  3991  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  3992  			break
  3993  		}
  3994  		x := v_0.Args[0]
  3995  		if x != v_1 {
  3996  			break
  3997  		}
  3998  		v.Reset(ssaop.OpARM64MOVDconst)
  3999  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4000  		return true
  4001  	}
  4002  	return false
  4003  }
  4004  func rewriteValue_OpARM64CMN(v *ssa.Value) bool {
  4005  	v_1 := v.Args[1]
  4006  	v_0 := v.Args[0]
  4007  	// match: (CMN x (MOVDconst [c]))
  4008  	// result: (CMNconst [c] x)
  4009  	for {
  4010  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4011  			x := v_0
  4012  			if v_1.Op != ssaop.OpARM64MOVDconst {
  4013  				continue
  4014  			}
  4015  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4016  			v.Reset(ssaop.OpARM64CMNconst)
  4017  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4018  			v.AddArg(x)
  4019  			return true
  4020  		}
  4021  		break
  4022  	}
  4023  	// match: (CMN x0 x1:(SLLconst [c] y))
  4024  	// cond: ssa.ClobberIfDead(x1)
  4025  	// result: (CMNshiftLL x0 y [c])
  4026  	for {
  4027  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4028  			x0 := v_0
  4029  			x1 := v_1
  4030  			if x1.Op != ssaop.OpARM64SLLconst {
  4031  				continue
  4032  			}
  4033  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4034  			y := x1.Args[0]
  4035  			if !(ssa.ClobberIfDead(x1)) {
  4036  				continue
  4037  			}
  4038  			v.Reset(ssaop.OpARM64CMNshiftLL)
  4039  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4040  			v.AddArg2(x0, y)
  4041  			return true
  4042  		}
  4043  		break
  4044  	}
  4045  	// match: (CMN x0 x1:(SRLconst [c] y))
  4046  	// cond: ssa.ClobberIfDead(x1)
  4047  	// result: (CMNshiftRL x0 y [c])
  4048  	for {
  4049  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4050  			x0 := v_0
  4051  			x1 := v_1
  4052  			if x1.Op != ssaop.OpARM64SRLconst {
  4053  				continue
  4054  			}
  4055  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4056  			y := x1.Args[0]
  4057  			if !(ssa.ClobberIfDead(x1)) {
  4058  				continue
  4059  			}
  4060  			v.Reset(ssaop.OpARM64CMNshiftRL)
  4061  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4062  			v.AddArg2(x0, y)
  4063  			return true
  4064  		}
  4065  		break
  4066  	}
  4067  	// match: (CMN x0 x1:(SRAconst [c] y))
  4068  	// cond: ssa.ClobberIfDead(x1)
  4069  	// result: (CMNshiftRA x0 y [c])
  4070  	for {
  4071  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4072  			x0 := v_0
  4073  			x1 := v_1
  4074  			if x1.Op != ssaop.OpARM64SRAconst {
  4075  				continue
  4076  			}
  4077  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4078  			y := x1.Args[0]
  4079  			if !(ssa.ClobberIfDead(x1)) {
  4080  				continue
  4081  			}
  4082  			v.Reset(ssaop.OpARM64CMNshiftRA)
  4083  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4084  			v.AddArg2(x0, y)
  4085  			return true
  4086  		}
  4087  		break
  4088  	}
  4089  	return false
  4090  }
  4091  func rewriteValue_OpARM64CMNW(v *ssa.Value) bool {
  4092  	v_1 := v.Args[1]
  4093  	v_0 := v.Args[0]
  4094  	// match: (CMNW x (MOVDconst [c]))
  4095  	// result: (CMNWconst [int32(c)] x)
  4096  	for {
  4097  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4098  			x := v_0
  4099  			if v_1.Op != ssaop.OpARM64MOVDconst {
  4100  				continue
  4101  			}
  4102  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4103  			v.Reset(ssaop.OpARM64CMNWconst)
  4104  			v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4105  			v.AddArg(x)
  4106  			return true
  4107  		}
  4108  		break
  4109  	}
  4110  	return false
  4111  }
  4112  func rewriteValue_OpARM64CMNWconst(v *ssa.Value) bool {
  4113  	v_0 := v.Args[0]
  4114  	// match: (CMNWconst [c] y)
  4115  	// cond: c < 0 && c != -1<<31
  4116  	// result: (CMPWconst [-c] y)
  4117  	for {
  4118  		c := ssa.AuxIntToInt32(v.AuxInt)
  4119  		y := v_0
  4120  		if !(c < 0 && c != -1<<31) {
  4121  			break
  4122  		}
  4123  		v.Reset(ssaop.OpARM64CMPWconst)
  4124  		v.AuxInt = ssa.Int32ToAuxInt(-c)
  4125  		v.AddArg(y)
  4126  		return true
  4127  	}
  4128  	// match: (CMNWconst (MOVDconst [x]) [y])
  4129  	// result: (FlagConstant [ssa.AddFlags32(int32(x),y)])
  4130  	for {
  4131  		y := ssa.AuxIntToInt32(v.AuxInt)
  4132  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4133  			break
  4134  		}
  4135  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4136  		v.Reset(ssaop.OpARM64FlagConstant)
  4137  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.AddFlags32(int32(x), y))
  4138  		return true
  4139  	}
  4140  	return false
  4141  }
  4142  func rewriteValue_OpARM64CMNconst(v *ssa.Value) bool {
  4143  	v_0 := v.Args[0]
  4144  	// match: (CMNconst [c] y)
  4145  	// cond: c < 0 && c != -1<<63
  4146  	// result: (CMPconst [-c] y)
  4147  	for {
  4148  		c := ssa.AuxIntToInt64(v.AuxInt)
  4149  		y := v_0
  4150  		if !(c < 0 && c != -1<<63) {
  4151  			break
  4152  		}
  4153  		v.Reset(ssaop.OpARM64CMPconst)
  4154  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  4155  		v.AddArg(y)
  4156  		return true
  4157  	}
  4158  	// match: (CMNconst (MOVDconst [x]) [y])
  4159  	// result: (FlagConstant [ssa.AddFlags64(x,y)])
  4160  	for {
  4161  		y := ssa.AuxIntToInt64(v.AuxInt)
  4162  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4163  			break
  4164  		}
  4165  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4166  		v.Reset(ssaop.OpARM64FlagConstant)
  4167  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.AddFlags64(x, y))
  4168  		return true
  4169  	}
  4170  	return false
  4171  }
  4172  func rewriteValue_OpARM64CMNshiftLL(v *ssa.Value) bool {
  4173  	v_1 := v.Args[1]
  4174  	v_0 := v.Args[0]
  4175  	b := v.Block
  4176  	// match: (CMNshiftLL (MOVDconst [c]) x [d])
  4177  	// result: (CMNconst [c] (SLLconst <x.Type> x [d]))
  4178  	for {
  4179  		d := ssa.AuxIntToInt64(v.AuxInt)
  4180  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4181  			break
  4182  		}
  4183  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4184  		x := v_1
  4185  		v.Reset(ssaop.OpARM64CMNconst)
  4186  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4187  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  4188  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4189  		v0.AddArg(x)
  4190  		v.AddArg(v0)
  4191  		return true
  4192  	}
  4193  	// match: (CMNshiftLL x (MOVDconst [c]) [d])
  4194  	// result: (CMNconst x [int64(uint64(c)<<uint64(d))])
  4195  	for {
  4196  		d := ssa.AuxIntToInt64(v.AuxInt)
  4197  		x := v_0
  4198  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4199  			break
  4200  		}
  4201  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4202  		v.Reset(ssaop.OpARM64CMNconst)
  4203  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  4204  		v.AddArg(x)
  4205  		return true
  4206  	}
  4207  	return false
  4208  }
  4209  func rewriteValue_OpARM64CMNshiftRA(v *ssa.Value) bool {
  4210  	v_1 := v.Args[1]
  4211  	v_0 := v.Args[0]
  4212  	b := v.Block
  4213  	// match: (CMNshiftRA (MOVDconst [c]) x [d])
  4214  	// result: (CMNconst [c] (SRAconst <x.Type> x [d]))
  4215  	for {
  4216  		d := ssa.AuxIntToInt64(v.AuxInt)
  4217  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4218  			break
  4219  		}
  4220  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4221  		x := v_1
  4222  		v.Reset(ssaop.OpARM64CMNconst)
  4223  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4224  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  4225  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4226  		v0.AddArg(x)
  4227  		v.AddArg(v0)
  4228  		return true
  4229  	}
  4230  	// match: (CMNshiftRA x (MOVDconst [c]) [d])
  4231  	// result: (CMNconst x [c>>uint64(d)])
  4232  	for {
  4233  		d := ssa.AuxIntToInt64(v.AuxInt)
  4234  		x := v_0
  4235  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4236  			break
  4237  		}
  4238  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4239  		v.Reset(ssaop.OpARM64CMNconst)
  4240  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  4241  		v.AddArg(x)
  4242  		return true
  4243  	}
  4244  	return false
  4245  }
  4246  func rewriteValue_OpARM64CMNshiftRL(v *ssa.Value) bool {
  4247  	v_1 := v.Args[1]
  4248  	v_0 := v.Args[0]
  4249  	b := v.Block
  4250  	// match: (CMNshiftRL (MOVDconst [c]) x [d])
  4251  	// result: (CMNconst [c] (SRLconst <x.Type> x [d]))
  4252  	for {
  4253  		d := ssa.AuxIntToInt64(v.AuxInt)
  4254  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4255  			break
  4256  		}
  4257  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4258  		x := v_1
  4259  		v.Reset(ssaop.OpARM64CMNconst)
  4260  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4261  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  4262  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4263  		v0.AddArg(x)
  4264  		v.AddArg(v0)
  4265  		return true
  4266  	}
  4267  	// match: (CMNshiftRL x (MOVDconst [c]) [d])
  4268  	// result: (CMNconst x [int64(uint64(c)>>uint64(d))])
  4269  	for {
  4270  		d := ssa.AuxIntToInt64(v.AuxInt)
  4271  		x := v_0
  4272  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4273  			break
  4274  		}
  4275  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4276  		v.Reset(ssaop.OpARM64CMNconst)
  4277  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  4278  		v.AddArg(x)
  4279  		return true
  4280  	}
  4281  	return false
  4282  }
  4283  func rewriteValue_OpARM64CMP(v *ssa.Value) bool {
  4284  	v_1 := v.Args[1]
  4285  	v_0 := v.Args[0]
  4286  	b := v.Block
  4287  	// match: (CMP x (MOVDconst [c]))
  4288  	// result: (CMPconst [c] x)
  4289  	for {
  4290  		x := v_0
  4291  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4292  			break
  4293  		}
  4294  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4295  		v.Reset(ssaop.OpARM64CMPconst)
  4296  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4297  		v.AddArg(x)
  4298  		return true
  4299  	}
  4300  	// match: (CMP (MOVDconst [c]) x)
  4301  	// result: (InvertFlags (CMPconst [c] x))
  4302  	for {
  4303  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4304  			break
  4305  		}
  4306  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4307  		x := v_1
  4308  		v.Reset(ssaop.OpARM64InvertFlags)
  4309  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4310  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4311  		v0.AddArg(x)
  4312  		v.AddArg(v0)
  4313  		return true
  4314  	}
  4315  	// match: (CMP x y)
  4316  	// cond: ssa.CanonLessThan(x,y)
  4317  	// result: (InvertFlags (CMP y x))
  4318  	for {
  4319  		x := v_0
  4320  		y := v_1
  4321  		if !(ssa.CanonLessThan(x, y)) {
  4322  			break
  4323  		}
  4324  		v.Reset(ssaop.OpARM64InvertFlags)
  4325  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
  4326  		v0.AddArg2(y, x)
  4327  		v.AddArg(v0)
  4328  		return true
  4329  	}
  4330  	// match: (CMP x0 x1:(SLLconst [c] y))
  4331  	// cond: ssa.ClobberIfDead(x1)
  4332  	// result: (CMPshiftLL x0 y [c])
  4333  	for {
  4334  		x0 := v_0
  4335  		x1 := v_1
  4336  		if x1.Op != ssaop.OpARM64SLLconst {
  4337  			break
  4338  		}
  4339  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4340  		y := x1.Args[0]
  4341  		if !(ssa.ClobberIfDead(x1)) {
  4342  			break
  4343  		}
  4344  		v.Reset(ssaop.OpARM64CMPshiftLL)
  4345  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4346  		v.AddArg2(x0, y)
  4347  		return true
  4348  	}
  4349  	// match: (CMP x0:(SLLconst [c] y) x1)
  4350  	// cond: ssa.ClobberIfDead(x0)
  4351  	// result: (InvertFlags (CMPshiftLL x1 y [c]))
  4352  	for {
  4353  		x0 := v_0
  4354  		if x0.Op != ssaop.OpARM64SLLconst {
  4355  			break
  4356  		}
  4357  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4358  		y := x0.Args[0]
  4359  		x1 := v_1
  4360  		if !(ssa.ClobberIfDead(x0)) {
  4361  			break
  4362  		}
  4363  		v.Reset(ssaop.OpARM64InvertFlags)
  4364  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftLL, types.TypeFlags)
  4365  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4366  		v0.AddArg2(x1, y)
  4367  		v.AddArg(v0)
  4368  		return true
  4369  	}
  4370  	// match: (CMP x0 x1:(SRLconst [c] y))
  4371  	// cond: ssa.ClobberIfDead(x1)
  4372  	// result: (CMPshiftRL x0 y [c])
  4373  	for {
  4374  		x0 := v_0
  4375  		x1 := v_1
  4376  		if x1.Op != ssaop.OpARM64SRLconst {
  4377  			break
  4378  		}
  4379  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4380  		y := x1.Args[0]
  4381  		if !(ssa.ClobberIfDead(x1)) {
  4382  			break
  4383  		}
  4384  		v.Reset(ssaop.OpARM64CMPshiftRL)
  4385  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4386  		v.AddArg2(x0, y)
  4387  		return true
  4388  	}
  4389  	// match: (CMP x0:(SRLconst [c] y) x1)
  4390  	// cond: ssa.ClobberIfDead(x0)
  4391  	// result: (InvertFlags (CMPshiftRL x1 y [c]))
  4392  	for {
  4393  		x0 := v_0
  4394  		if x0.Op != ssaop.OpARM64SRLconst {
  4395  			break
  4396  		}
  4397  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4398  		y := x0.Args[0]
  4399  		x1 := v_1
  4400  		if !(ssa.ClobberIfDead(x0)) {
  4401  			break
  4402  		}
  4403  		v.Reset(ssaop.OpARM64InvertFlags)
  4404  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftRL, types.TypeFlags)
  4405  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4406  		v0.AddArg2(x1, y)
  4407  		v.AddArg(v0)
  4408  		return true
  4409  	}
  4410  	// match: (CMP x0 x1:(SRAconst [c] y))
  4411  	// cond: ssa.ClobberIfDead(x1)
  4412  	// result: (CMPshiftRA x0 y [c])
  4413  	for {
  4414  		x0 := v_0
  4415  		x1 := v_1
  4416  		if x1.Op != ssaop.OpARM64SRAconst {
  4417  			break
  4418  		}
  4419  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4420  		y := x1.Args[0]
  4421  		if !(ssa.ClobberIfDead(x1)) {
  4422  			break
  4423  		}
  4424  		v.Reset(ssaop.OpARM64CMPshiftRA)
  4425  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4426  		v.AddArg2(x0, y)
  4427  		return true
  4428  	}
  4429  	// match: (CMP x0:(SRAconst [c] y) x1)
  4430  	// cond: ssa.ClobberIfDead(x0)
  4431  	// result: (InvertFlags (CMPshiftRA x1 y [c]))
  4432  	for {
  4433  		x0 := v_0
  4434  		if x0.Op != ssaop.OpARM64SRAconst {
  4435  			break
  4436  		}
  4437  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4438  		y := x0.Args[0]
  4439  		x1 := v_1
  4440  		if !(ssa.ClobberIfDead(x0)) {
  4441  			break
  4442  		}
  4443  		v.Reset(ssaop.OpARM64InvertFlags)
  4444  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftRA, types.TypeFlags)
  4445  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4446  		v0.AddArg2(x1, y)
  4447  		v.AddArg(v0)
  4448  		return true
  4449  	}
  4450  	return false
  4451  }
  4452  func rewriteValue_OpARM64CMPW(v *ssa.Value) bool {
  4453  	v_1 := v.Args[1]
  4454  	v_0 := v.Args[0]
  4455  	b := v.Block
  4456  	// match: (CMPW x (MOVDconst [c]))
  4457  	// result: (CMPWconst [int32(c)] x)
  4458  	for {
  4459  		x := v_0
  4460  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4461  			break
  4462  		}
  4463  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4464  		v.Reset(ssaop.OpARM64CMPWconst)
  4465  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4466  		v.AddArg(x)
  4467  		return true
  4468  	}
  4469  	// match: (CMPW (MOVDconst [c]) x)
  4470  	// result: (InvertFlags (CMPWconst [int32(c)] x))
  4471  	for {
  4472  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4473  			break
  4474  		}
  4475  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4476  		x := v_1
  4477  		v.Reset(ssaop.OpARM64InvertFlags)
  4478  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
  4479  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4480  		v0.AddArg(x)
  4481  		v.AddArg(v0)
  4482  		return true
  4483  	}
  4484  	// match: (CMPW x y)
  4485  	// cond: ssa.CanonLessThan(x,y)
  4486  	// result: (InvertFlags (CMPW y x))
  4487  	for {
  4488  		x := v_0
  4489  		y := v_1
  4490  		if !(ssa.CanonLessThan(x, y)) {
  4491  			break
  4492  		}
  4493  		v.Reset(ssaop.OpARM64InvertFlags)
  4494  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
  4495  		v0.AddArg2(y, x)
  4496  		v.AddArg(v0)
  4497  		return true
  4498  	}
  4499  	return false
  4500  }
  4501  func rewriteValue_OpARM64CMPWconst(v *ssa.Value) bool {
  4502  	v_0 := v.Args[0]
  4503  	// match: (CMPWconst [c] y)
  4504  	// cond: c < 0 && c != -1<<31
  4505  	// result: (CMNWconst [-c] y)
  4506  	for {
  4507  		c := ssa.AuxIntToInt32(v.AuxInt)
  4508  		y := v_0
  4509  		if !(c < 0 && c != -1<<31) {
  4510  			break
  4511  		}
  4512  		v.Reset(ssaop.OpARM64CMNWconst)
  4513  		v.AuxInt = ssa.Int32ToAuxInt(-c)
  4514  		v.AddArg(y)
  4515  		return true
  4516  	}
  4517  	// match: (CMPWconst (MOVDconst [x]) [y])
  4518  	// result: (FlagConstant [ssa.SubFlags32(int32(x),y)])
  4519  	for {
  4520  		y := ssa.AuxIntToInt32(v.AuxInt)
  4521  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4522  			break
  4523  		}
  4524  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4525  		v.Reset(ssaop.OpARM64FlagConstant)
  4526  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags32(int32(x), y))
  4527  		return true
  4528  	}
  4529  	// match: (CMPWconst (MOVBUreg _) [c])
  4530  	// cond: 0xff < c
  4531  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4532  	for {
  4533  		c := ssa.AuxIntToInt32(v.AuxInt)
  4534  		if v_0.Op != ssaop.OpARM64MOVBUreg || !(0xff < c) {
  4535  			break
  4536  		}
  4537  		v.Reset(ssaop.OpARM64FlagConstant)
  4538  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4539  		return true
  4540  	}
  4541  	// match: (CMPWconst (MOVHUreg _) [c])
  4542  	// cond: 0xffff < c
  4543  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4544  	for {
  4545  		c := ssa.AuxIntToInt32(v.AuxInt)
  4546  		if v_0.Op != ssaop.OpARM64MOVHUreg || !(0xffff < c) {
  4547  			break
  4548  		}
  4549  		v.Reset(ssaop.OpARM64FlagConstant)
  4550  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4551  		return true
  4552  	}
  4553  	return false
  4554  }
  4555  func rewriteValue_OpARM64CMPconst(v *ssa.Value) bool {
  4556  	v_0 := v.Args[0]
  4557  	// match: (CMPconst [c] y)
  4558  	// cond: c < 0 && c != -1<<63
  4559  	// result: (CMNconst [-c] y)
  4560  	for {
  4561  		c := ssa.AuxIntToInt64(v.AuxInt)
  4562  		y := v_0
  4563  		if !(c < 0 && c != -1<<63) {
  4564  			break
  4565  		}
  4566  		v.Reset(ssaop.OpARM64CMNconst)
  4567  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  4568  		v.AddArg(y)
  4569  		return true
  4570  	}
  4571  	// match: (CMPconst (MOVDconst [x]) [y])
  4572  	// result: (FlagConstant [ssa.SubFlags64(x,y)])
  4573  	for {
  4574  		y := ssa.AuxIntToInt64(v.AuxInt)
  4575  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4576  			break
  4577  		}
  4578  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4579  		v.Reset(ssaop.OpARM64FlagConstant)
  4580  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(x, y))
  4581  		return true
  4582  	}
  4583  	// match: (CMPconst (MOVBUreg _) [c])
  4584  	// cond: 0xff < c
  4585  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4586  	for {
  4587  		c := ssa.AuxIntToInt64(v.AuxInt)
  4588  		if v_0.Op != ssaop.OpARM64MOVBUreg || !(0xff < c) {
  4589  			break
  4590  		}
  4591  		v.Reset(ssaop.OpARM64FlagConstant)
  4592  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4593  		return true
  4594  	}
  4595  	// match: (CMPconst (MOVHUreg _) [c])
  4596  	// cond: 0xffff < c
  4597  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4598  	for {
  4599  		c := ssa.AuxIntToInt64(v.AuxInt)
  4600  		if v_0.Op != ssaop.OpARM64MOVHUreg || !(0xffff < c) {
  4601  			break
  4602  		}
  4603  		v.Reset(ssaop.OpARM64FlagConstant)
  4604  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4605  		return true
  4606  	}
  4607  	// match: (CMPconst (MOVWUreg _) [c])
  4608  	// cond: 0xffffffff < c
  4609  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4610  	for {
  4611  		c := ssa.AuxIntToInt64(v.AuxInt)
  4612  		if v_0.Op != ssaop.OpARM64MOVWUreg || !(0xffffffff < c) {
  4613  			break
  4614  		}
  4615  		v.Reset(ssaop.OpARM64FlagConstant)
  4616  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4617  		return true
  4618  	}
  4619  	// match: (CMPconst (ANDconst _ [m]) [n])
  4620  	// cond: 0 <= m && m < n
  4621  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4622  	for {
  4623  		n := ssa.AuxIntToInt64(v.AuxInt)
  4624  		if v_0.Op != ssaop.OpARM64ANDconst {
  4625  			break
  4626  		}
  4627  		m := ssa.AuxIntToInt64(v_0.AuxInt)
  4628  		if !(0 <= m && m < n) {
  4629  			break
  4630  		}
  4631  		v.Reset(ssaop.OpARM64FlagConstant)
  4632  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4633  		return true
  4634  	}
  4635  	// match: (CMPconst (SRLconst _ [c]) [n])
  4636  	// cond: 0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)
  4637  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4638  	for {
  4639  		n := ssa.AuxIntToInt64(v.AuxInt)
  4640  		if v_0.Op != ssaop.OpARM64SRLconst {
  4641  			break
  4642  		}
  4643  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4644  		if !(0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)) {
  4645  			break
  4646  		}
  4647  		v.Reset(ssaop.OpARM64FlagConstant)
  4648  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4649  		return true
  4650  	}
  4651  	return false
  4652  }
  4653  func rewriteValue_OpARM64CMPshiftLL(v *ssa.Value) bool {
  4654  	v_1 := v.Args[1]
  4655  	v_0 := v.Args[0]
  4656  	b := v.Block
  4657  	// match: (CMPshiftLL (MOVDconst [c]) x [d])
  4658  	// result: (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d])))
  4659  	for {
  4660  		d := ssa.AuxIntToInt64(v.AuxInt)
  4661  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4662  			break
  4663  		}
  4664  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4665  		x := v_1
  4666  		v.Reset(ssaop.OpARM64InvertFlags)
  4667  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4668  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4669  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  4670  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  4671  		v1.AddArg(x)
  4672  		v0.AddArg(v1)
  4673  		v.AddArg(v0)
  4674  		return true
  4675  	}
  4676  	// match: (CMPshiftLL x (MOVDconst [c]) [d])
  4677  	// result: (CMPconst x [int64(uint64(c)<<uint64(d))])
  4678  	for {
  4679  		d := ssa.AuxIntToInt64(v.AuxInt)
  4680  		x := v_0
  4681  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4682  			break
  4683  		}
  4684  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4685  		v.Reset(ssaop.OpARM64CMPconst)
  4686  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  4687  		v.AddArg(x)
  4688  		return true
  4689  	}
  4690  	return false
  4691  }
  4692  func rewriteValue_OpARM64CMPshiftRA(v *ssa.Value) bool {
  4693  	v_1 := v.Args[1]
  4694  	v_0 := v.Args[0]
  4695  	b := v.Block
  4696  	// match: (CMPshiftRA (MOVDconst [c]) x [d])
  4697  	// result: (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d])))
  4698  	for {
  4699  		d := ssa.AuxIntToInt64(v.AuxInt)
  4700  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4701  			break
  4702  		}
  4703  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4704  		x := v_1
  4705  		v.Reset(ssaop.OpARM64InvertFlags)
  4706  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4707  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4708  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  4709  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  4710  		v1.AddArg(x)
  4711  		v0.AddArg(v1)
  4712  		v.AddArg(v0)
  4713  		return true
  4714  	}
  4715  	// match: (CMPshiftRA x (MOVDconst [c]) [d])
  4716  	// result: (CMPconst x [c>>uint64(d)])
  4717  	for {
  4718  		d := ssa.AuxIntToInt64(v.AuxInt)
  4719  		x := v_0
  4720  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4721  			break
  4722  		}
  4723  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4724  		v.Reset(ssaop.OpARM64CMPconst)
  4725  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  4726  		v.AddArg(x)
  4727  		return true
  4728  	}
  4729  	return false
  4730  }
  4731  func rewriteValue_OpARM64CMPshiftRL(v *ssa.Value) bool {
  4732  	v_1 := v.Args[1]
  4733  	v_0 := v.Args[0]
  4734  	b := v.Block
  4735  	// match: (CMPshiftRL (MOVDconst [c]) x [d])
  4736  	// result: (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d])))
  4737  	for {
  4738  		d := ssa.AuxIntToInt64(v.AuxInt)
  4739  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4740  			break
  4741  		}
  4742  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4743  		x := v_1
  4744  		v.Reset(ssaop.OpARM64InvertFlags)
  4745  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4746  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4747  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  4748  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  4749  		v1.AddArg(x)
  4750  		v0.AddArg(v1)
  4751  		v.AddArg(v0)
  4752  		return true
  4753  	}
  4754  	// match: (CMPshiftRL x (MOVDconst [c]) [d])
  4755  	// result: (CMPconst x [int64(uint64(c)>>uint64(d))])
  4756  	for {
  4757  		d := ssa.AuxIntToInt64(v.AuxInt)
  4758  		x := v_0
  4759  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4760  			break
  4761  		}
  4762  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4763  		v.Reset(ssaop.OpARM64CMPconst)
  4764  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  4765  		v.AddArg(x)
  4766  		return true
  4767  	}
  4768  	return false
  4769  }
  4770  func rewriteValue_OpARM64CSEL(v *ssa.Value) bool {
  4771  	v_2 := v.Args[2]
  4772  	v_1 := v.Args[1]
  4773  	v_0 := v.Args[0]
  4774  	// match: (CSEL [cc] (MOVDconst [-1]) (MOVDconst [0]) flag)
  4775  	// result: (CSETM [cc] flag)
  4776  	for {
  4777  		cc := ssa.AuxIntToOp(v.AuxInt)
  4778  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != -1 || v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  4779  			break
  4780  		}
  4781  		flag := v_2
  4782  		v.Reset(ssaop.OpARM64CSETM)
  4783  		v.AuxInt = ssa.OpToAuxInt(cc)
  4784  		v.AddArg(flag)
  4785  		return true
  4786  	}
  4787  	// match: (CSEL [cc] (MOVDconst [0]) (MOVDconst [-1]) flag)
  4788  	// result: (CSETM [arm64Negate(cc)] flag)
  4789  	for {
  4790  		cc := ssa.AuxIntToOp(v.AuxInt)
  4791  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 || v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  4792  			break
  4793  		}
  4794  		flag := v_2
  4795  		v.Reset(ssaop.OpARM64CSETM)
  4796  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4797  		v.AddArg(flag)
  4798  		return true
  4799  	}
  4800  	// match: (CSEL [cc] x (MOVDconst [0]) flag)
  4801  	// result: (CSEL0 [cc] x flag)
  4802  	for {
  4803  		cc := ssa.AuxIntToOp(v.AuxInt)
  4804  		x := v_0
  4805  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  4806  			break
  4807  		}
  4808  		flag := v_2
  4809  		v.Reset(ssaop.OpARM64CSEL0)
  4810  		v.AuxInt = ssa.OpToAuxInt(cc)
  4811  		v.AddArg2(x, flag)
  4812  		return true
  4813  	}
  4814  	// match: (CSEL [cc] (MOVDconst [0]) y flag)
  4815  	// result: (CSEL0 [arm64Negate(cc)] y flag)
  4816  	for {
  4817  		cc := ssa.AuxIntToOp(v.AuxInt)
  4818  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  4819  			break
  4820  		}
  4821  		y := v_1
  4822  		flag := v_2
  4823  		v.Reset(ssaop.OpARM64CSEL0)
  4824  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4825  		v.AddArg2(y, flag)
  4826  		return true
  4827  	}
  4828  	// match: (CSEL [cc] x (ADDconst [1] a) flag)
  4829  	// result: (CSINC [cc] x a flag)
  4830  	for {
  4831  		cc := ssa.AuxIntToOp(v.AuxInt)
  4832  		x := v_0
  4833  		if v_1.Op != ssaop.OpARM64ADDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  4834  			break
  4835  		}
  4836  		a := v_1.Args[0]
  4837  		flag := v_2
  4838  		v.Reset(ssaop.OpARM64CSINC)
  4839  		v.AuxInt = ssa.OpToAuxInt(cc)
  4840  		v.AddArg3(x, a, flag)
  4841  		return true
  4842  	}
  4843  	// match: (CSEL [cc] (ADDconst [1] a) x flag)
  4844  	// result: (CSINC [arm64Negate(cc)] x a flag)
  4845  	for {
  4846  		cc := ssa.AuxIntToOp(v.AuxInt)
  4847  		if v_0.Op != ssaop.OpARM64ADDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  4848  			break
  4849  		}
  4850  		a := v_0.Args[0]
  4851  		x := v_1
  4852  		flag := v_2
  4853  		v.Reset(ssaop.OpARM64CSINC)
  4854  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4855  		v.AddArg3(x, a, flag)
  4856  		return true
  4857  	}
  4858  	// match: (CSEL [cc] x (MVN a) flag)
  4859  	// result: (CSINV [cc] x a flag)
  4860  	for {
  4861  		cc := ssa.AuxIntToOp(v.AuxInt)
  4862  		x := v_0
  4863  		if v_1.Op != ssaop.OpARM64MVN {
  4864  			break
  4865  		}
  4866  		a := v_1.Args[0]
  4867  		flag := v_2
  4868  		v.Reset(ssaop.OpARM64CSINV)
  4869  		v.AuxInt = ssa.OpToAuxInt(cc)
  4870  		v.AddArg3(x, a, flag)
  4871  		return true
  4872  	}
  4873  	// match: (CSEL [cc] (MVN a) x flag)
  4874  	// result: (CSINV [arm64Negate(cc)] x a flag)
  4875  	for {
  4876  		cc := ssa.AuxIntToOp(v.AuxInt)
  4877  		if v_0.Op != ssaop.OpARM64MVN {
  4878  			break
  4879  		}
  4880  		a := v_0.Args[0]
  4881  		x := v_1
  4882  		flag := v_2
  4883  		v.Reset(ssaop.OpARM64CSINV)
  4884  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4885  		v.AddArg3(x, a, flag)
  4886  		return true
  4887  	}
  4888  	// match: (CSEL [cc] x (NEG a) flag)
  4889  	// result: (CSNEG [cc] x a flag)
  4890  	for {
  4891  		cc := ssa.AuxIntToOp(v.AuxInt)
  4892  		x := v_0
  4893  		if v_1.Op != ssaop.OpARM64NEG {
  4894  			break
  4895  		}
  4896  		a := v_1.Args[0]
  4897  		flag := v_2
  4898  		v.Reset(ssaop.OpARM64CSNEG)
  4899  		v.AuxInt = ssa.OpToAuxInt(cc)
  4900  		v.AddArg3(x, a, flag)
  4901  		return true
  4902  	}
  4903  	// match: (CSEL [cc] (NEG a) x flag)
  4904  	// result: (CSNEG [arm64Negate(cc)] x a flag)
  4905  	for {
  4906  		cc := ssa.AuxIntToOp(v.AuxInt)
  4907  		if v_0.Op != ssaop.OpARM64NEG {
  4908  			break
  4909  		}
  4910  		a := v_0.Args[0]
  4911  		x := v_1
  4912  		flag := v_2
  4913  		v.Reset(ssaop.OpARM64CSNEG)
  4914  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4915  		v.AddArg3(x, a, flag)
  4916  		return true
  4917  	}
  4918  	// match: (CSEL [cc] x y (InvertFlags cmp))
  4919  	// result: (CSEL [arm64Invert(cc)] x y cmp)
  4920  	for {
  4921  		cc := ssa.AuxIntToOp(v.AuxInt)
  4922  		x := v_0
  4923  		y := v_1
  4924  		if v_2.Op != ssaop.OpARM64InvertFlags {
  4925  			break
  4926  		}
  4927  		cmp := v_2.Args[0]
  4928  		v.Reset(ssaop.OpARM64CSEL)
  4929  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  4930  		v.AddArg3(x, y, cmp)
  4931  		return true
  4932  	}
  4933  	// match: (CSEL [cc] x _ flag)
  4934  	// cond: ccARM64Eval(cc, flag) > 0
  4935  	// result: x
  4936  	for {
  4937  		cc := ssa.AuxIntToOp(v.AuxInt)
  4938  		x := v_0
  4939  		flag := v_2
  4940  		if !(ccARM64Eval(cc, flag) > 0) {
  4941  			break
  4942  		}
  4943  		v.CopyOf(x)
  4944  		return true
  4945  	}
  4946  	// match: (CSEL [cc] _ y flag)
  4947  	// cond: ccARM64Eval(cc, flag) < 0
  4948  	// result: y
  4949  	for {
  4950  		cc := ssa.AuxIntToOp(v.AuxInt)
  4951  		y := v_1
  4952  		flag := v_2
  4953  		if !(ccARM64Eval(cc, flag) < 0) {
  4954  			break
  4955  		}
  4956  		v.CopyOf(y)
  4957  		return true
  4958  	}
  4959  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  4960  	// cond: cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil
  4961  	// result: (CSEL [boolval.Op] x y ssa.FlagArg(boolval))
  4962  	for {
  4963  		cc := ssa.AuxIntToOp(v.AuxInt)
  4964  		x := v_0
  4965  		y := v_1
  4966  		if v_2.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_2.AuxInt) != 0 {
  4967  			break
  4968  		}
  4969  		boolval := v_2.Args[0]
  4970  		if !(cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil) {
  4971  			break
  4972  		}
  4973  		v.Reset(ssaop.OpARM64CSEL)
  4974  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
  4975  		v.AddArg3(x, y, ssa.FlagArg(boolval))
  4976  		return true
  4977  	}
  4978  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  4979  	// cond: cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil
  4980  	// result: (CSEL [arm64Negate(boolval.Op)] x y ssa.FlagArg(boolval))
  4981  	for {
  4982  		cc := ssa.AuxIntToOp(v.AuxInt)
  4983  		x := v_0
  4984  		y := v_1
  4985  		if v_2.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_2.AuxInt) != 0 {
  4986  			break
  4987  		}
  4988  		boolval := v_2.Args[0]
  4989  		if !(cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil) {
  4990  			break
  4991  		}
  4992  		v.Reset(ssaop.OpARM64CSEL)
  4993  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(boolval.Op))
  4994  		v.AddArg3(x, y, ssa.FlagArg(boolval))
  4995  		return true
  4996  	}
  4997  	return false
  4998  }
  4999  func rewriteValue_OpARM64CSEL0(v *ssa.Value) bool {
  5000  	v_1 := v.Args[1]
  5001  	v_0 := v.Args[0]
  5002  	// match: (CSEL0 [cc] x (InvertFlags cmp))
  5003  	// result: (CSEL0 [arm64Invert(cc)] x cmp)
  5004  	for {
  5005  		cc := ssa.AuxIntToOp(v.AuxInt)
  5006  		x := v_0
  5007  		if v_1.Op != ssaop.OpARM64InvertFlags {
  5008  			break
  5009  		}
  5010  		cmp := v_1.Args[0]
  5011  		v.Reset(ssaop.OpARM64CSEL0)
  5012  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5013  		v.AddArg2(x, cmp)
  5014  		return true
  5015  	}
  5016  	// match: (CSEL0 [cc] x flag)
  5017  	// cond: ccARM64Eval(cc, flag) > 0
  5018  	// result: x
  5019  	for {
  5020  		cc := ssa.AuxIntToOp(v.AuxInt)
  5021  		x := v_0
  5022  		flag := v_1
  5023  		if !(ccARM64Eval(cc, flag) > 0) {
  5024  			break
  5025  		}
  5026  		v.CopyOf(x)
  5027  		return true
  5028  	}
  5029  	// match: (CSEL0 [cc] _ flag)
  5030  	// cond: ccARM64Eval(cc, flag) < 0
  5031  	// result: (MOVDconst [0])
  5032  	for {
  5033  		cc := ssa.AuxIntToOp(v.AuxInt)
  5034  		flag := v_1
  5035  		if !(ccARM64Eval(cc, flag) < 0) {
  5036  			break
  5037  		}
  5038  		v.Reset(ssaop.OpARM64MOVDconst)
  5039  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5040  		return true
  5041  	}
  5042  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  5043  	// cond: cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil
  5044  	// result: (CSEL0 [boolval.Op] x ssa.FlagArg(boolval))
  5045  	for {
  5046  		cc := ssa.AuxIntToOp(v.AuxInt)
  5047  		x := v_0
  5048  		if v_1.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_1.AuxInt) != 0 {
  5049  			break
  5050  		}
  5051  		boolval := v_1.Args[0]
  5052  		if !(cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil) {
  5053  			break
  5054  		}
  5055  		v.Reset(ssaop.OpARM64CSEL0)
  5056  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
  5057  		v.AddArg2(x, ssa.FlagArg(boolval))
  5058  		return true
  5059  	}
  5060  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  5061  	// cond: cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil
  5062  	// result: (CSEL0 [arm64Negate(boolval.Op)] x ssa.FlagArg(boolval))
  5063  	for {
  5064  		cc := ssa.AuxIntToOp(v.AuxInt)
  5065  		x := v_0
  5066  		if v_1.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_1.AuxInt) != 0 {
  5067  			break
  5068  		}
  5069  		boolval := v_1.Args[0]
  5070  		if !(cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil) {
  5071  			break
  5072  		}
  5073  		v.Reset(ssaop.OpARM64CSEL0)
  5074  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(boolval.Op))
  5075  		v.AddArg2(x, ssa.FlagArg(boolval))
  5076  		return true
  5077  	}
  5078  	return false
  5079  }
  5080  func rewriteValue_OpARM64CSETM(v *ssa.Value) bool {
  5081  	v_0 := v.Args[0]
  5082  	// match: (CSETM [cc] (InvertFlags cmp))
  5083  	// result: (CSETM [arm64Invert(cc)] cmp)
  5084  	for {
  5085  		cc := ssa.AuxIntToOp(v.AuxInt)
  5086  		if v_0.Op != ssaop.OpARM64InvertFlags {
  5087  			break
  5088  		}
  5089  		cmp := v_0.Args[0]
  5090  		v.Reset(ssaop.OpARM64CSETM)
  5091  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5092  		v.AddArg(cmp)
  5093  		return true
  5094  	}
  5095  	// match: (CSETM [cc] flag)
  5096  	// cond: ccARM64Eval(cc, flag) > 0
  5097  	// result: (MOVDconst [-1])
  5098  	for {
  5099  		cc := ssa.AuxIntToOp(v.AuxInt)
  5100  		flag := v_0
  5101  		if !(ccARM64Eval(cc, flag) > 0) {
  5102  			break
  5103  		}
  5104  		v.Reset(ssaop.OpARM64MOVDconst)
  5105  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5106  		return true
  5107  	}
  5108  	// match: (CSETM [cc] flag)
  5109  	// cond: ccARM64Eval(cc, flag) < 0
  5110  	// result: (MOVDconst [0])
  5111  	for {
  5112  		cc := ssa.AuxIntToOp(v.AuxInt)
  5113  		flag := v_0
  5114  		if !(ccARM64Eval(cc, flag) < 0) {
  5115  			break
  5116  		}
  5117  		v.Reset(ssaop.OpARM64MOVDconst)
  5118  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5119  		return true
  5120  	}
  5121  	return false
  5122  }
  5123  func rewriteValue_OpARM64CSINC(v *ssa.Value) bool {
  5124  	v_2 := v.Args[2]
  5125  	v_1 := v.Args[1]
  5126  	v_0 := v.Args[0]
  5127  	// match: (CSINC [cc] x y (InvertFlags cmp))
  5128  	// result: (CSINC [arm64Invert(cc)] x y cmp)
  5129  	for {
  5130  		cc := ssa.AuxIntToOp(v.AuxInt)
  5131  		x := v_0
  5132  		y := v_1
  5133  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5134  			break
  5135  		}
  5136  		cmp := v_2.Args[0]
  5137  		v.Reset(ssaop.OpARM64CSINC)
  5138  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5139  		v.AddArg3(x, y, cmp)
  5140  		return true
  5141  	}
  5142  	// match: (CSINC [cc] x _ flag)
  5143  	// cond: ccARM64Eval(cc, flag) > 0
  5144  	// result: x
  5145  	for {
  5146  		cc := ssa.AuxIntToOp(v.AuxInt)
  5147  		x := v_0
  5148  		flag := v_2
  5149  		if !(ccARM64Eval(cc, flag) > 0) {
  5150  			break
  5151  		}
  5152  		v.CopyOf(x)
  5153  		return true
  5154  	}
  5155  	// match: (CSINC [cc] _ y flag)
  5156  	// cond: ccARM64Eval(cc, flag) < 0
  5157  	// result: (ADDconst [1] y)
  5158  	for {
  5159  		cc := ssa.AuxIntToOp(v.AuxInt)
  5160  		y := v_1
  5161  		flag := v_2
  5162  		if !(ccARM64Eval(cc, flag) < 0) {
  5163  			break
  5164  		}
  5165  		v.Reset(ssaop.OpARM64ADDconst)
  5166  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5167  		v.AddArg(y)
  5168  		return true
  5169  	}
  5170  	return false
  5171  }
  5172  func rewriteValue_OpARM64CSINV(v *ssa.Value) bool {
  5173  	v_2 := v.Args[2]
  5174  	v_1 := v.Args[1]
  5175  	v_0 := v.Args[0]
  5176  	// match: (CSINV [cc] x y (InvertFlags cmp))
  5177  	// result: (CSINV [arm64Invert(cc)] x y cmp)
  5178  	for {
  5179  		cc := ssa.AuxIntToOp(v.AuxInt)
  5180  		x := v_0
  5181  		y := v_1
  5182  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5183  			break
  5184  		}
  5185  		cmp := v_2.Args[0]
  5186  		v.Reset(ssaop.OpARM64CSINV)
  5187  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5188  		v.AddArg3(x, y, cmp)
  5189  		return true
  5190  	}
  5191  	// match: (CSINV [cc] x _ flag)
  5192  	// cond: ccARM64Eval(cc, flag) > 0
  5193  	// result: x
  5194  	for {
  5195  		cc := ssa.AuxIntToOp(v.AuxInt)
  5196  		x := v_0
  5197  		flag := v_2
  5198  		if !(ccARM64Eval(cc, flag) > 0) {
  5199  			break
  5200  		}
  5201  		v.CopyOf(x)
  5202  		return true
  5203  	}
  5204  	// match: (CSINV [cc] _ y flag)
  5205  	// cond: ccARM64Eval(cc, flag) < 0
  5206  	// result: (Not y)
  5207  	for {
  5208  		cc := ssa.AuxIntToOp(v.AuxInt)
  5209  		y := v_1
  5210  		flag := v_2
  5211  		if !(ccARM64Eval(cc, flag) < 0) {
  5212  			break
  5213  		}
  5214  		v.Reset(ssaop.OpNot)
  5215  		v.AddArg(y)
  5216  		return true
  5217  	}
  5218  	return false
  5219  }
  5220  func rewriteValue_OpARM64CSNEG(v *ssa.Value) bool {
  5221  	v_2 := v.Args[2]
  5222  	v_1 := v.Args[1]
  5223  	v_0 := v.Args[0]
  5224  	// match: (CSNEG [cc] x y (InvertFlags cmp))
  5225  	// result: (CSNEG [arm64Invert(cc)] x y cmp)
  5226  	for {
  5227  		cc := ssa.AuxIntToOp(v.AuxInt)
  5228  		x := v_0
  5229  		y := v_1
  5230  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5231  			break
  5232  		}
  5233  		cmp := v_2.Args[0]
  5234  		v.Reset(ssaop.OpARM64CSNEG)
  5235  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5236  		v.AddArg3(x, y, cmp)
  5237  		return true
  5238  	}
  5239  	// match: (CSNEG [cc] x _ flag)
  5240  	// cond: ccARM64Eval(cc, flag) > 0
  5241  	// result: x
  5242  	for {
  5243  		cc := ssa.AuxIntToOp(v.AuxInt)
  5244  		x := v_0
  5245  		flag := v_2
  5246  		if !(ccARM64Eval(cc, flag) > 0) {
  5247  			break
  5248  		}
  5249  		v.CopyOf(x)
  5250  		return true
  5251  	}
  5252  	// match: (CSNEG [cc] _ y flag)
  5253  	// cond: ccARM64Eval(cc, flag) < 0
  5254  	// result: (NEG y)
  5255  	for {
  5256  		cc := ssa.AuxIntToOp(v.AuxInt)
  5257  		y := v_1
  5258  		flag := v_2
  5259  		if !(ccARM64Eval(cc, flag) < 0) {
  5260  			break
  5261  		}
  5262  		v.Reset(ssaop.OpARM64NEG)
  5263  		v.AddArg(y)
  5264  		return true
  5265  	}
  5266  	return false
  5267  }
  5268  func rewriteValue_OpARM64DIV(v *ssa.Value) bool {
  5269  	v_1 := v.Args[1]
  5270  	v_0 := v.Args[0]
  5271  	// match: (DIV (MOVDconst [c]) (MOVDconst [d]))
  5272  	// cond: d != 0
  5273  	// result: (MOVDconst [c/d])
  5274  	for {
  5275  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5276  			break
  5277  		}
  5278  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5279  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5280  			break
  5281  		}
  5282  		d := ssa.AuxIntToInt64(v_1.AuxInt)
  5283  		if !(d != 0) {
  5284  			break
  5285  		}
  5286  		v.Reset(ssaop.OpARM64MOVDconst)
  5287  		v.AuxInt = ssa.Int64ToAuxInt(c / d)
  5288  		return true
  5289  	}
  5290  	return false
  5291  }
  5292  func rewriteValue_OpARM64DIVW(v *ssa.Value) bool {
  5293  	v_1 := v.Args[1]
  5294  	v_0 := v.Args[0]
  5295  	// match: (DIVW (MOVDconst [c]) (MOVDconst [d]))
  5296  	// cond: d != 0
  5297  	// result: (MOVDconst [int64(uint32(int32(c)/int32(d)))])
  5298  	for {
  5299  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5300  			break
  5301  		}
  5302  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5303  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5304  			break
  5305  		}
  5306  		d := ssa.AuxIntToInt64(v_1.AuxInt)
  5307  		if !(d != 0) {
  5308  			break
  5309  		}
  5310  		v.Reset(ssaop.OpARM64MOVDconst)
  5311  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(int32(c) / int32(d))))
  5312  		return true
  5313  	}
  5314  	return false
  5315  }
  5316  func rewriteValue_OpARM64EON(v *ssa.Value) bool {
  5317  	v_1 := v.Args[1]
  5318  	v_0 := v.Args[0]
  5319  	// match: (EON x (MOVDconst [c]))
  5320  	// result: (XORconst [^c] x)
  5321  	for {
  5322  		x := v_0
  5323  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5324  			break
  5325  		}
  5326  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5327  		v.Reset(ssaop.OpARM64XORconst)
  5328  		v.AuxInt = ssa.Int64ToAuxInt(^c)
  5329  		v.AddArg(x)
  5330  		return true
  5331  	}
  5332  	// match: (EON x x)
  5333  	// result: (MOVDconst [-1])
  5334  	for {
  5335  		x := v_0
  5336  		if x != v_1 {
  5337  			break
  5338  		}
  5339  		v.Reset(ssaop.OpARM64MOVDconst)
  5340  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5341  		return true
  5342  	}
  5343  	// match: (EON x0 x1:(SLLconst [c] y))
  5344  	// cond: ssa.ClobberIfDead(x1)
  5345  	// result: (EONshiftLL x0 y [c])
  5346  	for {
  5347  		x0 := v_0
  5348  		x1 := v_1
  5349  		if x1.Op != ssaop.OpARM64SLLconst {
  5350  			break
  5351  		}
  5352  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5353  		y := x1.Args[0]
  5354  		if !(ssa.ClobberIfDead(x1)) {
  5355  			break
  5356  		}
  5357  		v.Reset(ssaop.OpARM64EONshiftLL)
  5358  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5359  		v.AddArg2(x0, y)
  5360  		return true
  5361  	}
  5362  	// match: (EON x0 x1:(SRLconst [c] y))
  5363  	// cond: ssa.ClobberIfDead(x1)
  5364  	// result: (EONshiftRL x0 y [c])
  5365  	for {
  5366  		x0 := v_0
  5367  		x1 := v_1
  5368  		if x1.Op != ssaop.OpARM64SRLconst {
  5369  			break
  5370  		}
  5371  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5372  		y := x1.Args[0]
  5373  		if !(ssa.ClobberIfDead(x1)) {
  5374  			break
  5375  		}
  5376  		v.Reset(ssaop.OpARM64EONshiftRL)
  5377  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5378  		v.AddArg2(x0, y)
  5379  		return true
  5380  	}
  5381  	// match: (EON x0 x1:(SRAconst [c] y))
  5382  	// cond: ssa.ClobberIfDead(x1)
  5383  	// result: (EONshiftRA x0 y [c])
  5384  	for {
  5385  		x0 := v_0
  5386  		x1 := v_1
  5387  		if x1.Op != ssaop.OpARM64SRAconst {
  5388  			break
  5389  		}
  5390  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5391  		y := x1.Args[0]
  5392  		if !(ssa.ClobberIfDead(x1)) {
  5393  			break
  5394  		}
  5395  		v.Reset(ssaop.OpARM64EONshiftRA)
  5396  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5397  		v.AddArg2(x0, y)
  5398  		return true
  5399  	}
  5400  	// match: (EON x0 x1:(RORconst [c] y))
  5401  	// cond: ssa.ClobberIfDead(x1)
  5402  	// result: (EONshiftRO x0 y [c])
  5403  	for {
  5404  		x0 := v_0
  5405  		x1 := v_1
  5406  		if x1.Op != ssaop.OpARM64RORconst {
  5407  			break
  5408  		}
  5409  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5410  		y := x1.Args[0]
  5411  		if !(ssa.ClobberIfDead(x1)) {
  5412  			break
  5413  		}
  5414  		v.Reset(ssaop.OpARM64EONshiftRO)
  5415  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5416  		v.AddArg2(x0, y)
  5417  		return true
  5418  	}
  5419  	return false
  5420  }
  5421  func rewriteValue_OpARM64EONshiftLL(v *ssa.Value) bool {
  5422  	v_1 := v.Args[1]
  5423  	v_0 := v.Args[0]
  5424  	// match: (EONshiftLL x (MOVDconst [c]) [d])
  5425  	// result: (XORconst x [^int64(uint64(c)<<uint64(d))])
  5426  	for {
  5427  		d := ssa.AuxIntToInt64(v.AuxInt)
  5428  		x := v_0
  5429  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5430  			break
  5431  		}
  5432  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5433  		v.Reset(ssaop.OpARM64XORconst)
  5434  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  5435  		v.AddArg(x)
  5436  		return true
  5437  	}
  5438  	// match: (EONshiftLL (SLLconst x [c]) x [c])
  5439  	// result: (MOVDconst [-1])
  5440  	for {
  5441  		c := ssa.AuxIntToInt64(v.AuxInt)
  5442  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5443  			break
  5444  		}
  5445  		x := v_0.Args[0]
  5446  		if x != v_1 {
  5447  			break
  5448  		}
  5449  		v.Reset(ssaop.OpARM64MOVDconst)
  5450  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5451  		return true
  5452  	}
  5453  	return false
  5454  }
  5455  func rewriteValue_OpARM64EONshiftRA(v *ssa.Value) bool {
  5456  	v_1 := v.Args[1]
  5457  	v_0 := v.Args[0]
  5458  	// match: (EONshiftRA x (MOVDconst [c]) [d])
  5459  	// result: (XORconst x [^(c>>uint64(d))])
  5460  	for {
  5461  		d := ssa.AuxIntToInt64(v.AuxInt)
  5462  		x := v_0
  5463  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5464  			break
  5465  		}
  5466  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5467  		v.Reset(ssaop.OpARM64XORconst)
  5468  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
  5469  		v.AddArg(x)
  5470  		return true
  5471  	}
  5472  	// match: (EONshiftRA (SRAconst x [c]) x [c])
  5473  	// result: (MOVDconst [-1])
  5474  	for {
  5475  		c := ssa.AuxIntToInt64(v.AuxInt)
  5476  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5477  			break
  5478  		}
  5479  		x := v_0.Args[0]
  5480  		if x != v_1 {
  5481  			break
  5482  		}
  5483  		v.Reset(ssaop.OpARM64MOVDconst)
  5484  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5485  		return true
  5486  	}
  5487  	return false
  5488  }
  5489  func rewriteValue_OpARM64EONshiftRL(v *ssa.Value) bool {
  5490  	v_1 := v.Args[1]
  5491  	v_0 := v.Args[0]
  5492  	// match: (EONshiftRL x (MOVDconst [c]) [d])
  5493  	// result: (XORconst x [^int64(uint64(c)>>uint64(d))])
  5494  	for {
  5495  		d := ssa.AuxIntToInt64(v.AuxInt)
  5496  		x := v_0
  5497  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5498  			break
  5499  		}
  5500  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5501  		v.Reset(ssaop.OpARM64XORconst)
  5502  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  5503  		v.AddArg(x)
  5504  		return true
  5505  	}
  5506  	// match: (EONshiftRL (SRLconst x [c]) x [c])
  5507  	// result: (MOVDconst [-1])
  5508  	for {
  5509  		c := ssa.AuxIntToInt64(v.AuxInt)
  5510  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5511  			break
  5512  		}
  5513  		x := v_0.Args[0]
  5514  		if x != v_1 {
  5515  			break
  5516  		}
  5517  		v.Reset(ssaop.OpARM64MOVDconst)
  5518  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5519  		return true
  5520  	}
  5521  	return false
  5522  }
  5523  func rewriteValue_OpARM64EONshiftRO(v *ssa.Value) bool {
  5524  	v_1 := v.Args[1]
  5525  	v_0 := v.Args[0]
  5526  	// match: (EONshiftRO x (MOVDconst [c]) [d])
  5527  	// result: (XORconst x [^rotateRight64(c, d)])
  5528  	for {
  5529  		d := ssa.AuxIntToInt64(v.AuxInt)
  5530  		x := v_0
  5531  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5532  			break
  5533  		}
  5534  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5535  		v.Reset(ssaop.OpARM64XORconst)
  5536  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
  5537  		v.AddArg(x)
  5538  		return true
  5539  	}
  5540  	// match: (EONshiftRO (RORconst x [c]) x [c])
  5541  	// result: (MOVDconst [-1])
  5542  	for {
  5543  		c := ssa.AuxIntToInt64(v.AuxInt)
  5544  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5545  			break
  5546  		}
  5547  		x := v_0.Args[0]
  5548  		if x != v_1 {
  5549  			break
  5550  		}
  5551  		v.Reset(ssaop.OpARM64MOVDconst)
  5552  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5553  		return true
  5554  	}
  5555  	return false
  5556  }
  5557  func rewriteValue_OpARM64Equal(v *ssa.Value) bool {
  5558  	v_0 := v.Args[0]
  5559  	b := v.Block
  5560  	// match: (Equal (CMPconst [0] z:(AND x y)))
  5561  	// cond: z.Uses == 1
  5562  	// result: (Equal (TST x y))
  5563  	for {
  5564  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5565  			break
  5566  		}
  5567  		z := v_0.Args[0]
  5568  		if z.Op != ssaop.OpARM64AND {
  5569  			break
  5570  		}
  5571  		y := z.Args[1]
  5572  		x := z.Args[0]
  5573  		if !(z.Uses == 1) {
  5574  			break
  5575  		}
  5576  		v.Reset(ssaop.OpARM64Equal)
  5577  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  5578  		v0.AddArg2(x, y)
  5579  		v.AddArg(v0)
  5580  		return true
  5581  	}
  5582  	// match: (Equal (CMPWconst [0] x:(ANDconst [c] y)))
  5583  	// cond: x.Uses == 1
  5584  	// result: (Equal (TSTWconst [int32(c)] y))
  5585  	for {
  5586  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5587  			break
  5588  		}
  5589  		x := v_0.Args[0]
  5590  		if x.Op != ssaop.OpARM64ANDconst {
  5591  			break
  5592  		}
  5593  		c := ssa.AuxIntToInt64(x.AuxInt)
  5594  		y := x.Args[0]
  5595  		if !(x.Uses == 1) {
  5596  			break
  5597  		}
  5598  		v.Reset(ssaop.OpARM64Equal)
  5599  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  5600  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  5601  		v0.AddArg(y)
  5602  		v.AddArg(v0)
  5603  		return true
  5604  	}
  5605  	// match: (Equal (CMPWconst [0] z:(AND x y)))
  5606  	// cond: z.Uses == 1
  5607  	// result: (Equal (TSTW x y))
  5608  	for {
  5609  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5610  			break
  5611  		}
  5612  		z := v_0.Args[0]
  5613  		if z.Op != ssaop.OpARM64AND {
  5614  			break
  5615  		}
  5616  		y := z.Args[1]
  5617  		x := z.Args[0]
  5618  		if !(z.Uses == 1) {
  5619  			break
  5620  		}
  5621  		v.Reset(ssaop.OpARM64Equal)
  5622  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  5623  		v0.AddArg2(x, y)
  5624  		v.AddArg(v0)
  5625  		return true
  5626  	}
  5627  	// match: (Equal (CMPconst [0] x:(ANDconst [c] y)))
  5628  	// cond: x.Uses == 1
  5629  	// result: (Equal (TSTconst [c] y))
  5630  	for {
  5631  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5632  			break
  5633  		}
  5634  		x := v_0.Args[0]
  5635  		if x.Op != ssaop.OpARM64ANDconst {
  5636  			break
  5637  		}
  5638  		c := ssa.AuxIntToInt64(x.AuxInt)
  5639  		y := x.Args[0]
  5640  		if !(x.Uses == 1) {
  5641  			break
  5642  		}
  5643  		v.Reset(ssaop.OpARM64Equal)
  5644  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  5645  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5646  		v0.AddArg(y)
  5647  		v.AddArg(v0)
  5648  		return true
  5649  	}
  5650  	// match: (Equal (CMP x z:(NEG y)))
  5651  	// cond: z.Uses == 1
  5652  	// result: (Equal (CMN x y))
  5653  	for {
  5654  		if v_0.Op != ssaop.OpARM64CMP {
  5655  			break
  5656  		}
  5657  		_ = v_0.Args[1]
  5658  		x := v_0.Args[0]
  5659  		z := v_0.Args[1]
  5660  		if z.Op != ssaop.OpARM64NEG {
  5661  			break
  5662  		}
  5663  		y := z.Args[0]
  5664  		if !(z.Uses == 1) {
  5665  			break
  5666  		}
  5667  		v.Reset(ssaop.OpARM64Equal)
  5668  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  5669  		v0.AddArg2(x, y)
  5670  		v.AddArg(v0)
  5671  		return true
  5672  	}
  5673  	// match: (Equal (CMPW x z:(NEG y)))
  5674  	// cond: z.Uses == 1
  5675  	// result: (Equal (CMNW x y))
  5676  	for {
  5677  		if v_0.Op != ssaop.OpARM64CMPW {
  5678  			break
  5679  		}
  5680  		_ = v_0.Args[1]
  5681  		x := v_0.Args[0]
  5682  		z := v_0.Args[1]
  5683  		if z.Op != ssaop.OpARM64NEG {
  5684  			break
  5685  		}
  5686  		y := z.Args[0]
  5687  		if !(z.Uses == 1) {
  5688  			break
  5689  		}
  5690  		v.Reset(ssaop.OpARM64Equal)
  5691  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  5692  		v0.AddArg2(x, y)
  5693  		v.AddArg(v0)
  5694  		return true
  5695  	}
  5696  	// match: (Equal (CMPconst [0] x:(ADDconst [c] y)))
  5697  	// cond: x.Uses == 1
  5698  	// result: (Equal (CMNconst [c] y))
  5699  	for {
  5700  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5701  			break
  5702  		}
  5703  		x := v_0.Args[0]
  5704  		if x.Op != ssaop.OpARM64ADDconst {
  5705  			break
  5706  		}
  5707  		c := ssa.AuxIntToInt64(x.AuxInt)
  5708  		y := x.Args[0]
  5709  		if !(x.Uses == 1) {
  5710  			break
  5711  		}
  5712  		v.Reset(ssaop.OpARM64Equal)
  5713  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  5714  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5715  		v0.AddArg(y)
  5716  		v.AddArg(v0)
  5717  		return true
  5718  	}
  5719  	// match: (Equal (CMPWconst [0] x:(ADDconst [c] y)))
  5720  	// cond: x.Uses == 1
  5721  	// result: (Equal (CMNWconst [int32(c)] y))
  5722  	for {
  5723  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5724  			break
  5725  		}
  5726  		x := v_0.Args[0]
  5727  		if x.Op != ssaop.OpARM64ADDconst {
  5728  			break
  5729  		}
  5730  		c := ssa.AuxIntToInt64(x.AuxInt)
  5731  		y := x.Args[0]
  5732  		if !(x.Uses == 1) {
  5733  			break
  5734  		}
  5735  		v.Reset(ssaop.OpARM64Equal)
  5736  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  5737  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  5738  		v0.AddArg(y)
  5739  		v.AddArg(v0)
  5740  		return true
  5741  	}
  5742  	// match: (Equal (CMPconst [0] z:(ADD x y)))
  5743  	// cond: z.Uses == 1
  5744  	// result: (Equal (CMN x y))
  5745  	for {
  5746  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5747  			break
  5748  		}
  5749  		z := v_0.Args[0]
  5750  		if z.Op != ssaop.OpARM64ADD {
  5751  			break
  5752  		}
  5753  		y := z.Args[1]
  5754  		x := z.Args[0]
  5755  		if !(z.Uses == 1) {
  5756  			break
  5757  		}
  5758  		v.Reset(ssaop.OpARM64Equal)
  5759  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  5760  		v0.AddArg2(x, y)
  5761  		v.AddArg(v0)
  5762  		return true
  5763  	}
  5764  	// match: (Equal (CMPWconst [0] z:(ADD x y)))
  5765  	// cond: z.Uses == 1
  5766  	// result: (Equal (CMNW x y))
  5767  	for {
  5768  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5769  			break
  5770  		}
  5771  		z := v_0.Args[0]
  5772  		if z.Op != ssaop.OpARM64ADD {
  5773  			break
  5774  		}
  5775  		y := z.Args[1]
  5776  		x := z.Args[0]
  5777  		if !(z.Uses == 1) {
  5778  			break
  5779  		}
  5780  		v.Reset(ssaop.OpARM64Equal)
  5781  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  5782  		v0.AddArg2(x, y)
  5783  		v.AddArg(v0)
  5784  		return true
  5785  	}
  5786  	// match: (Equal (CMPconst [0] z:(MADD a x y)))
  5787  	// cond: z.Uses == 1
  5788  	// result: (Equal (CMN a (MUL <x.Type> x y)))
  5789  	for {
  5790  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5791  			break
  5792  		}
  5793  		z := v_0.Args[0]
  5794  		if z.Op != ssaop.OpARM64MADD {
  5795  			break
  5796  		}
  5797  		y := z.Args[2]
  5798  		a := z.Args[0]
  5799  		x := z.Args[1]
  5800  		if !(z.Uses == 1) {
  5801  			break
  5802  		}
  5803  		v.Reset(ssaop.OpARM64Equal)
  5804  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  5805  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  5806  		v1.AddArg2(x, y)
  5807  		v0.AddArg2(a, v1)
  5808  		v.AddArg(v0)
  5809  		return true
  5810  	}
  5811  	// match: (Equal (CMPWconst [0] z:(MADDW a x y)))
  5812  	// cond: z.Uses == 1
  5813  	// result: (Equal (CMNW a (MULW <x.Type> x y)))
  5814  	for {
  5815  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5816  			break
  5817  		}
  5818  		z := v_0.Args[0]
  5819  		if z.Op != ssaop.OpARM64MADDW {
  5820  			break
  5821  		}
  5822  		y := z.Args[2]
  5823  		a := z.Args[0]
  5824  		x := z.Args[1]
  5825  		if !(z.Uses == 1) {
  5826  			break
  5827  		}
  5828  		v.Reset(ssaop.OpARM64Equal)
  5829  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  5830  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  5831  		v1.AddArg2(x, y)
  5832  		v0.AddArg2(a, v1)
  5833  		v.AddArg(v0)
  5834  		return true
  5835  	}
  5836  	// match: (Equal (CMPconst [0] z:(MSUB a x y)))
  5837  	// cond: z.Uses == 1
  5838  	// result: (Equal (CMP a (MUL <x.Type> x y)))
  5839  	for {
  5840  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5841  			break
  5842  		}
  5843  		z := v_0.Args[0]
  5844  		if z.Op != ssaop.OpARM64MSUB {
  5845  			break
  5846  		}
  5847  		y := z.Args[2]
  5848  		a := z.Args[0]
  5849  		x := z.Args[1]
  5850  		if !(z.Uses == 1) {
  5851  			break
  5852  		}
  5853  		v.Reset(ssaop.OpARM64Equal)
  5854  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
  5855  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  5856  		v1.AddArg2(x, y)
  5857  		v0.AddArg2(a, v1)
  5858  		v.AddArg(v0)
  5859  		return true
  5860  	}
  5861  	// match: (Equal (CMPWconst [0] z:(MSUBW a x y)))
  5862  	// cond: z.Uses == 1
  5863  	// result: (Equal (CMPW a (MULW <x.Type> x y)))
  5864  	for {
  5865  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5866  			break
  5867  		}
  5868  		z := v_0.Args[0]
  5869  		if z.Op != ssaop.OpARM64MSUBW {
  5870  			break
  5871  		}
  5872  		y := z.Args[2]
  5873  		a := z.Args[0]
  5874  		x := z.Args[1]
  5875  		if !(z.Uses == 1) {
  5876  			break
  5877  		}
  5878  		v.Reset(ssaop.OpARM64Equal)
  5879  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
  5880  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  5881  		v1.AddArg2(x, y)
  5882  		v0.AddArg2(a, v1)
  5883  		v.AddArg(v0)
  5884  		return true
  5885  	}
  5886  	// match: (Equal (FlagConstant [fc]))
  5887  	// result: (MOVDconst [ssa.B2i(fc.Eq())])
  5888  	for {
  5889  		if v_0.Op != ssaop.OpARM64FlagConstant {
  5890  			break
  5891  		}
  5892  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  5893  		v.Reset(ssaop.OpARM64MOVDconst)
  5894  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Eq()))
  5895  		return true
  5896  	}
  5897  	// match: (Equal (InvertFlags x))
  5898  	// result: (Equal x)
  5899  	for {
  5900  		if v_0.Op != ssaop.OpARM64InvertFlags {
  5901  			break
  5902  		}
  5903  		x := v_0.Args[0]
  5904  		v.Reset(ssaop.OpARM64Equal)
  5905  		v.AddArg(x)
  5906  		return true
  5907  	}
  5908  	return false
  5909  }
  5910  func rewriteValue_OpARM64FADDD(v *ssa.Value) bool {
  5911  	v_1 := v.Args[1]
  5912  	v_0 := v.Args[0]
  5913  	// match: (FADDD a (FMULD x y))
  5914  	// cond: a.Block.Func.UseFMA(v)
  5915  	// result: (FMADDD a x y)
  5916  	for {
  5917  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5918  			a := v_0
  5919  			if v_1.Op != ssaop.OpARM64FMULD {
  5920  				continue
  5921  			}
  5922  			y := v_1.Args[1]
  5923  			x := v_1.Args[0]
  5924  			if !(a.Block.Func.UseFMA(v)) {
  5925  				continue
  5926  			}
  5927  			v.Reset(ssaop.OpARM64FMADDD)
  5928  			v.AddArg3(a, x, y)
  5929  			return true
  5930  		}
  5931  		break
  5932  	}
  5933  	// match: (FADDD a (FNMULD x y))
  5934  	// cond: a.Block.Func.UseFMA(v)
  5935  	// result: (FMSUBD a x y)
  5936  	for {
  5937  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5938  			a := v_0
  5939  			if v_1.Op != ssaop.OpARM64FNMULD {
  5940  				continue
  5941  			}
  5942  			y := v_1.Args[1]
  5943  			x := v_1.Args[0]
  5944  			if !(a.Block.Func.UseFMA(v)) {
  5945  				continue
  5946  			}
  5947  			v.Reset(ssaop.OpARM64FMSUBD)
  5948  			v.AddArg3(a, x, y)
  5949  			return true
  5950  		}
  5951  		break
  5952  	}
  5953  	return false
  5954  }
  5955  func rewriteValue_OpARM64FADDS(v *ssa.Value) bool {
  5956  	v_1 := v.Args[1]
  5957  	v_0 := v.Args[0]
  5958  	// match: (FADDS a (FMULS x y))
  5959  	// cond: a.Block.Func.UseFMA(v)
  5960  	// result: (FMADDS a x y)
  5961  	for {
  5962  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5963  			a := v_0
  5964  			if v_1.Op != ssaop.OpARM64FMULS {
  5965  				continue
  5966  			}
  5967  			y := v_1.Args[1]
  5968  			x := v_1.Args[0]
  5969  			if !(a.Block.Func.UseFMA(v)) {
  5970  				continue
  5971  			}
  5972  			v.Reset(ssaop.OpARM64FMADDS)
  5973  			v.AddArg3(a, x, y)
  5974  			return true
  5975  		}
  5976  		break
  5977  	}
  5978  	// match: (FADDS a (FNMULS x y))
  5979  	// cond: a.Block.Func.UseFMA(v)
  5980  	// result: (FMSUBS a x y)
  5981  	for {
  5982  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5983  			a := v_0
  5984  			if v_1.Op != ssaop.OpARM64FNMULS {
  5985  				continue
  5986  			}
  5987  			y := v_1.Args[1]
  5988  			x := v_1.Args[0]
  5989  			if !(a.Block.Func.UseFMA(v)) {
  5990  				continue
  5991  			}
  5992  			v.Reset(ssaop.OpARM64FMSUBS)
  5993  			v.AddArg3(a, x, y)
  5994  			return true
  5995  		}
  5996  		break
  5997  	}
  5998  	return false
  5999  }
  6000  func rewriteValue_OpARM64FCMPD(v *ssa.Value) bool {
  6001  	v_1 := v.Args[1]
  6002  	v_0 := v.Args[0]
  6003  	b := v.Block
  6004  	// match: (FCMPD x (FMOVDconst [0]))
  6005  	// result: (FCMPD0 x)
  6006  	for {
  6007  		x := v_0
  6008  		if v_1.Op != ssaop.OpARM64FMOVDconst || ssa.AuxIntToFloat64(v_1.AuxInt) != 0 {
  6009  			break
  6010  		}
  6011  		v.Reset(ssaop.OpARM64FCMPD0)
  6012  		v.AddArg(x)
  6013  		return true
  6014  	}
  6015  	// match: (FCMPD (FMOVDconst [0]) x)
  6016  	// result: (InvertFlags (FCMPD0 x))
  6017  	for {
  6018  		if v_0.Op != ssaop.OpARM64FMOVDconst || ssa.AuxIntToFloat64(v_0.AuxInt) != 0 {
  6019  			break
  6020  		}
  6021  		x := v_1
  6022  		v.Reset(ssaop.OpARM64InvertFlags)
  6023  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD0, types.TypeFlags)
  6024  		v0.AddArg(x)
  6025  		v.AddArg(v0)
  6026  		return true
  6027  	}
  6028  	return false
  6029  }
  6030  func rewriteValue_OpARM64FCMPS(v *ssa.Value) bool {
  6031  	v_1 := v.Args[1]
  6032  	v_0 := v.Args[0]
  6033  	b := v.Block
  6034  	// match: (FCMPS x (FMOVSconst [0]))
  6035  	// result: (FCMPS0 x)
  6036  	for {
  6037  		x := v_0
  6038  		if v_1.Op != ssaop.OpARM64FMOVSconst || ssa.AuxIntToFloat64(v_1.AuxInt) != 0 {
  6039  			break
  6040  		}
  6041  		v.Reset(ssaop.OpARM64FCMPS0)
  6042  		v.AddArg(x)
  6043  		return true
  6044  	}
  6045  	// match: (FCMPS (FMOVSconst [0]) x)
  6046  	// result: (InvertFlags (FCMPS0 x))
  6047  	for {
  6048  		if v_0.Op != ssaop.OpARM64FMOVSconst || ssa.AuxIntToFloat64(v_0.AuxInt) != 0 {
  6049  			break
  6050  		}
  6051  		x := v_1
  6052  		v.Reset(ssaop.OpARM64InvertFlags)
  6053  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS0, types.TypeFlags)
  6054  		v0.AddArg(x)
  6055  		v.AddArg(v0)
  6056  		return true
  6057  	}
  6058  	return false
  6059  }
  6060  func rewriteValue_OpARM64FCSELD(v *ssa.Value) bool {
  6061  	v_2 := v.Args[2]
  6062  	v_1 := v.Args[1]
  6063  	v_0 := v.Args[0]
  6064  	// match: (FCSELD [cc] x y (InvertFlags cmp))
  6065  	// result: (FCSELD [arm64Invert(cc)] x y cmp)
  6066  	for {
  6067  		cc := ssa.AuxIntToOp(v.AuxInt)
  6068  		x := v_0
  6069  		y := v_1
  6070  		if v_2.Op != ssaop.OpARM64InvertFlags {
  6071  			break
  6072  		}
  6073  		cmp := v_2.Args[0]
  6074  		v.Reset(ssaop.OpARM64FCSELD)
  6075  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  6076  		v.AddArg3(x, y, cmp)
  6077  		return true
  6078  	}
  6079  	return false
  6080  }
  6081  func rewriteValue_OpARM64FCSELS(v *ssa.Value) bool {
  6082  	v_2 := v.Args[2]
  6083  	v_1 := v.Args[1]
  6084  	v_0 := v.Args[0]
  6085  	// match: (FCSELS [cc] x y (InvertFlags cmp))
  6086  	// result: (FCSELS [arm64Invert(cc)] x y cmp)
  6087  	for {
  6088  		cc := ssa.AuxIntToOp(v.AuxInt)
  6089  		x := v_0
  6090  		y := v_1
  6091  		if v_2.Op != ssaop.OpARM64InvertFlags {
  6092  			break
  6093  		}
  6094  		cmp := v_2.Args[0]
  6095  		v.Reset(ssaop.OpARM64FCSELS)
  6096  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  6097  		v.AddArg3(x, y, cmp)
  6098  		return true
  6099  	}
  6100  	return false
  6101  }
  6102  func rewriteValue_OpARM64FCVTDS(v *ssa.Value) bool {
  6103  	v_0 := v.Args[0]
  6104  	// match: (FCVTDS (FABSD (FCVTSD x)))
  6105  	// result: (FABSS x)
  6106  	for {
  6107  		if v_0.Op != ssaop.OpARM64FABSD {
  6108  			break
  6109  		}
  6110  		v_0_0 := v_0.Args[0]
  6111  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6112  			break
  6113  		}
  6114  		x := v_0_0.Args[0]
  6115  		v.Reset(ssaop.OpARM64FABSS)
  6116  		v.AddArg(x)
  6117  		return true
  6118  	}
  6119  	// match: (FCVTDS (FSQRTD (FCVTSD x)))
  6120  	// result: (FSQRTS x)
  6121  	for {
  6122  		if v_0.Op != ssaop.OpARM64FSQRTD {
  6123  			break
  6124  		}
  6125  		v_0_0 := v_0.Args[0]
  6126  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6127  			break
  6128  		}
  6129  		x := v_0_0.Args[0]
  6130  		v.Reset(ssaop.OpARM64FSQRTS)
  6131  		v.AddArg(x)
  6132  		return true
  6133  	}
  6134  	// match: (FCVTDS (FRINTPD (FCVTSD x)))
  6135  	// result: (FRINTPS x)
  6136  	for {
  6137  		if v_0.Op != ssaop.OpARM64FRINTPD {
  6138  			break
  6139  		}
  6140  		v_0_0 := v_0.Args[0]
  6141  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6142  			break
  6143  		}
  6144  		x := v_0_0.Args[0]
  6145  		v.Reset(ssaop.OpARM64FRINTPS)
  6146  		v.AddArg(x)
  6147  		return true
  6148  	}
  6149  	// match: (FCVTDS (FRINTMD (FCVTSD x)))
  6150  	// result: (FRINTMS x)
  6151  	for {
  6152  		if v_0.Op != ssaop.OpARM64FRINTMD {
  6153  			break
  6154  		}
  6155  		v_0_0 := v_0.Args[0]
  6156  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6157  			break
  6158  		}
  6159  		x := v_0_0.Args[0]
  6160  		v.Reset(ssaop.OpARM64FRINTMS)
  6161  		v.AddArg(x)
  6162  		return true
  6163  	}
  6164  	// match: (FCVTDS (FRINTAD (FCVTSD x)))
  6165  	// result: (FRINTAS x)
  6166  	for {
  6167  		if v_0.Op != ssaop.OpARM64FRINTAD {
  6168  			break
  6169  		}
  6170  		v_0_0 := v_0.Args[0]
  6171  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6172  			break
  6173  		}
  6174  		x := v_0_0.Args[0]
  6175  		v.Reset(ssaop.OpARM64FRINTAS)
  6176  		v.AddArg(x)
  6177  		return true
  6178  	}
  6179  	// match: (FCVTDS (FRINTND (FCVTSD x)))
  6180  	// result: (FRINTNS x)
  6181  	for {
  6182  		if v_0.Op != ssaop.OpARM64FRINTND {
  6183  			break
  6184  		}
  6185  		v_0_0 := v_0.Args[0]
  6186  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6187  			break
  6188  		}
  6189  		x := v_0_0.Args[0]
  6190  		v.Reset(ssaop.OpARM64FRINTNS)
  6191  		v.AddArg(x)
  6192  		return true
  6193  	}
  6194  	// match: (FCVTDS (FRINTZD (FCVTSD x)))
  6195  	// result: (FRINTZS x)
  6196  	for {
  6197  		if v_0.Op != ssaop.OpARM64FRINTZD {
  6198  			break
  6199  		}
  6200  		v_0_0 := v_0.Args[0]
  6201  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6202  			break
  6203  		}
  6204  		x := v_0_0.Args[0]
  6205  		v.Reset(ssaop.OpARM64FRINTZS)
  6206  		v.AddArg(x)
  6207  		return true
  6208  	}
  6209  	return false
  6210  }
  6211  func rewriteValue_OpARM64FLDPQ(v *ssa.Value) bool {
  6212  	v_1 := v.Args[1]
  6213  	v_0 := v.Args[0]
  6214  	b := v.Block
  6215  	config := b.Func.Config
  6216  	// match: (FLDPQ [off1] {sym} (ADDconst [off2] ptr) mem)
  6217  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6218  	// result: (FLDPQ [off1+int32(off2)] {sym} ptr mem)
  6219  	for {
  6220  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6221  		sym := ssa.AuxToSym(v.Aux)
  6222  		if v_0.Op != ssaop.OpARM64ADDconst {
  6223  			break
  6224  		}
  6225  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6226  		ptr := v_0.Args[0]
  6227  		mem := v_1
  6228  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6229  			break
  6230  		}
  6231  		v.Reset(ssaop.OpARM64FLDPQ)
  6232  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6233  		v.Aux = ssa.SymToAux(sym)
  6234  		v.AddArg2(ptr, mem)
  6235  		return true
  6236  	}
  6237  	// match: (FLDPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6238  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6239  	// result: (FLDPQ [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6240  	for {
  6241  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6242  		sym1 := ssa.AuxToSym(v.Aux)
  6243  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6244  			break
  6245  		}
  6246  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6247  		sym2 := ssa.AuxToSym(v_0.Aux)
  6248  		ptr := v_0.Args[0]
  6249  		mem := v_1
  6250  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6251  			break
  6252  		}
  6253  		v.Reset(ssaop.OpARM64FLDPQ)
  6254  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6255  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6256  		v.AddArg2(ptr, mem)
  6257  		return true
  6258  	}
  6259  	return false
  6260  }
  6261  func rewriteValue_OpARM64FMOVDfpgp(v *ssa.Value) bool {
  6262  	v_0 := v.Args[0]
  6263  	b := v.Block
  6264  	// match: (FMOVDfpgp <t> (Arg [off] {sym}))
  6265  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  6266  	for {
  6267  		t := v.Type
  6268  		if v_0.Op != ssaop.OpArg {
  6269  			break
  6270  		}
  6271  		off := ssa.AuxIntToInt32(v_0.AuxInt)
  6272  		sym := ssa.AuxToSym(v_0.Aux)
  6273  		b = b.Func.Entry
  6274  		v0 := b.NewValue0(v.Pos, ssaop.OpArg, t)
  6275  		v.CopyOf(v0)
  6276  		v0.AuxInt = ssa.Int32ToAuxInt(off)
  6277  		v0.Aux = ssa.SymToAux(sym)
  6278  		return true
  6279  	}
  6280  	return false
  6281  }
  6282  func rewriteValue_OpARM64FMOVDgpfp(v *ssa.Value) bool {
  6283  	v_0 := v.Args[0]
  6284  	b := v.Block
  6285  	// match: (FMOVDgpfp <t> (Arg [off] {sym}))
  6286  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  6287  	for {
  6288  		t := v.Type
  6289  		if v_0.Op != ssaop.OpArg {
  6290  			break
  6291  		}
  6292  		off := ssa.AuxIntToInt32(v_0.AuxInt)
  6293  		sym := ssa.AuxToSym(v_0.Aux)
  6294  		b = b.Func.Entry
  6295  		v0 := b.NewValue0(v.Pos, ssaop.OpArg, t)
  6296  		v.CopyOf(v0)
  6297  		v0.AuxInt = ssa.Int32ToAuxInt(off)
  6298  		v0.Aux = ssa.SymToAux(sym)
  6299  		return true
  6300  	}
  6301  	return false
  6302  }
  6303  func rewriteValue_OpARM64FMOVDload(v *ssa.Value) bool {
  6304  	v_1 := v.Args[1]
  6305  	v_0 := v.Args[0]
  6306  	b := v.Block
  6307  	config := b.Func.Config
  6308  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr val _))
  6309  	// result: (FMOVDgpfp val)
  6310  	for {
  6311  		off := ssa.AuxIntToInt32(v.AuxInt)
  6312  		sym := ssa.AuxToSym(v.Aux)
  6313  		ptr := v_0
  6314  		if v_1.Op != ssaop.OpARM64MOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  6315  			break
  6316  		}
  6317  		val := v_1.Args[1]
  6318  		if ptr != v_1.Args[0] {
  6319  			break
  6320  		}
  6321  		v.Reset(ssaop.OpARM64FMOVDgpfp)
  6322  		v.AddArg(val)
  6323  		return true
  6324  	}
  6325  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  6326  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6327  	// result: (FMOVDload [off1+int32(off2)] {sym} ptr mem)
  6328  	for {
  6329  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6330  		sym := ssa.AuxToSym(v.Aux)
  6331  		if v_0.Op != ssaop.OpARM64ADDconst {
  6332  			break
  6333  		}
  6334  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6335  		ptr := v_0.Args[0]
  6336  		mem := v_1
  6337  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6338  			break
  6339  		}
  6340  		v.Reset(ssaop.OpARM64FMOVDload)
  6341  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6342  		v.Aux = ssa.SymToAux(sym)
  6343  		v.AddArg2(ptr, mem)
  6344  		return true
  6345  	}
  6346  	// match: (FMOVDload [off] {sym} (ADD ptr idx) mem)
  6347  	// cond: off == 0 && sym == nil
  6348  	// result: (FMOVDloadidx ptr idx mem)
  6349  	for {
  6350  		off := ssa.AuxIntToInt32(v.AuxInt)
  6351  		sym := ssa.AuxToSym(v.Aux)
  6352  		if v_0.Op != ssaop.OpARM64ADD {
  6353  			break
  6354  		}
  6355  		idx := v_0.Args[1]
  6356  		ptr := v_0.Args[0]
  6357  		mem := v_1
  6358  		if !(off == 0 && sym == nil) {
  6359  			break
  6360  		}
  6361  		v.Reset(ssaop.OpARM64FMOVDloadidx)
  6362  		v.AddArg3(ptr, idx, mem)
  6363  		return true
  6364  	}
  6365  	// match: (FMOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
  6366  	// cond: off == 0 && sym == nil
  6367  	// result: (FMOVDloadidx8 ptr idx mem)
  6368  	for {
  6369  		off := ssa.AuxIntToInt32(v.AuxInt)
  6370  		sym := ssa.AuxToSym(v.Aux)
  6371  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6372  			break
  6373  		}
  6374  		idx := v_0.Args[1]
  6375  		ptr := v_0.Args[0]
  6376  		mem := v_1
  6377  		if !(off == 0 && sym == nil) {
  6378  			break
  6379  		}
  6380  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6381  		v.AddArg3(ptr, idx, mem)
  6382  		return true
  6383  	}
  6384  	// match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6385  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6386  	// result: (FMOVDload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6387  	for {
  6388  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6389  		sym1 := ssa.AuxToSym(v.Aux)
  6390  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6391  			break
  6392  		}
  6393  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6394  		sym2 := ssa.AuxToSym(v_0.Aux)
  6395  		ptr := v_0.Args[0]
  6396  		mem := v_1
  6397  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6398  			break
  6399  		}
  6400  		v.Reset(ssaop.OpARM64FMOVDload)
  6401  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6402  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6403  		v.AddArg2(ptr, mem)
  6404  		return true
  6405  	}
  6406  	return false
  6407  }
  6408  func rewriteValue_OpARM64FMOVDloadidx(v *ssa.Value) bool {
  6409  	v_2 := v.Args[2]
  6410  	v_1 := v.Args[1]
  6411  	v_0 := v.Args[0]
  6412  	// match: (FMOVDloadidx ptr (MOVDconst [c]) mem)
  6413  	// cond: ssa.Is32Bit(c)
  6414  	// result: (FMOVDload [int32(c)] ptr mem)
  6415  	for {
  6416  		ptr := v_0
  6417  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6418  			break
  6419  		}
  6420  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6421  		mem := v_2
  6422  		if !(ssa.Is32Bit(c)) {
  6423  			break
  6424  		}
  6425  		v.Reset(ssaop.OpARM64FMOVDload)
  6426  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6427  		v.AddArg2(ptr, mem)
  6428  		return true
  6429  	}
  6430  	// match: (FMOVDloadidx (MOVDconst [c]) ptr mem)
  6431  	// cond: ssa.Is32Bit(c)
  6432  	// result: (FMOVDload [int32(c)] ptr mem)
  6433  	for {
  6434  		if v_0.Op != ssaop.OpARM64MOVDconst {
  6435  			break
  6436  		}
  6437  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  6438  		ptr := v_1
  6439  		mem := v_2
  6440  		if !(ssa.Is32Bit(c)) {
  6441  			break
  6442  		}
  6443  		v.Reset(ssaop.OpARM64FMOVDload)
  6444  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6445  		v.AddArg2(ptr, mem)
  6446  		return true
  6447  	}
  6448  	// match: (FMOVDloadidx ptr (SLLconst [3] idx) mem)
  6449  	// result: (FMOVDloadidx8 ptr idx mem)
  6450  	for {
  6451  		ptr := v_0
  6452  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
  6453  			break
  6454  		}
  6455  		idx := v_1.Args[0]
  6456  		mem := v_2
  6457  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6458  		v.AddArg3(ptr, idx, mem)
  6459  		return true
  6460  	}
  6461  	// match: (FMOVDloadidx (SLLconst [3] idx) ptr mem)
  6462  	// result: (FMOVDloadidx8 ptr idx mem)
  6463  	for {
  6464  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6465  			break
  6466  		}
  6467  		idx := v_0.Args[0]
  6468  		ptr := v_1
  6469  		mem := v_2
  6470  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6471  		v.AddArg3(ptr, idx, mem)
  6472  		return true
  6473  	}
  6474  	return false
  6475  }
  6476  func rewriteValue_OpARM64FMOVDloadidx8(v *ssa.Value) bool {
  6477  	v_2 := v.Args[2]
  6478  	v_1 := v.Args[1]
  6479  	v_0 := v.Args[0]
  6480  	// match: (FMOVDloadidx8 ptr (MOVDconst [c]) mem)
  6481  	// cond: ssa.Is32Bit(c<<3)
  6482  	// result: (FMOVDload ptr [int32(c)<<3] mem)
  6483  	for {
  6484  		ptr := v_0
  6485  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6486  			break
  6487  		}
  6488  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6489  		mem := v_2
  6490  		if !(ssa.Is32Bit(c << 3)) {
  6491  			break
  6492  		}
  6493  		v.Reset(ssaop.OpARM64FMOVDload)
  6494  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
  6495  		v.AddArg2(ptr, mem)
  6496  		return true
  6497  	}
  6498  	return false
  6499  }
  6500  func rewriteValue_OpARM64FMOVDstore(v *ssa.Value) bool {
  6501  	v_2 := v.Args[2]
  6502  	v_1 := v.Args[1]
  6503  	v_0 := v.Args[0]
  6504  	b := v.Block
  6505  	config := b.Func.Config
  6506  	// match: (FMOVDstore [off] {sym} ptr (FMOVDgpfp val) mem)
  6507  	// result: (MOVDstore [off] {sym} ptr val mem)
  6508  	for {
  6509  		off := ssa.AuxIntToInt32(v.AuxInt)
  6510  		sym := ssa.AuxToSym(v.Aux)
  6511  		ptr := v_0
  6512  		if v_1.Op != ssaop.OpARM64FMOVDgpfp {
  6513  			break
  6514  		}
  6515  		val := v_1.Args[0]
  6516  		mem := v_2
  6517  		v.Reset(ssaop.OpARM64MOVDstore)
  6518  		v.AuxInt = ssa.Int32ToAuxInt(off)
  6519  		v.Aux = ssa.SymToAux(sym)
  6520  		v.AddArg3(ptr, val, mem)
  6521  		return true
  6522  	}
  6523  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6524  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6525  	// result: (FMOVDstore [off1+int32(off2)] {sym} ptr val mem)
  6526  	for {
  6527  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6528  		sym := ssa.AuxToSym(v.Aux)
  6529  		if v_0.Op != ssaop.OpARM64ADDconst {
  6530  			break
  6531  		}
  6532  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6533  		ptr := v_0.Args[0]
  6534  		val := v_1
  6535  		mem := v_2
  6536  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6537  			break
  6538  		}
  6539  		v.Reset(ssaop.OpARM64FMOVDstore)
  6540  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6541  		v.Aux = ssa.SymToAux(sym)
  6542  		v.AddArg3(ptr, val, mem)
  6543  		return true
  6544  	}
  6545  	// match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem)
  6546  	// cond: off == 0 && sym == nil
  6547  	// result: (FMOVDstoreidx ptr idx val mem)
  6548  	for {
  6549  		off := ssa.AuxIntToInt32(v.AuxInt)
  6550  		sym := ssa.AuxToSym(v.Aux)
  6551  		if v_0.Op != ssaop.OpARM64ADD {
  6552  			break
  6553  		}
  6554  		idx := v_0.Args[1]
  6555  		ptr := v_0.Args[0]
  6556  		val := v_1
  6557  		mem := v_2
  6558  		if !(off == 0 && sym == nil) {
  6559  			break
  6560  		}
  6561  		v.Reset(ssaop.OpARM64FMOVDstoreidx)
  6562  		v.AddArg4(ptr, idx, val, mem)
  6563  		return true
  6564  	}
  6565  	// match: (FMOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
  6566  	// cond: off == 0 && sym == nil
  6567  	// result: (FMOVDstoreidx8 ptr idx val mem)
  6568  	for {
  6569  		off := ssa.AuxIntToInt32(v.AuxInt)
  6570  		sym := ssa.AuxToSym(v.Aux)
  6571  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6572  			break
  6573  		}
  6574  		idx := v_0.Args[1]
  6575  		ptr := v_0.Args[0]
  6576  		val := v_1
  6577  		mem := v_2
  6578  		if !(off == 0 && sym == nil) {
  6579  			break
  6580  		}
  6581  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  6582  		v.AddArg4(ptr, idx, val, mem)
  6583  		return true
  6584  	}
  6585  	// match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  6586  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6587  	// result: (FMOVDstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  6588  	for {
  6589  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6590  		sym1 := ssa.AuxToSym(v.Aux)
  6591  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6592  			break
  6593  		}
  6594  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6595  		sym2 := ssa.AuxToSym(v_0.Aux)
  6596  		ptr := v_0.Args[0]
  6597  		val := v_1
  6598  		mem := v_2
  6599  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6600  			break
  6601  		}
  6602  		v.Reset(ssaop.OpARM64FMOVDstore)
  6603  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6604  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6605  		v.AddArg3(ptr, val, mem)
  6606  		return true
  6607  	}
  6608  	return false
  6609  }
  6610  func rewriteValue_OpARM64FMOVDstoreidx(v *ssa.Value) bool {
  6611  	v_3 := v.Args[3]
  6612  	v_2 := v.Args[2]
  6613  	v_1 := v.Args[1]
  6614  	v_0 := v.Args[0]
  6615  	// match: (FMOVDstoreidx ptr (MOVDconst [c]) val mem)
  6616  	// cond: ssa.Is32Bit(c)
  6617  	// result: (FMOVDstore [int32(c)] ptr val mem)
  6618  	for {
  6619  		ptr := v_0
  6620  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6621  			break
  6622  		}
  6623  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6624  		val := v_2
  6625  		mem := v_3
  6626  		if !(ssa.Is32Bit(c)) {
  6627  			break
  6628  		}
  6629  		v.Reset(ssaop.OpARM64FMOVDstore)
  6630  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6631  		v.AddArg3(ptr, val, mem)
  6632  		return true
  6633  	}
  6634  	// match: (FMOVDstoreidx (MOVDconst [c]) idx val mem)
  6635  	// cond: ssa.Is32Bit(c)
  6636  	// result: (FMOVDstore [int32(c)] idx val mem)
  6637  	for {
  6638  		if v_0.Op != ssaop.OpARM64MOVDconst {
  6639  			break
  6640  		}
  6641  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  6642  		idx := v_1
  6643  		val := v_2
  6644  		mem := v_3
  6645  		if !(ssa.Is32Bit(c)) {
  6646  			break
  6647  		}
  6648  		v.Reset(ssaop.OpARM64FMOVDstore)
  6649  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6650  		v.AddArg3(idx, val, mem)
  6651  		return true
  6652  	}
  6653  	// match: (FMOVDstoreidx ptr (SLLconst [3] idx) val mem)
  6654  	// result: (FMOVDstoreidx8 ptr idx val mem)
  6655  	for {
  6656  		ptr := v_0
  6657  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
  6658  			break
  6659  		}
  6660  		idx := v_1.Args[0]
  6661  		val := v_2
  6662  		mem := v_3
  6663  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  6664  		v.AddArg4(ptr, idx, val, mem)
  6665  		return true
  6666  	}
  6667  	// match: (FMOVDstoreidx (SLLconst [3] idx) ptr val mem)
  6668  	// result: (FMOVDstoreidx8 ptr idx val mem)
  6669  	for {
  6670  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6671  			break
  6672  		}
  6673  		idx := v_0.Args[0]
  6674  		ptr := v_1
  6675  		val := v_2
  6676  		mem := v_3
  6677  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  6678  		v.AddArg4(ptr, idx, val, mem)
  6679  		return true
  6680  	}
  6681  	return false
  6682  }
  6683  func rewriteValue_OpARM64FMOVDstoreidx8(v *ssa.Value) bool {
  6684  	v_3 := v.Args[3]
  6685  	v_2 := v.Args[2]
  6686  	v_1 := v.Args[1]
  6687  	v_0 := v.Args[0]
  6688  	// match: (FMOVDstoreidx8 ptr (MOVDconst [c]) val mem)
  6689  	// cond: ssa.Is32Bit(c<<3)
  6690  	// result: (FMOVDstore [int32(c)<<3] ptr val mem)
  6691  	for {
  6692  		ptr := v_0
  6693  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6694  			break
  6695  		}
  6696  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6697  		val := v_2
  6698  		mem := v_3
  6699  		if !(ssa.Is32Bit(c << 3)) {
  6700  			break
  6701  		}
  6702  		v.Reset(ssaop.OpARM64FMOVDstore)
  6703  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
  6704  		v.AddArg3(ptr, val, mem)
  6705  		return true
  6706  	}
  6707  	return false
  6708  }
  6709  func rewriteValue_OpARM64FMOVQload(v *ssa.Value) bool {
  6710  	v_1 := v.Args[1]
  6711  	v_0 := v.Args[0]
  6712  	b := v.Block
  6713  	config := b.Func.Config
  6714  	// match: (FMOVQload [off1] {sym} (ADDconst [off2] ptr) mem)
  6715  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6716  	// result: (FMOVQload [off1+int32(off2)] {sym} ptr mem)
  6717  	for {
  6718  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6719  		sym := ssa.AuxToSym(v.Aux)
  6720  		if v_0.Op != ssaop.OpARM64ADDconst {
  6721  			break
  6722  		}
  6723  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6724  		ptr := v_0.Args[0]
  6725  		mem := v_1
  6726  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6727  			break
  6728  		}
  6729  		v.Reset(ssaop.OpARM64FMOVQload)
  6730  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6731  		v.Aux = ssa.SymToAux(sym)
  6732  		v.AddArg2(ptr, mem)
  6733  		return true
  6734  	}
  6735  	// match: (FMOVQload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6736  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6737  	// result: (FMOVQload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6738  	for {
  6739  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6740  		sym1 := ssa.AuxToSym(v.Aux)
  6741  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6742  			break
  6743  		}
  6744  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6745  		sym2 := ssa.AuxToSym(v_0.Aux)
  6746  		ptr := v_0.Args[0]
  6747  		mem := v_1
  6748  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6749  			break
  6750  		}
  6751  		v.Reset(ssaop.OpARM64FMOVQload)
  6752  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6753  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6754  		v.AddArg2(ptr, mem)
  6755  		return true
  6756  	}
  6757  	return false
  6758  }
  6759  func rewriteValue_OpARM64FMOVQstore(v *ssa.Value) bool {
  6760  	v_2 := v.Args[2]
  6761  	v_1 := v.Args[1]
  6762  	v_0 := v.Args[0]
  6763  	b := v.Block
  6764  	config := b.Func.Config
  6765  	// match: (FMOVQstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6766  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6767  	// result: (FMOVQstore [off1+int32(off2)] {sym} ptr val mem)
  6768  	for {
  6769  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6770  		sym := ssa.AuxToSym(v.Aux)
  6771  		if v_0.Op != ssaop.OpARM64ADDconst {
  6772  			break
  6773  		}
  6774  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6775  		ptr := v_0.Args[0]
  6776  		val := v_1
  6777  		mem := v_2
  6778  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6779  			break
  6780  		}
  6781  		v.Reset(ssaop.OpARM64FMOVQstore)
  6782  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6783  		v.Aux = ssa.SymToAux(sym)
  6784  		v.AddArg3(ptr, val, mem)
  6785  		return true
  6786  	}
  6787  	// match: (FMOVQstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  6788  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6789  	// result: (FMOVQstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  6790  	for {
  6791  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6792  		sym1 := ssa.AuxToSym(v.Aux)
  6793  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6794  			break
  6795  		}
  6796  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6797  		sym2 := ssa.AuxToSym(v_0.Aux)
  6798  		ptr := v_0.Args[0]
  6799  		val := v_1
  6800  		mem := v_2
  6801  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6802  			break
  6803  		}
  6804  		v.Reset(ssaop.OpARM64FMOVQstore)
  6805  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6806  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6807  		v.AddArg3(ptr, val, mem)
  6808  		return true
  6809  	}
  6810  	return false
  6811  }
  6812  func rewriteValue_OpARM64FMOVSload(v *ssa.Value) bool {
  6813  	v_1 := v.Args[1]
  6814  	v_0 := v.Args[0]
  6815  	b := v.Block
  6816  	config := b.Func.Config
  6817  	// match: (FMOVSload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  6818  	// result: (FMOVSgpfp val)
  6819  	for {
  6820  		off := ssa.AuxIntToInt32(v.AuxInt)
  6821  		sym := ssa.AuxToSym(v.Aux)
  6822  		ptr := v_0
  6823  		if v_1.Op != ssaop.OpARM64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  6824  			break
  6825  		}
  6826  		val := v_1.Args[1]
  6827  		if ptr != v_1.Args[0] {
  6828  			break
  6829  		}
  6830  		v.Reset(ssaop.OpARM64FMOVSgpfp)
  6831  		v.AddArg(val)
  6832  		return true
  6833  	}
  6834  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  6835  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6836  	// result: (FMOVSload [off1+int32(off2)] {sym} ptr mem)
  6837  	for {
  6838  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6839  		sym := ssa.AuxToSym(v.Aux)
  6840  		if v_0.Op != ssaop.OpARM64ADDconst {
  6841  			break
  6842  		}
  6843  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6844  		ptr := v_0.Args[0]
  6845  		mem := v_1
  6846  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6847  			break
  6848  		}
  6849  		v.Reset(ssaop.OpARM64FMOVSload)
  6850  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6851  		v.Aux = ssa.SymToAux(sym)
  6852  		v.AddArg2(ptr, mem)
  6853  		return true
  6854  	}
  6855  	// match: (FMOVSload [off] {sym} (ADD ptr idx) mem)
  6856  	// cond: off == 0 && sym == nil
  6857  	// result: (FMOVSloadidx ptr idx mem)
  6858  	for {
  6859  		off := ssa.AuxIntToInt32(v.AuxInt)
  6860  		sym := ssa.AuxToSym(v.Aux)
  6861  		if v_0.Op != ssaop.OpARM64ADD {
  6862  			break
  6863  		}
  6864  		idx := v_0.Args[1]
  6865  		ptr := v_0.Args[0]
  6866  		mem := v_1
  6867  		if !(off == 0 && sym == nil) {
  6868  			break
  6869  		}
  6870  		v.Reset(ssaop.OpARM64FMOVSloadidx)
  6871  		v.AddArg3(ptr, idx, mem)
  6872  		return true
  6873  	}
  6874  	// match: (FMOVSload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
  6875  	// cond: off == 0 && sym == nil
  6876  	// result: (FMOVSloadidx4 ptr idx mem)
  6877  	for {
  6878  		off := ssa.AuxIntToInt32(v.AuxInt)
  6879  		sym := ssa.AuxToSym(v.Aux)
  6880  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  6881  			break
  6882  		}
  6883  		idx := v_0.Args[1]
  6884  		ptr := v_0.Args[0]
  6885  		mem := v_1
  6886  		if !(off == 0 && sym == nil) {
  6887  			break
  6888  		}
  6889  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  6890  		v.AddArg3(ptr, idx, mem)
  6891  		return true
  6892  	}
  6893  	// match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6894  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6895  	// result: (FMOVSload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6896  	for {
  6897  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6898  		sym1 := ssa.AuxToSym(v.Aux)
  6899  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6900  			break
  6901  		}
  6902  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6903  		sym2 := ssa.AuxToSym(v_0.Aux)
  6904  		ptr := v_0.Args[0]
  6905  		mem := v_1
  6906  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6907  			break
  6908  		}
  6909  		v.Reset(ssaop.OpARM64FMOVSload)
  6910  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6911  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6912  		v.AddArg2(ptr, mem)
  6913  		return true
  6914  	}
  6915  	return false
  6916  }
  6917  func rewriteValue_OpARM64FMOVSloadidx(v *ssa.Value) bool {
  6918  	v_2 := v.Args[2]
  6919  	v_1 := v.Args[1]
  6920  	v_0 := v.Args[0]
  6921  	// match: (FMOVSloadidx ptr (MOVDconst [c]) mem)
  6922  	// cond: ssa.Is32Bit(c)
  6923  	// result: (FMOVSload [int32(c)] ptr mem)
  6924  	for {
  6925  		ptr := v_0
  6926  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6927  			break
  6928  		}
  6929  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6930  		mem := v_2
  6931  		if !(ssa.Is32Bit(c)) {
  6932  			break
  6933  		}
  6934  		v.Reset(ssaop.OpARM64FMOVSload)
  6935  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6936  		v.AddArg2(ptr, mem)
  6937  		return true
  6938  	}
  6939  	// match: (FMOVSloadidx (MOVDconst [c]) ptr mem)
  6940  	// cond: ssa.Is32Bit(c)
  6941  	// result: (FMOVSload [int32(c)] ptr mem)
  6942  	for {
  6943  		if v_0.Op != ssaop.OpARM64MOVDconst {
  6944  			break
  6945  		}
  6946  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  6947  		ptr := v_1
  6948  		mem := v_2
  6949  		if !(ssa.Is32Bit(c)) {
  6950  			break
  6951  		}
  6952  		v.Reset(ssaop.OpARM64FMOVSload)
  6953  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6954  		v.AddArg2(ptr, mem)
  6955  		return true
  6956  	}
  6957  	// match: (FMOVSloadidx ptr (SLLconst [2] idx) mem)
  6958  	// result: (FMOVSloadidx4 ptr idx mem)
  6959  	for {
  6960  		ptr := v_0
  6961  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
  6962  			break
  6963  		}
  6964  		idx := v_1.Args[0]
  6965  		mem := v_2
  6966  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  6967  		v.AddArg3(ptr, idx, mem)
  6968  		return true
  6969  	}
  6970  	// match: (FMOVSloadidx (SLLconst [2] idx) ptr mem)
  6971  	// result: (FMOVSloadidx4 ptr idx mem)
  6972  	for {
  6973  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  6974  			break
  6975  		}
  6976  		idx := v_0.Args[0]
  6977  		ptr := v_1
  6978  		mem := v_2
  6979  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  6980  		v.AddArg3(ptr, idx, mem)
  6981  		return true
  6982  	}
  6983  	return false
  6984  }
  6985  func rewriteValue_OpARM64FMOVSloadidx4(v *ssa.Value) bool {
  6986  	v_2 := v.Args[2]
  6987  	v_1 := v.Args[1]
  6988  	v_0 := v.Args[0]
  6989  	// match: (FMOVSloadidx4 ptr (MOVDconst [c]) mem)
  6990  	// cond: ssa.Is32Bit(c<<2)
  6991  	// result: (FMOVSload ptr [int32(c)<<2] mem)
  6992  	for {
  6993  		ptr := v_0
  6994  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6995  			break
  6996  		}
  6997  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6998  		mem := v_2
  6999  		if !(ssa.Is32Bit(c << 2)) {
  7000  			break
  7001  		}
  7002  		v.Reset(ssaop.OpARM64FMOVSload)
  7003  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
  7004  		v.AddArg2(ptr, mem)
  7005  		return true
  7006  	}
  7007  	return false
  7008  }
  7009  func rewriteValue_OpARM64FMOVSstore(v *ssa.Value) bool {
  7010  	v_2 := v.Args[2]
  7011  	v_1 := v.Args[1]
  7012  	v_0 := v.Args[0]
  7013  	b := v.Block
  7014  	config := b.Func.Config
  7015  	// match: (FMOVSstore [off] {sym} ptr (FMOVSgpfp val) mem)
  7016  	// result: (MOVWstore [off] {sym} ptr val mem)
  7017  	for {
  7018  		off := ssa.AuxIntToInt32(v.AuxInt)
  7019  		sym := ssa.AuxToSym(v.Aux)
  7020  		ptr := v_0
  7021  		if v_1.Op != ssaop.OpARM64FMOVSgpfp {
  7022  			break
  7023  		}
  7024  		val := v_1.Args[0]
  7025  		mem := v_2
  7026  		v.Reset(ssaop.OpARM64MOVWstore)
  7027  		v.AuxInt = ssa.Int32ToAuxInt(off)
  7028  		v.Aux = ssa.SymToAux(sym)
  7029  		v.AddArg3(ptr, val, mem)
  7030  		return true
  7031  	}
  7032  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7033  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7034  	// result: (FMOVSstore [off1+int32(off2)] {sym} ptr val mem)
  7035  	for {
  7036  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7037  		sym := ssa.AuxToSym(v.Aux)
  7038  		if v_0.Op != ssaop.OpARM64ADDconst {
  7039  			break
  7040  		}
  7041  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7042  		ptr := v_0.Args[0]
  7043  		val := v_1
  7044  		mem := v_2
  7045  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7046  			break
  7047  		}
  7048  		v.Reset(ssaop.OpARM64FMOVSstore)
  7049  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7050  		v.Aux = ssa.SymToAux(sym)
  7051  		v.AddArg3(ptr, val, mem)
  7052  		return true
  7053  	}
  7054  	// match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem)
  7055  	// cond: off == 0 && sym == nil
  7056  	// result: (FMOVSstoreidx ptr idx val mem)
  7057  	for {
  7058  		off := ssa.AuxIntToInt32(v.AuxInt)
  7059  		sym := ssa.AuxToSym(v.Aux)
  7060  		if v_0.Op != ssaop.OpARM64ADD {
  7061  			break
  7062  		}
  7063  		idx := v_0.Args[1]
  7064  		ptr := v_0.Args[0]
  7065  		val := v_1
  7066  		mem := v_2
  7067  		if !(off == 0 && sym == nil) {
  7068  			break
  7069  		}
  7070  		v.Reset(ssaop.OpARM64FMOVSstoreidx)
  7071  		v.AddArg4(ptr, idx, val, mem)
  7072  		return true
  7073  	}
  7074  	// match: (FMOVSstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
  7075  	// cond: off == 0 && sym == nil
  7076  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7077  	for {
  7078  		off := ssa.AuxIntToInt32(v.AuxInt)
  7079  		sym := ssa.AuxToSym(v.Aux)
  7080  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7081  			break
  7082  		}
  7083  		idx := v_0.Args[1]
  7084  		ptr := v_0.Args[0]
  7085  		val := v_1
  7086  		mem := v_2
  7087  		if !(off == 0 && sym == nil) {
  7088  			break
  7089  		}
  7090  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7091  		v.AddArg4(ptr, idx, val, mem)
  7092  		return true
  7093  	}
  7094  	// match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  7095  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7096  	// result: (FMOVSstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  7097  	for {
  7098  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7099  		sym1 := ssa.AuxToSym(v.Aux)
  7100  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7101  			break
  7102  		}
  7103  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7104  		sym2 := ssa.AuxToSym(v_0.Aux)
  7105  		ptr := v_0.Args[0]
  7106  		val := v_1
  7107  		mem := v_2
  7108  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7109  			break
  7110  		}
  7111  		v.Reset(ssaop.OpARM64FMOVSstore)
  7112  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7113  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7114  		v.AddArg3(ptr, val, mem)
  7115  		return true
  7116  	}
  7117  	return false
  7118  }
  7119  func rewriteValue_OpARM64FMOVSstoreidx(v *ssa.Value) bool {
  7120  	v_3 := v.Args[3]
  7121  	v_2 := v.Args[2]
  7122  	v_1 := v.Args[1]
  7123  	v_0 := v.Args[0]
  7124  	// match: (FMOVSstoreidx ptr (MOVDconst [c]) val mem)
  7125  	// cond: ssa.Is32Bit(c)
  7126  	// result: (FMOVSstore [int32(c)] ptr val mem)
  7127  	for {
  7128  		ptr := v_0
  7129  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7130  			break
  7131  		}
  7132  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7133  		val := v_2
  7134  		mem := v_3
  7135  		if !(ssa.Is32Bit(c)) {
  7136  			break
  7137  		}
  7138  		v.Reset(ssaop.OpARM64FMOVSstore)
  7139  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7140  		v.AddArg3(ptr, val, mem)
  7141  		return true
  7142  	}
  7143  	// match: (FMOVSstoreidx (MOVDconst [c]) idx val mem)
  7144  	// cond: ssa.Is32Bit(c)
  7145  	// result: (FMOVSstore [int32(c)] idx val mem)
  7146  	for {
  7147  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7148  			break
  7149  		}
  7150  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7151  		idx := v_1
  7152  		val := v_2
  7153  		mem := v_3
  7154  		if !(ssa.Is32Bit(c)) {
  7155  			break
  7156  		}
  7157  		v.Reset(ssaop.OpARM64FMOVSstore)
  7158  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7159  		v.AddArg3(idx, val, mem)
  7160  		return true
  7161  	}
  7162  	// match: (FMOVSstoreidx ptr (SLLconst [2] idx) val mem)
  7163  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7164  	for {
  7165  		ptr := v_0
  7166  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
  7167  			break
  7168  		}
  7169  		idx := v_1.Args[0]
  7170  		val := v_2
  7171  		mem := v_3
  7172  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7173  		v.AddArg4(ptr, idx, val, mem)
  7174  		return true
  7175  	}
  7176  	// match: (FMOVSstoreidx (SLLconst [2] idx) ptr val mem)
  7177  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7178  	for {
  7179  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7180  			break
  7181  		}
  7182  		idx := v_0.Args[0]
  7183  		ptr := v_1
  7184  		val := v_2
  7185  		mem := v_3
  7186  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7187  		v.AddArg4(ptr, idx, val, mem)
  7188  		return true
  7189  	}
  7190  	return false
  7191  }
  7192  func rewriteValue_OpARM64FMOVSstoreidx4(v *ssa.Value) bool {
  7193  	v_3 := v.Args[3]
  7194  	v_2 := v.Args[2]
  7195  	v_1 := v.Args[1]
  7196  	v_0 := v.Args[0]
  7197  	// match: (FMOVSstoreidx4 ptr (MOVDconst [c]) val mem)
  7198  	// cond: ssa.Is32Bit(c<<2)
  7199  	// result: (FMOVSstore [int32(c)<<2] ptr val mem)
  7200  	for {
  7201  		ptr := v_0
  7202  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7203  			break
  7204  		}
  7205  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7206  		val := v_2
  7207  		mem := v_3
  7208  		if !(ssa.Is32Bit(c << 2)) {
  7209  			break
  7210  		}
  7211  		v.Reset(ssaop.OpARM64FMOVSstore)
  7212  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
  7213  		v.AddArg3(ptr, val, mem)
  7214  		return true
  7215  	}
  7216  	return false
  7217  }
  7218  func rewriteValue_OpARM64FMULD(v *ssa.Value) bool {
  7219  	v_1 := v.Args[1]
  7220  	v_0 := v.Args[0]
  7221  	// match: (FMULD (FNEGD x) y)
  7222  	// result: (FNMULD x y)
  7223  	for {
  7224  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7225  			if v_0.Op != ssaop.OpARM64FNEGD {
  7226  				continue
  7227  			}
  7228  			x := v_0.Args[0]
  7229  			y := v_1
  7230  			v.Reset(ssaop.OpARM64FNMULD)
  7231  			v.AddArg2(x, y)
  7232  			return true
  7233  		}
  7234  		break
  7235  	}
  7236  	return false
  7237  }
  7238  func rewriteValue_OpARM64FMULS(v *ssa.Value) bool {
  7239  	v_1 := v.Args[1]
  7240  	v_0 := v.Args[0]
  7241  	// match: (FMULS (FNEGS x) y)
  7242  	// result: (FNMULS x y)
  7243  	for {
  7244  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7245  			if v_0.Op != ssaop.OpARM64FNEGS {
  7246  				continue
  7247  			}
  7248  			x := v_0.Args[0]
  7249  			y := v_1
  7250  			v.Reset(ssaop.OpARM64FNMULS)
  7251  			v.AddArg2(x, y)
  7252  			return true
  7253  		}
  7254  		break
  7255  	}
  7256  	return false
  7257  }
  7258  func rewriteValue_OpARM64FNEGD(v *ssa.Value) bool {
  7259  	v_0 := v.Args[0]
  7260  	// match: (FNEGD (FMULD x y))
  7261  	// result: (FNMULD x y)
  7262  	for {
  7263  		if v_0.Op != ssaop.OpARM64FMULD {
  7264  			break
  7265  		}
  7266  		y := v_0.Args[1]
  7267  		x := v_0.Args[0]
  7268  		v.Reset(ssaop.OpARM64FNMULD)
  7269  		v.AddArg2(x, y)
  7270  		return true
  7271  	}
  7272  	// match: (FNEGD (FNMULD x y))
  7273  	// result: (FMULD x y)
  7274  	for {
  7275  		if v_0.Op != ssaop.OpARM64FNMULD {
  7276  			break
  7277  		}
  7278  		y := v_0.Args[1]
  7279  		x := v_0.Args[0]
  7280  		v.Reset(ssaop.OpARM64FMULD)
  7281  		v.AddArg2(x, y)
  7282  		return true
  7283  	}
  7284  	return false
  7285  }
  7286  func rewriteValue_OpARM64FNEGS(v *ssa.Value) bool {
  7287  	v_0 := v.Args[0]
  7288  	// match: (FNEGS (FMULS x y))
  7289  	// result: (FNMULS x y)
  7290  	for {
  7291  		if v_0.Op != ssaop.OpARM64FMULS {
  7292  			break
  7293  		}
  7294  		y := v_0.Args[1]
  7295  		x := v_0.Args[0]
  7296  		v.Reset(ssaop.OpARM64FNMULS)
  7297  		v.AddArg2(x, y)
  7298  		return true
  7299  	}
  7300  	// match: (FNEGS (FNMULS x y))
  7301  	// result: (FMULS x y)
  7302  	for {
  7303  		if v_0.Op != ssaop.OpARM64FNMULS {
  7304  			break
  7305  		}
  7306  		y := v_0.Args[1]
  7307  		x := v_0.Args[0]
  7308  		v.Reset(ssaop.OpARM64FMULS)
  7309  		v.AddArg2(x, y)
  7310  		return true
  7311  	}
  7312  	return false
  7313  }
  7314  func rewriteValue_OpARM64FNMULD(v *ssa.Value) bool {
  7315  	v_1 := v.Args[1]
  7316  	v_0 := v.Args[0]
  7317  	// match: (FNMULD (FNEGD x) y)
  7318  	// result: (FMULD x y)
  7319  	for {
  7320  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7321  			if v_0.Op != ssaop.OpARM64FNEGD {
  7322  				continue
  7323  			}
  7324  			x := v_0.Args[0]
  7325  			y := v_1
  7326  			v.Reset(ssaop.OpARM64FMULD)
  7327  			v.AddArg2(x, y)
  7328  			return true
  7329  		}
  7330  		break
  7331  	}
  7332  	return false
  7333  }
  7334  func rewriteValue_OpARM64FNMULS(v *ssa.Value) bool {
  7335  	v_1 := v.Args[1]
  7336  	v_0 := v.Args[0]
  7337  	// match: (FNMULS (FNEGS x) y)
  7338  	// result: (FMULS x y)
  7339  	for {
  7340  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7341  			if v_0.Op != ssaop.OpARM64FNEGS {
  7342  				continue
  7343  			}
  7344  			x := v_0.Args[0]
  7345  			y := v_1
  7346  			v.Reset(ssaop.OpARM64FMULS)
  7347  			v.AddArg2(x, y)
  7348  			return true
  7349  		}
  7350  		break
  7351  	}
  7352  	return false
  7353  }
  7354  func rewriteValue_OpARM64FSTPQ(v *ssa.Value) bool {
  7355  	v_3 := v.Args[3]
  7356  	v_2 := v.Args[2]
  7357  	v_1 := v.Args[1]
  7358  	v_0 := v.Args[0]
  7359  	b := v.Block
  7360  	config := b.Func.Config
  7361  	// match: (FSTPQ [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
  7362  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7363  	// result: (FSTPQ [off1+int32(off2)] {sym} ptr val1 val2 mem)
  7364  	for {
  7365  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7366  		sym := ssa.AuxToSym(v.Aux)
  7367  		if v_0.Op != ssaop.OpARM64ADDconst {
  7368  			break
  7369  		}
  7370  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7371  		ptr := v_0.Args[0]
  7372  		val1 := v_1
  7373  		val2 := v_2
  7374  		mem := v_3
  7375  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7376  			break
  7377  		}
  7378  		v.Reset(ssaop.OpARM64FSTPQ)
  7379  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7380  		v.Aux = ssa.SymToAux(sym)
  7381  		v.AddArg4(ptr, val1, val2, mem)
  7382  		return true
  7383  	}
  7384  	// match: (FSTPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
  7385  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7386  	// result: (FSTPQ [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val1 val2 mem)
  7387  	for {
  7388  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7389  		sym1 := ssa.AuxToSym(v.Aux)
  7390  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7391  			break
  7392  		}
  7393  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7394  		sym2 := ssa.AuxToSym(v_0.Aux)
  7395  		ptr := v_0.Args[0]
  7396  		val1 := v_1
  7397  		val2 := v_2
  7398  		mem := v_3
  7399  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7400  			break
  7401  		}
  7402  		v.Reset(ssaop.OpARM64FSTPQ)
  7403  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7404  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7405  		v.AddArg4(ptr, val1, val2, mem)
  7406  		return true
  7407  	}
  7408  	return false
  7409  }
  7410  func rewriteValue_OpARM64FSUBD(v *ssa.Value) bool {
  7411  	v_1 := v.Args[1]
  7412  	v_0 := v.Args[0]
  7413  	// match: (FSUBD a (FMULD x y))
  7414  	// cond: a.Block.Func.UseFMA(v)
  7415  	// result: (FMSUBD a x y)
  7416  	for {
  7417  		a := v_0
  7418  		if v_1.Op != ssaop.OpARM64FMULD {
  7419  			break
  7420  		}
  7421  		y := v_1.Args[1]
  7422  		x := v_1.Args[0]
  7423  		if !(a.Block.Func.UseFMA(v)) {
  7424  			break
  7425  		}
  7426  		v.Reset(ssaop.OpARM64FMSUBD)
  7427  		v.AddArg3(a, x, y)
  7428  		return true
  7429  	}
  7430  	// match: (FSUBD (FMULD x y) a)
  7431  	// cond: a.Block.Func.UseFMA(v)
  7432  	// result: (FNMSUBD a x y)
  7433  	for {
  7434  		if v_0.Op != ssaop.OpARM64FMULD {
  7435  			break
  7436  		}
  7437  		y := v_0.Args[1]
  7438  		x := v_0.Args[0]
  7439  		a := v_1
  7440  		if !(a.Block.Func.UseFMA(v)) {
  7441  			break
  7442  		}
  7443  		v.Reset(ssaop.OpARM64FNMSUBD)
  7444  		v.AddArg3(a, x, y)
  7445  		return true
  7446  	}
  7447  	// match: (FSUBD a (FNMULD x y))
  7448  	// cond: a.Block.Func.UseFMA(v)
  7449  	// result: (FMADDD a x y)
  7450  	for {
  7451  		a := v_0
  7452  		if v_1.Op != ssaop.OpARM64FNMULD {
  7453  			break
  7454  		}
  7455  		y := v_1.Args[1]
  7456  		x := v_1.Args[0]
  7457  		if !(a.Block.Func.UseFMA(v)) {
  7458  			break
  7459  		}
  7460  		v.Reset(ssaop.OpARM64FMADDD)
  7461  		v.AddArg3(a, x, y)
  7462  		return true
  7463  	}
  7464  	// match: (FSUBD (FNMULD x y) a)
  7465  	// cond: a.Block.Func.UseFMA(v)
  7466  	// result: (FNMADDD a x y)
  7467  	for {
  7468  		if v_0.Op != ssaop.OpARM64FNMULD {
  7469  			break
  7470  		}
  7471  		y := v_0.Args[1]
  7472  		x := v_0.Args[0]
  7473  		a := v_1
  7474  		if !(a.Block.Func.UseFMA(v)) {
  7475  			break
  7476  		}
  7477  		v.Reset(ssaop.OpARM64FNMADDD)
  7478  		v.AddArg3(a, x, y)
  7479  		return true
  7480  	}
  7481  	return false
  7482  }
  7483  func rewriteValue_OpARM64FSUBS(v *ssa.Value) bool {
  7484  	v_1 := v.Args[1]
  7485  	v_0 := v.Args[0]
  7486  	// match: (FSUBS a (FMULS x y))
  7487  	// cond: a.Block.Func.UseFMA(v)
  7488  	// result: (FMSUBS a x y)
  7489  	for {
  7490  		a := v_0
  7491  		if v_1.Op != ssaop.OpARM64FMULS {
  7492  			break
  7493  		}
  7494  		y := v_1.Args[1]
  7495  		x := v_1.Args[0]
  7496  		if !(a.Block.Func.UseFMA(v)) {
  7497  			break
  7498  		}
  7499  		v.Reset(ssaop.OpARM64FMSUBS)
  7500  		v.AddArg3(a, x, y)
  7501  		return true
  7502  	}
  7503  	// match: (FSUBS (FMULS x y) a)
  7504  	// cond: a.Block.Func.UseFMA(v)
  7505  	// result: (FNMSUBS a x y)
  7506  	for {
  7507  		if v_0.Op != ssaop.OpARM64FMULS {
  7508  			break
  7509  		}
  7510  		y := v_0.Args[1]
  7511  		x := v_0.Args[0]
  7512  		a := v_1
  7513  		if !(a.Block.Func.UseFMA(v)) {
  7514  			break
  7515  		}
  7516  		v.Reset(ssaop.OpARM64FNMSUBS)
  7517  		v.AddArg3(a, x, y)
  7518  		return true
  7519  	}
  7520  	// match: (FSUBS a (FNMULS x y))
  7521  	// cond: a.Block.Func.UseFMA(v)
  7522  	// result: (FMADDS a x y)
  7523  	for {
  7524  		a := v_0
  7525  		if v_1.Op != ssaop.OpARM64FNMULS {
  7526  			break
  7527  		}
  7528  		y := v_1.Args[1]
  7529  		x := v_1.Args[0]
  7530  		if !(a.Block.Func.UseFMA(v)) {
  7531  			break
  7532  		}
  7533  		v.Reset(ssaop.OpARM64FMADDS)
  7534  		v.AddArg3(a, x, y)
  7535  		return true
  7536  	}
  7537  	// match: (FSUBS (FNMULS x y) a)
  7538  	// cond: a.Block.Func.UseFMA(v)
  7539  	// result: (FNMADDS a x y)
  7540  	for {
  7541  		if v_0.Op != ssaop.OpARM64FNMULS {
  7542  			break
  7543  		}
  7544  		y := v_0.Args[1]
  7545  		x := v_0.Args[0]
  7546  		a := v_1
  7547  		if !(a.Block.Func.UseFMA(v)) {
  7548  			break
  7549  		}
  7550  		v.Reset(ssaop.OpARM64FNMADDS)
  7551  		v.AddArg3(a, x, y)
  7552  		return true
  7553  	}
  7554  	return false
  7555  }
  7556  func rewriteValue_OpARM64GreaterEqual(v *ssa.Value) bool {
  7557  	v_0 := v.Args[0]
  7558  	b := v.Block
  7559  	// match: (GreaterEqual (CMPconst [0] z:(AND x y)))
  7560  	// cond: z.Uses == 1
  7561  	// result: (GreaterEqual (TST x y))
  7562  	for {
  7563  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7564  			break
  7565  		}
  7566  		z := v_0.Args[0]
  7567  		if z.Op != ssaop.OpARM64AND {
  7568  			break
  7569  		}
  7570  		y := z.Args[1]
  7571  		x := z.Args[0]
  7572  		if !(z.Uses == 1) {
  7573  			break
  7574  		}
  7575  		v.Reset(ssaop.OpARM64GreaterEqual)
  7576  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  7577  		v0.AddArg2(x, y)
  7578  		v.AddArg(v0)
  7579  		return true
  7580  	}
  7581  	// match: (GreaterEqual (CMPWconst [0] x:(ANDconst [c] y)))
  7582  	// cond: x.Uses == 1
  7583  	// result: (GreaterEqual (TSTWconst [int32(c)] y))
  7584  	for {
  7585  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7586  			break
  7587  		}
  7588  		x := v_0.Args[0]
  7589  		if x.Op != ssaop.OpARM64ANDconst {
  7590  			break
  7591  		}
  7592  		c := ssa.AuxIntToInt64(x.AuxInt)
  7593  		y := x.Args[0]
  7594  		if !(x.Uses == 1) {
  7595  			break
  7596  		}
  7597  		v.Reset(ssaop.OpARM64GreaterEqual)
  7598  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  7599  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7600  		v0.AddArg(y)
  7601  		v.AddArg(v0)
  7602  		return true
  7603  	}
  7604  	// match: (GreaterEqual (CMPWconst [0] z:(AND x y)))
  7605  	// cond: z.Uses == 1
  7606  	// result: (GreaterEqual (TSTW x y))
  7607  	for {
  7608  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7609  			break
  7610  		}
  7611  		z := v_0.Args[0]
  7612  		if z.Op != ssaop.OpARM64AND {
  7613  			break
  7614  		}
  7615  		y := z.Args[1]
  7616  		x := z.Args[0]
  7617  		if !(z.Uses == 1) {
  7618  			break
  7619  		}
  7620  		v.Reset(ssaop.OpARM64GreaterEqual)
  7621  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  7622  		v0.AddArg2(x, y)
  7623  		v.AddArg(v0)
  7624  		return true
  7625  	}
  7626  	// match: (GreaterEqual (CMPconst [0] x:(ANDconst [c] y)))
  7627  	// cond: x.Uses == 1
  7628  	// result: (GreaterEqual (TSTconst [c] y))
  7629  	for {
  7630  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7631  			break
  7632  		}
  7633  		x := v_0.Args[0]
  7634  		if x.Op != ssaop.OpARM64ANDconst {
  7635  			break
  7636  		}
  7637  		c := ssa.AuxIntToInt64(x.AuxInt)
  7638  		y := x.Args[0]
  7639  		if !(x.Uses == 1) {
  7640  			break
  7641  		}
  7642  		v.Reset(ssaop.OpARM64GreaterEqual)
  7643  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  7644  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  7645  		v0.AddArg(y)
  7646  		v.AddArg(v0)
  7647  		return true
  7648  	}
  7649  	// match: (GreaterEqual (CMPconst [0] x:(ADDconst [c] y)))
  7650  	// cond: x.Uses == 1
  7651  	// result: (GreaterEqualNoov (CMNconst [c] y))
  7652  	for {
  7653  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7654  			break
  7655  		}
  7656  		x := v_0.Args[0]
  7657  		if x.Op != ssaop.OpARM64ADDconst {
  7658  			break
  7659  		}
  7660  		c := ssa.AuxIntToInt64(x.AuxInt)
  7661  		y := x.Args[0]
  7662  		if !(x.Uses == 1) {
  7663  			break
  7664  		}
  7665  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7666  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  7667  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  7668  		v0.AddArg(y)
  7669  		v.AddArg(v0)
  7670  		return true
  7671  	}
  7672  	// match: (GreaterEqual (CMPWconst [0] x:(ADDconst [c] y)))
  7673  	// cond: x.Uses == 1
  7674  	// result: (GreaterEqualNoov (CMNWconst [int32(c)] y))
  7675  	for {
  7676  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7677  			break
  7678  		}
  7679  		x := v_0.Args[0]
  7680  		if x.Op != ssaop.OpARM64ADDconst {
  7681  			break
  7682  		}
  7683  		c := ssa.AuxIntToInt64(x.AuxInt)
  7684  		y := x.Args[0]
  7685  		if !(x.Uses == 1) {
  7686  			break
  7687  		}
  7688  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7689  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  7690  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7691  		v0.AddArg(y)
  7692  		v.AddArg(v0)
  7693  		return true
  7694  	}
  7695  	// match: (GreaterEqual (CMPconst [0] z:(ADD x y)))
  7696  	// cond: z.Uses == 1
  7697  	// result: (GreaterEqualNoov (CMN x y))
  7698  	for {
  7699  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7700  			break
  7701  		}
  7702  		z := v_0.Args[0]
  7703  		if z.Op != ssaop.OpARM64ADD {
  7704  			break
  7705  		}
  7706  		y := z.Args[1]
  7707  		x := z.Args[0]
  7708  		if !(z.Uses == 1) {
  7709  			break
  7710  		}
  7711  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7712  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  7713  		v0.AddArg2(x, y)
  7714  		v.AddArg(v0)
  7715  		return true
  7716  	}
  7717  	// match: (GreaterEqual (CMPWconst [0] z:(ADD x y)))
  7718  	// cond: z.Uses == 1
  7719  	// result: (GreaterEqualNoov (CMNW x y))
  7720  	for {
  7721  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7722  			break
  7723  		}
  7724  		z := v_0.Args[0]
  7725  		if z.Op != ssaop.OpARM64ADD {
  7726  			break
  7727  		}
  7728  		y := z.Args[1]
  7729  		x := z.Args[0]
  7730  		if !(z.Uses == 1) {
  7731  			break
  7732  		}
  7733  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7734  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  7735  		v0.AddArg2(x, y)
  7736  		v.AddArg(v0)
  7737  		return true
  7738  	}
  7739  	// match: (GreaterEqual (CMPconst [0] z:(MADD a x y)))
  7740  	// cond: z.Uses == 1
  7741  	// result: (GreaterEqualNoov (CMN a (MUL <x.Type> x y)))
  7742  	for {
  7743  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7744  			break
  7745  		}
  7746  		z := v_0.Args[0]
  7747  		if z.Op != ssaop.OpARM64MADD {
  7748  			break
  7749  		}
  7750  		y := z.Args[2]
  7751  		a := z.Args[0]
  7752  		x := z.Args[1]
  7753  		if !(z.Uses == 1) {
  7754  			break
  7755  		}
  7756  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7757  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  7758  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  7759  		v1.AddArg2(x, y)
  7760  		v0.AddArg2(a, v1)
  7761  		v.AddArg(v0)
  7762  		return true
  7763  	}
  7764  	// match: (GreaterEqual (CMPWconst [0] z:(MADDW a x y)))
  7765  	// cond: z.Uses == 1
  7766  	// result: (GreaterEqualNoov (CMNW a (MULW <x.Type> x y)))
  7767  	for {
  7768  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7769  			break
  7770  		}
  7771  		z := v_0.Args[0]
  7772  		if z.Op != ssaop.OpARM64MADDW {
  7773  			break
  7774  		}
  7775  		y := z.Args[2]
  7776  		a := z.Args[0]
  7777  		x := z.Args[1]
  7778  		if !(z.Uses == 1) {
  7779  			break
  7780  		}
  7781  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7782  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  7783  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  7784  		v1.AddArg2(x, y)
  7785  		v0.AddArg2(a, v1)
  7786  		v.AddArg(v0)
  7787  		return true
  7788  	}
  7789  	// match: (GreaterEqual (FlagConstant [fc]))
  7790  	// result: (MOVDconst [ssa.B2i(fc.Ge())])
  7791  	for {
  7792  		if v_0.Op != ssaop.OpARM64FlagConstant {
  7793  			break
  7794  		}
  7795  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  7796  		v.Reset(ssaop.OpARM64MOVDconst)
  7797  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ge()))
  7798  		return true
  7799  	}
  7800  	// match: (GreaterEqual (InvertFlags x))
  7801  	// result: (LessEqual x)
  7802  	for {
  7803  		if v_0.Op != ssaop.OpARM64InvertFlags {
  7804  			break
  7805  		}
  7806  		x := v_0.Args[0]
  7807  		v.Reset(ssaop.OpARM64LessEqual)
  7808  		v.AddArg(x)
  7809  		return true
  7810  	}
  7811  	// match: (GreaterEqual (CMPconst x [0]))
  7812  	// result: (XORconst [1] (SRLconst <v.Type> [63] x))
  7813  	for {
  7814  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7815  			break
  7816  		}
  7817  		x := v_0.Args[0]
  7818  		v.Reset(ssaop.OpARM64XORconst)
  7819  		v.AuxInt = ssa.Int64ToAuxInt(1)
  7820  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, v.Type)
  7821  		v0.AuxInt = ssa.Int64ToAuxInt(63)
  7822  		v0.AddArg(x)
  7823  		v.AddArg(v0)
  7824  		return true
  7825  	}
  7826  	// match: (GreaterEqual (CMPWconst x [0]))
  7827  	// result: (XORconst [1] (UBFX <v.Type> [ssa.ArmBFAuxInt(31,1)] x))
  7828  	for {
  7829  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7830  			break
  7831  		}
  7832  		x := v_0.Args[0]
  7833  		v.Reset(ssaop.OpARM64XORconst)
  7834  		v.AuxInt = ssa.Int64ToAuxInt(1)
  7835  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UBFX, v.Type)
  7836  		v0.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(31, 1))
  7837  		v0.AddArg(x)
  7838  		v.AddArg(v0)
  7839  		return true
  7840  	}
  7841  	return false
  7842  }
  7843  func rewriteValue_OpARM64GreaterEqualF(v *ssa.Value) bool {
  7844  	v_0 := v.Args[0]
  7845  	// match: (GreaterEqualF (InvertFlags x))
  7846  	// result: (LessEqualF x)
  7847  	for {
  7848  		if v_0.Op != ssaop.OpARM64InvertFlags {
  7849  			break
  7850  		}
  7851  		x := v_0.Args[0]
  7852  		v.Reset(ssaop.OpARM64LessEqualF)
  7853  		v.AddArg(x)
  7854  		return true
  7855  	}
  7856  	return false
  7857  }
  7858  func rewriteValue_OpARM64GreaterEqualNoov(v *ssa.Value) bool {
  7859  	v_0 := v.Args[0]
  7860  	// match: (GreaterEqualNoov (FlagConstant [fc]))
  7861  	// result: (MOVDconst [ssa.B2i(fc.GeNoov())])
  7862  	for {
  7863  		if v_0.Op != ssaop.OpARM64FlagConstant {
  7864  			break
  7865  		}
  7866  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  7867  		v.Reset(ssaop.OpARM64MOVDconst)
  7868  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.GeNoov()))
  7869  		return true
  7870  	}
  7871  	return false
  7872  }
  7873  func rewriteValue_OpARM64GreaterEqualU(v *ssa.Value) bool {
  7874  	v_0 := v.Args[0]
  7875  	// match: (GreaterEqualU (FlagConstant [fc]))
  7876  	// result: (MOVDconst [ssa.B2i(fc.Uge())])
  7877  	for {
  7878  		if v_0.Op != ssaop.OpARM64FlagConstant {
  7879  			break
  7880  		}
  7881  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  7882  		v.Reset(ssaop.OpARM64MOVDconst)
  7883  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Uge()))
  7884  		return true
  7885  	}
  7886  	// match: (GreaterEqualU (InvertFlags x))
  7887  	// result: (LessEqualU x)
  7888  	for {
  7889  		if v_0.Op != ssaop.OpARM64InvertFlags {
  7890  			break
  7891  		}
  7892  		x := v_0.Args[0]
  7893  		v.Reset(ssaop.OpARM64LessEqualU)
  7894  		v.AddArg(x)
  7895  		return true
  7896  	}
  7897  	return false
  7898  }
  7899  func rewriteValue_OpARM64GreaterThan(v *ssa.Value) bool {
  7900  	v_0 := v.Args[0]
  7901  	b := v.Block
  7902  	// match: (GreaterThan (CMPconst [0] z:(AND x y)))
  7903  	// cond: z.Uses == 1
  7904  	// result: (GreaterThan (TST x y))
  7905  	for {
  7906  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7907  			break
  7908  		}
  7909  		z := v_0.Args[0]
  7910  		if z.Op != ssaop.OpARM64AND {
  7911  			break
  7912  		}
  7913  		y := z.Args[1]
  7914  		x := z.Args[0]
  7915  		if !(z.Uses == 1) {
  7916  			break
  7917  		}
  7918  		v.Reset(ssaop.OpARM64GreaterThan)
  7919  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  7920  		v0.AddArg2(x, y)
  7921  		v.AddArg(v0)
  7922  		return true
  7923  	}
  7924  	// match: (GreaterThan (CMPWconst [0] x:(ANDconst [c] y)))
  7925  	// cond: x.Uses == 1
  7926  	// result: (GreaterThan (TSTWconst [int32(c)] y))
  7927  	for {
  7928  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7929  			break
  7930  		}
  7931  		x := v_0.Args[0]
  7932  		if x.Op != ssaop.OpARM64ANDconst {
  7933  			break
  7934  		}
  7935  		c := ssa.AuxIntToInt64(x.AuxInt)
  7936  		y := x.Args[0]
  7937  		if !(x.Uses == 1) {
  7938  			break
  7939  		}
  7940  		v.Reset(ssaop.OpARM64GreaterThan)
  7941  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  7942  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7943  		v0.AddArg(y)
  7944  		v.AddArg(v0)
  7945  		return true
  7946  	}
  7947  	// match: (GreaterThan (CMPWconst [0] z:(AND x y)))
  7948  	// cond: z.Uses == 1
  7949  	// result: (GreaterThan (TSTW x y))
  7950  	for {
  7951  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7952  			break
  7953  		}
  7954  		z := v_0.Args[0]
  7955  		if z.Op != ssaop.OpARM64AND {
  7956  			break
  7957  		}
  7958  		y := z.Args[1]
  7959  		x := z.Args[0]
  7960  		if !(z.Uses == 1) {
  7961  			break
  7962  		}
  7963  		v.Reset(ssaop.OpARM64GreaterThan)
  7964  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  7965  		v0.AddArg2(x, y)
  7966  		v.AddArg(v0)
  7967  		return true
  7968  	}
  7969  	// match: (GreaterThan (CMPconst [0] x:(ANDconst [c] y)))
  7970  	// cond: x.Uses == 1
  7971  	// result: (GreaterThan (TSTconst [c] y))
  7972  	for {
  7973  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7974  			break
  7975  		}
  7976  		x := v_0.Args[0]
  7977  		if x.Op != ssaop.OpARM64ANDconst {
  7978  			break
  7979  		}
  7980  		c := ssa.AuxIntToInt64(x.AuxInt)
  7981  		y := x.Args[0]
  7982  		if !(x.Uses == 1) {
  7983  			break
  7984  		}
  7985  		v.Reset(ssaop.OpARM64GreaterThan)
  7986  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  7987  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  7988  		v0.AddArg(y)
  7989  		v.AddArg(v0)
  7990  		return true
  7991  	}
  7992  	// match: (GreaterThan (FlagConstant [fc]))
  7993  	// result: (MOVDconst [ssa.B2i(fc.Gt())])
  7994  	for {
  7995  		if v_0.Op != ssaop.OpARM64FlagConstant {
  7996  			break
  7997  		}
  7998  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  7999  		v.Reset(ssaop.OpARM64MOVDconst)
  8000  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Gt()))
  8001  		return true
  8002  	}
  8003  	// match: (GreaterThan (InvertFlags x))
  8004  	// result: (LessThan x)
  8005  	for {
  8006  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8007  			break
  8008  		}
  8009  		x := v_0.Args[0]
  8010  		v.Reset(ssaop.OpARM64LessThan)
  8011  		v.AddArg(x)
  8012  		return true
  8013  	}
  8014  	return false
  8015  }
  8016  func rewriteValue_OpARM64GreaterThanF(v *ssa.Value) bool {
  8017  	v_0 := v.Args[0]
  8018  	// match: (GreaterThanF (InvertFlags x))
  8019  	// result: (LessThanF x)
  8020  	for {
  8021  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8022  			break
  8023  		}
  8024  		x := v_0.Args[0]
  8025  		v.Reset(ssaop.OpARM64LessThanF)
  8026  		v.AddArg(x)
  8027  		return true
  8028  	}
  8029  	return false
  8030  }
  8031  func rewriteValue_OpARM64GreaterThanU(v *ssa.Value) bool {
  8032  	v_0 := v.Args[0]
  8033  	// match: (GreaterThanU (FlagConstant [fc]))
  8034  	// result: (MOVDconst [ssa.B2i(fc.Ugt())])
  8035  	for {
  8036  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8037  			break
  8038  		}
  8039  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8040  		v.Reset(ssaop.OpARM64MOVDconst)
  8041  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ugt()))
  8042  		return true
  8043  	}
  8044  	// match: (GreaterThanU (InvertFlags x))
  8045  	// result: (LessThanU x)
  8046  	for {
  8047  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8048  			break
  8049  		}
  8050  		x := v_0.Args[0]
  8051  		v.Reset(ssaop.OpARM64LessThanU)
  8052  		v.AddArg(x)
  8053  		return true
  8054  	}
  8055  	return false
  8056  }
  8057  func rewriteValue_OpARM64LDP(v *ssa.Value) bool {
  8058  	v_1 := v.Args[1]
  8059  	v_0 := v.Args[0]
  8060  	b := v.Block
  8061  	config := b.Func.Config
  8062  	// match: (LDP [off1] {sym} (ADDconst [off2] ptr) mem)
  8063  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  8064  	// result: (LDP [off1+int32(off2)] {sym} ptr mem)
  8065  	for {
  8066  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  8067  		sym := ssa.AuxToSym(v.Aux)
  8068  		if v_0.Op != ssaop.OpARM64ADDconst {
  8069  			break
  8070  		}
  8071  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  8072  		ptr := v_0.Args[0]
  8073  		mem := v_1
  8074  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  8075  			break
  8076  		}
  8077  		v.Reset(ssaop.OpARM64LDP)
  8078  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  8079  		v.Aux = ssa.SymToAux(sym)
  8080  		v.AddArg2(ptr, mem)
  8081  		return true
  8082  	}
  8083  	// match: (LDP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  8084  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  8085  	// result: (LDP [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  8086  	for {
  8087  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  8088  		sym1 := ssa.AuxToSym(v.Aux)
  8089  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  8090  			break
  8091  		}
  8092  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  8093  		sym2 := ssa.AuxToSym(v_0.Aux)
  8094  		ptr := v_0.Args[0]
  8095  		mem := v_1
  8096  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  8097  			break
  8098  		}
  8099  		v.Reset(ssaop.OpARM64LDP)
  8100  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  8101  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  8102  		v.AddArg2(ptr, mem)
  8103  		return true
  8104  	}
  8105  	return false
  8106  }
  8107  func rewriteValue_OpARM64LessEqual(v *ssa.Value) bool {
  8108  	v_0 := v.Args[0]
  8109  	b := v.Block
  8110  	// match: (LessEqual (CMPconst [0] z:(AND x y)))
  8111  	// cond: z.Uses == 1
  8112  	// result: (LessEqual (TST x y))
  8113  	for {
  8114  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8115  			break
  8116  		}
  8117  		z := v_0.Args[0]
  8118  		if z.Op != ssaop.OpARM64AND {
  8119  			break
  8120  		}
  8121  		y := z.Args[1]
  8122  		x := z.Args[0]
  8123  		if !(z.Uses == 1) {
  8124  			break
  8125  		}
  8126  		v.Reset(ssaop.OpARM64LessEqual)
  8127  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8128  		v0.AddArg2(x, y)
  8129  		v.AddArg(v0)
  8130  		return true
  8131  	}
  8132  	// match: (LessEqual (CMPWconst [0] x:(ANDconst [c] y)))
  8133  	// cond: x.Uses == 1
  8134  	// result: (LessEqual (TSTWconst [int32(c)] y))
  8135  	for {
  8136  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8137  			break
  8138  		}
  8139  		x := v_0.Args[0]
  8140  		if x.Op != ssaop.OpARM64ANDconst {
  8141  			break
  8142  		}
  8143  		c := ssa.AuxIntToInt64(x.AuxInt)
  8144  		y := x.Args[0]
  8145  		if !(x.Uses == 1) {
  8146  			break
  8147  		}
  8148  		v.Reset(ssaop.OpARM64LessEqual)
  8149  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8150  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8151  		v0.AddArg(y)
  8152  		v.AddArg(v0)
  8153  		return true
  8154  	}
  8155  	// match: (LessEqual (CMPWconst [0] z:(AND x y)))
  8156  	// cond: z.Uses == 1
  8157  	// result: (LessEqual (TSTW x y))
  8158  	for {
  8159  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8160  			break
  8161  		}
  8162  		z := v_0.Args[0]
  8163  		if z.Op != ssaop.OpARM64AND {
  8164  			break
  8165  		}
  8166  		y := z.Args[1]
  8167  		x := z.Args[0]
  8168  		if !(z.Uses == 1) {
  8169  			break
  8170  		}
  8171  		v.Reset(ssaop.OpARM64LessEqual)
  8172  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8173  		v0.AddArg2(x, y)
  8174  		v.AddArg(v0)
  8175  		return true
  8176  	}
  8177  	// match: (LessEqual (CMPconst [0] x:(ANDconst [c] y)))
  8178  	// cond: x.Uses == 1
  8179  	// result: (LessEqual (TSTconst [c] y))
  8180  	for {
  8181  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8182  			break
  8183  		}
  8184  		x := v_0.Args[0]
  8185  		if x.Op != ssaop.OpARM64ANDconst {
  8186  			break
  8187  		}
  8188  		c := ssa.AuxIntToInt64(x.AuxInt)
  8189  		y := x.Args[0]
  8190  		if !(x.Uses == 1) {
  8191  			break
  8192  		}
  8193  		v.Reset(ssaop.OpARM64LessEqual)
  8194  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8195  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8196  		v0.AddArg(y)
  8197  		v.AddArg(v0)
  8198  		return true
  8199  	}
  8200  	// match: (LessEqual (FlagConstant [fc]))
  8201  	// result: (MOVDconst [ssa.B2i(fc.Le())])
  8202  	for {
  8203  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8204  			break
  8205  		}
  8206  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8207  		v.Reset(ssaop.OpARM64MOVDconst)
  8208  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Le()))
  8209  		return true
  8210  	}
  8211  	// match: (LessEqual (InvertFlags x))
  8212  	// result: (GreaterEqual x)
  8213  	for {
  8214  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8215  			break
  8216  		}
  8217  		x := v_0.Args[0]
  8218  		v.Reset(ssaop.OpARM64GreaterEqual)
  8219  		v.AddArg(x)
  8220  		return true
  8221  	}
  8222  	return false
  8223  }
  8224  func rewriteValue_OpARM64LessEqualF(v *ssa.Value) bool {
  8225  	v_0 := v.Args[0]
  8226  	// match: (LessEqualF (InvertFlags x))
  8227  	// result: (GreaterEqualF x)
  8228  	for {
  8229  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8230  			break
  8231  		}
  8232  		x := v_0.Args[0]
  8233  		v.Reset(ssaop.OpARM64GreaterEqualF)
  8234  		v.AddArg(x)
  8235  		return true
  8236  	}
  8237  	return false
  8238  }
  8239  func rewriteValue_OpARM64LessEqualU(v *ssa.Value) bool {
  8240  	v_0 := v.Args[0]
  8241  	// match: (LessEqualU (FlagConstant [fc]))
  8242  	// result: (MOVDconst [ssa.B2i(fc.Ule())])
  8243  	for {
  8244  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8245  			break
  8246  		}
  8247  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8248  		v.Reset(ssaop.OpARM64MOVDconst)
  8249  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ule()))
  8250  		return true
  8251  	}
  8252  	// match: (LessEqualU (InvertFlags x))
  8253  	// result: (GreaterEqualU x)
  8254  	for {
  8255  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8256  			break
  8257  		}
  8258  		x := v_0.Args[0]
  8259  		v.Reset(ssaop.OpARM64GreaterEqualU)
  8260  		v.AddArg(x)
  8261  		return true
  8262  	}
  8263  	return false
  8264  }
  8265  func rewriteValue_OpARM64LessThan(v *ssa.Value) bool {
  8266  	v_0 := v.Args[0]
  8267  	b := v.Block
  8268  	// match: (LessThan (CMPconst [0] z:(AND x y)))
  8269  	// cond: z.Uses == 1
  8270  	// result: (LessThan (TST x y))
  8271  	for {
  8272  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8273  			break
  8274  		}
  8275  		z := v_0.Args[0]
  8276  		if z.Op != ssaop.OpARM64AND {
  8277  			break
  8278  		}
  8279  		y := z.Args[1]
  8280  		x := z.Args[0]
  8281  		if !(z.Uses == 1) {
  8282  			break
  8283  		}
  8284  		v.Reset(ssaop.OpARM64LessThan)
  8285  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8286  		v0.AddArg2(x, y)
  8287  		v.AddArg(v0)
  8288  		return true
  8289  	}
  8290  	// match: (LessThan (CMPWconst [0] x:(ANDconst [c] y)))
  8291  	// cond: x.Uses == 1
  8292  	// result: (LessThan (TSTWconst [int32(c)] y))
  8293  	for {
  8294  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8295  			break
  8296  		}
  8297  		x := v_0.Args[0]
  8298  		if x.Op != ssaop.OpARM64ANDconst {
  8299  			break
  8300  		}
  8301  		c := ssa.AuxIntToInt64(x.AuxInt)
  8302  		y := x.Args[0]
  8303  		if !(x.Uses == 1) {
  8304  			break
  8305  		}
  8306  		v.Reset(ssaop.OpARM64LessThan)
  8307  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8308  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8309  		v0.AddArg(y)
  8310  		v.AddArg(v0)
  8311  		return true
  8312  	}
  8313  	// match: (LessThan (CMPWconst [0] z:(AND x y)))
  8314  	// cond: z.Uses == 1
  8315  	// result: (LessThan (TSTW x y))
  8316  	for {
  8317  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8318  			break
  8319  		}
  8320  		z := v_0.Args[0]
  8321  		if z.Op != ssaop.OpARM64AND {
  8322  			break
  8323  		}
  8324  		y := z.Args[1]
  8325  		x := z.Args[0]
  8326  		if !(z.Uses == 1) {
  8327  			break
  8328  		}
  8329  		v.Reset(ssaop.OpARM64LessThan)
  8330  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8331  		v0.AddArg2(x, y)
  8332  		v.AddArg(v0)
  8333  		return true
  8334  	}
  8335  	// match: (LessThan (CMPconst [0] x:(ANDconst [c] y)))
  8336  	// cond: x.Uses == 1
  8337  	// result: (LessThan (TSTconst [c] y))
  8338  	for {
  8339  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8340  			break
  8341  		}
  8342  		x := v_0.Args[0]
  8343  		if x.Op != ssaop.OpARM64ANDconst {
  8344  			break
  8345  		}
  8346  		c := ssa.AuxIntToInt64(x.AuxInt)
  8347  		y := x.Args[0]
  8348  		if !(x.Uses == 1) {
  8349  			break
  8350  		}
  8351  		v.Reset(ssaop.OpARM64LessThan)
  8352  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8353  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8354  		v0.AddArg(y)
  8355  		v.AddArg(v0)
  8356  		return true
  8357  	}
  8358  	// match: (LessThan (CMPconst [0] x:(ADDconst [c] y)))
  8359  	// cond: x.Uses == 1
  8360  	// result: (LessThanNoov (CMNconst [c] y))
  8361  	for {
  8362  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8363  			break
  8364  		}
  8365  		x := v_0.Args[0]
  8366  		if x.Op != ssaop.OpARM64ADDconst {
  8367  			break
  8368  		}
  8369  		c := ssa.AuxIntToInt64(x.AuxInt)
  8370  		y := x.Args[0]
  8371  		if !(x.Uses == 1) {
  8372  			break
  8373  		}
  8374  		v.Reset(ssaop.OpARM64LessThanNoov)
  8375  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  8376  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8377  		v0.AddArg(y)
  8378  		v.AddArg(v0)
  8379  		return true
  8380  	}
  8381  	// match: (LessThan (CMPWconst [0] x:(ADDconst [c] y)))
  8382  	// cond: x.Uses == 1
  8383  	// result: (LessThanNoov (CMNWconst [int32(c)] y))
  8384  	for {
  8385  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8386  			break
  8387  		}
  8388  		x := v_0.Args[0]
  8389  		if x.Op != ssaop.OpARM64ADDconst {
  8390  			break
  8391  		}
  8392  		c := ssa.AuxIntToInt64(x.AuxInt)
  8393  		y := x.Args[0]
  8394  		if !(x.Uses == 1) {
  8395  			break
  8396  		}
  8397  		v.Reset(ssaop.OpARM64LessThanNoov)
  8398  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  8399  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8400  		v0.AddArg(y)
  8401  		v.AddArg(v0)
  8402  		return true
  8403  	}
  8404  	// match: (LessThan (CMPconst [0] z:(ADD x y)))
  8405  	// cond: z.Uses == 1
  8406  	// result: (LessThanNoov (CMN x y))
  8407  	for {
  8408  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8409  			break
  8410  		}
  8411  		z := v_0.Args[0]
  8412  		if z.Op != ssaop.OpARM64ADD {
  8413  			break
  8414  		}
  8415  		y := z.Args[1]
  8416  		x := z.Args[0]
  8417  		if !(z.Uses == 1) {
  8418  			break
  8419  		}
  8420  		v.Reset(ssaop.OpARM64LessThanNoov)
  8421  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8422  		v0.AddArg2(x, y)
  8423  		v.AddArg(v0)
  8424  		return true
  8425  	}
  8426  	// match: (LessThan (CMPWconst [0] z:(ADD x y)))
  8427  	// cond: z.Uses == 1
  8428  	// result: (LessThanNoov (CMNW x y))
  8429  	for {
  8430  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8431  			break
  8432  		}
  8433  		z := v_0.Args[0]
  8434  		if z.Op != ssaop.OpARM64ADD {
  8435  			break
  8436  		}
  8437  		y := z.Args[1]
  8438  		x := z.Args[0]
  8439  		if !(z.Uses == 1) {
  8440  			break
  8441  		}
  8442  		v.Reset(ssaop.OpARM64LessThanNoov)
  8443  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8444  		v0.AddArg2(x, y)
  8445  		v.AddArg(v0)
  8446  		return true
  8447  	}
  8448  	// match: (LessThan (CMPconst [0] z:(MADD a x y)))
  8449  	// cond: z.Uses == 1
  8450  	// result: (LessThanNoov (CMN a (MUL <x.Type> x y)))
  8451  	for {
  8452  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8453  			break
  8454  		}
  8455  		z := v_0.Args[0]
  8456  		if z.Op != ssaop.OpARM64MADD {
  8457  			break
  8458  		}
  8459  		y := z.Args[2]
  8460  		a := z.Args[0]
  8461  		x := z.Args[1]
  8462  		if !(z.Uses == 1) {
  8463  			break
  8464  		}
  8465  		v.Reset(ssaop.OpARM64LessThanNoov)
  8466  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8467  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  8468  		v1.AddArg2(x, y)
  8469  		v0.AddArg2(a, v1)
  8470  		v.AddArg(v0)
  8471  		return true
  8472  	}
  8473  	// match: (LessThan (CMPWconst [0] z:(MADDW a x y)))
  8474  	// cond: z.Uses == 1
  8475  	// result: (LessThanNoov (CMNW a (MULW <x.Type> x y)))
  8476  	for {
  8477  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8478  			break
  8479  		}
  8480  		z := v_0.Args[0]
  8481  		if z.Op != ssaop.OpARM64MADDW {
  8482  			break
  8483  		}
  8484  		y := z.Args[2]
  8485  		a := z.Args[0]
  8486  		x := z.Args[1]
  8487  		if !(z.Uses == 1) {
  8488  			break
  8489  		}
  8490  		v.Reset(ssaop.OpARM64LessThanNoov)
  8491  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8492  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  8493  		v1.AddArg2(x, y)
  8494  		v0.AddArg2(a, v1)
  8495  		v.AddArg(v0)
  8496  		return true
  8497  	}
  8498  	// match: (LessThan (FlagConstant [fc]))
  8499  	// result: (MOVDconst [ssa.B2i(fc.Lt())])
  8500  	for {
  8501  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8502  			break
  8503  		}
  8504  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8505  		v.Reset(ssaop.OpARM64MOVDconst)
  8506  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Lt()))
  8507  		return true
  8508  	}
  8509  	// match: (LessThan (InvertFlags x))
  8510  	// result: (GreaterThan x)
  8511  	for {
  8512  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8513  			break
  8514  		}
  8515  		x := v_0.Args[0]
  8516  		v.Reset(ssaop.OpARM64GreaterThan)
  8517  		v.AddArg(x)
  8518  		return true
  8519  	}
  8520  	// match: (LessThan (CMPconst x [0]))
  8521  	// result: (SRLconst [63] x)
  8522  	for {
  8523  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8524  			break
  8525  		}
  8526  		x := v_0.Args[0]
  8527  		v.Reset(ssaop.OpARM64SRLconst)
  8528  		v.AuxInt = ssa.Int64ToAuxInt(63)
  8529  		v.AddArg(x)
  8530  		return true
  8531  	}
  8532  	// match: (LessThan (CMPWconst x [0]))
  8533  	// result: (UBFX [ssa.ArmBFAuxInt(31,1)] x)
  8534  	for {
  8535  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8536  			break
  8537  		}
  8538  		x := v_0.Args[0]
  8539  		v.Reset(ssaop.OpARM64UBFX)
  8540  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(31, 1))
  8541  		v.AddArg(x)
  8542  		return true
  8543  	}
  8544  	return false
  8545  }
  8546  func rewriteValue_OpARM64LessThanF(v *ssa.Value) bool {
  8547  	v_0 := v.Args[0]
  8548  	// match: (LessThanF (InvertFlags x))
  8549  	// result: (GreaterThanF x)
  8550  	for {
  8551  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8552  			break
  8553  		}
  8554  		x := v_0.Args[0]
  8555  		v.Reset(ssaop.OpARM64GreaterThanF)
  8556  		v.AddArg(x)
  8557  		return true
  8558  	}
  8559  	return false
  8560  }
  8561  func rewriteValue_OpARM64LessThanNoov(v *ssa.Value) bool {
  8562  	v_0 := v.Args[0]
  8563  	// match: (LessThanNoov (FlagConstant [fc]))
  8564  	// result: (MOVDconst [ssa.B2i(fc.LtNoov())])
  8565  	for {
  8566  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8567  			break
  8568  		}
  8569  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8570  		v.Reset(ssaop.OpARM64MOVDconst)
  8571  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.LtNoov()))
  8572  		return true
  8573  	}
  8574  	return false
  8575  }
  8576  func rewriteValue_OpARM64LessThanU(v *ssa.Value) bool {
  8577  	v_0 := v.Args[0]
  8578  	// match: (LessThanU (FlagConstant [fc]))
  8579  	// result: (MOVDconst [ssa.B2i(fc.Ult())])
  8580  	for {
  8581  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8582  			break
  8583  		}
  8584  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8585  		v.Reset(ssaop.OpARM64MOVDconst)
  8586  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ult()))
  8587  		return true
  8588  	}
  8589  	// match: (LessThanU (InvertFlags x))
  8590  	// result: (GreaterThanU x)
  8591  	for {
  8592  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8593  			break
  8594  		}
  8595  		x := v_0.Args[0]
  8596  		v.Reset(ssaop.OpARM64GreaterThanU)
  8597  		v.AddArg(x)
  8598  		return true
  8599  	}
  8600  	return false
  8601  }
  8602  func rewriteValue_OpARM64LoweredPanicBoundsCR(v *ssa.Value) bool {
  8603  	v_1 := v.Args[1]
  8604  	v_0 := v.Args[0]
  8605  	// match: (LoweredPanicBoundsCR [kind] {p} (MOVDconst [c]) mem)
  8606  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:p.C, Cy:c}} mem)
  8607  	for {
  8608  		kind := ssa.AuxIntToInt64(v.AuxInt)
  8609  		p := ssa.AuxToPanicBoundsC(v.Aux)
  8610  		if v_0.Op != ssaop.OpARM64MOVDconst {
  8611  			break
  8612  		}
  8613  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  8614  		mem := v_1
  8615  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCC)
  8616  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  8617  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: p.C, Cy: c})
  8618  		v.AddArg(mem)
  8619  		return true
  8620  	}
  8621  	return false
  8622  }
  8623  func rewriteValue_OpARM64LoweredPanicBoundsRC(v *ssa.Value) bool {
  8624  	v_1 := v.Args[1]
  8625  	v_0 := v.Args[0]
  8626  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVDconst [c]) mem)
  8627  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:c, Cy:p.C}} mem)
  8628  	for {
  8629  		kind := ssa.AuxIntToInt64(v.AuxInt)
  8630  		p := ssa.AuxToPanicBoundsC(v.Aux)
  8631  		if v_0.Op != ssaop.OpARM64MOVDconst {
  8632  			break
  8633  		}
  8634  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  8635  		mem := v_1
  8636  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCC)
  8637  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  8638  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: c, Cy: p.C})
  8639  		v.AddArg(mem)
  8640  		return true
  8641  	}
  8642  	return false
  8643  }
  8644  func rewriteValue_OpARM64LoweredPanicBoundsRR(v *ssa.Value) bool {
  8645  	v_2 := v.Args[2]
  8646  	v_1 := v.Args[1]
  8647  	v_0 := v.Args[0]
  8648  	// match: (LoweredPanicBoundsRR [kind] x (MOVDconst [c]) mem)
  8649  	// result: (LoweredPanicBoundsRC [kind] x {ssa.PanicBoundsC{C:c}} mem)
  8650  	for {
  8651  		kind := ssa.AuxIntToInt64(v.AuxInt)
  8652  		x := v_0
  8653  		if v_1.Op != ssaop.OpARM64MOVDconst {
  8654  			break
  8655  		}
  8656  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  8657  		mem := v_2
  8658  		v.Reset(ssaop.OpARM64LoweredPanicBoundsRC)
  8659  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  8660  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  8661  		v.AddArg2(x, mem)
  8662  		return true
  8663  	}
  8664  	// match: (LoweredPanicBoundsRR [kind] (MOVDconst [c]) y mem)
  8665  	// result: (LoweredPanicBoundsCR [kind] {ssa.PanicBoundsC{C:c}} y mem)
  8666  	for {
  8667  		kind := ssa.AuxIntToInt64(v.AuxInt)
  8668  		if v_0.Op != ssaop.OpARM64MOVDconst {
  8669  			break
  8670  		}
  8671  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  8672  		y := v_1
  8673  		mem := v_2
  8674  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCR)
  8675  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  8676  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  8677  		v.AddArg2(y, mem)
  8678  		return true
  8679  	}
  8680  	return false
  8681  }
  8682  func rewriteValue_OpARM64MADD(v *ssa.Value) bool {
  8683  	v_2 := v.Args[2]
  8684  	v_1 := v.Args[1]
  8685  	v_0 := v.Args[0]
  8686  	b := v.Block
  8687  	// match: (MADD a x (MOVDconst [-1]))
  8688  	// result: (SUB a x)
  8689  	for {
  8690  		a := v_0
  8691  		x := v_1
  8692  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != -1 {
  8693  			break
  8694  		}
  8695  		v.Reset(ssaop.OpARM64SUB)
  8696  		v.AddArg2(a, x)
  8697  		return true
  8698  	}
  8699  	// match: (MADD a _ (MOVDconst [0]))
  8700  	// result: a
  8701  	for {
  8702  		a := v_0
  8703  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 0 {
  8704  			break
  8705  		}
  8706  		v.CopyOf(a)
  8707  		return true
  8708  	}
  8709  	// match: (MADD a x (MOVDconst [1]))
  8710  	// result: (ADD a x)
  8711  	for {
  8712  		a := v_0
  8713  		x := v_1
  8714  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 1 {
  8715  			break
  8716  		}
  8717  		v.Reset(ssaop.OpARM64ADD)
  8718  		v.AddArg2(a, x)
  8719  		return true
  8720  	}
  8721  	// match: (MADD a x (MOVDconst [c]))
  8722  	// cond: ssa.IsPowerOfTwo(c)
  8723  	// result: (ADDshiftLL a x [ssa.Log64(c)])
  8724  	for {
  8725  		a := v_0
  8726  		x := v_1
  8727  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8728  			break
  8729  		}
  8730  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8731  		if !(ssa.IsPowerOfTwo(c)) {
  8732  			break
  8733  		}
  8734  		v.Reset(ssaop.OpARM64ADDshiftLL)
  8735  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  8736  		v.AddArg2(a, x)
  8737  		return true
  8738  	}
  8739  	// match: (MADD a x (MOVDconst [c]))
  8740  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
  8741  	// result: (ADD a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  8742  	for {
  8743  		a := v_0
  8744  		x := v_1
  8745  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8746  			break
  8747  		}
  8748  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8749  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  8750  			break
  8751  		}
  8752  		v.Reset(ssaop.OpARM64ADD)
  8753  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  8754  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  8755  		v0.AddArg2(x, x)
  8756  		v.AddArg2(a, v0)
  8757  		return true
  8758  	}
  8759  	// match: (MADD a x (MOVDconst [c]))
  8760  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
  8761  	// result: (SUB a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
  8762  	for {
  8763  		a := v_0
  8764  		x := v_1
  8765  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8766  			break
  8767  		}
  8768  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8769  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  8770  			break
  8771  		}
  8772  		v.Reset(ssaop.OpARM64SUB)
  8773  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  8774  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  8775  		v0.AddArg2(x, x)
  8776  		v.AddArg2(a, v0)
  8777  		return true
  8778  	}
  8779  	// match: (MADD a x (MOVDconst [c]))
  8780  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  8781  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
  8782  	for {
  8783  		a := v_0
  8784  		x := v_1
  8785  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8786  			break
  8787  		}
  8788  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8789  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  8790  			break
  8791  		}
  8792  		v.Reset(ssaop.OpARM64SUBshiftLL)
  8793  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  8794  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  8795  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  8796  		v0.AddArg2(x, x)
  8797  		v.AddArg2(a, v0)
  8798  		return true
  8799  	}
  8800  	// match: (MADD a x (MOVDconst [c]))
  8801  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  8802  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
  8803  	for {
  8804  		a := v_0
  8805  		x := v_1
  8806  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8807  			break
  8808  		}
  8809  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8810  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  8811  			break
  8812  		}
  8813  		v.Reset(ssaop.OpARM64ADDshiftLL)
  8814  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  8815  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  8816  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  8817  		v0.AddArg2(x, x)
  8818  		v.AddArg2(a, v0)
  8819  		return true
  8820  	}
  8821  	// match: (MADD a x (MOVDconst [c]))
  8822  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  8823  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
  8824  	for {
  8825  		a := v_0
  8826  		x := v_1
  8827  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8828  			break
  8829  		}
  8830  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8831  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  8832  			break
  8833  		}
  8834  		v.Reset(ssaop.OpARM64SUBshiftLL)
  8835  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  8836  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  8837  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  8838  		v0.AddArg2(x, x)
  8839  		v.AddArg2(a, v0)
  8840  		return true
  8841  	}
  8842  	// match: (MADD a x (MOVDconst [c]))
  8843  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  8844  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
  8845  	for {
  8846  		a := v_0
  8847  		x := v_1
  8848  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8849  			break
  8850  		}
  8851  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8852  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  8853  			break
  8854  		}
  8855  		v.Reset(ssaop.OpARM64ADDshiftLL)
  8856  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  8857  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  8858  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  8859  		v0.AddArg2(x, x)
  8860  		v.AddArg2(a, v0)
  8861  		return true
  8862  	}
  8863  	// match: (MADD a (MOVDconst [-1]) x)
  8864  	// result: (SUB a x)
  8865  	for {
  8866  		a := v_0
  8867  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  8868  			break
  8869  		}
  8870  		x := v_2
  8871  		v.Reset(ssaop.OpARM64SUB)
  8872  		v.AddArg2(a, x)
  8873  		return true
  8874  	}
  8875  	// match: (MADD a (MOVDconst [0]) _)
  8876  	// result: a
  8877  	for {
  8878  		a := v_0
  8879  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  8880  			break
  8881  		}
  8882  		v.CopyOf(a)
  8883  		return true
  8884  	}
  8885  	// match: (MADD a (MOVDconst [1]) x)
  8886  	// result: (ADD a x)
  8887  	for {
  8888  		a := v_0
  8889  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  8890  			break
  8891  		}
  8892  		x := v_2
  8893  		v.Reset(ssaop.OpARM64ADD)
  8894  		v.AddArg2(a, x)
  8895  		return true
  8896  	}
  8897  	// match: (MADD a (MOVDconst [c]) x)
  8898  	// cond: ssa.IsPowerOfTwo(c)
  8899  	// result: (ADDshiftLL a x [ssa.Log64(c)])
  8900  	for {
  8901  		a := v_0
  8902  		if v_1.Op != ssaop.OpARM64MOVDconst {
  8903  			break
  8904  		}
  8905  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  8906  		x := v_2
  8907  		if !(ssa.IsPowerOfTwo(c)) {
  8908  			break
  8909  		}
  8910  		v.Reset(ssaop.OpARM64ADDshiftLL)
  8911  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  8912  		v.AddArg2(a, x)
  8913  		return true
  8914  	}
  8915  	// match: (MADD a (MOVDconst [c]) x)
  8916  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
  8917  	// result: (ADD a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  8918  	for {
  8919  		a := v_0
  8920  		if v_1.Op != ssaop.OpARM64MOVDconst {
  8921  			break
  8922  		}
  8923  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  8924  		x := v_2
  8925  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  8926  			break
  8927  		}
  8928  		v.Reset(ssaop.OpARM64ADD)
  8929  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  8930  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  8931  		v0.AddArg2(x, x)
  8932  		v.AddArg2(a, v0)
  8933  		return true
  8934  	}
  8935  	// match: (MADD a (MOVDconst [c]) x)
  8936  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
  8937  	// result: (SUB a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
  8938  	for {
  8939  		a := v_0
  8940  		if v_1.Op != ssaop.OpARM64MOVDconst {
  8941  			break
  8942  		}
  8943  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  8944  		x := v_2
  8945  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  8946  			break
  8947  		}
  8948  		v.Reset(ssaop.OpARM64SUB)
  8949  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  8950  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  8951  		v0.AddArg2(x, x)
  8952  		v.AddArg2(a, v0)
  8953  		return true
  8954  	}
  8955  	// match: (MADD a (MOVDconst [c]) x)
  8956  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  8957  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
  8958  	for {
  8959  		a := v_0
  8960  		if v_1.Op != ssaop.OpARM64MOVDconst {
  8961  			break
  8962  		}
  8963  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  8964  		x := v_2
  8965  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  8966  			break
  8967  		}
  8968  		v.Reset(ssaop.OpARM64SUBshiftLL)
  8969  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  8970  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  8971  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  8972  		v0.AddArg2(x, x)
  8973  		v.AddArg2(a, v0)
  8974  		return true
  8975  	}
  8976  	// match: (MADD a (MOVDconst [c]) x)
  8977  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  8978  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
  8979  	for {
  8980  		a := v_0
  8981  		if v_1.Op != ssaop.OpARM64MOVDconst {
  8982  			break
  8983  		}
  8984  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  8985  		x := v_2
  8986  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  8987  			break
  8988  		}
  8989  		v.Reset(ssaop.OpARM64ADDshiftLL)
  8990  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  8991  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  8992  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  8993  		v0.AddArg2(x, x)
  8994  		v.AddArg2(a, v0)
  8995  		return true
  8996  	}
  8997  	// match: (MADD a (MOVDconst [c]) x)
  8998  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  8999  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
  9000  	for {
  9001  		a := v_0
  9002  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9003  			break
  9004  		}
  9005  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9006  		x := v_2
  9007  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  9008  			break
  9009  		}
  9010  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9011  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9012  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9013  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9014  		v0.AddArg2(x, x)
  9015  		v.AddArg2(a, v0)
  9016  		return true
  9017  	}
  9018  	// match: (MADD a (MOVDconst [c]) x)
  9019  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  9020  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
  9021  	for {
  9022  		a := v_0
  9023  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9024  			break
  9025  		}
  9026  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9027  		x := v_2
  9028  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  9029  			break
  9030  		}
  9031  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9032  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9033  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9034  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9035  		v0.AddArg2(x, x)
  9036  		v.AddArg2(a, v0)
  9037  		return true
  9038  	}
  9039  	// match: (MADD (MOVDconst [c]) x y)
  9040  	// result: (ADDconst [c] (MUL <x.Type> x y))
  9041  	for {
  9042  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9043  			break
  9044  		}
  9045  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9046  		x := v_1
  9047  		y := v_2
  9048  		v.Reset(ssaop.OpARM64ADDconst)
  9049  		v.AuxInt = ssa.Int64ToAuxInt(c)
  9050  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  9051  		v0.AddArg2(x, y)
  9052  		v.AddArg(v0)
  9053  		return true
  9054  	}
  9055  	// match: (MADD a (MOVDconst [c]) (MOVDconst [d]))
  9056  	// result: (ADDconst [c*d] a)
  9057  	for {
  9058  		a := v_0
  9059  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9060  			break
  9061  		}
  9062  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9063  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9064  			break
  9065  		}
  9066  		d := ssa.AuxIntToInt64(v_2.AuxInt)
  9067  		v.Reset(ssaop.OpARM64ADDconst)
  9068  		v.AuxInt = ssa.Int64ToAuxInt(c * d)
  9069  		v.AddArg(a)
  9070  		return true
  9071  	}
  9072  	return false
  9073  }
  9074  func rewriteValue_OpARM64MADDW(v *ssa.Value) bool {
  9075  	v_2 := v.Args[2]
  9076  	v_1 := v.Args[1]
  9077  	v_0 := v.Args[0]
  9078  	b := v.Block
  9079  	// match: (MADDW a x (MOVDconst [c]))
  9080  	// cond: int32(c)==-1
  9081  	// result: (MOVWUreg (SUB <a.Type> a x))
  9082  	for {
  9083  		a := v_0
  9084  		x := v_1
  9085  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9086  			break
  9087  		}
  9088  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9089  		if !(int32(c) == -1) {
  9090  			break
  9091  		}
  9092  		v.Reset(ssaop.OpARM64MOVWUreg)
  9093  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9094  		v0.AddArg2(a, x)
  9095  		v.AddArg(v0)
  9096  		return true
  9097  	}
  9098  	// match: (MADDW a _ (MOVDconst [c]))
  9099  	// cond: int32(c)==0
  9100  	// result: (MOVWUreg a)
  9101  	for {
  9102  		a := v_0
  9103  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9104  			break
  9105  		}
  9106  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9107  		if !(int32(c) == 0) {
  9108  			break
  9109  		}
  9110  		v.Reset(ssaop.OpARM64MOVWUreg)
  9111  		v.AddArg(a)
  9112  		return true
  9113  	}
  9114  	// match: (MADDW a x (MOVDconst [c]))
  9115  	// cond: int32(c)==1
  9116  	// result: (MOVWUreg (ADD <a.Type> a x))
  9117  	for {
  9118  		a := v_0
  9119  		x := v_1
  9120  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9121  			break
  9122  		}
  9123  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9124  		if !(int32(c) == 1) {
  9125  			break
  9126  		}
  9127  		v.Reset(ssaop.OpARM64MOVWUreg)
  9128  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9129  		v0.AddArg2(a, x)
  9130  		v.AddArg(v0)
  9131  		return true
  9132  	}
  9133  	// match: (MADDW a x (MOVDconst [c]))
  9134  	// cond: ssa.IsPowerOfTwo(c)
  9135  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [ssa.Log64(c)]))
  9136  	for {
  9137  		a := v_0
  9138  		x := v_1
  9139  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9140  			break
  9141  		}
  9142  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9143  		if !(ssa.IsPowerOfTwo(c)) {
  9144  			break
  9145  		}
  9146  		v.Reset(ssaop.OpARM64MOVWUreg)
  9147  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9148  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9149  		v0.AddArg2(a, x)
  9150  		v.AddArg(v0)
  9151  		return true
  9152  	}
  9153  	// match: (MADDW a x (MOVDconst [c]))
  9154  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
  9155  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9156  	for {
  9157  		a := v_0
  9158  		x := v_1
  9159  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9160  			break
  9161  		}
  9162  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9163  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9164  			break
  9165  		}
  9166  		v.Reset(ssaop.OpARM64MOVWUreg)
  9167  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9168  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9169  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9170  		v1.AddArg2(x, x)
  9171  		v0.AddArg2(a, v1)
  9172  		v.AddArg(v0)
  9173  		return true
  9174  	}
  9175  	// match: (MADDW a x (MOVDconst [c]))
  9176  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
  9177  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
  9178  	for {
  9179  		a := v_0
  9180  		x := v_1
  9181  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9182  			break
  9183  		}
  9184  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9185  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
  9186  			break
  9187  		}
  9188  		v.Reset(ssaop.OpARM64MOVWUreg)
  9189  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9190  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9191  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9192  		v1.AddArg2(x, x)
  9193  		v0.AddArg2(a, v1)
  9194  		v.AddArg(v0)
  9195  		return true
  9196  	}
  9197  	// match: (MADDW a x (MOVDconst [c]))
  9198  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
  9199  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
  9200  	for {
  9201  		a := v_0
  9202  		x := v_1
  9203  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9204  			break
  9205  		}
  9206  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9207  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
  9208  			break
  9209  		}
  9210  		v.Reset(ssaop.OpARM64MOVWUreg)
  9211  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9212  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9213  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9214  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9215  		v1.AddArg2(x, x)
  9216  		v0.AddArg2(a, v1)
  9217  		v.AddArg(v0)
  9218  		return true
  9219  	}
  9220  	// match: (MADDW a x (MOVDconst [c]))
  9221  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
  9222  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
  9223  	for {
  9224  		a := v_0
  9225  		x := v_1
  9226  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9227  			break
  9228  		}
  9229  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9230  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
  9231  			break
  9232  		}
  9233  		v.Reset(ssaop.OpARM64MOVWUreg)
  9234  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9235  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9236  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9237  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9238  		v1.AddArg2(x, x)
  9239  		v0.AddArg2(a, v1)
  9240  		v.AddArg(v0)
  9241  		return true
  9242  	}
  9243  	// match: (MADDW a x (MOVDconst [c]))
  9244  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
  9245  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
  9246  	for {
  9247  		a := v_0
  9248  		x := v_1
  9249  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9250  			break
  9251  		}
  9252  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9253  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
  9254  			break
  9255  		}
  9256  		v.Reset(ssaop.OpARM64MOVWUreg)
  9257  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9258  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9259  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9260  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9261  		v1.AddArg2(x, x)
  9262  		v0.AddArg2(a, v1)
  9263  		v.AddArg(v0)
  9264  		return true
  9265  	}
  9266  	// match: (MADDW a x (MOVDconst [c]))
  9267  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
  9268  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
  9269  	for {
  9270  		a := v_0
  9271  		x := v_1
  9272  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9273  			break
  9274  		}
  9275  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9276  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
  9277  			break
  9278  		}
  9279  		v.Reset(ssaop.OpARM64MOVWUreg)
  9280  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9281  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9282  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9283  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9284  		v1.AddArg2(x, x)
  9285  		v0.AddArg2(a, v1)
  9286  		v.AddArg(v0)
  9287  		return true
  9288  	}
  9289  	// match: (MADDW a (MOVDconst [c]) x)
  9290  	// cond: int32(c)==-1
  9291  	// result: (MOVWUreg (SUB <a.Type> a x))
  9292  	for {
  9293  		a := v_0
  9294  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9295  			break
  9296  		}
  9297  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9298  		x := v_2
  9299  		if !(int32(c) == -1) {
  9300  			break
  9301  		}
  9302  		v.Reset(ssaop.OpARM64MOVWUreg)
  9303  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9304  		v0.AddArg2(a, x)
  9305  		v.AddArg(v0)
  9306  		return true
  9307  	}
  9308  	// match: (MADDW a (MOVDconst [c]) _)
  9309  	// cond: int32(c)==0
  9310  	// result: (MOVWUreg a)
  9311  	for {
  9312  		a := v_0
  9313  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9314  			break
  9315  		}
  9316  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9317  		if !(int32(c) == 0) {
  9318  			break
  9319  		}
  9320  		v.Reset(ssaop.OpARM64MOVWUreg)
  9321  		v.AddArg(a)
  9322  		return true
  9323  	}
  9324  	// match: (MADDW a (MOVDconst [c]) x)
  9325  	// cond: int32(c)==1
  9326  	// result: (MOVWUreg (ADD <a.Type> a x))
  9327  	for {
  9328  		a := v_0
  9329  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9330  			break
  9331  		}
  9332  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9333  		x := v_2
  9334  		if !(int32(c) == 1) {
  9335  			break
  9336  		}
  9337  		v.Reset(ssaop.OpARM64MOVWUreg)
  9338  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9339  		v0.AddArg2(a, x)
  9340  		v.AddArg(v0)
  9341  		return true
  9342  	}
  9343  	// match: (MADDW a (MOVDconst [c]) x)
  9344  	// cond: ssa.IsPowerOfTwo(c)
  9345  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [ssa.Log64(c)]))
  9346  	for {
  9347  		a := v_0
  9348  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9349  			break
  9350  		}
  9351  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9352  		x := v_2
  9353  		if !(ssa.IsPowerOfTwo(c)) {
  9354  			break
  9355  		}
  9356  		v.Reset(ssaop.OpARM64MOVWUreg)
  9357  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9358  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9359  		v0.AddArg2(a, x)
  9360  		v.AddArg(v0)
  9361  		return true
  9362  	}
  9363  	// match: (MADDW a (MOVDconst [c]) x)
  9364  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
  9365  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9366  	for {
  9367  		a := v_0
  9368  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9369  			break
  9370  		}
  9371  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9372  		x := v_2
  9373  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9374  			break
  9375  		}
  9376  		v.Reset(ssaop.OpARM64MOVWUreg)
  9377  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9378  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9379  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9380  		v1.AddArg2(x, x)
  9381  		v0.AddArg2(a, v1)
  9382  		v.AddArg(v0)
  9383  		return true
  9384  	}
  9385  	// match: (MADDW a (MOVDconst [c]) x)
  9386  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
  9387  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
  9388  	for {
  9389  		a := v_0
  9390  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9391  			break
  9392  		}
  9393  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9394  		x := v_2
  9395  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
  9396  			break
  9397  		}
  9398  		v.Reset(ssaop.OpARM64MOVWUreg)
  9399  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9400  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9401  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9402  		v1.AddArg2(x, x)
  9403  		v0.AddArg2(a, v1)
  9404  		v.AddArg(v0)
  9405  		return true
  9406  	}
  9407  	// match: (MADDW a (MOVDconst [c]) x)
  9408  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
  9409  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
  9410  	for {
  9411  		a := v_0
  9412  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9413  			break
  9414  		}
  9415  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9416  		x := v_2
  9417  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
  9418  			break
  9419  		}
  9420  		v.Reset(ssaop.OpARM64MOVWUreg)
  9421  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9422  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9423  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9424  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9425  		v1.AddArg2(x, x)
  9426  		v0.AddArg2(a, v1)
  9427  		v.AddArg(v0)
  9428  		return true
  9429  	}
  9430  	// match: (MADDW a (MOVDconst [c]) x)
  9431  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
  9432  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
  9433  	for {
  9434  		a := v_0
  9435  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9436  			break
  9437  		}
  9438  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9439  		x := v_2
  9440  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
  9441  			break
  9442  		}
  9443  		v.Reset(ssaop.OpARM64MOVWUreg)
  9444  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9445  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9446  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9447  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9448  		v1.AddArg2(x, x)
  9449  		v0.AddArg2(a, v1)
  9450  		v.AddArg(v0)
  9451  		return true
  9452  	}
  9453  	// match: (MADDW a (MOVDconst [c]) x)
  9454  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
  9455  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
  9456  	for {
  9457  		a := v_0
  9458  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9459  			break
  9460  		}
  9461  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9462  		x := v_2
  9463  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
  9464  			break
  9465  		}
  9466  		v.Reset(ssaop.OpARM64MOVWUreg)
  9467  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9468  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9469  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9470  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9471  		v1.AddArg2(x, x)
  9472  		v0.AddArg2(a, v1)
  9473  		v.AddArg(v0)
  9474  		return true
  9475  	}
  9476  	// match: (MADDW a (MOVDconst [c]) x)
  9477  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
  9478  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
  9479  	for {
  9480  		a := v_0
  9481  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9482  			break
  9483  		}
  9484  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9485  		x := v_2
  9486  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
  9487  			break
  9488  		}
  9489  		v.Reset(ssaop.OpARM64MOVWUreg)
  9490  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9491  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9492  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9493  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9494  		v1.AddArg2(x, x)
  9495  		v0.AddArg2(a, v1)
  9496  		v.AddArg(v0)
  9497  		return true
  9498  	}
  9499  	// match: (MADDW (MOVDconst [c]) x y)
  9500  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MULW <x.Type> x y)))
  9501  	for {
  9502  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9503  			break
  9504  		}
  9505  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9506  		x := v_1
  9507  		y := v_2
  9508  		v.Reset(ssaop.OpARM64MOVWUreg)
  9509  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, x.Type)
  9510  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  9511  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  9512  		v1.AddArg2(x, y)
  9513  		v0.AddArg(v1)
  9514  		v.AddArg(v0)
  9515  		return true
  9516  	}
  9517  	// match: (MADDW a (MOVDconst [c]) (MOVDconst [d]))
  9518  	// result: (MOVWUreg (ADDconst <a.Type> [c*d] a))
  9519  	for {
  9520  		a := v_0
  9521  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9522  			break
  9523  		}
  9524  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9525  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9526  			break
  9527  		}
  9528  		d := ssa.AuxIntToInt64(v_2.AuxInt)
  9529  		v.Reset(ssaop.OpARM64MOVWUreg)
  9530  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, a.Type)
  9531  		v0.AuxInt = ssa.Int64ToAuxInt(c * d)
  9532  		v0.AddArg(a)
  9533  		v.AddArg(v0)
  9534  		return true
  9535  	}
  9536  	return false
  9537  }
  9538  func rewriteValue_OpARM64MNEG(v *ssa.Value) bool {
  9539  	v_1 := v.Args[1]
  9540  	v_0 := v.Args[0]
  9541  	b := v.Block
  9542  	// match: (MNEG x (MOVDconst [-1]))
  9543  	// result: x
  9544  	for {
  9545  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9546  			x := v_0
  9547  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  9548  				continue
  9549  			}
  9550  			v.CopyOf(x)
  9551  			return true
  9552  		}
  9553  		break
  9554  	}
  9555  	// match: (MNEG _ (MOVDconst [0]))
  9556  	// result: (MOVDconst [0])
  9557  	for {
  9558  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9559  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  9560  				continue
  9561  			}
  9562  			v.Reset(ssaop.OpARM64MOVDconst)
  9563  			v.AuxInt = ssa.Int64ToAuxInt(0)
  9564  			return true
  9565  		}
  9566  		break
  9567  	}
  9568  	// match: (MNEG x (MOVDconst [1]))
  9569  	// result: (NEG x)
  9570  	for {
  9571  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9572  			x := v_0
  9573  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  9574  				continue
  9575  			}
  9576  			v.Reset(ssaop.OpARM64NEG)
  9577  			v.AddArg(x)
  9578  			return true
  9579  		}
  9580  		break
  9581  	}
  9582  	// match: (MNEG x (MOVDconst [c]))
  9583  	// cond: ssa.IsPowerOfTwo(c)
  9584  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c)] x))
  9585  	for {
  9586  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9587  			x := v_0
  9588  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9589  				continue
  9590  			}
  9591  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9592  			if !(ssa.IsPowerOfTwo(c)) {
  9593  				continue
  9594  			}
  9595  			v.Reset(ssaop.OpARM64NEG)
  9596  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9597  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9598  			v0.AddArg(x)
  9599  			v.AddArg(v0)
  9600  			return true
  9601  		}
  9602  		break
  9603  	}
  9604  	// match: (MNEG x (MOVDconst [c]))
  9605  	// cond: ssa.IsPowerOfTwo(c-1) && c >= 3
  9606  	// result: (NEG (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  9607  	for {
  9608  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9609  			x := v_0
  9610  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9611  				continue
  9612  			}
  9613  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9614  			if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  9615  				continue
  9616  			}
  9617  			v.Reset(ssaop.OpARM64NEG)
  9618  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9619  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9620  			v0.AddArg2(x, x)
  9621  			v.AddArg(v0)
  9622  			return true
  9623  		}
  9624  		break
  9625  	}
  9626  	// match: (MNEG x (MOVDconst [c]))
  9627  	// cond: ssa.IsPowerOfTwo(c+1) && c >= 7
  9628  	// result: (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [ssa.Log64(c+1)]))
  9629  	for {
  9630  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9631  			x := v_0
  9632  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9633  				continue
  9634  			}
  9635  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9636  			if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  9637  				continue
  9638  			}
  9639  			v.Reset(ssaop.OpARM64NEG)
  9640  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9641  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9642  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9643  			v1.AddArg(x)
  9644  			v0.AddArg2(v1, x)
  9645  			v.AddArg(v0)
  9646  			return true
  9647  		}
  9648  		break
  9649  	}
  9650  	// match: (MNEG x (MOVDconst [c]))
  9651  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  9652  	// result: (SLLconst <x.Type> [ssa.Log64(c/3)] (SUBshiftLL <x.Type> x x [2]))
  9653  	for {
  9654  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9655  			x := v_0
  9656  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9657  				continue
  9658  			}
  9659  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9660  			if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  9661  				continue
  9662  			}
  9663  			v.Reset(ssaop.OpARM64SLLconst)
  9664  			v.Type = x.Type
  9665  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9666  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9667  			v0.AuxInt = ssa.Int64ToAuxInt(2)
  9668  			v0.AddArg2(x, x)
  9669  			v.AddArg(v0)
  9670  			return true
  9671  		}
  9672  		break
  9673  	}
  9674  	// match: (MNEG x (MOVDconst [c]))
  9675  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  9676  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c/5)] (ADDshiftLL <x.Type> x x [2])))
  9677  	for {
  9678  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9679  			x := v_0
  9680  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9681  				continue
  9682  			}
  9683  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9684  			if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  9685  				continue
  9686  			}
  9687  			v.Reset(ssaop.OpARM64NEG)
  9688  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9689  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9690  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9691  			v1.AuxInt = ssa.Int64ToAuxInt(2)
  9692  			v1.AddArg2(x, x)
  9693  			v0.AddArg(v1)
  9694  			v.AddArg(v0)
  9695  			return true
  9696  		}
  9697  		break
  9698  	}
  9699  	// match: (MNEG x (MOVDconst [c]))
  9700  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  9701  	// result: (SLLconst <x.Type> [ssa.Log64(c/7)] (SUBshiftLL <x.Type> x x [3]))
  9702  	for {
  9703  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9704  			x := v_0
  9705  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9706  				continue
  9707  			}
  9708  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9709  			if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  9710  				continue
  9711  			}
  9712  			v.Reset(ssaop.OpARM64SLLconst)
  9713  			v.Type = x.Type
  9714  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9715  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9716  			v0.AuxInt = ssa.Int64ToAuxInt(3)
  9717  			v0.AddArg2(x, x)
  9718  			v.AddArg(v0)
  9719  			return true
  9720  		}
  9721  		break
  9722  	}
  9723  	// match: (MNEG x (MOVDconst [c]))
  9724  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  9725  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c/9)] (ADDshiftLL <x.Type> x x [3])))
  9726  	for {
  9727  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9728  			x := v_0
  9729  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9730  				continue
  9731  			}
  9732  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9733  			if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  9734  				continue
  9735  			}
  9736  			v.Reset(ssaop.OpARM64NEG)
  9737  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9738  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9739  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9740  			v1.AuxInt = ssa.Int64ToAuxInt(3)
  9741  			v1.AddArg2(x, x)
  9742  			v0.AddArg(v1)
  9743  			v.AddArg(v0)
  9744  			return true
  9745  		}
  9746  		break
  9747  	}
  9748  	// match: (MNEG (MOVDconst [c]) (MOVDconst [d]))
  9749  	// result: (MOVDconst [-c*d])
  9750  	for {
  9751  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9752  			if v_0.Op != ssaop.OpARM64MOVDconst {
  9753  				continue
  9754  			}
  9755  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9756  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9757  				continue
  9758  			}
  9759  			d := ssa.AuxIntToInt64(v_1.AuxInt)
  9760  			v.Reset(ssaop.OpARM64MOVDconst)
  9761  			v.AuxInt = ssa.Int64ToAuxInt(-c * d)
  9762  			return true
  9763  		}
  9764  		break
  9765  	}
  9766  	return false
  9767  }
  9768  func rewriteValue_OpARM64MNEGW(v *ssa.Value) bool {
  9769  	v_1 := v.Args[1]
  9770  	v_0 := v.Args[0]
  9771  	b := v.Block
  9772  	// match: (MNEGW x (MOVDconst [c]))
  9773  	// cond: int32(c)==-1
  9774  	// result: (MOVWUreg x)
  9775  	for {
  9776  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9777  			x := v_0
  9778  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9779  				continue
  9780  			}
  9781  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9782  			if !(int32(c) == -1) {
  9783  				continue
  9784  			}
  9785  			v.Reset(ssaop.OpARM64MOVWUreg)
  9786  			v.AddArg(x)
  9787  			return true
  9788  		}
  9789  		break
  9790  	}
  9791  	// match: (MNEGW _ (MOVDconst [c]))
  9792  	// cond: int32(c)==0
  9793  	// result: (MOVDconst [0])
  9794  	for {
  9795  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9796  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9797  				continue
  9798  			}
  9799  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9800  			if !(int32(c) == 0) {
  9801  				continue
  9802  			}
  9803  			v.Reset(ssaop.OpARM64MOVDconst)
  9804  			v.AuxInt = ssa.Int64ToAuxInt(0)
  9805  			return true
  9806  		}
  9807  		break
  9808  	}
  9809  	// match: (MNEGW x (MOVDconst [c]))
  9810  	// cond: int32(c)==1
  9811  	// result: (MOVWUreg (NEG <x.Type> x))
  9812  	for {
  9813  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9814  			x := v_0
  9815  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9816  				continue
  9817  			}
  9818  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9819  			if !(int32(c) == 1) {
  9820  				continue
  9821  			}
  9822  			v.Reset(ssaop.OpARM64MOVWUreg)
  9823  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9824  			v0.AddArg(x)
  9825  			v.AddArg(v0)
  9826  			return true
  9827  		}
  9828  		break
  9829  	}
  9830  	// match: (MNEGW x (MOVDconst [c]))
  9831  	// cond: ssa.IsPowerOfTwo(c)
  9832  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c)] x))
  9833  	for {
  9834  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9835  			x := v_0
  9836  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9837  				continue
  9838  			}
  9839  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9840  			if !(ssa.IsPowerOfTwo(c)) {
  9841  				continue
  9842  			}
  9843  			v.Reset(ssaop.OpARM64NEG)
  9844  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9845  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9846  			v0.AddArg(x)
  9847  			v.AddArg(v0)
  9848  			return true
  9849  		}
  9850  		break
  9851  	}
  9852  	// match: (MNEGW x (MOVDconst [c]))
  9853  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c) >= 3
  9854  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9855  	for {
  9856  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9857  			x := v_0
  9858  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9859  				continue
  9860  			}
  9861  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9862  			if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9863  				continue
  9864  			}
  9865  			v.Reset(ssaop.OpARM64MOVWUreg)
  9866  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9867  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9868  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9869  			v1.AddArg2(x, x)
  9870  			v0.AddArg(v1)
  9871  			v.AddArg(v0)
  9872  			return true
  9873  		}
  9874  		break
  9875  	}
  9876  	// match: (MNEGW x (MOVDconst [c]))
  9877  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c) >= 7
  9878  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> (NEG <x.Type> x) x [ssa.Log64(c+1)])))
  9879  	for {
  9880  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9881  			x := v_0
  9882  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9883  				continue
  9884  			}
  9885  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9886  			if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
  9887  				continue
  9888  			}
  9889  			v.Reset(ssaop.OpARM64MOVWUreg)
  9890  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9891  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9892  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9893  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9894  			v2.AddArg(x)
  9895  			v1.AddArg2(v2, x)
  9896  			v0.AddArg(v1)
  9897  			v.AddArg(v0)
  9898  			return true
  9899  		}
  9900  		break
  9901  	}
  9902  	// match: (MNEGW x (MOVDconst [c]))
  9903  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
  9904  	// result: (MOVWUreg (SLLconst <x.Type> [ssa.Log64(c/3)] (SUBshiftLL <x.Type> x x [2])))
  9905  	for {
  9906  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9907  			x := v_0
  9908  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9909  				continue
  9910  			}
  9911  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9912  			if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
  9913  				continue
  9914  			}
  9915  			v.Reset(ssaop.OpARM64MOVWUreg)
  9916  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9917  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9918  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9919  			v1.AuxInt = ssa.Int64ToAuxInt(2)
  9920  			v1.AddArg2(x, x)
  9921  			v0.AddArg(v1)
  9922  			v.AddArg(v0)
  9923  			return true
  9924  		}
  9925  		break
  9926  	}
  9927  	// match: (MNEGW x (MOVDconst [c]))
  9928  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
  9929  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [ssa.Log64(c/5)] (ADDshiftLL <x.Type> x x [2]))))
  9930  	for {
  9931  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9932  			x := v_0
  9933  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9934  				continue
  9935  			}
  9936  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9937  			if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
  9938  				continue
  9939  			}
  9940  			v.Reset(ssaop.OpARM64MOVWUreg)
  9941  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9942  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9943  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9944  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9945  			v2.AuxInt = ssa.Int64ToAuxInt(2)
  9946  			v2.AddArg2(x, x)
  9947  			v1.AddArg(v2)
  9948  			v0.AddArg(v1)
  9949  			v.AddArg(v0)
  9950  			return true
  9951  		}
  9952  		break
  9953  	}
  9954  	// match: (MNEGW x (MOVDconst [c]))
  9955  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
  9956  	// result: (MOVWUreg (SLLconst <x.Type> [ssa.Log64(c/7)] (SUBshiftLL <x.Type> x x [3])))
  9957  	for {
  9958  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9959  			x := v_0
  9960  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9961  				continue
  9962  			}
  9963  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9964  			if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
  9965  				continue
  9966  			}
  9967  			v.Reset(ssaop.OpARM64MOVWUreg)
  9968  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9969  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9970  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9971  			v1.AuxInt = ssa.Int64ToAuxInt(3)
  9972  			v1.AddArg2(x, x)
  9973  			v0.AddArg(v1)
  9974  			v.AddArg(v0)
  9975  			return true
  9976  		}
  9977  		break
  9978  	}
  9979  	// match: (MNEGW x (MOVDconst [c]))
  9980  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
  9981  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [ssa.Log64(c/9)] (ADDshiftLL <x.Type> x x [3]))))
  9982  	for {
  9983  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9984  			x := v_0
  9985  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9986  				continue
  9987  			}
  9988  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9989  			if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
  9990  				continue
  9991  			}
  9992  			v.Reset(ssaop.OpARM64MOVWUreg)
  9993  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9994  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9995  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9996  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9997  			v2.AuxInt = ssa.Int64ToAuxInt(3)
  9998  			v2.AddArg2(x, x)
  9999  			v1.AddArg(v2)
 10000  			v0.AddArg(v1)
 10001  			v.AddArg(v0)
 10002  			return true
 10003  		}
 10004  		break
 10005  	}
 10006  	// match: (MNEGW (MOVDconst [c]) (MOVDconst [d]))
 10007  	// result: (MOVDconst [int64(uint32(-c*d))])
 10008  	for {
 10009  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10010  			if v_0.Op != ssaop.OpARM64MOVDconst {
 10011  				continue
 10012  			}
 10013  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 10014  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10015  				continue
 10016  			}
 10017  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 10018  			v.Reset(ssaop.OpARM64MOVDconst)
 10019  			v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(-c * d)))
 10020  			return true
 10021  		}
 10022  		break
 10023  	}
 10024  	return false
 10025  }
 10026  func rewriteValue_OpARM64MOD(v *ssa.Value) bool {
 10027  	v_1 := v.Args[1]
 10028  	v_0 := v.Args[0]
 10029  	// match: (MOD (MOVDconst [c]) (MOVDconst [d]))
 10030  	// cond: d != 0
 10031  	// result: (MOVDconst [c%d])
 10032  	for {
 10033  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10034  			break
 10035  		}
 10036  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10037  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10038  			break
 10039  		}
 10040  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 10041  		if !(d != 0) {
 10042  			break
 10043  		}
 10044  		v.Reset(ssaop.OpARM64MOVDconst)
 10045  		v.AuxInt = ssa.Int64ToAuxInt(c % d)
 10046  		return true
 10047  	}
 10048  	return false
 10049  }
 10050  func rewriteValue_OpARM64MODW(v *ssa.Value) bool {
 10051  	v_1 := v.Args[1]
 10052  	v_0 := v.Args[0]
 10053  	// match: (MODW (MOVDconst [c]) (MOVDconst [d]))
 10054  	// cond: d != 0
 10055  	// result: (MOVDconst [int64(uint32(int32(c)%int32(d)))])
 10056  	for {
 10057  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10058  			break
 10059  		}
 10060  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10061  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10062  			break
 10063  		}
 10064  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 10065  		if !(d != 0) {
 10066  			break
 10067  		}
 10068  		v.Reset(ssaop.OpARM64MOVDconst)
 10069  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(int32(c) % int32(d))))
 10070  		return true
 10071  	}
 10072  	return false
 10073  }
 10074  func rewriteValue_OpARM64MOVBUload(v *ssa.Value) bool {
 10075  	v_1 := v.Args[1]
 10076  	v_0 := v.Args[0]
 10077  	b := v.Block
 10078  	config := b.Func.Config
 10079  	// match: (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem)
 10080  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10081  	// result: (MOVBUload [off1+int32(off2)] {sym} ptr mem)
 10082  	for {
 10083  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10084  		sym := ssa.AuxToSym(v.Aux)
 10085  		if v_0.Op != ssaop.OpARM64ADDconst {
 10086  			break
 10087  		}
 10088  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10089  		ptr := v_0.Args[0]
 10090  		mem := v_1
 10091  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10092  			break
 10093  		}
 10094  		v.Reset(ssaop.OpARM64MOVBUload)
 10095  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10096  		v.Aux = ssa.SymToAux(sym)
 10097  		v.AddArg2(ptr, mem)
 10098  		return true
 10099  	}
 10100  	// match: (MOVBUload [off] {sym} (ADD ptr idx) mem)
 10101  	// cond: off == 0 && sym == nil
 10102  	// result: (MOVBUloadidx ptr idx mem)
 10103  	for {
 10104  		off := ssa.AuxIntToInt32(v.AuxInt)
 10105  		sym := ssa.AuxToSym(v.Aux)
 10106  		if v_0.Op != ssaop.OpARM64ADD {
 10107  			break
 10108  		}
 10109  		idx := v_0.Args[1]
 10110  		ptr := v_0.Args[0]
 10111  		mem := v_1
 10112  		if !(off == 0 && sym == nil) {
 10113  			break
 10114  		}
 10115  		v.Reset(ssaop.OpARM64MOVBUloadidx)
 10116  		v.AddArg3(ptr, idx, mem)
 10117  		return true
 10118  	}
 10119  	// match: (MOVBUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10120  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10121  	// result: (MOVBUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10122  	for {
 10123  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10124  		sym1 := ssa.AuxToSym(v.Aux)
 10125  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10126  			break
 10127  		}
 10128  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10129  		sym2 := ssa.AuxToSym(v_0.Aux)
 10130  		ptr := v_0.Args[0]
 10131  		mem := v_1
 10132  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10133  			break
 10134  		}
 10135  		v.Reset(ssaop.OpARM64MOVBUload)
 10136  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10137  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10138  		v.AddArg2(ptr, mem)
 10139  		return true
 10140  	}
 10141  	// match: (MOVBUload [off] {sym} (SB) _)
 10142  	// cond: ssa.SymIsRO(sym)
 10143  	// result: (MOVDconst [int64(ssa.Read8(sym, int64(off)))])
 10144  	for {
 10145  		off := ssa.AuxIntToInt32(v.AuxInt)
 10146  		sym := ssa.AuxToSym(v.Aux)
 10147  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10148  			break
 10149  		}
 10150  		v.Reset(ssaop.OpARM64MOVDconst)
 10151  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read8(sym, int64(off))))
 10152  		return true
 10153  	}
 10154  	return false
 10155  }
 10156  func rewriteValue_OpARM64MOVBUloadidx(v *ssa.Value) bool {
 10157  	v_2 := v.Args[2]
 10158  	v_1 := v.Args[1]
 10159  	v_0 := v.Args[0]
 10160  	// match: (MOVBUloadidx ptr (MOVDconst [c]) mem)
 10161  	// cond: ssa.Is32Bit(c)
 10162  	// result: (MOVBUload [int32(c)] ptr mem)
 10163  	for {
 10164  		ptr := v_0
 10165  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10166  			break
 10167  		}
 10168  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10169  		mem := v_2
 10170  		if !(ssa.Is32Bit(c)) {
 10171  			break
 10172  		}
 10173  		v.Reset(ssaop.OpARM64MOVBUload)
 10174  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10175  		v.AddArg2(ptr, mem)
 10176  		return true
 10177  	}
 10178  	// match: (MOVBUloadidx (MOVDconst [c]) ptr mem)
 10179  	// cond: ssa.Is32Bit(c)
 10180  	// result: (MOVBUload [int32(c)] ptr mem)
 10181  	for {
 10182  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10183  			break
 10184  		}
 10185  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10186  		ptr := v_1
 10187  		mem := v_2
 10188  		if !(ssa.Is32Bit(c)) {
 10189  			break
 10190  		}
 10191  		v.Reset(ssaop.OpARM64MOVBUload)
 10192  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10193  		v.AddArg2(ptr, mem)
 10194  		return true
 10195  	}
 10196  	return false
 10197  }
 10198  func rewriteValue_OpARM64MOVBUreg(v *ssa.Value) bool {
 10199  	v_0 := v.Args[0]
 10200  	// match: (MOVBUreg (ANDconst [c] x))
 10201  	// result: (ANDconst [c&(1<<8-1)] x)
 10202  	for {
 10203  		if v_0.Op != ssaop.OpARM64ANDconst {
 10204  			break
 10205  		}
 10206  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10207  		x := v_0.Args[0]
 10208  		v.Reset(ssaop.OpARM64ANDconst)
 10209  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<8 - 1))
 10210  		v.AddArg(x)
 10211  		return true
 10212  	}
 10213  	// match: (MOVBUreg (MOVDconst [c]))
 10214  	// result: (MOVDconst [int64(uint8(c))])
 10215  	for {
 10216  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10217  			break
 10218  		}
 10219  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10220  		v.Reset(ssaop.OpARM64MOVDconst)
 10221  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint8(c)))
 10222  		return true
 10223  	}
 10224  	// match: (MOVBUreg x)
 10225  	// cond: v.Type.Size() <= 1
 10226  	// result: x
 10227  	for {
 10228  		x := v_0
 10229  		if !(v.Type.Size() <= 1) {
 10230  			break
 10231  		}
 10232  		v.CopyOf(x)
 10233  		return true
 10234  	}
 10235  	// match: (MOVBUreg (SLLconst [lc] x))
 10236  	// cond: lc >= 8
 10237  	// result: (MOVDconst [0])
 10238  	for {
 10239  		if v_0.Op != ssaop.OpARM64SLLconst {
 10240  			break
 10241  		}
 10242  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10243  		if !(lc >= 8) {
 10244  			break
 10245  		}
 10246  		v.Reset(ssaop.OpARM64MOVDconst)
 10247  		v.AuxInt = ssa.Int64ToAuxInt(0)
 10248  		return true
 10249  	}
 10250  	// match: (MOVBUreg (SLLconst [lc] x))
 10251  	// cond: lc < 8
 10252  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 8-lc)] x)
 10253  	for {
 10254  		if v_0.Op != ssaop.OpARM64SLLconst {
 10255  			break
 10256  		}
 10257  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10258  		x := v_0.Args[0]
 10259  		if !(lc < 8) {
 10260  			break
 10261  		}
 10262  		v.Reset(ssaop.OpARM64UBFIZ)
 10263  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 8-lc))
 10264  		v.AddArg(x)
 10265  		return true
 10266  	}
 10267  	// match: (MOVBUreg (SRLconst [rc] x))
 10268  	// cond: rc < 8
 10269  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 8)] x)
 10270  	for {
 10271  		if v_0.Op != ssaop.OpARM64SRLconst {
 10272  			break
 10273  		}
 10274  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 10275  		x := v_0.Args[0]
 10276  		if !(rc < 8) {
 10277  			break
 10278  		}
 10279  		v.Reset(ssaop.OpARM64UBFX)
 10280  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8))
 10281  		v.AddArg(x)
 10282  		return true
 10283  	}
 10284  	// match: (MOVBUreg (UBFX [bfc] x))
 10285  	// cond: bfc.Width() <= 8
 10286  	// result: (UBFX [bfc] x)
 10287  	for {
 10288  		if v_0.Op != ssaop.OpARM64UBFX {
 10289  			break
 10290  		}
 10291  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 10292  		x := v_0.Args[0]
 10293  		if !(bfc.Width() <= 8) {
 10294  			break
 10295  		}
 10296  		v.Reset(ssaop.OpARM64UBFX)
 10297  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 10298  		v.AddArg(x)
 10299  		return true
 10300  	}
 10301  	return false
 10302  }
 10303  func rewriteValue_OpARM64MOVBload(v *ssa.Value) bool {
 10304  	v_1 := v.Args[1]
 10305  	v_0 := v.Args[0]
 10306  	b := v.Block
 10307  	config := b.Func.Config
 10308  	// match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem)
 10309  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10310  	// result: (MOVBload [off1+int32(off2)] {sym} ptr mem)
 10311  	for {
 10312  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10313  		sym := ssa.AuxToSym(v.Aux)
 10314  		if v_0.Op != ssaop.OpARM64ADDconst {
 10315  			break
 10316  		}
 10317  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10318  		ptr := v_0.Args[0]
 10319  		mem := v_1
 10320  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10321  			break
 10322  		}
 10323  		v.Reset(ssaop.OpARM64MOVBload)
 10324  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10325  		v.Aux = ssa.SymToAux(sym)
 10326  		v.AddArg2(ptr, mem)
 10327  		return true
 10328  	}
 10329  	// match: (MOVBload [off] {sym} (ADD ptr idx) mem)
 10330  	// cond: off == 0 && sym == nil
 10331  	// result: (MOVBloadidx ptr idx mem)
 10332  	for {
 10333  		off := ssa.AuxIntToInt32(v.AuxInt)
 10334  		sym := ssa.AuxToSym(v.Aux)
 10335  		if v_0.Op != ssaop.OpARM64ADD {
 10336  			break
 10337  		}
 10338  		idx := v_0.Args[1]
 10339  		ptr := v_0.Args[0]
 10340  		mem := v_1
 10341  		if !(off == 0 && sym == nil) {
 10342  			break
 10343  		}
 10344  		v.Reset(ssaop.OpARM64MOVBloadidx)
 10345  		v.AddArg3(ptr, idx, mem)
 10346  		return true
 10347  	}
 10348  	// match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10349  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10350  	// result: (MOVBload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10351  	for {
 10352  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10353  		sym1 := ssa.AuxToSym(v.Aux)
 10354  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10355  			break
 10356  		}
 10357  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10358  		sym2 := ssa.AuxToSym(v_0.Aux)
 10359  		ptr := v_0.Args[0]
 10360  		mem := v_1
 10361  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10362  			break
 10363  		}
 10364  		v.Reset(ssaop.OpARM64MOVBload)
 10365  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10366  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10367  		v.AddArg2(ptr, mem)
 10368  		return true
 10369  	}
 10370  	// match: (MOVBload [off] {sym} (SB) _)
 10371  	// cond: ssa.SymIsRO(sym)
 10372  	// result: (MOVDconst [int64(int8(ssa.Read8(sym, int64(off))))])
 10373  	for {
 10374  		off := ssa.AuxIntToInt32(v.AuxInt)
 10375  		sym := ssa.AuxToSym(v.Aux)
 10376  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10377  			break
 10378  		}
 10379  		v.Reset(ssaop.OpARM64MOVDconst)
 10380  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(ssa.Read8(sym, int64(off)))))
 10381  		return true
 10382  	}
 10383  	return false
 10384  }
 10385  func rewriteValue_OpARM64MOVBloadidx(v *ssa.Value) bool {
 10386  	v_2 := v.Args[2]
 10387  	v_1 := v.Args[1]
 10388  	v_0 := v.Args[0]
 10389  	// match: (MOVBloadidx ptr (MOVDconst [c]) mem)
 10390  	// cond: ssa.Is32Bit(c)
 10391  	// result: (MOVBload [int32(c)] ptr mem)
 10392  	for {
 10393  		ptr := v_0
 10394  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10395  			break
 10396  		}
 10397  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10398  		mem := v_2
 10399  		if !(ssa.Is32Bit(c)) {
 10400  			break
 10401  		}
 10402  		v.Reset(ssaop.OpARM64MOVBload)
 10403  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10404  		v.AddArg2(ptr, mem)
 10405  		return true
 10406  	}
 10407  	// match: (MOVBloadidx (MOVDconst [c]) ptr mem)
 10408  	// cond: ssa.Is32Bit(c)
 10409  	// result: (MOVBload [int32(c)] ptr mem)
 10410  	for {
 10411  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10412  			break
 10413  		}
 10414  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10415  		ptr := v_1
 10416  		mem := v_2
 10417  		if !(ssa.Is32Bit(c)) {
 10418  			break
 10419  		}
 10420  		v.Reset(ssaop.OpARM64MOVBload)
 10421  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10422  		v.AddArg2(ptr, mem)
 10423  		return true
 10424  	}
 10425  	return false
 10426  }
 10427  func rewriteValue_OpARM64MOVBreg(v *ssa.Value) bool {
 10428  	v_0 := v.Args[0]
 10429  	// match: (MOVBreg (MOVDconst [c]))
 10430  	// result: (MOVDconst [int64(int8(c))])
 10431  	for {
 10432  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10433  			break
 10434  		}
 10435  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10436  		v.Reset(ssaop.OpARM64MOVDconst)
 10437  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(c)))
 10438  		return true
 10439  	}
 10440  	// match: (MOVBreg x)
 10441  	// cond: v.Type.Size() <= 1
 10442  	// result: x
 10443  	for {
 10444  		x := v_0
 10445  		if !(v.Type.Size() <= 1) {
 10446  			break
 10447  		}
 10448  		v.CopyOf(x)
 10449  		return true
 10450  	}
 10451  	// match: (MOVBreg <t> (ANDconst x [c]))
 10452  	// cond: uint64(c) & uint64(0xffffffffffffff80) == 0
 10453  	// result: (ANDconst <t> x [c])
 10454  	for {
 10455  		t := v.Type
 10456  		if v_0.Op != ssaop.OpARM64ANDconst {
 10457  			break
 10458  		}
 10459  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10460  		x := v_0.Args[0]
 10461  		if !(uint64(c)&uint64(0xffffffffffffff80) == 0) {
 10462  			break
 10463  		}
 10464  		v.Reset(ssaop.OpARM64ANDconst)
 10465  		v.Type = t
 10466  		v.AuxInt = ssa.Int64ToAuxInt(c)
 10467  		v.AddArg(x)
 10468  		return true
 10469  	}
 10470  	// match: (MOVBreg (SLLconst [lc] x))
 10471  	// cond: lc < 8
 10472  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 8-lc)] x)
 10473  	for {
 10474  		if v_0.Op != ssaop.OpARM64SLLconst {
 10475  			break
 10476  		}
 10477  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10478  		x := v_0.Args[0]
 10479  		if !(lc < 8) {
 10480  			break
 10481  		}
 10482  		v.Reset(ssaop.OpARM64SBFIZ)
 10483  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 8-lc))
 10484  		v.AddArg(x)
 10485  		return true
 10486  	}
 10487  	// match: (MOVBreg (SBFX [bfc] x))
 10488  	// cond: bfc.Width() <= 8
 10489  	// result: (SBFX [bfc] x)
 10490  	for {
 10491  		if v_0.Op != ssaop.OpARM64SBFX {
 10492  			break
 10493  		}
 10494  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 10495  		x := v_0.Args[0]
 10496  		if !(bfc.Width() <= 8) {
 10497  			break
 10498  		}
 10499  		v.Reset(ssaop.OpARM64SBFX)
 10500  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 10501  		v.AddArg(x)
 10502  		return true
 10503  	}
 10504  	return false
 10505  }
 10506  func rewriteValue_OpARM64MOVBstore(v *ssa.Value) bool {
 10507  	v_2 := v.Args[2]
 10508  	v_1 := v.Args[1]
 10509  	v_0 := v.Args[0]
 10510  	b := v.Block
 10511  	config := b.Func.Config
 10512  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 10513  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10514  	// result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem)
 10515  	for {
 10516  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10517  		sym := ssa.AuxToSym(v.Aux)
 10518  		if v_0.Op != ssaop.OpARM64ADDconst {
 10519  			break
 10520  		}
 10521  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10522  		ptr := v_0.Args[0]
 10523  		val := v_1
 10524  		mem := v_2
 10525  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10526  			break
 10527  		}
 10528  		v.Reset(ssaop.OpARM64MOVBstore)
 10529  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10530  		v.Aux = ssa.SymToAux(sym)
 10531  		v.AddArg3(ptr, val, mem)
 10532  		return true
 10533  	}
 10534  	// match: (MOVBstore [off] {sym} (ADD ptr idx) val mem)
 10535  	// cond: off == 0 && sym == nil
 10536  	// result: (MOVBstoreidx ptr idx val mem)
 10537  	for {
 10538  		off := ssa.AuxIntToInt32(v.AuxInt)
 10539  		sym := ssa.AuxToSym(v.Aux)
 10540  		if v_0.Op != ssaop.OpARM64ADD {
 10541  			break
 10542  		}
 10543  		idx := v_0.Args[1]
 10544  		ptr := v_0.Args[0]
 10545  		val := v_1
 10546  		mem := v_2
 10547  		if !(off == 0 && sym == nil) {
 10548  			break
 10549  		}
 10550  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10551  		v.AddArg4(ptr, idx, val, mem)
 10552  		return true
 10553  	}
 10554  	// match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 10555  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10556  	// result: (MOVBstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 10557  	for {
 10558  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10559  		sym1 := ssa.AuxToSym(v.Aux)
 10560  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10561  			break
 10562  		}
 10563  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10564  		sym2 := ssa.AuxToSym(v_0.Aux)
 10565  		ptr := v_0.Args[0]
 10566  		val := v_1
 10567  		mem := v_2
 10568  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10569  			break
 10570  		}
 10571  		v.Reset(ssaop.OpARM64MOVBstore)
 10572  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10573  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10574  		v.AddArg3(ptr, val, mem)
 10575  		return true
 10576  	}
 10577  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
 10578  	// result: (MOVBstore [off] {sym} ptr x mem)
 10579  	for {
 10580  		off := ssa.AuxIntToInt32(v.AuxInt)
 10581  		sym := ssa.AuxToSym(v.Aux)
 10582  		ptr := v_0
 10583  		if v_1.Op != ssaop.OpARM64MOVBreg {
 10584  			break
 10585  		}
 10586  		x := v_1.Args[0]
 10587  		mem := v_2
 10588  		v.Reset(ssaop.OpARM64MOVBstore)
 10589  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10590  		v.Aux = ssa.SymToAux(sym)
 10591  		v.AddArg3(ptr, x, mem)
 10592  		return true
 10593  	}
 10594  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
 10595  	// result: (MOVBstore [off] {sym} ptr x mem)
 10596  	for {
 10597  		off := ssa.AuxIntToInt32(v.AuxInt)
 10598  		sym := ssa.AuxToSym(v.Aux)
 10599  		ptr := v_0
 10600  		if v_1.Op != ssaop.OpARM64MOVBUreg {
 10601  			break
 10602  		}
 10603  		x := v_1.Args[0]
 10604  		mem := v_2
 10605  		v.Reset(ssaop.OpARM64MOVBstore)
 10606  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10607  		v.Aux = ssa.SymToAux(sym)
 10608  		v.AddArg3(ptr, x, mem)
 10609  		return true
 10610  	}
 10611  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
 10612  	// result: (MOVBstore [off] {sym} ptr x mem)
 10613  	for {
 10614  		off := ssa.AuxIntToInt32(v.AuxInt)
 10615  		sym := ssa.AuxToSym(v.Aux)
 10616  		ptr := v_0
 10617  		if v_1.Op != ssaop.OpARM64MOVHreg {
 10618  			break
 10619  		}
 10620  		x := v_1.Args[0]
 10621  		mem := v_2
 10622  		v.Reset(ssaop.OpARM64MOVBstore)
 10623  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10624  		v.Aux = ssa.SymToAux(sym)
 10625  		v.AddArg3(ptr, x, mem)
 10626  		return true
 10627  	}
 10628  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
 10629  	// result: (MOVBstore [off] {sym} ptr x mem)
 10630  	for {
 10631  		off := ssa.AuxIntToInt32(v.AuxInt)
 10632  		sym := ssa.AuxToSym(v.Aux)
 10633  		ptr := v_0
 10634  		if v_1.Op != ssaop.OpARM64MOVHUreg {
 10635  			break
 10636  		}
 10637  		x := v_1.Args[0]
 10638  		mem := v_2
 10639  		v.Reset(ssaop.OpARM64MOVBstore)
 10640  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10641  		v.Aux = ssa.SymToAux(sym)
 10642  		v.AddArg3(ptr, x, mem)
 10643  		return true
 10644  	}
 10645  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
 10646  	// result: (MOVBstore [off] {sym} ptr x mem)
 10647  	for {
 10648  		off := ssa.AuxIntToInt32(v.AuxInt)
 10649  		sym := ssa.AuxToSym(v.Aux)
 10650  		ptr := v_0
 10651  		if v_1.Op != ssaop.OpARM64MOVWreg {
 10652  			break
 10653  		}
 10654  		x := v_1.Args[0]
 10655  		mem := v_2
 10656  		v.Reset(ssaop.OpARM64MOVBstore)
 10657  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10658  		v.Aux = ssa.SymToAux(sym)
 10659  		v.AddArg3(ptr, x, mem)
 10660  		return true
 10661  	}
 10662  	// match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem)
 10663  	// result: (MOVBstore [off] {sym} ptr x mem)
 10664  	for {
 10665  		off := ssa.AuxIntToInt32(v.AuxInt)
 10666  		sym := ssa.AuxToSym(v.Aux)
 10667  		ptr := v_0
 10668  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 10669  			break
 10670  		}
 10671  		x := v_1.Args[0]
 10672  		mem := v_2
 10673  		v.Reset(ssaop.OpARM64MOVBstore)
 10674  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10675  		v.Aux = ssa.SymToAux(sym)
 10676  		v.AddArg3(ptr, x, mem)
 10677  		return true
 10678  	}
 10679  	return false
 10680  }
 10681  func rewriteValue_OpARM64MOVBstoreidx(v *ssa.Value) bool {
 10682  	v_3 := v.Args[3]
 10683  	v_2 := v.Args[2]
 10684  	v_1 := v.Args[1]
 10685  	v_0 := v.Args[0]
 10686  	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
 10687  	// cond: ssa.Is32Bit(c)
 10688  	// result: (MOVBstore [int32(c)] ptr val mem)
 10689  	for {
 10690  		ptr := v_0
 10691  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10692  			break
 10693  		}
 10694  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10695  		val := v_2
 10696  		mem := v_3
 10697  		if !(ssa.Is32Bit(c)) {
 10698  			break
 10699  		}
 10700  		v.Reset(ssaop.OpARM64MOVBstore)
 10701  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10702  		v.AddArg3(ptr, val, mem)
 10703  		return true
 10704  	}
 10705  	// match: (MOVBstoreidx (MOVDconst [c]) idx val mem)
 10706  	// cond: ssa.Is32Bit(c)
 10707  	// result: (MOVBstore [int32(c)] idx val mem)
 10708  	for {
 10709  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10710  			break
 10711  		}
 10712  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10713  		idx := v_1
 10714  		val := v_2
 10715  		mem := v_3
 10716  		if !(ssa.Is32Bit(c)) {
 10717  			break
 10718  		}
 10719  		v.Reset(ssaop.OpARM64MOVBstore)
 10720  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10721  		v.AddArg3(idx, val, mem)
 10722  		return true
 10723  	}
 10724  	// match: (MOVBstoreidx ptr idx (MOVBreg x) mem)
 10725  	// result: (MOVBstoreidx ptr idx x mem)
 10726  	for {
 10727  		ptr := v_0
 10728  		idx := v_1
 10729  		if v_2.Op != ssaop.OpARM64MOVBreg {
 10730  			break
 10731  		}
 10732  		x := v_2.Args[0]
 10733  		mem := v_3
 10734  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10735  		v.AddArg4(ptr, idx, x, mem)
 10736  		return true
 10737  	}
 10738  	// match: (MOVBstoreidx ptr idx (MOVBUreg x) mem)
 10739  	// result: (MOVBstoreidx ptr idx x mem)
 10740  	for {
 10741  		ptr := v_0
 10742  		idx := v_1
 10743  		if v_2.Op != ssaop.OpARM64MOVBUreg {
 10744  			break
 10745  		}
 10746  		x := v_2.Args[0]
 10747  		mem := v_3
 10748  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10749  		v.AddArg4(ptr, idx, x, mem)
 10750  		return true
 10751  	}
 10752  	// match: (MOVBstoreidx ptr idx (MOVHreg x) mem)
 10753  	// result: (MOVBstoreidx ptr idx x mem)
 10754  	for {
 10755  		ptr := v_0
 10756  		idx := v_1
 10757  		if v_2.Op != ssaop.OpARM64MOVHreg {
 10758  			break
 10759  		}
 10760  		x := v_2.Args[0]
 10761  		mem := v_3
 10762  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10763  		v.AddArg4(ptr, idx, x, mem)
 10764  		return true
 10765  	}
 10766  	// match: (MOVBstoreidx ptr idx (MOVHUreg x) mem)
 10767  	// result: (MOVBstoreidx ptr idx x mem)
 10768  	for {
 10769  		ptr := v_0
 10770  		idx := v_1
 10771  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 10772  			break
 10773  		}
 10774  		x := v_2.Args[0]
 10775  		mem := v_3
 10776  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10777  		v.AddArg4(ptr, idx, x, mem)
 10778  		return true
 10779  	}
 10780  	// match: (MOVBstoreidx ptr idx (MOVWreg x) mem)
 10781  	// result: (MOVBstoreidx ptr idx x mem)
 10782  	for {
 10783  		ptr := v_0
 10784  		idx := v_1
 10785  		if v_2.Op != ssaop.OpARM64MOVWreg {
 10786  			break
 10787  		}
 10788  		x := v_2.Args[0]
 10789  		mem := v_3
 10790  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10791  		v.AddArg4(ptr, idx, x, mem)
 10792  		return true
 10793  	}
 10794  	// match: (MOVBstoreidx ptr idx (MOVWUreg x) mem)
 10795  	// result: (MOVBstoreidx ptr idx x mem)
 10796  	for {
 10797  		ptr := v_0
 10798  		idx := v_1
 10799  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 10800  			break
 10801  		}
 10802  		x := v_2.Args[0]
 10803  		mem := v_3
 10804  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10805  		v.AddArg4(ptr, idx, x, mem)
 10806  		return true
 10807  	}
 10808  	return false
 10809  }
 10810  func rewriteValue_OpARM64MOVDload(v *ssa.Value) bool {
 10811  	v_1 := v.Args[1]
 10812  	v_0 := v.Args[0]
 10813  	b := v.Block
 10814  	config := b.Func.Config
 10815  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr val _))
 10816  	// result: (FMOVDfpgp val)
 10817  	for {
 10818  		off := ssa.AuxIntToInt32(v.AuxInt)
 10819  		sym := ssa.AuxToSym(v.Aux)
 10820  		ptr := v_0
 10821  		if v_1.Op != ssaop.OpARM64FMOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
 10822  			break
 10823  		}
 10824  		val := v_1.Args[1]
 10825  		if ptr != v_1.Args[0] {
 10826  			break
 10827  		}
 10828  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 10829  		v.AddArg(val)
 10830  		return true
 10831  	}
 10832  	// match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
 10833  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10834  	// result: (MOVDload [off1+int32(off2)] {sym} ptr mem)
 10835  	for {
 10836  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10837  		sym := ssa.AuxToSym(v.Aux)
 10838  		if v_0.Op != ssaop.OpARM64ADDconst {
 10839  			break
 10840  		}
 10841  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10842  		ptr := v_0.Args[0]
 10843  		mem := v_1
 10844  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10845  			break
 10846  		}
 10847  		v.Reset(ssaop.OpARM64MOVDload)
 10848  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10849  		v.Aux = ssa.SymToAux(sym)
 10850  		v.AddArg2(ptr, mem)
 10851  		return true
 10852  	}
 10853  	// match: (MOVDload [off] {sym} (ADD ptr idx) mem)
 10854  	// cond: off == 0 && sym == nil
 10855  	// result: (MOVDloadidx ptr idx mem)
 10856  	for {
 10857  		off := ssa.AuxIntToInt32(v.AuxInt)
 10858  		sym := ssa.AuxToSym(v.Aux)
 10859  		if v_0.Op != ssaop.OpARM64ADD {
 10860  			break
 10861  		}
 10862  		idx := v_0.Args[1]
 10863  		ptr := v_0.Args[0]
 10864  		mem := v_1
 10865  		if !(off == 0 && sym == nil) {
 10866  			break
 10867  		}
 10868  		v.Reset(ssaop.OpARM64MOVDloadidx)
 10869  		v.AddArg3(ptr, idx, mem)
 10870  		return true
 10871  	}
 10872  	// match: (MOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
 10873  	// cond: off == 0 && sym == nil
 10874  	// result: (MOVDloadidx8 ptr idx mem)
 10875  	for {
 10876  		off := ssa.AuxIntToInt32(v.AuxInt)
 10877  		sym := ssa.AuxToSym(v.Aux)
 10878  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 10879  			break
 10880  		}
 10881  		idx := v_0.Args[1]
 10882  		ptr := v_0.Args[0]
 10883  		mem := v_1
 10884  		if !(off == 0 && sym == nil) {
 10885  			break
 10886  		}
 10887  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 10888  		v.AddArg3(ptr, idx, mem)
 10889  		return true
 10890  	}
 10891  	// match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10892  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10893  	// result: (MOVDload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10894  	for {
 10895  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10896  		sym1 := ssa.AuxToSym(v.Aux)
 10897  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10898  			break
 10899  		}
 10900  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10901  		sym2 := ssa.AuxToSym(v_0.Aux)
 10902  		ptr := v_0.Args[0]
 10903  		mem := v_1
 10904  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10905  			break
 10906  		}
 10907  		v.Reset(ssaop.OpARM64MOVDload)
 10908  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10909  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10910  		v.AddArg2(ptr, mem)
 10911  		return true
 10912  	}
 10913  	// match: (MOVDload [off] {sym} (SB) _)
 10914  	// cond: ssa.SymIsRO(sym)
 10915  	// result: (MOVDconst [int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 10916  	for {
 10917  		off := ssa.AuxIntToInt32(v.AuxInt)
 10918  		sym := ssa.AuxToSym(v.Aux)
 10919  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10920  			break
 10921  		}
 10922  		v.Reset(ssaop.OpARM64MOVDconst)
 10923  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 10924  		return true
 10925  	}
 10926  	return false
 10927  }
 10928  func rewriteValue_OpARM64MOVDloadidx(v *ssa.Value) bool {
 10929  	v_2 := v.Args[2]
 10930  	v_1 := v.Args[1]
 10931  	v_0 := v.Args[0]
 10932  	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
 10933  	// cond: ssa.Is32Bit(c)
 10934  	// result: (MOVDload [int32(c)] ptr mem)
 10935  	for {
 10936  		ptr := v_0
 10937  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10938  			break
 10939  		}
 10940  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10941  		mem := v_2
 10942  		if !(ssa.Is32Bit(c)) {
 10943  			break
 10944  		}
 10945  		v.Reset(ssaop.OpARM64MOVDload)
 10946  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10947  		v.AddArg2(ptr, mem)
 10948  		return true
 10949  	}
 10950  	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
 10951  	// cond: ssa.Is32Bit(c)
 10952  	// result: (MOVDload [int32(c)] ptr mem)
 10953  	for {
 10954  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10955  			break
 10956  		}
 10957  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10958  		ptr := v_1
 10959  		mem := v_2
 10960  		if !(ssa.Is32Bit(c)) {
 10961  			break
 10962  		}
 10963  		v.Reset(ssaop.OpARM64MOVDload)
 10964  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10965  		v.AddArg2(ptr, mem)
 10966  		return true
 10967  	}
 10968  	// match: (MOVDloadidx ptr (SLLconst [3] idx) mem)
 10969  	// result: (MOVDloadidx8 ptr idx mem)
 10970  	for {
 10971  		ptr := v_0
 10972  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
 10973  			break
 10974  		}
 10975  		idx := v_1.Args[0]
 10976  		mem := v_2
 10977  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 10978  		v.AddArg3(ptr, idx, mem)
 10979  		return true
 10980  	}
 10981  	// match: (MOVDloadidx (SLLconst [3] idx) ptr mem)
 10982  	// result: (MOVDloadidx8 ptr idx mem)
 10983  	for {
 10984  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 10985  			break
 10986  		}
 10987  		idx := v_0.Args[0]
 10988  		ptr := v_1
 10989  		mem := v_2
 10990  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 10991  		v.AddArg3(ptr, idx, mem)
 10992  		return true
 10993  	}
 10994  	return false
 10995  }
 10996  func rewriteValue_OpARM64MOVDloadidx8(v *ssa.Value) bool {
 10997  	v_2 := v.Args[2]
 10998  	v_1 := v.Args[1]
 10999  	v_0 := v.Args[0]
 11000  	// match: (MOVDloadidx8 ptr (MOVDconst [c]) mem)
 11001  	// cond: ssa.Is32Bit(c<<3)
 11002  	// result: (MOVDload [int32(c)<<3] ptr mem)
 11003  	for {
 11004  		ptr := v_0
 11005  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11006  			break
 11007  		}
 11008  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11009  		mem := v_2
 11010  		if !(ssa.Is32Bit(c << 3)) {
 11011  			break
 11012  		}
 11013  		v.Reset(ssaop.OpARM64MOVDload)
 11014  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
 11015  		v.AddArg2(ptr, mem)
 11016  		return true
 11017  	}
 11018  	return false
 11019  }
 11020  func rewriteValue_OpARM64MOVDnop(v *ssa.Value) bool {
 11021  	v_0 := v.Args[0]
 11022  	// match: (MOVDnop (MOVDconst [c]))
 11023  	// result: (MOVDconst [c])
 11024  	for {
 11025  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11026  			break
 11027  		}
 11028  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11029  		v.Reset(ssaop.OpARM64MOVDconst)
 11030  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11031  		return true
 11032  	}
 11033  	return false
 11034  }
 11035  func rewriteValue_OpARM64MOVDreg(v *ssa.Value) bool {
 11036  	v_0 := v.Args[0]
 11037  	// match: (MOVDreg x)
 11038  	// cond: x.Uses == 1
 11039  	// result: (MOVDnop x)
 11040  	for {
 11041  		x := v_0
 11042  		if !(x.Uses == 1) {
 11043  			break
 11044  		}
 11045  		v.Reset(ssaop.OpARM64MOVDnop)
 11046  		v.AddArg(x)
 11047  		return true
 11048  	}
 11049  	// match: (MOVDreg (MOVDconst [c]))
 11050  	// result: (MOVDconst [c])
 11051  	for {
 11052  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11053  			break
 11054  		}
 11055  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11056  		v.Reset(ssaop.OpARM64MOVDconst)
 11057  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11058  		return true
 11059  	}
 11060  	return false
 11061  }
 11062  func rewriteValue_OpARM64MOVDstore(v *ssa.Value) bool {
 11063  	v_2 := v.Args[2]
 11064  	v_1 := v.Args[1]
 11065  	v_0 := v.Args[0]
 11066  	b := v.Block
 11067  	config := b.Func.Config
 11068  	// match: (MOVDstore [off] {sym} ptr (FMOVDfpgp val) mem)
 11069  	// result: (FMOVDstore [off] {sym} ptr val mem)
 11070  	for {
 11071  		off := ssa.AuxIntToInt32(v.AuxInt)
 11072  		sym := ssa.AuxToSym(v.Aux)
 11073  		ptr := v_0
 11074  		if v_1.Op != ssaop.OpARM64FMOVDfpgp {
 11075  			break
 11076  		}
 11077  		val := v_1.Args[0]
 11078  		mem := v_2
 11079  		v.Reset(ssaop.OpARM64FMOVDstore)
 11080  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11081  		v.Aux = ssa.SymToAux(sym)
 11082  		v.AddArg3(ptr, val, mem)
 11083  		return true
 11084  	}
 11085  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 11086  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11087  	// result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem)
 11088  	for {
 11089  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11090  		sym := ssa.AuxToSym(v.Aux)
 11091  		if v_0.Op != ssaop.OpARM64ADDconst {
 11092  			break
 11093  		}
 11094  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11095  		ptr := v_0.Args[0]
 11096  		val := v_1
 11097  		mem := v_2
 11098  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11099  			break
 11100  		}
 11101  		v.Reset(ssaop.OpARM64MOVDstore)
 11102  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11103  		v.Aux = ssa.SymToAux(sym)
 11104  		v.AddArg3(ptr, val, mem)
 11105  		return true
 11106  	}
 11107  	// match: (MOVDstore [off] {sym} (ADD ptr idx) val mem)
 11108  	// cond: off == 0 && sym == nil
 11109  	// result: (MOVDstoreidx ptr idx val mem)
 11110  	for {
 11111  		off := ssa.AuxIntToInt32(v.AuxInt)
 11112  		sym := ssa.AuxToSym(v.Aux)
 11113  		if v_0.Op != ssaop.OpARM64ADD {
 11114  			break
 11115  		}
 11116  		idx := v_0.Args[1]
 11117  		ptr := v_0.Args[0]
 11118  		val := v_1
 11119  		mem := v_2
 11120  		if !(off == 0 && sym == nil) {
 11121  			break
 11122  		}
 11123  		v.Reset(ssaop.OpARM64MOVDstoreidx)
 11124  		v.AddArg4(ptr, idx, val, mem)
 11125  		return true
 11126  	}
 11127  	// match: (MOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
 11128  	// cond: off == 0 && sym == nil
 11129  	// result: (MOVDstoreidx8 ptr idx val mem)
 11130  	for {
 11131  		off := ssa.AuxIntToInt32(v.AuxInt)
 11132  		sym := ssa.AuxToSym(v.Aux)
 11133  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11134  			break
 11135  		}
 11136  		idx := v_0.Args[1]
 11137  		ptr := v_0.Args[0]
 11138  		val := v_1
 11139  		mem := v_2
 11140  		if !(off == 0 && sym == nil) {
 11141  			break
 11142  		}
 11143  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11144  		v.AddArg4(ptr, idx, val, mem)
 11145  		return true
 11146  	}
 11147  	// match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 11148  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11149  	// result: (MOVDstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 11150  	for {
 11151  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11152  		sym1 := ssa.AuxToSym(v.Aux)
 11153  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11154  			break
 11155  		}
 11156  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11157  		sym2 := ssa.AuxToSym(v_0.Aux)
 11158  		ptr := v_0.Args[0]
 11159  		val := v_1
 11160  		mem := v_2
 11161  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11162  			break
 11163  		}
 11164  		v.Reset(ssaop.OpARM64MOVDstore)
 11165  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11166  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11167  		v.AddArg3(ptr, val, mem)
 11168  		return true
 11169  	}
 11170  	return false
 11171  }
 11172  func rewriteValue_OpARM64MOVDstoreidx(v *ssa.Value) bool {
 11173  	v_3 := v.Args[3]
 11174  	v_2 := v.Args[2]
 11175  	v_1 := v.Args[1]
 11176  	v_0 := v.Args[0]
 11177  	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
 11178  	// cond: ssa.Is32Bit(c)
 11179  	// result: (MOVDstore [int32(c)] ptr val mem)
 11180  	for {
 11181  		ptr := v_0
 11182  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11183  			break
 11184  		}
 11185  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11186  		val := v_2
 11187  		mem := v_3
 11188  		if !(ssa.Is32Bit(c)) {
 11189  			break
 11190  		}
 11191  		v.Reset(ssaop.OpARM64MOVDstore)
 11192  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11193  		v.AddArg3(ptr, val, mem)
 11194  		return true
 11195  	}
 11196  	// match: (MOVDstoreidx (MOVDconst [c]) idx val mem)
 11197  	// cond: ssa.Is32Bit(c)
 11198  	// result: (MOVDstore [int32(c)] idx val mem)
 11199  	for {
 11200  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11201  			break
 11202  		}
 11203  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11204  		idx := v_1
 11205  		val := v_2
 11206  		mem := v_3
 11207  		if !(ssa.Is32Bit(c)) {
 11208  			break
 11209  		}
 11210  		v.Reset(ssaop.OpARM64MOVDstore)
 11211  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11212  		v.AddArg3(idx, val, mem)
 11213  		return true
 11214  	}
 11215  	// match: (MOVDstoreidx ptr (SLLconst [3] idx) val mem)
 11216  	// result: (MOVDstoreidx8 ptr idx val mem)
 11217  	for {
 11218  		ptr := v_0
 11219  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
 11220  			break
 11221  		}
 11222  		idx := v_1.Args[0]
 11223  		val := v_2
 11224  		mem := v_3
 11225  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11226  		v.AddArg4(ptr, idx, val, mem)
 11227  		return true
 11228  	}
 11229  	// match: (MOVDstoreidx (SLLconst [3] idx) ptr val mem)
 11230  	// result: (MOVDstoreidx8 ptr idx val mem)
 11231  	for {
 11232  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11233  			break
 11234  		}
 11235  		idx := v_0.Args[0]
 11236  		ptr := v_1
 11237  		val := v_2
 11238  		mem := v_3
 11239  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11240  		v.AddArg4(ptr, idx, val, mem)
 11241  		return true
 11242  	}
 11243  	return false
 11244  }
 11245  func rewriteValue_OpARM64MOVDstoreidx8(v *ssa.Value) bool {
 11246  	v_3 := v.Args[3]
 11247  	v_2 := v.Args[2]
 11248  	v_1 := v.Args[1]
 11249  	v_0 := v.Args[0]
 11250  	// match: (MOVDstoreidx8 ptr (MOVDconst [c]) val mem)
 11251  	// cond: ssa.Is32Bit(c<<3)
 11252  	// result: (MOVDstore [int32(c)<<3] ptr val mem)
 11253  	for {
 11254  		ptr := v_0
 11255  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11256  			break
 11257  		}
 11258  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11259  		val := v_2
 11260  		mem := v_3
 11261  		if !(ssa.Is32Bit(c << 3)) {
 11262  			break
 11263  		}
 11264  		v.Reset(ssaop.OpARM64MOVDstore)
 11265  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
 11266  		v.AddArg3(ptr, val, mem)
 11267  		return true
 11268  	}
 11269  	return false
 11270  }
 11271  func rewriteValue_OpARM64MOVHUload(v *ssa.Value) bool {
 11272  	v_1 := v.Args[1]
 11273  	v_0 := v.Args[0]
 11274  	b := v.Block
 11275  	config := b.Func.Config
 11276  	// match: (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem)
 11277  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11278  	// result: (MOVHUload [off1+int32(off2)] {sym} ptr mem)
 11279  	for {
 11280  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11281  		sym := ssa.AuxToSym(v.Aux)
 11282  		if v_0.Op != ssaop.OpARM64ADDconst {
 11283  			break
 11284  		}
 11285  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11286  		ptr := v_0.Args[0]
 11287  		mem := v_1
 11288  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11289  			break
 11290  		}
 11291  		v.Reset(ssaop.OpARM64MOVHUload)
 11292  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11293  		v.Aux = ssa.SymToAux(sym)
 11294  		v.AddArg2(ptr, mem)
 11295  		return true
 11296  	}
 11297  	// match: (MOVHUload [off] {sym} (ADD ptr idx) mem)
 11298  	// cond: off == 0 && sym == nil
 11299  	// result: (MOVHUloadidx ptr idx mem)
 11300  	for {
 11301  		off := ssa.AuxIntToInt32(v.AuxInt)
 11302  		sym := ssa.AuxToSym(v.Aux)
 11303  		if v_0.Op != ssaop.OpARM64ADD {
 11304  			break
 11305  		}
 11306  		idx := v_0.Args[1]
 11307  		ptr := v_0.Args[0]
 11308  		mem := v_1
 11309  		if !(off == 0 && sym == nil) {
 11310  			break
 11311  		}
 11312  		v.Reset(ssaop.OpARM64MOVHUloadidx)
 11313  		v.AddArg3(ptr, idx, mem)
 11314  		return true
 11315  	}
 11316  	// match: (MOVHUload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 11317  	// cond: off == 0 && sym == nil
 11318  	// result: (MOVHUloadidx2 ptr idx mem)
 11319  	for {
 11320  		off := ssa.AuxIntToInt32(v.AuxInt)
 11321  		sym := ssa.AuxToSym(v.Aux)
 11322  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 11323  			break
 11324  		}
 11325  		idx := v_0.Args[1]
 11326  		ptr := v_0.Args[0]
 11327  		mem := v_1
 11328  		if !(off == 0 && sym == nil) {
 11329  			break
 11330  		}
 11331  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11332  		v.AddArg3(ptr, idx, mem)
 11333  		return true
 11334  	}
 11335  	// match: (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11336  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11337  	// result: (MOVHUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 11338  	for {
 11339  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11340  		sym1 := ssa.AuxToSym(v.Aux)
 11341  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11342  			break
 11343  		}
 11344  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11345  		sym2 := ssa.AuxToSym(v_0.Aux)
 11346  		ptr := v_0.Args[0]
 11347  		mem := v_1
 11348  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11349  			break
 11350  		}
 11351  		v.Reset(ssaop.OpARM64MOVHUload)
 11352  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11353  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11354  		v.AddArg2(ptr, mem)
 11355  		return true
 11356  	}
 11357  	// match: (MOVHUload [off] {sym} (SB) _)
 11358  	// cond: ssa.SymIsRO(sym)
 11359  	// result: (MOVDconst [int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 11360  	for {
 11361  		off := ssa.AuxIntToInt32(v.AuxInt)
 11362  		sym := ssa.AuxToSym(v.Aux)
 11363  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 11364  			break
 11365  		}
 11366  		v.Reset(ssaop.OpARM64MOVDconst)
 11367  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 11368  		return true
 11369  	}
 11370  	return false
 11371  }
 11372  func rewriteValue_OpARM64MOVHUloadidx(v *ssa.Value) bool {
 11373  	v_2 := v.Args[2]
 11374  	v_1 := v.Args[1]
 11375  	v_0 := v.Args[0]
 11376  	// match: (MOVHUloadidx ptr (MOVDconst [c]) mem)
 11377  	// cond: ssa.Is32Bit(c)
 11378  	// result: (MOVHUload [int32(c)] ptr mem)
 11379  	for {
 11380  		ptr := v_0
 11381  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11382  			break
 11383  		}
 11384  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11385  		mem := v_2
 11386  		if !(ssa.Is32Bit(c)) {
 11387  			break
 11388  		}
 11389  		v.Reset(ssaop.OpARM64MOVHUload)
 11390  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11391  		v.AddArg2(ptr, mem)
 11392  		return true
 11393  	}
 11394  	// match: (MOVHUloadidx (MOVDconst [c]) ptr mem)
 11395  	// cond: ssa.Is32Bit(c)
 11396  	// result: (MOVHUload [int32(c)] ptr mem)
 11397  	for {
 11398  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11399  			break
 11400  		}
 11401  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11402  		ptr := v_1
 11403  		mem := v_2
 11404  		if !(ssa.Is32Bit(c)) {
 11405  			break
 11406  		}
 11407  		v.Reset(ssaop.OpARM64MOVHUload)
 11408  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11409  		v.AddArg2(ptr, mem)
 11410  		return true
 11411  	}
 11412  	// match: (MOVHUloadidx ptr (SLLconst [1] idx) mem)
 11413  	// result: (MOVHUloadidx2 ptr idx mem)
 11414  	for {
 11415  		ptr := v_0
 11416  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 11417  			break
 11418  		}
 11419  		idx := v_1.Args[0]
 11420  		mem := v_2
 11421  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11422  		v.AddArg3(ptr, idx, mem)
 11423  		return true
 11424  	}
 11425  	// match: (MOVHUloadidx ptr (ADD idx idx) mem)
 11426  	// result: (MOVHUloadidx2 ptr idx mem)
 11427  	for {
 11428  		ptr := v_0
 11429  		if v_1.Op != ssaop.OpARM64ADD {
 11430  			break
 11431  		}
 11432  		idx := v_1.Args[1]
 11433  		if idx != v_1.Args[0] {
 11434  			break
 11435  		}
 11436  		mem := v_2
 11437  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11438  		v.AddArg3(ptr, idx, mem)
 11439  		return true
 11440  	}
 11441  	// match: (MOVHUloadidx (ADD idx idx) ptr mem)
 11442  	// result: (MOVHUloadidx2 ptr idx mem)
 11443  	for {
 11444  		if v_0.Op != ssaop.OpARM64ADD {
 11445  			break
 11446  		}
 11447  		idx := v_0.Args[1]
 11448  		if idx != v_0.Args[0] {
 11449  			break
 11450  		}
 11451  		ptr := v_1
 11452  		mem := v_2
 11453  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11454  		v.AddArg3(ptr, idx, mem)
 11455  		return true
 11456  	}
 11457  	return false
 11458  }
 11459  func rewriteValue_OpARM64MOVHUloadidx2(v *ssa.Value) bool {
 11460  	v_2 := v.Args[2]
 11461  	v_1 := v.Args[1]
 11462  	v_0 := v.Args[0]
 11463  	// match: (MOVHUloadidx2 ptr (MOVDconst [c]) mem)
 11464  	// cond: ssa.Is32Bit(c<<1)
 11465  	// result: (MOVHUload [int32(c)<<1] ptr mem)
 11466  	for {
 11467  		ptr := v_0
 11468  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11469  			break
 11470  		}
 11471  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11472  		mem := v_2
 11473  		if !(ssa.Is32Bit(c << 1)) {
 11474  			break
 11475  		}
 11476  		v.Reset(ssaop.OpARM64MOVHUload)
 11477  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 11478  		v.AddArg2(ptr, mem)
 11479  		return true
 11480  	}
 11481  	return false
 11482  }
 11483  func rewriteValue_OpARM64MOVHUreg(v *ssa.Value) bool {
 11484  	v_0 := v.Args[0]
 11485  	// match: (MOVHUreg (ANDconst [c] x))
 11486  	// result: (ANDconst [c&(1<<16-1)] x)
 11487  	for {
 11488  		if v_0.Op != ssaop.OpARM64ANDconst {
 11489  			break
 11490  		}
 11491  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11492  		x := v_0.Args[0]
 11493  		v.Reset(ssaop.OpARM64ANDconst)
 11494  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<16 - 1))
 11495  		v.AddArg(x)
 11496  		return true
 11497  	}
 11498  	// match: (MOVHUreg (MOVDconst [c]))
 11499  	// result: (MOVDconst [int64(uint16(c))])
 11500  	for {
 11501  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11502  			break
 11503  		}
 11504  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11505  		v.Reset(ssaop.OpARM64MOVDconst)
 11506  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint16(c)))
 11507  		return true
 11508  	}
 11509  	// match: (MOVHUreg x)
 11510  	// cond: v.Type.Size() <= 2
 11511  	// result: x
 11512  	for {
 11513  		x := v_0
 11514  		if !(v.Type.Size() <= 2) {
 11515  			break
 11516  		}
 11517  		v.CopyOf(x)
 11518  		return true
 11519  	}
 11520  	// match: (MOVHUreg (SLLconst [lc] x))
 11521  	// cond: lc >= 16
 11522  	// result: (MOVDconst [0])
 11523  	for {
 11524  		if v_0.Op != ssaop.OpARM64SLLconst {
 11525  			break
 11526  		}
 11527  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 11528  		if !(lc >= 16) {
 11529  			break
 11530  		}
 11531  		v.Reset(ssaop.OpARM64MOVDconst)
 11532  		v.AuxInt = ssa.Int64ToAuxInt(0)
 11533  		return true
 11534  	}
 11535  	// match: (MOVHUreg (SLLconst [lc] x))
 11536  	// cond: lc < 16
 11537  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 16-lc)] x)
 11538  	for {
 11539  		if v_0.Op != ssaop.OpARM64SLLconst {
 11540  			break
 11541  		}
 11542  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 11543  		x := v_0.Args[0]
 11544  		if !(lc < 16) {
 11545  			break
 11546  		}
 11547  		v.Reset(ssaop.OpARM64UBFIZ)
 11548  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 16-lc))
 11549  		v.AddArg(x)
 11550  		return true
 11551  	}
 11552  	// match: (MOVHUreg (SRLconst [rc] x))
 11553  	// cond: rc < 16
 11554  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 16)] x)
 11555  	for {
 11556  		if v_0.Op != ssaop.OpARM64SRLconst {
 11557  			break
 11558  		}
 11559  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 11560  		x := v_0.Args[0]
 11561  		if !(rc < 16) {
 11562  			break
 11563  		}
 11564  		v.Reset(ssaop.OpARM64UBFX)
 11565  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16))
 11566  		v.AddArg(x)
 11567  		return true
 11568  	}
 11569  	// match: (MOVHUreg (UBFX [bfc] x))
 11570  	// cond: bfc.Width() <= 16
 11571  	// result: (UBFX [bfc] x)
 11572  	for {
 11573  		if v_0.Op != ssaop.OpARM64UBFX {
 11574  			break
 11575  		}
 11576  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 11577  		x := v_0.Args[0]
 11578  		if !(bfc.Width() <= 16) {
 11579  			break
 11580  		}
 11581  		v.Reset(ssaop.OpARM64UBFX)
 11582  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 11583  		v.AddArg(x)
 11584  		return true
 11585  	}
 11586  	return false
 11587  }
 11588  func rewriteValue_OpARM64MOVHload(v *ssa.Value) bool {
 11589  	v_1 := v.Args[1]
 11590  	v_0 := v.Args[0]
 11591  	b := v.Block
 11592  	config := b.Func.Config
 11593  	// match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem)
 11594  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11595  	// result: (MOVHload [off1+int32(off2)] {sym} ptr mem)
 11596  	for {
 11597  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11598  		sym := ssa.AuxToSym(v.Aux)
 11599  		if v_0.Op != ssaop.OpARM64ADDconst {
 11600  			break
 11601  		}
 11602  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11603  		ptr := v_0.Args[0]
 11604  		mem := v_1
 11605  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11606  			break
 11607  		}
 11608  		v.Reset(ssaop.OpARM64MOVHload)
 11609  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11610  		v.Aux = ssa.SymToAux(sym)
 11611  		v.AddArg2(ptr, mem)
 11612  		return true
 11613  	}
 11614  	// match: (MOVHload [off] {sym} (ADD ptr idx) mem)
 11615  	// cond: off == 0 && sym == nil
 11616  	// result: (MOVHloadidx ptr idx mem)
 11617  	for {
 11618  		off := ssa.AuxIntToInt32(v.AuxInt)
 11619  		sym := ssa.AuxToSym(v.Aux)
 11620  		if v_0.Op != ssaop.OpARM64ADD {
 11621  			break
 11622  		}
 11623  		idx := v_0.Args[1]
 11624  		ptr := v_0.Args[0]
 11625  		mem := v_1
 11626  		if !(off == 0 && sym == nil) {
 11627  			break
 11628  		}
 11629  		v.Reset(ssaop.OpARM64MOVHloadidx)
 11630  		v.AddArg3(ptr, idx, mem)
 11631  		return true
 11632  	}
 11633  	// match: (MOVHload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 11634  	// cond: off == 0 && sym == nil
 11635  	// result: (MOVHloadidx2 ptr idx mem)
 11636  	for {
 11637  		off := ssa.AuxIntToInt32(v.AuxInt)
 11638  		sym := ssa.AuxToSym(v.Aux)
 11639  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 11640  			break
 11641  		}
 11642  		idx := v_0.Args[1]
 11643  		ptr := v_0.Args[0]
 11644  		mem := v_1
 11645  		if !(off == 0 && sym == nil) {
 11646  			break
 11647  		}
 11648  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 11649  		v.AddArg3(ptr, idx, mem)
 11650  		return true
 11651  	}
 11652  	// match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11653  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11654  	// result: (MOVHload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 11655  	for {
 11656  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11657  		sym1 := ssa.AuxToSym(v.Aux)
 11658  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11659  			break
 11660  		}
 11661  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11662  		sym2 := ssa.AuxToSym(v_0.Aux)
 11663  		ptr := v_0.Args[0]
 11664  		mem := v_1
 11665  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11666  			break
 11667  		}
 11668  		v.Reset(ssaop.OpARM64MOVHload)
 11669  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11670  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11671  		v.AddArg2(ptr, mem)
 11672  		return true
 11673  	}
 11674  	// match: (MOVHload [off] {sym} (SB) _)
 11675  	// cond: ssa.SymIsRO(sym)
 11676  	// result: (MOVDconst [int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
 11677  	for {
 11678  		off := ssa.AuxIntToInt32(v.AuxInt)
 11679  		sym := ssa.AuxToSym(v.Aux)
 11680  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 11681  			break
 11682  		}
 11683  		v.Reset(ssaop.OpARM64MOVDconst)
 11684  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
 11685  		return true
 11686  	}
 11687  	return false
 11688  }
 11689  func rewriteValue_OpARM64MOVHloadidx(v *ssa.Value) bool {
 11690  	v_2 := v.Args[2]
 11691  	v_1 := v.Args[1]
 11692  	v_0 := v.Args[0]
 11693  	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
 11694  	// cond: ssa.Is32Bit(c)
 11695  	// result: (MOVHload [int32(c)] ptr mem)
 11696  	for {
 11697  		ptr := v_0
 11698  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11699  			break
 11700  		}
 11701  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11702  		mem := v_2
 11703  		if !(ssa.Is32Bit(c)) {
 11704  			break
 11705  		}
 11706  		v.Reset(ssaop.OpARM64MOVHload)
 11707  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11708  		v.AddArg2(ptr, mem)
 11709  		return true
 11710  	}
 11711  	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
 11712  	// cond: ssa.Is32Bit(c)
 11713  	// result: (MOVHload [int32(c)] ptr mem)
 11714  	for {
 11715  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11716  			break
 11717  		}
 11718  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11719  		ptr := v_1
 11720  		mem := v_2
 11721  		if !(ssa.Is32Bit(c)) {
 11722  			break
 11723  		}
 11724  		v.Reset(ssaop.OpARM64MOVHload)
 11725  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11726  		v.AddArg2(ptr, mem)
 11727  		return true
 11728  	}
 11729  	// match: (MOVHloadidx ptr (SLLconst [1] idx) mem)
 11730  	// result: (MOVHloadidx2 ptr idx mem)
 11731  	for {
 11732  		ptr := v_0
 11733  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 11734  			break
 11735  		}
 11736  		idx := v_1.Args[0]
 11737  		mem := v_2
 11738  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 11739  		v.AddArg3(ptr, idx, mem)
 11740  		return true
 11741  	}
 11742  	// match: (MOVHloadidx ptr (ADD idx idx) mem)
 11743  	// result: (MOVHloadidx2 ptr idx mem)
 11744  	for {
 11745  		ptr := v_0
 11746  		if v_1.Op != ssaop.OpARM64ADD {
 11747  			break
 11748  		}
 11749  		idx := v_1.Args[1]
 11750  		if idx != v_1.Args[0] {
 11751  			break
 11752  		}
 11753  		mem := v_2
 11754  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 11755  		v.AddArg3(ptr, idx, mem)
 11756  		return true
 11757  	}
 11758  	// match: (MOVHloadidx (ADD idx idx) ptr mem)
 11759  	// result: (MOVHloadidx2 ptr idx mem)
 11760  	for {
 11761  		if v_0.Op != ssaop.OpARM64ADD {
 11762  			break
 11763  		}
 11764  		idx := v_0.Args[1]
 11765  		if idx != v_0.Args[0] {
 11766  			break
 11767  		}
 11768  		ptr := v_1
 11769  		mem := v_2
 11770  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 11771  		v.AddArg3(ptr, idx, mem)
 11772  		return true
 11773  	}
 11774  	return false
 11775  }
 11776  func rewriteValue_OpARM64MOVHloadidx2(v *ssa.Value) bool {
 11777  	v_2 := v.Args[2]
 11778  	v_1 := v.Args[1]
 11779  	v_0 := v.Args[0]
 11780  	// match: (MOVHloadidx2 ptr (MOVDconst [c]) mem)
 11781  	// cond: ssa.Is32Bit(c<<1)
 11782  	// result: (MOVHload [int32(c)<<1] ptr mem)
 11783  	for {
 11784  		ptr := v_0
 11785  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11786  			break
 11787  		}
 11788  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11789  		mem := v_2
 11790  		if !(ssa.Is32Bit(c << 1)) {
 11791  			break
 11792  		}
 11793  		v.Reset(ssaop.OpARM64MOVHload)
 11794  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 11795  		v.AddArg2(ptr, mem)
 11796  		return true
 11797  	}
 11798  	return false
 11799  }
 11800  func rewriteValue_OpARM64MOVHreg(v *ssa.Value) bool {
 11801  	v_0 := v.Args[0]
 11802  	// match: (MOVHreg (MOVDconst [c]))
 11803  	// result: (MOVDconst [int64(int16(c))])
 11804  	for {
 11805  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11806  			break
 11807  		}
 11808  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11809  		v.Reset(ssaop.OpARM64MOVDconst)
 11810  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(c)))
 11811  		return true
 11812  	}
 11813  	// match: (MOVHreg x)
 11814  	// cond: v.Type.Size() <= 2
 11815  	// result: x
 11816  	for {
 11817  		x := v_0
 11818  		if !(v.Type.Size() <= 2) {
 11819  			break
 11820  		}
 11821  		v.CopyOf(x)
 11822  		return true
 11823  	}
 11824  	// match: (MOVHreg <t> (ANDconst x [c]))
 11825  	// cond: uint64(c) & uint64(0xffffffffffff8000) == 0
 11826  	// result: (ANDconst <t> x [c])
 11827  	for {
 11828  		t := v.Type
 11829  		if v_0.Op != ssaop.OpARM64ANDconst {
 11830  			break
 11831  		}
 11832  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11833  		x := v_0.Args[0]
 11834  		if !(uint64(c)&uint64(0xffffffffffff8000) == 0) {
 11835  			break
 11836  		}
 11837  		v.Reset(ssaop.OpARM64ANDconst)
 11838  		v.Type = t
 11839  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11840  		v.AddArg(x)
 11841  		return true
 11842  	}
 11843  	// match: (MOVHreg (SLLconst [lc] x))
 11844  	// cond: lc < 16
 11845  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 16-lc)] x)
 11846  	for {
 11847  		if v_0.Op != ssaop.OpARM64SLLconst {
 11848  			break
 11849  		}
 11850  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 11851  		x := v_0.Args[0]
 11852  		if !(lc < 16) {
 11853  			break
 11854  		}
 11855  		v.Reset(ssaop.OpARM64SBFIZ)
 11856  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 16-lc))
 11857  		v.AddArg(x)
 11858  		return true
 11859  	}
 11860  	// match: (MOVHreg (SBFX [bfc] x))
 11861  	// cond: bfc.Width() <= 16
 11862  	// result: (SBFX [bfc] x)
 11863  	for {
 11864  		if v_0.Op != ssaop.OpARM64SBFX {
 11865  			break
 11866  		}
 11867  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 11868  		x := v_0.Args[0]
 11869  		if !(bfc.Width() <= 16) {
 11870  			break
 11871  		}
 11872  		v.Reset(ssaop.OpARM64SBFX)
 11873  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 11874  		v.AddArg(x)
 11875  		return true
 11876  	}
 11877  	return false
 11878  }
 11879  func rewriteValue_OpARM64MOVHstore(v *ssa.Value) bool {
 11880  	v_2 := v.Args[2]
 11881  	v_1 := v.Args[1]
 11882  	v_0 := v.Args[0]
 11883  	b := v.Block
 11884  	config := b.Func.Config
 11885  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 11886  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11887  	// result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem)
 11888  	for {
 11889  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11890  		sym := ssa.AuxToSym(v.Aux)
 11891  		if v_0.Op != ssaop.OpARM64ADDconst {
 11892  			break
 11893  		}
 11894  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11895  		ptr := v_0.Args[0]
 11896  		val := v_1
 11897  		mem := v_2
 11898  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11899  			break
 11900  		}
 11901  		v.Reset(ssaop.OpARM64MOVHstore)
 11902  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11903  		v.Aux = ssa.SymToAux(sym)
 11904  		v.AddArg3(ptr, val, mem)
 11905  		return true
 11906  	}
 11907  	// match: (MOVHstore [off] {sym} (ADD ptr idx) val mem)
 11908  	// cond: off == 0 && sym == nil
 11909  	// result: (MOVHstoreidx ptr idx val mem)
 11910  	for {
 11911  		off := ssa.AuxIntToInt32(v.AuxInt)
 11912  		sym := ssa.AuxToSym(v.Aux)
 11913  		if v_0.Op != ssaop.OpARM64ADD {
 11914  			break
 11915  		}
 11916  		idx := v_0.Args[1]
 11917  		ptr := v_0.Args[0]
 11918  		val := v_1
 11919  		mem := v_2
 11920  		if !(off == 0 && sym == nil) {
 11921  			break
 11922  		}
 11923  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 11924  		v.AddArg4(ptr, idx, val, mem)
 11925  		return true
 11926  	}
 11927  	// match: (MOVHstore [off] {sym} (ADDshiftLL [1] ptr idx) val mem)
 11928  	// cond: off == 0 && sym == nil
 11929  	// result: (MOVHstoreidx2 ptr idx val mem)
 11930  	for {
 11931  		off := ssa.AuxIntToInt32(v.AuxInt)
 11932  		sym := ssa.AuxToSym(v.Aux)
 11933  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 11934  			break
 11935  		}
 11936  		idx := v_0.Args[1]
 11937  		ptr := v_0.Args[0]
 11938  		val := v_1
 11939  		mem := v_2
 11940  		if !(off == 0 && sym == nil) {
 11941  			break
 11942  		}
 11943  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 11944  		v.AddArg4(ptr, idx, val, mem)
 11945  		return true
 11946  	}
 11947  	// match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 11948  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11949  	// result: (MOVHstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 11950  	for {
 11951  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11952  		sym1 := ssa.AuxToSym(v.Aux)
 11953  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11954  			break
 11955  		}
 11956  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11957  		sym2 := ssa.AuxToSym(v_0.Aux)
 11958  		ptr := v_0.Args[0]
 11959  		val := v_1
 11960  		mem := v_2
 11961  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11962  			break
 11963  		}
 11964  		v.Reset(ssaop.OpARM64MOVHstore)
 11965  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11966  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11967  		v.AddArg3(ptr, val, mem)
 11968  		return true
 11969  	}
 11970  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
 11971  	// result: (MOVHstore [off] {sym} ptr x mem)
 11972  	for {
 11973  		off := ssa.AuxIntToInt32(v.AuxInt)
 11974  		sym := ssa.AuxToSym(v.Aux)
 11975  		ptr := v_0
 11976  		if v_1.Op != ssaop.OpARM64MOVHreg {
 11977  			break
 11978  		}
 11979  		x := v_1.Args[0]
 11980  		mem := v_2
 11981  		v.Reset(ssaop.OpARM64MOVHstore)
 11982  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11983  		v.Aux = ssa.SymToAux(sym)
 11984  		v.AddArg3(ptr, x, mem)
 11985  		return true
 11986  	}
 11987  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
 11988  	// result: (MOVHstore [off] {sym} ptr x mem)
 11989  	for {
 11990  		off := ssa.AuxIntToInt32(v.AuxInt)
 11991  		sym := ssa.AuxToSym(v.Aux)
 11992  		ptr := v_0
 11993  		if v_1.Op != ssaop.OpARM64MOVHUreg {
 11994  			break
 11995  		}
 11996  		x := v_1.Args[0]
 11997  		mem := v_2
 11998  		v.Reset(ssaop.OpARM64MOVHstore)
 11999  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12000  		v.Aux = ssa.SymToAux(sym)
 12001  		v.AddArg3(ptr, x, mem)
 12002  		return true
 12003  	}
 12004  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
 12005  	// result: (MOVHstore [off] {sym} ptr x mem)
 12006  	for {
 12007  		off := ssa.AuxIntToInt32(v.AuxInt)
 12008  		sym := ssa.AuxToSym(v.Aux)
 12009  		ptr := v_0
 12010  		if v_1.Op != ssaop.OpARM64MOVWreg {
 12011  			break
 12012  		}
 12013  		x := v_1.Args[0]
 12014  		mem := v_2
 12015  		v.Reset(ssaop.OpARM64MOVHstore)
 12016  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12017  		v.Aux = ssa.SymToAux(sym)
 12018  		v.AddArg3(ptr, x, mem)
 12019  		return true
 12020  	}
 12021  	// match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
 12022  	// result: (MOVHstore [off] {sym} ptr x mem)
 12023  	for {
 12024  		off := ssa.AuxIntToInt32(v.AuxInt)
 12025  		sym := ssa.AuxToSym(v.Aux)
 12026  		ptr := v_0
 12027  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 12028  			break
 12029  		}
 12030  		x := v_1.Args[0]
 12031  		mem := v_2
 12032  		v.Reset(ssaop.OpARM64MOVHstore)
 12033  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12034  		v.Aux = ssa.SymToAux(sym)
 12035  		v.AddArg3(ptr, x, mem)
 12036  		return true
 12037  	}
 12038  	return false
 12039  }
 12040  func rewriteValue_OpARM64MOVHstoreidx(v *ssa.Value) bool {
 12041  	v_3 := v.Args[3]
 12042  	v_2 := v.Args[2]
 12043  	v_1 := v.Args[1]
 12044  	v_0 := v.Args[0]
 12045  	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
 12046  	// cond: ssa.Is32Bit(c)
 12047  	// result: (MOVHstore [int32(c)] ptr val mem)
 12048  	for {
 12049  		ptr := v_0
 12050  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12051  			break
 12052  		}
 12053  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12054  		val := v_2
 12055  		mem := v_3
 12056  		if !(ssa.Is32Bit(c)) {
 12057  			break
 12058  		}
 12059  		v.Reset(ssaop.OpARM64MOVHstore)
 12060  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12061  		v.AddArg3(ptr, val, mem)
 12062  		return true
 12063  	}
 12064  	// match: (MOVHstoreidx (MOVDconst [c]) idx val mem)
 12065  	// cond: ssa.Is32Bit(c)
 12066  	// result: (MOVHstore [int32(c)] idx val mem)
 12067  	for {
 12068  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12069  			break
 12070  		}
 12071  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12072  		idx := v_1
 12073  		val := v_2
 12074  		mem := v_3
 12075  		if !(ssa.Is32Bit(c)) {
 12076  			break
 12077  		}
 12078  		v.Reset(ssaop.OpARM64MOVHstore)
 12079  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12080  		v.AddArg3(idx, val, mem)
 12081  		return true
 12082  	}
 12083  	// match: (MOVHstoreidx ptr (SLLconst [1] idx) val mem)
 12084  	// result: (MOVHstoreidx2 ptr idx val mem)
 12085  	for {
 12086  		ptr := v_0
 12087  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 12088  			break
 12089  		}
 12090  		idx := v_1.Args[0]
 12091  		val := v_2
 12092  		mem := v_3
 12093  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12094  		v.AddArg4(ptr, idx, val, mem)
 12095  		return true
 12096  	}
 12097  	// match: (MOVHstoreidx ptr (ADD idx idx) val mem)
 12098  	// result: (MOVHstoreidx2 ptr idx val mem)
 12099  	for {
 12100  		ptr := v_0
 12101  		if v_1.Op != ssaop.OpARM64ADD {
 12102  			break
 12103  		}
 12104  		idx := v_1.Args[1]
 12105  		if idx != v_1.Args[0] {
 12106  			break
 12107  		}
 12108  		val := v_2
 12109  		mem := v_3
 12110  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12111  		v.AddArg4(ptr, idx, val, mem)
 12112  		return true
 12113  	}
 12114  	// match: (MOVHstoreidx (SLLconst [1] idx) ptr val mem)
 12115  	// result: (MOVHstoreidx2 ptr idx val mem)
 12116  	for {
 12117  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 12118  			break
 12119  		}
 12120  		idx := v_0.Args[0]
 12121  		ptr := v_1
 12122  		val := v_2
 12123  		mem := v_3
 12124  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12125  		v.AddArg4(ptr, idx, val, mem)
 12126  		return true
 12127  	}
 12128  	// match: (MOVHstoreidx (ADD idx idx) ptr val mem)
 12129  	// result: (MOVHstoreidx2 ptr idx val mem)
 12130  	for {
 12131  		if v_0.Op != ssaop.OpARM64ADD {
 12132  			break
 12133  		}
 12134  		idx := v_0.Args[1]
 12135  		if idx != v_0.Args[0] {
 12136  			break
 12137  		}
 12138  		ptr := v_1
 12139  		val := v_2
 12140  		mem := v_3
 12141  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12142  		v.AddArg4(ptr, idx, val, mem)
 12143  		return true
 12144  	}
 12145  	// match: (MOVHstoreidx ptr idx (MOVHreg x) mem)
 12146  	// result: (MOVHstoreidx ptr idx x mem)
 12147  	for {
 12148  		ptr := v_0
 12149  		idx := v_1
 12150  		if v_2.Op != ssaop.OpARM64MOVHreg {
 12151  			break
 12152  		}
 12153  		x := v_2.Args[0]
 12154  		mem := v_3
 12155  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12156  		v.AddArg4(ptr, idx, x, mem)
 12157  		return true
 12158  	}
 12159  	// match: (MOVHstoreidx ptr idx (MOVHUreg x) mem)
 12160  	// result: (MOVHstoreidx ptr idx x mem)
 12161  	for {
 12162  		ptr := v_0
 12163  		idx := v_1
 12164  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 12165  			break
 12166  		}
 12167  		x := v_2.Args[0]
 12168  		mem := v_3
 12169  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12170  		v.AddArg4(ptr, idx, x, mem)
 12171  		return true
 12172  	}
 12173  	// match: (MOVHstoreidx ptr idx (MOVWreg x) mem)
 12174  	// result: (MOVHstoreidx ptr idx x mem)
 12175  	for {
 12176  		ptr := v_0
 12177  		idx := v_1
 12178  		if v_2.Op != ssaop.OpARM64MOVWreg {
 12179  			break
 12180  		}
 12181  		x := v_2.Args[0]
 12182  		mem := v_3
 12183  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12184  		v.AddArg4(ptr, idx, x, mem)
 12185  		return true
 12186  	}
 12187  	// match: (MOVHstoreidx ptr idx (MOVWUreg x) mem)
 12188  	// result: (MOVHstoreidx ptr idx x mem)
 12189  	for {
 12190  		ptr := v_0
 12191  		idx := v_1
 12192  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 12193  			break
 12194  		}
 12195  		x := v_2.Args[0]
 12196  		mem := v_3
 12197  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12198  		v.AddArg4(ptr, idx, x, mem)
 12199  		return true
 12200  	}
 12201  	return false
 12202  }
 12203  func rewriteValue_OpARM64MOVHstoreidx2(v *ssa.Value) bool {
 12204  	v_3 := v.Args[3]
 12205  	v_2 := v.Args[2]
 12206  	v_1 := v.Args[1]
 12207  	v_0 := v.Args[0]
 12208  	// match: (MOVHstoreidx2 ptr (MOVDconst [c]) val mem)
 12209  	// cond: ssa.Is32Bit(c<<1)
 12210  	// result: (MOVHstore [int32(c)<<1] ptr val mem)
 12211  	for {
 12212  		ptr := v_0
 12213  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12214  			break
 12215  		}
 12216  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12217  		val := v_2
 12218  		mem := v_3
 12219  		if !(ssa.Is32Bit(c << 1)) {
 12220  			break
 12221  		}
 12222  		v.Reset(ssaop.OpARM64MOVHstore)
 12223  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 12224  		v.AddArg3(ptr, val, mem)
 12225  		return true
 12226  	}
 12227  	// match: (MOVHstoreidx2 ptr idx (MOVHreg x) mem)
 12228  	// result: (MOVHstoreidx2 ptr idx x mem)
 12229  	for {
 12230  		ptr := v_0
 12231  		idx := v_1
 12232  		if v_2.Op != ssaop.OpARM64MOVHreg {
 12233  			break
 12234  		}
 12235  		x := v_2.Args[0]
 12236  		mem := v_3
 12237  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12238  		v.AddArg4(ptr, idx, x, mem)
 12239  		return true
 12240  	}
 12241  	// match: (MOVHstoreidx2 ptr idx (MOVHUreg x) mem)
 12242  	// result: (MOVHstoreidx2 ptr idx x mem)
 12243  	for {
 12244  		ptr := v_0
 12245  		idx := v_1
 12246  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 12247  			break
 12248  		}
 12249  		x := v_2.Args[0]
 12250  		mem := v_3
 12251  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12252  		v.AddArg4(ptr, idx, x, mem)
 12253  		return true
 12254  	}
 12255  	// match: (MOVHstoreidx2 ptr idx (MOVWreg x) mem)
 12256  	// result: (MOVHstoreidx2 ptr idx x mem)
 12257  	for {
 12258  		ptr := v_0
 12259  		idx := v_1
 12260  		if v_2.Op != ssaop.OpARM64MOVWreg {
 12261  			break
 12262  		}
 12263  		x := v_2.Args[0]
 12264  		mem := v_3
 12265  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12266  		v.AddArg4(ptr, idx, x, mem)
 12267  		return true
 12268  	}
 12269  	// match: (MOVHstoreidx2 ptr idx (MOVWUreg x) mem)
 12270  	// result: (MOVHstoreidx2 ptr idx x mem)
 12271  	for {
 12272  		ptr := v_0
 12273  		idx := v_1
 12274  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 12275  			break
 12276  		}
 12277  		x := v_2.Args[0]
 12278  		mem := v_3
 12279  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12280  		v.AddArg4(ptr, idx, x, mem)
 12281  		return true
 12282  	}
 12283  	return false
 12284  }
 12285  func rewriteValue_OpARM64MOVWUload(v *ssa.Value) bool {
 12286  	v_1 := v.Args[1]
 12287  	v_0 := v.Args[0]
 12288  	b := v.Block
 12289  	config := b.Func.Config
 12290  	// match: (MOVWUload [off] {sym} ptr (FMOVSstore [off] {sym} ptr val _))
 12291  	// result: (FMOVSfpgp val)
 12292  	for {
 12293  		off := ssa.AuxIntToInt32(v.AuxInt)
 12294  		sym := ssa.AuxToSym(v.Aux)
 12295  		ptr := v_0
 12296  		if v_1.Op != ssaop.OpARM64FMOVSstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
 12297  			break
 12298  		}
 12299  		val := v_1.Args[1]
 12300  		if ptr != v_1.Args[0] {
 12301  			break
 12302  		}
 12303  		v.Reset(ssaop.OpARM64FMOVSfpgp)
 12304  		v.AddArg(val)
 12305  		return true
 12306  	}
 12307  	// match: (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem)
 12308  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12309  	// result: (MOVWUload [off1+int32(off2)] {sym} ptr mem)
 12310  	for {
 12311  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12312  		sym := ssa.AuxToSym(v.Aux)
 12313  		if v_0.Op != ssaop.OpARM64ADDconst {
 12314  			break
 12315  		}
 12316  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12317  		ptr := v_0.Args[0]
 12318  		mem := v_1
 12319  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12320  			break
 12321  		}
 12322  		v.Reset(ssaop.OpARM64MOVWUload)
 12323  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12324  		v.Aux = ssa.SymToAux(sym)
 12325  		v.AddArg2(ptr, mem)
 12326  		return true
 12327  	}
 12328  	// match: (MOVWUload [off] {sym} (ADD ptr idx) mem)
 12329  	// cond: off == 0 && sym == nil
 12330  	// result: (MOVWUloadidx ptr idx mem)
 12331  	for {
 12332  		off := ssa.AuxIntToInt32(v.AuxInt)
 12333  		sym := ssa.AuxToSym(v.Aux)
 12334  		if v_0.Op != ssaop.OpARM64ADD {
 12335  			break
 12336  		}
 12337  		idx := v_0.Args[1]
 12338  		ptr := v_0.Args[0]
 12339  		mem := v_1
 12340  		if !(off == 0 && sym == nil) {
 12341  			break
 12342  		}
 12343  		v.Reset(ssaop.OpARM64MOVWUloadidx)
 12344  		v.AddArg3(ptr, idx, mem)
 12345  		return true
 12346  	}
 12347  	// match: (MOVWUload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 12348  	// cond: off == 0 && sym == nil
 12349  	// result: (MOVWUloadidx4 ptr idx mem)
 12350  	for {
 12351  		off := ssa.AuxIntToInt32(v.AuxInt)
 12352  		sym := ssa.AuxToSym(v.Aux)
 12353  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12354  			break
 12355  		}
 12356  		idx := v_0.Args[1]
 12357  		ptr := v_0.Args[0]
 12358  		mem := v_1
 12359  		if !(off == 0 && sym == nil) {
 12360  			break
 12361  		}
 12362  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12363  		v.AddArg3(ptr, idx, mem)
 12364  		return true
 12365  	}
 12366  	// match: (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 12367  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12368  	// result: (MOVWUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 12369  	for {
 12370  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12371  		sym1 := ssa.AuxToSym(v.Aux)
 12372  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12373  			break
 12374  		}
 12375  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12376  		sym2 := ssa.AuxToSym(v_0.Aux)
 12377  		ptr := v_0.Args[0]
 12378  		mem := v_1
 12379  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12380  			break
 12381  		}
 12382  		v.Reset(ssaop.OpARM64MOVWUload)
 12383  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12384  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12385  		v.AddArg2(ptr, mem)
 12386  		return true
 12387  	}
 12388  	// match: (MOVWUload [off] {sym} (SB) _)
 12389  	// cond: ssa.SymIsRO(sym)
 12390  	// result: (MOVDconst [int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 12391  	for {
 12392  		off := ssa.AuxIntToInt32(v.AuxInt)
 12393  		sym := ssa.AuxToSym(v.Aux)
 12394  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 12395  			break
 12396  		}
 12397  		v.Reset(ssaop.OpARM64MOVDconst)
 12398  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 12399  		return true
 12400  	}
 12401  	return false
 12402  }
 12403  func rewriteValue_OpARM64MOVWUloadidx(v *ssa.Value) bool {
 12404  	v_2 := v.Args[2]
 12405  	v_1 := v.Args[1]
 12406  	v_0 := v.Args[0]
 12407  	// match: (MOVWUloadidx ptr (MOVDconst [c]) mem)
 12408  	// cond: ssa.Is32Bit(c)
 12409  	// result: (MOVWUload [int32(c)] ptr mem)
 12410  	for {
 12411  		ptr := v_0
 12412  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12413  			break
 12414  		}
 12415  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12416  		mem := v_2
 12417  		if !(ssa.Is32Bit(c)) {
 12418  			break
 12419  		}
 12420  		v.Reset(ssaop.OpARM64MOVWUload)
 12421  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12422  		v.AddArg2(ptr, mem)
 12423  		return true
 12424  	}
 12425  	// match: (MOVWUloadidx (MOVDconst [c]) ptr mem)
 12426  	// cond: ssa.Is32Bit(c)
 12427  	// result: (MOVWUload [int32(c)] ptr mem)
 12428  	for {
 12429  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12430  			break
 12431  		}
 12432  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12433  		ptr := v_1
 12434  		mem := v_2
 12435  		if !(ssa.Is32Bit(c)) {
 12436  			break
 12437  		}
 12438  		v.Reset(ssaop.OpARM64MOVWUload)
 12439  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12440  		v.AddArg2(ptr, mem)
 12441  		return true
 12442  	}
 12443  	// match: (MOVWUloadidx ptr (SLLconst [2] idx) mem)
 12444  	// result: (MOVWUloadidx4 ptr idx mem)
 12445  	for {
 12446  		ptr := v_0
 12447  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 12448  			break
 12449  		}
 12450  		idx := v_1.Args[0]
 12451  		mem := v_2
 12452  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12453  		v.AddArg3(ptr, idx, mem)
 12454  		return true
 12455  	}
 12456  	// match: (MOVWUloadidx (SLLconst [2] idx) ptr mem)
 12457  	// result: (MOVWUloadidx4 ptr idx mem)
 12458  	for {
 12459  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12460  			break
 12461  		}
 12462  		idx := v_0.Args[0]
 12463  		ptr := v_1
 12464  		mem := v_2
 12465  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12466  		v.AddArg3(ptr, idx, mem)
 12467  		return true
 12468  	}
 12469  	return false
 12470  }
 12471  func rewriteValue_OpARM64MOVWUloadidx4(v *ssa.Value) bool {
 12472  	v_2 := v.Args[2]
 12473  	v_1 := v.Args[1]
 12474  	v_0 := v.Args[0]
 12475  	// match: (MOVWUloadidx4 ptr (MOVDconst [c]) mem)
 12476  	// cond: ssa.Is32Bit(c<<2)
 12477  	// result: (MOVWUload [int32(c)<<2] ptr mem)
 12478  	for {
 12479  		ptr := v_0
 12480  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12481  			break
 12482  		}
 12483  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12484  		mem := v_2
 12485  		if !(ssa.Is32Bit(c << 2)) {
 12486  			break
 12487  		}
 12488  		v.Reset(ssaop.OpARM64MOVWUload)
 12489  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 12490  		v.AddArg2(ptr, mem)
 12491  		return true
 12492  	}
 12493  	return false
 12494  }
 12495  func rewriteValue_OpARM64MOVWUreg(v *ssa.Value) bool {
 12496  	v_0 := v.Args[0]
 12497  	// match: (MOVWUreg (ANDconst [c] x))
 12498  	// result: (ANDconst [c&(1<<32-1)] x)
 12499  	for {
 12500  		if v_0.Op != ssaop.OpARM64ANDconst {
 12501  			break
 12502  		}
 12503  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12504  		x := v_0.Args[0]
 12505  		v.Reset(ssaop.OpARM64ANDconst)
 12506  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<32 - 1))
 12507  		v.AddArg(x)
 12508  		return true
 12509  	}
 12510  	// match: (MOVWUreg (MOVDconst [c]))
 12511  	// result: (MOVDconst [int64(uint32(c))])
 12512  	for {
 12513  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12514  			break
 12515  		}
 12516  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12517  		v.Reset(ssaop.OpARM64MOVDconst)
 12518  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c)))
 12519  		return true
 12520  	}
 12521  	// match: (MOVWUreg x)
 12522  	// cond: v.Type.Size() <= 4
 12523  	// result: x
 12524  	for {
 12525  		x := v_0
 12526  		if !(v.Type.Size() <= 4) {
 12527  			break
 12528  		}
 12529  		v.CopyOf(x)
 12530  		return true
 12531  	}
 12532  	// match: (MOVWUreg (SLLconst [lc] x))
 12533  	// cond: lc >= 32
 12534  	// result: (MOVDconst [0])
 12535  	for {
 12536  		if v_0.Op != ssaop.OpARM64SLLconst {
 12537  			break
 12538  		}
 12539  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12540  		if !(lc >= 32) {
 12541  			break
 12542  		}
 12543  		v.Reset(ssaop.OpARM64MOVDconst)
 12544  		v.AuxInt = ssa.Int64ToAuxInt(0)
 12545  		return true
 12546  	}
 12547  	// match: (MOVWUreg (SLLconst [lc] x))
 12548  	// cond: lc < 32
 12549  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 32-lc)] x)
 12550  	for {
 12551  		if v_0.Op != ssaop.OpARM64SLLconst {
 12552  			break
 12553  		}
 12554  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12555  		x := v_0.Args[0]
 12556  		if !(lc < 32) {
 12557  			break
 12558  		}
 12559  		v.Reset(ssaop.OpARM64UBFIZ)
 12560  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 32-lc))
 12561  		v.AddArg(x)
 12562  		return true
 12563  	}
 12564  	// match: (MOVWUreg (SRLconst [rc] x))
 12565  	// cond: rc < 32
 12566  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 32)] x)
 12567  	for {
 12568  		if v_0.Op != ssaop.OpARM64SRLconst {
 12569  			break
 12570  		}
 12571  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 12572  		x := v_0.Args[0]
 12573  		if !(rc < 32) {
 12574  			break
 12575  		}
 12576  		v.Reset(ssaop.OpARM64UBFX)
 12577  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32))
 12578  		v.AddArg(x)
 12579  		return true
 12580  	}
 12581  	// match: (MOVWUreg (UBFX [bfc] x))
 12582  	// cond: bfc.Width() <= 32
 12583  	// result: (UBFX [bfc] x)
 12584  	for {
 12585  		if v_0.Op != ssaop.OpARM64UBFX {
 12586  			break
 12587  		}
 12588  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 12589  		x := v_0.Args[0]
 12590  		if !(bfc.Width() <= 32) {
 12591  			break
 12592  		}
 12593  		v.Reset(ssaop.OpARM64UBFX)
 12594  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 12595  		v.AddArg(x)
 12596  		return true
 12597  	}
 12598  	return false
 12599  }
 12600  func rewriteValue_OpARM64MOVWload(v *ssa.Value) bool {
 12601  	v_1 := v.Args[1]
 12602  	v_0 := v.Args[0]
 12603  	b := v.Block
 12604  	config := b.Func.Config
 12605  	// match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem)
 12606  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12607  	// result: (MOVWload [off1+int32(off2)] {sym} ptr mem)
 12608  	for {
 12609  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12610  		sym := ssa.AuxToSym(v.Aux)
 12611  		if v_0.Op != ssaop.OpARM64ADDconst {
 12612  			break
 12613  		}
 12614  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12615  		ptr := v_0.Args[0]
 12616  		mem := v_1
 12617  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12618  			break
 12619  		}
 12620  		v.Reset(ssaop.OpARM64MOVWload)
 12621  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12622  		v.Aux = ssa.SymToAux(sym)
 12623  		v.AddArg2(ptr, mem)
 12624  		return true
 12625  	}
 12626  	// match: (MOVWload [off] {sym} (ADD ptr idx) mem)
 12627  	// cond: off == 0 && sym == nil
 12628  	// result: (MOVWloadidx ptr idx mem)
 12629  	for {
 12630  		off := ssa.AuxIntToInt32(v.AuxInt)
 12631  		sym := ssa.AuxToSym(v.Aux)
 12632  		if v_0.Op != ssaop.OpARM64ADD {
 12633  			break
 12634  		}
 12635  		idx := v_0.Args[1]
 12636  		ptr := v_0.Args[0]
 12637  		mem := v_1
 12638  		if !(off == 0 && sym == nil) {
 12639  			break
 12640  		}
 12641  		v.Reset(ssaop.OpARM64MOVWloadidx)
 12642  		v.AddArg3(ptr, idx, mem)
 12643  		return true
 12644  	}
 12645  	// match: (MOVWload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 12646  	// cond: off == 0 && sym == nil
 12647  	// result: (MOVWloadidx4 ptr idx mem)
 12648  	for {
 12649  		off := ssa.AuxIntToInt32(v.AuxInt)
 12650  		sym := ssa.AuxToSym(v.Aux)
 12651  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12652  			break
 12653  		}
 12654  		idx := v_0.Args[1]
 12655  		ptr := v_0.Args[0]
 12656  		mem := v_1
 12657  		if !(off == 0 && sym == nil) {
 12658  			break
 12659  		}
 12660  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 12661  		v.AddArg3(ptr, idx, mem)
 12662  		return true
 12663  	}
 12664  	// match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 12665  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12666  	// result: (MOVWload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 12667  	for {
 12668  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12669  		sym1 := ssa.AuxToSym(v.Aux)
 12670  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12671  			break
 12672  		}
 12673  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12674  		sym2 := ssa.AuxToSym(v_0.Aux)
 12675  		ptr := v_0.Args[0]
 12676  		mem := v_1
 12677  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12678  			break
 12679  		}
 12680  		v.Reset(ssaop.OpARM64MOVWload)
 12681  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12682  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12683  		v.AddArg2(ptr, mem)
 12684  		return true
 12685  	}
 12686  	// match: (MOVWload [off] {sym} (SB) _)
 12687  	// cond: ssa.SymIsRO(sym)
 12688  	// result: (MOVDconst [int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
 12689  	for {
 12690  		off := ssa.AuxIntToInt32(v.AuxInt)
 12691  		sym := ssa.AuxToSym(v.Aux)
 12692  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 12693  			break
 12694  		}
 12695  		v.Reset(ssaop.OpARM64MOVDconst)
 12696  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
 12697  		return true
 12698  	}
 12699  	return false
 12700  }
 12701  func rewriteValue_OpARM64MOVWloadidx(v *ssa.Value) bool {
 12702  	v_2 := v.Args[2]
 12703  	v_1 := v.Args[1]
 12704  	v_0 := v.Args[0]
 12705  	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
 12706  	// cond: ssa.Is32Bit(c)
 12707  	// result: (MOVWload [int32(c)] ptr mem)
 12708  	for {
 12709  		ptr := v_0
 12710  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12711  			break
 12712  		}
 12713  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12714  		mem := v_2
 12715  		if !(ssa.Is32Bit(c)) {
 12716  			break
 12717  		}
 12718  		v.Reset(ssaop.OpARM64MOVWload)
 12719  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12720  		v.AddArg2(ptr, mem)
 12721  		return true
 12722  	}
 12723  	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
 12724  	// cond: ssa.Is32Bit(c)
 12725  	// result: (MOVWload [int32(c)] ptr mem)
 12726  	for {
 12727  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12728  			break
 12729  		}
 12730  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12731  		ptr := v_1
 12732  		mem := v_2
 12733  		if !(ssa.Is32Bit(c)) {
 12734  			break
 12735  		}
 12736  		v.Reset(ssaop.OpARM64MOVWload)
 12737  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12738  		v.AddArg2(ptr, mem)
 12739  		return true
 12740  	}
 12741  	// match: (MOVWloadidx ptr (SLLconst [2] idx) mem)
 12742  	// result: (MOVWloadidx4 ptr idx mem)
 12743  	for {
 12744  		ptr := v_0
 12745  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 12746  			break
 12747  		}
 12748  		idx := v_1.Args[0]
 12749  		mem := v_2
 12750  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 12751  		v.AddArg3(ptr, idx, mem)
 12752  		return true
 12753  	}
 12754  	// match: (MOVWloadidx (SLLconst [2] idx) ptr mem)
 12755  	// result: (MOVWloadidx4 ptr idx mem)
 12756  	for {
 12757  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12758  			break
 12759  		}
 12760  		idx := v_0.Args[0]
 12761  		ptr := v_1
 12762  		mem := v_2
 12763  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 12764  		v.AddArg3(ptr, idx, mem)
 12765  		return true
 12766  	}
 12767  	return false
 12768  }
 12769  func rewriteValue_OpARM64MOVWloadidx4(v *ssa.Value) bool {
 12770  	v_2 := v.Args[2]
 12771  	v_1 := v.Args[1]
 12772  	v_0 := v.Args[0]
 12773  	// match: (MOVWloadidx4 ptr (MOVDconst [c]) mem)
 12774  	// cond: ssa.Is32Bit(c<<2)
 12775  	// result: (MOVWload [int32(c)<<2] ptr mem)
 12776  	for {
 12777  		ptr := v_0
 12778  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12779  			break
 12780  		}
 12781  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12782  		mem := v_2
 12783  		if !(ssa.Is32Bit(c << 2)) {
 12784  			break
 12785  		}
 12786  		v.Reset(ssaop.OpARM64MOVWload)
 12787  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 12788  		v.AddArg2(ptr, mem)
 12789  		return true
 12790  	}
 12791  	return false
 12792  }
 12793  func rewriteValue_OpARM64MOVWreg(v *ssa.Value) bool {
 12794  	v_0 := v.Args[0]
 12795  	// match: (MOVWreg (MOVDconst [c]))
 12796  	// result: (MOVDconst [int64(int32(c))])
 12797  	for {
 12798  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12799  			break
 12800  		}
 12801  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12802  		v.Reset(ssaop.OpARM64MOVDconst)
 12803  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(c)))
 12804  		return true
 12805  	}
 12806  	// match: (MOVWreg x)
 12807  	// cond: v.Type.Size() <= 4
 12808  	// result: x
 12809  	for {
 12810  		x := v_0
 12811  		if !(v.Type.Size() <= 4) {
 12812  			break
 12813  		}
 12814  		v.CopyOf(x)
 12815  		return true
 12816  	}
 12817  	// match: (MOVWreg <t> (ANDconst x [c]))
 12818  	// cond: uint64(c) & uint64(0xffffffff80000000) == 0
 12819  	// result: (ANDconst <t> x [c])
 12820  	for {
 12821  		t := v.Type
 12822  		if v_0.Op != ssaop.OpARM64ANDconst {
 12823  			break
 12824  		}
 12825  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12826  		x := v_0.Args[0]
 12827  		if !(uint64(c)&uint64(0xffffffff80000000) == 0) {
 12828  			break
 12829  		}
 12830  		v.Reset(ssaop.OpARM64ANDconst)
 12831  		v.Type = t
 12832  		v.AuxInt = ssa.Int64ToAuxInt(c)
 12833  		v.AddArg(x)
 12834  		return true
 12835  	}
 12836  	// match: (MOVWreg (SLLconst [lc] x))
 12837  	// cond: lc < 32
 12838  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 32-lc)] x)
 12839  	for {
 12840  		if v_0.Op != ssaop.OpARM64SLLconst {
 12841  			break
 12842  		}
 12843  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12844  		x := v_0.Args[0]
 12845  		if !(lc < 32) {
 12846  			break
 12847  		}
 12848  		v.Reset(ssaop.OpARM64SBFIZ)
 12849  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 32-lc))
 12850  		v.AddArg(x)
 12851  		return true
 12852  	}
 12853  	// match: (MOVWreg (SBFX [bfc] x))
 12854  	// cond: bfc.Width() <= 32
 12855  	// result: (SBFX [bfc] x)
 12856  	for {
 12857  		if v_0.Op != ssaop.OpARM64SBFX {
 12858  			break
 12859  		}
 12860  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 12861  		x := v_0.Args[0]
 12862  		if !(bfc.Width() <= 32) {
 12863  			break
 12864  		}
 12865  		v.Reset(ssaop.OpARM64SBFX)
 12866  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 12867  		v.AddArg(x)
 12868  		return true
 12869  	}
 12870  	return false
 12871  }
 12872  func rewriteValue_OpARM64MOVWstore(v *ssa.Value) bool {
 12873  	v_2 := v.Args[2]
 12874  	v_1 := v.Args[1]
 12875  	v_0 := v.Args[0]
 12876  	b := v.Block
 12877  	config := b.Func.Config
 12878  	// match: (MOVWstore [off] {sym} ptr (FMOVSfpgp val) mem)
 12879  	// result: (FMOVSstore [off] {sym} ptr val mem)
 12880  	for {
 12881  		off := ssa.AuxIntToInt32(v.AuxInt)
 12882  		sym := ssa.AuxToSym(v.Aux)
 12883  		ptr := v_0
 12884  		if v_1.Op != ssaop.OpARM64FMOVSfpgp {
 12885  			break
 12886  		}
 12887  		val := v_1.Args[0]
 12888  		mem := v_2
 12889  		v.Reset(ssaop.OpARM64FMOVSstore)
 12890  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12891  		v.Aux = ssa.SymToAux(sym)
 12892  		v.AddArg3(ptr, val, mem)
 12893  		return true
 12894  	}
 12895  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 12896  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12897  	// result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem)
 12898  	for {
 12899  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12900  		sym := ssa.AuxToSym(v.Aux)
 12901  		if v_0.Op != ssaop.OpARM64ADDconst {
 12902  			break
 12903  		}
 12904  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12905  		ptr := v_0.Args[0]
 12906  		val := v_1
 12907  		mem := v_2
 12908  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12909  			break
 12910  		}
 12911  		v.Reset(ssaop.OpARM64MOVWstore)
 12912  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12913  		v.Aux = ssa.SymToAux(sym)
 12914  		v.AddArg3(ptr, val, mem)
 12915  		return true
 12916  	}
 12917  	// match: (MOVWstore [off] {sym} (ADD ptr idx) val mem)
 12918  	// cond: off == 0 && sym == nil
 12919  	// result: (MOVWstoreidx ptr idx val mem)
 12920  	for {
 12921  		off := ssa.AuxIntToInt32(v.AuxInt)
 12922  		sym := ssa.AuxToSym(v.Aux)
 12923  		if v_0.Op != ssaop.OpARM64ADD {
 12924  			break
 12925  		}
 12926  		idx := v_0.Args[1]
 12927  		ptr := v_0.Args[0]
 12928  		val := v_1
 12929  		mem := v_2
 12930  		if !(off == 0 && sym == nil) {
 12931  			break
 12932  		}
 12933  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 12934  		v.AddArg4(ptr, idx, val, mem)
 12935  		return true
 12936  	}
 12937  	// match: (MOVWstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
 12938  	// cond: off == 0 && sym == nil
 12939  	// result: (MOVWstoreidx4 ptr idx val mem)
 12940  	for {
 12941  		off := ssa.AuxIntToInt32(v.AuxInt)
 12942  		sym := ssa.AuxToSym(v.Aux)
 12943  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12944  			break
 12945  		}
 12946  		idx := v_0.Args[1]
 12947  		ptr := v_0.Args[0]
 12948  		val := v_1
 12949  		mem := v_2
 12950  		if !(off == 0 && sym == nil) {
 12951  			break
 12952  		}
 12953  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 12954  		v.AddArg4(ptr, idx, val, mem)
 12955  		return true
 12956  	}
 12957  	// match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 12958  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12959  	// result: (MOVWstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 12960  	for {
 12961  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12962  		sym1 := ssa.AuxToSym(v.Aux)
 12963  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12964  			break
 12965  		}
 12966  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12967  		sym2 := ssa.AuxToSym(v_0.Aux)
 12968  		ptr := v_0.Args[0]
 12969  		val := v_1
 12970  		mem := v_2
 12971  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12972  			break
 12973  		}
 12974  		v.Reset(ssaop.OpARM64MOVWstore)
 12975  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12976  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12977  		v.AddArg3(ptr, val, mem)
 12978  		return true
 12979  	}
 12980  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
 12981  	// result: (MOVWstore [off] {sym} ptr x mem)
 12982  	for {
 12983  		off := ssa.AuxIntToInt32(v.AuxInt)
 12984  		sym := ssa.AuxToSym(v.Aux)
 12985  		ptr := v_0
 12986  		if v_1.Op != ssaop.OpARM64MOVWreg {
 12987  			break
 12988  		}
 12989  		x := v_1.Args[0]
 12990  		mem := v_2
 12991  		v.Reset(ssaop.OpARM64MOVWstore)
 12992  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12993  		v.Aux = ssa.SymToAux(sym)
 12994  		v.AddArg3(ptr, x, mem)
 12995  		return true
 12996  	}
 12997  	// match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
 12998  	// result: (MOVWstore [off] {sym} ptr x mem)
 12999  	for {
 13000  		off := ssa.AuxIntToInt32(v.AuxInt)
 13001  		sym := ssa.AuxToSym(v.Aux)
 13002  		ptr := v_0
 13003  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 13004  			break
 13005  		}
 13006  		x := v_1.Args[0]
 13007  		mem := v_2
 13008  		v.Reset(ssaop.OpARM64MOVWstore)
 13009  		v.AuxInt = ssa.Int32ToAuxInt(off)
 13010  		v.Aux = ssa.SymToAux(sym)
 13011  		v.AddArg3(ptr, x, mem)
 13012  		return true
 13013  	}
 13014  	return false
 13015  }
 13016  func rewriteValue_OpARM64MOVWstoreidx(v *ssa.Value) bool {
 13017  	v_3 := v.Args[3]
 13018  	v_2 := v.Args[2]
 13019  	v_1 := v.Args[1]
 13020  	v_0 := v.Args[0]
 13021  	// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
 13022  	// cond: ssa.Is32Bit(c)
 13023  	// result: (MOVWstore [int32(c)] ptr val mem)
 13024  	for {
 13025  		ptr := v_0
 13026  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13027  			break
 13028  		}
 13029  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13030  		val := v_2
 13031  		mem := v_3
 13032  		if !(ssa.Is32Bit(c)) {
 13033  			break
 13034  		}
 13035  		v.Reset(ssaop.OpARM64MOVWstore)
 13036  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13037  		v.AddArg3(ptr, val, mem)
 13038  		return true
 13039  	}
 13040  	// match: (MOVWstoreidx (MOVDconst [c]) idx val mem)
 13041  	// cond: ssa.Is32Bit(c)
 13042  	// result: (MOVWstore [int32(c)] idx val mem)
 13043  	for {
 13044  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13045  			break
 13046  		}
 13047  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13048  		idx := v_1
 13049  		val := v_2
 13050  		mem := v_3
 13051  		if !(ssa.Is32Bit(c)) {
 13052  			break
 13053  		}
 13054  		v.Reset(ssaop.OpARM64MOVWstore)
 13055  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13056  		v.AddArg3(idx, val, mem)
 13057  		return true
 13058  	}
 13059  	// match: (MOVWstoreidx ptr (SLLconst [2] idx) val mem)
 13060  	// result: (MOVWstoreidx4 ptr idx val mem)
 13061  	for {
 13062  		ptr := v_0
 13063  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 13064  			break
 13065  		}
 13066  		idx := v_1.Args[0]
 13067  		val := v_2
 13068  		mem := v_3
 13069  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13070  		v.AddArg4(ptr, idx, val, mem)
 13071  		return true
 13072  	}
 13073  	// match: (MOVWstoreidx (SLLconst [2] idx) ptr val mem)
 13074  	// result: (MOVWstoreidx4 ptr idx val mem)
 13075  	for {
 13076  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13077  			break
 13078  		}
 13079  		idx := v_0.Args[0]
 13080  		ptr := v_1
 13081  		val := v_2
 13082  		mem := v_3
 13083  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13084  		v.AddArg4(ptr, idx, val, mem)
 13085  		return true
 13086  	}
 13087  	// match: (MOVWstoreidx ptr idx (MOVWreg x) mem)
 13088  	// result: (MOVWstoreidx ptr idx x mem)
 13089  	for {
 13090  		ptr := v_0
 13091  		idx := v_1
 13092  		if v_2.Op != ssaop.OpARM64MOVWreg {
 13093  			break
 13094  		}
 13095  		x := v_2.Args[0]
 13096  		mem := v_3
 13097  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13098  		v.AddArg4(ptr, idx, x, mem)
 13099  		return true
 13100  	}
 13101  	// match: (MOVWstoreidx ptr idx (MOVWUreg x) mem)
 13102  	// result: (MOVWstoreidx ptr idx x mem)
 13103  	for {
 13104  		ptr := v_0
 13105  		idx := v_1
 13106  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 13107  			break
 13108  		}
 13109  		x := v_2.Args[0]
 13110  		mem := v_3
 13111  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13112  		v.AddArg4(ptr, idx, x, mem)
 13113  		return true
 13114  	}
 13115  	return false
 13116  }
 13117  func rewriteValue_OpARM64MOVWstoreidx4(v *ssa.Value) bool {
 13118  	v_3 := v.Args[3]
 13119  	v_2 := v.Args[2]
 13120  	v_1 := v.Args[1]
 13121  	v_0 := v.Args[0]
 13122  	// match: (MOVWstoreidx4 ptr (MOVDconst [c]) val mem)
 13123  	// cond: ssa.Is32Bit(c<<2)
 13124  	// result: (MOVWstore [int32(c)<<2] ptr val mem)
 13125  	for {
 13126  		ptr := v_0
 13127  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13128  			break
 13129  		}
 13130  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13131  		val := v_2
 13132  		mem := v_3
 13133  		if !(ssa.Is32Bit(c << 2)) {
 13134  			break
 13135  		}
 13136  		v.Reset(ssaop.OpARM64MOVWstore)
 13137  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 13138  		v.AddArg3(ptr, val, mem)
 13139  		return true
 13140  	}
 13141  	// match: (MOVWstoreidx4 ptr idx (MOVWreg x) mem)
 13142  	// result: (MOVWstoreidx4 ptr idx x mem)
 13143  	for {
 13144  		ptr := v_0
 13145  		idx := v_1
 13146  		if v_2.Op != ssaop.OpARM64MOVWreg {
 13147  			break
 13148  		}
 13149  		x := v_2.Args[0]
 13150  		mem := v_3
 13151  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13152  		v.AddArg4(ptr, idx, x, mem)
 13153  		return true
 13154  	}
 13155  	// match: (MOVWstoreidx4 ptr idx (MOVWUreg x) mem)
 13156  	// result: (MOVWstoreidx4 ptr idx x mem)
 13157  	for {
 13158  		ptr := v_0
 13159  		idx := v_1
 13160  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 13161  			break
 13162  		}
 13163  		x := v_2.Args[0]
 13164  		mem := v_3
 13165  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13166  		v.AddArg4(ptr, idx, x, mem)
 13167  		return true
 13168  	}
 13169  	return false
 13170  }
 13171  func rewriteValue_OpARM64MSUB(v *ssa.Value) bool {
 13172  	v_2 := v.Args[2]
 13173  	v_1 := v.Args[1]
 13174  	v_0 := v.Args[0]
 13175  	b := v.Block
 13176  	// match: (MSUB a x (MOVDconst [-1]))
 13177  	// result: (ADD a x)
 13178  	for {
 13179  		a := v_0
 13180  		x := v_1
 13181  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != -1 {
 13182  			break
 13183  		}
 13184  		v.Reset(ssaop.OpARM64ADD)
 13185  		v.AddArg2(a, x)
 13186  		return true
 13187  	}
 13188  	// match: (MSUB a _ (MOVDconst [0]))
 13189  	// result: a
 13190  	for {
 13191  		a := v_0
 13192  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 0 {
 13193  			break
 13194  		}
 13195  		v.CopyOf(a)
 13196  		return true
 13197  	}
 13198  	// match: (MSUB a x (MOVDconst [1]))
 13199  	// result: (SUB a x)
 13200  	for {
 13201  		a := v_0
 13202  		x := v_1
 13203  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 1 {
 13204  			break
 13205  		}
 13206  		v.Reset(ssaop.OpARM64SUB)
 13207  		v.AddArg2(a, x)
 13208  		return true
 13209  	}
 13210  	// match: (MSUB a x (MOVDconst [c]))
 13211  	// cond: ssa.IsPowerOfTwo(c)
 13212  	// result: (SUBshiftLL a x [ssa.Log64(c)])
 13213  	for {
 13214  		a := v_0
 13215  		x := v_1
 13216  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13217  			break
 13218  		}
 13219  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13220  		if !(ssa.IsPowerOfTwo(c)) {
 13221  			break
 13222  		}
 13223  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13224  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13225  		v.AddArg2(a, x)
 13226  		return true
 13227  	}
 13228  	// match: (MSUB a x (MOVDconst [c]))
 13229  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
 13230  	// result: (SUB a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
 13231  	for {
 13232  		a := v_0
 13233  		x := v_1
 13234  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13235  			break
 13236  		}
 13237  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13238  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 13239  			break
 13240  		}
 13241  		v.Reset(ssaop.OpARM64SUB)
 13242  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13243  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13244  		v0.AddArg2(x, x)
 13245  		v.AddArg2(a, v0)
 13246  		return true
 13247  	}
 13248  	// match: (MSUB a x (MOVDconst [c]))
 13249  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
 13250  	// result: (ADD a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
 13251  	for {
 13252  		a := v_0
 13253  		x := v_1
 13254  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13255  			break
 13256  		}
 13257  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13258  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 13259  			break
 13260  		}
 13261  		v.Reset(ssaop.OpARM64ADD)
 13262  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13263  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13264  		v0.AddArg2(x, x)
 13265  		v.AddArg2(a, v0)
 13266  		return true
 13267  	}
 13268  	// match: (MSUB a x (MOVDconst [c]))
 13269  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 13270  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
 13271  	for {
 13272  		a := v_0
 13273  		x := v_1
 13274  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13275  			break
 13276  		}
 13277  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13278  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 13279  			break
 13280  		}
 13281  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13282  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13283  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13284  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13285  		v0.AddArg2(x, x)
 13286  		v.AddArg2(a, v0)
 13287  		return true
 13288  	}
 13289  	// match: (MSUB a x (MOVDconst [c]))
 13290  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 13291  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
 13292  	for {
 13293  		a := v_0
 13294  		x := v_1
 13295  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13296  			break
 13297  		}
 13298  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13299  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 13300  			break
 13301  		}
 13302  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13303  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13304  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13305  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13306  		v0.AddArg2(x, x)
 13307  		v.AddArg2(a, v0)
 13308  		return true
 13309  	}
 13310  	// match: (MSUB a x (MOVDconst [c]))
 13311  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 13312  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
 13313  	for {
 13314  		a := v_0
 13315  		x := v_1
 13316  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13317  			break
 13318  		}
 13319  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13320  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 13321  			break
 13322  		}
 13323  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13324  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13325  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13326  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13327  		v0.AddArg2(x, x)
 13328  		v.AddArg2(a, v0)
 13329  		return true
 13330  	}
 13331  	// match: (MSUB a x (MOVDconst [c]))
 13332  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 13333  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
 13334  	for {
 13335  		a := v_0
 13336  		x := v_1
 13337  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13338  			break
 13339  		}
 13340  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13341  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 13342  			break
 13343  		}
 13344  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13345  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13346  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13347  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13348  		v0.AddArg2(x, x)
 13349  		v.AddArg2(a, v0)
 13350  		return true
 13351  	}
 13352  	// match: (MSUB a (MOVDconst [-1]) x)
 13353  	// result: (ADD a x)
 13354  	for {
 13355  		a := v_0
 13356  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
 13357  			break
 13358  		}
 13359  		x := v_2
 13360  		v.Reset(ssaop.OpARM64ADD)
 13361  		v.AddArg2(a, x)
 13362  		return true
 13363  	}
 13364  	// match: (MSUB a (MOVDconst [0]) _)
 13365  	// result: a
 13366  	for {
 13367  		a := v_0
 13368  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
 13369  			break
 13370  		}
 13371  		v.CopyOf(a)
 13372  		return true
 13373  	}
 13374  	// match: (MSUB a (MOVDconst [1]) x)
 13375  	// result: (SUB a x)
 13376  	for {
 13377  		a := v_0
 13378  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 13379  			break
 13380  		}
 13381  		x := v_2
 13382  		v.Reset(ssaop.OpARM64SUB)
 13383  		v.AddArg2(a, x)
 13384  		return true
 13385  	}
 13386  	// match: (MSUB a (MOVDconst [c]) x)
 13387  	// cond: ssa.IsPowerOfTwo(c)
 13388  	// result: (SUBshiftLL a x [ssa.Log64(c)])
 13389  	for {
 13390  		a := v_0
 13391  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13392  			break
 13393  		}
 13394  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13395  		x := v_2
 13396  		if !(ssa.IsPowerOfTwo(c)) {
 13397  			break
 13398  		}
 13399  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13400  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13401  		v.AddArg2(a, x)
 13402  		return true
 13403  	}
 13404  	// match: (MSUB a (MOVDconst [c]) x)
 13405  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
 13406  	// result: (SUB a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
 13407  	for {
 13408  		a := v_0
 13409  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13410  			break
 13411  		}
 13412  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13413  		x := v_2
 13414  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 13415  			break
 13416  		}
 13417  		v.Reset(ssaop.OpARM64SUB)
 13418  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13419  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13420  		v0.AddArg2(x, x)
 13421  		v.AddArg2(a, v0)
 13422  		return true
 13423  	}
 13424  	// match: (MSUB a (MOVDconst [c]) x)
 13425  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
 13426  	// result: (ADD a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
 13427  	for {
 13428  		a := v_0
 13429  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13430  			break
 13431  		}
 13432  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13433  		x := v_2
 13434  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 13435  			break
 13436  		}
 13437  		v.Reset(ssaop.OpARM64ADD)
 13438  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13439  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13440  		v0.AddArg2(x, x)
 13441  		v.AddArg2(a, v0)
 13442  		return true
 13443  	}
 13444  	// match: (MSUB a (MOVDconst [c]) x)
 13445  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 13446  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
 13447  	for {
 13448  		a := v_0
 13449  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13450  			break
 13451  		}
 13452  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13453  		x := v_2
 13454  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 13455  			break
 13456  		}
 13457  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13458  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13459  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13460  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13461  		v0.AddArg2(x, x)
 13462  		v.AddArg2(a, v0)
 13463  		return true
 13464  	}
 13465  	// match: (MSUB a (MOVDconst [c]) x)
 13466  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 13467  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
 13468  	for {
 13469  		a := v_0
 13470  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13471  			break
 13472  		}
 13473  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13474  		x := v_2
 13475  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 13476  			break
 13477  		}
 13478  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13479  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13480  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13481  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13482  		v0.AddArg2(x, x)
 13483  		v.AddArg2(a, v0)
 13484  		return true
 13485  	}
 13486  	// match: (MSUB a (MOVDconst [c]) x)
 13487  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 13488  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
 13489  	for {
 13490  		a := v_0
 13491  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13492  			break
 13493  		}
 13494  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13495  		x := v_2
 13496  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 13497  			break
 13498  		}
 13499  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13500  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13501  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13502  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13503  		v0.AddArg2(x, x)
 13504  		v.AddArg2(a, v0)
 13505  		return true
 13506  	}
 13507  	// match: (MSUB a (MOVDconst [c]) x)
 13508  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 13509  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
 13510  	for {
 13511  		a := v_0
 13512  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13513  			break
 13514  		}
 13515  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13516  		x := v_2
 13517  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 13518  			break
 13519  		}
 13520  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13521  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13522  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13523  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13524  		v0.AddArg2(x, x)
 13525  		v.AddArg2(a, v0)
 13526  		return true
 13527  	}
 13528  	// match: (MSUB (MOVDconst [c]) x y)
 13529  	// result: (ADDconst [c] (MNEG <x.Type> x y))
 13530  	for {
 13531  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13532  			break
 13533  		}
 13534  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13535  		x := v_1
 13536  		y := v_2
 13537  		v.Reset(ssaop.OpARM64ADDconst)
 13538  		v.AuxInt = ssa.Int64ToAuxInt(c)
 13539  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MNEG, x.Type)
 13540  		v0.AddArg2(x, y)
 13541  		v.AddArg(v0)
 13542  		return true
 13543  	}
 13544  	// match: (MSUB a (MOVDconst [c]) (MOVDconst [d]))
 13545  	// result: (SUBconst [c*d] a)
 13546  	for {
 13547  		a := v_0
 13548  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13549  			break
 13550  		}
 13551  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13552  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13553  			break
 13554  		}
 13555  		d := ssa.AuxIntToInt64(v_2.AuxInt)
 13556  		v.Reset(ssaop.OpARM64SUBconst)
 13557  		v.AuxInt = ssa.Int64ToAuxInt(c * d)
 13558  		v.AddArg(a)
 13559  		return true
 13560  	}
 13561  	return false
 13562  }
 13563  func rewriteValue_OpARM64MSUBW(v *ssa.Value) bool {
 13564  	v_2 := v.Args[2]
 13565  	v_1 := v.Args[1]
 13566  	v_0 := v.Args[0]
 13567  	b := v.Block
 13568  	// match: (MSUBW a x (MOVDconst [c]))
 13569  	// cond: int32(c)==-1
 13570  	// result: (MOVWUreg (ADD <a.Type> a x))
 13571  	for {
 13572  		a := v_0
 13573  		x := v_1
 13574  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13575  			break
 13576  		}
 13577  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13578  		if !(int32(c) == -1) {
 13579  			break
 13580  		}
 13581  		v.Reset(ssaop.OpARM64MOVWUreg)
 13582  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 13583  		v0.AddArg2(a, x)
 13584  		v.AddArg(v0)
 13585  		return true
 13586  	}
 13587  	// match: (MSUBW a _ (MOVDconst [c]))
 13588  	// cond: int32(c)==0
 13589  	// result: (MOVWUreg a)
 13590  	for {
 13591  		a := v_0
 13592  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13593  			break
 13594  		}
 13595  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13596  		if !(int32(c) == 0) {
 13597  			break
 13598  		}
 13599  		v.Reset(ssaop.OpARM64MOVWUreg)
 13600  		v.AddArg(a)
 13601  		return true
 13602  	}
 13603  	// match: (MSUBW a x (MOVDconst [c]))
 13604  	// cond: int32(c)==1
 13605  	// result: (MOVWUreg (SUB <a.Type> a x))
 13606  	for {
 13607  		a := v_0
 13608  		x := v_1
 13609  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13610  			break
 13611  		}
 13612  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13613  		if !(int32(c) == 1) {
 13614  			break
 13615  		}
 13616  		v.Reset(ssaop.OpARM64MOVWUreg)
 13617  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 13618  		v0.AddArg2(a, x)
 13619  		v.AddArg(v0)
 13620  		return true
 13621  	}
 13622  	// match: (MSUBW a x (MOVDconst [c]))
 13623  	// cond: ssa.IsPowerOfTwo(c)
 13624  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [ssa.Log64(c)]))
 13625  	for {
 13626  		a := v_0
 13627  		x := v_1
 13628  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13629  			break
 13630  		}
 13631  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13632  		if !(ssa.IsPowerOfTwo(c)) {
 13633  			break
 13634  		}
 13635  		v.Reset(ssaop.OpARM64MOVWUreg)
 13636  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13637  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13638  		v0.AddArg2(a, x)
 13639  		v.AddArg(v0)
 13640  		return true
 13641  	}
 13642  	// match: (MSUBW a x (MOVDconst [c]))
 13643  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
 13644  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 13645  	for {
 13646  		a := v_0
 13647  		x := v_1
 13648  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13649  			break
 13650  		}
 13651  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13652  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 13653  			break
 13654  		}
 13655  		v.Reset(ssaop.OpARM64MOVWUreg)
 13656  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 13657  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13658  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13659  		v1.AddArg2(x, x)
 13660  		v0.AddArg2(a, v1)
 13661  		v.AddArg(v0)
 13662  		return true
 13663  	}
 13664  	// match: (MSUBW a x (MOVDconst [c]))
 13665  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
 13666  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
 13667  	for {
 13668  		a := v_0
 13669  		x := v_1
 13670  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13671  			break
 13672  		}
 13673  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13674  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 13675  			break
 13676  		}
 13677  		v.Reset(ssaop.OpARM64MOVWUreg)
 13678  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 13679  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13680  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13681  		v1.AddArg2(x, x)
 13682  		v0.AddArg2(a, v1)
 13683  		v.AddArg(v0)
 13684  		return true
 13685  	}
 13686  	// match: (MSUBW a x (MOVDconst [c]))
 13687  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 13688  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
 13689  	for {
 13690  		a := v_0
 13691  		x := v_1
 13692  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13693  			break
 13694  		}
 13695  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13696  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 13697  			break
 13698  		}
 13699  		v.Reset(ssaop.OpARM64MOVWUreg)
 13700  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 13701  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13702  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13703  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 13704  		v1.AddArg2(x, x)
 13705  		v0.AddArg2(a, v1)
 13706  		v.AddArg(v0)
 13707  		return true
 13708  	}
 13709  	// match: (MSUBW a x (MOVDconst [c]))
 13710  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 13711  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
 13712  	for {
 13713  		a := v_0
 13714  		x := v_1
 13715  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13716  			break
 13717  		}
 13718  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13719  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 13720  			break
 13721  		}
 13722  		v.Reset(ssaop.OpARM64MOVWUreg)
 13723  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13724  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13725  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13726  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 13727  		v1.AddArg2(x, x)
 13728  		v0.AddArg2(a, v1)
 13729  		v.AddArg(v0)
 13730  		return true
 13731  	}
 13732  	// match: (MSUBW a x (MOVDconst [c]))
 13733  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 13734  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
 13735  	for {
 13736  		a := v_0
 13737  		x := v_1
 13738  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13739  			break
 13740  		}
 13741  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13742  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 13743  			break
 13744  		}
 13745  		v.Reset(ssaop.OpARM64MOVWUreg)
 13746  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 13747  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13748  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13749  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 13750  		v1.AddArg2(x, x)
 13751  		v0.AddArg2(a, v1)
 13752  		v.AddArg(v0)
 13753  		return true
 13754  	}
 13755  	// match: (MSUBW a x (MOVDconst [c]))
 13756  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 13757  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
 13758  	for {
 13759  		a := v_0
 13760  		x := v_1
 13761  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13762  			break
 13763  		}
 13764  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13765  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 13766  			break
 13767  		}
 13768  		v.Reset(ssaop.OpARM64MOVWUreg)
 13769  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13770  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13771  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13772  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 13773  		v1.AddArg2(x, x)
 13774  		v0.AddArg2(a, v1)
 13775  		v.AddArg(v0)
 13776  		return true
 13777  	}
 13778  	// match: (MSUBW a (MOVDconst [c]) x)
 13779  	// cond: int32(c)==-1
 13780  	// result: (MOVWUreg (ADD <a.Type> a x))
 13781  	for {
 13782  		a := v_0
 13783  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13784  			break
 13785  		}
 13786  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13787  		x := v_2
 13788  		if !(int32(c) == -1) {
 13789  			break
 13790  		}
 13791  		v.Reset(ssaop.OpARM64MOVWUreg)
 13792  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 13793  		v0.AddArg2(a, x)
 13794  		v.AddArg(v0)
 13795  		return true
 13796  	}
 13797  	// match: (MSUBW a (MOVDconst [c]) _)
 13798  	// cond: int32(c)==0
 13799  	// result: (MOVWUreg a)
 13800  	for {
 13801  		a := v_0
 13802  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13803  			break
 13804  		}
 13805  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13806  		if !(int32(c) == 0) {
 13807  			break
 13808  		}
 13809  		v.Reset(ssaop.OpARM64MOVWUreg)
 13810  		v.AddArg(a)
 13811  		return true
 13812  	}
 13813  	// match: (MSUBW a (MOVDconst [c]) x)
 13814  	// cond: int32(c)==1
 13815  	// result: (MOVWUreg (SUB <a.Type> a x))
 13816  	for {
 13817  		a := v_0
 13818  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13819  			break
 13820  		}
 13821  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13822  		x := v_2
 13823  		if !(int32(c) == 1) {
 13824  			break
 13825  		}
 13826  		v.Reset(ssaop.OpARM64MOVWUreg)
 13827  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 13828  		v0.AddArg2(a, x)
 13829  		v.AddArg(v0)
 13830  		return true
 13831  	}
 13832  	// match: (MSUBW a (MOVDconst [c]) x)
 13833  	// cond: ssa.IsPowerOfTwo(c)
 13834  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [ssa.Log64(c)]))
 13835  	for {
 13836  		a := v_0
 13837  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13838  			break
 13839  		}
 13840  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13841  		x := v_2
 13842  		if !(ssa.IsPowerOfTwo(c)) {
 13843  			break
 13844  		}
 13845  		v.Reset(ssaop.OpARM64MOVWUreg)
 13846  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13847  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13848  		v0.AddArg2(a, x)
 13849  		v.AddArg(v0)
 13850  		return true
 13851  	}
 13852  	// match: (MSUBW a (MOVDconst [c]) x)
 13853  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
 13854  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 13855  	for {
 13856  		a := v_0
 13857  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13858  			break
 13859  		}
 13860  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13861  		x := v_2
 13862  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 13863  			break
 13864  		}
 13865  		v.Reset(ssaop.OpARM64MOVWUreg)
 13866  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 13867  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13868  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13869  		v1.AddArg2(x, x)
 13870  		v0.AddArg2(a, v1)
 13871  		v.AddArg(v0)
 13872  		return true
 13873  	}
 13874  	// match: (MSUBW a (MOVDconst [c]) x)
 13875  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
 13876  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
 13877  	for {
 13878  		a := v_0
 13879  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13880  			break
 13881  		}
 13882  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13883  		x := v_2
 13884  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 13885  			break
 13886  		}
 13887  		v.Reset(ssaop.OpARM64MOVWUreg)
 13888  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 13889  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13890  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13891  		v1.AddArg2(x, x)
 13892  		v0.AddArg2(a, v1)
 13893  		v.AddArg(v0)
 13894  		return true
 13895  	}
 13896  	// match: (MSUBW a (MOVDconst [c]) x)
 13897  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 13898  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
 13899  	for {
 13900  		a := v_0
 13901  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13902  			break
 13903  		}
 13904  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13905  		x := v_2
 13906  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 13907  			break
 13908  		}
 13909  		v.Reset(ssaop.OpARM64MOVWUreg)
 13910  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 13911  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13912  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13913  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 13914  		v1.AddArg2(x, x)
 13915  		v0.AddArg2(a, v1)
 13916  		v.AddArg(v0)
 13917  		return true
 13918  	}
 13919  	// match: (MSUBW a (MOVDconst [c]) x)
 13920  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 13921  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
 13922  	for {
 13923  		a := v_0
 13924  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13925  			break
 13926  		}
 13927  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13928  		x := v_2
 13929  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 13930  			break
 13931  		}
 13932  		v.Reset(ssaop.OpARM64MOVWUreg)
 13933  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13934  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13935  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13936  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 13937  		v1.AddArg2(x, x)
 13938  		v0.AddArg2(a, v1)
 13939  		v.AddArg(v0)
 13940  		return true
 13941  	}
 13942  	// match: (MSUBW a (MOVDconst [c]) x)
 13943  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 13944  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
 13945  	for {
 13946  		a := v_0
 13947  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13948  			break
 13949  		}
 13950  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13951  		x := v_2
 13952  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 13953  			break
 13954  		}
 13955  		v.Reset(ssaop.OpARM64MOVWUreg)
 13956  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 13957  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13958  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13959  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 13960  		v1.AddArg2(x, x)
 13961  		v0.AddArg2(a, v1)
 13962  		v.AddArg(v0)
 13963  		return true
 13964  	}
 13965  	// match: (MSUBW a (MOVDconst [c]) x)
 13966  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 13967  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
 13968  	for {
 13969  		a := v_0
 13970  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13971  			break
 13972  		}
 13973  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13974  		x := v_2
 13975  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 13976  			break
 13977  		}
 13978  		v.Reset(ssaop.OpARM64MOVWUreg)
 13979  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13980  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13981  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13982  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 13983  		v1.AddArg2(x, x)
 13984  		v0.AddArg2(a, v1)
 13985  		v.AddArg(v0)
 13986  		return true
 13987  	}
 13988  	// match: (MSUBW (MOVDconst [c]) x y)
 13989  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MNEGW <x.Type> x y)))
 13990  	for {
 13991  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13992  			break
 13993  		}
 13994  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13995  		x := v_1
 13996  		y := v_2
 13997  		v.Reset(ssaop.OpARM64MOVWUreg)
 13998  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, x.Type)
 13999  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 14000  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MNEGW, x.Type)
 14001  		v1.AddArg2(x, y)
 14002  		v0.AddArg(v1)
 14003  		v.AddArg(v0)
 14004  		return true
 14005  	}
 14006  	// match: (MSUBW a (MOVDconst [c]) (MOVDconst [d]))
 14007  	// result: (MOVWUreg (SUBconst <a.Type> [c*d] a))
 14008  	for {
 14009  		a := v_0
 14010  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14011  			break
 14012  		}
 14013  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14014  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14015  			break
 14016  		}
 14017  		d := ssa.AuxIntToInt64(v_2.AuxInt)
 14018  		v.Reset(ssaop.OpARM64MOVWUreg)
 14019  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBconst, a.Type)
 14020  		v0.AuxInt = ssa.Int64ToAuxInt(c * d)
 14021  		v0.AddArg(a)
 14022  		v.AddArg(v0)
 14023  		return true
 14024  	}
 14025  	return false
 14026  }
 14027  func rewriteValue_OpARM64MUL(v *ssa.Value) bool {
 14028  	v_1 := v.Args[1]
 14029  	v_0 := v.Args[0]
 14030  	b := v.Block
 14031  	config := b.Func.Config
 14032  	// match: (MUL (NEG x) y)
 14033  	// result: (MNEG x y)
 14034  	for {
 14035  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14036  			if v_0.Op != ssaop.OpARM64NEG {
 14037  				continue
 14038  			}
 14039  			x := v_0.Args[0]
 14040  			y := v_1
 14041  			v.Reset(ssaop.OpARM64MNEG)
 14042  			v.AddArg2(x, y)
 14043  			return true
 14044  		}
 14045  		break
 14046  	}
 14047  	// match: (MUL _ (MOVDconst [0]))
 14048  	// result: (MOVDconst [0])
 14049  	for {
 14050  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14051  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
 14052  				continue
 14053  			}
 14054  			v.Reset(ssaop.OpARM64MOVDconst)
 14055  			v.AuxInt = ssa.Int64ToAuxInt(0)
 14056  			return true
 14057  		}
 14058  		break
 14059  	}
 14060  	// match: (MUL x (MOVDconst [1]))
 14061  	// result: x
 14062  	for {
 14063  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14064  			x := v_0
 14065  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 14066  				continue
 14067  			}
 14068  			v.CopyOf(x)
 14069  			return true
 14070  		}
 14071  		break
 14072  	}
 14073  	// match: (MUL x (MOVDconst [c]))
 14074  	// cond: ssa.CanMulStrengthReduce(config, c)
 14075  	// result: {ssa.MulStrengthReduce(v, x, c)}
 14076  	for {
 14077  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14078  			x := v_0
 14079  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14080  				continue
 14081  			}
 14082  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14083  			if !(ssa.CanMulStrengthReduce(config, c)) {
 14084  				continue
 14085  			}
 14086  			v.CopyOf(ssa.MulStrengthReduce(v, x, c))
 14087  			return true
 14088  		}
 14089  		break
 14090  	}
 14091  	// match: (MUL (MOVDconst [c]) (MOVDconst [d]))
 14092  	// result: (MOVDconst [c*d])
 14093  	for {
 14094  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14095  			if v_0.Op != ssaop.OpARM64MOVDconst {
 14096  				continue
 14097  			}
 14098  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 14099  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14100  				continue
 14101  			}
 14102  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 14103  			v.Reset(ssaop.OpARM64MOVDconst)
 14104  			v.AuxInt = ssa.Int64ToAuxInt(c * d)
 14105  			return true
 14106  		}
 14107  		break
 14108  	}
 14109  	// match: (MUL r:(MOVWUreg x) s:(MOVWUreg y))
 14110  	// cond: r.Uses == 1 && s.Uses == 1
 14111  	// result: (UMULL x y)
 14112  	for {
 14113  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14114  			r := v_0
 14115  			if r.Op != ssaop.OpARM64MOVWUreg {
 14116  				continue
 14117  			}
 14118  			x := r.Args[0]
 14119  			s := v_1
 14120  			if s.Op != ssaop.OpARM64MOVWUreg {
 14121  				continue
 14122  			}
 14123  			y := s.Args[0]
 14124  			if !(r.Uses == 1 && s.Uses == 1) {
 14125  				continue
 14126  			}
 14127  			v.Reset(ssaop.OpARM64UMULL)
 14128  			v.AddArg2(x, y)
 14129  			return true
 14130  		}
 14131  		break
 14132  	}
 14133  	// match: (MUL r:(MOVWreg x) s:(MOVWreg y))
 14134  	// cond: r.Uses == 1 && s.Uses == 1
 14135  	// result: (MULL x y)
 14136  	for {
 14137  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14138  			r := v_0
 14139  			if r.Op != ssaop.OpARM64MOVWreg {
 14140  				continue
 14141  			}
 14142  			x := r.Args[0]
 14143  			s := v_1
 14144  			if s.Op != ssaop.OpARM64MOVWreg {
 14145  				continue
 14146  			}
 14147  			y := s.Args[0]
 14148  			if !(r.Uses == 1 && s.Uses == 1) {
 14149  				continue
 14150  			}
 14151  			v.Reset(ssaop.OpARM64MULL)
 14152  			v.AddArg2(x, y)
 14153  			return true
 14154  		}
 14155  		break
 14156  	}
 14157  	return false
 14158  }
 14159  func rewriteValue_OpARM64MULW(v *ssa.Value) bool {
 14160  	v_1 := v.Args[1]
 14161  	v_0 := v.Args[0]
 14162  	b := v.Block
 14163  	config := b.Func.Config
 14164  	// match: (MULW (NEG x) y)
 14165  	// result: (MNEGW x y)
 14166  	for {
 14167  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14168  			if v_0.Op != ssaop.OpARM64NEG {
 14169  				continue
 14170  			}
 14171  			x := v_0.Args[0]
 14172  			y := v_1
 14173  			v.Reset(ssaop.OpARM64MNEGW)
 14174  			v.AddArg2(x, y)
 14175  			return true
 14176  		}
 14177  		break
 14178  	}
 14179  	// match: (MULW _ (MOVDconst [c]))
 14180  	// cond: int32(c)==0
 14181  	// result: (MOVDconst [0])
 14182  	for {
 14183  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14184  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14185  				continue
 14186  			}
 14187  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14188  			if !(int32(c) == 0) {
 14189  				continue
 14190  			}
 14191  			v.Reset(ssaop.OpARM64MOVDconst)
 14192  			v.AuxInt = ssa.Int64ToAuxInt(0)
 14193  			return true
 14194  		}
 14195  		break
 14196  	}
 14197  	// match: (MULW x (MOVDconst [c]))
 14198  	// cond: int32(c)==1
 14199  	// result: (MOVWUreg x)
 14200  	for {
 14201  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14202  			x := v_0
 14203  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14204  				continue
 14205  			}
 14206  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14207  			if !(int32(c) == 1) {
 14208  				continue
 14209  			}
 14210  			v.Reset(ssaop.OpARM64MOVWUreg)
 14211  			v.AddArg(x)
 14212  			return true
 14213  		}
 14214  		break
 14215  	}
 14216  	// match: (MULW x (MOVDconst [c]))
 14217  	// cond: v.Type.Size() <= 4 && ssa.CanMulStrengthReduce32(config, int32(c))
 14218  	// result: {ssa.MulStrengthReduce32(v, x, int32(c))}
 14219  	for {
 14220  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14221  			x := v_0
 14222  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14223  				continue
 14224  			}
 14225  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14226  			if !(v.Type.Size() <= 4 && ssa.CanMulStrengthReduce32(config, int32(c))) {
 14227  				continue
 14228  			}
 14229  			v.CopyOf(ssa.MulStrengthReduce32(v, x, int32(c)))
 14230  			return true
 14231  		}
 14232  		break
 14233  	}
 14234  	// match: (MULW (MOVDconst [c]) (MOVDconst [d]))
 14235  	// result: (MOVDconst [int64(uint32(c*d))])
 14236  	for {
 14237  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14238  			if v_0.Op != ssaop.OpARM64MOVDconst {
 14239  				continue
 14240  			}
 14241  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 14242  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14243  				continue
 14244  			}
 14245  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 14246  			v.Reset(ssaop.OpARM64MOVDconst)
 14247  			v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c * d)))
 14248  			return true
 14249  		}
 14250  		break
 14251  	}
 14252  	return false
 14253  }
 14254  func rewriteValue_OpARM64MVN(v *ssa.Value) bool {
 14255  	v_0 := v.Args[0]
 14256  	// match: (MVN (XOR x y))
 14257  	// result: (EON x y)
 14258  	for {
 14259  		if v_0.Op != ssaop.OpARM64XOR {
 14260  			break
 14261  		}
 14262  		y := v_0.Args[1]
 14263  		x := v_0.Args[0]
 14264  		v.Reset(ssaop.OpARM64EON)
 14265  		v.AddArg2(x, y)
 14266  		return true
 14267  	}
 14268  	// match: (MVN (MOVDconst [c]))
 14269  	// result: (MOVDconst [^c])
 14270  	for {
 14271  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14272  			break
 14273  		}
 14274  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14275  		v.Reset(ssaop.OpARM64MOVDconst)
 14276  		v.AuxInt = ssa.Int64ToAuxInt(^c)
 14277  		return true
 14278  	}
 14279  	// match: (MVN x:(SLLconst [c] y))
 14280  	// cond: ssa.ClobberIfDead(x)
 14281  	// result: (MVNshiftLL [c] y)
 14282  	for {
 14283  		x := v_0
 14284  		if x.Op != ssaop.OpARM64SLLconst {
 14285  			break
 14286  		}
 14287  		c := ssa.AuxIntToInt64(x.AuxInt)
 14288  		y := x.Args[0]
 14289  		if !(ssa.ClobberIfDead(x)) {
 14290  			break
 14291  		}
 14292  		v.Reset(ssaop.OpARM64MVNshiftLL)
 14293  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14294  		v.AddArg(y)
 14295  		return true
 14296  	}
 14297  	// match: (MVN x:(SRLconst [c] y))
 14298  	// cond: ssa.ClobberIfDead(x)
 14299  	// result: (MVNshiftRL [c] y)
 14300  	for {
 14301  		x := v_0
 14302  		if x.Op != ssaop.OpARM64SRLconst {
 14303  			break
 14304  		}
 14305  		c := ssa.AuxIntToInt64(x.AuxInt)
 14306  		y := x.Args[0]
 14307  		if !(ssa.ClobberIfDead(x)) {
 14308  			break
 14309  		}
 14310  		v.Reset(ssaop.OpARM64MVNshiftRL)
 14311  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14312  		v.AddArg(y)
 14313  		return true
 14314  	}
 14315  	// match: (MVN x:(SRAconst [c] y))
 14316  	// cond: ssa.ClobberIfDead(x)
 14317  	// result: (MVNshiftRA [c] y)
 14318  	for {
 14319  		x := v_0
 14320  		if x.Op != ssaop.OpARM64SRAconst {
 14321  			break
 14322  		}
 14323  		c := ssa.AuxIntToInt64(x.AuxInt)
 14324  		y := x.Args[0]
 14325  		if !(ssa.ClobberIfDead(x)) {
 14326  			break
 14327  		}
 14328  		v.Reset(ssaop.OpARM64MVNshiftRA)
 14329  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14330  		v.AddArg(y)
 14331  		return true
 14332  	}
 14333  	// match: (MVN x:(RORconst [c] y))
 14334  	// cond: ssa.ClobberIfDead(x)
 14335  	// result: (MVNshiftRO [c] y)
 14336  	for {
 14337  		x := v_0
 14338  		if x.Op != ssaop.OpARM64RORconst {
 14339  			break
 14340  		}
 14341  		c := ssa.AuxIntToInt64(x.AuxInt)
 14342  		y := x.Args[0]
 14343  		if !(ssa.ClobberIfDead(x)) {
 14344  			break
 14345  		}
 14346  		v.Reset(ssaop.OpARM64MVNshiftRO)
 14347  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14348  		v.AddArg(y)
 14349  		return true
 14350  	}
 14351  	return false
 14352  }
 14353  func rewriteValue_OpARM64MVNshiftLL(v *ssa.Value) bool {
 14354  	v_0 := v.Args[0]
 14355  	// match: (MVNshiftLL (MOVDconst [c]) [d])
 14356  	// result: (MOVDconst [^int64(uint64(c)<<uint64(d))])
 14357  	for {
 14358  		d := ssa.AuxIntToInt64(v.AuxInt)
 14359  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14360  			break
 14361  		}
 14362  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14363  		v.Reset(ssaop.OpARM64MOVDconst)
 14364  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 14365  		return true
 14366  	}
 14367  	return false
 14368  }
 14369  func rewriteValue_OpARM64MVNshiftRA(v *ssa.Value) bool {
 14370  	v_0 := v.Args[0]
 14371  	// match: (MVNshiftRA (MOVDconst [c]) [d])
 14372  	// result: (MOVDconst [^(c>>uint64(d))])
 14373  	for {
 14374  		d := ssa.AuxIntToInt64(v.AuxInt)
 14375  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14376  			break
 14377  		}
 14378  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14379  		v.Reset(ssaop.OpARM64MOVDconst)
 14380  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
 14381  		return true
 14382  	}
 14383  	return false
 14384  }
 14385  func rewriteValue_OpARM64MVNshiftRL(v *ssa.Value) bool {
 14386  	v_0 := v.Args[0]
 14387  	// match: (MVNshiftRL (MOVDconst [c]) [d])
 14388  	// result: (MOVDconst [^int64(uint64(c)>>uint64(d))])
 14389  	for {
 14390  		d := ssa.AuxIntToInt64(v.AuxInt)
 14391  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14392  			break
 14393  		}
 14394  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14395  		v.Reset(ssaop.OpARM64MOVDconst)
 14396  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 14397  		return true
 14398  	}
 14399  	return false
 14400  }
 14401  func rewriteValue_OpARM64MVNshiftRO(v *ssa.Value) bool {
 14402  	v_0 := v.Args[0]
 14403  	// match: (MVNshiftRO (MOVDconst [c]) [d])
 14404  	// result: (MOVDconst [^rotateRight64(c, d)])
 14405  	for {
 14406  		d := ssa.AuxIntToInt64(v.AuxInt)
 14407  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14408  			break
 14409  		}
 14410  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14411  		v.Reset(ssaop.OpARM64MOVDconst)
 14412  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
 14413  		return true
 14414  	}
 14415  	return false
 14416  }
 14417  func rewriteValue_OpARM64NEG(v *ssa.Value) bool {
 14418  	v_0 := v.Args[0]
 14419  	// match: (NEG (MUL x y))
 14420  	// result: (MNEG x y)
 14421  	for {
 14422  		if v_0.Op != ssaop.OpARM64MUL {
 14423  			break
 14424  		}
 14425  		y := v_0.Args[1]
 14426  		x := v_0.Args[0]
 14427  		v.Reset(ssaop.OpARM64MNEG)
 14428  		v.AddArg2(x, y)
 14429  		return true
 14430  	}
 14431  	// match: (NEG (MULW x y))
 14432  	// cond: v.Type.Size() <= 4
 14433  	// result: (MNEGW x y)
 14434  	for {
 14435  		if v_0.Op != ssaop.OpARM64MULW {
 14436  			break
 14437  		}
 14438  		y := v_0.Args[1]
 14439  		x := v_0.Args[0]
 14440  		if !(v.Type.Size() <= 4) {
 14441  			break
 14442  		}
 14443  		v.Reset(ssaop.OpARM64MNEGW)
 14444  		v.AddArg2(x, y)
 14445  		return true
 14446  	}
 14447  	// match: (NEG (SUB x y))
 14448  	// result: (SUB y x)
 14449  	for {
 14450  		if v_0.Op != ssaop.OpARM64SUB {
 14451  			break
 14452  		}
 14453  		y := v_0.Args[1]
 14454  		x := v_0.Args[0]
 14455  		v.Reset(ssaop.OpARM64SUB)
 14456  		v.AddArg2(y, x)
 14457  		return true
 14458  	}
 14459  	// match: (NEG (NEG x))
 14460  	// result: x
 14461  	for {
 14462  		if v_0.Op != ssaop.OpARM64NEG {
 14463  			break
 14464  		}
 14465  		x := v_0.Args[0]
 14466  		v.CopyOf(x)
 14467  		return true
 14468  	}
 14469  	// match: (NEG (MOVDconst [c]))
 14470  	// result: (MOVDconst [-c])
 14471  	for {
 14472  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14473  			break
 14474  		}
 14475  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14476  		v.Reset(ssaop.OpARM64MOVDconst)
 14477  		v.AuxInt = ssa.Int64ToAuxInt(-c)
 14478  		return true
 14479  	}
 14480  	// match: (NEG x:(SLLconst [c] y))
 14481  	// cond: ssa.ClobberIfDead(x)
 14482  	// result: (NEGshiftLL [c] y)
 14483  	for {
 14484  		x := v_0
 14485  		if x.Op != ssaop.OpARM64SLLconst {
 14486  			break
 14487  		}
 14488  		c := ssa.AuxIntToInt64(x.AuxInt)
 14489  		y := x.Args[0]
 14490  		if !(ssa.ClobberIfDead(x)) {
 14491  			break
 14492  		}
 14493  		v.Reset(ssaop.OpARM64NEGshiftLL)
 14494  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14495  		v.AddArg(y)
 14496  		return true
 14497  	}
 14498  	// match: (NEG x:(SRLconst [c] y))
 14499  	// cond: ssa.ClobberIfDead(x)
 14500  	// result: (NEGshiftRL [c] y)
 14501  	for {
 14502  		x := v_0
 14503  		if x.Op != ssaop.OpARM64SRLconst {
 14504  			break
 14505  		}
 14506  		c := ssa.AuxIntToInt64(x.AuxInt)
 14507  		y := x.Args[0]
 14508  		if !(ssa.ClobberIfDead(x)) {
 14509  			break
 14510  		}
 14511  		v.Reset(ssaop.OpARM64NEGshiftRL)
 14512  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14513  		v.AddArg(y)
 14514  		return true
 14515  	}
 14516  	// match: (NEG x:(SRAconst [c] y))
 14517  	// cond: ssa.ClobberIfDead(x)
 14518  	// result: (NEGshiftRA [c] y)
 14519  	for {
 14520  		x := v_0
 14521  		if x.Op != ssaop.OpARM64SRAconst {
 14522  			break
 14523  		}
 14524  		c := ssa.AuxIntToInt64(x.AuxInt)
 14525  		y := x.Args[0]
 14526  		if !(ssa.ClobberIfDead(x)) {
 14527  			break
 14528  		}
 14529  		v.Reset(ssaop.OpARM64NEGshiftRA)
 14530  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14531  		v.AddArg(y)
 14532  		return true
 14533  	}
 14534  	return false
 14535  }
 14536  func rewriteValue_OpARM64NEGshiftLL(v *ssa.Value) bool {
 14537  	v_0 := v.Args[0]
 14538  	// match: (NEGshiftLL (MOVDconst [c]) [d])
 14539  	// result: (MOVDconst [-int64(uint64(c)<<uint64(d))])
 14540  	for {
 14541  		d := ssa.AuxIntToInt64(v.AuxInt)
 14542  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14543  			break
 14544  		}
 14545  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14546  		v.Reset(ssaop.OpARM64MOVDconst)
 14547  		v.AuxInt = ssa.Int64ToAuxInt(-int64(uint64(c) << uint64(d)))
 14548  		return true
 14549  	}
 14550  	return false
 14551  }
 14552  func rewriteValue_OpARM64NEGshiftRA(v *ssa.Value) bool {
 14553  	v_0 := v.Args[0]
 14554  	// match: (NEGshiftRA (MOVDconst [c]) [d])
 14555  	// result: (MOVDconst [-(c>>uint64(d))])
 14556  	for {
 14557  		d := ssa.AuxIntToInt64(v.AuxInt)
 14558  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14559  			break
 14560  		}
 14561  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14562  		v.Reset(ssaop.OpARM64MOVDconst)
 14563  		v.AuxInt = ssa.Int64ToAuxInt(-(c >> uint64(d)))
 14564  		return true
 14565  	}
 14566  	return false
 14567  }
 14568  func rewriteValue_OpARM64NEGshiftRL(v *ssa.Value) bool {
 14569  	v_0 := v.Args[0]
 14570  	// match: (NEGshiftRL (MOVDconst [c]) [d])
 14571  	// result: (MOVDconst [-int64(uint64(c)>>uint64(d))])
 14572  	for {
 14573  		d := ssa.AuxIntToInt64(v.AuxInt)
 14574  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14575  			break
 14576  		}
 14577  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14578  		v.Reset(ssaop.OpARM64MOVDconst)
 14579  		v.AuxInt = ssa.Int64ToAuxInt(-int64(uint64(c) >> uint64(d)))
 14580  		return true
 14581  	}
 14582  	return false
 14583  }
 14584  func rewriteValue_OpARM64NotEqual(v *ssa.Value) bool {
 14585  	v_0 := v.Args[0]
 14586  	b := v.Block
 14587  	// match: (NotEqual (CMPconst [0] z:(AND x y)))
 14588  	// cond: z.Uses == 1
 14589  	// result: (NotEqual (TST x y))
 14590  	for {
 14591  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14592  			break
 14593  		}
 14594  		z := v_0.Args[0]
 14595  		if z.Op != ssaop.OpARM64AND {
 14596  			break
 14597  		}
 14598  		y := z.Args[1]
 14599  		x := z.Args[0]
 14600  		if !(z.Uses == 1) {
 14601  			break
 14602  		}
 14603  		v.Reset(ssaop.OpARM64NotEqual)
 14604  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
 14605  		v0.AddArg2(x, y)
 14606  		v.AddArg(v0)
 14607  		return true
 14608  	}
 14609  	// match: (NotEqual (CMPWconst [0] x:(ANDconst [c] y)))
 14610  	// cond: x.Uses == 1
 14611  	// result: (NotEqual (TSTWconst [int32(c)] y))
 14612  	for {
 14613  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14614  			break
 14615  		}
 14616  		x := v_0.Args[0]
 14617  		if x.Op != ssaop.OpARM64ANDconst {
 14618  			break
 14619  		}
 14620  		c := ssa.AuxIntToInt64(x.AuxInt)
 14621  		y := x.Args[0]
 14622  		if !(x.Uses == 1) {
 14623  			break
 14624  		}
 14625  		v.Reset(ssaop.OpARM64NotEqual)
 14626  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 14627  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 14628  		v0.AddArg(y)
 14629  		v.AddArg(v0)
 14630  		return true
 14631  	}
 14632  	// match: (NotEqual (CMPWconst [0] z:(AND x y)))
 14633  	// cond: z.Uses == 1
 14634  	// result: (NotEqual (TSTW x y))
 14635  	for {
 14636  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14637  			break
 14638  		}
 14639  		z := v_0.Args[0]
 14640  		if z.Op != ssaop.OpARM64AND {
 14641  			break
 14642  		}
 14643  		y := z.Args[1]
 14644  		x := z.Args[0]
 14645  		if !(z.Uses == 1) {
 14646  			break
 14647  		}
 14648  		v.Reset(ssaop.OpARM64NotEqual)
 14649  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 14650  		v0.AddArg2(x, y)
 14651  		v.AddArg(v0)
 14652  		return true
 14653  	}
 14654  	// match: (NotEqual (CMPconst [0] x:(ANDconst [c] y)))
 14655  	// cond: x.Uses == 1
 14656  	// result: (NotEqual (TSTconst [c] y))
 14657  	for {
 14658  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14659  			break
 14660  		}
 14661  		x := v_0.Args[0]
 14662  		if x.Op != ssaop.OpARM64ANDconst {
 14663  			break
 14664  		}
 14665  		c := ssa.AuxIntToInt64(x.AuxInt)
 14666  		y := x.Args[0]
 14667  		if !(x.Uses == 1) {
 14668  			break
 14669  		}
 14670  		v.Reset(ssaop.OpARM64NotEqual)
 14671  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 14672  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 14673  		v0.AddArg(y)
 14674  		v.AddArg(v0)
 14675  		return true
 14676  	}
 14677  	// match: (NotEqual (CMP x z:(NEG y)))
 14678  	// cond: z.Uses == 1
 14679  	// result: (NotEqual (CMN x y))
 14680  	for {
 14681  		if v_0.Op != ssaop.OpARM64CMP {
 14682  			break
 14683  		}
 14684  		_ = v_0.Args[1]
 14685  		x := v_0.Args[0]
 14686  		z := v_0.Args[1]
 14687  		if z.Op != ssaop.OpARM64NEG {
 14688  			break
 14689  		}
 14690  		y := z.Args[0]
 14691  		if !(z.Uses == 1) {
 14692  			break
 14693  		}
 14694  		v.Reset(ssaop.OpARM64NotEqual)
 14695  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 14696  		v0.AddArg2(x, y)
 14697  		v.AddArg(v0)
 14698  		return true
 14699  	}
 14700  	// match: (NotEqual (CMPW x z:(NEG y)))
 14701  	// cond: z.Uses == 1
 14702  	// result: (NotEqual (CMNW x y))
 14703  	for {
 14704  		if v_0.Op != ssaop.OpARM64CMPW {
 14705  			break
 14706  		}
 14707  		_ = v_0.Args[1]
 14708  		x := v_0.Args[0]
 14709  		z := v_0.Args[1]
 14710  		if z.Op != ssaop.OpARM64NEG {
 14711  			break
 14712  		}
 14713  		y := z.Args[0]
 14714  		if !(z.Uses == 1) {
 14715  			break
 14716  		}
 14717  		v.Reset(ssaop.OpARM64NotEqual)
 14718  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 14719  		v0.AddArg2(x, y)
 14720  		v.AddArg(v0)
 14721  		return true
 14722  	}
 14723  	// match: (NotEqual (CMPconst [0] x:(ADDconst [c] y)))
 14724  	// cond: x.Uses == 1
 14725  	// result: (NotEqual (CMNconst [c] y))
 14726  	for {
 14727  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14728  			break
 14729  		}
 14730  		x := v_0.Args[0]
 14731  		if x.Op != ssaop.OpARM64ADDconst {
 14732  			break
 14733  		}
 14734  		c := ssa.AuxIntToInt64(x.AuxInt)
 14735  		y := x.Args[0]
 14736  		if !(x.Uses == 1) {
 14737  			break
 14738  		}
 14739  		v.Reset(ssaop.OpARM64NotEqual)
 14740  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 14741  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 14742  		v0.AddArg(y)
 14743  		v.AddArg(v0)
 14744  		return true
 14745  	}
 14746  	// match: (NotEqual (CMPWconst [0] x:(ADDconst [c] y)))
 14747  	// cond: x.Uses == 1
 14748  	// result: (NotEqual (CMNWconst [int32(c)] y))
 14749  	for {
 14750  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14751  			break
 14752  		}
 14753  		x := v_0.Args[0]
 14754  		if x.Op != ssaop.OpARM64ADDconst {
 14755  			break
 14756  		}
 14757  		c := ssa.AuxIntToInt64(x.AuxInt)
 14758  		y := x.Args[0]
 14759  		if !(x.Uses == 1) {
 14760  			break
 14761  		}
 14762  		v.Reset(ssaop.OpARM64NotEqual)
 14763  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 14764  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 14765  		v0.AddArg(y)
 14766  		v.AddArg(v0)
 14767  		return true
 14768  	}
 14769  	// match: (NotEqual (CMPconst [0] z:(ADD x y)))
 14770  	// cond: z.Uses == 1
 14771  	// result: (NotEqual (CMN x y))
 14772  	for {
 14773  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14774  			break
 14775  		}
 14776  		z := v_0.Args[0]
 14777  		if z.Op != ssaop.OpARM64ADD {
 14778  			break
 14779  		}
 14780  		y := z.Args[1]
 14781  		x := z.Args[0]
 14782  		if !(z.Uses == 1) {
 14783  			break
 14784  		}
 14785  		v.Reset(ssaop.OpARM64NotEqual)
 14786  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 14787  		v0.AddArg2(x, y)
 14788  		v.AddArg(v0)
 14789  		return true
 14790  	}
 14791  	// match: (NotEqual (CMPWconst [0] z:(ADD x y)))
 14792  	// cond: z.Uses == 1
 14793  	// result: (NotEqual (CMNW x y))
 14794  	for {
 14795  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14796  			break
 14797  		}
 14798  		z := v_0.Args[0]
 14799  		if z.Op != ssaop.OpARM64ADD {
 14800  			break
 14801  		}
 14802  		y := z.Args[1]
 14803  		x := z.Args[0]
 14804  		if !(z.Uses == 1) {
 14805  			break
 14806  		}
 14807  		v.Reset(ssaop.OpARM64NotEqual)
 14808  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 14809  		v0.AddArg2(x, y)
 14810  		v.AddArg(v0)
 14811  		return true
 14812  	}
 14813  	// match: (NotEqual (CMPconst [0] z:(MADD a x y)))
 14814  	// cond: z.Uses == 1
 14815  	// result: (NotEqual (CMN a (MUL <x.Type> x y)))
 14816  	for {
 14817  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14818  			break
 14819  		}
 14820  		z := v_0.Args[0]
 14821  		if z.Op != ssaop.OpARM64MADD {
 14822  			break
 14823  		}
 14824  		y := z.Args[2]
 14825  		a := z.Args[0]
 14826  		x := z.Args[1]
 14827  		if !(z.Uses == 1) {
 14828  			break
 14829  		}
 14830  		v.Reset(ssaop.OpARM64NotEqual)
 14831  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 14832  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
 14833  		v1.AddArg2(x, y)
 14834  		v0.AddArg2(a, v1)
 14835  		v.AddArg(v0)
 14836  		return true
 14837  	}
 14838  	// match: (NotEqual (CMPWconst [0] z:(MADDW a x y)))
 14839  	// cond: z.Uses == 1
 14840  	// result: (NotEqual (CMNW a (MULW <x.Type> x y)))
 14841  	for {
 14842  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14843  			break
 14844  		}
 14845  		z := v_0.Args[0]
 14846  		if z.Op != ssaop.OpARM64MADDW {
 14847  			break
 14848  		}
 14849  		y := z.Args[2]
 14850  		a := z.Args[0]
 14851  		x := z.Args[1]
 14852  		if !(z.Uses == 1) {
 14853  			break
 14854  		}
 14855  		v.Reset(ssaop.OpARM64NotEqual)
 14856  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 14857  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
 14858  		v1.AddArg2(x, y)
 14859  		v0.AddArg2(a, v1)
 14860  		v.AddArg(v0)
 14861  		return true
 14862  	}
 14863  	// match: (NotEqual (CMPconst [0] z:(MSUB a x y)))
 14864  	// cond: z.Uses == 1
 14865  	// result: (NotEqual (CMP a (MUL <x.Type> x y)))
 14866  	for {
 14867  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14868  			break
 14869  		}
 14870  		z := v_0.Args[0]
 14871  		if z.Op != ssaop.OpARM64MSUB {
 14872  			break
 14873  		}
 14874  		y := z.Args[2]
 14875  		a := z.Args[0]
 14876  		x := z.Args[1]
 14877  		if !(z.Uses == 1) {
 14878  			break
 14879  		}
 14880  		v.Reset(ssaop.OpARM64NotEqual)
 14881  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 14882  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
 14883  		v1.AddArg2(x, y)
 14884  		v0.AddArg2(a, v1)
 14885  		v.AddArg(v0)
 14886  		return true
 14887  	}
 14888  	// match: (NotEqual (CMPWconst [0] z:(MSUBW a x y)))
 14889  	// cond: z.Uses == 1
 14890  	// result: (NotEqual (CMPW a (MULW <x.Type> x y)))
 14891  	for {
 14892  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14893  			break
 14894  		}
 14895  		z := v_0.Args[0]
 14896  		if z.Op != ssaop.OpARM64MSUBW {
 14897  			break
 14898  		}
 14899  		y := z.Args[2]
 14900  		a := z.Args[0]
 14901  		x := z.Args[1]
 14902  		if !(z.Uses == 1) {
 14903  			break
 14904  		}
 14905  		v.Reset(ssaop.OpARM64NotEqual)
 14906  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 14907  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
 14908  		v1.AddArg2(x, y)
 14909  		v0.AddArg2(a, v1)
 14910  		v.AddArg(v0)
 14911  		return true
 14912  	}
 14913  	// match: (NotEqual (FlagConstant [fc]))
 14914  	// result: (MOVDconst [ssa.B2i(fc.Ne())])
 14915  	for {
 14916  		if v_0.Op != ssaop.OpARM64FlagConstant {
 14917  			break
 14918  		}
 14919  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 14920  		v.Reset(ssaop.OpARM64MOVDconst)
 14921  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ne()))
 14922  		return true
 14923  	}
 14924  	// match: (NotEqual (InvertFlags x))
 14925  	// result: (NotEqual x)
 14926  	for {
 14927  		if v_0.Op != ssaop.OpARM64InvertFlags {
 14928  			break
 14929  		}
 14930  		x := v_0.Args[0]
 14931  		v.Reset(ssaop.OpARM64NotEqual)
 14932  		v.AddArg(x)
 14933  		return true
 14934  	}
 14935  	return false
 14936  }
 14937  func rewriteValue_OpARM64OR(v *ssa.Value) bool {
 14938  	v_1 := v.Args[1]
 14939  	v_0 := v.Args[0]
 14940  	// match: (OR x (MOVDconst [c]))
 14941  	// result: (ORconst [c] x)
 14942  	for {
 14943  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14944  			x := v_0
 14945  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14946  				continue
 14947  			}
 14948  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14949  			v.Reset(ssaop.OpARM64ORconst)
 14950  			v.AuxInt = ssa.Int64ToAuxInt(c)
 14951  			v.AddArg(x)
 14952  			return true
 14953  		}
 14954  		break
 14955  	}
 14956  	// match: (OR x x)
 14957  	// result: x
 14958  	for {
 14959  		x := v_0
 14960  		if x != v_1 {
 14961  			break
 14962  		}
 14963  		v.CopyOf(x)
 14964  		return true
 14965  	}
 14966  	// match: (OR x (MVN y))
 14967  	// result: (ORN x y)
 14968  	for {
 14969  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14970  			x := v_0
 14971  			if v_1.Op != ssaop.OpARM64MVN {
 14972  				continue
 14973  			}
 14974  			y := v_1.Args[0]
 14975  			v.Reset(ssaop.OpARM64ORN)
 14976  			v.AddArg2(x, y)
 14977  			return true
 14978  		}
 14979  		break
 14980  	}
 14981  	// match: (OR x0 x1:(SLLconst [c] y))
 14982  	// cond: ssa.ClobberIfDead(x1)
 14983  	// result: (ORshiftLL x0 y [c])
 14984  	for {
 14985  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14986  			x0 := v_0
 14987  			x1 := v_1
 14988  			if x1.Op != ssaop.OpARM64SLLconst {
 14989  				continue
 14990  			}
 14991  			c := ssa.AuxIntToInt64(x1.AuxInt)
 14992  			y := x1.Args[0]
 14993  			if !(ssa.ClobberIfDead(x1)) {
 14994  				continue
 14995  			}
 14996  			v.Reset(ssaop.OpARM64ORshiftLL)
 14997  			v.AuxInt = ssa.Int64ToAuxInt(c)
 14998  			v.AddArg2(x0, y)
 14999  			return true
 15000  		}
 15001  		break
 15002  	}
 15003  	// match: (OR x0 x1:(SRLconst [c] y))
 15004  	// cond: ssa.ClobberIfDead(x1)
 15005  	// result: (ORshiftRL x0 y [c])
 15006  	for {
 15007  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15008  			x0 := v_0
 15009  			x1 := v_1
 15010  			if x1.Op != ssaop.OpARM64SRLconst {
 15011  				continue
 15012  			}
 15013  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15014  			y := x1.Args[0]
 15015  			if !(ssa.ClobberIfDead(x1)) {
 15016  				continue
 15017  			}
 15018  			v.Reset(ssaop.OpARM64ORshiftRL)
 15019  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15020  			v.AddArg2(x0, y)
 15021  			return true
 15022  		}
 15023  		break
 15024  	}
 15025  	// match: (OR x0 x1:(SRAconst [c] y))
 15026  	// cond: ssa.ClobberIfDead(x1)
 15027  	// result: (ORshiftRA x0 y [c])
 15028  	for {
 15029  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15030  			x0 := v_0
 15031  			x1 := v_1
 15032  			if x1.Op != ssaop.OpARM64SRAconst {
 15033  				continue
 15034  			}
 15035  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15036  			y := x1.Args[0]
 15037  			if !(ssa.ClobberIfDead(x1)) {
 15038  				continue
 15039  			}
 15040  			v.Reset(ssaop.OpARM64ORshiftRA)
 15041  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15042  			v.AddArg2(x0, y)
 15043  			return true
 15044  		}
 15045  		break
 15046  	}
 15047  	// match: (OR x0 x1:(RORconst [c] y))
 15048  	// cond: ssa.ClobberIfDead(x1)
 15049  	// result: (ORshiftRO x0 y [c])
 15050  	for {
 15051  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15052  			x0 := v_0
 15053  			x1 := v_1
 15054  			if x1.Op != ssaop.OpARM64RORconst {
 15055  				continue
 15056  			}
 15057  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15058  			y := x1.Args[0]
 15059  			if !(ssa.ClobberIfDead(x1)) {
 15060  				continue
 15061  			}
 15062  			v.Reset(ssaop.OpARM64ORshiftRO)
 15063  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15064  			v.AddArg2(x0, y)
 15065  			return true
 15066  		}
 15067  		break
 15068  	}
 15069  	// match: (OR (UBFIZ [bfc] x) (ANDconst [ac] y))
 15070  	// cond: ac == ^((1<<uint(bfc.Width())-1) << uint(bfc.Lsb()))
 15071  	// result: (BFI [bfc] y x)
 15072  	for {
 15073  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15074  			if v_0.Op != ssaop.OpARM64UBFIZ {
 15075  				continue
 15076  			}
 15077  			bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15078  			x := v_0.Args[0]
 15079  			if v_1.Op != ssaop.OpARM64ANDconst {
 15080  				continue
 15081  			}
 15082  			ac := ssa.AuxIntToInt64(v_1.AuxInt)
 15083  			y := v_1.Args[0]
 15084  			if !(ac == ^((1<<uint(bfc.Width()) - 1) << uint(bfc.Lsb()))) {
 15085  				continue
 15086  			}
 15087  			v.Reset(ssaop.OpARM64BFI)
 15088  			v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15089  			v.AddArg2(y, x)
 15090  			return true
 15091  		}
 15092  		break
 15093  	}
 15094  	// match: (OR (UBFX [bfc] x) (ANDconst [ac] y))
 15095  	// cond: ac == ^(1<<uint(bfc.Width())-1)
 15096  	// result: (BFXIL [bfc] y x)
 15097  	for {
 15098  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15099  			if v_0.Op != ssaop.OpARM64UBFX {
 15100  				continue
 15101  			}
 15102  			bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15103  			x := v_0.Args[0]
 15104  			if v_1.Op != ssaop.OpARM64ANDconst {
 15105  				continue
 15106  			}
 15107  			ac := ssa.AuxIntToInt64(v_1.AuxInt)
 15108  			y := v_1.Args[0]
 15109  			if !(ac == ^(1<<uint(bfc.Width()) - 1)) {
 15110  				continue
 15111  			}
 15112  			v.Reset(ssaop.OpARM64BFXIL)
 15113  			v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15114  			v.AddArg2(y, x)
 15115  			return true
 15116  		}
 15117  		break
 15118  	}
 15119  	return false
 15120  }
 15121  func rewriteValue_OpARM64ORN(v *ssa.Value) bool {
 15122  	v_1 := v.Args[1]
 15123  	v_0 := v.Args[0]
 15124  	// match: (ORN x (MOVDconst [c]))
 15125  	// result: (ORconst [^c] x)
 15126  	for {
 15127  		x := v_0
 15128  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15129  			break
 15130  		}
 15131  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15132  		v.Reset(ssaop.OpARM64ORconst)
 15133  		v.AuxInt = ssa.Int64ToAuxInt(^c)
 15134  		v.AddArg(x)
 15135  		return true
 15136  	}
 15137  	// match: (ORN x x)
 15138  	// result: (MOVDconst [-1])
 15139  	for {
 15140  		x := v_0
 15141  		if x != v_1 {
 15142  			break
 15143  		}
 15144  		v.Reset(ssaop.OpARM64MOVDconst)
 15145  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15146  		return true
 15147  	}
 15148  	// match: (ORN x0 x1:(SLLconst [c] y))
 15149  	// cond: ssa.ClobberIfDead(x1)
 15150  	// result: (ORNshiftLL x0 y [c])
 15151  	for {
 15152  		x0 := v_0
 15153  		x1 := v_1
 15154  		if x1.Op != ssaop.OpARM64SLLconst {
 15155  			break
 15156  		}
 15157  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15158  		y := x1.Args[0]
 15159  		if !(ssa.ClobberIfDead(x1)) {
 15160  			break
 15161  		}
 15162  		v.Reset(ssaop.OpARM64ORNshiftLL)
 15163  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15164  		v.AddArg2(x0, y)
 15165  		return true
 15166  	}
 15167  	// match: (ORN x0 x1:(SRLconst [c] y))
 15168  	// cond: ssa.ClobberIfDead(x1)
 15169  	// result: (ORNshiftRL x0 y [c])
 15170  	for {
 15171  		x0 := v_0
 15172  		x1 := v_1
 15173  		if x1.Op != ssaop.OpARM64SRLconst {
 15174  			break
 15175  		}
 15176  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15177  		y := x1.Args[0]
 15178  		if !(ssa.ClobberIfDead(x1)) {
 15179  			break
 15180  		}
 15181  		v.Reset(ssaop.OpARM64ORNshiftRL)
 15182  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15183  		v.AddArg2(x0, y)
 15184  		return true
 15185  	}
 15186  	// match: (ORN x0 x1:(SRAconst [c] y))
 15187  	// cond: ssa.ClobberIfDead(x1)
 15188  	// result: (ORNshiftRA x0 y [c])
 15189  	for {
 15190  		x0 := v_0
 15191  		x1 := v_1
 15192  		if x1.Op != ssaop.OpARM64SRAconst {
 15193  			break
 15194  		}
 15195  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15196  		y := x1.Args[0]
 15197  		if !(ssa.ClobberIfDead(x1)) {
 15198  			break
 15199  		}
 15200  		v.Reset(ssaop.OpARM64ORNshiftRA)
 15201  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15202  		v.AddArg2(x0, y)
 15203  		return true
 15204  	}
 15205  	// match: (ORN x0 x1:(RORconst [c] y))
 15206  	// cond: ssa.ClobberIfDead(x1)
 15207  	// result: (ORNshiftRO x0 y [c])
 15208  	for {
 15209  		x0 := v_0
 15210  		x1 := v_1
 15211  		if x1.Op != ssaop.OpARM64RORconst {
 15212  			break
 15213  		}
 15214  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15215  		y := x1.Args[0]
 15216  		if !(ssa.ClobberIfDead(x1)) {
 15217  			break
 15218  		}
 15219  		v.Reset(ssaop.OpARM64ORNshiftRO)
 15220  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15221  		v.AddArg2(x0, y)
 15222  		return true
 15223  	}
 15224  	return false
 15225  }
 15226  func rewriteValue_OpARM64ORNshiftLL(v *ssa.Value) bool {
 15227  	v_1 := v.Args[1]
 15228  	v_0 := v.Args[0]
 15229  	// match: (ORNshiftLL x (MOVDconst [c]) [d])
 15230  	// result: (ORconst x [^int64(uint64(c)<<uint64(d))])
 15231  	for {
 15232  		d := ssa.AuxIntToInt64(v.AuxInt)
 15233  		x := v_0
 15234  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15235  			break
 15236  		}
 15237  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15238  		v.Reset(ssaop.OpARM64ORconst)
 15239  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 15240  		v.AddArg(x)
 15241  		return true
 15242  	}
 15243  	// match: (ORNshiftLL (SLLconst x [c]) x [c])
 15244  	// result: (MOVDconst [-1])
 15245  	for {
 15246  		c := ssa.AuxIntToInt64(v.AuxInt)
 15247  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15248  			break
 15249  		}
 15250  		x := v_0.Args[0]
 15251  		if x != v_1 {
 15252  			break
 15253  		}
 15254  		v.Reset(ssaop.OpARM64MOVDconst)
 15255  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15256  		return true
 15257  	}
 15258  	return false
 15259  }
 15260  func rewriteValue_OpARM64ORNshiftRA(v *ssa.Value) bool {
 15261  	v_1 := v.Args[1]
 15262  	v_0 := v.Args[0]
 15263  	// match: (ORNshiftRA x (MOVDconst [c]) [d])
 15264  	// result: (ORconst x [^(c>>uint64(d))])
 15265  	for {
 15266  		d := ssa.AuxIntToInt64(v.AuxInt)
 15267  		x := v_0
 15268  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15269  			break
 15270  		}
 15271  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15272  		v.Reset(ssaop.OpARM64ORconst)
 15273  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
 15274  		v.AddArg(x)
 15275  		return true
 15276  	}
 15277  	// match: (ORNshiftRA (SRAconst x [c]) x [c])
 15278  	// result: (MOVDconst [-1])
 15279  	for {
 15280  		c := ssa.AuxIntToInt64(v.AuxInt)
 15281  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15282  			break
 15283  		}
 15284  		x := v_0.Args[0]
 15285  		if x != v_1 {
 15286  			break
 15287  		}
 15288  		v.Reset(ssaop.OpARM64MOVDconst)
 15289  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15290  		return true
 15291  	}
 15292  	return false
 15293  }
 15294  func rewriteValue_OpARM64ORNshiftRL(v *ssa.Value) bool {
 15295  	v_1 := v.Args[1]
 15296  	v_0 := v.Args[0]
 15297  	// match: (ORNshiftRL x (MOVDconst [c]) [d])
 15298  	// result: (ORconst x [^int64(uint64(c)>>uint64(d))])
 15299  	for {
 15300  		d := ssa.AuxIntToInt64(v.AuxInt)
 15301  		x := v_0
 15302  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15303  			break
 15304  		}
 15305  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15306  		v.Reset(ssaop.OpARM64ORconst)
 15307  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 15308  		v.AddArg(x)
 15309  		return true
 15310  	}
 15311  	// match: (ORNshiftRL (SRLconst x [c]) x [c])
 15312  	// result: (MOVDconst [-1])
 15313  	for {
 15314  		c := ssa.AuxIntToInt64(v.AuxInt)
 15315  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15316  			break
 15317  		}
 15318  		x := v_0.Args[0]
 15319  		if x != v_1 {
 15320  			break
 15321  		}
 15322  		v.Reset(ssaop.OpARM64MOVDconst)
 15323  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15324  		return true
 15325  	}
 15326  	return false
 15327  }
 15328  func rewriteValue_OpARM64ORNshiftRO(v *ssa.Value) bool {
 15329  	v_1 := v.Args[1]
 15330  	v_0 := v.Args[0]
 15331  	// match: (ORNshiftRO x (MOVDconst [c]) [d])
 15332  	// result: (ORconst x [^rotateRight64(c, d)])
 15333  	for {
 15334  		d := ssa.AuxIntToInt64(v.AuxInt)
 15335  		x := v_0
 15336  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15337  			break
 15338  		}
 15339  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15340  		v.Reset(ssaop.OpARM64ORconst)
 15341  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
 15342  		v.AddArg(x)
 15343  		return true
 15344  	}
 15345  	// match: (ORNshiftRO (RORconst x [c]) x [c])
 15346  	// result: (MOVDconst [-1])
 15347  	for {
 15348  		c := ssa.AuxIntToInt64(v.AuxInt)
 15349  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15350  			break
 15351  		}
 15352  		x := v_0.Args[0]
 15353  		if x != v_1 {
 15354  			break
 15355  		}
 15356  		v.Reset(ssaop.OpARM64MOVDconst)
 15357  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15358  		return true
 15359  	}
 15360  	return false
 15361  }
 15362  func rewriteValue_OpARM64ORconst(v *ssa.Value) bool {
 15363  	v_0 := v.Args[0]
 15364  	// match: (ORconst [0] x)
 15365  	// result: x
 15366  	for {
 15367  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 15368  			break
 15369  		}
 15370  		x := v_0
 15371  		v.CopyOf(x)
 15372  		return true
 15373  	}
 15374  	// match: (ORconst [-1] _)
 15375  	// result: (MOVDconst [-1])
 15376  	for {
 15377  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
 15378  			break
 15379  		}
 15380  		v.Reset(ssaop.OpARM64MOVDconst)
 15381  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15382  		return true
 15383  	}
 15384  	// match: (ORconst [c] (MOVDconst [d]))
 15385  	// result: (MOVDconst [c|d])
 15386  	for {
 15387  		c := ssa.AuxIntToInt64(v.AuxInt)
 15388  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15389  			break
 15390  		}
 15391  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 15392  		v.Reset(ssaop.OpARM64MOVDconst)
 15393  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
 15394  		return true
 15395  	}
 15396  	// match: (ORconst [c] (ORconst [d] x))
 15397  	// result: (ORconst [c|d] x)
 15398  	for {
 15399  		c := ssa.AuxIntToInt64(v.AuxInt)
 15400  		if v_0.Op != ssaop.OpARM64ORconst {
 15401  			break
 15402  		}
 15403  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 15404  		x := v_0.Args[0]
 15405  		v.Reset(ssaop.OpARM64ORconst)
 15406  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
 15407  		v.AddArg(x)
 15408  		return true
 15409  	}
 15410  	// match: (ORconst [c1] (ANDconst [c2] x))
 15411  	// cond: c2|c1 == ^0
 15412  	// result: (ORconst [c1] x)
 15413  	for {
 15414  		c1 := ssa.AuxIntToInt64(v.AuxInt)
 15415  		if v_0.Op != ssaop.OpARM64ANDconst {
 15416  			break
 15417  		}
 15418  		c2 := ssa.AuxIntToInt64(v_0.AuxInt)
 15419  		x := v_0.Args[0]
 15420  		if !(c2|c1 == ^0) {
 15421  			break
 15422  		}
 15423  		v.Reset(ssaop.OpARM64ORconst)
 15424  		v.AuxInt = ssa.Int64ToAuxInt(c1)
 15425  		v.AddArg(x)
 15426  		return true
 15427  	}
 15428  	return false
 15429  }
 15430  func rewriteValue_OpARM64ORshiftLL(v *ssa.Value) bool {
 15431  	v_1 := v.Args[1]
 15432  	v_0 := v.Args[0]
 15433  	b := v.Block
 15434  	typ := &b.Func.Config.Types
 15435  	// match: (ORshiftLL (MOVDconst [c]) x [d])
 15436  	// result: (ORconst [c] (SLLconst <x.Type> x [d]))
 15437  	for {
 15438  		d := ssa.AuxIntToInt64(v.AuxInt)
 15439  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15440  			break
 15441  		}
 15442  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15443  		x := v_1
 15444  		v.Reset(ssaop.OpARM64ORconst)
 15445  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15446  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 15447  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 15448  		v0.AddArg(x)
 15449  		v.AddArg(v0)
 15450  		return true
 15451  	}
 15452  	// match: (ORshiftLL x (MOVDconst [c]) [d])
 15453  	// result: (ORconst x [int64(uint64(c)<<uint64(d))])
 15454  	for {
 15455  		d := ssa.AuxIntToInt64(v.AuxInt)
 15456  		x := v_0
 15457  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15458  			break
 15459  		}
 15460  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15461  		v.Reset(ssaop.OpARM64ORconst)
 15462  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 15463  		v.AddArg(x)
 15464  		return true
 15465  	}
 15466  	// match: (ORshiftLL y:(SLLconst x [c]) x [c])
 15467  	// result: y
 15468  	for {
 15469  		c := ssa.AuxIntToInt64(v.AuxInt)
 15470  		y := v_0
 15471  		if y.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 15472  			break
 15473  		}
 15474  		x := y.Args[0]
 15475  		if x != v_1 {
 15476  			break
 15477  		}
 15478  		v.CopyOf(y)
 15479  		return true
 15480  	}
 15481  	// match: (ORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
 15482  	// result: (REV16W x)
 15483  	for {
 15484  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
 15485  			break
 15486  		}
 15487  		x := v_0.Args[0]
 15488  		if x != v_1 {
 15489  			break
 15490  		}
 15491  		v.Reset(ssaop.OpARM64REV16W)
 15492  		v.AddArg(x)
 15493  		return true
 15494  	}
 15495  	// match: (ORshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 15496  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 15497  	// result: (REV16W x)
 15498  	for {
 15499  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
 15500  			break
 15501  		}
 15502  		v_0_0 := v_0.Args[0]
 15503  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 15504  			break
 15505  		}
 15506  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 15507  		x := v_0_0.Args[0]
 15508  		if v_1.Op != ssaop.OpARM64ANDconst {
 15509  			break
 15510  		}
 15511  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 15512  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 15513  			break
 15514  		}
 15515  		v.Reset(ssaop.OpARM64REV16W)
 15516  		v.AddArg(x)
 15517  		return true
 15518  	}
 15519  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 15520  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 15521  	// result: (REV16 x)
 15522  	for {
 15523  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 15524  			break
 15525  		}
 15526  		v_0_0 := v_0.Args[0]
 15527  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 15528  			break
 15529  		}
 15530  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 15531  		x := v_0_0.Args[0]
 15532  		if v_1.Op != ssaop.OpARM64ANDconst {
 15533  			break
 15534  		}
 15535  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 15536  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 15537  			break
 15538  		}
 15539  		v.Reset(ssaop.OpARM64REV16)
 15540  		v.AddArg(x)
 15541  		return true
 15542  	}
 15543  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 15544  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 15545  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 15546  	for {
 15547  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 15548  			break
 15549  		}
 15550  		v_0_0 := v_0.Args[0]
 15551  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 15552  			break
 15553  		}
 15554  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 15555  		x := v_0_0.Args[0]
 15556  		if v_1.Op != ssaop.OpARM64ANDconst {
 15557  			break
 15558  		}
 15559  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 15560  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 15561  			break
 15562  		}
 15563  		v.Reset(ssaop.OpARM64REV16)
 15564  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
 15565  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
 15566  		v0.AddArg(x)
 15567  		v.AddArg(v0)
 15568  		return true
 15569  	}
 15570  	// match: ( ORshiftLL [c] (SRLconst x [64-c]) x2)
 15571  	// result: (EXTRconst [64-c] x2 x)
 15572  	for {
 15573  		c := ssa.AuxIntToInt64(v.AuxInt)
 15574  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
 15575  			break
 15576  		}
 15577  		x := v_0.Args[0]
 15578  		x2 := v_1
 15579  		v.Reset(ssaop.OpARM64EXTRconst)
 15580  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
 15581  		v.AddArg2(x2, x)
 15582  		return true
 15583  	}
 15584  	// match: ( ORshiftLL <t> [c] (UBFX [bfc] x) x2)
 15585  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
 15586  	// result: (EXTRWconst [32-c] x2 x)
 15587  	for {
 15588  		t := v.Type
 15589  		c := ssa.AuxIntToInt64(v.AuxInt)
 15590  		if v_0.Op != ssaop.OpARM64UBFX {
 15591  			break
 15592  		}
 15593  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15594  		x := v_0.Args[0]
 15595  		x2 := v_1
 15596  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
 15597  			break
 15598  		}
 15599  		v.Reset(ssaop.OpARM64EXTRWconst)
 15600  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
 15601  		v.AddArg2(x2, x)
 15602  		return true
 15603  	}
 15604  	// match: (ORshiftLL [s] (ANDconst [xc] x) (ANDconst [yc] y))
 15605  	// cond: xc == ^(yc << s) && yc & (yc+1) == 0 && yc > 0 && s+ssa.Log64(yc+1) <= 64
 15606  	// result: (BFI [ssa.ArmBFAuxInt(s, ssa.Log64(yc+1))] x y)
 15607  	for {
 15608  		s := ssa.AuxIntToInt64(v.AuxInt)
 15609  		if v_0.Op != ssaop.OpARM64ANDconst {
 15610  			break
 15611  		}
 15612  		xc := ssa.AuxIntToInt64(v_0.AuxInt)
 15613  		x := v_0.Args[0]
 15614  		if v_1.Op != ssaop.OpARM64ANDconst {
 15615  			break
 15616  		}
 15617  		yc := ssa.AuxIntToInt64(v_1.AuxInt)
 15618  		y := v_1.Args[0]
 15619  		if !(xc == ^(yc<<s) && yc&(yc+1) == 0 && yc > 0 && s+ssa.Log64(yc+1) <= 64) {
 15620  			break
 15621  		}
 15622  		v.Reset(ssaop.OpARM64BFI)
 15623  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(s, ssa.Log64(yc+1)))
 15624  		v.AddArg2(x, y)
 15625  		return true
 15626  	}
 15627  	// match: (ORshiftLL [sc] (UBFX [bfc] x) (SRLconst [sc] y))
 15628  	// cond: sc == bfc.Width()
 15629  	// result: (BFXIL [bfc] y x)
 15630  	for {
 15631  		sc := ssa.AuxIntToInt64(v.AuxInt)
 15632  		if v_0.Op != ssaop.OpARM64UBFX {
 15633  			break
 15634  		}
 15635  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15636  		x := v_0.Args[0]
 15637  		if v_1.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_1.AuxInt) != sc {
 15638  			break
 15639  		}
 15640  		y := v_1.Args[0]
 15641  		if !(sc == bfc.Width()) {
 15642  			break
 15643  		}
 15644  		v.Reset(ssaop.OpARM64BFXIL)
 15645  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15646  		v.AddArg2(y, x)
 15647  		return true
 15648  	}
 15649  	return false
 15650  }
 15651  func rewriteValue_OpARM64ORshiftRA(v *ssa.Value) bool {
 15652  	v_1 := v.Args[1]
 15653  	v_0 := v.Args[0]
 15654  	b := v.Block
 15655  	// match: (ORshiftRA (MOVDconst [c]) x [d])
 15656  	// result: (ORconst [c] (SRAconst <x.Type> x [d]))
 15657  	for {
 15658  		d := ssa.AuxIntToInt64(v.AuxInt)
 15659  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15660  			break
 15661  		}
 15662  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15663  		x := v_1
 15664  		v.Reset(ssaop.OpARM64ORconst)
 15665  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15666  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 15667  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 15668  		v0.AddArg(x)
 15669  		v.AddArg(v0)
 15670  		return true
 15671  	}
 15672  	// match: (ORshiftRA x (MOVDconst [c]) [d])
 15673  	// result: (ORconst x [c>>uint64(d)])
 15674  	for {
 15675  		d := ssa.AuxIntToInt64(v.AuxInt)
 15676  		x := v_0
 15677  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15678  			break
 15679  		}
 15680  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15681  		v.Reset(ssaop.OpARM64ORconst)
 15682  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 15683  		v.AddArg(x)
 15684  		return true
 15685  	}
 15686  	// match: (ORshiftRA y:(SRAconst x [c]) x [c])
 15687  	// result: y
 15688  	for {
 15689  		c := ssa.AuxIntToInt64(v.AuxInt)
 15690  		y := v_0
 15691  		if y.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 15692  			break
 15693  		}
 15694  		x := y.Args[0]
 15695  		if x != v_1 {
 15696  			break
 15697  		}
 15698  		v.CopyOf(y)
 15699  		return true
 15700  	}
 15701  	return false
 15702  }
 15703  func rewriteValue_OpARM64ORshiftRL(v *ssa.Value) bool {
 15704  	v_1 := v.Args[1]
 15705  	v_0 := v.Args[0]
 15706  	b := v.Block
 15707  	// match: (ORshiftRL (MOVDconst [c]) x [d])
 15708  	// result: (ORconst [c] (SRLconst <x.Type> x [d]))
 15709  	for {
 15710  		d := ssa.AuxIntToInt64(v.AuxInt)
 15711  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15712  			break
 15713  		}
 15714  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15715  		x := v_1
 15716  		v.Reset(ssaop.OpARM64ORconst)
 15717  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15718  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 15719  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 15720  		v0.AddArg(x)
 15721  		v.AddArg(v0)
 15722  		return true
 15723  	}
 15724  	// match: (ORshiftRL x (MOVDconst [c]) [d])
 15725  	// result: (ORconst x [int64(uint64(c)>>uint64(d))])
 15726  	for {
 15727  		d := ssa.AuxIntToInt64(v.AuxInt)
 15728  		x := v_0
 15729  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15730  			break
 15731  		}
 15732  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15733  		v.Reset(ssaop.OpARM64ORconst)
 15734  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 15735  		v.AddArg(x)
 15736  		return true
 15737  	}
 15738  	// match: (ORshiftRL y:(SRLconst x [c]) x [c])
 15739  	// result: y
 15740  	for {
 15741  		c := ssa.AuxIntToInt64(v.AuxInt)
 15742  		y := v_0
 15743  		if y.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 15744  			break
 15745  		}
 15746  		x := y.Args[0]
 15747  		if x != v_1 {
 15748  			break
 15749  		}
 15750  		v.CopyOf(y)
 15751  		return true
 15752  	}
 15753  	// match: (ORshiftRL [rc] (ANDconst [ac] x) (SLLconst [lc] y))
 15754  	// cond: lc > rc && ac == ^((1<<uint(64-lc)-1) << uint64(lc-rc))
 15755  	// result: (BFI [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x y)
 15756  	for {
 15757  		rc := ssa.AuxIntToInt64(v.AuxInt)
 15758  		if v_0.Op != ssaop.OpARM64ANDconst {
 15759  			break
 15760  		}
 15761  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 15762  		x := v_0.Args[0]
 15763  		if v_1.Op != ssaop.OpARM64SLLconst {
 15764  			break
 15765  		}
 15766  		lc := ssa.AuxIntToInt64(v_1.AuxInt)
 15767  		y := v_1.Args[0]
 15768  		if !(lc > rc && ac == ^((1<<uint(64-lc)-1)<<uint64(lc-rc))) {
 15769  			break
 15770  		}
 15771  		v.Reset(ssaop.OpARM64BFI)
 15772  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 15773  		v.AddArg2(x, y)
 15774  		return true
 15775  	}
 15776  	// match: (ORshiftRL [rc] (ANDconst [ac] y) (SLLconst [lc] x))
 15777  	// cond: lc < rc && ac == ^((1<<uint(64-rc)-1))
 15778  	// result: (BFXIL [ssa.ArmBFAuxInt(rc-lc, 64-rc)] y x)
 15779  	for {
 15780  		rc := ssa.AuxIntToInt64(v.AuxInt)
 15781  		if v_0.Op != ssaop.OpARM64ANDconst {
 15782  			break
 15783  		}
 15784  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 15785  		y := v_0.Args[0]
 15786  		if v_1.Op != ssaop.OpARM64SLLconst {
 15787  			break
 15788  		}
 15789  		lc := ssa.AuxIntToInt64(v_1.AuxInt)
 15790  		x := v_1.Args[0]
 15791  		if !(lc < rc && ac == ^(1<<uint(64-rc)-1)) {
 15792  			break
 15793  		}
 15794  		v.Reset(ssaop.OpARM64BFXIL)
 15795  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 15796  		v.AddArg2(y, x)
 15797  		return true
 15798  	}
 15799  	return false
 15800  }
 15801  func rewriteValue_OpARM64ORshiftRO(v *ssa.Value) bool {
 15802  	v_1 := v.Args[1]
 15803  	v_0 := v.Args[0]
 15804  	b := v.Block
 15805  	// match: (ORshiftRO (MOVDconst [c]) x [d])
 15806  	// result: (ORconst [c] (RORconst <x.Type> x [d]))
 15807  	for {
 15808  		d := ssa.AuxIntToInt64(v.AuxInt)
 15809  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15810  			break
 15811  		}
 15812  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15813  		x := v_1
 15814  		v.Reset(ssaop.OpARM64ORconst)
 15815  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15816  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 15817  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 15818  		v0.AddArg(x)
 15819  		v.AddArg(v0)
 15820  		return true
 15821  	}
 15822  	// match: (ORshiftRO x (MOVDconst [c]) [d])
 15823  	// result: (ORconst x [rotateRight64(c, d)])
 15824  	for {
 15825  		d := ssa.AuxIntToInt64(v.AuxInt)
 15826  		x := v_0
 15827  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15828  			break
 15829  		}
 15830  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15831  		v.Reset(ssaop.OpARM64ORconst)
 15832  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 15833  		v.AddArg(x)
 15834  		return true
 15835  	}
 15836  	// match: (ORshiftRO y:(RORconst x [c]) x [c])
 15837  	// result: y
 15838  	for {
 15839  		c := ssa.AuxIntToInt64(v.AuxInt)
 15840  		y := v_0
 15841  		if y.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 15842  			break
 15843  		}
 15844  		x := y.Args[0]
 15845  		if x != v_1 {
 15846  			break
 15847  		}
 15848  		v.CopyOf(y)
 15849  		return true
 15850  	}
 15851  	return false
 15852  }
 15853  func rewriteValue_OpARM64REV(v *ssa.Value) bool {
 15854  	v_0 := v.Args[0]
 15855  	// match: (REV (REV p))
 15856  	// result: p
 15857  	for {
 15858  		if v_0.Op != ssaop.OpARM64REV {
 15859  			break
 15860  		}
 15861  		p := v_0.Args[0]
 15862  		v.CopyOf(p)
 15863  		return true
 15864  	}
 15865  	return false
 15866  }
 15867  func rewriteValue_OpARM64REV16(v *ssa.Value) bool {
 15868  	v_0 := v.Args[0]
 15869  	// match: (REV16 (MOVWUreg x))
 15870  	// result: (REV16W x)
 15871  	for {
 15872  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 15873  			break
 15874  		}
 15875  		x := v_0.Args[0]
 15876  		v.Reset(ssaop.OpARM64REV16W)
 15877  		v.AddArg(x)
 15878  		return true
 15879  	}
 15880  	return false
 15881  }
 15882  func rewriteValue_OpARM64REVW(v *ssa.Value) bool {
 15883  	v_0 := v.Args[0]
 15884  	// match: (REVW (REVW p))
 15885  	// result: p
 15886  	for {
 15887  		if v_0.Op != ssaop.OpARM64REVW {
 15888  			break
 15889  		}
 15890  		p := v_0.Args[0]
 15891  		v.CopyOf(p)
 15892  		return true
 15893  	}
 15894  	return false
 15895  }
 15896  func rewriteValue_OpARM64ROR(v *ssa.Value) bool {
 15897  	v_1 := v.Args[1]
 15898  	v_0 := v.Args[0]
 15899  	// match: (ROR x (MOVDconst [c]))
 15900  	// result: (RORconst x [c&63])
 15901  	for {
 15902  		x := v_0
 15903  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15904  			break
 15905  		}
 15906  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15907  		v.Reset(ssaop.OpARM64RORconst)
 15908  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 15909  		v.AddArg(x)
 15910  		return true
 15911  	}
 15912  	return false
 15913  }
 15914  func rewriteValue_OpARM64RORW(v *ssa.Value) bool {
 15915  	v_1 := v.Args[1]
 15916  	v_0 := v.Args[0]
 15917  	// match: (RORW x (MOVDconst [c]))
 15918  	// result: (RORWconst x [c&31])
 15919  	for {
 15920  		x := v_0
 15921  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15922  			break
 15923  		}
 15924  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15925  		v.Reset(ssaop.OpARM64RORWconst)
 15926  		v.AuxInt = ssa.Int64ToAuxInt(c & 31)
 15927  		v.AddArg(x)
 15928  		return true
 15929  	}
 15930  	return false
 15931  }
 15932  func rewriteValue_OpARM64SBCSflags(v *ssa.Value) bool {
 15933  	v_2 := v.Args[2]
 15934  	v_1 := v.Args[1]
 15935  	v_0 := v.Args[0]
 15936  	b := v.Block
 15937  	typ := &b.Func.Config.Types
 15938  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> bo)))))
 15939  	// result: (SBCSflags x y bo)
 15940  	for {
 15941  		x := v_0
 15942  		y := v_1
 15943  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
 15944  			break
 15945  		}
 15946  		v_2_0 := v_2.Args[0]
 15947  		if v_2_0.Op != ssaop.OpARM64NEGSflags {
 15948  			break
 15949  		}
 15950  		v_2_0_0 := v_2_0.Args[0]
 15951  		if v_2_0_0.Op != ssaop.OpARM64NEG || v_2_0_0.Type != typ.UInt64 {
 15952  			break
 15953  		}
 15954  		v_2_0_0_0 := v_2_0_0.Args[0]
 15955  		if v_2_0_0_0.Op != ssaop.OpARM64NGCzerocarry || v_2_0_0_0.Type != typ.UInt64 {
 15956  			break
 15957  		}
 15958  		bo := v_2_0_0_0.Args[0]
 15959  		v.Reset(ssaop.OpARM64SBCSflags)
 15960  		v.AddArg3(x, y, bo)
 15961  		return true
 15962  	}
 15963  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (MOVDconst [0]))))
 15964  	// result: (SUBSflags x y)
 15965  	for {
 15966  		x := v_0
 15967  		y := v_1
 15968  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
 15969  			break
 15970  		}
 15971  		v_2_0 := v_2.Args[0]
 15972  		if v_2_0.Op != ssaop.OpARM64NEGSflags {
 15973  			break
 15974  		}
 15975  		v_2_0_0 := v_2_0.Args[0]
 15976  		if v_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2_0_0.AuxInt) != 0 {
 15977  			break
 15978  		}
 15979  		v.Reset(ssaop.OpARM64SUBSflags)
 15980  		v.AddArg2(x, y)
 15981  		return true
 15982  	}
 15983  	return false
 15984  }
 15985  func rewriteValue_OpARM64SBFX(v *ssa.Value) bool {
 15986  	v_0 := v.Args[0]
 15987  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 15988  	// cond: s.Uses == 1 && sc <= bfc.Lsb()
 15989  	// result: (SBFX [ssa.ArmBFAuxInt(bfc.Lsb() - sc, bfc.Width())] x)
 15990  	for {
 15991  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 15992  		s := v_0
 15993  		if s.Op != ssaop.OpARM64SLLconst {
 15994  			break
 15995  		}
 15996  		sc := ssa.AuxIntToInt64(s.AuxInt)
 15997  		x := s.Args[0]
 15998  		if !(s.Uses == 1 && sc <= bfc.Lsb()) {
 15999  			break
 16000  		}
 16001  		v.Reset(ssaop.OpARM64SBFX)
 16002  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16003  		v.AddArg(x)
 16004  		return true
 16005  	}
 16006  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 16007  	// cond: s.Uses == 1 && sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16008  	// result: (SBFIZ [ssa.ArmBFAuxInt(sc - bfc.Lsb(), bfc.Width() - (sc-bfc.Lsb()))] x)
 16009  	for {
 16010  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 16011  		s := v_0
 16012  		if s.Op != ssaop.OpARM64SLLconst {
 16013  			break
 16014  		}
 16015  		sc := ssa.AuxIntToInt64(s.AuxInt)
 16016  		x := s.Args[0]
 16017  		if !(s.Uses == 1 && sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16018  			break
 16019  		}
 16020  		v.Reset(ssaop.OpARM64SBFIZ)
 16021  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Width()-(sc-bfc.Lsb())))
 16022  		v.AddArg(x)
 16023  		return true
 16024  	}
 16025  	return false
 16026  }
 16027  func rewriteValue_OpARM64SLL(v *ssa.Value) bool {
 16028  	v_1 := v.Args[1]
 16029  	v_0 := v.Args[0]
 16030  	// match: (SLL x (MOVDconst [c]))
 16031  	// result: (SLLconst x [c&63])
 16032  	for {
 16033  		x := v_0
 16034  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16035  			break
 16036  		}
 16037  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16038  		v.Reset(ssaop.OpARM64SLLconst)
 16039  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16040  		v.AddArg(x)
 16041  		return true
 16042  	}
 16043  	// match: (SLL x (ANDconst [63] y))
 16044  	// result: (SLL x y)
 16045  	for {
 16046  		x := v_0
 16047  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16048  			break
 16049  		}
 16050  		y := v_1.Args[0]
 16051  		v.Reset(ssaop.OpARM64SLL)
 16052  		v.AddArg2(x, y)
 16053  		return true
 16054  	}
 16055  	return false
 16056  }
 16057  func rewriteValue_OpARM64SLLconst(v *ssa.Value) bool {
 16058  	v_0 := v.Args[0]
 16059  	// match: (SLLconst [c] (MOVDconst [d]))
 16060  	// result: (MOVDconst [d<<uint64(c)])
 16061  	for {
 16062  		c := ssa.AuxIntToInt64(v.AuxInt)
 16063  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16064  			break
 16065  		}
 16066  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16067  		v.Reset(ssaop.OpARM64MOVDconst)
 16068  		v.AuxInt = ssa.Int64ToAuxInt(d << uint64(c))
 16069  		return true
 16070  	}
 16071  	// match: (SLLconst [c] (SRLconst [c] x))
 16072  	// cond: 0 < c && c < 64
 16073  	// result: (ANDconst [^(1<<uint(c)-1)] x)
 16074  	for {
 16075  		c := ssa.AuxIntToInt64(v.AuxInt)
 16076  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 16077  			break
 16078  		}
 16079  		x := v_0.Args[0]
 16080  		if !(0 < c && c < 64) {
 16081  			break
 16082  		}
 16083  		v.Reset(ssaop.OpARM64ANDconst)
 16084  		v.AuxInt = ssa.Int64ToAuxInt(^(1<<uint(c) - 1))
 16085  		v.AddArg(x)
 16086  		return true
 16087  	}
 16088  	// match: (SLLconst [lc] (MOVWreg x))
 16089  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(32, 64-lc))] x)
 16090  	for {
 16091  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16092  		if v_0.Op != ssaop.OpARM64MOVWreg {
 16093  			break
 16094  		}
 16095  		x := v_0.Args[0]
 16096  		v.Reset(ssaop.OpARM64SBFIZ)
 16097  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(32, 64-lc)))
 16098  		v.AddArg(x)
 16099  		return true
 16100  	}
 16101  	// match: (SLLconst [lc] (MOVHreg x))
 16102  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(16, 64-lc))] x)
 16103  	for {
 16104  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16105  		if v_0.Op != ssaop.OpARM64MOVHreg {
 16106  			break
 16107  		}
 16108  		x := v_0.Args[0]
 16109  		v.Reset(ssaop.OpARM64SBFIZ)
 16110  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(16, 64-lc)))
 16111  		v.AddArg(x)
 16112  		return true
 16113  	}
 16114  	// match: (SLLconst [lc] (MOVBreg x))
 16115  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(8, 64-lc))] x)
 16116  	for {
 16117  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16118  		if v_0.Op != ssaop.OpARM64MOVBreg {
 16119  			break
 16120  		}
 16121  		x := v_0.Args[0]
 16122  		v.Reset(ssaop.OpARM64SBFIZ)
 16123  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(8, 64-lc)))
 16124  		v.AddArg(x)
 16125  		return true
 16126  	}
 16127  	// match: (SLLconst [lc] (MOVWUreg x))
 16128  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(32, 64-lc))] x)
 16129  	for {
 16130  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16131  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16132  			break
 16133  		}
 16134  		x := v_0.Args[0]
 16135  		v.Reset(ssaop.OpARM64UBFIZ)
 16136  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(32, 64-lc)))
 16137  		v.AddArg(x)
 16138  		return true
 16139  	}
 16140  	// match: (SLLconst [lc] (MOVHUreg x))
 16141  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(16, 64-lc))] x)
 16142  	for {
 16143  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16144  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16145  			break
 16146  		}
 16147  		x := v_0.Args[0]
 16148  		v.Reset(ssaop.OpARM64UBFIZ)
 16149  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(16, 64-lc)))
 16150  		v.AddArg(x)
 16151  		return true
 16152  	}
 16153  	// match: (SLLconst [lc] (MOVBUreg x))
 16154  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(8, 64-lc))] x)
 16155  	for {
 16156  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16157  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16158  			break
 16159  		}
 16160  		x := v_0.Args[0]
 16161  		v.Reset(ssaop.OpARM64UBFIZ)
 16162  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(8, 64-lc)))
 16163  		v.AddArg(x)
 16164  		return true
 16165  	}
 16166  	// match: (SLLconst [sc] (ANDconst [ac] x))
 16167  	// cond: isARM64BFMask(sc, ac, 0)
 16168  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
 16169  	for {
 16170  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16171  		if v_0.Op != ssaop.OpARM64ANDconst {
 16172  			break
 16173  		}
 16174  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16175  		x := v_0.Args[0]
 16176  		if !(isARM64BFMask(sc, ac, 0)) {
 16177  			break
 16178  		}
 16179  		v.Reset(ssaop.OpARM64UBFIZ)
 16180  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0)))
 16181  		v.AddArg(x)
 16182  		return true
 16183  	}
 16184  	// match: (SLLconst [sc] (UBFIZ [bfc] x))
 16185  	// cond: sc+bfc.Width()+bfc.Lsb() < 64
 16186  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width())] x)
 16187  	for {
 16188  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16189  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16190  			break
 16191  		}
 16192  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16193  		x := v_0.Args[0]
 16194  		if !(sc+bfc.Width()+bfc.Lsb() < 64) {
 16195  			break
 16196  		}
 16197  		v.Reset(ssaop.OpARM64UBFIZ)
 16198  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()))
 16199  		v.AddArg(x)
 16200  		return true
 16201  	}
 16202  	return false
 16203  }
 16204  func rewriteValue_OpARM64SRA(v *ssa.Value) bool {
 16205  	v_1 := v.Args[1]
 16206  	v_0 := v.Args[0]
 16207  	// match: (SRA x (MOVDconst [c]))
 16208  	// result: (SRAconst x [c&63])
 16209  	for {
 16210  		x := v_0
 16211  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16212  			break
 16213  		}
 16214  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16215  		v.Reset(ssaop.OpARM64SRAconst)
 16216  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16217  		v.AddArg(x)
 16218  		return true
 16219  	}
 16220  	// match: (SRA x (ANDconst [63] y))
 16221  	// result: (SRA x y)
 16222  	for {
 16223  		x := v_0
 16224  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16225  			break
 16226  		}
 16227  		y := v_1.Args[0]
 16228  		v.Reset(ssaop.OpARM64SRA)
 16229  		v.AddArg2(x, y)
 16230  		return true
 16231  	}
 16232  	return false
 16233  }
 16234  func rewriteValue_OpARM64SRAconst(v *ssa.Value) bool {
 16235  	v_0 := v.Args[0]
 16236  	// match: (SRAconst [c] (MOVDconst [d]))
 16237  	// result: (MOVDconst [d>>uint64(c)])
 16238  	for {
 16239  		c := ssa.AuxIntToInt64(v.AuxInt)
 16240  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16241  			break
 16242  		}
 16243  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16244  		v.Reset(ssaop.OpARM64MOVDconst)
 16245  		v.AuxInt = ssa.Int64ToAuxInt(d >> uint64(c))
 16246  		return true
 16247  	}
 16248  	// match: (SRAconst [rc] (SLLconst [lc] x))
 16249  	// cond: lc > rc
 16250  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x)
 16251  	for {
 16252  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16253  		if v_0.Op != ssaop.OpARM64SLLconst {
 16254  			break
 16255  		}
 16256  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16257  		x := v_0.Args[0]
 16258  		if !(lc > rc) {
 16259  			break
 16260  		}
 16261  		v.Reset(ssaop.OpARM64SBFIZ)
 16262  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 16263  		v.AddArg(x)
 16264  		return true
 16265  	}
 16266  	// match: (SRAconst [rc] (SLLconst [lc] x))
 16267  	// cond: lc <= rc
 16268  	// result: (SBFX [ssa.ArmBFAuxInt(rc-lc, 64-rc)] x)
 16269  	for {
 16270  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16271  		if v_0.Op != ssaop.OpARM64SLLconst {
 16272  			break
 16273  		}
 16274  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16275  		x := v_0.Args[0]
 16276  		if !(lc <= rc) {
 16277  			break
 16278  		}
 16279  		v.Reset(ssaop.OpARM64SBFX)
 16280  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 16281  		v.AddArg(x)
 16282  		return true
 16283  	}
 16284  	// match: (SRAconst [rc] (MOVWreg x))
 16285  	// cond: rc < 32
 16286  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 32-rc)] x)
 16287  	for {
 16288  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16289  		if v_0.Op != ssaop.OpARM64MOVWreg {
 16290  			break
 16291  		}
 16292  		x := v_0.Args[0]
 16293  		if !(rc < 32) {
 16294  			break
 16295  		}
 16296  		v.Reset(ssaop.OpARM64SBFX)
 16297  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32-rc))
 16298  		v.AddArg(x)
 16299  		return true
 16300  	}
 16301  	// match: (SRAconst [rc] (MOVHreg x))
 16302  	// cond: rc < 16
 16303  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 16-rc)] x)
 16304  	for {
 16305  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16306  		if v_0.Op != ssaop.OpARM64MOVHreg {
 16307  			break
 16308  		}
 16309  		x := v_0.Args[0]
 16310  		if !(rc < 16) {
 16311  			break
 16312  		}
 16313  		v.Reset(ssaop.OpARM64SBFX)
 16314  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16-rc))
 16315  		v.AddArg(x)
 16316  		return true
 16317  	}
 16318  	// match: (SRAconst [rc] (MOVBreg x))
 16319  	// cond: rc < 8
 16320  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 8-rc)] x)
 16321  	for {
 16322  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16323  		if v_0.Op != ssaop.OpARM64MOVBreg {
 16324  			break
 16325  		}
 16326  		x := v_0.Args[0]
 16327  		if !(rc < 8) {
 16328  			break
 16329  		}
 16330  		v.Reset(ssaop.OpARM64SBFX)
 16331  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8-rc))
 16332  		v.AddArg(x)
 16333  		return true
 16334  	}
 16335  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 16336  	// cond: sc < bfc.Lsb()
 16337  	// result: (SBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 16338  	for {
 16339  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16340  		if v_0.Op != ssaop.OpARM64SBFIZ {
 16341  			break
 16342  		}
 16343  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16344  		x := v_0.Args[0]
 16345  		if !(sc < bfc.Lsb()) {
 16346  			break
 16347  		}
 16348  		v.Reset(ssaop.OpARM64SBFIZ)
 16349  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16350  		v.AddArg(x)
 16351  		return true
 16352  	}
 16353  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 16354  	// cond: sc >= bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16355  	// result: (SBFX [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 16356  	for {
 16357  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16358  		if v_0.Op != ssaop.OpARM64SBFIZ {
 16359  			break
 16360  		}
 16361  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16362  		x := v_0.Args[0]
 16363  		if !(sc >= bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16364  			break
 16365  		}
 16366  		v.Reset(ssaop.OpARM64SBFX)
 16367  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 16368  		v.AddArg(x)
 16369  		return true
 16370  	}
 16371  	return false
 16372  }
 16373  func rewriteValue_OpARM64SRL(v *ssa.Value) bool {
 16374  	v_1 := v.Args[1]
 16375  	v_0 := v.Args[0]
 16376  	// match: (SRL x (MOVDconst [c]))
 16377  	// result: (SRLconst x [c&63])
 16378  	for {
 16379  		x := v_0
 16380  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16381  			break
 16382  		}
 16383  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16384  		v.Reset(ssaop.OpARM64SRLconst)
 16385  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16386  		v.AddArg(x)
 16387  		return true
 16388  	}
 16389  	// match: (SRL x (ANDconst [63] y))
 16390  	// result: (SRL x y)
 16391  	for {
 16392  		x := v_0
 16393  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16394  			break
 16395  		}
 16396  		y := v_1.Args[0]
 16397  		v.Reset(ssaop.OpARM64SRL)
 16398  		v.AddArg2(x, y)
 16399  		return true
 16400  	}
 16401  	return false
 16402  }
 16403  func rewriteValue_OpARM64SRLconst(v *ssa.Value) bool {
 16404  	v_0 := v.Args[0]
 16405  	// match: (SRLconst [c] (MOVDconst [d]))
 16406  	// result: (MOVDconst [int64(uint64(d)>>uint64(c))])
 16407  	for {
 16408  		c := ssa.AuxIntToInt64(v.AuxInt)
 16409  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16410  			break
 16411  		}
 16412  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16413  		v.Reset(ssaop.OpARM64MOVDconst)
 16414  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(d) >> uint64(c)))
 16415  		return true
 16416  	}
 16417  	// match: (SRLconst [c] (SLLconst [c] x))
 16418  	// cond: 0 < c && c < 64
 16419  	// result: (ANDconst [1<<uint(64-c)-1] x)
 16420  	for {
 16421  		c := ssa.AuxIntToInt64(v.AuxInt)
 16422  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 16423  			break
 16424  		}
 16425  		x := v_0.Args[0]
 16426  		if !(0 < c && c < 64) {
 16427  			break
 16428  		}
 16429  		v.Reset(ssaop.OpARM64ANDconst)
 16430  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(64-c) - 1)
 16431  		v.AddArg(x)
 16432  		return true
 16433  	}
 16434  	// match: (SRLconst [rc] (MOVWUreg x))
 16435  	// cond: rc >= 32
 16436  	// result: (MOVDconst [0])
 16437  	for {
 16438  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16439  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16440  			break
 16441  		}
 16442  		if !(rc >= 32) {
 16443  			break
 16444  		}
 16445  		v.Reset(ssaop.OpARM64MOVDconst)
 16446  		v.AuxInt = ssa.Int64ToAuxInt(0)
 16447  		return true
 16448  	}
 16449  	// match: (SRLconst [rc] (MOVHUreg x))
 16450  	// cond: rc >= 16
 16451  	// result: (MOVDconst [0])
 16452  	for {
 16453  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16454  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16455  			break
 16456  		}
 16457  		if !(rc >= 16) {
 16458  			break
 16459  		}
 16460  		v.Reset(ssaop.OpARM64MOVDconst)
 16461  		v.AuxInt = ssa.Int64ToAuxInt(0)
 16462  		return true
 16463  	}
 16464  	// match: (SRLconst [rc] (MOVBUreg x))
 16465  	// cond: rc >= 8
 16466  	// result: (MOVDconst [0])
 16467  	for {
 16468  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16469  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16470  			break
 16471  		}
 16472  		if !(rc >= 8) {
 16473  			break
 16474  		}
 16475  		v.Reset(ssaop.OpARM64MOVDconst)
 16476  		v.AuxInt = ssa.Int64ToAuxInt(0)
 16477  		return true
 16478  	}
 16479  	// match: (SRLconst [rc] (SLLconst [lc] x))
 16480  	// cond: lc > rc
 16481  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x)
 16482  	for {
 16483  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16484  		if v_0.Op != ssaop.OpARM64SLLconst {
 16485  			break
 16486  		}
 16487  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16488  		x := v_0.Args[0]
 16489  		if !(lc > rc) {
 16490  			break
 16491  		}
 16492  		v.Reset(ssaop.OpARM64UBFIZ)
 16493  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 16494  		v.AddArg(x)
 16495  		return true
 16496  	}
 16497  	// match: (SRLconst [rc] (SLLconst [lc] x))
 16498  	// cond: lc < rc
 16499  	// result: (UBFX [ssa.ArmBFAuxInt(rc-lc, 64-rc)] x)
 16500  	for {
 16501  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16502  		if v_0.Op != ssaop.OpARM64SLLconst {
 16503  			break
 16504  		}
 16505  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16506  		x := v_0.Args[0]
 16507  		if !(lc < rc) {
 16508  			break
 16509  		}
 16510  		v.Reset(ssaop.OpARM64UBFX)
 16511  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 16512  		v.AddArg(x)
 16513  		return true
 16514  	}
 16515  	// match: (SRLconst [rc] (MOVWUreg x))
 16516  	// cond: rc < 32
 16517  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 32-rc)] x)
 16518  	for {
 16519  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16520  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16521  			break
 16522  		}
 16523  		x := v_0.Args[0]
 16524  		if !(rc < 32) {
 16525  			break
 16526  		}
 16527  		v.Reset(ssaop.OpARM64UBFX)
 16528  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32-rc))
 16529  		v.AddArg(x)
 16530  		return true
 16531  	}
 16532  	// match: (SRLconst [rc] (MOVHUreg x))
 16533  	// cond: rc < 16
 16534  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 16-rc)] x)
 16535  	for {
 16536  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16537  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16538  			break
 16539  		}
 16540  		x := v_0.Args[0]
 16541  		if !(rc < 16) {
 16542  			break
 16543  		}
 16544  		v.Reset(ssaop.OpARM64UBFX)
 16545  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16-rc))
 16546  		v.AddArg(x)
 16547  		return true
 16548  	}
 16549  	// match: (SRLconst [rc] (MOVBUreg x))
 16550  	// cond: rc < 8
 16551  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 8-rc)] x)
 16552  	for {
 16553  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16554  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16555  			break
 16556  		}
 16557  		x := v_0.Args[0]
 16558  		if !(rc < 8) {
 16559  			break
 16560  		}
 16561  		v.Reset(ssaop.OpARM64UBFX)
 16562  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8-rc))
 16563  		v.AddArg(x)
 16564  		return true
 16565  	}
 16566  	// match: (SRLconst [sc] (ANDconst [ac] x))
 16567  	// cond: isARM64BFMask(sc, ac, sc)
 16568  	// result: (UBFX [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
 16569  	for {
 16570  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16571  		if v_0.Op != ssaop.OpARM64ANDconst {
 16572  			break
 16573  		}
 16574  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16575  		x := v_0.Args[0]
 16576  		if !(isARM64BFMask(sc, ac, sc)) {
 16577  			break
 16578  		}
 16579  		v.Reset(ssaop.OpARM64UBFX)
 16580  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc)))
 16581  		v.AddArg(x)
 16582  		return true
 16583  	}
 16584  	// match: (SRLconst [sc] (UBFX [bfc] x))
 16585  	// cond: sc < bfc.Width()
 16586  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc)] x)
 16587  	for {
 16588  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16589  		if v_0.Op != ssaop.OpARM64UBFX {
 16590  			break
 16591  		}
 16592  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16593  		x := v_0.Args[0]
 16594  		if !(sc < bfc.Width()) {
 16595  			break
 16596  		}
 16597  		v.Reset(ssaop.OpARM64UBFX)
 16598  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc))
 16599  		v.AddArg(x)
 16600  		return true
 16601  	}
 16602  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 16603  	// cond: sc == bfc.Lsb()
 16604  	// result: (ANDconst [1<<uint(bfc.Width())-1] x)
 16605  	for {
 16606  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16607  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16608  			break
 16609  		}
 16610  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16611  		x := v_0.Args[0]
 16612  		if !(sc == bfc.Lsb()) {
 16613  			break
 16614  		}
 16615  		v.Reset(ssaop.OpARM64ANDconst)
 16616  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(bfc.Width()) - 1)
 16617  		v.AddArg(x)
 16618  		return true
 16619  	}
 16620  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 16621  	// cond: sc < bfc.Lsb()
 16622  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 16623  	for {
 16624  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16625  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16626  			break
 16627  		}
 16628  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16629  		x := v_0.Args[0]
 16630  		if !(sc < bfc.Lsb()) {
 16631  			break
 16632  		}
 16633  		v.Reset(ssaop.OpARM64UBFIZ)
 16634  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16635  		v.AddArg(x)
 16636  		return true
 16637  	}
 16638  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 16639  	// cond: sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16640  	// result: (UBFX [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 16641  	for {
 16642  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16643  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16644  			break
 16645  		}
 16646  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16647  		x := v_0.Args[0]
 16648  		if !(sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16649  			break
 16650  		}
 16651  		v.Reset(ssaop.OpARM64UBFX)
 16652  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 16653  		v.AddArg(x)
 16654  		return true
 16655  	}
 16656  	return false
 16657  }
 16658  func rewriteValue_OpARM64STP(v *ssa.Value) bool {
 16659  	v_3 := v.Args[3]
 16660  	v_2 := v.Args[2]
 16661  	v_1 := v.Args[1]
 16662  	v_0 := v.Args[0]
 16663  	b := v.Block
 16664  	config := b.Func.Config
 16665  	// match: (STP [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
 16666  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 16667  	// result: (STP [off1+int32(off2)] {sym} ptr val1 val2 mem)
 16668  	for {
 16669  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 16670  		sym := ssa.AuxToSym(v.Aux)
 16671  		if v_0.Op != ssaop.OpARM64ADDconst {
 16672  			break
 16673  		}
 16674  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 16675  		ptr := v_0.Args[0]
 16676  		val1 := v_1
 16677  		val2 := v_2
 16678  		mem := v_3
 16679  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 16680  			break
 16681  		}
 16682  		v.Reset(ssaop.OpARM64STP)
 16683  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 16684  		v.Aux = ssa.SymToAux(sym)
 16685  		v.AddArg4(ptr, val1, val2, mem)
 16686  		return true
 16687  	}
 16688  	// match: (STP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
 16689  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 16690  	// result: (STP [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val1 val2 mem)
 16691  	for {
 16692  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 16693  		sym1 := ssa.AuxToSym(v.Aux)
 16694  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 16695  			break
 16696  		}
 16697  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 16698  		sym2 := ssa.AuxToSym(v_0.Aux)
 16699  		ptr := v_0.Args[0]
 16700  		val1 := v_1
 16701  		val2 := v_2
 16702  		mem := v_3
 16703  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 16704  			break
 16705  		}
 16706  		v.Reset(ssaop.OpARM64STP)
 16707  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 16708  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 16709  		v.AddArg4(ptr, val1, val2, mem)
 16710  		return true
 16711  	}
 16712  	return false
 16713  }
 16714  func rewriteValue_OpARM64SUB(v *ssa.Value) bool {
 16715  	v_1 := v.Args[1]
 16716  	v_0 := v.Args[0]
 16717  	b := v.Block
 16718  	// match: (SUB x (MOVDconst [c]))
 16719  	// result: (SUBconst [c] x)
 16720  	for {
 16721  		x := v_0
 16722  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16723  			break
 16724  		}
 16725  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16726  		v.Reset(ssaop.OpARM64SUBconst)
 16727  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16728  		v.AddArg(x)
 16729  		return true
 16730  	}
 16731  	// match: (SUB a l:(MUL x y))
 16732  	// cond: l.Uses==1 && ssa.Clobber(l)
 16733  	// result: (MSUB a x y)
 16734  	for {
 16735  		a := v_0
 16736  		l := v_1
 16737  		if l.Op != ssaop.OpARM64MUL {
 16738  			break
 16739  		}
 16740  		y := l.Args[1]
 16741  		x := l.Args[0]
 16742  		if !(l.Uses == 1 && ssa.Clobber(l)) {
 16743  			break
 16744  		}
 16745  		v.Reset(ssaop.OpARM64MSUB)
 16746  		v.AddArg3(a, x, y)
 16747  		return true
 16748  	}
 16749  	// match: (SUB a l:(MNEG x y))
 16750  	// cond: l.Uses==1 && ssa.Clobber(l)
 16751  	// result: (MADD a x y)
 16752  	for {
 16753  		a := v_0
 16754  		l := v_1
 16755  		if l.Op != ssaop.OpARM64MNEG {
 16756  			break
 16757  		}
 16758  		y := l.Args[1]
 16759  		x := l.Args[0]
 16760  		if !(l.Uses == 1 && ssa.Clobber(l)) {
 16761  			break
 16762  		}
 16763  		v.Reset(ssaop.OpARM64MADD)
 16764  		v.AddArg3(a, x, y)
 16765  		return true
 16766  	}
 16767  	// match: (SUB a l:(MULW x y))
 16768  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
 16769  	// result: (MSUBW a x y)
 16770  	for {
 16771  		a := v_0
 16772  		l := v_1
 16773  		if l.Op != ssaop.OpARM64MULW {
 16774  			break
 16775  		}
 16776  		y := l.Args[1]
 16777  		x := l.Args[0]
 16778  		if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
 16779  			break
 16780  		}
 16781  		v.Reset(ssaop.OpARM64MSUBW)
 16782  		v.AddArg3(a, x, y)
 16783  		return true
 16784  	}
 16785  	// match: (SUB a l:(MNEGW x y))
 16786  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
 16787  	// result: (MADDW a x y)
 16788  	for {
 16789  		a := v_0
 16790  		l := v_1
 16791  		if l.Op != ssaop.OpARM64MNEGW {
 16792  			break
 16793  		}
 16794  		y := l.Args[1]
 16795  		x := l.Args[0]
 16796  		if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
 16797  			break
 16798  		}
 16799  		v.Reset(ssaop.OpARM64MADDW)
 16800  		v.AddArg3(a, x, y)
 16801  		return true
 16802  	}
 16803  	// match: (SUB <t> a p:(ADDconst [c] m:(MUL _ _)))
 16804  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16805  	// result: (SUBconst [c] (SUB <v.Type> a m))
 16806  	for {
 16807  		t := v.Type
 16808  		a := v_0
 16809  		p := v_1
 16810  		if p.Op != ssaop.OpARM64ADDconst {
 16811  			break
 16812  		}
 16813  		c := ssa.AuxIntToInt64(p.AuxInt)
 16814  		m := p.Args[0]
 16815  		if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16816  			break
 16817  		}
 16818  		v.Reset(ssaop.OpARM64SUBconst)
 16819  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16820  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16821  		v0.AddArg2(a, m)
 16822  		v.AddArg(v0)
 16823  		return true
 16824  	}
 16825  	// match: (SUB <t> a p:(ADDconst [c] m:(MULW _ _)))
 16826  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16827  	// result: (SUBconst [c] (SUB <v.Type> a m))
 16828  	for {
 16829  		t := v.Type
 16830  		a := v_0
 16831  		p := v_1
 16832  		if p.Op != ssaop.OpARM64ADDconst {
 16833  			break
 16834  		}
 16835  		c := ssa.AuxIntToInt64(p.AuxInt)
 16836  		m := p.Args[0]
 16837  		if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16838  			break
 16839  		}
 16840  		v.Reset(ssaop.OpARM64SUBconst)
 16841  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16842  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16843  		v0.AddArg2(a, m)
 16844  		v.AddArg(v0)
 16845  		return true
 16846  	}
 16847  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEG _ _)))
 16848  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16849  	// result: (SUBconst [c] (SUB <v.Type> a m))
 16850  	for {
 16851  		t := v.Type
 16852  		a := v_0
 16853  		p := v_1
 16854  		if p.Op != ssaop.OpARM64ADDconst {
 16855  			break
 16856  		}
 16857  		c := ssa.AuxIntToInt64(p.AuxInt)
 16858  		m := p.Args[0]
 16859  		if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16860  			break
 16861  		}
 16862  		v.Reset(ssaop.OpARM64SUBconst)
 16863  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16864  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16865  		v0.AddArg2(a, m)
 16866  		v.AddArg(v0)
 16867  		return true
 16868  	}
 16869  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEGW _ _)))
 16870  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16871  	// result: (SUBconst [c] (SUB <v.Type> a m))
 16872  	for {
 16873  		t := v.Type
 16874  		a := v_0
 16875  		p := v_1
 16876  		if p.Op != ssaop.OpARM64ADDconst {
 16877  			break
 16878  		}
 16879  		c := ssa.AuxIntToInt64(p.AuxInt)
 16880  		m := p.Args[0]
 16881  		if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16882  			break
 16883  		}
 16884  		v.Reset(ssaop.OpARM64SUBconst)
 16885  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16886  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16887  		v0.AddArg2(a, m)
 16888  		v.AddArg(v0)
 16889  		return true
 16890  	}
 16891  	// match: (SUB <t> a p:(SUBconst [c] m:(MUL _ _)))
 16892  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16893  	// result: (ADDconst [c] (SUB <v.Type> a m))
 16894  	for {
 16895  		t := v.Type
 16896  		a := v_0
 16897  		p := v_1
 16898  		if p.Op != ssaop.OpARM64SUBconst {
 16899  			break
 16900  		}
 16901  		c := ssa.AuxIntToInt64(p.AuxInt)
 16902  		m := p.Args[0]
 16903  		if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16904  			break
 16905  		}
 16906  		v.Reset(ssaop.OpARM64ADDconst)
 16907  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16908  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16909  		v0.AddArg2(a, m)
 16910  		v.AddArg(v0)
 16911  		return true
 16912  	}
 16913  	// match: (SUB <t> a p:(SUBconst [c] m:(MULW _ _)))
 16914  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16915  	// result: (ADDconst [c] (SUB <v.Type> a m))
 16916  	for {
 16917  		t := v.Type
 16918  		a := v_0
 16919  		p := v_1
 16920  		if p.Op != ssaop.OpARM64SUBconst {
 16921  			break
 16922  		}
 16923  		c := ssa.AuxIntToInt64(p.AuxInt)
 16924  		m := p.Args[0]
 16925  		if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16926  			break
 16927  		}
 16928  		v.Reset(ssaop.OpARM64ADDconst)
 16929  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16930  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16931  		v0.AddArg2(a, m)
 16932  		v.AddArg(v0)
 16933  		return true
 16934  	}
 16935  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEG _ _)))
 16936  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16937  	// result: (ADDconst [c] (SUB <v.Type> a m))
 16938  	for {
 16939  		t := v.Type
 16940  		a := v_0
 16941  		p := v_1
 16942  		if p.Op != ssaop.OpARM64SUBconst {
 16943  			break
 16944  		}
 16945  		c := ssa.AuxIntToInt64(p.AuxInt)
 16946  		m := p.Args[0]
 16947  		if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16948  			break
 16949  		}
 16950  		v.Reset(ssaop.OpARM64ADDconst)
 16951  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16952  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16953  		v0.AddArg2(a, m)
 16954  		v.AddArg(v0)
 16955  		return true
 16956  	}
 16957  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEGW _ _)))
 16958  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16959  	// result: (ADDconst [c] (SUB <v.Type> a m))
 16960  	for {
 16961  		t := v.Type
 16962  		a := v_0
 16963  		p := v_1
 16964  		if p.Op != ssaop.OpARM64SUBconst {
 16965  			break
 16966  		}
 16967  		c := ssa.AuxIntToInt64(p.AuxInt)
 16968  		m := p.Args[0]
 16969  		if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16970  			break
 16971  		}
 16972  		v.Reset(ssaop.OpARM64ADDconst)
 16973  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16974  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16975  		v0.AddArg2(a, m)
 16976  		v.AddArg(v0)
 16977  		return true
 16978  	}
 16979  	// match: (SUB x (NEG y))
 16980  	// result: (ADD x y)
 16981  	for {
 16982  		x := v_0
 16983  		if v_1.Op != ssaop.OpARM64NEG {
 16984  			break
 16985  		}
 16986  		y := v_1.Args[0]
 16987  		v.Reset(ssaop.OpARM64ADD)
 16988  		v.AddArg2(x, y)
 16989  		return true
 16990  	}
 16991  	// match: (SUB x x)
 16992  	// result: (MOVDconst [0])
 16993  	for {
 16994  		x := v_0
 16995  		if x != v_1 {
 16996  			break
 16997  		}
 16998  		v.Reset(ssaop.OpARM64MOVDconst)
 16999  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17000  		return true
 17001  	}
 17002  	// match: (SUB x (SUB y z))
 17003  	// result: (SUB (ADD <v.Type> x z) y)
 17004  	for {
 17005  		x := v_0
 17006  		if v_1.Op != ssaop.OpARM64SUB {
 17007  			break
 17008  		}
 17009  		z := v_1.Args[1]
 17010  		y := v_1.Args[0]
 17011  		v.Reset(ssaop.OpARM64SUB)
 17012  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
 17013  		v0.AddArg2(x, z)
 17014  		v.AddArg2(v0, y)
 17015  		return true
 17016  	}
 17017  	// match: (SUB (SUB x y) z)
 17018  	// result: (SUB x (ADD <y.Type> y z))
 17019  	for {
 17020  		if v_0.Op != ssaop.OpARM64SUB {
 17021  			break
 17022  		}
 17023  		y := v_0.Args[1]
 17024  		x := v_0.Args[0]
 17025  		z := v_1
 17026  		v.Reset(ssaop.OpARM64SUB)
 17027  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, y.Type)
 17028  		v0.AddArg2(y, z)
 17029  		v.AddArg2(x, v0)
 17030  		return true
 17031  	}
 17032  	// match: (SUB x0 x1:(SLLconst [c] y))
 17033  	// cond: ssa.ClobberIfDead(x1)
 17034  	// result: (SUBshiftLL x0 y [c])
 17035  	for {
 17036  		x0 := v_0
 17037  		x1 := v_1
 17038  		if x1.Op != ssaop.OpARM64SLLconst {
 17039  			break
 17040  		}
 17041  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17042  		y := x1.Args[0]
 17043  		if !(ssa.ClobberIfDead(x1)) {
 17044  			break
 17045  		}
 17046  		v.Reset(ssaop.OpARM64SUBshiftLL)
 17047  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17048  		v.AddArg2(x0, y)
 17049  		return true
 17050  	}
 17051  	// match: (SUB x0 x1:(SRLconst [c] y))
 17052  	// cond: ssa.ClobberIfDead(x1)
 17053  	// result: (SUBshiftRL x0 y [c])
 17054  	for {
 17055  		x0 := v_0
 17056  		x1 := v_1
 17057  		if x1.Op != ssaop.OpARM64SRLconst {
 17058  			break
 17059  		}
 17060  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17061  		y := x1.Args[0]
 17062  		if !(ssa.ClobberIfDead(x1)) {
 17063  			break
 17064  		}
 17065  		v.Reset(ssaop.OpARM64SUBshiftRL)
 17066  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17067  		v.AddArg2(x0, y)
 17068  		return true
 17069  	}
 17070  	// match: (SUB x0 x1:(SRAconst [c] y))
 17071  	// cond: ssa.ClobberIfDead(x1)
 17072  	// result: (SUBshiftRA x0 y [c])
 17073  	for {
 17074  		x0 := v_0
 17075  		x1 := v_1
 17076  		if x1.Op != ssaop.OpARM64SRAconst {
 17077  			break
 17078  		}
 17079  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17080  		y := x1.Args[0]
 17081  		if !(ssa.ClobberIfDead(x1)) {
 17082  			break
 17083  		}
 17084  		v.Reset(ssaop.OpARM64SUBshiftRA)
 17085  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17086  		v.AddArg2(x0, y)
 17087  		return true
 17088  	}
 17089  	return false
 17090  }
 17091  func rewriteValue_OpARM64SUBconst(v *ssa.Value) bool {
 17092  	v_0 := v.Args[0]
 17093  	// match: (SUBconst [0] x)
 17094  	// result: x
 17095  	for {
 17096  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 17097  			break
 17098  		}
 17099  		x := v_0
 17100  		v.CopyOf(x)
 17101  		return true
 17102  	}
 17103  	// match: (SUBconst [c] (MOVDconst [d]))
 17104  	// result: (MOVDconst [d-c])
 17105  	for {
 17106  		c := ssa.AuxIntToInt64(v.AuxInt)
 17107  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17108  			break
 17109  		}
 17110  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17111  		v.Reset(ssaop.OpARM64MOVDconst)
 17112  		v.AuxInt = ssa.Int64ToAuxInt(d - c)
 17113  		return true
 17114  	}
 17115  	// match: (SUBconst [c] (SUBconst [d] x))
 17116  	// result: (ADDconst [-c-d] x)
 17117  	for {
 17118  		c := ssa.AuxIntToInt64(v.AuxInt)
 17119  		if v_0.Op != ssaop.OpARM64SUBconst {
 17120  			break
 17121  		}
 17122  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17123  		x := v_0.Args[0]
 17124  		v.Reset(ssaop.OpARM64ADDconst)
 17125  		v.AuxInt = ssa.Int64ToAuxInt(-c - d)
 17126  		v.AddArg(x)
 17127  		return true
 17128  	}
 17129  	// match: (SUBconst [c] (ADDconst [d] x))
 17130  	// result: (ADDconst [-c+d] x)
 17131  	for {
 17132  		c := ssa.AuxIntToInt64(v.AuxInt)
 17133  		if v_0.Op != ssaop.OpARM64ADDconst {
 17134  			break
 17135  		}
 17136  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17137  		x := v_0.Args[0]
 17138  		v.Reset(ssaop.OpARM64ADDconst)
 17139  		v.AuxInt = ssa.Int64ToAuxInt(-c + d)
 17140  		v.AddArg(x)
 17141  		return true
 17142  	}
 17143  	return false
 17144  }
 17145  func rewriteValue_OpARM64SUBshiftLL(v *ssa.Value) bool {
 17146  	v_1 := v.Args[1]
 17147  	v_0 := v.Args[0]
 17148  	// match: (SUBshiftLL x (MOVDconst [c]) [d])
 17149  	// result: (SUBconst x [int64(uint64(c)<<uint64(d))])
 17150  	for {
 17151  		d := ssa.AuxIntToInt64(v.AuxInt)
 17152  		x := v_0
 17153  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17154  			break
 17155  		}
 17156  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17157  		v.Reset(ssaop.OpARM64SUBconst)
 17158  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 17159  		v.AddArg(x)
 17160  		return true
 17161  	}
 17162  	// match: (SUBshiftLL (SLLconst x [c]) x [c])
 17163  	// result: (MOVDconst [0])
 17164  	for {
 17165  		c := ssa.AuxIntToInt64(v.AuxInt)
 17166  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17167  			break
 17168  		}
 17169  		x := v_0.Args[0]
 17170  		if x != v_1 {
 17171  			break
 17172  		}
 17173  		v.Reset(ssaop.OpARM64MOVDconst)
 17174  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17175  		return true
 17176  	}
 17177  	return false
 17178  }
 17179  func rewriteValue_OpARM64SUBshiftRA(v *ssa.Value) bool {
 17180  	v_1 := v.Args[1]
 17181  	v_0 := v.Args[0]
 17182  	// match: (SUBshiftRA x (MOVDconst [c]) [d])
 17183  	// result: (SUBconst x [c>>uint64(d)])
 17184  	for {
 17185  		d := ssa.AuxIntToInt64(v.AuxInt)
 17186  		x := v_0
 17187  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17188  			break
 17189  		}
 17190  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17191  		v.Reset(ssaop.OpARM64SUBconst)
 17192  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 17193  		v.AddArg(x)
 17194  		return true
 17195  	}
 17196  	// match: (SUBshiftRA (SRAconst x [c]) x [c])
 17197  	// result: (MOVDconst [0])
 17198  	for {
 17199  		c := ssa.AuxIntToInt64(v.AuxInt)
 17200  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17201  			break
 17202  		}
 17203  		x := v_0.Args[0]
 17204  		if x != v_1 {
 17205  			break
 17206  		}
 17207  		v.Reset(ssaop.OpARM64MOVDconst)
 17208  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17209  		return true
 17210  	}
 17211  	return false
 17212  }
 17213  func rewriteValue_OpARM64SUBshiftRL(v *ssa.Value) bool {
 17214  	v_1 := v.Args[1]
 17215  	v_0 := v.Args[0]
 17216  	// match: (SUBshiftRL x (MOVDconst [c]) [d])
 17217  	// result: (SUBconst x [int64(uint64(c)>>uint64(d))])
 17218  	for {
 17219  		d := ssa.AuxIntToInt64(v.AuxInt)
 17220  		x := v_0
 17221  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17222  			break
 17223  		}
 17224  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17225  		v.Reset(ssaop.OpARM64SUBconst)
 17226  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 17227  		v.AddArg(x)
 17228  		return true
 17229  	}
 17230  	// match: (SUBshiftRL (SRLconst x [c]) x [c])
 17231  	// result: (MOVDconst [0])
 17232  	for {
 17233  		c := ssa.AuxIntToInt64(v.AuxInt)
 17234  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17235  			break
 17236  		}
 17237  		x := v_0.Args[0]
 17238  		if x != v_1 {
 17239  			break
 17240  		}
 17241  		v.Reset(ssaop.OpARM64MOVDconst)
 17242  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17243  		return true
 17244  	}
 17245  	return false
 17246  }
 17247  func rewriteValue_OpARM64TST(v *ssa.Value) bool {
 17248  	v_1 := v.Args[1]
 17249  	v_0 := v.Args[0]
 17250  	// match: (TST x (MOVDconst [c]))
 17251  	// result: (TSTconst [c] x)
 17252  	for {
 17253  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17254  			x := v_0
 17255  			if v_1.Op != ssaop.OpARM64MOVDconst {
 17256  				continue
 17257  			}
 17258  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 17259  			v.Reset(ssaop.OpARM64TSTconst)
 17260  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17261  			v.AddArg(x)
 17262  			return true
 17263  		}
 17264  		break
 17265  	}
 17266  	// match: (TST x0 x1:(SLLconst [c] y))
 17267  	// cond: ssa.ClobberIfDead(x1)
 17268  	// result: (TSTshiftLL x0 y [c])
 17269  	for {
 17270  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17271  			x0 := v_0
 17272  			x1 := v_1
 17273  			if x1.Op != ssaop.OpARM64SLLconst {
 17274  				continue
 17275  			}
 17276  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17277  			y := x1.Args[0]
 17278  			if !(ssa.ClobberIfDead(x1)) {
 17279  				continue
 17280  			}
 17281  			v.Reset(ssaop.OpARM64TSTshiftLL)
 17282  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17283  			v.AddArg2(x0, y)
 17284  			return true
 17285  		}
 17286  		break
 17287  	}
 17288  	// match: (TST x0 x1:(SRLconst [c] y))
 17289  	// cond: ssa.ClobberIfDead(x1)
 17290  	// result: (TSTshiftRL x0 y [c])
 17291  	for {
 17292  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17293  			x0 := v_0
 17294  			x1 := v_1
 17295  			if x1.Op != ssaop.OpARM64SRLconst {
 17296  				continue
 17297  			}
 17298  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17299  			y := x1.Args[0]
 17300  			if !(ssa.ClobberIfDead(x1)) {
 17301  				continue
 17302  			}
 17303  			v.Reset(ssaop.OpARM64TSTshiftRL)
 17304  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17305  			v.AddArg2(x0, y)
 17306  			return true
 17307  		}
 17308  		break
 17309  	}
 17310  	// match: (TST x0 x1:(SRAconst [c] y))
 17311  	// cond: ssa.ClobberIfDead(x1)
 17312  	// result: (TSTshiftRA x0 y [c])
 17313  	for {
 17314  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17315  			x0 := v_0
 17316  			x1 := v_1
 17317  			if x1.Op != ssaop.OpARM64SRAconst {
 17318  				continue
 17319  			}
 17320  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17321  			y := x1.Args[0]
 17322  			if !(ssa.ClobberIfDead(x1)) {
 17323  				continue
 17324  			}
 17325  			v.Reset(ssaop.OpARM64TSTshiftRA)
 17326  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17327  			v.AddArg2(x0, y)
 17328  			return true
 17329  		}
 17330  		break
 17331  	}
 17332  	// match: (TST x0 x1:(RORconst [c] y))
 17333  	// cond: ssa.ClobberIfDead(x1)
 17334  	// result: (TSTshiftRO x0 y [c])
 17335  	for {
 17336  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17337  			x0 := v_0
 17338  			x1 := v_1
 17339  			if x1.Op != ssaop.OpARM64RORconst {
 17340  				continue
 17341  			}
 17342  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17343  			y := x1.Args[0]
 17344  			if !(ssa.ClobberIfDead(x1)) {
 17345  				continue
 17346  			}
 17347  			v.Reset(ssaop.OpARM64TSTshiftRO)
 17348  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17349  			v.AddArg2(x0, y)
 17350  			return true
 17351  		}
 17352  		break
 17353  	}
 17354  	return false
 17355  }
 17356  func rewriteValue_OpARM64TSTW(v *ssa.Value) bool {
 17357  	v_1 := v.Args[1]
 17358  	v_0 := v.Args[0]
 17359  	// match: (TSTW x (MOVDconst [c]))
 17360  	// result: (TSTWconst [int32(c)] x)
 17361  	for {
 17362  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17363  			x := v_0
 17364  			if v_1.Op != ssaop.OpARM64MOVDconst {
 17365  				continue
 17366  			}
 17367  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 17368  			v.Reset(ssaop.OpARM64TSTWconst)
 17369  			v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 17370  			v.AddArg(x)
 17371  			return true
 17372  		}
 17373  		break
 17374  	}
 17375  	return false
 17376  }
 17377  func rewriteValue_OpARM64TSTWconst(v *ssa.Value) bool {
 17378  	v_0 := v.Args[0]
 17379  	// match: (TSTWconst (MOVDconst [x]) [y])
 17380  	// result: (FlagConstant [ssa.LogicFlags32(int32(x)&y)])
 17381  	for {
 17382  		y := ssa.AuxIntToInt32(v.AuxInt)
 17383  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17384  			break
 17385  		}
 17386  		x := ssa.AuxIntToInt64(v_0.AuxInt)
 17387  		v.Reset(ssaop.OpARM64FlagConstant)
 17388  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.LogicFlags32(int32(x) & y))
 17389  		return true
 17390  	}
 17391  	return false
 17392  }
 17393  func rewriteValue_OpARM64TSTconst(v *ssa.Value) bool {
 17394  	v_0 := v.Args[0]
 17395  	// match: (TSTconst (MOVDconst [x]) [y])
 17396  	// result: (FlagConstant [ssa.LogicFlags64(x&y)])
 17397  	for {
 17398  		y := ssa.AuxIntToInt64(v.AuxInt)
 17399  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17400  			break
 17401  		}
 17402  		x := ssa.AuxIntToInt64(v_0.AuxInt)
 17403  		v.Reset(ssaop.OpARM64FlagConstant)
 17404  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.LogicFlags64(x & y))
 17405  		return true
 17406  	}
 17407  	return false
 17408  }
 17409  func rewriteValue_OpARM64TSTshiftLL(v *ssa.Value) bool {
 17410  	v_1 := v.Args[1]
 17411  	v_0 := v.Args[0]
 17412  	b := v.Block
 17413  	// match: (TSTshiftLL (MOVDconst [c]) x [d])
 17414  	// result: (TSTconst [c] (SLLconst <x.Type> x [d]))
 17415  	for {
 17416  		d := ssa.AuxIntToInt64(v.AuxInt)
 17417  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17418  			break
 17419  		}
 17420  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17421  		x := v_1
 17422  		v.Reset(ssaop.OpARM64TSTconst)
 17423  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17424  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 17425  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17426  		v0.AddArg(x)
 17427  		v.AddArg(v0)
 17428  		return true
 17429  	}
 17430  	// match: (TSTshiftLL x (MOVDconst [c]) [d])
 17431  	// result: (TSTconst x [int64(uint64(c)<<uint64(d))])
 17432  	for {
 17433  		d := ssa.AuxIntToInt64(v.AuxInt)
 17434  		x := v_0
 17435  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17436  			break
 17437  		}
 17438  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17439  		v.Reset(ssaop.OpARM64TSTconst)
 17440  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 17441  		v.AddArg(x)
 17442  		return true
 17443  	}
 17444  	return false
 17445  }
 17446  func rewriteValue_OpARM64TSTshiftRA(v *ssa.Value) bool {
 17447  	v_1 := v.Args[1]
 17448  	v_0 := v.Args[0]
 17449  	b := v.Block
 17450  	// match: (TSTshiftRA (MOVDconst [c]) x [d])
 17451  	// result: (TSTconst [c] (SRAconst <x.Type> x [d]))
 17452  	for {
 17453  		d := ssa.AuxIntToInt64(v.AuxInt)
 17454  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17455  			break
 17456  		}
 17457  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17458  		x := v_1
 17459  		v.Reset(ssaop.OpARM64TSTconst)
 17460  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17461  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 17462  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17463  		v0.AddArg(x)
 17464  		v.AddArg(v0)
 17465  		return true
 17466  	}
 17467  	// match: (TSTshiftRA x (MOVDconst [c]) [d])
 17468  	// result: (TSTconst x [c>>uint64(d)])
 17469  	for {
 17470  		d := ssa.AuxIntToInt64(v.AuxInt)
 17471  		x := v_0
 17472  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17473  			break
 17474  		}
 17475  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17476  		v.Reset(ssaop.OpARM64TSTconst)
 17477  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 17478  		v.AddArg(x)
 17479  		return true
 17480  	}
 17481  	return false
 17482  }
 17483  func rewriteValue_OpARM64TSTshiftRL(v *ssa.Value) bool {
 17484  	v_1 := v.Args[1]
 17485  	v_0 := v.Args[0]
 17486  	b := v.Block
 17487  	// match: (TSTshiftRL (MOVDconst [c]) x [d])
 17488  	// result: (TSTconst [c] (SRLconst <x.Type> x [d]))
 17489  	for {
 17490  		d := ssa.AuxIntToInt64(v.AuxInt)
 17491  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17492  			break
 17493  		}
 17494  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17495  		x := v_1
 17496  		v.Reset(ssaop.OpARM64TSTconst)
 17497  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17498  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 17499  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17500  		v0.AddArg(x)
 17501  		v.AddArg(v0)
 17502  		return true
 17503  	}
 17504  	// match: (TSTshiftRL x (MOVDconst [c]) [d])
 17505  	// result: (TSTconst x [int64(uint64(c)>>uint64(d))])
 17506  	for {
 17507  		d := ssa.AuxIntToInt64(v.AuxInt)
 17508  		x := v_0
 17509  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17510  			break
 17511  		}
 17512  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17513  		v.Reset(ssaop.OpARM64TSTconst)
 17514  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 17515  		v.AddArg(x)
 17516  		return true
 17517  	}
 17518  	return false
 17519  }
 17520  func rewriteValue_OpARM64TSTshiftRO(v *ssa.Value) bool {
 17521  	v_1 := v.Args[1]
 17522  	v_0 := v.Args[0]
 17523  	b := v.Block
 17524  	// match: (TSTshiftRO (MOVDconst [c]) x [d])
 17525  	// result: (TSTconst [c] (RORconst <x.Type> x [d]))
 17526  	for {
 17527  		d := ssa.AuxIntToInt64(v.AuxInt)
 17528  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17529  			break
 17530  		}
 17531  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17532  		x := v_1
 17533  		v.Reset(ssaop.OpARM64TSTconst)
 17534  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17535  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 17536  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17537  		v0.AddArg(x)
 17538  		v.AddArg(v0)
 17539  		return true
 17540  	}
 17541  	// match: (TSTshiftRO x (MOVDconst [c]) [d])
 17542  	// result: (TSTconst x [rotateRight64(c, d)])
 17543  	for {
 17544  		d := ssa.AuxIntToInt64(v.AuxInt)
 17545  		x := v_0
 17546  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17547  			break
 17548  		}
 17549  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17550  		v.Reset(ssaop.OpARM64TSTconst)
 17551  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 17552  		v.AddArg(x)
 17553  		return true
 17554  	}
 17555  	return false
 17556  }
 17557  func rewriteValue_OpARM64UBFIZ(v *ssa.Value) bool {
 17558  	v_0 := v.Args[0]
 17559  	// match: (UBFIZ [bfc] (SLLconst [sc] x))
 17560  	// cond: sc < bfc.Width()
 17561  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc)] x)
 17562  	for {
 17563  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17564  		if v_0.Op != ssaop.OpARM64SLLconst {
 17565  			break
 17566  		}
 17567  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17568  		x := v_0.Args[0]
 17569  		if !(sc < bfc.Width()) {
 17570  			break
 17571  		}
 17572  		v.Reset(ssaop.OpARM64UBFIZ)
 17573  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc))
 17574  		v.AddArg(x)
 17575  		return true
 17576  	}
 17577  	return false
 17578  }
 17579  func rewriteValue_OpARM64UBFX(v *ssa.Value) bool {
 17580  	v_0 := v.Args[0]
 17581  	// match: (UBFX [bfc] (ANDconst [c] x))
 17582  	// cond: isARM64BFMask(0, c, 0) && bfc.Lsb() + bfc.Width() <= arm64BFWidth(c, 0)
 17583  	// result: (UBFX [bfc] x)
 17584  	for {
 17585  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17586  		if v_0.Op != ssaop.OpARM64ANDconst {
 17587  			break
 17588  		}
 17589  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17590  		x := v_0.Args[0]
 17591  		if !(isARM64BFMask(0, c, 0) && bfc.Lsb()+bfc.Width() <= arm64BFWidth(c, 0)) {
 17592  			break
 17593  		}
 17594  		v.Reset(ssaop.OpARM64UBFX)
 17595  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 17596  		v.AddArg(x)
 17597  		return true
 17598  	}
 17599  	// match: (UBFX [bfc] e:(MOVWUreg x))
 17600  	// cond: e.Uses == 1 && bfc.Lsb() < 32
 17601  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 32-bfc.Lsb()))] x)
 17602  	for {
 17603  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17604  		e := v_0
 17605  		if e.Op != ssaop.OpARM64MOVWUreg {
 17606  			break
 17607  		}
 17608  		x := e.Args[0]
 17609  		if !(e.Uses == 1 && bfc.Lsb() < 32) {
 17610  			break
 17611  		}
 17612  		v.Reset(ssaop.OpARM64UBFX)
 17613  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 32-bfc.Lsb())))
 17614  		v.AddArg(x)
 17615  		return true
 17616  	}
 17617  	// match: (UBFX [bfc] e:(MOVHUreg x))
 17618  	// cond: e.Uses == 1 && bfc.Lsb() < 16
 17619  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 16-bfc.Lsb()))] x)
 17620  	for {
 17621  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17622  		e := v_0
 17623  		if e.Op != ssaop.OpARM64MOVHUreg {
 17624  			break
 17625  		}
 17626  		x := e.Args[0]
 17627  		if !(e.Uses == 1 && bfc.Lsb() < 16) {
 17628  			break
 17629  		}
 17630  		v.Reset(ssaop.OpARM64UBFX)
 17631  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 16-bfc.Lsb())))
 17632  		v.AddArg(x)
 17633  		return true
 17634  	}
 17635  	// match: (UBFX [bfc] e:(MOVBUreg x))
 17636  	// cond: e.Uses == 1 && bfc.Lsb() < 8
 17637  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 8-bfc.Lsb()))] x)
 17638  	for {
 17639  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17640  		e := v_0
 17641  		if e.Op != ssaop.OpARM64MOVBUreg {
 17642  			break
 17643  		}
 17644  		x := e.Args[0]
 17645  		if !(e.Uses == 1 && bfc.Lsb() < 8) {
 17646  			break
 17647  		}
 17648  		v.Reset(ssaop.OpARM64UBFX)
 17649  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 8-bfc.Lsb())))
 17650  		v.AddArg(x)
 17651  		return true
 17652  	}
 17653  	// match: (UBFX [bfc] (SRLconst [sc] x))
 17654  	// cond: sc+bfc.Width()+bfc.Lsb() < 64
 17655  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width())] x)
 17656  	for {
 17657  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17658  		if v_0.Op != ssaop.OpARM64SRLconst {
 17659  			break
 17660  		}
 17661  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17662  		x := v_0.Args[0]
 17663  		if !(sc+bfc.Width()+bfc.Lsb() < 64) {
 17664  			break
 17665  		}
 17666  		v.Reset(ssaop.OpARM64UBFX)
 17667  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()))
 17668  		v.AddArg(x)
 17669  		return true
 17670  	}
 17671  	// match: (UBFX [bfc] (SLLconst [sc] x))
 17672  	// cond: sc == bfc.Lsb()
 17673  	// result: (ANDconst [1<<uint(bfc.Width())-1] x)
 17674  	for {
 17675  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17676  		if v_0.Op != ssaop.OpARM64SLLconst {
 17677  			break
 17678  		}
 17679  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17680  		x := v_0.Args[0]
 17681  		if !(sc == bfc.Lsb()) {
 17682  			break
 17683  		}
 17684  		v.Reset(ssaop.OpARM64ANDconst)
 17685  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(bfc.Width()) - 1)
 17686  		v.AddArg(x)
 17687  		return true
 17688  	}
 17689  	// match: (UBFX [bfc] (SLLconst [sc] x))
 17690  	// cond: sc < bfc.Lsb()
 17691  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 17692  	for {
 17693  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17694  		if v_0.Op != ssaop.OpARM64SLLconst {
 17695  			break
 17696  		}
 17697  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17698  		x := v_0.Args[0]
 17699  		if !(sc < bfc.Lsb()) {
 17700  			break
 17701  		}
 17702  		v.Reset(ssaop.OpARM64UBFX)
 17703  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 17704  		v.AddArg(x)
 17705  		return true
 17706  	}
 17707  	// match: (UBFX [bfc] (SLLconst [sc] x))
 17708  	// cond: sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 17709  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 17710  	for {
 17711  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17712  		if v_0.Op != ssaop.OpARM64SLLconst {
 17713  			break
 17714  		}
 17715  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17716  		x := v_0.Args[0]
 17717  		if !(sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 17718  			break
 17719  		}
 17720  		v.Reset(ssaop.OpARM64UBFIZ)
 17721  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 17722  		v.AddArg(x)
 17723  		return true
 17724  	}
 17725  	return false
 17726  }
 17727  func rewriteValue_OpARM64UDIV(v *ssa.Value) bool {
 17728  	v_1 := v.Args[1]
 17729  	v_0 := v.Args[0]
 17730  	// match: (UDIV x (MOVDconst [1]))
 17731  	// result: x
 17732  	for {
 17733  		x := v_0
 17734  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 17735  			break
 17736  		}
 17737  		v.CopyOf(x)
 17738  		return true
 17739  	}
 17740  	// match: (UDIV x (MOVDconst [c]))
 17741  	// cond: ssa.IsPowerOfTwo(c)
 17742  	// result: (SRLconst [ssa.Log64(c)] x)
 17743  	for {
 17744  		x := v_0
 17745  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17746  			break
 17747  		}
 17748  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17749  		if !(ssa.IsPowerOfTwo(c)) {
 17750  			break
 17751  		}
 17752  		v.Reset(ssaop.OpARM64SRLconst)
 17753  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 17754  		v.AddArg(x)
 17755  		return true
 17756  	}
 17757  	// match: (UDIV (MOVDconst [c]) (MOVDconst [d]))
 17758  	// cond: d != 0
 17759  	// result: (MOVDconst [int64(uint64(c)/uint64(d))])
 17760  	for {
 17761  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17762  			break
 17763  		}
 17764  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17765  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17766  			break
 17767  		}
 17768  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 17769  		if !(d != 0) {
 17770  			break
 17771  		}
 17772  		v.Reset(ssaop.OpARM64MOVDconst)
 17773  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) / uint64(d)))
 17774  		return true
 17775  	}
 17776  	return false
 17777  }
 17778  func rewriteValue_OpARM64UDIVW(v *ssa.Value) bool {
 17779  	v_1 := v.Args[1]
 17780  	v_0 := v.Args[0]
 17781  	b := v.Block
 17782  	// match: (UDIVW x (MOVDconst [c]))
 17783  	// cond: uint32(c)==1
 17784  	// result: (MOVWUreg x)
 17785  	for {
 17786  		x := v_0
 17787  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17788  			break
 17789  		}
 17790  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17791  		if !(uint32(c) == 1) {
 17792  			break
 17793  		}
 17794  		v.Reset(ssaop.OpARM64MOVWUreg)
 17795  		v.AddArg(x)
 17796  		return true
 17797  	}
 17798  	// match: (UDIVW x (MOVDconst [c]))
 17799  	// cond: ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)
 17800  	// result: (SRLconst [ssa.Log64(c)] (MOVWUreg <v.Type> x))
 17801  	for {
 17802  		x := v_0
 17803  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17804  			break
 17805  		}
 17806  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17807  		if !(ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)) {
 17808  			break
 17809  		}
 17810  		v.Reset(ssaop.OpARM64SRLconst)
 17811  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 17812  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUreg, v.Type)
 17813  		v0.AddArg(x)
 17814  		v.AddArg(v0)
 17815  		return true
 17816  	}
 17817  	// match: (UDIVW (MOVDconst [c]) (MOVDconst [d]))
 17818  	// cond: d != 0
 17819  	// result: (MOVDconst [int64(uint32(c)/uint32(d))])
 17820  	for {
 17821  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17822  			break
 17823  		}
 17824  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17825  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17826  			break
 17827  		}
 17828  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 17829  		if !(d != 0) {
 17830  			break
 17831  		}
 17832  		v.Reset(ssaop.OpARM64MOVDconst)
 17833  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c) / uint32(d)))
 17834  		return true
 17835  	}
 17836  	return false
 17837  }
 17838  func rewriteValue_OpARM64UMOD(v *ssa.Value) bool {
 17839  	v_1 := v.Args[1]
 17840  	v_0 := v.Args[0]
 17841  	b := v.Block
 17842  	typ := &b.Func.Config.Types
 17843  	// match: (UMOD <typ.UInt64> x y)
 17844  	// result: (MSUB <typ.UInt64> x y (UDIV <typ.UInt64> x y))
 17845  	for {
 17846  		if v.Type != typ.UInt64 {
 17847  			break
 17848  		}
 17849  		x := v_0
 17850  		y := v_1
 17851  		v.Reset(ssaop.OpARM64MSUB)
 17852  		v.Type = typ.UInt64
 17853  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UDIV, typ.UInt64)
 17854  		v0.AddArg2(x, y)
 17855  		v.AddArg3(x, y, v0)
 17856  		return true
 17857  	}
 17858  	// match: (UMOD _ (MOVDconst [1]))
 17859  	// result: (MOVDconst [0])
 17860  	for {
 17861  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 17862  			break
 17863  		}
 17864  		v.Reset(ssaop.OpARM64MOVDconst)
 17865  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17866  		return true
 17867  	}
 17868  	// match: (UMOD x (MOVDconst [c]))
 17869  	// cond: ssa.IsPowerOfTwo(c)
 17870  	// result: (ANDconst [c-1] x)
 17871  	for {
 17872  		x := v_0
 17873  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17874  			break
 17875  		}
 17876  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17877  		if !(ssa.IsPowerOfTwo(c)) {
 17878  			break
 17879  		}
 17880  		v.Reset(ssaop.OpARM64ANDconst)
 17881  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
 17882  		v.AddArg(x)
 17883  		return true
 17884  	}
 17885  	// match: (UMOD (MOVDconst [c]) (MOVDconst [d]))
 17886  	// cond: d != 0
 17887  	// result: (MOVDconst [int64(uint64(c)%uint64(d))])
 17888  	for {
 17889  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17890  			break
 17891  		}
 17892  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17893  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17894  			break
 17895  		}
 17896  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 17897  		if !(d != 0) {
 17898  			break
 17899  		}
 17900  		v.Reset(ssaop.OpARM64MOVDconst)
 17901  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) % uint64(d)))
 17902  		return true
 17903  	}
 17904  	return false
 17905  }
 17906  func rewriteValue_OpARM64UMODW(v *ssa.Value) bool {
 17907  	v_1 := v.Args[1]
 17908  	v_0 := v.Args[0]
 17909  	b := v.Block
 17910  	typ := &b.Func.Config.Types
 17911  	// match: (UMODW <typ.UInt32> x y)
 17912  	// result: (MSUBW <typ.UInt32> x y (UDIVW <typ.UInt32> x y))
 17913  	for {
 17914  		if v.Type != typ.UInt32 {
 17915  			break
 17916  		}
 17917  		x := v_0
 17918  		y := v_1
 17919  		v.Reset(ssaop.OpARM64MSUBW)
 17920  		v.Type = typ.UInt32
 17921  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UDIVW, typ.UInt32)
 17922  		v0.AddArg2(x, y)
 17923  		v.AddArg3(x, y, v0)
 17924  		return true
 17925  	}
 17926  	// match: (UMODW _ (MOVDconst [c]))
 17927  	// cond: uint32(c)==1
 17928  	// result: (MOVDconst [0])
 17929  	for {
 17930  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17931  			break
 17932  		}
 17933  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17934  		if !(uint32(c) == 1) {
 17935  			break
 17936  		}
 17937  		v.Reset(ssaop.OpARM64MOVDconst)
 17938  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17939  		return true
 17940  	}
 17941  	// match: (UMODW x (MOVDconst [c]))
 17942  	// cond: ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)
 17943  	// result: (ANDconst [c-1] x)
 17944  	for {
 17945  		x := v_0
 17946  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17947  			break
 17948  		}
 17949  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17950  		if !(ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)) {
 17951  			break
 17952  		}
 17953  		v.Reset(ssaop.OpARM64ANDconst)
 17954  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
 17955  		v.AddArg(x)
 17956  		return true
 17957  	}
 17958  	// match: (UMODW (MOVDconst [c]) (MOVDconst [d]))
 17959  	// cond: d != 0
 17960  	// result: (MOVDconst [int64(uint32(c)%uint32(d))])
 17961  	for {
 17962  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17963  			break
 17964  		}
 17965  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17966  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17967  			break
 17968  		}
 17969  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 17970  		if !(d != 0) {
 17971  			break
 17972  		}
 17973  		v.Reset(ssaop.OpARM64MOVDconst)
 17974  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c) % uint32(d)))
 17975  		return true
 17976  	}
 17977  	return false
 17978  }
 17979  func rewriteValue_OpARM64VBIF16B(v *ssa.Value) bool {
 17980  	v_2 := v.Args[2]
 17981  	v_1 := v.Args[1]
 17982  	v_0 := v.Args[0]
 17983  	// match: (VBIF16B x y (VNOT16B mask))
 17984  	// result: (VBIT16B x y mask)
 17985  	for {
 17986  		x := v_0
 17987  		y := v_1
 17988  		if v_2.Op != ssaop.OpARM64VNOT16B {
 17989  			break
 17990  		}
 17991  		mask := v_2.Args[0]
 17992  		v.Reset(ssaop.OpARM64VBIT16B)
 17993  		v.AddArg3(x, y, mask)
 17994  		return true
 17995  	}
 17996  	return false
 17997  }
 17998  func rewriteValue_OpARM64VBIT16B(v *ssa.Value) bool {
 17999  	v_2 := v.Args[2]
 18000  	v_1 := v.Args[1]
 18001  	v_0 := v.Args[0]
 18002  	// match: (VBIT16B x y (VNOT16B mask))
 18003  	// result: (VBIF16B x y mask)
 18004  	for {
 18005  		x := v_0
 18006  		y := v_1
 18007  		if v_2.Op != ssaop.OpARM64VNOT16B {
 18008  			break
 18009  		}
 18010  		mask := v_2.Args[0]
 18011  		v.Reset(ssaop.OpARM64VBIF16B)
 18012  		v.AddArg3(x, y, mask)
 18013  		return true
 18014  	}
 18015  	return false
 18016  }
 18017  func rewriteValue_OpARM64VDUPBbcast(v *ssa.Value) bool {
 18018  	v_0 := v.Args[0]
 18019  	// match: (VDUPBbcast [i] (VMOVBins [j] _ (MOVDconst [c])))
 18020  	// cond: i == j && c>=-128 && c<=255
 18021  	// result: (VMOVI16B [uint8(c)])
 18022  	for {
 18023  		i := ssa.AuxIntToUint8(v.AuxInt)
 18024  		if v_0.Op != ssaop.OpARM64VMOVBins {
 18025  			break
 18026  		}
 18027  		j := ssa.AuxIntToUint8(v_0.AuxInt)
 18028  		_ = v_0.Args[1]
 18029  		v_0_1 := v_0.Args[1]
 18030  		if v_0_1.Op != ssaop.OpARM64MOVDconst {
 18031  			break
 18032  		}
 18033  		c := ssa.AuxIntToInt64(v_0_1.AuxInt)
 18034  		if !(i == j && c >= -128 && c <= 255) {
 18035  			break
 18036  		}
 18037  		v.Reset(ssaop.OpARM64VMOVI16B)
 18038  		v.AuxInt = ssa.Uint8ToAuxInt(uint8(c))
 18039  		return true
 18040  	}
 18041  	return false
 18042  }
 18043  func rewriteValue_OpARM64VFCVTL4S(v *ssa.Value) bool {
 18044  	v_0 := v.Args[0]
 18045  	// match: (VFCVTL4S (VDUPDextr [1] x))
 18046  	// result: (VFCVTL2_4S x)
 18047  	for {
 18048  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18049  			break
 18050  		}
 18051  		x := v_0.Args[0]
 18052  		v.Reset(ssaop.OpARM64VFCVTL2_4S)
 18053  		v.AddArg(x)
 18054  		return true
 18055  	}
 18056  	return false
 18057  }
 18058  func rewriteValue_OpARM64VMOVDins0(v *ssa.Value) bool {
 18059  	v_1 := v.Args[1]
 18060  	v_0 := v.Args[0]
 18061  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VFCVTN2D y)))
 18062  	// result: (VFCVTN2_2D dst y)
 18063  	for {
 18064  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18065  			break
 18066  		}
 18067  		dst := v_0
 18068  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18069  			break
 18070  		}
 18071  		v_1_0 := v_1.Args[0]
 18072  		if v_1_0.Op != ssaop.OpARM64VFCVTN2D {
 18073  			break
 18074  		}
 18075  		y := v_1_0.Args[0]
 18076  		v.Reset(ssaop.OpARM64VFCVTN2_2D)
 18077  		v.AddArg2(dst, y)
 18078  		return true
 18079  	}
 18080  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN2D [c] y)))
 18081  	// result: (VSHRN2_2D dst [c] y)
 18082  	for {
 18083  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18084  			break
 18085  		}
 18086  		dst := v_0
 18087  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18088  			break
 18089  		}
 18090  		v_1_0 := v_1.Args[0]
 18091  		if v_1_0.Op != ssaop.OpARM64VSHRN2D {
 18092  			break
 18093  		}
 18094  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18095  		y := v_1_0.Args[0]
 18096  		v.Reset(ssaop.OpARM64VSHRN2_2D)
 18097  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18098  		v.AddArg2(dst, y)
 18099  		return true
 18100  	}
 18101  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN4S [c] y)))
 18102  	// result: (VSHRN2_4S dst [c] y)
 18103  	for {
 18104  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18105  			break
 18106  		}
 18107  		dst := v_0
 18108  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18109  			break
 18110  		}
 18111  		v_1_0 := v_1.Args[0]
 18112  		if v_1_0.Op != ssaop.OpARM64VSHRN4S {
 18113  			break
 18114  		}
 18115  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18116  		y := v_1_0.Args[0]
 18117  		v.Reset(ssaop.OpARM64VSHRN2_4S)
 18118  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18119  		v.AddArg2(dst, y)
 18120  		return true
 18121  	}
 18122  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN8H [c] y)))
 18123  	// result: (VSHRN2_8H dst [c] y)
 18124  	for {
 18125  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18126  			break
 18127  		}
 18128  		dst := v_0
 18129  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18130  			break
 18131  		}
 18132  		v_1_0 := v_1.Args[0]
 18133  		if v_1_0.Op != ssaop.OpARM64VSHRN8H {
 18134  			break
 18135  		}
 18136  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18137  		y := v_1_0.Args[0]
 18138  		v.Reset(ssaop.OpARM64VSHRN2_8H)
 18139  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18140  		v.AddArg2(dst, y)
 18141  		return true
 18142  	}
 18143  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN2D y)))
 18144  	// result: (VSQXTN2_2D dst y)
 18145  	for {
 18146  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18147  			break
 18148  		}
 18149  		dst := v_0
 18150  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18151  			break
 18152  		}
 18153  		v_1_0 := v_1.Args[0]
 18154  		if v_1_0.Op != ssaop.OpARM64VSQXTN2D {
 18155  			break
 18156  		}
 18157  		y := v_1_0.Args[0]
 18158  		v.Reset(ssaop.OpARM64VSQXTN2_2D)
 18159  		v.AddArg2(dst, y)
 18160  		return true
 18161  	}
 18162  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN4S y)))
 18163  	// result: (VSQXTN2_4S dst y)
 18164  	for {
 18165  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18166  			break
 18167  		}
 18168  		dst := v_0
 18169  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18170  			break
 18171  		}
 18172  		v_1_0 := v_1.Args[0]
 18173  		if v_1_0.Op != ssaop.OpARM64VSQXTN4S {
 18174  			break
 18175  		}
 18176  		y := v_1_0.Args[0]
 18177  		v.Reset(ssaop.OpARM64VSQXTN2_4S)
 18178  		v.AddArg2(dst, y)
 18179  		return true
 18180  	}
 18181  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN8H y)))
 18182  	// result: (VSQXTN2_8H dst y)
 18183  	for {
 18184  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18185  			break
 18186  		}
 18187  		dst := v_0
 18188  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18189  			break
 18190  		}
 18191  		v_1_0 := v_1.Args[0]
 18192  		if v_1_0.Op != ssaop.OpARM64VSQXTN8H {
 18193  			break
 18194  		}
 18195  		y := v_1_0.Args[0]
 18196  		v.Reset(ssaop.OpARM64VSQXTN2_8H)
 18197  		v.AddArg2(dst, y)
 18198  		return true
 18199  	}
 18200  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN2D y)))
 18201  	// result: (VSQXTUN2_2D dst y)
 18202  	for {
 18203  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18204  			break
 18205  		}
 18206  		dst := v_0
 18207  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18208  			break
 18209  		}
 18210  		v_1_0 := v_1.Args[0]
 18211  		if v_1_0.Op != ssaop.OpARM64VSQXTUN2D {
 18212  			break
 18213  		}
 18214  		y := v_1_0.Args[0]
 18215  		v.Reset(ssaop.OpARM64VSQXTUN2_2D)
 18216  		v.AddArg2(dst, y)
 18217  		return true
 18218  	}
 18219  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN4S y)))
 18220  	// result: (VSQXTUN2_4S dst y)
 18221  	for {
 18222  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18223  			break
 18224  		}
 18225  		dst := v_0
 18226  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18227  			break
 18228  		}
 18229  		v_1_0 := v_1.Args[0]
 18230  		if v_1_0.Op != ssaop.OpARM64VSQXTUN4S {
 18231  			break
 18232  		}
 18233  		y := v_1_0.Args[0]
 18234  		v.Reset(ssaop.OpARM64VSQXTUN2_4S)
 18235  		v.AddArg2(dst, y)
 18236  		return true
 18237  	}
 18238  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN8H y)))
 18239  	// result: (VSQXTUN2_8H dst y)
 18240  	for {
 18241  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18242  			break
 18243  		}
 18244  		dst := v_0
 18245  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18246  			break
 18247  		}
 18248  		v_1_0 := v_1.Args[0]
 18249  		if v_1_0.Op != ssaop.OpARM64VSQXTUN8H {
 18250  			break
 18251  		}
 18252  		y := v_1_0.Args[0]
 18253  		v.Reset(ssaop.OpARM64VSQXTUN2_8H)
 18254  		v.AddArg2(dst, y)
 18255  		return true
 18256  	}
 18257  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN2D y)))
 18258  	// result: (VUQXTN2_2D dst y)
 18259  	for {
 18260  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18261  			break
 18262  		}
 18263  		dst := v_0
 18264  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18265  			break
 18266  		}
 18267  		v_1_0 := v_1.Args[0]
 18268  		if v_1_0.Op != ssaop.OpARM64VUQXTN2D {
 18269  			break
 18270  		}
 18271  		y := v_1_0.Args[0]
 18272  		v.Reset(ssaop.OpARM64VUQXTN2_2D)
 18273  		v.AddArg2(dst, y)
 18274  		return true
 18275  	}
 18276  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN4S y)))
 18277  	// result: (VUQXTN2_4S dst y)
 18278  	for {
 18279  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18280  			break
 18281  		}
 18282  		dst := v_0
 18283  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18284  			break
 18285  		}
 18286  		v_1_0 := v_1.Args[0]
 18287  		if v_1_0.Op != ssaop.OpARM64VUQXTN4S {
 18288  			break
 18289  		}
 18290  		y := v_1_0.Args[0]
 18291  		v.Reset(ssaop.OpARM64VUQXTN2_4S)
 18292  		v.AddArg2(dst, y)
 18293  		return true
 18294  	}
 18295  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN8H y)))
 18296  	// result: (VUQXTN2_8H dst y)
 18297  	for {
 18298  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18299  			break
 18300  		}
 18301  		dst := v_0
 18302  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18303  			break
 18304  		}
 18305  		v_1_0 := v_1.Args[0]
 18306  		if v_1_0.Op != ssaop.OpARM64VUQXTN8H {
 18307  			break
 18308  		}
 18309  		y := v_1_0.Args[0]
 18310  		v.Reset(ssaop.OpARM64VUQXTN2_8H)
 18311  		v.AddArg2(dst, y)
 18312  		return true
 18313  	}
 18314  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN2D y)))
 18315  	// result: (VXTN2_2D dst y)
 18316  	for {
 18317  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18318  			break
 18319  		}
 18320  		dst := v_0
 18321  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18322  			break
 18323  		}
 18324  		v_1_0 := v_1.Args[0]
 18325  		if v_1_0.Op != ssaop.OpARM64VXTN2D {
 18326  			break
 18327  		}
 18328  		y := v_1_0.Args[0]
 18329  		v.Reset(ssaop.OpARM64VXTN2_2D)
 18330  		v.AddArg2(dst, y)
 18331  		return true
 18332  	}
 18333  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN4S y)))
 18334  	// result: (VXTN2_4S dst y)
 18335  	for {
 18336  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18337  			break
 18338  		}
 18339  		dst := v_0
 18340  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18341  			break
 18342  		}
 18343  		v_1_0 := v_1.Args[0]
 18344  		if v_1_0.Op != ssaop.OpARM64VXTN4S {
 18345  			break
 18346  		}
 18347  		y := v_1_0.Args[0]
 18348  		v.Reset(ssaop.OpARM64VXTN2_4S)
 18349  		v.AddArg2(dst, y)
 18350  		return true
 18351  	}
 18352  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN8H y)))
 18353  	// result: (VXTN2_8H dst y)
 18354  	for {
 18355  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18356  			break
 18357  		}
 18358  		dst := v_0
 18359  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18360  			break
 18361  		}
 18362  		v_1_0 := v_1.Args[0]
 18363  		if v_1_0.Op != ssaop.OpARM64VXTN8H {
 18364  			break
 18365  		}
 18366  		y := v_1_0.Args[0]
 18367  		v.Reset(ssaop.OpARM64VXTN2_8H)
 18368  		v.AddArg2(dst, y)
 18369  		return true
 18370  	}
 18371  	// match: (VMOVDins0 [0] (VMOVI16B [0]) y:(VDUPDextr [i] _))
 18372  	// result: y
 18373  	for {
 18374  		if ssa.AuxIntToUint8(v.AuxInt) != 0 || v_0.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 18375  			break
 18376  		}
 18377  		y := v_1
 18378  		if y.Op != ssaop.OpARM64VDUPDextr {
 18379  			break
 18380  		}
 18381  		v.CopyOf(y)
 18382  		return true
 18383  	}
 18384  	return false
 18385  }
 18386  func rewriteValue_OpARM64VMOVSins0(v *ssa.Value) bool {
 18387  	v_1 := v.Args[1]
 18388  	v_0 := v.Args[0]
 18389  	// match: (VMOVSins0 [0] (VMOVI16B [0]) y:(VDUPSextr [i] _))
 18390  	// result: y
 18391  	for {
 18392  		if ssa.AuxIntToUint8(v.AuxInt) != 0 || v_0.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 18393  			break
 18394  		}
 18395  		y := v_1
 18396  		if y.Op != ssaop.OpARM64VDUPSextr {
 18397  			break
 18398  		}
 18399  		v.CopyOf(y)
 18400  		return true
 18401  	}
 18402  	return false
 18403  }
 18404  func rewriteValue_OpARM64VPMULL2D(v *ssa.Value) bool {
 18405  	v_1 := v.Args[1]
 18406  	v_0 := v.Args[0]
 18407  	// match: (VPMULL2D (VDUPDextr [1] x) (VDUPDextr [1] y))
 18408  	// result: (VPMULL2_2D x y)
 18409  	for {
 18410  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18411  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18412  				continue
 18413  			}
 18414  			x := v_0.Args[0]
 18415  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18416  				continue
 18417  			}
 18418  			y := v_1.Args[0]
 18419  			v.Reset(ssaop.OpARM64VPMULL2_2D)
 18420  			v.AddArg2(x, y)
 18421  			return true
 18422  		}
 18423  		break
 18424  	}
 18425  	return false
 18426  }
 18427  func rewriteValue_OpARM64VSHL16B(v *ssa.Value) bool {
 18428  	v_0 := v.Args[0]
 18429  	// match: (VSHL16B [a] x)
 18430  	// cond: a==0
 18431  	// result: x
 18432  	for {
 18433  		a := ssa.AuxIntToUint8(v.AuxInt)
 18434  		x := v_0
 18435  		if !(a == 0) {
 18436  			break
 18437  		}
 18438  		v.CopyOf(x)
 18439  		return true
 18440  	}
 18441  	return false
 18442  }
 18443  func rewriteValue_OpARM64VSHL2D(v *ssa.Value) bool {
 18444  	v_0 := v.Args[0]
 18445  	// match: (VSHL2D [a] x)
 18446  	// cond: a==0
 18447  	// result: x
 18448  	for {
 18449  		a := ssa.AuxIntToUint8(v.AuxInt)
 18450  		x := v_0
 18451  		if !(a == 0) {
 18452  			break
 18453  		}
 18454  		v.CopyOf(x)
 18455  		return true
 18456  	}
 18457  	return false
 18458  }
 18459  func rewriteValue_OpARM64VSHL4S(v *ssa.Value) bool {
 18460  	v_0 := v.Args[0]
 18461  	// match: (VSHL4S [a] x)
 18462  	// cond: a==0
 18463  	// result: x
 18464  	for {
 18465  		a := ssa.AuxIntToUint8(v.AuxInt)
 18466  		x := v_0
 18467  		if !(a == 0) {
 18468  			break
 18469  		}
 18470  		v.CopyOf(x)
 18471  		return true
 18472  	}
 18473  	return false
 18474  }
 18475  func rewriteValue_OpARM64VSHL8H(v *ssa.Value) bool {
 18476  	v_0 := v.Args[0]
 18477  	// match: (VSHL8H [a] x)
 18478  	// cond: a==0
 18479  	// result: x
 18480  	for {
 18481  		a := ssa.AuxIntToUint8(v.AuxInt)
 18482  		x := v_0
 18483  		if !(a == 0) {
 18484  			break
 18485  		}
 18486  		v.CopyOf(x)
 18487  		return true
 18488  	}
 18489  	return false
 18490  }
 18491  func rewriteValue_OpARM64VSHRN2D(v *ssa.Value) bool {
 18492  	v_0 := v.Args[0]
 18493  	// match: (VSHRN2D [0] x)
 18494  	// result: (VXTN2D x)
 18495  	for {
 18496  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 18497  			break
 18498  		}
 18499  		x := v_0
 18500  		v.Reset(ssaop.OpARM64VXTN2D)
 18501  		v.AddArg(x)
 18502  		return true
 18503  	}
 18504  	return false
 18505  }
 18506  func rewriteValue_OpARM64VSHRN4S(v *ssa.Value) bool {
 18507  	v_0 := v.Args[0]
 18508  	// match: (VSHRN4S [0] x)
 18509  	// result: (VXTN4S x)
 18510  	for {
 18511  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 18512  			break
 18513  		}
 18514  		x := v_0
 18515  		v.Reset(ssaop.OpARM64VXTN4S)
 18516  		v.AddArg(x)
 18517  		return true
 18518  	}
 18519  	return false
 18520  }
 18521  func rewriteValue_OpARM64VSHRN8H(v *ssa.Value) bool {
 18522  	v_0 := v.Args[0]
 18523  	// match: (VSHRN8H [0] x)
 18524  	// result: (VXTN8H x)
 18525  	for {
 18526  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 18527  			break
 18528  		}
 18529  		x := v_0
 18530  		v.Reset(ssaop.OpARM64VXTN8H)
 18531  		v.AddArg(x)
 18532  		return true
 18533  	}
 18534  	return false
 18535  }
 18536  func rewriteValue_OpARM64VSMULL16B(v *ssa.Value) bool {
 18537  	v_1 := v.Args[1]
 18538  	v_0 := v.Args[0]
 18539  	// match: (VSMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y))
 18540  	// result: (VSMULL2_16B x y)
 18541  	for {
 18542  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18543  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18544  				continue
 18545  			}
 18546  			x := v_0.Args[0]
 18547  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18548  				continue
 18549  			}
 18550  			y := v_1.Args[0]
 18551  			v.Reset(ssaop.OpARM64VSMULL2_16B)
 18552  			v.AddArg2(x, y)
 18553  			return true
 18554  		}
 18555  		break
 18556  	}
 18557  	return false
 18558  }
 18559  func rewriteValue_OpARM64VSMULL4S(v *ssa.Value) bool {
 18560  	v_1 := v.Args[1]
 18561  	v_0 := v.Args[0]
 18562  	// match: (VSMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y))
 18563  	// result: (VSMULL2_4S x y)
 18564  	for {
 18565  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18566  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18567  				continue
 18568  			}
 18569  			x := v_0.Args[0]
 18570  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18571  				continue
 18572  			}
 18573  			y := v_1.Args[0]
 18574  			v.Reset(ssaop.OpARM64VSMULL2_4S)
 18575  			v.AddArg2(x, y)
 18576  			return true
 18577  		}
 18578  		break
 18579  	}
 18580  	return false
 18581  }
 18582  func rewriteValue_OpARM64VSMULL8H(v *ssa.Value) bool {
 18583  	v_1 := v.Args[1]
 18584  	v_0 := v.Args[0]
 18585  	// match: (VSMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y))
 18586  	// result: (VSMULL2_8H x y)
 18587  	for {
 18588  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18589  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18590  				continue
 18591  			}
 18592  			x := v_0.Args[0]
 18593  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18594  				continue
 18595  			}
 18596  			y := v_1.Args[0]
 18597  			v.Reset(ssaop.OpARM64VSMULL2_8H)
 18598  			v.AddArg2(x, y)
 18599  			return true
 18600  		}
 18601  		break
 18602  	}
 18603  	return false
 18604  }
 18605  func rewriteValue_OpARM64VSQSHL16Bconst(v *ssa.Value) bool {
 18606  	v_0 := v.Args[0]
 18607  	// match: (VSQSHL16Bconst [a] x)
 18608  	// cond: a==0
 18609  	// result: x
 18610  	for {
 18611  		a := ssa.AuxIntToUint8(v.AuxInt)
 18612  		x := v_0
 18613  		if !(a == 0) {
 18614  			break
 18615  		}
 18616  		v.CopyOf(x)
 18617  		return true
 18618  	}
 18619  	return false
 18620  }
 18621  func rewriteValue_OpARM64VSQSHL2Dconst(v *ssa.Value) bool {
 18622  	v_0 := v.Args[0]
 18623  	// match: (VSQSHL2Dconst [a] x)
 18624  	// cond: a==0
 18625  	// result: x
 18626  	for {
 18627  		a := ssa.AuxIntToUint8(v.AuxInt)
 18628  		x := v_0
 18629  		if !(a == 0) {
 18630  			break
 18631  		}
 18632  		v.CopyOf(x)
 18633  		return true
 18634  	}
 18635  	return false
 18636  }
 18637  func rewriteValue_OpARM64VSQSHL4Sconst(v *ssa.Value) bool {
 18638  	v_0 := v.Args[0]
 18639  	// match: (VSQSHL4Sconst [a] x)
 18640  	// cond: a==0
 18641  	// result: x
 18642  	for {
 18643  		a := ssa.AuxIntToUint8(v.AuxInt)
 18644  		x := v_0
 18645  		if !(a == 0) {
 18646  			break
 18647  		}
 18648  		v.CopyOf(x)
 18649  		return true
 18650  	}
 18651  	return false
 18652  }
 18653  func rewriteValue_OpARM64VSQSHL8Hconst(v *ssa.Value) bool {
 18654  	v_0 := v.Args[0]
 18655  	// match: (VSQSHL8Hconst [a] x)
 18656  	// cond: a==0
 18657  	// result: x
 18658  	for {
 18659  		a := ssa.AuxIntToUint8(v.AuxInt)
 18660  		x := v_0
 18661  		if !(a == 0) {
 18662  			break
 18663  		}
 18664  		v.CopyOf(x)
 18665  		return true
 18666  	}
 18667  	return false
 18668  }
 18669  func rewriteValue_OpARM64VSSHLL16B(v *ssa.Value) bool {
 18670  	v_0 := v.Args[0]
 18671  	// match: (VSSHLL16B [a] (VDUPDextr [1] x))
 18672  	// result: (VSSHLL2_16B [a] x)
 18673  	for {
 18674  		a := ssa.AuxIntToUint8(v.AuxInt)
 18675  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18676  			break
 18677  		}
 18678  		x := v_0.Args[0]
 18679  		v.Reset(ssaop.OpARM64VSSHLL2_16B)
 18680  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 18681  		v.AddArg(x)
 18682  		return true
 18683  	}
 18684  	return false
 18685  }
 18686  func rewriteValue_OpARM64VSSHLL4S(v *ssa.Value) bool {
 18687  	v_0 := v.Args[0]
 18688  	// match: (VSSHLL4S [a] (VDUPDextr [1] x))
 18689  	// result: (VSSHLL2_4S [a] x)
 18690  	for {
 18691  		a := ssa.AuxIntToUint8(v.AuxInt)
 18692  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18693  			break
 18694  		}
 18695  		x := v_0.Args[0]
 18696  		v.Reset(ssaop.OpARM64VSSHLL2_4S)
 18697  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 18698  		v.AddArg(x)
 18699  		return true
 18700  	}
 18701  	return false
 18702  }
 18703  func rewriteValue_OpARM64VSSHLL8H(v *ssa.Value) bool {
 18704  	v_0 := v.Args[0]
 18705  	// match: (VSSHLL8H [a] (VDUPDextr [1] x))
 18706  	// result: (VSSHLL2_8H [a] x)
 18707  	for {
 18708  		a := ssa.AuxIntToUint8(v.AuxInt)
 18709  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18710  			break
 18711  		}
 18712  		x := v_0.Args[0]
 18713  		v.Reset(ssaop.OpARM64VSSHLL2_8H)
 18714  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 18715  		v.AddArg(x)
 18716  		return true
 18717  	}
 18718  	return false
 18719  }
 18720  func rewriteValue_OpARM64VSSHR16B(v *ssa.Value) bool {
 18721  	v_0 := v.Args[0]
 18722  	// match: (VSSHR16B [a] x)
 18723  	// cond: a==0
 18724  	// result: x
 18725  	for {
 18726  		a := ssa.AuxIntToUint8(v.AuxInt)
 18727  		x := v_0
 18728  		if !(a == 0) {
 18729  			break
 18730  		}
 18731  		v.CopyOf(x)
 18732  		return true
 18733  	}
 18734  	return false
 18735  }
 18736  func rewriteValue_OpARM64VSSHR2D(v *ssa.Value) bool {
 18737  	v_0 := v.Args[0]
 18738  	// match: (VSSHR2D [a] x)
 18739  	// cond: a==0
 18740  	// result: x
 18741  	for {
 18742  		a := ssa.AuxIntToUint8(v.AuxInt)
 18743  		x := v_0
 18744  		if !(a == 0) {
 18745  			break
 18746  		}
 18747  		v.CopyOf(x)
 18748  		return true
 18749  	}
 18750  	return false
 18751  }
 18752  func rewriteValue_OpARM64VSSHR4S(v *ssa.Value) bool {
 18753  	v_0 := v.Args[0]
 18754  	// match: (VSSHR4S [a] x)
 18755  	// cond: a==0
 18756  	// result: x
 18757  	for {
 18758  		a := ssa.AuxIntToUint8(v.AuxInt)
 18759  		x := v_0
 18760  		if !(a == 0) {
 18761  			break
 18762  		}
 18763  		v.CopyOf(x)
 18764  		return true
 18765  	}
 18766  	return false
 18767  }
 18768  func rewriteValue_OpARM64VSSHR8H(v *ssa.Value) bool {
 18769  	v_0 := v.Args[0]
 18770  	// match: (VSSHR8H [a] x)
 18771  	// cond: a==0
 18772  	// result: x
 18773  	for {
 18774  		a := ssa.AuxIntToUint8(v.AuxInt)
 18775  		x := v_0
 18776  		if !(a == 0) {
 18777  			break
 18778  		}
 18779  		v.CopyOf(x)
 18780  		return true
 18781  	}
 18782  	return false
 18783  }
 18784  func rewriteValue_OpARM64VSXTL16B(v *ssa.Value) bool {
 18785  	v_0 := v.Args[0]
 18786  	// match: (VSXTL16B (VDUPDextr [1] x))
 18787  	// result: (VSXTL2_16B x)
 18788  	for {
 18789  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18790  			break
 18791  		}
 18792  		x := v_0.Args[0]
 18793  		v.Reset(ssaop.OpARM64VSXTL2_16B)
 18794  		v.AddArg(x)
 18795  		return true
 18796  	}
 18797  	return false
 18798  }
 18799  func rewriteValue_OpARM64VSXTL4S(v *ssa.Value) bool {
 18800  	v_0 := v.Args[0]
 18801  	// match: (VSXTL4S (VDUPDextr [1] x))
 18802  	// result: (VSXTL2_4S x)
 18803  	for {
 18804  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18805  			break
 18806  		}
 18807  		x := v_0.Args[0]
 18808  		v.Reset(ssaop.OpARM64VSXTL2_4S)
 18809  		v.AddArg(x)
 18810  		return true
 18811  	}
 18812  	return false
 18813  }
 18814  func rewriteValue_OpARM64VSXTL8H(v *ssa.Value) bool {
 18815  	v_0 := v.Args[0]
 18816  	// match: (VSXTL8H (VDUPDextr [1] x))
 18817  	// result: (VSXTL2_8H x)
 18818  	for {
 18819  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18820  			break
 18821  		}
 18822  		x := v_0.Args[0]
 18823  		v.Reset(ssaop.OpARM64VSXTL2_8H)
 18824  		v.AddArg(x)
 18825  		return true
 18826  	}
 18827  	return false
 18828  }
 18829  func rewriteValue_OpARM64VUMULL16B(v *ssa.Value) bool {
 18830  	v_1 := v.Args[1]
 18831  	v_0 := v.Args[0]
 18832  	// match: (VUMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y))
 18833  	// result: (VUMULL2_16B x y)
 18834  	for {
 18835  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18836  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18837  				continue
 18838  			}
 18839  			x := v_0.Args[0]
 18840  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18841  				continue
 18842  			}
 18843  			y := v_1.Args[0]
 18844  			v.Reset(ssaop.OpARM64VUMULL2_16B)
 18845  			v.AddArg2(x, y)
 18846  			return true
 18847  		}
 18848  		break
 18849  	}
 18850  	return false
 18851  }
 18852  func rewriteValue_OpARM64VUMULL4S(v *ssa.Value) bool {
 18853  	v_1 := v.Args[1]
 18854  	v_0 := v.Args[0]
 18855  	// match: (VUMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y))
 18856  	// result: (VUMULL2_4S x y)
 18857  	for {
 18858  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18859  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18860  				continue
 18861  			}
 18862  			x := v_0.Args[0]
 18863  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18864  				continue
 18865  			}
 18866  			y := v_1.Args[0]
 18867  			v.Reset(ssaop.OpARM64VUMULL2_4S)
 18868  			v.AddArg2(x, y)
 18869  			return true
 18870  		}
 18871  		break
 18872  	}
 18873  	return false
 18874  }
 18875  func rewriteValue_OpARM64VUMULL8H(v *ssa.Value) bool {
 18876  	v_1 := v.Args[1]
 18877  	v_0 := v.Args[0]
 18878  	// match: (VUMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y))
 18879  	// result: (VUMULL2_8H x y)
 18880  	for {
 18881  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18882  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18883  				continue
 18884  			}
 18885  			x := v_0.Args[0]
 18886  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18887  				continue
 18888  			}
 18889  			y := v_1.Args[0]
 18890  			v.Reset(ssaop.OpARM64VUMULL2_8H)
 18891  			v.AddArg2(x, y)
 18892  			return true
 18893  		}
 18894  		break
 18895  	}
 18896  	return false
 18897  }
 18898  func rewriteValue_OpARM64VUQSHL16Bconst(v *ssa.Value) bool {
 18899  	v_0 := v.Args[0]
 18900  	// match: (VUQSHL16Bconst [a] x)
 18901  	// cond: a==0
 18902  	// result: x
 18903  	for {
 18904  		a := ssa.AuxIntToUint8(v.AuxInt)
 18905  		x := v_0
 18906  		if !(a == 0) {
 18907  			break
 18908  		}
 18909  		v.CopyOf(x)
 18910  		return true
 18911  	}
 18912  	return false
 18913  }
 18914  func rewriteValue_OpARM64VUQSHL2Dconst(v *ssa.Value) bool {
 18915  	v_0 := v.Args[0]
 18916  	// match: (VUQSHL2Dconst [a] x)
 18917  	// cond: a==0
 18918  	// result: x
 18919  	for {
 18920  		a := ssa.AuxIntToUint8(v.AuxInt)
 18921  		x := v_0
 18922  		if !(a == 0) {
 18923  			break
 18924  		}
 18925  		v.CopyOf(x)
 18926  		return true
 18927  	}
 18928  	return false
 18929  }
 18930  func rewriteValue_OpARM64VUQSHL4Sconst(v *ssa.Value) bool {
 18931  	v_0 := v.Args[0]
 18932  	// match: (VUQSHL4Sconst [a] x)
 18933  	// cond: a==0
 18934  	// result: x
 18935  	for {
 18936  		a := ssa.AuxIntToUint8(v.AuxInt)
 18937  		x := v_0
 18938  		if !(a == 0) {
 18939  			break
 18940  		}
 18941  		v.CopyOf(x)
 18942  		return true
 18943  	}
 18944  	return false
 18945  }
 18946  func rewriteValue_OpARM64VUQSHL8Hconst(v *ssa.Value) bool {
 18947  	v_0 := v.Args[0]
 18948  	// match: (VUQSHL8Hconst [a] x)
 18949  	// cond: a==0
 18950  	// result: x
 18951  	for {
 18952  		a := ssa.AuxIntToUint8(v.AuxInt)
 18953  		x := v_0
 18954  		if !(a == 0) {
 18955  			break
 18956  		}
 18957  		v.CopyOf(x)
 18958  		return true
 18959  	}
 18960  	return false
 18961  }
 18962  func rewriteValue_OpARM64VUSHLL16B(v *ssa.Value) bool {
 18963  	v_0 := v.Args[0]
 18964  	// match: (VUSHLL16B [a] (VDUPDextr [1] x))
 18965  	// result: (VUSHLL2_16B [a] x)
 18966  	for {
 18967  		a := ssa.AuxIntToUint8(v.AuxInt)
 18968  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18969  			break
 18970  		}
 18971  		x := v_0.Args[0]
 18972  		v.Reset(ssaop.OpARM64VUSHLL2_16B)
 18973  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 18974  		v.AddArg(x)
 18975  		return true
 18976  	}
 18977  	return false
 18978  }
 18979  func rewriteValue_OpARM64VUSHLL4S(v *ssa.Value) bool {
 18980  	v_0 := v.Args[0]
 18981  	// match: (VUSHLL4S [a] (VDUPDextr [1] x))
 18982  	// result: (VUSHLL2_4S [a] x)
 18983  	for {
 18984  		a := ssa.AuxIntToUint8(v.AuxInt)
 18985  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18986  			break
 18987  		}
 18988  		x := v_0.Args[0]
 18989  		v.Reset(ssaop.OpARM64VUSHLL2_4S)
 18990  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 18991  		v.AddArg(x)
 18992  		return true
 18993  	}
 18994  	return false
 18995  }
 18996  func rewriteValue_OpARM64VUSHLL8H(v *ssa.Value) bool {
 18997  	v_0 := v.Args[0]
 18998  	// match: (VUSHLL8H [a] (VDUPDextr [1] x))
 18999  	// result: (VUSHLL2_8H [a] x)
 19000  	for {
 19001  		a := ssa.AuxIntToUint8(v.AuxInt)
 19002  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19003  			break
 19004  		}
 19005  		x := v_0.Args[0]
 19006  		v.Reset(ssaop.OpARM64VUSHLL2_8H)
 19007  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19008  		v.AddArg(x)
 19009  		return true
 19010  	}
 19011  	return false
 19012  }
 19013  func rewriteValue_OpARM64VUSHR16B(v *ssa.Value) bool {
 19014  	v_0 := v.Args[0]
 19015  	// match: (VUSHR16B [a] x)
 19016  	// cond: a==0
 19017  	// result: x
 19018  	for {
 19019  		a := ssa.AuxIntToUint8(v.AuxInt)
 19020  		x := v_0
 19021  		if !(a == 0) {
 19022  			break
 19023  		}
 19024  		v.CopyOf(x)
 19025  		return true
 19026  	}
 19027  	return false
 19028  }
 19029  func rewriteValue_OpARM64VUSHR2D(v *ssa.Value) bool {
 19030  	v_0 := v.Args[0]
 19031  	// match: (VUSHR2D [a] x)
 19032  	// cond: a==0
 19033  	// result: x
 19034  	for {
 19035  		a := ssa.AuxIntToUint8(v.AuxInt)
 19036  		x := v_0
 19037  		if !(a == 0) {
 19038  			break
 19039  		}
 19040  		v.CopyOf(x)
 19041  		return true
 19042  	}
 19043  	return false
 19044  }
 19045  func rewriteValue_OpARM64VUSHR4S(v *ssa.Value) bool {
 19046  	v_0 := v.Args[0]
 19047  	// match: (VUSHR4S [a] x)
 19048  	// cond: a==0
 19049  	// result: x
 19050  	for {
 19051  		a := ssa.AuxIntToUint8(v.AuxInt)
 19052  		x := v_0
 19053  		if !(a == 0) {
 19054  			break
 19055  		}
 19056  		v.CopyOf(x)
 19057  		return true
 19058  	}
 19059  	return false
 19060  }
 19061  func rewriteValue_OpARM64VUSHR8H(v *ssa.Value) bool {
 19062  	v_0 := v.Args[0]
 19063  	// match: (VUSHR8H [a] x)
 19064  	// cond: a==0
 19065  	// result: x
 19066  	for {
 19067  		a := ssa.AuxIntToUint8(v.AuxInt)
 19068  		x := v_0
 19069  		if !(a == 0) {
 19070  			break
 19071  		}
 19072  		v.CopyOf(x)
 19073  		return true
 19074  	}
 19075  	return false
 19076  }
 19077  func rewriteValue_OpARM64VUXTL16B(v *ssa.Value) bool {
 19078  	v_0 := v.Args[0]
 19079  	// match: (VUXTL16B (VDUPDextr [1] x))
 19080  	// result: (VUXTL2_16B x)
 19081  	for {
 19082  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19083  			break
 19084  		}
 19085  		x := v_0.Args[0]
 19086  		v.Reset(ssaop.OpARM64VUXTL2_16B)
 19087  		v.AddArg(x)
 19088  		return true
 19089  	}
 19090  	return false
 19091  }
 19092  func rewriteValue_OpARM64VUXTL4S(v *ssa.Value) bool {
 19093  	v_0 := v.Args[0]
 19094  	// match: (VUXTL4S (VDUPDextr [1] x))
 19095  	// result: (VUXTL2_4S x)
 19096  	for {
 19097  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19098  			break
 19099  		}
 19100  		x := v_0.Args[0]
 19101  		v.Reset(ssaop.OpARM64VUXTL2_4S)
 19102  		v.AddArg(x)
 19103  		return true
 19104  	}
 19105  	return false
 19106  }
 19107  func rewriteValue_OpARM64VUXTL8H(v *ssa.Value) bool {
 19108  	v_0 := v.Args[0]
 19109  	// match: (VUXTL8H (VDUPDextr [1] x))
 19110  	// result: (VUXTL2_8H x)
 19111  	for {
 19112  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19113  			break
 19114  		}
 19115  		x := v_0.Args[0]
 19116  		v.Reset(ssaop.OpARM64VUXTL2_8H)
 19117  		v.AddArg(x)
 19118  		return true
 19119  	}
 19120  	return false
 19121  }
 19122  func rewriteValue_OpARM64XOR(v *ssa.Value) bool {
 19123  	v_1 := v.Args[1]
 19124  	v_0 := v.Args[0]
 19125  	// match: (XOR x (MOVDconst [c]))
 19126  	// result: (XORconst [c] x)
 19127  	for {
 19128  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19129  			x := v_0
 19130  			if v_1.Op != ssaop.OpARM64MOVDconst {
 19131  				continue
 19132  			}
 19133  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 19134  			v.Reset(ssaop.OpARM64XORconst)
 19135  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19136  			v.AddArg(x)
 19137  			return true
 19138  		}
 19139  		break
 19140  	}
 19141  	// match: (XOR x x)
 19142  	// result: (MOVDconst [0])
 19143  	for {
 19144  		x := v_0
 19145  		if x != v_1 {
 19146  			break
 19147  		}
 19148  		v.Reset(ssaop.OpARM64MOVDconst)
 19149  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19150  		return true
 19151  	}
 19152  	// match: (XOR x (MVN y))
 19153  	// result: (EON x y)
 19154  	for {
 19155  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19156  			x := v_0
 19157  			if v_1.Op != ssaop.OpARM64MVN {
 19158  				continue
 19159  			}
 19160  			y := v_1.Args[0]
 19161  			v.Reset(ssaop.OpARM64EON)
 19162  			v.AddArg2(x, y)
 19163  			return true
 19164  		}
 19165  		break
 19166  	}
 19167  	// match: (XOR x0 x1:(SLLconst [c] y))
 19168  	// cond: ssa.ClobberIfDead(x1)
 19169  	// result: (XORshiftLL x0 y [c])
 19170  	for {
 19171  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19172  			x0 := v_0
 19173  			x1 := v_1
 19174  			if x1.Op != ssaop.OpARM64SLLconst {
 19175  				continue
 19176  			}
 19177  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19178  			y := x1.Args[0]
 19179  			if !(ssa.ClobberIfDead(x1)) {
 19180  				continue
 19181  			}
 19182  			v.Reset(ssaop.OpARM64XORshiftLL)
 19183  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19184  			v.AddArg2(x0, y)
 19185  			return true
 19186  		}
 19187  		break
 19188  	}
 19189  	// match: (XOR x0 x1:(SRLconst [c] y))
 19190  	// cond: ssa.ClobberIfDead(x1)
 19191  	// result: (XORshiftRL x0 y [c])
 19192  	for {
 19193  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19194  			x0 := v_0
 19195  			x1 := v_1
 19196  			if x1.Op != ssaop.OpARM64SRLconst {
 19197  				continue
 19198  			}
 19199  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19200  			y := x1.Args[0]
 19201  			if !(ssa.ClobberIfDead(x1)) {
 19202  				continue
 19203  			}
 19204  			v.Reset(ssaop.OpARM64XORshiftRL)
 19205  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19206  			v.AddArg2(x0, y)
 19207  			return true
 19208  		}
 19209  		break
 19210  	}
 19211  	// match: (XOR x0 x1:(SRAconst [c] y))
 19212  	// cond: ssa.ClobberIfDead(x1)
 19213  	// result: (XORshiftRA x0 y [c])
 19214  	for {
 19215  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19216  			x0 := v_0
 19217  			x1 := v_1
 19218  			if x1.Op != ssaop.OpARM64SRAconst {
 19219  				continue
 19220  			}
 19221  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19222  			y := x1.Args[0]
 19223  			if !(ssa.ClobberIfDead(x1)) {
 19224  				continue
 19225  			}
 19226  			v.Reset(ssaop.OpARM64XORshiftRA)
 19227  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19228  			v.AddArg2(x0, y)
 19229  			return true
 19230  		}
 19231  		break
 19232  	}
 19233  	// match: (XOR x0 x1:(RORconst [c] y))
 19234  	// cond: ssa.ClobberIfDead(x1)
 19235  	// result: (XORshiftRO x0 y [c])
 19236  	for {
 19237  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19238  			x0 := v_0
 19239  			x1 := v_1
 19240  			if x1.Op != ssaop.OpARM64RORconst {
 19241  				continue
 19242  			}
 19243  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19244  			y := x1.Args[0]
 19245  			if !(ssa.ClobberIfDead(x1)) {
 19246  				continue
 19247  			}
 19248  			v.Reset(ssaop.OpARM64XORshiftRO)
 19249  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19250  			v.AddArg2(x0, y)
 19251  			return true
 19252  		}
 19253  		break
 19254  	}
 19255  	return false
 19256  }
 19257  func rewriteValue_OpARM64XORconst(v *ssa.Value) bool {
 19258  	v_0 := v.Args[0]
 19259  	// match: (XORconst [0] x)
 19260  	// result: x
 19261  	for {
 19262  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 19263  			break
 19264  		}
 19265  		x := v_0
 19266  		v.CopyOf(x)
 19267  		return true
 19268  	}
 19269  	// match: (XORconst [-1] x)
 19270  	// result: (MVN x)
 19271  	for {
 19272  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
 19273  			break
 19274  		}
 19275  		x := v_0
 19276  		v.Reset(ssaop.OpARM64MVN)
 19277  		v.AddArg(x)
 19278  		return true
 19279  	}
 19280  	// match: (XORconst [c] (MOVDconst [d]))
 19281  	// result: (MOVDconst [c^d])
 19282  	for {
 19283  		c := ssa.AuxIntToInt64(v.AuxInt)
 19284  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19285  			break
 19286  		}
 19287  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 19288  		v.Reset(ssaop.OpARM64MOVDconst)
 19289  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
 19290  		return true
 19291  	}
 19292  	// match: (XORconst [c] (XORconst [d] x))
 19293  	// result: (XORconst [c^d] x)
 19294  	for {
 19295  		c := ssa.AuxIntToInt64(v.AuxInt)
 19296  		if v_0.Op != ssaop.OpARM64XORconst {
 19297  			break
 19298  		}
 19299  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 19300  		x := v_0.Args[0]
 19301  		v.Reset(ssaop.OpARM64XORconst)
 19302  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
 19303  		v.AddArg(x)
 19304  		return true
 19305  	}
 19306  	return false
 19307  }
 19308  func rewriteValue_OpARM64XORshiftLL(v *ssa.Value) bool {
 19309  	v_1 := v.Args[1]
 19310  	v_0 := v.Args[0]
 19311  	b := v.Block
 19312  	typ := &b.Func.Config.Types
 19313  	// match: (XORshiftLL (MOVDconst [c]) x [d])
 19314  	// result: (XORconst [c] (SLLconst <x.Type> x [d]))
 19315  	for {
 19316  		d := ssa.AuxIntToInt64(v.AuxInt)
 19317  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19318  			break
 19319  		}
 19320  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 19321  		x := v_1
 19322  		v.Reset(ssaop.OpARM64XORconst)
 19323  		v.AuxInt = ssa.Int64ToAuxInt(c)
 19324  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 19325  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 19326  		v0.AddArg(x)
 19327  		v.AddArg(v0)
 19328  		return true
 19329  	}
 19330  	// match: (XORshiftLL x (MOVDconst [c]) [d])
 19331  	// result: (XORconst x [int64(uint64(c)<<uint64(d))])
 19332  	for {
 19333  		d := ssa.AuxIntToInt64(v.AuxInt)
 19334  		x := v_0
 19335  		if v_1.Op != ssaop.OpARM64MOVDconst {
 19336  			break
 19337  		}
 19338  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 19339  		v.Reset(ssaop.OpARM64XORconst)
 19340  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 19341  		v.AddArg(x)
 19342  		return true
 19343  	}
 19344  	// match: (XORshiftLL (SLLconst x [c]) x [c])
 19345  	// result: (MOVDconst [0])
 19346  	for {
 19347  		c := ssa.AuxIntToInt64(v.AuxInt)
 19348  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 19349  			break
 19350  		}
 19351  		x := v_0.Args[0]
 19352  		if x != v_1 {
 19353  			break
 19354  		}
 19355  		v.Reset(ssaop.OpARM64MOVDconst)
 19356  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19357  		return true
 19358  	}
 19359  	// match: (XORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
 19360  	// result: (REV16W x)
 19361  	for {
 19362  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
 19363  			break
 19364  		}
 19365  		x := v_0.Args[0]
 19366  		if x != v_1 {
 19367  			break
 19368  		}
 19369  		v.Reset(ssaop.OpARM64REV16W)
 19370  		v.AddArg(x)
 19371  		return true
 19372  	}
 19373  	// match: (XORshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 19374  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 19375  	// result: (REV16W x)
 19376  	for {
 19377  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
 19378  			break
 19379  		}
 19380  		v_0_0 := v_0.Args[0]
 19381  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 19382  			break
 19383  		}
 19384  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 19385  		x := v_0_0.Args[0]
 19386  		if v_1.Op != ssaop.OpARM64ANDconst {
 19387  			break
 19388  		}
 19389  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 19390  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 19391  			break
 19392  		}
 19393  		v.Reset(ssaop.OpARM64REV16W)
 19394  		v.AddArg(x)
 19395  		return true
 19396  	}
 19397  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 19398  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 19399  	// result: (REV16 x)
 19400  	for {
 19401  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 19402  			break
 19403  		}
 19404  		v_0_0 := v_0.Args[0]
 19405  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 19406  			break
 19407  		}
 19408  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 19409  		x := v_0_0.Args[0]
 19410  		if v_1.Op != ssaop.OpARM64ANDconst {
 19411  			break
 19412  		}
 19413  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 19414  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 19415  			break
 19416  		}
 19417  		v.Reset(ssaop.OpARM64REV16)
 19418  		v.AddArg(x)
 19419  		return true
 19420  	}
 19421  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 19422  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 19423  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 19424  	for {
 19425  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 19426  			break
 19427  		}
 19428  		v_0_0 := v_0.Args[0]
 19429  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 19430  			break
 19431  		}
 19432  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 19433  		x := v_0_0.Args[0]
 19434  		if v_1.Op != ssaop.OpARM64ANDconst {
 19435  			break
 19436  		}
 19437  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 19438  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 19439  			break
 19440  		}
 19441  		v.Reset(ssaop.OpARM64REV16)
 19442  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
 19443  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
 19444  		v0.AddArg(x)
 19445  		v.AddArg(v0)
 19446  		return true
 19447  	}
 19448  	// match: (XORshiftLL [c] (SRLconst x [64-c]) x2)
 19449  	// result: (EXTRconst [64-c] x2 x)
 19450  	for {
 19451  		c := ssa.AuxIntToInt64(v.AuxInt)
 19452  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
 19453  			break
 19454  		}
 19455  		x := v_0.Args[0]
 19456  		x2 := v_1
 19457  		v.Reset(ssaop.OpARM64EXTRconst)
 19458  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
 19459  		v.AddArg2(x2, x)
 19460  		return true
 19461  	}
 19462  	// match: (XORshiftLL <t> [c] (UBFX [bfc] x) x2)
 19463  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
 19464  	// result: (EXTRWconst [32-c] x2 x)
 19465  	for {
 19466  		t := v.Type
 19467  		c := ssa.AuxIntToInt64(v.AuxInt)
 19468  		if v_0.Op != ssaop.OpARM64UBFX {
 19469  			break
 19470  		}
 19471  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 19472  		x := v_0.Args[0]
 19473  		x2 := v_1
 19474  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
 19475  			break
 19476  		}
 19477  		v.Reset(ssaop.OpARM64EXTRWconst)
 19478  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
 19479  		v.AddArg2(x2, x)
 19480  		return true
 19481  	}
 19482  	return false
 19483  }
 19484  func rewriteValue_OpARM64XORshiftRA(v *ssa.Value) bool {
 19485  	v_1 := v.Args[1]
 19486  	v_0 := v.Args[0]
 19487  	b := v.Block
 19488  	// match: (XORshiftRA (MOVDconst [c]) x [d])
 19489  	// result: (XORconst [c] (SRAconst <x.Type> x [d]))
 19490  	for {
 19491  		d := ssa.AuxIntToInt64(v.AuxInt)
 19492  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19493  			break
 19494  		}
 19495  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 19496  		x := v_1
 19497  		v.Reset(ssaop.OpARM64XORconst)
 19498  		v.AuxInt = ssa.Int64ToAuxInt(c)
 19499  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 19500  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 19501  		v0.AddArg(x)
 19502  		v.AddArg(v0)
 19503  		return true
 19504  	}
 19505  	// match: (XORshiftRA x (MOVDconst [c]) [d])
 19506  	// result: (XORconst x [c>>uint64(d)])
 19507  	for {
 19508  		d := ssa.AuxIntToInt64(v.AuxInt)
 19509  		x := v_0
 19510  		if v_1.Op != ssaop.OpARM64MOVDconst {
 19511  			break
 19512  		}
 19513  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 19514  		v.Reset(ssaop.OpARM64XORconst)
 19515  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 19516  		v.AddArg(x)
 19517  		return true
 19518  	}
 19519  	// match: (XORshiftRA (SRAconst x [c]) x [c])
 19520  	// result: (MOVDconst [0])
 19521  	for {
 19522  		c := ssa.AuxIntToInt64(v.AuxInt)
 19523  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 19524  			break
 19525  		}
 19526  		x := v_0.Args[0]
 19527  		if x != v_1 {
 19528  			break
 19529  		}
 19530  		v.Reset(ssaop.OpARM64MOVDconst)
 19531  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19532  		return true
 19533  	}
 19534  	return false
 19535  }
 19536  func rewriteValue_OpARM64XORshiftRL(v *ssa.Value) bool {
 19537  	v_1 := v.Args[1]
 19538  	v_0 := v.Args[0]
 19539  	b := v.Block
 19540  	// match: (XORshiftRL (MOVDconst [c]) x [d])
 19541  	// result: (XORconst [c] (SRLconst <x.Type> x [d]))
 19542  	for {
 19543  		d := ssa.AuxIntToInt64(v.AuxInt)
 19544  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19545  			break
 19546  		}
 19547  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 19548  		x := v_1
 19549  		v.Reset(ssaop.OpARM64XORconst)
 19550  		v.AuxInt = ssa.Int64ToAuxInt(c)
 19551  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 19552  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 19553  		v0.AddArg(x)
 19554  		v.AddArg(v0)
 19555  		return true
 19556  	}
 19557  	// match: (XORshiftRL x (MOVDconst [c]) [d])
 19558  	// result: (XORconst x [int64(uint64(c)>>uint64(d))])
 19559  	for {
 19560  		d := ssa.AuxIntToInt64(v.AuxInt)
 19561  		x := v_0
 19562  		if v_1.Op != ssaop.OpARM64MOVDconst {
 19563  			break
 19564  		}
 19565  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 19566  		v.Reset(ssaop.OpARM64XORconst)
 19567  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 19568  		v.AddArg(x)
 19569  		return true
 19570  	}
 19571  	// match: (XORshiftRL (SRLconst x [c]) x [c])
 19572  	// result: (MOVDconst [0])
 19573  	for {
 19574  		c := ssa.AuxIntToInt64(v.AuxInt)
 19575  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 19576  			break
 19577  		}
 19578  		x := v_0.Args[0]
 19579  		if x != v_1 {
 19580  			break
 19581  		}
 19582  		v.Reset(ssaop.OpARM64MOVDconst)
 19583  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19584  		return true
 19585  	}
 19586  	return false
 19587  }
 19588  func rewriteValue_OpARM64XORshiftRO(v *ssa.Value) bool {
 19589  	v_1 := v.Args[1]
 19590  	v_0 := v.Args[0]
 19591  	b := v.Block
 19592  	// match: (XORshiftRO (MOVDconst [c]) x [d])
 19593  	// result: (XORconst [c] (RORconst <x.Type> x [d]))
 19594  	for {
 19595  		d := ssa.AuxIntToInt64(v.AuxInt)
 19596  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19597  			break
 19598  		}
 19599  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 19600  		x := v_1
 19601  		v.Reset(ssaop.OpARM64XORconst)
 19602  		v.AuxInt = ssa.Int64ToAuxInt(c)
 19603  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 19604  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 19605  		v0.AddArg(x)
 19606  		v.AddArg(v0)
 19607  		return true
 19608  	}
 19609  	// match: (XORshiftRO x (MOVDconst [c]) [d])
 19610  	// result: (XORconst x [rotateRight64(c, d)])
 19611  	for {
 19612  		d := ssa.AuxIntToInt64(v.AuxInt)
 19613  		x := v_0
 19614  		if v_1.Op != ssaop.OpARM64MOVDconst {
 19615  			break
 19616  		}
 19617  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 19618  		v.Reset(ssaop.OpARM64XORconst)
 19619  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 19620  		v.AddArg(x)
 19621  		return true
 19622  	}
 19623  	// match: (XORshiftRO (RORconst x [c]) x [c])
 19624  	// result: (MOVDconst [0])
 19625  	for {
 19626  		c := ssa.AuxIntToInt64(v.AuxInt)
 19627  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 19628  			break
 19629  		}
 19630  		x := v_0.Args[0]
 19631  		if x != v_1 {
 19632  			break
 19633  		}
 19634  		v.Reset(ssaop.OpARM64MOVDconst)
 19635  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19636  		return true
 19637  	}
 19638  	return false
 19639  }
 19640  func rewriteValue_OpAddInt8s(v *ssa.Value) bool {
 19641  	v_1 := v.Args[1]
 19642  	v_0 := v.Args[0]
 19643  	b := v.Block
 19644  	typ := &b.Func.Config.Types
 19645  	// match: (AddInt8s x y)
 19646  	// result: (ZADDBPred x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 19647  	for {
 19648  		x := v_0
 19649  		y := v_1
 19650  		v.Reset(ssaop.OpARM64ZADDBPred)
 19651  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 19652  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 19653  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 19654  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 19655  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 19656  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 19657  		v1.AddArg2(v2, v3)
 19658  		v0.AddArg(v1)
 19659  		v.AddArg3(x, y, v0)
 19660  		return true
 19661  	}
 19662  }
 19663  func rewriteValue_OpAddr(v *ssa.Value) bool {
 19664  	v_0 := v.Args[0]
 19665  	// match: (Addr {sym} base)
 19666  	// result: (MOVDaddr {sym} base)
 19667  	for {
 19668  		sym := ssa.AuxToSym(v.Aux)
 19669  		base := v_0
 19670  		v.Reset(ssaop.OpARM64MOVDaddr)
 19671  		v.Aux = ssa.SymToAux(sym)
 19672  		v.AddArg(base)
 19673  		return true
 19674  	}
 19675  }
 19676  func rewriteValue_OpAvg64u(v *ssa.Value) bool {
 19677  	v_1 := v.Args[1]
 19678  	v_0 := v.Args[0]
 19679  	b := v.Block
 19680  	// match: (Avg64u <t> x y)
 19681  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
 19682  	for {
 19683  		t := v.Type
 19684  		x := v_0
 19685  		y := v_1
 19686  		v.Reset(ssaop.OpARM64ADD)
 19687  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, t)
 19688  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 19689  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, t)
 19690  		v1.AddArg2(x, y)
 19691  		v0.AddArg(v1)
 19692  		v.AddArg2(v0, y)
 19693  		return true
 19694  	}
 19695  }
 19696  func rewriteValue_OpBitLen16(v *ssa.Value) bool {
 19697  	v_0 := v.Args[0]
 19698  	b := v.Block
 19699  	typ := &b.Func.Config.Types
 19700  	// match: (BitLen16 x)
 19701  	// result: (BitLen64 (ZeroExt16to64 x))
 19702  	for {
 19703  		x := v_0
 19704  		v.Reset(ssaop.OpBitLen64)
 19705  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 19706  		v0.AddArg(x)
 19707  		v.AddArg(v0)
 19708  		return true
 19709  	}
 19710  }
 19711  func rewriteValue_OpBitLen32(v *ssa.Value) bool {
 19712  	v_0 := v.Args[0]
 19713  	b := v.Block
 19714  	typ := &b.Func.Config.Types
 19715  	// match: (BitLen32 x)
 19716  	// result: (SUB (MOVDconst [32]) (CLZW <typ.Int> x))
 19717  	for {
 19718  		x := v_0
 19719  		v.Reset(ssaop.OpARM64SUB)
 19720  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 19721  		v0.AuxInt = ssa.Int64ToAuxInt(32)
 19722  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64CLZW, typ.Int)
 19723  		v1.AddArg(x)
 19724  		v.AddArg2(v0, v1)
 19725  		return true
 19726  	}
 19727  }
 19728  func rewriteValue_OpBitLen64(v *ssa.Value) bool {
 19729  	v_0 := v.Args[0]
 19730  	b := v.Block
 19731  	typ := &b.Func.Config.Types
 19732  	// match: (BitLen64 x)
 19733  	// result: (SUB (MOVDconst [64]) (CLZ <typ.Int> x))
 19734  	for {
 19735  		x := v_0
 19736  		v.Reset(ssaop.OpARM64SUB)
 19737  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 19738  		v0.AuxInt = ssa.Int64ToAuxInt(64)
 19739  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64CLZ, typ.Int)
 19740  		v1.AddArg(x)
 19741  		v.AddArg2(v0, v1)
 19742  		return true
 19743  	}
 19744  }
 19745  func rewriteValue_OpBitLen8(v *ssa.Value) bool {
 19746  	v_0 := v.Args[0]
 19747  	b := v.Block
 19748  	typ := &b.Func.Config.Types
 19749  	// match: (BitLen8 x)
 19750  	// result: (BitLen64 (ZeroExt8to64 x))
 19751  	for {
 19752  		x := v_0
 19753  		v.Reset(ssaop.OpBitLen64)
 19754  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 19755  		v0.AddArg(x)
 19756  		v.AddArg(v0)
 19757  		return true
 19758  	}
 19759  }
 19760  func rewriteValue_OpBitRev16(v *ssa.Value) bool {
 19761  	v_0 := v.Args[0]
 19762  	b := v.Block
 19763  	typ := &b.Func.Config.Types
 19764  	// match: (BitRev16 x)
 19765  	// result: (SRLconst [48] (RBIT <typ.UInt64> x))
 19766  	for {
 19767  		x := v_0
 19768  		v.Reset(ssaop.OpARM64SRLconst)
 19769  		v.AuxInt = ssa.Int64ToAuxInt(48)
 19770  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, typ.UInt64)
 19771  		v0.AddArg(x)
 19772  		v.AddArg(v0)
 19773  		return true
 19774  	}
 19775  }
 19776  func rewriteValue_OpBitRev8(v *ssa.Value) bool {
 19777  	v_0 := v.Args[0]
 19778  	b := v.Block
 19779  	typ := &b.Func.Config.Types
 19780  	// match: (BitRev8 x)
 19781  	// result: (SRLconst [56] (RBIT <typ.UInt64> x))
 19782  	for {
 19783  		x := v_0
 19784  		v.Reset(ssaop.OpARM64SRLconst)
 19785  		v.AuxInt = ssa.Int64ToAuxInt(56)
 19786  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, typ.UInt64)
 19787  		v0.AddArg(x)
 19788  		v.AddArg(v0)
 19789  		return true
 19790  	}
 19791  }
 19792  func rewriteValue_OpCondSelect(v *ssa.Value) bool {
 19793  	v_2 := v.Args[2]
 19794  	v_1 := v.Args[1]
 19795  	v_0 := v.Args[0]
 19796  	b := v.Block
 19797  	// match: (CondSelect x y boolval)
 19798  	// cond: ssa.FlagArg(boolval) != nil
 19799  	// result: (CSEL [boolval.Op] x y ssa.FlagArg(boolval))
 19800  	for {
 19801  		x := v_0
 19802  		y := v_1
 19803  		boolval := v_2
 19804  		if !(ssa.FlagArg(boolval) != nil) {
 19805  			break
 19806  		}
 19807  		v.Reset(ssaop.OpARM64CSEL)
 19808  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
 19809  		v.AddArg3(x, y, ssa.FlagArg(boolval))
 19810  		return true
 19811  	}
 19812  	// match: (CondSelect x y boolval)
 19813  	// cond: ssa.FlagArg(boolval) == nil
 19814  	// result: (CSEL [ssaop.OpARM64NotEqual] x y (TSTWconst [1] boolval))
 19815  	for {
 19816  		x := v_0
 19817  		y := v_1
 19818  		boolval := v_2
 19819  		if !(ssa.FlagArg(boolval) == nil) {
 19820  			break
 19821  		}
 19822  		v.Reset(ssaop.OpARM64CSEL)
 19823  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64NotEqual)
 19824  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 19825  		v0.AuxInt = ssa.Int32ToAuxInt(1)
 19826  		v0.AddArg(boolval)
 19827  		v.AddArg3(x, y, v0)
 19828  		return true
 19829  	}
 19830  	return false
 19831  }
 19832  func rewriteValue_OpConst16(v *ssa.Value) bool {
 19833  	// match: (Const16 [val])
 19834  	// result: (MOVDconst [int64(val)])
 19835  	for {
 19836  		val := ssa.AuxIntToInt16(v.AuxInt)
 19837  		v.Reset(ssaop.OpARM64MOVDconst)
 19838  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 19839  		return true
 19840  	}
 19841  }
 19842  func rewriteValue_OpConst32(v *ssa.Value) bool {
 19843  	// match: (Const32 [val])
 19844  	// result: (MOVDconst [int64(val)])
 19845  	for {
 19846  		val := ssa.AuxIntToInt32(v.AuxInt)
 19847  		v.Reset(ssaop.OpARM64MOVDconst)
 19848  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 19849  		return true
 19850  	}
 19851  }
 19852  func rewriteValue_OpConst32F(v *ssa.Value) bool {
 19853  	// match: (Const32F [val])
 19854  	// result: (FMOVSconst [float64(val)])
 19855  	for {
 19856  		val := ssa.AuxIntToFloat32(v.AuxInt)
 19857  		v.Reset(ssaop.OpARM64FMOVSconst)
 19858  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
 19859  		return true
 19860  	}
 19861  }
 19862  func rewriteValue_OpConst64(v *ssa.Value) bool {
 19863  	// match: (Const64 [val])
 19864  	// result: (MOVDconst [int64(val)])
 19865  	for {
 19866  		val := ssa.AuxIntToInt64(v.AuxInt)
 19867  		v.Reset(ssaop.OpARM64MOVDconst)
 19868  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 19869  		return true
 19870  	}
 19871  }
 19872  func rewriteValue_OpConst64F(v *ssa.Value) bool {
 19873  	// match: (Const64F [val])
 19874  	// result: (FMOVDconst [float64(val)])
 19875  	for {
 19876  		val := ssa.AuxIntToFloat64(v.AuxInt)
 19877  		v.Reset(ssaop.OpARM64FMOVDconst)
 19878  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
 19879  		return true
 19880  	}
 19881  }
 19882  func rewriteValue_OpConst8(v *ssa.Value) bool {
 19883  	// match: (Const8 [val])
 19884  	// result: (MOVDconst [int64(val)])
 19885  	for {
 19886  		val := ssa.AuxIntToInt8(v.AuxInt)
 19887  		v.Reset(ssaop.OpARM64MOVDconst)
 19888  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 19889  		return true
 19890  	}
 19891  }
 19892  func rewriteValue_OpConstBool(v *ssa.Value) bool {
 19893  	// match: (ConstBool [t])
 19894  	// result: (MOVDconst [ssa.B2i(t)])
 19895  	for {
 19896  		t := ssa.AuxIntToBool(v.AuxInt)
 19897  		v.Reset(ssaop.OpARM64MOVDconst)
 19898  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(t))
 19899  		return true
 19900  	}
 19901  }
 19902  func rewriteValue_OpConstNil(v *ssa.Value) bool {
 19903  	// match: (ConstNil)
 19904  	// result: (MOVDconst [0])
 19905  	for {
 19906  		v.Reset(ssaop.OpARM64MOVDconst)
 19907  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19908  		return true
 19909  	}
 19910  }
 19911  func rewriteValue_OpCount8s(v *ssa.Value) bool {
 19912  	v_0 := v.Args[0]
 19913  	b := v.Block
 19914  	typ := &b.Func.Config.Types
 19915  	// match: (Count8s r)
 19916  	// result: (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) r))
 19917  	for {
 19918  		r := v_0
 19919  		v.Reset(ssaop.OpSelect0)
 19920  		v.Type = types.TypeMask
 19921  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 19922  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 19923  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 19924  		v0.AddArg2(v1, r)
 19925  		v.AddArg(v0)
 19926  		return true
 19927  	}
 19928  }
 19929  func rewriteValue_OpCtz16(v *ssa.Value) bool {
 19930  	v_0 := v.Args[0]
 19931  	b := v.Block
 19932  	typ := &b.Func.Config.Types
 19933  	// match: (Ctz16 <t> x)
 19934  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x)))
 19935  	for {
 19936  		t := v.Type
 19937  		x := v_0
 19938  		v.Reset(ssaop.OpARM64CLZW)
 19939  		v.Type = t
 19940  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, typ.UInt32)
 19941  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ORconst, typ.UInt32)
 19942  		v1.AuxInt = ssa.Int64ToAuxInt(0x10000)
 19943  		v1.AddArg(x)
 19944  		v0.AddArg(v1)
 19945  		v.AddArg(v0)
 19946  		return true
 19947  	}
 19948  }
 19949  func rewriteValue_OpCtz32(v *ssa.Value) bool {
 19950  	v_0 := v.Args[0]
 19951  	b := v.Block
 19952  	// match: (Ctz32 <t> x)
 19953  	// result: (CLZW (RBITW <t> x))
 19954  	for {
 19955  		t := v.Type
 19956  		x := v_0
 19957  		v.Reset(ssaop.OpARM64CLZW)
 19958  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, t)
 19959  		v0.AddArg(x)
 19960  		v.AddArg(v0)
 19961  		return true
 19962  	}
 19963  }
 19964  func rewriteValue_OpCtz64(v *ssa.Value) bool {
 19965  	v_0 := v.Args[0]
 19966  	b := v.Block
 19967  	// match: (Ctz64 <t> x)
 19968  	// result: (CLZ (RBIT <t> x))
 19969  	for {
 19970  		t := v.Type
 19971  		x := v_0
 19972  		v.Reset(ssaop.OpARM64CLZ)
 19973  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, t)
 19974  		v0.AddArg(x)
 19975  		v.AddArg(v0)
 19976  		return true
 19977  	}
 19978  }
 19979  func rewriteValue_OpCtz8(v *ssa.Value) bool {
 19980  	v_0 := v.Args[0]
 19981  	b := v.Block
 19982  	typ := &b.Func.Config.Types
 19983  	// match: (Ctz8 <t> x)
 19984  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x100] x)))
 19985  	for {
 19986  		t := v.Type
 19987  		x := v_0
 19988  		v.Reset(ssaop.OpARM64CLZW)
 19989  		v.Type = t
 19990  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, typ.UInt32)
 19991  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ORconst, typ.UInt32)
 19992  		v1.AuxInt = ssa.Int64ToAuxInt(0x100)
 19993  		v1.AddArg(x)
 19994  		v0.AddArg(v1)
 19995  		v.AddArg(v0)
 19996  		return true
 19997  	}
 19998  }
 19999  func rewriteValue_OpDiv16(v *ssa.Value) bool {
 20000  	v_1 := v.Args[1]
 20001  	v_0 := v.Args[0]
 20002  	b := v.Block
 20003  	typ := &b.Func.Config.Types
 20004  	// match: (Div16 [false] x y)
 20005  	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
 20006  	for {
 20007  		if ssa.AuxIntToBool(v.AuxInt) != false {
 20008  			break
 20009  		}
 20010  		x := v_0
 20011  		y := v_1
 20012  		v.Reset(ssaop.OpARM64DIVW)
 20013  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20014  		v0.AddArg(x)
 20015  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20016  		v1.AddArg(y)
 20017  		v.AddArg2(v0, v1)
 20018  		return true
 20019  	}
 20020  	return false
 20021  }
 20022  func rewriteValue_OpDiv16u(v *ssa.Value) bool {
 20023  	v_1 := v.Args[1]
 20024  	v_0 := v.Args[0]
 20025  	b := v.Block
 20026  	typ := &b.Func.Config.Types
 20027  	// match: (Div16u x y)
 20028  	// result: (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y))
 20029  	for {
 20030  		x := v_0
 20031  		y := v_1
 20032  		v.Reset(ssaop.OpARM64UDIVW)
 20033  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20034  		v0.AddArg(x)
 20035  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20036  		v1.AddArg(y)
 20037  		v.AddArg2(v0, v1)
 20038  		return true
 20039  	}
 20040  }
 20041  func rewriteValue_OpDiv32(v *ssa.Value) bool {
 20042  	v_1 := v.Args[1]
 20043  	v_0 := v.Args[0]
 20044  	// match: (Div32 [false] x y)
 20045  	// result: (DIVW x y)
 20046  	for {
 20047  		if ssa.AuxIntToBool(v.AuxInt) != false {
 20048  			break
 20049  		}
 20050  		x := v_0
 20051  		y := v_1
 20052  		v.Reset(ssaop.OpARM64DIVW)
 20053  		v.AddArg2(x, y)
 20054  		return true
 20055  	}
 20056  	return false
 20057  }
 20058  func rewriteValue_OpDiv64(v *ssa.Value) bool {
 20059  	v_1 := v.Args[1]
 20060  	v_0 := v.Args[0]
 20061  	// match: (Div64 [false] x y)
 20062  	// result: (DIV x y)
 20063  	for {
 20064  		if ssa.AuxIntToBool(v.AuxInt) != false {
 20065  			break
 20066  		}
 20067  		x := v_0
 20068  		y := v_1
 20069  		v.Reset(ssaop.OpARM64DIV)
 20070  		v.AddArg2(x, y)
 20071  		return true
 20072  	}
 20073  	return false
 20074  }
 20075  func rewriteValue_OpDiv8(v *ssa.Value) bool {
 20076  	v_1 := v.Args[1]
 20077  	v_0 := v.Args[0]
 20078  	b := v.Block
 20079  	typ := &b.Func.Config.Types
 20080  	// match: (Div8 x y)
 20081  	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
 20082  	for {
 20083  		x := v_0
 20084  		y := v_1
 20085  		v.Reset(ssaop.OpARM64DIVW)
 20086  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20087  		v0.AddArg(x)
 20088  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20089  		v1.AddArg(y)
 20090  		v.AddArg2(v0, v1)
 20091  		return true
 20092  	}
 20093  }
 20094  func rewriteValue_OpDiv8u(v *ssa.Value) bool {
 20095  	v_1 := v.Args[1]
 20096  	v_0 := v.Args[0]
 20097  	b := v.Block
 20098  	typ := &b.Func.Config.Types
 20099  	// match: (Div8u x y)
 20100  	// result: (UDIVW (ZeroExt8to32 x) (ZeroExt8to32 y))
 20101  	for {
 20102  		x := v_0
 20103  		y := v_1
 20104  		v.Reset(ssaop.OpARM64UDIVW)
 20105  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20106  		v0.AddArg(x)
 20107  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20108  		v1.AddArg(y)
 20109  		v.AddArg2(v0, v1)
 20110  		return true
 20111  	}
 20112  }
 20113  func rewriteValue_OpEq16(v *ssa.Value) bool {
 20114  	v_1 := v.Args[1]
 20115  	v_0 := v.Args[0]
 20116  	b := v.Block
 20117  	typ := &b.Func.Config.Types
 20118  	// match: (Eq16 x y)
 20119  	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 20120  	for {
 20121  		x := v_0
 20122  		y := v_1
 20123  		v.Reset(ssaop.OpARM64Equal)
 20124  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20125  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20126  		v1.AddArg(x)
 20127  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20128  		v2.AddArg(y)
 20129  		v0.AddArg2(v1, v2)
 20130  		v.AddArg(v0)
 20131  		return true
 20132  	}
 20133  }
 20134  func rewriteValue_OpEq32(v *ssa.Value) bool {
 20135  	v_1 := v.Args[1]
 20136  	v_0 := v.Args[0]
 20137  	b := v.Block
 20138  	// match: (Eq32 x y)
 20139  	// result: (Equal (CMPW x y))
 20140  	for {
 20141  		x := v_0
 20142  		y := v_1
 20143  		v.Reset(ssaop.OpARM64Equal)
 20144  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20145  		v0.AddArg2(x, y)
 20146  		v.AddArg(v0)
 20147  		return true
 20148  	}
 20149  }
 20150  func rewriteValue_OpEq32F(v *ssa.Value) bool {
 20151  	v_1 := v.Args[1]
 20152  	v_0 := v.Args[0]
 20153  	b := v.Block
 20154  	// match: (Eq32F x y)
 20155  	// result: (Equal (FCMPS x y))
 20156  	for {
 20157  		x := v_0
 20158  		y := v_1
 20159  		v.Reset(ssaop.OpARM64Equal)
 20160  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 20161  		v0.AddArg2(x, y)
 20162  		v.AddArg(v0)
 20163  		return true
 20164  	}
 20165  }
 20166  func rewriteValue_OpEq64(v *ssa.Value) bool {
 20167  	v_1 := v.Args[1]
 20168  	v_0 := v.Args[0]
 20169  	b := v.Block
 20170  	// match: (Eq64 x y)
 20171  	// result: (Equal (CMP x y))
 20172  	for {
 20173  		x := v_0
 20174  		y := v_1
 20175  		v.Reset(ssaop.OpARM64Equal)
 20176  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20177  		v0.AddArg2(x, y)
 20178  		v.AddArg(v0)
 20179  		return true
 20180  	}
 20181  }
 20182  func rewriteValue_OpEq64F(v *ssa.Value) bool {
 20183  	v_1 := v.Args[1]
 20184  	v_0 := v.Args[0]
 20185  	b := v.Block
 20186  	// match: (Eq64F x y)
 20187  	// result: (Equal (FCMPD x y))
 20188  	for {
 20189  		x := v_0
 20190  		y := v_1
 20191  		v.Reset(ssaop.OpARM64Equal)
 20192  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 20193  		v0.AddArg2(x, y)
 20194  		v.AddArg(v0)
 20195  		return true
 20196  	}
 20197  }
 20198  func rewriteValue_OpEq8(v *ssa.Value) bool {
 20199  	v_1 := v.Args[1]
 20200  	v_0 := v.Args[0]
 20201  	b := v.Block
 20202  	typ := &b.Func.Config.Types
 20203  	// match: (Eq8 x y)
 20204  	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 20205  	for {
 20206  		x := v_0
 20207  		y := v_1
 20208  		v.Reset(ssaop.OpARM64Equal)
 20209  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20210  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20211  		v1.AddArg(x)
 20212  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20213  		v2.AddArg(y)
 20214  		v0.AddArg2(v1, v2)
 20215  		v.AddArg(v0)
 20216  		return true
 20217  	}
 20218  }
 20219  func rewriteValue_OpEqB(v *ssa.Value) bool {
 20220  	v_1 := v.Args[1]
 20221  	v_0 := v.Args[0]
 20222  	b := v.Block
 20223  	typ := &b.Func.Config.Types
 20224  	// match: (EqB x y)
 20225  	// result: (XOR (MOVDconst [1]) (XOR <typ.Bool> x y))
 20226  	for {
 20227  		x := v_0
 20228  		y := v_1
 20229  		v.Reset(ssaop.OpARM64XOR)
 20230  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20231  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 20232  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64XOR, typ.Bool)
 20233  		v1.AddArg2(x, y)
 20234  		v.AddArg2(v0, v1)
 20235  		return true
 20236  	}
 20237  }
 20238  func rewriteValue_OpEqPtr(v *ssa.Value) bool {
 20239  	v_1 := v.Args[1]
 20240  	v_0 := v.Args[0]
 20241  	b := v.Block
 20242  	// match: (EqPtr x y)
 20243  	// result: (Equal (CMP x y))
 20244  	for {
 20245  		x := v_0
 20246  		y := v_1
 20247  		v.Reset(ssaop.OpARM64Equal)
 20248  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20249  		v0.AddArg2(x, y)
 20250  		v.AddArg(v0)
 20251  		return true
 20252  	}
 20253  }
 20254  func rewriteValue_OpFMA(v *ssa.Value) bool {
 20255  	v_2 := v.Args[2]
 20256  	v_1 := v.Args[1]
 20257  	v_0 := v.Args[0]
 20258  	// match: (FMA x y z)
 20259  	// result: (FMADDD z x y)
 20260  	for {
 20261  		x := v_0
 20262  		y := v_1
 20263  		z := v_2
 20264  		v.Reset(ssaop.OpARM64FMADDD)
 20265  		v.AddArg3(z, x, y)
 20266  		return true
 20267  	}
 20268  }
 20269  func rewriteValue_OpGreaterInt8s(v *ssa.Value) bool {
 20270  	v_1 := v.Args[1]
 20271  	v_0 := v.Args[0]
 20272  	b := v.Block
 20273  	typ := &b.Func.Config.Types
 20274  	// match: (GreaterInt8s x y)
 20275  	// result: (Select0 <types.TypeMask> (ZCMPGTB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))))
 20276  	for {
 20277  		x := v_0
 20278  		y := v_1
 20279  		v.Reset(ssaop.OpSelect0)
 20280  		v.Type = types.TypeMask
 20281  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ZCMPGTB, types.NewTuple(typ.Mask, types.TypeFlags))
 20282  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 20283  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 20284  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20285  		v3.AuxInt = ssa.Int64ToAuxInt(0)
 20286  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20287  		v4.AuxInt = ssa.Int64ToAuxInt(32)
 20288  		v2.AddArg2(v3, v4)
 20289  		v1.AddArg(v2)
 20290  		v0.AddArg3(x, y, v1)
 20291  		v.AddArg(v0)
 20292  		return true
 20293  	}
 20294  }
 20295  func rewriteValue_OpHmul32(v *ssa.Value) bool {
 20296  	v_1 := v.Args[1]
 20297  	v_0 := v.Args[0]
 20298  	b := v.Block
 20299  	typ := &b.Func.Config.Types
 20300  	// match: (Hmul32 x y)
 20301  	// result: (SRAconst (MULL <typ.Int64> x y) [32])
 20302  	for {
 20303  		x := v_0
 20304  		y := v_1
 20305  		v.Reset(ssaop.OpARM64SRAconst)
 20306  		v.AuxInt = ssa.Int64ToAuxInt(32)
 20307  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MULL, typ.Int64)
 20308  		v0.AddArg2(x, y)
 20309  		v.AddArg(v0)
 20310  		return true
 20311  	}
 20312  }
 20313  func rewriteValue_OpHmul32u(v *ssa.Value) bool {
 20314  	v_1 := v.Args[1]
 20315  	v_0 := v.Args[0]
 20316  	b := v.Block
 20317  	typ := &b.Func.Config.Types
 20318  	// match: (Hmul32u x y)
 20319  	// result: (SRAconst (UMULL <typ.UInt64> x y) [32])
 20320  	for {
 20321  		x := v_0
 20322  		y := v_1
 20323  		v.Reset(ssaop.OpARM64SRAconst)
 20324  		v.AuxInt = ssa.Int64ToAuxInt(32)
 20325  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UMULL, typ.UInt64)
 20326  		v0.AddArg2(x, y)
 20327  		v.AddArg(v0)
 20328  		return true
 20329  	}
 20330  }
 20331  func rewriteValue_OpIsInBounds(v *ssa.Value) bool {
 20332  	v_1 := v.Args[1]
 20333  	v_0 := v.Args[0]
 20334  	b := v.Block
 20335  	// match: (IsInBounds idx len)
 20336  	// result: (LessThanU (CMP idx len))
 20337  	for {
 20338  		idx := v_0
 20339  		len := v_1
 20340  		v.Reset(ssaop.OpARM64LessThanU)
 20341  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20342  		v0.AddArg2(idx, len)
 20343  		v.AddArg(v0)
 20344  		return true
 20345  	}
 20346  }
 20347  func rewriteValue_OpIsNonNil(v *ssa.Value) bool {
 20348  	v_0 := v.Args[0]
 20349  	b := v.Block
 20350  	// match: (IsNonNil ptr)
 20351  	// result: (NotEqual (CMPconst [0] ptr))
 20352  	for {
 20353  		ptr := v_0
 20354  		v.Reset(ssaop.OpARM64NotEqual)
 20355  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 20356  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20357  		v0.AddArg(ptr)
 20358  		v.AddArg(v0)
 20359  		return true
 20360  	}
 20361  }
 20362  func rewriteValue_OpIsSliceInBounds(v *ssa.Value) bool {
 20363  	v_1 := v.Args[1]
 20364  	v_0 := v.Args[0]
 20365  	b := v.Block
 20366  	// match: (IsSliceInBounds idx len)
 20367  	// result: (LessEqualU (CMP idx len))
 20368  	for {
 20369  		idx := v_0
 20370  		len := v_1
 20371  		v.Reset(ssaop.OpARM64LessEqualU)
 20372  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20373  		v0.AddArg2(idx, len)
 20374  		v.AddArg(v0)
 20375  		return true
 20376  	}
 20377  }
 20378  func rewriteValue_OpLeq16(v *ssa.Value) bool {
 20379  	v_1 := v.Args[1]
 20380  	v_0 := v.Args[0]
 20381  	b := v.Block
 20382  	typ := &b.Func.Config.Types
 20383  	// match: (Leq16 x y)
 20384  	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 20385  	for {
 20386  		x := v_0
 20387  		y := v_1
 20388  		v.Reset(ssaop.OpARM64LessEqual)
 20389  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20390  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20391  		v1.AddArg(x)
 20392  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20393  		v2.AddArg(y)
 20394  		v0.AddArg2(v1, v2)
 20395  		v.AddArg(v0)
 20396  		return true
 20397  	}
 20398  }
 20399  func rewriteValue_OpLeq16U(v *ssa.Value) bool {
 20400  	v_1 := v.Args[1]
 20401  	v_0 := v.Args[0]
 20402  	b := v.Block
 20403  	typ := &b.Func.Config.Types
 20404  	// match: (Leq16U x zero:(MOVDconst [0]))
 20405  	// result: (Eq16 x zero)
 20406  	for {
 20407  		x := v_0
 20408  		zero := v_1
 20409  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20410  			break
 20411  		}
 20412  		v.Reset(ssaop.OpEq16)
 20413  		v.AddArg2(x, zero)
 20414  		return true
 20415  	}
 20416  	// match: (Leq16U (MOVDconst [1]) x)
 20417  	// result: (Neq16 (MOVDconst [0]) x)
 20418  	for {
 20419  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 20420  			break
 20421  		}
 20422  		x := v_1
 20423  		v.Reset(ssaop.OpNeq16)
 20424  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20425  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20426  		v.AddArg2(v0, x)
 20427  		return true
 20428  	}
 20429  	// match: (Leq16U x y)
 20430  	// result: (LessEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 20431  	for {
 20432  		x := v_0
 20433  		y := v_1
 20434  		v.Reset(ssaop.OpARM64LessEqualU)
 20435  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20436  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20437  		v1.AddArg(x)
 20438  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20439  		v2.AddArg(y)
 20440  		v0.AddArg2(v1, v2)
 20441  		v.AddArg(v0)
 20442  		return true
 20443  	}
 20444  }
 20445  func rewriteValue_OpLeq32(v *ssa.Value) bool {
 20446  	v_1 := v.Args[1]
 20447  	v_0 := v.Args[0]
 20448  	b := v.Block
 20449  	// match: (Leq32 x y)
 20450  	// result: (LessEqual (CMPW x y))
 20451  	for {
 20452  		x := v_0
 20453  		y := v_1
 20454  		v.Reset(ssaop.OpARM64LessEqual)
 20455  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20456  		v0.AddArg2(x, y)
 20457  		v.AddArg(v0)
 20458  		return true
 20459  	}
 20460  }
 20461  func rewriteValue_OpLeq32F(v *ssa.Value) bool {
 20462  	v_1 := v.Args[1]
 20463  	v_0 := v.Args[0]
 20464  	b := v.Block
 20465  	// match: (Leq32F x y)
 20466  	// result: (LessEqualF (FCMPS x y))
 20467  	for {
 20468  		x := v_0
 20469  		y := v_1
 20470  		v.Reset(ssaop.OpARM64LessEqualF)
 20471  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 20472  		v0.AddArg2(x, y)
 20473  		v.AddArg(v0)
 20474  		return true
 20475  	}
 20476  }
 20477  func rewriteValue_OpLeq32U(v *ssa.Value) bool {
 20478  	v_1 := v.Args[1]
 20479  	v_0 := v.Args[0]
 20480  	b := v.Block
 20481  	typ := &b.Func.Config.Types
 20482  	// match: (Leq32U x zero:(MOVDconst [0]))
 20483  	// result: (Eq32 x zero)
 20484  	for {
 20485  		x := v_0
 20486  		zero := v_1
 20487  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20488  			break
 20489  		}
 20490  		v.Reset(ssaop.OpEq32)
 20491  		v.AddArg2(x, zero)
 20492  		return true
 20493  	}
 20494  	// match: (Leq32U (MOVDconst [1]) x)
 20495  	// result: (Neq32 (MOVDconst [0]) x)
 20496  	for {
 20497  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 20498  			break
 20499  		}
 20500  		x := v_1
 20501  		v.Reset(ssaop.OpNeq32)
 20502  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20503  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20504  		v.AddArg2(v0, x)
 20505  		return true
 20506  	}
 20507  	// match: (Leq32U x y)
 20508  	// result: (LessEqualU (CMPW x y))
 20509  	for {
 20510  		x := v_0
 20511  		y := v_1
 20512  		v.Reset(ssaop.OpARM64LessEqualU)
 20513  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20514  		v0.AddArg2(x, y)
 20515  		v.AddArg(v0)
 20516  		return true
 20517  	}
 20518  }
 20519  func rewriteValue_OpLeq64(v *ssa.Value) bool {
 20520  	v_1 := v.Args[1]
 20521  	v_0 := v.Args[0]
 20522  	b := v.Block
 20523  	// match: (Leq64 x y)
 20524  	// result: (LessEqual (CMP x y))
 20525  	for {
 20526  		x := v_0
 20527  		y := v_1
 20528  		v.Reset(ssaop.OpARM64LessEqual)
 20529  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20530  		v0.AddArg2(x, y)
 20531  		v.AddArg(v0)
 20532  		return true
 20533  	}
 20534  }
 20535  func rewriteValue_OpLeq64F(v *ssa.Value) bool {
 20536  	v_1 := v.Args[1]
 20537  	v_0 := v.Args[0]
 20538  	b := v.Block
 20539  	// match: (Leq64F x y)
 20540  	// result: (LessEqualF (FCMPD x y))
 20541  	for {
 20542  		x := v_0
 20543  		y := v_1
 20544  		v.Reset(ssaop.OpARM64LessEqualF)
 20545  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 20546  		v0.AddArg2(x, y)
 20547  		v.AddArg(v0)
 20548  		return true
 20549  	}
 20550  }
 20551  func rewriteValue_OpLeq64U(v *ssa.Value) bool {
 20552  	v_1 := v.Args[1]
 20553  	v_0 := v.Args[0]
 20554  	b := v.Block
 20555  	typ := &b.Func.Config.Types
 20556  	// match: (Leq64U x zero:(MOVDconst [0]))
 20557  	// result: (Eq64 x zero)
 20558  	for {
 20559  		x := v_0
 20560  		zero := v_1
 20561  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20562  			break
 20563  		}
 20564  		v.Reset(ssaop.OpEq64)
 20565  		v.AddArg2(x, zero)
 20566  		return true
 20567  	}
 20568  	// match: (Leq64U (MOVDconst [1]) x)
 20569  	// result: (Neq64 (MOVDconst [0]) x)
 20570  	for {
 20571  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 20572  			break
 20573  		}
 20574  		x := v_1
 20575  		v.Reset(ssaop.OpNeq64)
 20576  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20577  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20578  		v.AddArg2(v0, x)
 20579  		return true
 20580  	}
 20581  	// match: (Leq64U x y)
 20582  	// result: (LessEqualU (CMP x y))
 20583  	for {
 20584  		x := v_0
 20585  		y := v_1
 20586  		v.Reset(ssaop.OpARM64LessEqualU)
 20587  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20588  		v0.AddArg2(x, y)
 20589  		v.AddArg(v0)
 20590  		return true
 20591  	}
 20592  }
 20593  func rewriteValue_OpLeq8(v *ssa.Value) bool {
 20594  	v_1 := v.Args[1]
 20595  	v_0 := v.Args[0]
 20596  	b := v.Block
 20597  	typ := &b.Func.Config.Types
 20598  	// match: (Leq8 x y)
 20599  	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 20600  	for {
 20601  		x := v_0
 20602  		y := v_1
 20603  		v.Reset(ssaop.OpARM64LessEqual)
 20604  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20605  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20606  		v1.AddArg(x)
 20607  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20608  		v2.AddArg(y)
 20609  		v0.AddArg2(v1, v2)
 20610  		v.AddArg(v0)
 20611  		return true
 20612  	}
 20613  }
 20614  func rewriteValue_OpLeq8U(v *ssa.Value) bool {
 20615  	v_1 := v.Args[1]
 20616  	v_0 := v.Args[0]
 20617  	b := v.Block
 20618  	typ := &b.Func.Config.Types
 20619  	// match: (Leq8U x zero:(MOVDconst [0]))
 20620  	// result: (Eq8 x zero)
 20621  	for {
 20622  		x := v_0
 20623  		zero := v_1
 20624  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20625  			break
 20626  		}
 20627  		v.Reset(ssaop.OpEq8)
 20628  		v.AddArg2(x, zero)
 20629  		return true
 20630  	}
 20631  	// match: (Leq8U (MOVDconst [1]) x)
 20632  	// result: (Neq8 (MOVDconst [0]) x)
 20633  	for {
 20634  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 20635  			break
 20636  		}
 20637  		x := v_1
 20638  		v.Reset(ssaop.OpNeq8)
 20639  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20640  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20641  		v.AddArg2(v0, x)
 20642  		return true
 20643  	}
 20644  	// match: (Leq8U x y)
 20645  	// result: (LessEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 20646  	for {
 20647  		x := v_0
 20648  		y := v_1
 20649  		v.Reset(ssaop.OpARM64LessEqualU)
 20650  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20651  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20652  		v1.AddArg(x)
 20653  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20654  		v2.AddArg(y)
 20655  		v0.AddArg2(v1, v2)
 20656  		v.AddArg(v0)
 20657  		return true
 20658  	}
 20659  }
 20660  func rewriteValue_OpLess16(v *ssa.Value) bool {
 20661  	v_1 := v.Args[1]
 20662  	v_0 := v.Args[0]
 20663  	b := v.Block
 20664  	typ := &b.Func.Config.Types
 20665  	// match: (Less16 x y)
 20666  	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 20667  	for {
 20668  		x := v_0
 20669  		y := v_1
 20670  		v.Reset(ssaop.OpARM64LessThan)
 20671  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20672  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20673  		v1.AddArg(x)
 20674  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20675  		v2.AddArg(y)
 20676  		v0.AddArg2(v1, v2)
 20677  		v.AddArg(v0)
 20678  		return true
 20679  	}
 20680  }
 20681  func rewriteValue_OpLess16U(v *ssa.Value) bool {
 20682  	v_1 := v.Args[1]
 20683  	v_0 := v.Args[0]
 20684  	b := v.Block
 20685  	typ := &b.Func.Config.Types
 20686  	// match: (Less16U zero:(MOVDconst [0]) x)
 20687  	// result: (Neq16 zero x)
 20688  	for {
 20689  		zero := v_0
 20690  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20691  			break
 20692  		}
 20693  		x := v_1
 20694  		v.Reset(ssaop.OpNeq16)
 20695  		v.AddArg2(zero, x)
 20696  		return true
 20697  	}
 20698  	// match: (Less16U x (MOVDconst [1]))
 20699  	// result: (Eq16 x (MOVDconst [0]))
 20700  	for {
 20701  		x := v_0
 20702  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 20703  			break
 20704  		}
 20705  		v.Reset(ssaop.OpEq16)
 20706  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20707  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20708  		v.AddArg2(x, v0)
 20709  		return true
 20710  	}
 20711  	// match: (Less16U x y)
 20712  	// result: (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 20713  	for {
 20714  		x := v_0
 20715  		y := v_1
 20716  		v.Reset(ssaop.OpARM64LessThanU)
 20717  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20718  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20719  		v1.AddArg(x)
 20720  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20721  		v2.AddArg(y)
 20722  		v0.AddArg2(v1, v2)
 20723  		v.AddArg(v0)
 20724  		return true
 20725  	}
 20726  }
 20727  func rewriteValue_OpLess32(v *ssa.Value) bool {
 20728  	v_1 := v.Args[1]
 20729  	v_0 := v.Args[0]
 20730  	b := v.Block
 20731  	// match: (Less32 x y)
 20732  	// result: (LessThan (CMPW x y))
 20733  	for {
 20734  		x := v_0
 20735  		y := v_1
 20736  		v.Reset(ssaop.OpARM64LessThan)
 20737  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20738  		v0.AddArg2(x, y)
 20739  		v.AddArg(v0)
 20740  		return true
 20741  	}
 20742  }
 20743  func rewriteValue_OpLess32F(v *ssa.Value) bool {
 20744  	v_1 := v.Args[1]
 20745  	v_0 := v.Args[0]
 20746  	b := v.Block
 20747  	// match: (Less32F x y)
 20748  	// result: (LessThanF (FCMPS x y))
 20749  	for {
 20750  		x := v_0
 20751  		y := v_1
 20752  		v.Reset(ssaop.OpARM64LessThanF)
 20753  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 20754  		v0.AddArg2(x, y)
 20755  		v.AddArg(v0)
 20756  		return true
 20757  	}
 20758  }
 20759  func rewriteValue_OpLess32U(v *ssa.Value) bool {
 20760  	v_1 := v.Args[1]
 20761  	v_0 := v.Args[0]
 20762  	b := v.Block
 20763  	typ := &b.Func.Config.Types
 20764  	// match: (Less32U zero:(MOVDconst [0]) x)
 20765  	// result: (Neq32 zero x)
 20766  	for {
 20767  		zero := v_0
 20768  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20769  			break
 20770  		}
 20771  		x := v_1
 20772  		v.Reset(ssaop.OpNeq32)
 20773  		v.AddArg2(zero, x)
 20774  		return true
 20775  	}
 20776  	// match: (Less32U x (MOVDconst [1]))
 20777  	// result: (Eq32 x (MOVDconst [0]))
 20778  	for {
 20779  		x := v_0
 20780  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 20781  			break
 20782  		}
 20783  		v.Reset(ssaop.OpEq32)
 20784  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20785  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20786  		v.AddArg2(x, v0)
 20787  		return true
 20788  	}
 20789  	// match: (Less32U x y)
 20790  	// result: (LessThanU (CMPW x y))
 20791  	for {
 20792  		x := v_0
 20793  		y := v_1
 20794  		v.Reset(ssaop.OpARM64LessThanU)
 20795  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20796  		v0.AddArg2(x, y)
 20797  		v.AddArg(v0)
 20798  		return true
 20799  	}
 20800  }
 20801  func rewriteValue_OpLess64(v *ssa.Value) bool {
 20802  	v_1 := v.Args[1]
 20803  	v_0 := v.Args[0]
 20804  	b := v.Block
 20805  	// match: (Less64 x y)
 20806  	// result: (LessThan (CMP x y))
 20807  	for {
 20808  		x := v_0
 20809  		y := v_1
 20810  		v.Reset(ssaop.OpARM64LessThan)
 20811  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20812  		v0.AddArg2(x, y)
 20813  		v.AddArg(v0)
 20814  		return true
 20815  	}
 20816  }
 20817  func rewriteValue_OpLess64F(v *ssa.Value) bool {
 20818  	v_1 := v.Args[1]
 20819  	v_0 := v.Args[0]
 20820  	b := v.Block
 20821  	// match: (Less64F x y)
 20822  	// result: (LessThanF (FCMPD x y))
 20823  	for {
 20824  		x := v_0
 20825  		y := v_1
 20826  		v.Reset(ssaop.OpARM64LessThanF)
 20827  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 20828  		v0.AddArg2(x, y)
 20829  		v.AddArg(v0)
 20830  		return true
 20831  	}
 20832  }
 20833  func rewriteValue_OpLess64U(v *ssa.Value) bool {
 20834  	v_1 := v.Args[1]
 20835  	v_0 := v.Args[0]
 20836  	b := v.Block
 20837  	typ := &b.Func.Config.Types
 20838  	// match: (Less64U zero:(MOVDconst [0]) x)
 20839  	// result: (Neq64 zero x)
 20840  	for {
 20841  		zero := v_0
 20842  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20843  			break
 20844  		}
 20845  		x := v_1
 20846  		v.Reset(ssaop.OpNeq64)
 20847  		v.AddArg2(zero, x)
 20848  		return true
 20849  	}
 20850  	// match: (Less64U x (MOVDconst [1]))
 20851  	// result: (Eq64 x (MOVDconst [0]))
 20852  	for {
 20853  		x := v_0
 20854  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 20855  			break
 20856  		}
 20857  		v.Reset(ssaop.OpEq64)
 20858  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20859  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20860  		v.AddArg2(x, v0)
 20861  		return true
 20862  	}
 20863  	// match: (Less64U x y)
 20864  	// result: (LessThanU (CMP x y))
 20865  	for {
 20866  		x := v_0
 20867  		y := v_1
 20868  		v.Reset(ssaop.OpARM64LessThanU)
 20869  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20870  		v0.AddArg2(x, y)
 20871  		v.AddArg(v0)
 20872  		return true
 20873  	}
 20874  }
 20875  func rewriteValue_OpLess8(v *ssa.Value) bool {
 20876  	v_1 := v.Args[1]
 20877  	v_0 := v.Args[0]
 20878  	b := v.Block
 20879  	typ := &b.Func.Config.Types
 20880  	// match: (Less8 x y)
 20881  	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 20882  	for {
 20883  		x := v_0
 20884  		y := v_1
 20885  		v.Reset(ssaop.OpARM64LessThan)
 20886  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20887  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20888  		v1.AddArg(x)
 20889  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20890  		v2.AddArg(y)
 20891  		v0.AddArg2(v1, v2)
 20892  		v.AddArg(v0)
 20893  		return true
 20894  	}
 20895  }
 20896  func rewriteValue_OpLess8U(v *ssa.Value) bool {
 20897  	v_1 := v.Args[1]
 20898  	v_0 := v.Args[0]
 20899  	b := v.Block
 20900  	typ := &b.Func.Config.Types
 20901  	// match: (Less8U zero:(MOVDconst [0]) x)
 20902  	// result: (Neq8 zero x)
 20903  	for {
 20904  		zero := v_0
 20905  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20906  			break
 20907  		}
 20908  		x := v_1
 20909  		v.Reset(ssaop.OpNeq8)
 20910  		v.AddArg2(zero, x)
 20911  		return true
 20912  	}
 20913  	// match: (Less8U x (MOVDconst [1]))
 20914  	// result: (Eq8 x (MOVDconst [0]))
 20915  	for {
 20916  		x := v_0
 20917  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 20918  			break
 20919  		}
 20920  		v.Reset(ssaop.OpEq8)
 20921  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20922  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20923  		v.AddArg2(x, v0)
 20924  		return true
 20925  	}
 20926  	// match: (Less8U x y)
 20927  	// result: (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 20928  	for {
 20929  		x := v_0
 20930  		y := v_1
 20931  		v.Reset(ssaop.OpARM64LessThanU)
 20932  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20933  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20934  		v1.AddArg(x)
 20935  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20936  		v2.AddArg(y)
 20937  		v0.AddArg2(v1, v2)
 20938  		v.AddArg(v0)
 20939  		return true
 20940  	}
 20941  }
 20942  func rewriteValue_OpLoad(v *ssa.Value) bool {
 20943  	v_1 := v.Args[1]
 20944  	v_0 := v.Args[0]
 20945  	// match: (Load <t> ptr mem)
 20946  	// cond: t.IsBoolean()
 20947  	// result: (MOVBUload ptr mem)
 20948  	for {
 20949  		t := v.Type
 20950  		ptr := v_0
 20951  		mem := v_1
 20952  		if !(t.IsBoolean()) {
 20953  			break
 20954  		}
 20955  		v.Reset(ssaop.OpARM64MOVBUload)
 20956  		v.AddArg2(ptr, mem)
 20957  		return true
 20958  	}
 20959  	// match: (Load <t> ptr mem)
 20960  	// cond: (ssa.Is8BitInt(t) && t.IsSigned())
 20961  	// result: (MOVBload ptr mem)
 20962  	for {
 20963  		t := v.Type
 20964  		ptr := v_0
 20965  		mem := v_1
 20966  		if !(ssa.Is8BitInt(t) && t.IsSigned()) {
 20967  			break
 20968  		}
 20969  		v.Reset(ssaop.OpARM64MOVBload)
 20970  		v.AddArg2(ptr, mem)
 20971  		return true
 20972  	}
 20973  	// match: (Load <t> ptr mem)
 20974  	// cond: (ssa.Is8BitInt(t) && !t.IsSigned())
 20975  	// result: (MOVBUload ptr mem)
 20976  	for {
 20977  		t := v.Type
 20978  		ptr := v_0
 20979  		mem := v_1
 20980  		if !(ssa.Is8BitInt(t) && !t.IsSigned()) {
 20981  			break
 20982  		}
 20983  		v.Reset(ssaop.OpARM64MOVBUload)
 20984  		v.AddArg2(ptr, mem)
 20985  		return true
 20986  	}
 20987  	// match: (Load <t> ptr mem)
 20988  	// cond: (ssa.Is16BitInt(t) && t.IsSigned())
 20989  	// result: (MOVHload ptr mem)
 20990  	for {
 20991  		t := v.Type
 20992  		ptr := v_0
 20993  		mem := v_1
 20994  		if !(ssa.Is16BitInt(t) && t.IsSigned()) {
 20995  			break
 20996  		}
 20997  		v.Reset(ssaop.OpARM64MOVHload)
 20998  		v.AddArg2(ptr, mem)
 20999  		return true
 21000  	}
 21001  	// match: (Load <t> ptr mem)
 21002  	// cond: (ssa.Is16BitInt(t) && !t.IsSigned())
 21003  	// result: (MOVHUload ptr mem)
 21004  	for {
 21005  		t := v.Type
 21006  		ptr := v_0
 21007  		mem := v_1
 21008  		if !(ssa.Is16BitInt(t) && !t.IsSigned()) {
 21009  			break
 21010  		}
 21011  		v.Reset(ssaop.OpARM64MOVHUload)
 21012  		v.AddArg2(ptr, mem)
 21013  		return true
 21014  	}
 21015  	// match: (Load <t> ptr mem)
 21016  	// cond: (ssa.Is32BitInt(t) && t.IsSigned())
 21017  	// result: (MOVWload ptr mem)
 21018  	for {
 21019  		t := v.Type
 21020  		ptr := v_0
 21021  		mem := v_1
 21022  		if !(ssa.Is32BitInt(t) && t.IsSigned()) {
 21023  			break
 21024  		}
 21025  		v.Reset(ssaop.OpARM64MOVWload)
 21026  		v.AddArg2(ptr, mem)
 21027  		return true
 21028  	}
 21029  	// match: (Load <t> ptr mem)
 21030  	// cond: (ssa.Is32BitInt(t) && !t.IsSigned())
 21031  	// result: (MOVWUload ptr mem)
 21032  	for {
 21033  		t := v.Type
 21034  		ptr := v_0
 21035  		mem := v_1
 21036  		if !(ssa.Is32BitInt(t) && !t.IsSigned()) {
 21037  			break
 21038  		}
 21039  		v.Reset(ssaop.OpARM64MOVWUload)
 21040  		v.AddArg2(ptr, mem)
 21041  		return true
 21042  	}
 21043  	// match: (Load <t> ptr mem)
 21044  	// cond: (ssa.Is64BitInt(t) ||ssa.IsPtr(t))
 21045  	// result: (MOVDload ptr mem)
 21046  	for {
 21047  		t := v.Type
 21048  		ptr := v_0
 21049  		mem := v_1
 21050  		if !(ssa.Is64BitInt(t) || ssa.IsPtr(t)) {
 21051  			break
 21052  		}
 21053  		v.Reset(ssaop.OpARM64MOVDload)
 21054  		v.AddArg2(ptr, mem)
 21055  		return true
 21056  	}
 21057  	// match: (Load <t> ptr mem)
 21058  	// cond: ssa.Is32BitFloat(t)
 21059  	// result: (FMOVSload ptr mem)
 21060  	for {
 21061  		t := v.Type
 21062  		ptr := v_0
 21063  		mem := v_1
 21064  		if !(ssa.Is32BitFloat(t)) {
 21065  			break
 21066  		}
 21067  		v.Reset(ssaop.OpARM64FMOVSload)
 21068  		v.AddArg2(ptr, mem)
 21069  		return true
 21070  	}
 21071  	// match: (Load <t> ptr mem)
 21072  	// cond: ssa.Is64BitFloat(t)
 21073  	// result: (FMOVDload ptr mem)
 21074  	for {
 21075  		t := v.Type
 21076  		ptr := v_0
 21077  		mem := v_1
 21078  		if !(ssa.Is64BitFloat(t)) {
 21079  			break
 21080  		}
 21081  		v.Reset(ssaop.OpARM64FMOVDload)
 21082  		v.AddArg2(ptr, mem)
 21083  		return true
 21084  	}
 21085  	// match: (Load <t> ptr mem)
 21086  	// cond: t.Size() == 16
 21087  	// result: (FMOVQload ptr mem)
 21088  	for {
 21089  		t := v.Type
 21090  		ptr := v_0
 21091  		mem := v_1
 21092  		if !(t.Size() == 16) {
 21093  			break
 21094  		}
 21095  		v.Reset(ssaop.OpARM64FMOVQload)
 21096  		v.AddArg2(ptr, mem)
 21097  		return true
 21098  	}
 21099  	// match: (Load <t> ptr mem)
 21100  	// cond: t.Size() == 32 && t.IsSIMD()
 21101  	// result: (ZLDRload ptr mem)
 21102  	for {
 21103  		t := v.Type
 21104  		ptr := v_0
 21105  		mem := v_1
 21106  		if !(t.Size() == 32 && t.IsSIMD()) {
 21107  			break
 21108  		}
 21109  		v.Reset(ssaop.OpARM64ZLDRload)
 21110  		v.AddArg2(ptr, mem)
 21111  		return true
 21112  	}
 21113  	// match: (Load <t> ptr mem)
 21114  	// cond: t.Size() == 8 && t.IsSIMD()
 21115  	// result: (PLDRload ptr mem)
 21116  	for {
 21117  		t := v.Type
 21118  		ptr := v_0
 21119  		mem := v_1
 21120  		if !(t.Size() == 8 && t.IsSIMD()) {
 21121  			break
 21122  		}
 21123  		v.Reset(ssaop.OpARM64PLDRload)
 21124  		v.AddArg2(ptr, mem)
 21125  		return true
 21126  	}
 21127  	return false
 21128  }
 21129  func rewriteValue_OpLoadMasked8(v *ssa.Value) bool {
 21130  	v_2 := v.Args[2]
 21131  	v_1 := v.Args[1]
 21132  	v_0 := v.Args[0]
 21133  	// match: (LoadMasked8 <t> ptr mask mem)
 21134  	// cond: t.Size() == 32
 21135  	// result: (ZLD1BPredload ptr mask mem)
 21136  	for {
 21137  		t := v.Type
 21138  		ptr := v_0
 21139  		mask := v_1
 21140  		mem := v_2
 21141  		if !(t.Size() == 32) {
 21142  			break
 21143  		}
 21144  		v.Reset(ssaop.OpARM64ZLD1BPredload)
 21145  		v.AddArg3(ptr, mask, mem)
 21146  		return true
 21147  	}
 21148  	return false
 21149  }
 21150  func rewriteValue_OpLocalAddr(v *ssa.Value) bool {
 21151  	v_1 := v.Args[1]
 21152  	v_0 := v.Args[0]
 21153  	b := v.Block
 21154  	typ := &b.Func.Config.Types
 21155  	// match: (LocalAddr <t> {sym} base mem)
 21156  	// cond: t.Elem().HasPointers()
 21157  	// result: (MOVDaddr {sym} (SPanchored base mem))
 21158  	for {
 21159  		t := v.Type
 21160  		sym := ssa.AuxToSym(v.Aux)
 21161  		base := v_0
 21162  		mem := v_1
 21163  		if !(t.Elem().HasPointers()) {
 21164  			break
 21165  		}
 21166  		v.Reset(ssaop.OpARM64MOVDaddr)
 21167  		v.Aux = ssa.SymToAux(sym)
 21168  		v0 := b.NewValue0(v.Pos, ssaop.OpSPanchored, typ.Uintptr)
 21169  		v0.AddArg2(base, mem)
 21170  		v.AddArg(v0)
 21171  		return true
 21172  	}
 21173  	// match: (LocalAddr <t> {sym} base _)
 21174  	// cond: !t.Elem().HasPointers()
 21175  	// result: (MOVDaddr {sym} base)
 21176  	for {
 21177  		t := v.Type
 21178  		sym := ssa.AuxToSym(v.Aux)
 21179  		base := v_0
 21180  		if !(!t.Elem().HasPointers()) {
 21181  			break
 21182  		}
 21183  		v.Reset(ssaop.OpARM64MOVDaddr)
 21184  		v.Aux = ssa.SymToAux(sym)
 21185  		v.AddArg(base)
 21186  		return true
 21187  	}
 21188  	return false
 21189  }
 21190  func rewriteValue_OpLsh64x16(v *ssa.Value) bool {
 21191  	v_1 := v.Args[1]
 21192  	v_0 := v.Args[0]
 21193  	b := v.Block
 21194  	typ := &b.Func.Config.Types
 21195  	// match: (Lsh64x16 <t> x y)
 21196  	// cond: ssa.ShiftIsBounded(v)
 21197  	// result: (SLL <t> x y)
 21198  	for {
 21199  		t := v.Type
 21200  		x := v_0
 21201  		y := v_1
 21202  		if !(ssa.ShiftIsBounded(v)) {
 21203  			break
 21204  		}
 21205  		v.Reset(ssaop.OpARM64SLL)
 21206  		v.Type = t
 21207  		v.AddArg2(x, y)
 21208  		return true
 21209  	}
 21210  	// match: (Lsh64x16 <t> [bounded] x y)
 21211  	// cond: !ssa.ShiftIsBounded(v)
 21212  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 21213  	for {
 21214  		t := v.Type
 21215  		bounded := ssa.AuxIntToBool(v.AuxInt)
 21216  		x := v_0
 21217  		y := v_1
 21218  		if !(!ssa.ShiftIsBounded(v)) {
 21219  			break
 21220  		}
 21221  		v.Reset(ssaop.OpLsh64x32)
 21222  		v.Type = t
 21223  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 21224  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 21225  		v0.AddArg(y)
 21226  		v.AddArg2(x, v0)
 21227  		return true
 21228  	}
 21229  	return false
 21230  }
 21231  func rewriteValue_OpLsh64x32(v *ssa.Value) bool {
 21232  	v_1 := v.Args[1]
 21233  	v_0 := v.Args[0]
 21234  	b := v.Block
 21235  	// match: (Lsh64x32 <t> x y)
 21236  	// cond: ssa.ShiftIsBounded(v)
 21237  	// result: (SLL <t> x y)
 21238  	for {
 21239  		t := v.Type
 21240  		x := v_0
 21241  		y := v_1
 21242  		if !(ssa.ShiftIsBounded(v)) {
 21243  			break
 21244  		}
 21245  		v.Reset(ssaop.OpARM64SLL)
 21246  		v.Type = t
 21247  		v.AddArg2(x, y)
 21248  		return true
 21249  	}
 21250  	// match: (Lsh64x32 <t> x y)
 21251  	// cond: !ssa.ShiftIsBounded(v)
 21252  	// result: (CSEL [ssaop.OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 21253  	for {
 21254  		t := v.Type
 21255  		x := v_0
 21256  		y := v_1
 21257  		if !(!ssa.ShiftIsBounded(v)) {
 21258  			break
 21259  		}
 21260  		v.Reset(ssaop.OpARM64CSEL)
 21261  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 21262  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 21263  		v0.AddArg2(x, y)
 21264  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 21265  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 21266  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 21267  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 21268  		v2.AddArg(y)
 21269  		v.AddArg3(v0, v1, v2)
 21270  		return true
 21271  	}
 21272  	return false
 21273  }
 21274  func rewriteValue_OpLsh64x64(v *ssa.Value) bool {
 21275  	v_1 := v.Args[1]
 21276  	v_0 := v.Args[0]
 21277  	b := v.Block
 21278  	// match: (Lsh64x64 <t> x y)
 21279  	// cond: ssa.ShiftIsBounded(v)
 21280  	// result: (SLL <t> x y)
 21281  	for {
 21282  		t := v.Type
 21283  		x := v_0
 21284  		y := v_1
 21285  		if !(ssa.ShiftIsBounded(v)) {
 21286  			break
 21287  		}
 21288  		v.Reset(ssaop.OpARM64SLL)
 21289  		v.Type = t
 21290  		v.AddArg2(x, y)
 21291  		return true
 21292  	}
 21293  	// match: (Lsh64x64 <t> x y)
 21294  	// cond: !ssa.ShiftIsBounded(v)
 21295  	// result: (CSEL [ssaop.OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 21296  	for {
 21297  		t := v.Type
 21298  		x := v_0
 21299  		y := v_1
 21300  		if !(!ssa.ShiftIsBounded(v)) {
 21301  			break
 21302  		}
 21303  		v.Reset(ssaop.OpARM64CSEL)
 21304  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 21305  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 21306  		v0.AddArg2(x, y)
 21307  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 21308  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 21309  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 21310  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 21311  		v2.AddArg(y)
 21312  		v.AddArg3(v0, v1, v2)
 21313  		return true
 21314  	}
 21315  	return false
 21316  }
 21317  func rewriteValue_OpLsh64x8(v *ssa.Value) bool {
 21318  	v_1 := v.Args[1]
 21319  	v_0 := v.Args[0]
 21320  	b := v.Block
 21321  	typ := &b.Func.Config.Types
 21322  	// match: (Lsh64x8 <t> x y)
 21323  	// cond: ssa.ShiftIsBounded(v)
 21324  	// result: (SLL <t> x y)
 21325  	for {
 21326  		t := v.Type
 21327  		x := v_0
 21328  		y := v_1
 21329  		if !(ssa.ShiftIsBounded(v)) {
 21330  			break
 21331  		}
 21332  		v.Reset(ssaop.OpARM64SLL)
 21333  		v.Type = t
 21334  		v.AddArg2(x, y)
 21335  		return true
 21336  	}
 21337  	// match: (Lsh64x8 <t> [bounded] x y)
 21338  	// cond: !ssa.ShiftIsBounded(v)
 21339  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 21340  	for {
 21341  		t := v.Type
 21342  		bounded := ssa.AuxIntToBool(v.AuxInt)
 21343  		x := v_0
 21344  		y := v_1
 21345  		if !(!ssa.ShiftIsBounded(v)) {
 21346  			break
 21347  		}
 21348  		v.Reset(ssaop.OpLsh64x32)
 21349  		v.Type = t
 21350  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 21351  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 21352  		v0.AddArg(y)
 21353  		v.AddArg2(x, v0)
 21354  		return true
 21355  	}
 21356  	return false
 21357  }
 21358  func rewriteValue_OpMax32FSel(v *ssa.Value) bool {
 21359  	v_1 := v.Args[1]
 21360  	v_0 := v.Args[0]
 21361  	b := v.Block
 21362  	// match: (Max32FSel x y)
 21363  	// result: (FCSELS [ssaop.OpARM64GreaterThanF] x y (FCMPS x y))
 21364  	for {
 21365  		x := v_0
 21366  		y := v_1
 21367  		v.Reset(ssaop.OpARM64FCSELS)
 21368  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64GreaterThanF)
 21369  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 21370  		v0.AddArg2(x, y)
 21371  		v.AddArg3(x, y, v0)
 21372  		return true
 21373  	}
 21374  }
 21375  func rewriteValue_OpMax64FSel(v *ssa.Value) bool {
 21376  	v_1 := v.Args[1]
 21377  	v_0 := v.Args[0]
 21378  	b := v.Block
 21379  	// match: (Max64FSel x y)
 21380  	// result: (FCSELD [ssaop.OpARM64GreaterThanF] x y (FCMPD x y))
 21381  	for {
 21382  		x := v_0
 21383  		y := v_1
 21384  		v.Reset(ssaop.OpARM64FCSELD)
 21385  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64GreaterThanF)
 21386  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 21387  		v0.AddArg2(x, y)
 21388  		v.AddArg3(x, y, v0)
 21389  		return true
 21390  	}
 21391  }
 21392  func rewriteValue_OpMin32FSel(v *ssa.Value) bool {
 21393  	v_1 := v.Args[1]
 21394  	v_0 := v.Args[0]
 21395  	b := v.Block
 21396  	// match: (Min32FSel x y)
 21397  	// result: (FCSELS [ssaop.OpARM64LessThanF] x y (FCMPS x y))
 21398  	for {
 21399  		x := v_0
 21400  		y := v_1
 21401  		v.Reset(ssaop.OpARM64FCSELS)
 21402  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanF)
 21403  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 21404  		v0.AddArg2(x, y)
 21405  		v.AddArg3(x, y, v0)
 21406  		return true
 21407  	}
 21408  }
 21409  func rewriteValue_OpMin64FSel(v *ssa.Value) bool {
 21410  	v_1 := v.Args[1]
 21411  	v_0 := v.Args[0]
 21412  	b := v.Block
 21413  	// match: (Min64FSel x y)
 21414  	// result: (FCSELD [ssaop.OpARM64LessThanF] x y (FCMPD x y))
 21415  	for {
 21416  		x := v_0
 21417  		y := v_1
 21418  		v.Reset(ssaop.OpARM64FCSELD)
 21419  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanF)
 21420  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 21421  		v0.AddArg2(x, y)
 21422  		v.AddArg3(x, y, v0)
 21423  		return true
 21424  	}
 21425  }
 21426  func rewriteValue_OpMod16(v *ssa.Value) bool {
 21427  	v_1 := v.Args[1]
 21428  	v_0 := v.Args[0]
 21429  	b := v.Block
 21430  	typ := &b.Func.Config.Types
 21431  	// match: (Mod16 x y)
 21432  	// result: (MODW (SignExt16to32 x) (SignExt16to32 y))
 21433  	for {
 21434  		x := v_0
 21435  		y := v_1
 21436  		v.Reset(ssaop.OpARM64MODW)
 21437  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 21438  		v0.AddArg(x)
 21439  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 21440  		v1.AddArg(y)
 21441  		v.AddArg2(v0, v1)
 21442  		return true
 21443  	}
 21444  }
 21445  func rewriteValue_OpMod16u(v *ssa.Value) bool {
 21446  	v_1 := v.Args[1]
 21447  	v_0 := v.Args[0]
 21448  	b := v.Block
 21449  	typ := &b.Func.Config.Types
 21450  	// match: (Mod16u x y)
 21451  	// result: (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y))
 21452  	for {
 21453  		x := v_0
 21454  		y := v_1
 21455  		v.Reset(ssaop.OpARM64UMODW)
 21456  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 21457  		v0.AddArg(x)
 21458  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 21459  		v1.AddArg(y)
 21460  		v.AddArg2(v0, v1)
 21461  		return true
 21462  	}
 21463  }
 21464  func rewriteValue_OpMod32(v *ssa.Value) bool {
 21465  	v_1 := v.Args[1]
 21466  	v_0 := v.Args[0]
 21467  	// match: (Mod32 x y)
 21468  	// result: (MODW x y)
 21469  	for {
 21470  		x := v_0
 21471  		y := v_1
 21472  		v.Reset(ssaop.OpARM64MODW)
 21473  		v.AddArg2(x, y)
 21474  		return true
 21475  	}
 21476  }
 21477  func rewriteValue_OpMod64(v *ssa.Value) bool {
 21478  	v_1 := v.Args[1]
 21479  	v_0 := v.Args[0]
 21480  	// match: (Mod64 x y)
 21481  	// result: (MOD x y)
 21482  	for {
 21483  		x := v_0
 21484  		y := v_1
 21485  		v.Reset(ssaop.OpARM64MOD)
 21486  		v.AddArg2(x, y)
 21487  		return true
 21488  	}
 21489  }
 21490  func rewriteValue_OpMod8(v *ssa.Value) bool {
 21491  	v_1 := v.Args[1]
 21492  	v_0 := v.Args[0]
 21493  	b := v.Block
 21494  	typ := &b.Func.Config.Types
 21495  	// match: (Mod8 x y)
 21496  	// result: (MODW (SignExt8to32 x) (SignExt8to32 y))
 21497  	for {
 21498  		x := v_0
 21499  		y := v_1
 21500  		v.Reset(ssaop.OpARM64MODW)
 21501  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 21502  		v0.AddArg(x)
 21503  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 21504  		v1.AddArg(y)
 21505  		v.AddArg2(v0, v1)
 21506  		return true
 21507  	}
 21508  }
 21509  func rewriteValue_OpMod8u(v *ssa.Value) bool {
 21510  	v_1 := v.Args[1]
 21511  	v_0 := v.Args[0]
 21512  	b := v.Block
 21513  	typ := &b.Func.Config.Types
 21514  	// match: (Mod8u x y)
 21515  	// result: (UMODW (ZeroExt8to32 x) (ZeroExt8to32 y))
 21516  	for {
 21517  		x := v_0
 21518  		y := v_1
 21519  		v.Reset(ssaop.OpARM64UMODW)
 21520  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 21521  		v0.AddArg(x)
 21522  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 21523  		v1.AddArg(y)
 21524  		v.AddArg2(v0, v1)
 21525  		return true
 21526  	}
 21527  }
 21528  func rewriteValue_OpMove(v *ssa.Value) bool {
 21529  	v_2 := v.Args[2]
 21530  	v_1 := v.Args[1]
 21531  	v_0 := v.Args[0]
 21532  	b := v.Block
 21533  	typ := &b.Func.Config.Types
 21534  	// match: (Move [0] _ _ mem)
 21535  	// result: mem
 21536  	for {
 21537  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 21538  			break
 21539  		}
 21540  		mem := v_2
 21541  		v.CopyOf(mem)
 21542  		return true
 21543  	}
 21544  	// match: (Move [1] dst src mem)
 21545  	// result: (MOVBstore dst (MOVBUload src mem) mem)
 21546  	for {
 21547  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
 21548  			break
 21549  		}
 21550  		dst := v_0
 21551  		src := v_1
 21552  		mem := v_2
 21553  		v.Reset(ssaop.OpARM64MOVBstore)
 21554  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 21555  		v0.AddArg2(src, mem)
 21556  		v.AddArg3(dst, v0, mem)
 21557  		return true
 21558  	}
 21559  	// match: (Move [2] dst src mem)
 21560  	// result: (MOVHstore dst (MOVHUload src mem) mem)
 21561  	for {
 21562  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
 21563  			break
 21564  		}
 21565  		dst := v_0
 21566  		src := v_1
 21567  		mem := v_2
 21568  		v.Reset(ssaop.OpARM64MOVHstore)
 21569  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 21570  		v0.AddArg2(src, mem)
 21571  		v.AddArg3(dst, v0, mem)
 21572  		return true
 21573  	}
 21574  	// match: (Move [3] dst src mem)
 21575  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
 21576  	for {
 21577  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
 21578  			break
 21579  		}
 21580  		dst := v_0
 21581  		src := v_1
 21582  		mem := v_2
 21583  		v.Reset(ssaop.OpARM64MOVBstore)
 21584  		v.AuxInt = ssa.Int32ToAuxInt(2)
 21585  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 21586  		v0.AuxInt = ssa.Int32ToAuxInt(2)
 21587  		v0.AddArg2(src, mem)
 21588  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHstore, types.TypeMem)
 21589  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 21590  		v2.AddArg2(src, mem)
 21591  		v1.AddArg3(dst, v2, mem)
 21592  		v.AddArg3(dst, v0, v1)
 21593  		return true
 21594  	}
 21595  	// match: (Move [4] dst src mem)
 21596  	// result: (MOVWstore dst (MOVWUload src mem) mem)
 21597  	for {
 21598  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
 21599  			break
 21600  		}
 21601  		dst := v_0
 21602  		src := v_1
 21603  		mem := v_2
 21604  		v.Reset(ssaop.OpARM64MOVWstore)
 21605  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21606  		v0.AddArg2(src, mem)
 21607  		v.AddArg3(dst, v0, mem)
 21608  		return true
 21609  	}
 21610  	// match: (Move [5] dst src mem)
 21611  	// result: (MOVBstore [4] dst (MOVBUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 21612  	for {
 21613  		if ssa.AuxIntToInt64(v.AuxInt) != 5 {
 21614  			break
 21615  		}
 21616  		dst := v_0
 21617  		src := v_1
 21618  		mem := v_2
 21619  		v.Reset(ssaop.OpARM64MOVBstore)
 21620  		v.AuxInt = ssa.Int32ToAuxInt(4)
 21621  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 21622  		v0.AuxInt = ssa.Int32ToAuxInt(4)
 21623  		v0.AddArg2(src, mem)
 21624  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 21625  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21626  		v2.AddArg2(src, mem)
 21627  		v1.AddArg3(dst, v2, mem)
 21628  		v.AddArg3(dst, v0, v1)
 21629  		return true
 21630  	}
 21631  	// match: (Move [6] dst src mem)
 21632  	// result: (MOVHstore [4] dst (MOVHUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 21633  	for {
 21634  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
 21635  			break
 21636  		}
 21637  		dst := v_0
 21638  		src := v_1
 21639  		mem := v_2
 21640  		v.Reset(ssaop.OpARM64MOVHstore)
 21641  		v.AuxInt = ssa.Int32ToAuxInt(4)
 21642  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 21643  		v0.AuxInt = ssa.Int32ToAuxInt(4)
 21644  		v0.AddArg2(src, mem)
 21645  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 21646  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21647  		v2.AddArg2(src, mem)
 21648  		v1.AddArg3(dst, v2, mem)
 21649  		v.AddArg3(dst, v0, v1)
 21650  		return true
 21651  	}
 21652  	// match: (Move [7] dst src mem)
 21653  	// result: (MOVWstore [3] dst (MOVWUload [3] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 21654  	for {
 21655  		if ssa.AuxIntToInt64(v.AuxInt) != 7 {
 21656  			break
 21657  		}
 21658  		dst := v_0
 21659  		src := v_1
 21660  		mem := v_2
 21661  		v.Reset(ssaop.OpARM64MOVWstore)
 21662  		v.AuxInt = ssa.Int32ToAuxInt(3)
 21663  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21664  		v0.AuxInt = ssa.Int32ToAuxInt(3)
 21665  		v0.AddArg2(src, mem)
 21666  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 21667  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21668  		v2.AddArg2(src, mem)
 21669  		v1.AddArg3(dst, v2, mem)
 21670  		v.AddArg3(dst, v0, v1)
 21671  		return true
 21672  	}
 21673  	// match: (Move [8] dst src mem)
 21674  	// result: (MOVDstore dst (MOVDload src mem) mem)
 21675  	for {
 21676  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
 21677  			break
 21678  		}
 21679  		dst := v_0
 21680  		src := v_1
 21681  		mem := v_2
 21682  		v.Reset(ssaop.OpARM64MOVDstore)
 21683  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21684  		v0.AddArg2(src, mem)
 21685  		v.AddArg3(dst, v0, mem)
 21686  		return true
 21687  	}
 21688  	// match: (Move [9] dst src mem)
 21689  	// result: (MOVBstore [8] dst (MOVBUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21690  	for {
 21691  		if ssa.AuxIntToInt64(v.AuxInt) != 9 {
 21692  			break
 21693  		}
 21694  		dst := v_0
 21695  		src := v_1
 21696  		mem := v_2
 21697  		v.Reset(ssaop.OpARM64MOVBstore)
 21698  		v.AuxInt = ssa.Int32ToAuxInt(8)
 21699  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 21700  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 21701  		v0.AddArg2(src, mem)
 21702  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21703  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21704  		v2.AddArg2(src, mem)
 21705  		v1.AddArg3(dst, v2, mem)
 21706  		v.AddArg3(dst, v0, v1)
 21707  		return true
 21708  	}
 21709  	// match: (Move [10] dst src mem)
 21710  	// result: (MOVHstore [8] dst (MOVHUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21711  	for {
 21712  		if ssa.AuxIntToInt64(v.AuxInt) != 10 {
 21713  			break
 21714  		}
 21715  		dst := v_0
 21716  		src := v_1
 21717  		mem := v_2
 21718  		v.Reset(ssaop.OpARM64MOVHstore)
 21719  		v.AuxInt = ssa.Int32ToAuxInt(8)
 21720  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 21721  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 21722  		v0.AddArg2(src, mem)
 21723  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21724  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21725  		v2.AddArg2(src, mem)
 21726  		v1.AddArg3(dst, v2, mem)
 21727  		v.AddArg3(dst, v0, v1)
 21728  		return true
 21729  	}
 21730  	// match: (Move [11] dst src mem)
 21731  	// result: (MOVDstore [3] dst (MOVDload [3] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21732  	for {
 21733  		if ssa.AuxIntToInt64(v.AuxInt) != 11 {
 21734  			break
 21735  		}
 21736  		dst := v_0
 21737  		src := v_1
 21738  		mem := v_2
 21739  		v.Reset(ssaop.OpARM64MOVDstore)
 21740  		v.AuxInt = ssa.Int32ToAuxInt(3)
 21741  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21742  		v0.AuxInt = ssa.Int32ToAuxInt(3)
 21743  		v0.AddArg2(src, mem)
 21744  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21745  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21746  		v2.AddArg2(src, mem)
 21747  		v1.AddArg3(dst, v2, mem)
 21748  		v.AddArg3(dst, v0, v1)
 21749  		return true
 21750  	}
 21751  	// match: (Move [12] dst src mem)
 21752  	// result: (MOVWstore [8] dst (MOVWUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21753  	for {
 21754  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
 21755  			break
 21756  		}
 21757  		dst := v_0
 21758  		src := v_1
 21759  		mem := v_2
 21760  		v.Reset(ssaop.OpARM64MOVWstore)
 21761  		v.AuxInt = ssa.Int32ToAuxInt(8)
 21762  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21763  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 21764  		v0.AddArg2(src, mem)
 21765  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21766  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21767  		v2.AddArg2(src, mem)
 21768  		v1.AddArg3(dst, v2, mem)
 21769  		v.AddArg3(dst, v0, v1)
 21770  		return true
 21771  	}
 21772  	// match: (Move [13] dst src mem)
 21773  	// result: (MOVDstore [5] dst (MOVDload [5] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21774  	for {
 21775  		if ssa.AuxIntToInt64(v.AuxInt) != 13 {
 21776  			break
 21777  		}
 21778  		dst := v_0
 21779  		src := v_1
 21780  		mem := v_2
 21781  		v.Reset(ssaop.OpARM64MOVDstore)
 21782  		v.AuxInt = ssa.Int32ToAuxInt(5)
 21783  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21784  		v0.AuxInt = ssa.Int32ToAuxInt(5)
 21785  		v0.AddArg2(src, mem)
 21786  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21787  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21788  		v2.AddArg2(src, mem)
 21789  		v1.AddArg3(dst, v2, mem)
 21790  		v.AddArg3(dst, v0, v1)
 21791  		return true
 21792  	}
 21793  	// match: (Move [14] dst src mem)
 21794  	// result: (MOVDstore [6] dst (MOVDload [6] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21795  	for {
 21796  		if ssa.AuxIntToInt64(v.AuxInt) != 14 {
 21797  			break
 21798  		}
 21799  		dst := v_0
 21800  		src := v_1
 21801  		mem := v_2
 21802  		v.Reset(ssaop.OpARM64MOVDstore)
 21803  		v.AuxInt = ssa.Int32ToAuxInt(6)
 21804  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21805  		v0.AuxInt = ssa.Int32ToAuxInt(6)
 21806  		v0.AddArg2(src, mem)
 21807  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21808  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21809  		v2.AddArg2(src, mem)
 21810  		v1.AddArg3(dst, v2, mem)
 21811  		v.AddArg3(dst, v0, v1)
 21812  		return true
 21813  	}
 21814  	// match: (Move [15] dst src mem)
 21815  	// result: (MOVDstore [7] dst (MOVDload [7] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21816  	for {
 21817  		if ssa.AuxIntToInt64(v.AuxInt) != 15 {
 21818  			break
 21819  		}
 21820  		dst := v_0
 21821  		src := v_1
 21822  		mem := v_2
 21823  		v.Reset(ssaop.OpARM64MOVDstore)
 21824  		v.AuxInt = ssa.Int32ToAuxInt(7)
 21825  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21826  		v0.AuxInt = ssa.Int32ToAuxInt(7)
 21827  		v0.AddArg2(src, mem)
 21828  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21829  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21830  		v2.AddArg2(src, mem)
 21831  		v1.AddArg3(dst, v2, mem)
 21832  		v.AddArg3(dst, v0, v1)
 21833  		return true
 21834  	}
 21835  	// match: (Move [16] dst src mem)
 21836  	// result: (FMOVQstore dst (FMOVQload src mem) mem)
 21837  	for {
 21838  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
 21839  			break
 21840  		}
 21841  		dst := v_0
 21842  		src := v_1
 21843  		mem := v_2
 21844  		v.Reset(ssaop.OpARM64FMOVQstore)
 21845  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 21846  		v0.AddArg2(src, mem)
 21847  		v.AddArg3(dst, v0, mem)
 21848  		return true
 21849  	}
 21850  	// match: (Move [s] dst src mem)
 21851  	// cond: s > 16 && s <= 24
 21852  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 21853  	for {
 21854  		s := ssa.AuxIntToInt64(v.AuxInt)
 21855  		dst := v_0
 21856  		src := v_1
 21857  		mem := v_2
 21858  		if !(s > 16 && s <= 24) {
 21859  			break
 21860  		}
 21861  		v.Reset(ssaop.OpARM64MOVDstore)
 21862  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 21863  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21864  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 21865  		v0.AddArg2(src, mem)
 21866  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQstore, types.TypeMem)
 21867  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 21868  		v2.AddArg2(src, mem)
 21869  		v1.AddArg3(dst, v2, mem)
 21870  		v.AddArg3(dst, v0, v1)
 21871  		return true
 21872  	}
 21873  	// match: (Move [s] dst src mem)
 21874  	// cond: s > 24 && s < 32
 21875  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 21876  	for {
 21877  		s := ssa.AuxIntToInt64(v.AuxInt)
 21878  		dst := v_0
 21879  		src := v_1
 21880  		mem := v_2
 21881  		if !(s > 24 && s < 32) {
 21882  			break
 21883  		}
 21884  		v.Reset(ssaop.OpARM64FMOVQstore)
 21885  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 21886  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 21887  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 21888  		v0.AddArg2(src, mem)
 21889  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQstore, types.TypeMem)
 21890  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 21891  		v2.AddArg2(src, mem)
 21892  		v1.AddArg3(dst, v2, mem)
 21893  		v.AddArg3(dst, v0, v1)
 21894  		return true
 21895  	}
 21896  	// match: (Move [32] dst src mem)
 21897  	// result: (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem)
 21898  	for {
 21899  		if ssa.AuxIntToInt64(v.AuxInt) != 32 {
 21900  			break
 21901  		}
 21902  		dst := v_0
 21903  		src := v_1
 21904  		mem := v_2
 21905  		v.Reset(ssaop.OpARM64FSTPQ)
 21906  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 21907  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 21908  		v1.AddArg2(src, mem)
 21909  		v0.AddArg(v1)
 21910  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 21911  		v2.AddArg(v1)
 21912  		v.AddArg4(dst, v0, v2, mem)
 21913  		return true
 21914  	}
 21915  	// match: (Move [s] dst src mem)
 21916  	// cond: s > 32 && s <= 40
 21917  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 21918  	for {
 21919  		s := ssa.AuxIntToInt64(v.AuxInt)
 21920  		dst := v_0
 21921  		src := v_1
 21922  		mem := v_2
 21923  		if !(s > 32 && s <= 40) {
 21924  			break
 21925  		}
 21926  		v.Reset(ssaop.OpARM64MOVDstore)
 21927  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 21928  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21929  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 21930  		v0.AddArg2(src, mem)
 21931  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 21932  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 21933  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 21934  		v3.AddArg2(src, mem)
 21935  		v2.AddArg(v3)
 21936  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 21937  		v4.AddArg(v3)
 21938  		v1.AddArg4(dst, v2, v4, mem)
 21939  		v.AddArg3(dst, v0, v1)
 21940  		return true
 21941  	}
 21942  	// match: (Move [s] dst src mem)
 21943  	// cond: s > 40 && s <= 48
 21944  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 21945  	for {
 21946  		s := ssa.AuxIntToInt64(v.AuxInt)
 21947  		dst := v_0
 21948  		src := v_1
 21949  		mem := v_2
 21950  		if !(s > 40 && s <= 48) {
 21951  			break
 21952  		}
 21953  		v.Reset(ssaop.OpARM64FMOVQstore)
 21954  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 21955  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 21956  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 21957  		v0.AddArg2(src, mem)
 21958  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 21959  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 21960  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 21961  		v3.AddArg2(src, mem)
 21962  		v2.AddArg(v3)
 21963  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 21964  		v4.AddArg(v3)
 21965  		v1.AddArg4(dst, v2, v4, mem)
 21966  		v.AddArg3(dst, v0, v1)
 21967  		return true
 21968  	}
 21969  	// match: (Move [s] dst src mem)
 21970  	// cond: s > 48 && s <= 64
 21971  	// result: (FSTPQ [int32(s-32)] dst (Select0 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (Select1 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 21972  	for {
 21973  		s := ssa.AuxIntToInt64(v.AuxInt)
 21974  		dst := v_0
 21975  		src := v_1
 21976  		mem := v_2
 21977  		if !(s > 48 && s <= 64) {
 21978  			break
 21979  		}
 21980  		v.Reset(ssaop.OpARM64FSTPQ)
 21981  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 32))
 21982  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 21983  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 21984  		v1.AuxInt = ssa.Int32ToAuxInt(int32(s - 32))
 21985  		v1.AddArg2(src, mem)
 21986  		v0.AddArg(v1)
 21987  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 21988  		v2.AddArg(v1)
 21989  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 21990  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 21991  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 21992  		v5.AddArg2(src, mem)
 21993  		v4.AddArg(v5)
 21994  		v6 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 21995  		v6.AddArg(v5)
 21996  		v3.AddArg4(dst, v4, v6, mem)
 21997  		v.AddArg4(dst, v0, v2, v3)
 21998  		return true
 21999  	}
 22000  	// match: (Move [s] dst src mem)
 22001  	// cond: s > 64 && s < 192 && ssa.LogLargeCopyValue(v, s)
 22002  	// result: (LoweredMove [s] dst src mem)
 22003  	for {
 22004  		s := ssa.AuxIntToInt64(v.AuxInt)
 22005  		dst := v_0
 22006  		src := v_1
 22007  		mem := v_2
 22008  		if !(s > 64 && s < 192 && ssa.LogLargeCopyValue(v, s)) {
 22009  			break
 22010  		}
 22011  		v.Reset(ssaop.OpARM64LoweredMove)
 22012  		v.AuxInt = ssa.Int64ToAuxInt(s)
 22013  		v.AddArg3(dst, src, mem)
 22014  		return true
 22015  	}
 22016  	// match: (Move [s] dst src mem)
 22017  	// cond: s >= 192 && ssa.LogLargeCopyValue(v, s)
 22018  	// result: (LoweredMoveLoop [s] dst src mem)
 22019  	for {
 22020  		s := ssa.AuxIntToInt64(v.AuxInt)
 22021  		dst := v_0
 22022  		src := v_1
 22023  		mem := v_2
 22024  		if !(s >= 192 && ssa.LogLargeCopyValue(v, s)) {
 22025  			break
 22026  		}
 22027  		v.Reset(ssaop.OpARM64LoweredMoveLoop)
 22028  		v.AuxInt = ssa.Int64ToAuxInt(s)
 22029  		v.AddArg3(dst, src, mem)
 22030  		return true
 22031  	}
 22032  	return false
 22033  }
 22034  func rewriteValue_OpMulAddFloat32x4(v *ssa.Value) bool {
 22035  	v_2 := v.Args[2]
 22036  	v_1 := v.Args[1]
 22037  	v_0 := v.Args[0]
 22038  	// match: (MulAddFloat32x4 x y z)
 22039  	// result: (VFMLA4S z x y)
 22040  	for {
 22041  		x := v_0
 22042  		y := v_1
 22043  		z := v_2
 22044  		v.Reset(ssaop.OpARM64VFMLA4S)
 22045  		v.AddArg3(z, x, y)
 22046  		return true
 22047  	}
 22048  }
 22049  func rewriteValue_OpMulAddFloat64x2(v *ssa.Value) bool {
 22050  	v_2 := v.Args[2]
 22051  	v_1 := v.Args[1]
 22052  	v_0 := v.Args[0]
 22053  	// match: (MulAddFloat64x2 x y z)
 22054  	// result: (VFMLA2D z x y)
 22055  	for {
 22056  		x := v_0
 22057  		y := v_1
 22058  		z := v_2
 22059  		v.Reset(ssaop.OpARM64VFMLA2D)
 22060  		v.AddArg3(z, x, y)
 22061  		return true
 22062  	}
 22063  }
 22064  func rewriteValue_OpMulAddInt16x8(v *ssa.Value) bool {
 22065  	v_2 := v.Args[2]
 22066  	v_1 := v.Args[1]
 22067  	v_0 := v.Args[0]
 22068  	// match: (MulAddInt16x8 x y z)
 22069  	// result: (VMLA8H z x y)
 22070  	for {
 22071  		x := v_0
 22072  		y := v_1
 22073  		z := v_2
 22074  		v.Reset(ssaop.OpARM64VMLA8H)
 22075  		v.AddArg3(z, x, y)
 22076  		return true
 22077  	}
 22078  }
 22079  func rewriteValue_OpMulAddInt32x4(v *ssa.Value) bool {
 22080  	v_2 := v.Args[2]
 22081  	v_1 := v.Args[1]
 22082  	v_0 := v.Args[0]
 22083  	// match: (MulAddInt32x4 x y z)
 22084  	// result: (VMLA4S z x y)
 22085  	for {
 22086  		x := v_0
 22087  		y := v_1
 22088  		z := v_2
 22089  		v.Reset(ssaop.OpARM64VMLA4S)
 22090  		v.AddArg3(z, x, y)
 22091  		return true
 22092  	}
 22093  }
 22094  func rewriteValue_OpMulAddInt8x16(v *ssa.Value) bool {
 22095  	v_2 := v.Args[2]
 22096  	v_1 := v.Args[1]
 22097  	v_0 := v.Args[0]
 22098  	// match: (MulAddInt8x16 x y z)
 22099  	// result: (VMLA16B z x y)
 22100  	for {
 22101  		x := v_0
 22102  		y := v_1
 22103  		z := v_2
 22104  		v.Reset(ssaop.OpARM64VMLA16B)
 22105  		v.AddArg3(z, x, y)
 22106  		return true
 22107  	}
 22108  }
 22109  func rewriteValue_OpMulAddUint16x8(v *ssa.Value) bool {
 22110  	v_2 := v.Args[2]
 22111  	v_1 := v.Args[1]
 22112  	v_0 := v.Args[0]
 22113  	// match: (MulAddUint16x8 x y z)
 22114  	// result: (VMLA8H z x y)
 22115  	for {
 22116  		x := v_0
 22117  		y := v_1
 22118  		z := v_2
 22119  		v.Reset(ssaop.OpARM64VMLA8H)
 22120  		v.AddArg3(z, x, y)
 22121  		return true
 22122  	}
 22123  }
 22124  func rewriteValue_OpMulAddUint32x4(v *ssa.Value) bool {
 22125  	v_2 := v.Args[2]
 22126  	v_1 := v.Args[1]
 22127  	v_0 := v.Args[0]
 22128  	// match: (MulAddUint32x4 x y z)
 22129  	// result: (VMLA4S z x y)
 22130  	for {
 22131  		x := v_0
 22132  		y := v_1
 22133  		z := v_2
 22134  		v.Reset(ssaop.OpARM64VMLA4S)
 22135  		v.AddArg3(z, x, y)
 22136  		return true
 22137  	}
 22138  }
 22139  func rewriteValue_OpMulAddUint8x16(v *ssa.Value) bool {
 22140  	v_2 := v.Args[2]
 22141  	v_1 := v.Args[1]
 22142  	v_0 := v.Args[0]
 22143  	// match: (MulAddUint8x16 x y z)
 22144  	// result: (VMLA16B z x y)
 22145  	for {
 22146  		x := v_0
 22147  		y := v_1
 22148  		z := v_2
 22149  		v.Reset(ssaop.OpARM64VMLA16B)
 22150  		v.AddArg3(z, x, y)
 22151  		return true
 22152  	}
 22153  }
 22154  func rewriteValue_OpNeq16(v *ssa.Value) bool {
 22155  	v_1 := v.Args[1]
 22156  	v_0 := v.Args[0]
 22157  	b := v.Block
 22158  	typ := &b.Func.Config.Types
 22159  	// match: (Neq16 x y)
 22160  	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 22161  	for {
 22162  		x := v_0
 22163  		y := v_1
 22164  		v.Reset(ssaop.OpARM64NotEqual)
 22165  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 22166  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 22167  		v1.AddArg(x)
 22168  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 22169  		v2.AddArg(y)
 22170  		v0.AddArg2(v1, v2)
 22171  		v.AddArg(v0)
 22172  		return true
 22173  	}
 22174  }
 22175  func rewriteValue_OpNeq32(v *ssa.Value) bool {
 22176  	v_1 := v.Args[1]
 22177  	v_0 := v.Args[0]
 22178  	b := v.Block
 22179  	// match: (Neq32 x y)
 22180  	// result: (NotEqual (CMPW x y))
 22181  	for {
 22182  		x := v_0
 22183  		y := v_1
 22184  		v.Reset(ssaop.OpARM64NotEqual)
 22185  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 22186  		v0.AddArg2(x, y)
 22187  		v.AddArg(v0)
 22188  		return true
 22189  	}
 22190  }
 22191  func rewriteValue_OpNeq32F(v *ssa.Value) bool {
 22192  	v_1 := v.Args[1]
 22193  	v_0 := v.Args[0]
 22194  	b := v.Block
 22195  	// match: (Neq32F x y)
 22196  	// result: (NotEqual (FCMPS x y))
 22197  	for {
 22198  		x := v_0
 22199  		y := v_1
 22200  		v.Reset(ssaop.OpARM64NotEqual)
 22201  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 22202  		v0.AddArg2(x, y)
 22203  		v.AddArg(v0)
 22204  		return true
 22205  	}
 22206  }
 22207  func rewriteValue_OpNeq64(v *ssa.Value) bool {
 22208  	v_1 := v.Args[1]
 22209  	v_0 := v.Args[0]
 22210  	b := v.Block
 22211  	// match: (Neq64 x y)
 22212  	// result: (NotEqual (CMP x y))
 22213  	for {
 22214  		x := v_0
 22215  		y := v_1
 22216  		v.Reset(ssaop.OpARM64NotEqual)
 22217  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 22218  		v0.AddArg2(x, y)
 22219  		v.AddArg(v0)
 22220  		return true
 22221  	}
 22222  }
 22223  func rewriteValue_OpNeq64F(v *ssa.Value) bool {
 22224  	v_1 := v.Args[1]
 22225  	v_0 := v.Args[0]
 22226  	b := v.Block
 22227  	// match: (Neq64F x y)
 22228  	// result: (NotEqual (FCMPD x y))
 22229  	for {
 22230  		x := v_0
 22231  		y := v_1
 22232  		v.Reset(ssaop.OpARM64NotEqual)
 22233  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 22234  		v0.AddArg2(x, y)
 22235  		v.AddArg(v0)
 22236  		return true
 22237  	}
 22238  }
 22239  func rewriteValue_OpNeq8(v *ssa.Value) bool {
 22240  	v_1 := v.Args[1]
 22241  	v_0 := v.Args[0]
 22242  	b := v.Block
 22243  	typ := &b.Func.Config.Types
 22244  	// match: (Neq8 x y)
 22245  	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 22246  	for {
 22247  		x := v_0
 22248  		y := v_1
 22249  		v.Reset(ssaop.OpARM64NotEqual)
 22250  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 22251  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 22252  		v1.AddArg(x)
 22253  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 22254  		v2.AddArg(y)
 22255  		v0.AddArg2(v1, v2)
 22256  		v.AddArg(v0)
 22257  		return true
 22258  	}
 22259  }
 22260  func rewriteValue_OpNeqPtr(v *ssa.Value) bool {
 22261  	v_1 := v.Args[1]
 22262  	v_0 := v.Args[0]
 22263  	b := v.Block
 22264  	// match: (NeqPtr x y)
 22265  	// result: (NotEqual (CMP x y))
 22266  	for {
 22267  		x := v_0
 22268  		y := v_1
 22269  		v.Reset(ssaop.OpARM64NotEqual)
 22270  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 22271  		v0.AddArg2(x, y)
 22272  		v.AddArg(v0)
 22273  		return true
 22274  	}
 22275  }
 22276  func rewriteValue_OpNot(v *ssa.Value) bool {
 22277  	v_0 := v.Args[0]
 22278  	b := v.Block
 22279  	typ := &b.Func.Config.Types
 22280  	// match: (Not x)
 22281  	// result: (XOR (MOVDconst [1]) x)
 22282  	for {
 22283  		x := v_0
 22284  		v.Reset(ssaop.OpARM64XOR)
 22285  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22286  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 22287  		v.AddArg2(v0, x)
 22288  		return true
 22289  	}
 22290  }
 22291  func rewriteValue_OpOffPtr(v *ssa.Value) bool {
 22292  	v_0 := v.Args[0]
 22293  	// match: (OffPtr [off] ptr:(SP))
 22294  	// cond: ssa.Is32Bit(off)
 22295  	// result: (MOVDaddr [int32(off)] ptr)
 22296  	for {
 22297  		off := ssa.AuxIntToInt64(v.AuxInt)
 22298  		ptr := v_0
 22299  		if ptr.Op != ssaop.OpSP || !(ssa.Is32Bit(off)) {
 22300  			break
 22301  		}
 22302  		v.Reset(ssaop.OpARM64MOVDaddr)
 22303  		v.AuxInt = ssa.Int32ToAuxInt(int32(off))
 22304  		v.AddArg(ptr)
 22305  		return true
 22306  	}
 22307  	// match: (OffPtr [off] ptr)
 22308  	// result: (ADDconst [off] ptr)
 22309  	for {
 22310  		off := ssa.AuxIntToInt64(v.AuxInt)
 22311  		ptr := v_0
 22312  		v.Reset(ssaop.OpARM64ADDconst)
 22313  		v.AuxInt = ssa.Int64ToAuxInt(off)
 22314  		v.AddArg(ptr)
 22315  		return true
 22316  	}
 22317  }
 22318  func rewriteValue_OpPopCount16(v *ssa.Value) bool {
 22319  	v_0 := v.Args[0]
 22320  	b := v.Block
 22321  	typ := &b.Func.Config.Types
 22322  	// match: (PopCount16 <t> x)
 22323  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt16to64 x)))))
 22324  	for {
 22325  		t := v.Type
 22326  		x := v_0
 22327  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 22328  		v.Type = t
 22329  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 22330  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 22331  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 22332  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22333  		v3.AddArg(x)
 22334  		v2.AddArg(v3)
 22335  		v1.AddArg(v2)
 22336  		v0.AddArg(v1)
 22337  		v.AddArg(v0)
 22338  		return true
 22339  	}
 22340  }
 22341  func rewriteValue_OpPopCount32(v *ssa.Value) bool {
 22342  	v_0 := v.Args[0]
 22343  	b := v.Block
 22344  	typ := &b.Func.Config.Types
 22345  	// match: (PopCount32 <t> x)
 22346  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt32to64 x)))))
 22347  	for {
 22348  		t := v.Type
 22349  		x := v_0
 22350  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 22351  		v.Type = t
 22352  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 22353  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 22354  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 22355  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 22356  		v3.AddArg(x)
 22357  		v2.AddArg(v3)
 22358  		v1.AddArg(v2)
 22359  		v0.AddArg(v1)
 22360  		v.AddArg(v0)
 22361  		return true
 22362  	}
 22363  }
 22364  func rewriteValue_OpPopCount64(v *ssa.Value) bool {
 22365  	v_0 := v.Args[0]
 22366  	b := v.Block
 22367  	typ := &b.Func.Config.Types
 22368  	// match: (PopCount64 <t> x)
 22369  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> x))))
 22370  	for {
 22371  		t := v.Type
 22372  		x := v_0
 22373  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 22374  		v.Type = t
 22375  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 22376  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 22377  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 22378  		v2.AddArg(x)
 22379  		v1.AddArg(v2)
 22380  		v0.AddArg(v1)
 22381  		v.AddArg(v0)
 22382  		return true
 22383  	}
 22384  }
 22385  func rewriteValue_OpPrefetchCache(v *ssa.Value) bool {
 22386  	v_1 := v.Args[1]
 22387  	v_0 := v.Args[0]
 22388  	// match: (PrefetchCache addr mem)
 22389  	// result: (PRFM [0] addr mem)
 22390  	for {
 22391  		addr := v_0
 22392  		mem := v_1
 22393  		v.Reset(ssaop.OpARM64PRFM)
 22394  		v.AuxInt = ssa.Int64ToAuxInt(0)
 22395  		v.AddArg2(addr, mem)
 22396  		return true
 22397  	}
 22398  }
 22399  func rewriteValue_OpPrefetchCacheStreamed(v *ssa.Value) bool {
 22400  	v_1 := v.Args[1]
 22401  	v_0 := v.Args[0]
 22402  	// match: (PrefetchCacheStreamed addr mem)
 22403  	// result: (PRFM [1] addr mem)
 22404  	for {
 22405  		addr := v_0
 22406  		mem := v_1
 22407  		v.Reset(ssaop.OpARM64PRFM)
 22408  		v.AuxInt = ssa.Int64ToAuxInt(1)
 22409  		v.AddArg2(addr, mem)
 22410  		return true
 22411  	}
 22412  }
 22413  func rewriteValue_OpPubBarrier(v *ssa.Value) bool {
 22414  	v_0 := v.Args[0]
 22415  	// match: (PubBarrier mem)
 22416  	// result: (DMB [0xe] mem)
 22417  	for {
 22418  		mem := v_0
 22419  		v.Reset(ssaop.OpARM64DMB)
 22420  		v.AuxInt = ssa.Int64ToAuxInt(0xe)
 22421  		v.AddArg(mem)
 22422  		return true
 22423  	}
 22424  }
 22425  func rewriteValue_OpRotateLeft16(v *ssa.Value) bool {
 22426  	v_1 := v.Args[1]
 22427  	v_0 := v.Args[0]
 22428  	b := v.Block
 22429  	typ := &b.Func.Config.Types
 22430  	// match: (RotateLeft16 <t> x (MOVDconst [c]))
 22431  	// result: (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
 22432  	for {
 22433  		t := v.Type
 22434  		x := v_0
 22435  		if v_1.Op != ssaop.OpARM64MOVDconst {
 22436  			break
 22437  		}
 22438  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 22439  		v.Reset(ssaop.OpOr16)
 22440  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh16x64, t)
 22441  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22442  		v1.AuxInt = ssa.Int64ToAuxInt(c & 15)
 22443  		v0.AddArg2(x, v1)
 22444  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh16Ux64, t)
 22445  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22446  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 15)
 22447  		v2.AddArg2(x, v3)
 22448  		v.AddArg2(v0, v2)
 22449  		return true
 22450  	}
 22451  	// match: (RotateLeft16 <t> x y)
 22452  	// result: (RORW <t> (ORshiftLL <typ.UInt32> (ZeroExt16to32 x) (ZeroExt16to32 x) [16]) (NEG <typ.Int64> y))
 22453  	for {
 22454  		t := v.Type
 22455  		x := v_0
 22456  		y := v_1
 22457  		v.Reset(ssaop.OpARM64RORW)
 22458  		v.Type = t
 22459  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ORshiftLL, typ.UInt32)
 22460  		v0.AuxInt = ssa.Int64ToAuxInt(16)
 22461  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 22462  		v1.AddArg(x)
 22463  		v0.AddArg2(v1, v1)
 22464  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 22465  		v2.AddArg(y)
 22466  		v.AddArg2(v0, v2)
 22467  		return true
 22468  	}
 22469  }
 22470  func rewriteValue_OpRotateLeft32(v *ssa.Value) bool {
 22471  	v_1 := v.Args[1]
 22472  	v_0 := v.Args[0]
 22473  	b := v.Block
 22474  	// match: (RotateLeft32 x y)
 22475  	// result: (RORW x (NEG <y.Type> y))
 22476  	for {
 22477  		x := v_0
 22478  		y := v_1
 22479  		v.Reset(ssaop.OpARM64RORW)
 22480  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, y.Type)
 22481  		v0.AddArg(y)
 22482  		v.AddArg2(x, v0)
 22483  		return true
 22484  	}
 22485  }
 22486  func rewriteValue_OpRotateLeft64(v *ssa.Value) bool {
 22487  	v_1 := v.Args[1]
 22488  	v_0 := v.Args[0]
 22489  	b := v.Block
 22490  	// match: (RotateLeft64 x y)
 22491  	// result: (ROR x (NEG <y.Type> y))
 22492  	for {
 22493  		x := v_0
 22494  		y := v_1
 22495  		v.Reset(ssaop.OpARM64ROR)
 22496  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, y.Type)
 22497  		v0.AddArg(y)
 22498  		v.AddArg2(x, v0)
 22499  		return true
 22500  	}
 22501  }
 22502  func rewriteValue_OpRotateLeft8(v *ssa.Value) bool {
 22503  	v_1 := v.Args[1]
 22504  	v_0 := v.Args[0]
 22505  	b := v.Block
 22506  	typ := &b.Func.Config.Types
 22507  	// match: (RotateLeft8 <t> x (MOVDconst [c]))
 22508  	// result: (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
 22509  	for {
 22510  		t := v.Type
 22511  		x := v_0
 22512  		if v_1.Op != ssaop.OpARM64MOVDconst {
 22513  			break
 22514  		}
 22515  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 22516  		v.Reset(ssaop.OpOr8)
 22517  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh8x64, t)
 22518  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22519  		v1.AuxInt = ssa.Int64ToAuxInt(c & 7)
 22520  		v0.AddArg2(x, v1)
 22521  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh8Ux64, t)
 22522  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22523  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 7)
 22524  		v2.AddArg2(x, v3)
 22525  		v.AddArg2(v0, v2)
 22526  		return true
 22527  	}
 22528  	// match: (RotateLeft8 <t> x y)
 22529  	// result: (OR <t> (SLL <t> x (ANDconst <typ.Int64> [7] y)) (SRL <t> (ZeroExt8to64 x) (ANDconst <typ.Int64> [7] (NEG <typ.Int64> y))))
 22530  	for {
 22531  		t := v.Type
 22532  		x := v_0
 22533  		y := v_1
 22534  		v.Reset(ssaop.OpARM64OR)
 22535  		v.Type = t
 22536  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 22537  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, typ.Int64)
 22538  		v1.AuxInt = ssa.Int64ToAuxInt(7)
 22539  		v1.AddArg(y)
 22540  		v0.AddArg2(x, v1)
 22541  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 22542  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 22543  		v3.AddArg(x)
 22544  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, typ.Int64)
 22545  		v4.AuxInt = ssa.Int64ToAuxInt(7)
 22546  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 22547  		v5.AddArg(y)
 22548  		v4.AddArg(v5)
 22549  		v2.AddArg2(v3, v4)
 22550  		v.AddArg2(v0, v2)
 22551  		return true
 22552  	}
 22553  }
 22554  func rewriteValue_OpRsh16Ux16(v *ssa.Value) bool {
 22555  	v_1 := v.Args[1]
 22556  	v_0 := v.Args[0]
 22557  	b := v.Block
 22558  	typ := &b.Func.Config.Types
 22559  	// match: (Rsh16Ux16 <t> [bounded] x y)
 22560  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt16to64 x) y)
 22561  	for {
 22562  		t := v.Type
 22563  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22564  		x := v_0
 22565  		y := v_1
 22566  		v.Reset(ssaop.OpRsh64Ux16)
 22567  		v.Type = t
 22568  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22569  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22570  		v0.AddArg(x)
 22571  		v.AddArg2(v0, y)
 22572  		return true
 22573  	}
 22574  }
 22575  func rewriteValue_OpRsh16Ux32(v *ssa.Value) bool {
 22576  	v_1 := v.Args[1]
 22577  	v_0 := v.Args[0]
 22578  	b := v.Block
 22579  	typ := &b.Func.Config.Types
 22580  	// match: (Rsh16Ux32 <t> [bounded] x y)
 22581  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt16to64 x) y)
 22582  	for {
 22583  		t := v.Type
 22584  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22585  		x := v_0
 22586  		y := v_1
 22587  		v.Reset(ssaop.OpRsh64Ux32)
 22588  		v.Type = t
 22589  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22590  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22591  		v0.AddArg(x)
 22592  		v.AddArg2(v0, y)
 22593  		return true
 22594  	}
 22595  }
 22596  func rewriteValue_OpRsh16Ux64(v *ssa.Value) bool {
 22597  	v_1 := v.Args[1]
 22598  	v_0 := v.Args[0]
 22599  	b := v.Block
 22600  	typ := &b.Func.Config.Types
 22601  	// match: (Rsh16Ux64 <t> [bounded] x y)
 22602  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt16to64 x) y)
 22603  	for {
 22604  		t := v.Type
 22605  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22606  		x := v_0
 22607  		y := v_1
 22608  		v.Reset(ssaop.OpRsh64Ux64)
 22609  		v.Type = t
 22610  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22611  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22612  		v0.AddArg(x)
 22613  		v.AddArg2(v0, y)
 22614  		return true
 22615  	}
 22616  }
 22617  func rewriteValue_OpRsh16Ux8(v *ssa.Value) bool {
 22618  	v_1 := v.Args[1]
 22619  	v_0 := v.Args[0]
 22620  	b := v.Block
 22621  	typ := &b.Func.Config.Types
 22622  	// match: (Rsh16Ux8 <t> [bounded] x y)
 22623  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt16to64 x) y)
 22624  	for {
 22625  		t := v.Type
 22626  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22627  		x := v_0
 22628  		y := v_1
 22629  		v.Reset(ssaop.OpRsh64Ux8)
 22630  		v.Type = t
 22631  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22632  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22633  		v0.AddArg(x)
 22634  		v.AddArg2(v0, y)
 22635  		return true
 22636  	}
 22637  }
 22638  func rewriteValue_OpRsh16x16(v *ssa.Value) bool {
 22639  	v_1 := v.Args[1]
 22640  	v_0 := v.Args[0]
 22641  	b := v.Block
 22642  	typ := &b.Func.Config.Types
 22643  	// match: (Rsh16x16 <t> [bounded] x y)
 22644  	// result: (Rsh64x16 <t> [bounded] (SignExt16to64 x) y)
 22645  	for {
 22646  		t := v.Type
 22647  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22648  		x := v_0
 22649  		y := v_1
 22650  		v.Reset(ssaop.OpRsh64x16)
 22651  		v.Type = t
 22652  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22653  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 22654  		v0.AddArg(x)
 22655  		v.AddArg2(v0, y)
 22656  		return true
 22657  	}
 22658  }
 22659  func rewriteValue_OpRsh16x32(v *ssa.Value) bool {
 22660  	v_1 := v.Args[1]
 22661  	v_0 := v.Args[0]
 22662  	b := v.Block
 22663  	typ := &b.Func.Config.Types
 22664  	// match: (Rsh16x32 <t> [bounded] x y)
 22665  	// result: (Rsh64x32 <t> [bounded] (SignExt16to64 x) y)
 22666  	for {
 22667  		t := v.Type
 22668  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22669  		x := v_0
 22670  		y := v_1
 22671  		v.Reset(ssaop.OpRsh64x32)
 22672  		v.Type = t
 22673  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22674  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 22675  		v0.AddArg(x)
 22676  		v.AddArg2(v0, y)
 22677  		return true
 22678  	}
 22679  }
 22680  func rewriteValue_OpRsh16x64(v *ssa.Value) bool {
 22681  	v_1 := v.Args[1]
 22682  	v_0 := v.Args[0]
 22683  	b := v.Block
 22684  	typ := &b.Func.Config.Types
 22685  	// match: (Rsh16x64 <t> [bounded] x y)
 22686  	// result: (Rsh64x64 <t> [bounded] (SignExt16to64 x) y)
 22687  	for {
 22688  		t := v.Type
 22689  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22690  		x := v_0
 22691  		y := v_1
 22692  		v.Reset(ssaop.OpRsh64x64)
 22693  		v.Type = t
 22694  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22695  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 22696  		v0.AddArg(x)
 22697  		v.AddArg2(v0, y)
 22698  		return true
 22699  	}
 22700  }
 22701  func rewriteValue_OpRsh16x8(v *ssa.Value) bool {
 22702  	v_1 := v.Args[1]
 22703  	v_0 := v.Args[0]
 22704  	b := v.Block
 22705  	typ := &b.Func.Config.Types
 22706  	// match: (Rsh16x8 <t> [bounded] x y)
 22707  	// result: (Rsh64x8 <t> [bounded] (SignExt16to64 x) y)
 22708  	for {
 22709  		t := v.Type
 22710  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22711  		x := v_0
 22712  		y := v_1
 22713  		v.Reset(ssaop.OpRsh64x8)
 22714  		v.Type = t
 22715  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22716  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 22717  		v0.AddArg(x)
 22718  		v.AddArg2(v0, y)
 22719  		return true
 22720  	}
 22721  }
 22722  func rewriteValue_OpRsh32Ux16(v *ssa.Value) bool {
 22723  	v_1 := v.Args[1]
 22724  	v_0 := v.Args[0]
 22725  	b := v.Block
 22726  	typ := &b.Func.Config.Types
 22727  	// match: (Rsh32Ux16 <t> [bounded] x y)
 22728  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt32to64 x) y)
 22729  	for {
 22730  		t := v.Type
 22731  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22732  		x := v_0
 22733  		y := v_1
 22734  		v.Reset(ssaop.OpRsh64Ux16)
 22735  		v.Type = t
 22736  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22737  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 22738  		v0.AddArg(x)
 22739  		v.AddArg2(v0, y)
 22740  		return true
 22741  	}
 22742  }
 22743  func rewriteValue_OpRsh32Ux32(v *ssa.Value) bool {
 22744  	v_1 := v.Args[1]
 22745  	v_0 := v.Args[0]
 22746  	b := v.Block
 22747  	typ := &b.Func.Config.Types
 22748  	// match: (Rsh32Ux32 <t> [bounded] x y)
 22749  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt32to64 x) y)
 22750  	for {
 22751  		t := v.Type
 22752  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22753  		x := v_0
 22754  		y := v_1
 22755  		v.Reset(ssaop.OpRsh64Ux32)
 22756  		v.Type = t
 22757  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22758  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 22759  		v0.AddArg(x)
 22760  		v.AddArg2(v0, y)
 22761  		return true
 22762  	}
 22763  }
 22764  func rewriteValue_OpRsh32Ux64(v *ssa.Value) bool {
 22765  	v_1 := v.Args[1]
 22766  	v_0 := v.Args[0]
 22767  	b := v.Block
 22768  	typ := &b.Func.Config.Types
 22769  	// match: (Rsh32Ux64 <t> [bounded] x y)
 22770  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt32to64 x) y)
 22771  	for {
 22772  		t := v.Type
 22773  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22774  		x := v_0
 22775  		y := v_1
 22776  		v.Reset(ssaop.OpRsh64Ux64)
 22777  		v.Type = t
 22778  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22779  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 22780  		v0.AddArg(x)
 22781  		v.AddArg2(v0, y)
 22782  		return true
 22783  	}
 22784  }
 22785  func rewriteValue_OpRsh32Ux8(v *ssa.Value) bool {
 22786  	v_1 := v.Args[1]
 22787  	v_0 := v.Args[0]
 22788  	b := v.Block
 22789  	typ := &b.Func.Config.Types
 22790  	// match: (Rsh32Ux8 <t> [bounded] x y)
 22791  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt32to64 x) y)
 22792  	for {
 22793  		t := v.Type
 22794  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22795  		x := v_0
 22796  		y := v_1
 22797  		v.Reset(ssaop.OpRsh64Ux8)
 22798  		v.Type = t
 22799  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22800  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 22801  		v0.AddArg(x)
 22802  		v.AddArg2(v0, y)
 22803  		return true
 22804  	}
 22805  }
 22806  func rewriteValue_OpRsh32x16(v *ssa.Value) bool {
 22807  	v_1 := v.Args[1]
 22808  	v_0 := v.Args[0]
 22809  	b := v.Block
 22810  	typ := &b.Func.Config.Types
 22811  	// match: (Rsh32x16 <t> [bounded] x y)
 22812  	// result: (Rsh64x16 <t> [bounded] (SignExt32to64 x) y)
 22813  	for {
 22814  		t := v.Type
 22815  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22816  		x := v_0
 22817  		y := v_1
 22818  		v.Reset(ssaop.OpRsh64x16)
 22819  		v.Type = t
 22820  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22821  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 22822  		v0.AddArg(x)
 22823  		v.AddArg2(v0, y)
 22824  		return true
 22825  	}
 22826  }
 22827  func rewriteValue_OpRsh32x32(v *ssa.Value) bool {
 22828  	v_1 := v.Args[1]
 22829  	v_0 := v.Args[0]
 22830  	b := v.Block
 22831  	typ := &b.Func.Config.Types
 22832  	// match: (Rsh32x32 <t> [bounded] x y)
 22833  	// result: (Rsh64x32 <t> [bounded] (SignExt32to64 x) y)
 22834  	for {
 22835  		t := v.Type
 22836  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22837  		x := v_0
 22838  		y := v_1
 22839  		v.Reset(ssaop.OpRsh64x32)
 22840  		v.Type = t
 22841  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22842  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 22843  		v0.AddArg(x)
 22844  		v.AddArg2(v0, y)
 22845  		return true
 22846  	}
 22847  }
 22848  func rewriteValue_OpRsh32x64(v *ssa.Value) bool {
 22849  	v_1 := v.Args[1]
 22850  	v_0 := v.Args[0]
 22851  	b := v.Block
 22852  	typ := &b.Func.Config.Types
 22853  	// match: (Rsh32x64 <t> [bounded] x y)
 22854  	// result: (Rsh64x64 <t> [bounded] (SignExt32to64 x) y)
 22855  	for {
 22856  		t := v.Type
 22857  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22858  		x := v_0
 22859  		y := v_1
 22860  		v.Reset(ssaop.OpRsh64x64)
 22861  		v.Type = t
 22862  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22863  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 22864  		v0.AddArg(x)
 22865  		v.AddArg2(v0, y)
 22866  		return true
 22867  	}
 22868  }
 22869  func rewriteValue_OpRsh32x8(v *ssa.Value) bool {
 22870  	v_1 := v.Args[1]
 22871  	v_0 := v.Args[0]
 22872  	b := v.Block
 22873  	typ := &b.Func.Config.Types
 22874  	// match: (Rsh32x8 <t> [bounded] x y)
 22875  	// result: (Rsh64x8 <t> [bounded] (SignExt32to64 x) y)
 22876  	for {
 22877  		t := v.Type
 22878  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22879  		x := v_0
 22880  		y := v_1
 22881  		v.Reset(ssaop.OpRsh64x8)
 22882  		v.Type = t
 22883  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22884  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 22885  		v0.AddArg(x)
 22886  		v.AddArg2(v0, y)
 22887  		return true
 22888  	}
 22889  }
 22890  func rewriteValue_OpRsh64Ux16(v *ssa.Value) bool {
 22891  	v_1 := v.Args[1]
 22892  	v_0 := v.Args[0]
 22893  	b := v.Block
 22894  	typ := &b.Func.Config.Types
 22895  	// match: (Rsh64Ux16 <t> x y)
 22896  	// cond: ssa.ShiftIsBounded(v)
 22897  	// result: (SRL <t> x y)
 22898  	for {
 22899  		t := v.Type
 22900  		x := v_0
 22901  		y := v_1
 22902  		if !(ssa.ShiftIsBounded(v)) {
 22903  			break
 22904  		}
 22905  		v.Reset(ssaop.OpARM64SRL)
 22906  		v.Type = t
 22907  		v.AddArg2(x, y)
 22908  		return true
 22909  	}
 22910  	// match: (Rsh64Ux16 <t> [bounded] x y)
 22911  	// cond: !ssa.ShiftIsBounded(v)
 22912  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt16to32 y))
 22913  	for {
 22914  		t := v.Type
 22915  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22916  		x := v_0
 22917  		y := v_1
 22918  		if !(!ssa.ShiftIsBounded(v)) {
 22919  			break
 22920  		}
 22921  		v.Reset(ssaop.OpRsh64Ux32)
 22922  		v.Type = t
 22923  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22924  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 22925  		v0.AddArg(y)
 22926  		v.AddArg2(x, v0)
 22927  		return true
 22928  	}
 22929  	return false
 22930  }
 22931  func rewriteValue_OpRsh64Ux32(v *ssa.Value) bool {
 22932  	v_1 := v.Args[1]
 22933  	v_0 := v.Args[0]
 22934  	b := v.Block
 22935  	// match: (Rsh64Ux32 <t> x y)
 22936  	// cond: ssa.ShiftIsBounded(v)
 22937  	// result: (SRL <t> x y)
 22938  	for {
 22939  		t := v.Type
 22940  		x := v_0
 22941  		y := v_1
 22942  		if !(ssa.ShiftIsBounded(v)) {
 22943  			break
 22944  		}
 22945  		v.Reset(ssaop.OpARM64SRL)
 22946  		v.Type = t
 22947  		v.AddArg2(x, y)
 22948  		return true
 22949  	}
 22950  	// match: (Rsh64Ux32 <t> x y)
 22951  	// cond: !ssa.ShiftIsBounded(v)
 22952  	// result: (CSEL [ssaop.OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 22953  	for {
 22954  		t := v.Type
 22955  		x := v_0
 22956  		y := v_1
 22957  		if !(!ssa.ShiftIsBounded(v)) {
 22958  			break
 22959  		}
 22960  		v.Reset(ssaop.OpARM64CSEL)
 22961  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 22962  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 22963  		v0.AddArg2(x, y)
 22964  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 22965  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 22966  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 22967  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 22968  		v2.AddArg(y)
 22969  		v.AddArg3(v0, v1, v2)
 22970  		return true
 22971  	}
 22972  	return false
 22973  }
 22974  func rewriteValue_OpRsh64Ux64(v *ssa.Value) bool {
 22975  	v_1 := v.Args[1]
 22976  	v_0 := v.Args[0]
 22977  	b := v.Block
 22978  	// match: (Rsh64Ux64 <t> x y)
 22979  	// cond: ssa.ShiftIsBounded(v)
 22980  	// result: (SRL <t> x y)
 22981  	for {
 22982  		t := v.Type
 22983  		x := v_0
 22984  		y := v_1
 22985  		if !(ssa.ShiftIsBounded(v)) {
 22986  			break
 22987  		}
 22988  		v.Reset(ssaop.OpARM64SRL)
 22989  		v.Type = t
 22990  		v.AddArg2(x, y)
 22991  		return true
 22992  	}
 22993  	// match: (Rsh64Ux64 <t> x y)
 22994  	// cond: !ssa.ShiftIsBounded(v)
 22995  	// result: (CSEL [ssaop.OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 22996  	for {
 22997  		t := v.Type
 22998  		x := v_0
 22999  		y := v_1
 23000  		if !(!ssa.ShiftIsBounded(v)) {
 23001  			break
 23002  		}
 23003  		v.Reset(ssaop.OpARM64CSEL)
 23004  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23005  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 23006  		v0.AddArg2(x, y)
 23007  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 23008  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 23009  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23010  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 23011  		v2.AddArg(y)
 23012  		v.AddArg3(v0, v1, v2)
 23013  		return true
 23014  	}
 23015  	return false
 23016  }
 23017  func rewriteValue_OpRsh64Ux8(v *ssa.Value) bool {
 23018  	v_1 := v.Args[1]
 23019  	v_0 := v.Args[0]
 23020  	b := v.Block
 23021  	typ := &b.Func.Config.Types
 23022  	// match: (Rsh64Ux8 <t> x y)
 23023  	// cond: ssa.ShiftIsBounded(v)
 23024  	// result: (SRL <t> x y)
 23025  	for {
 23026  		t := v.Type
 23027  		x := v_0
 23028  		y := v_1
 23029  		if !(ssa.ShiftIsBounded(v)) {
 23030  			break
 23031  		}
 23032  		v.Reset(ssaop.OpARM64SRL)
 23033  		v.Type = t
 23034  		v.AddArg2(x, y)
 23035  		return true
 23036  	}
 23037  	// match: (Rsh64Ux8 <t> [bounded] x y)
 23038  	// cond: !ssa.ShiftIsBounded(v)
 23039  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt8to32 y))
 23040  	for {
 23041  		t := v.Type
 23042  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23043  		x := v_0
 23044  		y := v_1
 23045  		if !(!ssa.ShiftIsBounded(v)) {
 23046  			break
 23047  		}
 23048  		v.Reset(ssaop.OpRsh64Ux32)
 23049  		v.Type = t
 23050  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23051  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 23052  		v0.AddArg(y)
 23053  		v.AddArg2(x, v0)
 23054  		return true
 23055  	}
 23056  	return false
 23057  }
 23058  func rewriteValue_OpRsh64x16(v *ssa.Value) bool {
 23059  	v_1 := v.Args[1]
 23060  	v_0 := v.Args[0]
 23061  	b := v.Block
 23062  	typ := &b.Func.Config.Types
 23063  	// match: (Rsh64x16 <t> x y)
 23064  	// cond: ssa.ShiftIsBounded(v)
 23065  	// result: (SRA <t> x y)
 23066  	for {
 23067  		t := v.Type
 23068  		x := v_0
 23069  		y := v_1
 23070  		if !(ssa.ShiftIsBounded(v)) {
 23071  			break
 23072  		}
 23073  		v.Reset(ssaop.OpARM64SRA)
 23074  		v.Type = t
 23075  		v.AddArg2(x, y)
 23076  		return true
 23077  	}
 23078  	// match: (Rsh64x16 <t> [bounded] x y)
 23079  	// cond: !ssa.ShiftIsBounded(v)
 23080  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 23081  	for {
 23082  		t := v.Type
 23083  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23084  		x := v_0
 23085  		y := v_1
 23086  		if !(!ssa.ShiftIsBounded(v)) {
 23087  			break
 23088  		}
 23089  		v.Reset(ssaop.OpRsh64x32)
 23090  		v.Type = t
 23091  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23092  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 23093  		v0.AddArg(y)
 23094  		v.AddArg2(x, v0)
 23095  		return true
 23096  	}
 23097  	return false
 23098  }
 23099  func rewriteValue_OpRsh64x32(v *ssa.Value) bool {
 23100  	v_1 := v.Args[1]
 23101  	v_0 := v.Args[0]
 23102  	b := v.Block
 23103  	// match: (Rsh64x32 <t> x y)
 23104  	// cond: ssa.ShiftIsBounded(v)
 23105  	// result: (SRA <t> x y)
 23106  	for {
 23107  		t := v.Type
 23108  		x := v_0
 23109  		y := v_1
 23110  		if !(ssa.ShiftIsBounded(v)) {
 23111  			break
 23112  		}
 23113  		v.Reset(ssaop.OpARM64SRA)
 23114  		v.Type = t
 23115  		v.AddArg2(x, y)
 23116  		return true
 23117  	}
 23118  	// match: (Rsh64x32 <t> x y)
 23119  	// cond: !ssa.ShiftIsBounded(v)
 23120  	// result: (SRA x (CSEL [ssaop.OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPWconst [64] y)))
 23121  	for {
 23122  		x := v_0
 23123  		y := v_1
 23124  		if !(!ssa.ShiftIsBounded(v)) {
 23125  			break
 23126  		}
 23127  		v.Reset(ssaop.OpARM64SRA)
 23128  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, y.Type)
 23129  		v0.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23130  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, y.Type)
 23131  		v1.AuxInt = ssa.Int64ToAuxInt(63)
 23132  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 23133  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 23134  		v2.AddArg(y)
 23135  		v0.AddArg3(y, v1, v2)
 23136  		v.AddArg2(x, v0)
 23137  		return true
 23138  	}
 23139  	return false
 23140  }
 23141  func rewriteValue_OpRsh64x64(v *ssa.Value) bool {
 23142  	v_1 := v.Args[1]
 23143  	v_0 := v.Args[0]
 23144  	b := v.Block
 23145  	// match: (Rsh64x64 <t> x y)
 23146  	// cond: ssa.ShiftIsBounded(v)
 23147  	// result: (SRA <t> x y)
 23148  	for {
 23149  		t := v.Type
 23150  		x := v_0
 23151  		y := v_1
 23152  		if !(ssa.ShiftIsBounded(v)) {
 23153  			break
 23154  		}
 23155  		v.Reset(ssaop.OpARM64SRA)
 23156  		v.Type = t
 23157  		v.AddArg2(x, y)
 23158  		return true
 23159  	}
 23160  	// match: (Rsh64x64 <t> x y)
 23161  	// cond: !ssa.ShiftIsBounded(v)
 23162  	// result: (SRA x (CSEL [ssaop.OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
 23163  	for {
 23164  		x := v_0
 23165  		y := v_1
 23166  		if !(!ssa.ShiftIsBounded(v)) {
 23167  			break
 23168  		}
 23169  		v.Reset(ssaop.OpARM64SRA)
 23170  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, y.Type)
 23171  		v0.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23172  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, y.Type)
 23173  		v1.AuxInt = ssa.Int64ToAuxInt(63)
 23174  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23175  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 23176  		v2.AddArg(y)
 23177  		v0.AddArg3(y, v1, v2)
 23178  		v.AddArg2(x, v0)
 23179  		return true
 23180  	}
 23181  	return false
 23182  }
 23183  func rewriteValue_OpRsh64x8(v *ssa.Value) bool {
 23184  	v_1 := v.Args[1]
 23185  	v_0 := v.Args[0]
 23186  	b := v.Block
 23187  	typ := &b.Func.Config.Types
 23188  	// match: (Rsh64x8 <t> x y)
 23189  	// cond: ssa.ShiftIsBounded(v)
 23190  	// result: (SRA <t> x y)
 23191  	for {
 23192  		t := v.Type
 23193  		x := v_0
 23194  		y := v_1
 23195  		if !(ssa.ShiftIsBounded(v)) {
 23196  			break
 23197  		}
 23198  		v.Reset(ssaop.OpARM64SRA)
 23199  		v.Type = t
 23200  		v.AddArg2(x, y)
 23201  		return true
 23202  	}
 23203  	// match: (Rsh64x8 <t> [bounded] x y)
 23204  	// cond: !ssa.ShiftIsBounded(v)
 23205  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 23206  	for {
 23207  		t := v.Type
 23208  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23209  		x := v_0
 23210  		y := v_1
 23211  		if !(!ssa.ShiftIsBounded(v)) {
 23212  			break
 23213  		}
 23214  		v.Reset(ssaop.OpRsh64x32)
 23215  		v.Type = t
 23216  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23217  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 23218  		v0.AddArg(y)
 23219  		v.AddArg2(x, v0)
 23220  		return true
 23221  	}
 23222  	return false
 23223  }
 23224  func rewriteValue_OpRsh8Ux16(v *ssa.Value) bool {
 23225  	v_1 := v.Args[1]
 23226  	v_0 := v.Args[0]
 23227  	b := v.Block
 23228  	typ := &b.Func.Config.Types
 23229  	// match: (Rsh8Ux16 <t> [bounded] x y)
 23230  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt8to64 x) y)
 23231  	for {
 23232  		t := v.Type
 23233  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23234  		x := v_0
 23235  		y := v_1
 23236  		v.Reset(ssaop.OpRsh64Ux16)
 23237  		v.Type = t
 23238  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23239  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 23240  		v0.AddArg(x)
 23241  		v.AddArg2(v0, y)
 23242  		return true
 23243  	}
 23244  }
 23245  func rewriteValue_OpRsh8Ux32(v *ssa.Value) bool {
 23246  	v_1 := v.Args[1]
 23247  	v_0 := v.Args[0]
 23248  	b := v.Block
 23249  	typ := &b.Func.Config.Types
 23250  	// match: (Rsh8Ux32 <t> [bounded] x y)
 23251  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt8to64 x) y)
 23252  	for {
 23253  		t := v.Type
 23254  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23255  		x := v_0
 23256  		y := v_1
 23257  		v.Reset(ssaop.OpRsh64Ux32)
 23258  		v.Type = t
 23259  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23260  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 23261  		v0.AddArg(x)
 23262  		v.AddArg2(v0, y)
 23263  		return true
 23264  	}
 23265  }
 23266  func rewriteValue_OpRsh8Ux64(v *ssa.Value) bool {
 23267  	v_1 := v.Args[1]
 23268  	v_0 := v.Args[0]
 23269  	b := v.Block
 23270  	typ := &b.Func.Config.Types
 23271  	// match: (Rsh8Ux64 <t> [bounded] x y)
 23272  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt8to64 x) y)
 23273  	for {
 23274  		t := v.Type
 23275  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23276  		x := v_0
 23277  		y := v_1
 23278  		v.Reset(ssaop.OpRsh64Ux64)
 23279  		v.Type = t
 23280  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23281  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 23282  		v0.AddArg(x)
 23283  		v.AddArg2(v0, y)
 23284  		return true
 23285  	}
 23286  }
 23287  func rewriteValue_OpRsh8Ux8(v *ssa.Value) bool {
 23288  	v_1 := v.Args[1]
 23289  	v_0 := v.Args[0]
 23290  	b := v.Block
 23291  	typ := &b.Func.Config.Types
 23292  	// match: (Rsh8Ux8 <t> [bounded] x y)
 23293  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt8to64 x) y)
 23294  	for {
 23295  		t := v.Type
 23296  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23297  		x := v_0
 23298  		y := v_1
 23299  		v.Reset(ssaop.OpRsh64Ux8)
 23300  		v.Type = t
 23301  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23302  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 23303  		v0.AddArg(x)
 23304  		v.AddArg2(v0, y)
 23305  		return true
 23306  	}
 23307  }
 23308  func rewriteValue_OpRsh8x16(v *ssa.Value) bool {
 23309  	v_1 := v.Args[1]
 23310  	v_0 := v.Args[0]
 23311  	b := v.Block
 23312  	typ := &b.Func.Config.Types
 23313  	// match: (Rsh8x16 <t> [bounded] x y)
 23314  	// result: (Rsh64x16 <t> [bounded] (SignExt8to64 x) y)
 23315  	for {
 23316  		t := v.Type
 23317  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23318  		x := v_0
 23319  		y := v_1
 23320  		v.Reset(ssaop.OpRsh64x16)
 23321  		v.Type = t
 23322  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23323  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 23324  		v0.AddArg(x)
 23325  		v.AddArg2(v0, y)
 23326  		return true
 23327  	}
 23328  }
 23329  func rewriteValue_OpRsh8x32(v *ssa.Value) bool {
 23330  	v_1 := v.Args[1]
 23331  	v_0 := v.Args[0]
 23332  	b := v.Block
 23333  	typ := &b.Func.Config.Types
 23334  	// match: (Rsh8x32 <t> [bounded] x y)
 23335  	// result: (Rsh64x32 <t> [bounded] (SignExt8to64 x) y)
 23336  	for {
 23337  		t := v.Type
 23338  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23339  		x := v_0
 23340  		y := v_1
 23341  		v.Reset(ssaop.OpRsh64x32)
 23342  		v.Type = t
 23343  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23344  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 23345  		v0.AddArg(x)
 23346  		v.AddArg2(v0, y)
 23347  		return true
 23348  	}
 23349  }
 23350  func rewriteValue_OpRsh8x64(v *ssa.Value) bool {
 23351  	v_1 := v.Args[1]
 23352  	v_0 := v.Args[0]
 23353  	b := v.Block
 23354  	typ := &b.Func.Config.Types
 23355  	// match: (Rsh8x64 <t> [bounded] x y)
 23356  	// result: (Rsh64x64 <t> [bounded] (SignExt8to64 x) y)
 23357  	for {
 23358  		t := v.Type
 23359  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23360  		x := v_0
 23361  		y := v_1
 23362  		v.Reset(ssaop.OpRsh64x64)
 23363  		v.Type = t
 23364  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23365  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 23366  		v0.AddArg(x)
 23367  		v.AddArg2(v0, y)
 23368  		return true
 23369  	}
 23370  }
 23371  func rewriteValue_OpRsh8x8(v *ssa.Value) bool {
 23372  	v_1 := v.Args[1]
 23373  	v_0 := v.Args[0]
 23374  	b := v.Block
 23375  	typ := &b.Func.Config.Types
 23376  	// match: (Rsh8x8 <t> [bounded] x y)
 23377  	// result: (Rsh64x8 <t> [bounded] (SignExt8to64 x) y)
 23378  	for {
 23379  		t := v.Type
 23380  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23381  		x := v_0
 23382  		y := v_1
 23383  		v.Reset(ssaop.OpRsh64x8)
 23384  		v.Type = t
 23385  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23386  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 23387  		v0.AddArg(x)
 23388  		v.AddArg2(v0, y)
 23389  		return true
 23390  	}
 23391  }
 23392  func rewriteValue_OpScalableVectorLen(v *ssa.Value) bool {
 23393  	// match: (ScalableVectorLen)
 23394  	// result: (RDVL [1])
 23395  	for {
 23396  		v.Reset(ssaop.OpARM64RDVL)
 23397  		v.AuxInt = ssa.Int64ToAuxInt(1)
 23398  		return true
 23399  	}
 23400  }
 23401  func rewriteValue_OpSelect0(v *ssa.Value) bool {
 23402  	v_0 := v.Args[0]
 23403  	b := v.Block
 23404  	typ := &b.Func.Config.Types
 23405  	// match: (Select0 (Mul64uhilo x y))
 23406  	// result: (UMULH x y)
 23407  	for {
 23408  		if v_0.Op != ssaop.OpMul64uhilo {
 23409  			break
 23410  		}
 23411  		y := v_0.Args[1]
 23412  		x := v_0.Args[0]
 23413  		v.Reset(ssaop.OpARM64UMULH)
 23414  		v.AddArg2(x, y)
 23415  		return true
 23416  	}
 23417  	// match: (Select0 (Add64carry x y c))
 23418  	// result: (Select0 <typ.UInt64> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c))))
 23419  	for {
 23420  		if v_0.Op != ssaop.OpAdd64carry {
 23421  			break
 23422  		}
 23423  		c := v_0.Args[2]
 23424  		x := v_0.Args[0]
 23425  		y := v_0.Args[1]
 23426  		v.Reset(ssaop.OpSelect0)
 23427  		v.Type = typ.UInt64
 23428  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23429  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23430  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23431  		v2.AuxInt = ssa.Int64ToAuxInt(-1)
 23432  		v2.AddArg(c)
 23433  		v1.AddArg(v2)
 23434  		v0.AddArg3(x, y, v1)
 23435  		v.AddArg(v0)
 23436  		return true
 23437  	}
 23438  	// match: (Select0 (Sub64borrow x y bo))
 23439  	// result: (Select0 <typ.UInt64> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))
 23440  	for {
 23441  		if v_0.Op != ssaop.OpSub64borrow {
 23442  			break
 23443  		}
 23444  		bo := v_0.Args[2]
 23445  		x := v_0.Args[0]
 23446  		y := v_0.Args[1]
 23447  		v.Reset(ssaop.OpSelect0)
 23448  		v.Type = typ.UInt64
 23449  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23450  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23451  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23452  		v2.AddArg(bo)
 23453  		v1.AddArg(v2)
 23454  		v0.AddArg3(x, y, v1)
 23455  		v.AddArg(v0)
 23456  		return true
 23457  	}
 23458  	// match: (Select0 (Mul64uover x y))
 23459  	// result: (MUL x y)
 23460  	for {
 23461  		if v_0.Op != ssaop.OpMul64uover {
 23462  			break
 23463  		}
 23464  		y := v_0.Args[1]
 23465  		x := v_0.Args[0]
 23466  		v.Reset(ssaop.OpARM64MUL)
 23467  		v.AddArg2(x, y)
 23468  		return true
 23469  	}
 23470  	return false
 23471  }
 23472  func rewriteValue_OpSelect1(v *ssa.Value) bool {
 23473  	v_0 := v.Args[0]
 23474  	b := v.Block
 23475  	typ := &b.Func.Config.Types
 23476  	// match: (Select1 (Mul64uhilo x y))
 23477  	// result: (MUL x y)
 23478  	for {
 23479  		if v_0.Op != ssaop.OpMul64uhilo {
 23480  			break
 23481  		}
 23482  		y := v_0.Args[1]
 23483  		x := v_0.Args[0]
 23484  		v.Reset(ssaop.OpARM64MUL)
 23485  		v.AddArg2(x, y)
 23486  		return true
 23487  	}
 23488  	// match: (Select1 (Add64carry x y c))
 23489  	// result: (ADCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c)))))
 23490  	for {
 23491  		if v_0.Op != ssaop.OpAdd64carry {
 23492  			break
 23493  		}
 23494  		c := v_0.Args[2]
 23495  		x := v_0.Args[0]
 23496  		y := v_0.Args[1]
 23497  		v.Reset(ssaop.OpARM64ADCzerocarry)
 23498  		v.Type = typ.UInt64
 23499  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23500  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23501  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23502  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23503  		v3.AuxInt = ssa.Int64ToAuxInt(-1)
 23504  		v3.AddArg(c)
 23505  		v2.AddArg(v3)
 23506  		v1.AddArg3(x, y, v2)
 23507  		v0.AddArg(v1)
 23508  		v.AddArg(v0)
 23509  		return true
 23510  	}
 23511  	// match: (Select1 (Sub64borrow x y bo))
 23512  	// result: (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))))
 23513  	for {
 23514  		if v_0.Op != ssaop.OpSub64borrow {
 23515  			break
 23516  		}
 23517  		bo := v_0.Args[2]
 23518  		x := v_0.Args[0]
 23519  		y := v_0.Args[1]
 23520  		v.Reset(ssaop.OpARM64NEG)
 23521  		v.Type = typ.UInt64
 23522  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NGCzerocarry, typ.UInt64)
 23523  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23524  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23525  		v3 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23526  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23527  		v4.AddArg(bo)
 23528  		v3.AddArg(v4)
 23529  		v2.AddArg3(x, y, v3)
 23530  		v1.AddArg(v2)
 23531  		v0.AddArg(v1)
 23532  		v.AddArg(v0)
 23533  		return true
 23534  	}
 23535  	// match: (Select1 (Mul64uover x y))
 23536  	// result: (NotEqual (CMPconst (UMULH <typ.UInt64> x y) [0]))
 23537  	for {
 23538  		if v_0.Op != ssaop.OpMul64uover {
 23539  			break
 23540  		}
 23541  		y := v_0.Args[1]
 23542  		x := v_0.Args[0]
 23543  		v.Reset(ssaop.OpARM64NotEqual)
 23544  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23545  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 23546  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64UMULH, typ.UInt64)
 23547  		v1.AddArg2(x, y)
 23548  		v0.AddArg(v1)
 23549  		v.AddArg(v0)
 23550  		return true
 23551  	}
 23552  	return false
 23553  }
 23554  func rewriteValue_OpSelectN(v *ssa.Value) bool {
 23555  	v_0 := v.Args[0]
 23556  	b := v.Block
 23557  	config := b.Func.Config
 23558  	// match: (SelectN [0] call:(CALLstatic {sym} s1:(MOVDstore _ (MOVDconst [sz]) s2:(MOVDstore _ src s3:(MOVDstore {t} _ dst mem)))))
 23559  	// cond: sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(s1, s2, s3, call)
 23560  	// result: (Move [sz] dst src mem)
 23561  	for {
 23562  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 23563  			break
 23564  		}
 23565  		call := v_0
 23566  		if call.Op != ssaop.OpARM64CALLstatic || len(call.Args) != 1 {
 23567  			break
 23568  		}
 23569  		sym := ssa.AuxToCall(call.Aux)
 23570  		s1 := call.Args[0]
 23571  		if s1.Op != ssaop.OpARM64MOVDstore {
 23572  			break
 23573  		}
 23574  		_ = s1.Args[2]
 23575  		s1_1 := s1.Args[1]
 23576  		if s1_1.Op != ssaop.OpARM64MOVDconst {
 23577  			break
 23578  		}
 23579  		sz := ssa.AuxIntToInt64(s1_1.AuxInt)
 23580  		s2 := s1.Args[2]
 23581  		if s2.Op != ssaop.OpARM64MOVDstore {
 23582  			break
 23583  		}
 23584  		_ = s2.Args[2]
 23585  		src := s2.Args[1]
 23586  		s3 := s2.Args[2]
 23587  		if s3.Op != ssaop.OpARM64MOVDstore {
 23588  			break
 23589  		}
 23590  		mem := s3.Args[2]
 23591  		dst := s3.Args[1]
 23592  		if !(sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(s1, s2, s3, call)) {
 23593  			break
 23594  		}
 23595  		v.Reset(ssaop.OpMove)
 23596  		v.AuxInt = ssa.Int64ToAuxInt(sz)
 23597  		v.AddArg3(dst, src, mem)
 23598  		return true
 23599  	}
 23600  	// match: (SelectN [0] call:(CALLstatic {sym} dst src (MOVDconst [sz]) mem))
 23601  	// cond: sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && call.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(call)
 23602  	// result: (Move [sz] dst src mem)
 23603  	for {
 23604  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 23605  			break
 23606  		}
 23607  		call := v_0
 23608  		if call.Op != ssaop.OpARM64CALLstatic || len(call.Args) != 4 {
 23609  			break
 23610  		}
 23611  		sym := ssa.AuxToCall(call.Aux)
 23612  		mem := call.Args[3]
 23613  		dst := call.Args[0]
 23614  		src := call.Args[1]
 23615  		call_2 := call.Args[2]
 23616  		if call_2.Op != ssaop.OpARM64MOVDconst {
 23617  			break
 23618  		}
 23619  		sz := ssa.AuxIntToInt64(call_2.AuxInt)
 23620  		if !(sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && call.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(call)) {
 23621  			break
 23622  		}
 23623  		v.Reset(ssaop.OpMove)
 23624  		v.AuxInt = ssa.Int64ToAuxInt(sz)
 23625  		v.AddArg3(dst, src, mem)
 23626  		return true
 23627  	}
 23628  	return false
 23629  }
 23630  func rewriteValue_OpShiftAllLeftInt16x8(v *ssa.Value) bool {
 23631  	v_1 := v.Args[1]
 23632  	v_0 := v.Args[0]
 23633  	b := v.Block
 23634  	typ := &b.Func.Config.Types
 23635  	// match: (ShiftAllLeftInt16x8 x y)
 23636  	// result: (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23637  	for {
 23638  		x := v_0
 23639  		y := v_1
 23640  		v.Reset(ssaop.OpARM64VSSHL8H)
 23641  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 23642  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23643  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 23644  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23645  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23646  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23647  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23648  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23649  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23650  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23651  		v4.AddArg(y)
 23652  		v2.AddArg3(y, v3, v4)
 23653  		v1.AddArg2(x, v2)
 23654  		v0.AddArg(v1)
 23655  		v.AddArg2(x, v0)
 23656  		return true
 23657  	}
 23658  }
 23659  func rewriteValue_OpShiftAllLeftInt32x4(v *ssa.Value) bool {
 23660  	v_1 := v.Args[1]
 23661  	v_0 := v.Args[0]
 23662  	b := v.Block
 23663  	typ := &b.Func.Config.Types
 23664  	// match: (ShiftAllLeftInt32x4 x y)
 23665  	// result: (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23666  	for {
 23667  		x := v_0
 23668  		y := v_1
 23669  		v.Reset(ssaop.OpARM64VSSHL4S)
 23670  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 23671  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23672  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 23673  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23674  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23675  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23676  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23677  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23678  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23679  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23680  		v4.AddArg(y)
 23681  		v2.AddArg3(y, v3, v4)
 23682  		v1.AddArg2(x, v2)
 23683  		v0.AddArg(v1)
 23684  		v.AddArg2(x, v0)
 23685  		return true
 23686  	}
 23687  }
 23688  func rewriteValue_OpShiftAllLeftInt64x2(v *ssa.Value) bool {
 23689  	v_1 := v.Args[1]
 23690  	v_0 := v.Args[0]
 23691  	b := v.Block
 23692  	typ := &b.Func.Config.Types
 23693  	// match: (ShiftAllLeftInt64x2 x y)
 23694  	// result: (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23695  	for {
 23696  		x := v_0
 23697  		y := v_1
 23698  		v.Reset(ssaop.OpARM64VSSHL2D)
 23699  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 23700  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23701  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 23702  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23703  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23704  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23705  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23706  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23707  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23708  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23709  		v4.AddArg(y)
 23710  		v2.AddArg3(y, v3, v4)
 23711  		v1.AddArg2(x, v2)
 23712  		v0.AddArg(v1)
 23713  		v.AddArg2(x, v0)
 23714  		return true
 23715  	}
 23716  }
 23717  func rewriteValue_OpShiftAllLeftInt8x16(v *ssa.Value) bool {
 23718  	v_1 := v.Args[1]
 23719  	v_0 := v.Args[0]
 23720  	b := v.Block
 23721  	typ := &b.Func.Config.Types
 23722  	// match: (ShiftAllLeftInt8x16 x y)
 23723  	// result: (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23724  	for {
 23725  		x := v_0
 23726  		y := v_1
 23727  		v.Reset(ssaop.OpARM64VSSHL16B)
 23728  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 23729  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23730  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 23731  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23732  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23733  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23734  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23735  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23736  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23737  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23738  		v4.AddArg(y)
 23739  		v2.AddArg3(y, v3, v4)
 23740  		v1.AddArg2(x, v2)
 23741  		v0.AddArg(v1)
 23742  		v.AddArg2(x, v0)
 23743  		return true
 23744  	}
 23745  }
 23746  func rewriteValue_OpShiftAllLeftUint16x8(v *ssa.Value) bool {
 23747  	v_1 := v.Args[1]
 23748  	v_0 := v.Args[0]
 23749  	b := v.Block
 23750  	typ := &b.Func.Config.Types
 23751  	// match: (ShiftAllLeftUint16x8 x y)
 23752  	// result: (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23753  	for {
 23754  		x := v_0
 23755  		y := v_1
 23756  		v.Reset(ssaop.OpARM64VUSHL8H)
 23757  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 23758  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23759  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 23760  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23761  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23762  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23763  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23764  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23765  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23766  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23767  		v4.AddArg(y)
 23768  		v2.AddArg3(y, v3, v4)
 23769  		v1.AddArg2(x, v2)
 23770  		v0.AddArg(v1)
 23771  		v.AddArg2(x, v0)
 23772  		return true
 23773  	}
 23774  }
 23775  func rewriteValue_OpShiftAllLeftUint32x4(v *ssa.Value) bool {
 23776  	v_1 := v.Args[1]
 23777  	v_0 := v.Args[0]
 23778  	b := v.Block
 23779  	typ := &b.Func.Config.Types
 23780  	// match: (ShiftAllLeftUint32x4 x y)
 23781  	// result: (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23782  	for {
 23783  		x := v_0
 23784  		y := v_1
 23785  		v.Reset(ssaop.OpARM64VUSHL4S)
 23786  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 23787  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23788  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 23789  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23790  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23791  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23792  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23793  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23794  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23795  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23796  		v4.AddArg(y)
 23797  		v2.AddArg3(y, v3, v4)
 23798  		v1.AddArg2(x, v2)
 23799  		v0.AddArg(v1)
 23800  		v.AddArg2(x, v0)
 23801  		return true
 23802  	}
 23803  }
 23804  func rewriteValue_OpShiftAllLeftUint64x2(v *ssa.Value) bool {
 23805  	v_1 := v.Args[1]
 23806  	v_0 := v.Args[0]
 23807  	b := v.Block
 23808  	typ := &b.Func.Config.Types
 23809  	// match: (ShiftAllLeftUint64x2 x y)
 23810  	// result: (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23811  	for {
 23812  		x := v_0
 23813  		y := v_1
 23814  		v.Reset(ssaop.OpARM64VUSHL2D)
 23815  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 23816  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23817  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 23818  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23819  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23820  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23821  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23822  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23823  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23824  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23825  		v4.AddArg(y)
 23826  		v2.AddArg3(y, v3, v4)
 23827  		v1.AddArg2(x, v2)
 23828  		v0.AddArg(v1)
 23829  		v.AddArg2(x, v0)
 23830  		return true
 23831  	}
 23832  }
 23833  func rewriteValue_OpShiftAllLeftUint8x16(v *ssa.Value) bool {
 23834  	v_1 := v.Args[1]
 23835  	v_0 := v.Args[0]
 23836  	b := v.Block
 23837  	typ := &b.Func.Config.Types
 23838  	// match: (ShiftAllLeftUint8x16 x y)
 23839  	// result: (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23840  	for {
 23841  		x := v_0
 23842  		y := v_1
 23843  		v.Reset(ssaop.OpARM64VUSHL16B)
 23844  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 23845  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23846  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 23847  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23848  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23849  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23850  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23851  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23852  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23853  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23854  		v4.AddArg(y)
 23855  		v2.AddArg3(y, v3, v4)
 23856  		v1.AddArg2(x, v2)
 23857  		v0.AddArg(v1)
 23858  		v.AddArg2(x, v0)
 23859  		return true
 23860  	}
 23861  }
 23862  func rewriteValue_OpShiftAllRightInt16x8(v *ssa.Value) bool {
 23863  	v_1 := v.Args[1]
 23864  	v_0 := v.Args[0]
 23865  	b := v.Block
 23866  	typ := &b.Func.Config.Types
 23867  	// match: (ShiftAllRightInt16x8 x y)
 23868  	// result: (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 23869  	for {
 23870  		x := v_0
 23871  		y := v_1
 23872  		v.Reset(ssaop.OpARM64VSSHL8H)
 23873  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 23874  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23875  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 23876  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23877  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 23878  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23879  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23880  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23881  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23882  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23883  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 23884  		v5.AddArg(y)
 23885  		v3.AddArg3(y, v4, v5)
 23886  		v2.AddArg(v3)
 23887  		v1.AddArg2(x, v2)
 23888  		v0.AddArg(v1)
 23889  		v.AddArg2(x, v0)
 23890  		return true
 23891  	}
 23892  }
 23893  func rewriteValue_OpShiftAllRightInt32x4(v *ssa.Value) bool {
 23894  	v_1 := v.Args[1]
 23895  	v_0 := v.Args[0]
 23896  	b := v.Block
 23897  	typ := &b.Func.Config.Types
 23898  	// match: (ShiftAllRightInt32x4 x y)
 23899  	// result: (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 23900  	for {
 23901  		x := v_0
 23902  		y := v_1
 23903  		v.Reset(ssaop.OpARM64VSSHL4S)
 23904  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 23905  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23906  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 23907  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23908  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 23909  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23910  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23911  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23912  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23913  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23914  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 23915  		v5.AddArg(y)
 23916  		v3.AddArg3(y, v4, v5)
 23917  		v2.AddArg(v3)
 23918  		v1.AddArg2(x, v2)
 23919  		v0.AddArg(v1)
 23920  		v.AddArg2(x, v0)
 23921  		return true
 23922  	}
 23923  }
 23924  func rewriteValue_OpShiftAllRightInt64x2(v *ssa.Value) bool {
 23925  	v_1 := v.Args[1]
 23926  	v_0 := v.Args[0]
 23927  	b := v.Block
 23928  	typ := &b.Func.Config.Types
 23929  	// match: (ShiftAllRightInt64x2 x y)
 23930  	// result: (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 23931  	for {
 23932  		x := v_0
 23933  		y := v_1
 23934  		v.Reset(ssaop.OpARM64VSSHL2D)
 23935  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 23936  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23937  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 23938  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23939  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 23940  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23941  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23942  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23943  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23944  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23945  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 23946  		v5.AddArg(y)
 23947  		v3.AddArg3(y, v4, v5)
 23948  		v2.AddArg(v3)
 23949  		v1.AddArg2(x, v2)
 23950  		v0.AddArg(v1)
 23951  		v.AddArg2(x, v0)
 23952  		return true
 23953  	}
 23954  }
 23955  func rewriteValue_OpShiftAllRightInt8x16(v *ssa.Value) bool {
 23956  	v_1 := v.Args[1]
 23957  	v_0 := v.Args[0]
 23958  	b := v.Block
 23959  	typ := &b.Func.Config.Types
 23960  	// match: (ShiftAllRightInt8x16 x y)
 23961  	// result: (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 23962  	for {
 23963  		x := v_0
 23964  		y := v_1
 23965  		v.Reset(ssaop.OpARM64VSSHL16B)
 23966  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 23967  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23968  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 23969  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23970  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 23971  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23972  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23973  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23974  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23975  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23976  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 23977  		v5.AddArg(y)
 23978  		v3.AddArg3(y, v4, v5)
 23979  		v2.AddArg(v3)
 23980  		v1.AddArg2(x, v2)
 23981  		v0.AddArg(v1)
 23982  		v.AddArg2(x, v0)
 23983  		return true
 23984  	}
 23985  }
 23986  func rewriteValue_OpShiftAllRightUint16x8(v *ssa.Value) bool {
 23987  	v_1 := v.Args[1]
 23988  	v_0 := v.Args[0]
 23989  	b := v.Block
 23990  	typ := &b.Func.Config.Types
 23991  	// match: (ShiftAllRightUint16x8 x y)
 23992  	// result: (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 23993  	for {
 23994  		x := v_0
 23995  		y := v_1
 23996  		v.Reset(ssaop.OpARM64VUSHL8H)
 23997  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 23998  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23999  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 24000  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24001  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24002  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24003  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24004  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24005  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24006  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24007  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24008  		v5.AddArg(y)
 24009  		v3.AddArg3(y, v4, v5)
 24010  		v2.AddArg(v3)
 24011  		v1.AddArg2(x, v2)
 24012  		v0.AddArg(v1)
 24013  		v.AddArg2(x, v0)
 24014  		return true
 24015  	}
 24016  }
 24017  func rewriteValue_OpShiftAllRightUint32x4(v *ssa.Value) bool {
 24018  	v_1 := v.Args[1]
 24019  	v_0 := v.Args[0]
 24020  	b := v.Block
 24021  	typ := &b.Func.Config.Types
 24022  	// match: (ShiftAllRightUint32x4 x y)
 24023  	// result: (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24024  	for {
 24025  		x := v_0
 24026  		y := v_1
 24027  		v.Reset(ssaop.OpARM64VUSHL4S)
 24028  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 24029  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24030  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 24031  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24032  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24033  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24034  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24035  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24036  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24037  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24038  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24039  		v5.AddArg(y)
 24040  		v3.AddArg3(y, v4, v5)
 24041  		v2.AddArg(v3)
 24042  		v1.AddArg2(x, v2)
 24043  		v0.AddArg(v1)
 24044  		v.AddArg2(x, v0)
 24045  		return true
 24046  	}
 24047  }
 24048  func rewriteValue_OpShiftAllRightUint64x2(v *ssa.Value) bool {
 24049  	v_1 := v.Args[1]
 24050  	v_0 := v.Args[0]
 24051  	b := v.Block
 24052  	typ := &b.Func.Config.Types
 24053  	// match: (ShiftAllRightUint64x2 x y)
 24054  	// result: (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24055  	for {
 24056  		x := v_0
 24057  		y := v_1
 24058  		v.Reset(ssaop.OpARM64VUSHL2D)
 24059  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 24060  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24061  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 24062  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24063  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24064  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24065  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24066  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24067  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24068  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24069  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24070  		v5.AddArg(y)
 24071  		v3.AddArg3(y, v4, v5)
 24072  		v2.AddArg(v3)
 24073  		v1.AddArg2(x, v2)
 24074  		v0.AddArg(v1)
 24075  		v.AddArg2(x, v0)
 24076  		return true
 24077  	}
 24078  }
 24079  func rewriteValue_OpShiftAllRightUint8x16(v *ssa.Value) bool {
 24080  	v_1 := v.Args[1]
 24081  	v_0 := v.Args[0]
 24082  	b := v.Block
 24083  	typ := &b.Func.Config.Types
 24084  	// match: (ShiftAllRightUint8x16 x y)
 24085  	// result: (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24086  	for {
 24087  		x := v_0
 24088  		y := v_1
 24089  		v.Reset(ssaop.OpARM64VUSHL16B)
 24090  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 24091  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24092  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 24093  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24094  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24095  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24096  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24097  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24098  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24099  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24100  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24101  		v5.AddArg(y)
 24102  		v3.AddArg3(y, v4, v5)
 24103  		v2.AddArg(v3)
 24104  		v1.AddArg2(x, v2)
 24105  		v0.AddArg(v1)
 24106  		v.AddArg2(x, v0)
 24107  		return true
 24108  	}
 24109  }
 24110  func rewriteValue_OpSlicemask(v *ssa.Value) bool {
 24111  	v_0 := v.Args[0]
 24112  	b := v.Block
 24113  	// match: (Slicemask <t> x)
 24114  	// result: (SRAconst (NEG <t> x) [63])
 24115  	for {
 24116  		t := v.Type
 24117  		x := v_0
 24118  		v.Reset(ssaop.OpARM64SRAconst)
 24119  		v.AuxInt = ssa.Int64ToAuxInt(63)
 24120  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, t)
 24121  		v0.AddArg(x)
 24122  		v.AddArg(v0)
 24123  		return true
 24124  	}
 24125  }
 24126  func rewriteValue_OpStore(v *ssa.Value) bool {
 24127  	v_2 := v.Args[2]
 24128  	v_1 := v.Args[1]
 24129  	v_0 := v.Args[0]
 24130  	// match: (Store {t} ptr val mem)
 24131  	// cond: t.Size() == 1
 24132  	// result: (MOVBstore ptr val mem)
 24133  	for {
 24134  		t := ssa.AuxToType(v.Aux)
 24135  		ptr := v_0
 24136  		val := v_1
 24137  		mem := v_2
 24138  		if !(t.Size() == 1) {
 24139  			break
 24140  		}
 24141  		v.Reset(ssaop.OpARM64MOVBstore)
 24142  		v.AddArg3(ptr, val, mem)
 24143  		return true
 24144  	}
 24145  	// match: (Store {t} ptr val mem)
 24146  	// cond: t.Size() == 2
 24147  	// result: (MOVHstore ptr val mem)
 24148  	for {
 24149  		t := ssa.AuxToType(v.Aux)
 24150  		ptr := v_0
 24151  		val := v_1
 24152  		mem := v_2
 24153  		if !(t.Size() == 2) {
 24154  			break
 24155  		}
 24156  		v.Reset(ssaop.OpARM64MOVHstore)
 24157  		v.AddArg3(ptr, val, mem)
 24158  		return true
 24159  	}
 24160  	// match: (Store {t} ptr val mem)
 24161  	// cond: t.Size() == 4 && !t.IsFloat()
 24162  	// result: (MOVWstore ptr val mem)
 24163  	for {
 24164  		t := ssa.AuxToType(v.Aux)
 24165  		ptr := v_0
 24166  		val := v_1
 24167  		mem := v_2
 24168  		if !(t.Size() == 4 && !t.IsFloat()) {
 24169  			break
 24170  		}
 24171  		v.Reset(ssaop.OpARM64MOVWstore)
 24172  		v.AddArg3(ptr, val, mem)
 24173  		return true
 24174  	}
 24175  	// match: (Store {t} ptr val mem)
 24176  	// cond: t.Size() == 8 && !t.IsFloat() && !t.IsSIMD()
 24177  	// result: (MOVDstore ptr val mem)
 24178  	for {
 24179  		t := ssa.AuxToType(v.Aux)
 24180  		ptr := v_0
 24181  		val := v_1
 24182  		mem := v_2
 24183  		if !(t.Size() == 8 && !t.IsFloat() && !t.IsSIMD()) {
 24184  			break
 24185  		}
 24186  		v.Reset(ssaop.OpARM64MOVDstore)
 24187  		v.AddArg3(ptr, val, mem)
 24188  		return true
 24189  	}
 24190  	// match: (Store {t} ptr val mem)
 24191  	// cond: t.Size() == 4 && t.IsFloat()
 24192  	// result: (FMOVSstore ptr val mem)
 24193  	for {
 24194  		t := ssa.AuxToType(v.Aux)
 24195  		ptr := v_0
 24196  		val := v_1
 24197  		mem := v_2
 24198  		if !(t.Size() == 4 && t.IsFloat()) {
 24199  			break
 24200  		}
 24201  		v.Reset(ssaop.OpARM64FMOVSstore)
 24202  		v.AddArg3(ptr, val, mem)
 24203  		return true
 24204  	}
 24205  	// match: (Store {t} ptr val mem)
 24206  	// cond: t.Size() == 8 && t.IsFloat()
 24207  	// result: (FMOVDstore ptr val mem)
 24208  	for {
 24209  		t := ssa.AuxToType(v.Aux)
 24210  		ptr := v_0
 24211  		val := v_1
 24212  		mem := v_2
 24213  		if !(t.Size() == 8 && t.IsFloat()) {
 24214  			break
 24215  		}
 24216  		v.Reset(ssaop.OpARM64FMOVDstore)
 24217  		v.AddArg3(ptr, val, mem)
 24218  		return true
 24219  	}
 24220  	// match: (Store {t} ptr val mem)
 24221  	// cond: t.Size() == 16
 24222  	// result: (FMOVQstore ptr val mem)
 24223  	for {
 24224  		t := ssa.AuxToType(v.Aux)
 24225  		ptr := v_0
 24226  		val := v_1
 24227  		mem := v_2
 24228  		if !(t.Size() == 16) {
 24229  			break
 24230  		}
 24231  		v.Reset(ssaop.OpARM64FMOVQstore)
 24232  		v.AddArg3(ptr, val, mem)
 24233  		return true
 24234  	}
 24235  	// match: (Store {t} ptr val mem)
 24236  	// cond: t.Size() == 32 && t.IsSIMD()
 24237  	// result: (ZSTRstore ptr val mem)
 24238  	for {
 24239  		t := ssa.AuxToType(v.Aux)
 24240  		ptr := v_0
 24241  		val := v_1
 24242  		mem := v_2
 24243  		if !(t.Size() == 32 && t.IsSIMD()) {
 24244  			break
 24245  		}
 24246  		v.Reset(ssaop.OpARM64ZSTRstore)
 24247  		v.AddArg3(ptr, val, mem)
 24248  		return true
 24249  	}
 24250  	// match: (Store {t} ptr val mem)
 24251  	// cond: t.Size() == 8 && t.IsSIMD()
 24252  	// result: (PSTRstore ptr val mem)
 24253  	for {
 24254  		t := ssa.AuxToType(v.Aux)
 24255  		ptr := v_0
 24256  		val := v_1
 24257  		mem := v_2
 24258  		if !(t.Size() == 8 && t.IsSIMD()) {
 24259  			break
 24260  		}
 24261  		v.Reset(ssaop.OpARM64PSTRstore)
 24262  		v.AddArg3(ptr, val, mem)
 24263  		return true
 24264  	}
 24265  	return false
 24266  }
 24267  func rewriteValue_OpStoreMasked8(v *ssa.Value) bool {
 24268  	v_3 := v.Args[3]
 24269  	v_2 := v.Args[2]
 24270  	v_1 := v.Args[1]
 24271  	v_0 := v.Args[0]
 24272  	// match: (StoreMasked8 {t} ptr mask val mem)
 24273  	// cond: t.Size() == 32
 24274  	// result: (ZST1BPredstore ptr val mask mem)
 24275  	for {
 24276  		t := ssa.AuxToType(v.Aux)
 24277  		ptr := v_0
 24278  		mask := v_1
 24279  		val := v_2
 24280  		mem := v_3
 24281  		if !(t.Size() == 32) {
 24282  			break
 24283  		}
 24284  		v.Reset(ssaop.OpARM64ZST1BPredstore)
 24285  		v.AddArg4(ptr, val, mask, mem)
 24286  		return true
 24287  	}
 24288  	return false
 24289  }
 24290  func rewriteValue_OpZero(v *ssa.Value) bool {
 24291  	v_1 := v.Args[1]
 24292  	v_0 := v.Args[0]
 24293  	b := v.Block
 24294  	typ := &b.Func.Config.Types
 24295  	// match: (Zero [0] _ mem)
 24296  	// result: mem
 24297  	for {
 24298  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 24299  			break
 24300  		}
 24301  		mem := v_1
 24302  		v.CopyOf(mem)
 24303  		return true
 24304  	}
 24305  	// match: (Zero [1] ptr mem)
 24306  	// result: (MOVBstore ptr (MOVDconst [0]) mem)
 24307  	for {
 24308  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
 24309  			break
 24310  		}
 24311  		ptr := v_0
 24312  		mem := v_1
 24313  		v.Reset(ssaop.OpARM64MOVBstore)
 24314  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24315  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24316  		v.AddArg3(ptr, v0, mem)
 24317  		return true
 24318  	}
 24319  	// match: (Zero [2] ptr mem)
 24320  	// result: (MOVHstore ptr (MOVDconst [0]) mem)
 24321  	for {
 24322  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
 24323  			break
 24324  		}
 24325  		ptr := v_0
 24326  		mem := v_1
 24327  		v.Reset(ssaop.OpARM64MOVHstore)
 24328  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24329  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24330  		v.AddArg3(ptr, v0, mem)
 24331  		return true
 24332  	}
 24333  	// match: (Zero [4] ptr mem)
 24334  	// result: (MOVWstore ptr (MOVDconst [0]) mem)
 24335  	for {
 24336  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
 24337  			break
 24338  		}
 24339  		ptr := v_0
 24340  		mem := v_1
 24341  		v.Reset(ssaop.OpARM64MOVWstore)
 24342  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24343  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24344  		v.AddArg3(ptr, v0, mem)
 24345  		return true
 24346  	}
 24347  	// match: (Zero [3] ptr mem)
 24348  	// result: (MOVBstore [2] ptr (MOVDconst [0]) (MOVHstore ptr (MOVDconst [0]) mem))
 24349  	for {
 24350  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
 24351  			break
 24352  		}
 24353  		ptr := v_0
 24354  		mem := v_1
 24355  		v.Reset(ssaop.OpARM64MOVBstore)
 24356  		v.AuxInt = ssa.Int32ToAuxInt(2)
 24357  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24358  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24359  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHstore, types.TypeMem)
 24360  		v1.AddArg3(ptr, v0, mem)
 24361  		v.AddArg3(ptr, v0, v1)
 24362  		return true
 24363  	}
 24364  	// match: (Zero [5] ptr mem)
 24365  	// result: (MOVBstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 24366  	for {
 24367  		if ssa.AuxIntToInt64(v.AuxInt) != 5 {
 24368  			break
 24369  		}
 24370  		ptr := v_0
 24371  		mem := v_1
 24372  		v.Reset(ssaop.OpARM64MOVBstore)
 24373  		v.AuxInt = ssa.Int32ToAuxInt(4)
 24374  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24375  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24376  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 24377  		v1.AddArg3(ptr, v0, mem)
 24378  		v.AddArg3(ptr, v0, v1)
 24379  		return true
 24380  	}
 24381  	// match: (Zero [6] ptr mem)
 24382  	// result: (MOVHstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 24383  	for {
 24384  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
 24385  			break
 24386  		}
 24387  		ptr := v_0
 24388  		mem := v_1
 24389  		v.Reset(ssaop.OpARM64MOVHstore)
 24390  		v.AuxInt = ssa.Int32ToAuxInt(4)
 24391  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24392  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24393  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 24394  		v1.AddArg3(ptr, v0, mem)
 24395  		v.AddArg3(ptr, v0, v1)
 24396  		return true
 24397  	}
 24398  	// match: (Zero [7] ptr mem)
 24399  	// result: (MOVWstore [3] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 24400  	for {
 24401  		if ssa.AuxIntToInt64(v.AuxInt) != 7 {
 24402  			break
 24403  		}
 24404  		ptr := v_0
 24405  		mem := v_1
 24406  		v.Reset(ssaop.OpARM64MOVWstore)
 24407  		v.AuxInt = ssa.Int32ToAuxInt(3)
 24408  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24409  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24410  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 24411  		v1.AddArg3(ptr, v0, mem)
 24412  		v.AddArg3(ptr, v0, v1)
 24413  		return true
 24414  	}
 24415  	// match: (Zero [8] ptr mem)
 24416  	// result: (MOVDstore ptr (MOVDconst [0]) mem)
 24417  	for {
 24418  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
 24419  			break
 24420  		}
 24421  		ptr := v_0
 24422  		mem := v_1
 24423  		v.Reset(ssaop.OpARM64MOVDstore)
 24424  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24425  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24426  		v.AddArg3(ptr, v0, mem)
 24427  		return true
 24428  	}
 24429  	// match: (Zero [9] ptr mem)
 24430  	// result: (MOVBstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24431  	for {
 24432  		if ssa.AuxIntToInt64(v.AuxInt) != 9 {
 24433  			break
 24434  		}
 24435  		ptr := v_0
 24436  		mem := v_1
 24437  		v.Reset(ssaop.OpARM64MOVBstore)
 24438  		v.AuxInt = ssa.Int32ToAuxInt(8)
 24439  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24440  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24441  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24442  		v1.AddArg3(ptr, v0, mem)
 24443  		v.AddArg3(ptr, v0, v1)
 24444  		return true
 24445  	}
 24446  	// match: (Zero [10] ptr mem)
 24447  	// result: (MOVHstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24448  	for {
 24449  		if ssa.AuxIntToInt64(v.AuxInt) != 10 {
 24450  			break
 24451  		}
 24452  		ptr := v_0
 24453  		mem := v_1
 24454  		v.Reset(ssaop.OpARM64MOVHstore)
 24455  		v.AuxInt = ssa.Int32ToAuxInt(8)
 24456  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24457  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24458  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24459  		v1.AddArg3(ptr, v0, mem)
 24460  		v.AddArg3(ptr, v0, v1)
 24461  		return true
 24462  	}
 24463  	// match: (Zero [11] ptr mem)
 24464  	// result: (MOVDstore [3] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24465  	for {
 24466  		if ssa.AuxIntToInt64(v.AuxInt) != 11 {
 24467  			break
 24468  		}
 24469  		ptr := v_0
 24470  		mem := v_1
 24471  		v.Reset(ssaop.OpARM64MOVDstore)
 24472  		v.AuxInt = ssa.Int32ToAuxInt(3)
 24473  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24474  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24475  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24476  		v1.AddArg3(ptr, v0, mem)
 24477  		v.AddArg3(ptr, v0, v1)
 24478  		return true
 24479  	}
 24480  	// match: (Zero [12] ptr mem)
 24481  	// result: (MOVWstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24482  	for {
 24483  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
 24484  			break
 24485  		}
 24486  		ptr := v_0
 24487  		mem := v_1
 24488  		v.Reset(ssaop.OpARM64MOVWstore)
 24489  		v.AuxInt = ssa.Int32ToAuxInt(8)
 24490  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24491  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24492  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24493  		v1.AddArg3(ptr, v0, mem)
 24494  		v.AddArg3(ptr, v0, v1)
 24495  		return true
 24496  	}
 24497  	// match: (Zero [13] ptr mem)
 24498  	// result: (MOVDstore [5] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24499  	for {
 24500  		if ssa.AuxIntToInt64(v.AuxInt) != 13 {
 24501  			break
 24502  		}
 24503  		ptr := v_0
 24504  		mem := v_1
 24505  		v.Reset(ssaop.OpARM64MOVDstore)
 24506  		v.AuxInt = ssa.Int32ToAuxInt(5)
 24507  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24508  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24509  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24510  		v1.AddArg3(ptr, v0, mem)
 24511  		v.AddArg3(ptr, v0, v1)
 24512  		return true
 24513  	}
 24514  	// match: (Zero [14] ptr mem)
 24515  	// result: (MOVDstore [6] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24516  	for {
 24517  		if ssa.AuxIntToInt64(v.AuxInt) != 14 {
 24518  			break
 24519  		}
 24520  		ptr := v_0
 24521  		mem := v_1
 24522  		v.Reset(ssaop.OpARM64MOVDstore)
 24523  		v.AuxInt = ssa.Int32ToAuxInt(6)
 24524  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24525  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24526  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24527  		v1.AddArg3(ptr, v0, mem)
 24528  		v.AddArg3(ptr, v0, v1)
 24529  		return true
 24530  	}
 24531  	// match: (Zero [15] ptr mem)
 24532  	// result: (MOVDstore [7] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24533  	for {
 24534  		if ssa.AuxIntToInt64(v.AuxInt) != 15 {
 24535  			break
 24536  		}
 24537  		ptr := v_0
 24538  		mem := v_1
 24539  		v.Reset(ssaop.OpARM64MOVDstore)
 24540  		v.AuxInt = ssa.Int32ToAuxInt(7)
 24541  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24542  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24543  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24544  		v1.AddArg3(ptr, v0, mem)
 24545  		v.AddArg3(ptr, v0, v1)
 24546  		return true
 24547  	}
 24548  	// match: (Zero [16] ptr mem)
 24549  	// result: (STP [0] ptr (MOVDconst [0]) (MOVDconst [0]) mem)
 24550  	for {
 24551  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
 24552  			break
 24553  		}
 24554  		ptr := v_0
 24555  		mem := v_1
 24556  		v.Reset(ssaop.OpARM64STP)
 24557  		v.AuxInt = ssa.Int32ToAuxInt(0)
 24558  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24559  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24560  		v.AddArg4(ptr, v0, v0, mem)
 24561  		return true
 24562  	}
 24563  	// match: (Zero [s] ptr mem)
 24564  	// cond: s > 16 && s < 192
 24565  	// result: (LoweredZero [s] ptr mem)
 24566  	for {
 24567  		s := ssa.AuxIntToInt64(v.AuxInt)
 24568  		ptr := v_0
 24569  		mem := v_1
 24570  		if !(s > 16 && s < 192) {
 24571  			break
 24572  		}
 24573  		v.Reset(ssaop.OpARM64LoweredZero)
 24574  		v.AuxInt = ssa.Int64ToAuxInt(s)
 24575  		v.AddArg2(ptr, mem)
 24576  		return true
 24577  	}
 24578  	// match: (Zero [s] ptr mem)
 24579  	// cond: s >= 192
 24580  	// result: (LoweredZeroLoop [s] ptr mem)
 24581  	for {
 24582  		s := ssa.AuxIntToInt64(v.AuxInt)
 24583  		ptr := v_0
 24584  		mem := v_1
 24585  		if !(s >= 192) {
 24586  			break
 24587  		}
 24588  		v.Reset(ssaop.OpARM64LoweredZeroLoop)
 24589  		v.AuxInt = ssa.Int64ToAuxInt(s)
 24590  		v.AddArg2(ptr, mem)
 24591  		return true
 24592  	}
 24593  	return false
 24594  }
 24595  func rewriteValue_OpZeroSIMD(v *ssa.Value) bool {
 24596  	// match: (ZeroSIMD <t>)
 24597  	// cond: t.Size() == 16
 24598  	// result: (VMOVI16B [0] <t>)
 24599  	for {
 24600  		t := v.Type
 24601  		if !(t.Size() == 16) {
 24602  			break
 24603  		}
 24604  		v.Reset(ssaop.OpARM64VMOVI16B)
 24605  		v.Type = t
 24606  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24607  		return true
 24608  	}
 24609  	// match: (ZeroSIMD <t>)
 24610  	// cond: t.Size() == 8 && t.IsSIMD()
 24611  	// result: (PPFALSE)
 24612  	for {
 24613  		t := v.Type
 24614  		if !(t.Size() == 8 && t.IsSIMD()) {
 24615  			break
 24616  		}
 24617  		v.Reset(ssaop.OpARM64PPFALSE)
 24618  		return true
 24619  	}
 24620  	// match: (ZeroSIMD <t>)
 24621  	// cond: t.Size() == 32 && t.IsSIMD()
 24622  	// result: (ZDUPBconst [0])
 24623  	for {
 24624  		t := v.Type
 24625  		if !(t.Size() == 32 && t.IsSIMD()) {
 24626  			break
 24627  		}
 24628  		v.Reset(ssaop.OpARM64ZDUPBconst)
 24629  		v.AuxInt = ssa.Int8ToAuxInt(0)
 24630  		return true
 24631  	}
 24632  	return false
 24633  }
 24634  func rewriteValue_Opbroadcast1To16Int8x16(v *ssa.Value) bool {
 24635  	v_0 := v.Args[0]
 24636  	// match: (broadcast1To16Int8x16 x)
 24637  	// result: (VDUPBbcast [0] x)
 24638  	for {
 24639  		x := v_0
 24640  		v.Reset(ssaop.OpARM64VDUPBbcast)
 24641  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24642  		v.AddArg(x)
 24643  		return true
 24644  	}
 24645  }
 24646  func rewriteValue_Opbroadcast1To16Uint8x16(v *ssa.Value) bool {
 24647  	v_0 := v.Args[0]
 24648  	// match: (broadcast1To16Uint8x16 x)
 24649  	// result: (VDUPBbcast [0] x)
 24650  	for {
 24651  		x := v_0
 24652  		v.Reset(ssaop.OpARM64VDUPBbcast)
 24653  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24654  		v.AddArg(x)
 24655  		return true
 24656  	}
 24657  }
 24658  func rewriteValue_Opbroadcast1To2Float64x2(v *ssa.Value) bool {
 24659  	v_0 := v.Args[0]
 24660  	// match: (broadcast1To2Float64x2 x)
 24661  	// result: (VDUPDbcast [0] x)
 24662  	for {
 24663  		x := v_0
 24664  		v.Reset(ssaop.OpARM64VDUPDbcast)
 24665  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24666  		v.AddArg(x)
 24667  		return true
 24668  	}
 24669  }
 24670  func rewriteValue_Opbroadcast1To2Int64x2(v *ssa.Value) bool {
 24671  	v_0 := v.Args[0]
 24672  	// match: (broadcast1To2Int64x2 x)
 24673  	// result: (VDUPDbcast [0] x)
 24674  	for {
 24675  		x := v_0
 24676  		v.Reset(ssaop.OpARM64VDUPDbcast)
 24677  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24678  		v.AddArg(x)
 24679  		return true
 24680  	}
 24681  }
 24682  func rewriteValue_Opbroadcast1To2Uint64x2(v *ssa.Value) bool {
 24683  	v_0 := v.Args[0]
 24684  	// match: (broadcast1To2Uint64x2 x)
 24685  	// result: (VDUPDbcast [0] x)
 24686  	for {
 24687  		x := v_0
 24688  		v.Reset(ssaop.OpARM64VDUPDbcast)
 24689  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24690  		v.AddArg(x)
 24691  		return true
 24692  	}
 24693  }
 24694  func rewriteValue_Opbroadcast1To4Float32x4(v *ssa.Value) bool {
 24695  	v_0 := v.Args[0]
 24696  	// match: (broadcast1To4Float32x4 x)
 24697  	// result: (VDUPSbcast [0] x)
 24698  	for {
 24699  		x := v_0
 24700  		v.Reset(ssaop.OpARM64VDUPSbcast)
 24701  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24702  		v.AddArg(x)
 24703  		return true
 24704  	}
 24705  }
 24706  func rewriteValue_Opbroadcast1To4Int32x4(v *ssa.Value) bool {
 24707  	v_0 := v.Args[0]
 24708  	// match: (broadcast1To4Int32x4 x)
 24709  	// result: (VDUPSbcast [0] x)
 24710  	for {
 24711  		x := v_0
 24712  		v.Reset(ssaop.OpARM64VDUPSbcast)
 24713  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24714  		v.AddArg(x)
 24715  		return true
 24716  	}
 24717  }
 24718  func rewriteValue_Opbroadcast1To4Uint32x4(v *ssa.Value) bool {
 24719  	v_0 := v.Args[0]
 24720  	// match: (broadcast1To4Uint32x4 x)
 24721  	// result: (VDUPSbcast [0] x)
 24722  	for {
 24723  		x := v_0
 24724  		v.Reset(ssaop.OpARM64VDUPSbcast)
 24725  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24726  		v.AddArg(x)
 24727  		return true
 24728  	}
 24729  }
 24730  func rewriteValue_Opbroadcast1To8Int16x8(v *ssa.Value) bool {
 24731  	v_0 := v.Args[0]
 24732  	// match: (broadcast1To8Int16x8 x)
 24733  	// result: (VDUPHbcast [0] x)
 24734  	for {
 24735  		x := v_0
 24736  		v.Reset(ssaop.OpARM64VDUPHbcast)
 24737  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24738  		v.AddArg(x)
 24739  		return true
 24740  	}
 24741  }
 24742  func rewriteValue_Opbroadcast1To8Uint16x8(v *ssa.Value) bool {
 24743  	v_0 := v.Args[0]
 24744  	// match: (broadcast1To8Uint16x8 x)
 24745  	// result: (VDUPHbcast [0] x)
 24746  	for {
 24747  		x := v_0
 24748  		v.Reset(ssaop.OpARM64VDUPHbcast)
 24749  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24750  		v.AddArg(x)
 24751  		return true
 24752  	}
 24753  }
 24754  func RewriteBlock(b *ssa.Block) bool {
 24755  	typ := &b.Func.Config.Types
 24756  	switch b.Kind {
 24757  	case block.BlockARM64EQ:
 24758  		// match: (EQ (CMPconst [0] z:(AND x y)) yes no)
 24759  		// cond: z.Uses == 1
 24760  		// result: (EQ (TST x y) yes no)
 24761  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 24762  			v_0 := b.Controls[0]
 24763  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 24764  				break
 24765  			}
 24766  			z := v_0.Args[0]
 24767  			if z.Op != ssaop.OpARM64AND {
 24768  				break
 24769  			}
 24770  			_ = z.Args[1]
 24771  			z_0 := z.Args[0]
 24772  			z_1 := z.Args[1]
 24773  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 24774  				x := z_0
 24775  				y := z_1
 24776  				if !(z.Uses == 1) {
 24777  					continue
 24778  				}
 24779  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 24780  				v0.AddArg2(x, y)
 24781  				b.ResetWithControl(block.BlockARM64EQ, v0)
 24782  				return true
 24783  			}
 24784  			break
 24785  		}
 24786  		// match: (EQ (CMPconst [0] x:(ANDconst [c] y)) yes no)
 24787  		// cond: x.Uses == 1
 24788  		// result: (EQ (TSTconst [c] y) yes no)
 24789  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 24790  			v_0 := b.Controls[0]
 24791  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 24792  				break
 24793  			}
 24794  			x := v_0.Args[0]
 24795  			if x.Op != ssaop.OpARM64ANDconst {
 24796  				break
 24797  			}
 24798  			c := ssa.AuxIntToInt64(x.AuxInt)
 24799  			y := x.Args[0]
 24800  			if !(x.Uses == 1) {
 24801  				break
 24802  			}
 24803  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 24804  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 24805  			v0.AddArg(y)
 24806  			b.ResetWithControl(block.BlockARM64EQ, v0)
 24807  			return true
 24808  		}
 24809  		// match: (EQ (CMPWconst [0] z:(AND x y)) yes no)
 24810  		// cond: z.Uses == 1
 24811  		// result: (EQ (TSTW x y) yes no)
 24812  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 24813  			v_0 := b.Controls[0]
 24814  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 24815  				break
 24816  			}
 24817  			z := v_0.Args[0]
 24818  			if z.Op != ssaop.OpARM64AND {
 24819  				break
 24820  			}
 24821  			_ = z.Args[1]
 24822  			z_0 := z.Args[0]
 24823  			z_1 := z.Args[1]
 24824  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 24825  				x := z_0
 24826  				y := z_1
 24827  				if !(z.Uses == 1) {
 24828  					continue
 24829  				}
 24830  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 24831  				v0.AddArg2(x, y)
 24832  				b.ResetWithControl(block.BlockARM64EQ, v0)
 24833  				return true
 24834  			}
 24835  			break
 24836  		}
 24837  		// match: (EQ (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 24838  		// cond: x.Uses == 1
 24839  		// result: (EQ (TSTWconst [int32(c)] y) yes no)
 24840  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 24841  			v_0 := b.Controls[0]
 24842  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 24843  				break
 24844  			}
 24845  			x := v_0.Args[0]
 24846  			if x.Op != ssaop.OpARM64ANDconst {
 24847  				break
 24848  			}
 24849  			c := ssa.AuxIntToInt64(x.AuxInt)
 24850  			y := x.Args[0]
 24851  			if !(x.Uses == 1) {
 24852  				break
 24853  			}
 24854  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 24855  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 24856  			v0.AddArg(y)
 24857  			b.ResetWithControl(block.BlockARM64EQ, v0)
 24858  			return true
 24859  		}
 24860  		// match: (EQ (CMPconst [0] x:(ADDconst [c] y)) yes no)
 24861  		// cond: x.Uses == 1
 24862  		// result: (EQ (CMNconst [c] y) yes no)
 24863  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 24864  			v_0 := b.Controls[0]
 24865  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 24866  				break
 24867  			}
 24868  			x := v_0.Args[0]
 24869  			if x.Op != ssaop.OpARM64ADDconst {
 24870  				break
 24871  			}
 24872  			c := ssa.AuxIntToInt64(x.AuxInt)
 24873  			y := x.Args[0]
 24874  			if !(x.Uses == 1) {
 24875  				break
 24876  			}
 24877  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 24878  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 24879  			v0.AddArg(y)
 24880  			b.ResetWithControl(block.BlockARM64EQ, v0)
 24881  			return true
 24882  		}
 24883  		// match: (EQ (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 24884  		// cond: x.Uses == 1
 24885  		// result: (EQ (CMNWconst [int32(c)] y) yes no)
 24886  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 24887  			v_0 := b.Controls[0]
 24888  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 24889  				break
 24890  			}
 24891  			x := v_0.Args[0]
 24892  			if x.Op != ssaop.OpARM64ADDconst {
 24893  				break
 24894  			}
 24895  			c := ssa.AuxIntToInt64(x.AuxInt)
 24896  			y := x.Args[0]
 24897  			if !(x.Uses == 1) {
 24898  				break
 24899  			}
 24900  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 24901  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 24902  			v0.AddArg(y)
 24903  			b.ResetWithControl(block.BlockARM64EQ, v0)
 24904  			return true
 24905  		}
 24906  		// match: (EQ (CMPconst [0] z:(ADD x y)) yes no)
 24907  		// cond: z.Uses == 1
 24908  		// result: (EQ (CMN x y) yes no)
 24909  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 24910  			v_0 := b.Controls[0]
 24911  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 24912  				break
 24913  			}
 24914  			z := v_0.Args[0]
 24915  			if z.Op != ssaop.OpARM64ADD {
 24916  				break
 24917  			}
 24918  			_ = z.Args[1]
 24919  			z_0 := z.Args[0]
 24920  			z_1 := z.Args[1]
 24921  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 24922  				x := z_0
 24923  				y := z_1
 24924  				if !(z.Uses == 1) {
 24925  					continue
 24926  				}
 24927  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 24928  				v0.AddArg2(x, y)
 24929  				b.ResetWithControl(block.BlockARM64EQ, v0)
 24930  				return true
 24931  			}
 24932  			break
 24933  		}
 24934  		// match: (EQ (CMPWconst [0] z:(ADD x y)) yes no)
 24935  		// cond: z.Uses == 1
 24936  		// result: (EQ (CMNW x y) yes no)
 24937  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 24938  			v_0 := b.Controls[0]
 24939  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 24940  				break
 24941  			}
 24942  			z := v_0.Args[0]
 24943  			if z.Op != ssaop.OpARM64ADD {
 24944  				break
 24945  			}
 24946  			_ = z.Args[1]
 24947  			z_0 := z.Args[0]
 24948  			z_1 := z.Args[1]
 24949  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 24950  				x := z_0
 24951  				y := z_1
 24952  				if !(z.Uses == 1) {
 24953  					continue
 24954  				}
 24955  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 24956  				v0.AddArg2(x, y)
 24957  				b.ResetWithControl(block.BlockARM64EQ, v0)
 24958  				return true
 24959  			}
 24960  			break
 24961  		}
 24962  		// match: (EQ (CMP x z:(NEG y)) yes no)
 24963  		// cond: z.Uses == 1
 24964  		// result: (EQ (CMN x y) yes no)
 24965  		for b.Controls[0].Op == ssaop.OpARM64CMP {
 24966  			v_0 := b.Controls[0]
 24967  			_ = v_0.Args[1]
 24968  			x := v_0.Args[0]
 24969  			z := v_0.Args[1]
 24970  			if z.Op != ssaop.OpARM64NEG {
 24971  				break
 24972  			}
 24973  			y := z.Args[0]
 24974  			if !(z.Uses == 1) {
 24975  				break
 24976  			}
 24977  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 24978  			v0.AddArg2(x, y)
 24979  			b.ResetWithControl(block.BlockARM64EQ, v0)
 24980  			return true
 24981  		}
 24982  		// match: (EQ (CMPW x z:(NEG y)) yes no)
 24983  		// cond: z.Uses == 1
 24984  		// result: (EQ (CMNW x y) yes no)
 24985  		for b.Controls[0].Op == ssaop.OpARM64CMPW {
 24986  			v_0 := b.Controls[0]
 24987  			_ = v_0.Args[1]
 24988  			x := v_0.Args[0]
 24989  			z := v_0.Args[1]
 24990  			if z.Op != ssaop.OpARM64NEG {
 24991  				break
 24992  			}
 24993  			y := z.Args[0]
 24994  			if !(z.Uses == 1) {
 24995  				break
 24996  			}
 24997  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 24998  			v0.AddArg2(x, y)
 24999  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25000  			return true
 25001  		}
 25002  		// match: (EQ (CMPconst [0] x) yes no)
 25003  		// result: (Z x yes no)
 25004  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25005  			v_0 := b.Controls[0]
 25006  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25007  				break
 25008  			}
 25009  			x := v_0.Args[0]
 25010  			b.ResetWithControl(block.BlockARM64Z, x)
 25011  			return true
 25012  		}
 25013  		// match: (EQ (CMPWconst [0] x) yes no)
 25014  		// result: (ZW x yes no)
 25015  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25016  			v_0 := b.Controls[0]
 25017  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25018  				break
 25019  			}
 25020  			x := v_0.Args[0]
 25021  			b.ResetWithControl(block.BlockARM64ZW, x)
 25022  			return true
 25023  		}
 25024  		// match: (EQ (CMPconst [0] z:(MADD a x y)) yes no)
 25025  		// cond: z.Uses==1
 25026  		// result: (EQ (CMN a (MUL <x.Type> x y)) yes no)
 25027  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25028  			v_0 := b.Controls[0]
 25029  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25030  				break
 25031  			}
 25032  			z := v_0.Args[0]
 25033  			if z.Op != ssaop.OpARM64MADD {
 25034  				break
 25035  			}
 25036  			y := z.Args[2]
 25037  			a := z.Args[0]
 25038  			x := z.Args[1]
 25039  			if !(z.Uses == 1) {
 25040  				break
 25041  			}
 25042  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25043  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 25044  			v1.AddArg2(x, y)
 25045  			v0.AddArg2(a, v1)
 25046  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25047  			return true
 25048  		}
 25049  		// match: (EQ (CMPWconst [0] z:(MADDW a x y)) yes no)
 25050  		// cond: z.Uses==1
 25051  		// result: (EQ (CMNW a (MULW <x.Type> x y)) yes no)
 25052  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25053  			v_0 := b.Controls[0]
 25054  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25055  				break
 25056  			}
 25057  			z := v_0.Args[0]
 25058  			if z.Op != ssaop.OpARM64MADDW {
 25059  				break
 25060  			}
 25061  			y := z.Args[2]
 25062  			a := z.Args[0]
 25063  			x := z.Args[1]
 25064  			if !(z.Uses == 1) {
 25065  				break
 25066  			}
 25067  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25068  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 25069  			v1.AddArg2(x, y)
 25070  			v0.AddArg2(a, v1)
 25071  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25072  			return true
 25073  		}
 25074  		// match: (EQ (CMPconst [0] z:(MSUB a x y)) yes no)
 25075  		// cond: z.Uses==1
 25076  		// result: (EQ (CMP a (MUL <x.Type> x y)) yes no)
 25077  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25078  			v_0 := b.Controls[0]
 25079  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25080  				break
 25081  			}
 25082  			z := v_0.Args[0]
 25083  			if z.Op != ssaop.OpARM64MSUB {
 25084  				break
 25085  			}
 25086  			y := z.Args[2]
 25087  			a := z.Args[0]
 25088  			x := z.Args[1]
 25089  			if !(z.Uses == 1) {
 25090  				break
 25091  			}
 25092  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 25093  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 25094  			v1.AddArg2(x, y)
 25095  			v0.AddArg2(a, v1)
 25096  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25097  			return true
 25098  		}
 25099  		// match: (EQ (CMPWconst [0] z:(MSUBW a x y)) yes no)
 25100  		// cond: z.Uses==1
 25101  		// result: (EQ (CMPW a (MULW <x.Type> x y)) yes no)
 25102  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25103  			v_0 := b.Controls[0]
 25104  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25105  				break
 25106  			}
 25107  			z := v_0.Args[0]
 25108  			if z.Op != ssaop.OpARM64MSUBW {
 25109  				break
 25110  			}
 25111  			y := z.Args[2]
 25112  			a := z.Args[0]
 25113  			x := z.Args[1]
 25114  			if !(z.Uses == 1) {
 25115  				break
 25116  			}
 25117  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25118  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 25119  			v1.AddArg2(x, y)
 25120  			v0.AddArg2(a, v1)
 25121  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25122  			return true
 25123  		}
 25124  		// match: (EQ (TSTconst [c] x) yes no)
 25125  		// cond: ssa.OneBit(c)
 25126  		// result: (TBZ [int64(ssa.Ntz64(c))] x yes no)
 25127  		for b.Controls[0].Op == ssaop.OpARM64TSTconst {
 25128  			v_0 := b.Controls[0]
 25129  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 25130  			x := v_0.Args[0]
 25131  			if !(ssa.OneBit(c)) {
 25132  				break
 25133  			}
 25134  			b.ResetWithControl(block.BlockARM64TBZ, x)
 25135  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 25136  			return true
 25137  		}
 25138  		// match: (EQ (TSTWconst [c] x) yes no)
 25139  		// cond: ssa.OneBit(int64(uint32(c)))
 25140  		// result: (TBZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 25141  		for b.Controls[0].Op == ssaop.OpARM64TSTWconst {
 25142  			v_0 := b.Controls[0]
 25143  			c := ssa.AuxIntToInt32(v_0.AuxInt)
 25144  			x := v_0.Args[0]
 25145  			if !(ssa.OneBit(int64(uint32(c)))) {
 25146  				break
 25147  			}
 25148  			b.ResetWithControl(block.BlockARM64TBZ, x)
 25149  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 25150  			return true
 25151  		}
 25152  		// match: (EQ (FlagConstant [fc]) yes no)
 25153  		// cond: fc.Eq()
 25154  		// result: (First yes no)
 25155  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25156  			v_0 := b.Controls[0]
 25157  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25158  			if !(fc.Eq()) {
 25159  				break
 25160  			}
 25161  			b.Reset(block.BlockFirst)
 25162  			return true
 25163  		}
 25164  		// match: (EQ (FlagConstant [fc]) yes no)
 25165  		// cond: !fc.Eq()
 25166  		// result: (First no yes)
 25167  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25168  			v_0 := b.Controls[0]
 25169  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25170  			if !(!fc.Eq()) {
 25171  				break
 25172  			}
 25173  			b.Reset(block.BlockFirst)
 25174  			b.SwapSuccessors()
 25175  			return true
 25176  		}
 25177  		// match: (EQ (InvertFlags cmp) yes no)
 25178  		// result: (EQ cmp yes no)
 25179  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25180  			v_0 := b.Controls[0]
 25181  			cmp := v_0.Args[0]
 25182  			b.ResetWithControl(block.BlockARM64EQ, cmp)
 25183  			return true
 25184  		}
 25185  	case block.BlockARM64FGE:
 25186  		// match: (FGE (InvertFlags cmp) yes no)
 25187  		// result: (FLE cmp yes no)
 25188  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25189  			v_0 := b.Controls[0]
 25190  			cmp := v_0.Args[0]
 25191  			b.ResetWithControl(block.BlockARM64FLE, cmp)
 25192  			return true
 25193  		}
 25194  	case block.BlockARM64FGT:
 25195  		// match: (FGT (InvertFlags cmp) yes no)
 25196  		// result: (FLT cmp yes no)
 25197  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25198  			v_0 := b.Controls[0]
 25199  			cmp := v_0.Args[0]
 25200  			b.ResetWithControl(block.BlockARM64FLT, cmp)
 25201  			return true
 25202  		}
 25203  	case block.BlockARM64FLE:
 25204  		// match: (FLE (InvertFlags cmp) yes no)
 25205  		// result: (FGE cmp yes no)
 25206  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25207  			v_0 := b.Controls[0]
 25208  			cmp := v_0.Args[0]
 25209  			b.ResetWithControl(block.BlockARM64FGE, cmp)
 25210  			return true
 25211  		}
 25212  	case block.BlockARM64FLT:
 25213  		// match: (FLT (InvertFlags cmp) yes no)
 25214  		// result: (FGT cmp yes no)
 25215  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25216  			v_0 := b.Controls[0]
 25217  			cmp := v_0.Args[0]
 25218  			b.ResetWithControl(block.BlockARM64FGT, cmp)
 25219  			return true
 25220  		}
 25221  	case block.BlockARM64GE:
 25222  		// match: (GE (CMPconst [0] z:(AND x y)) yes no)
 25223  		// cond: z.Uses == 1
 25224  		// result: (GE (TST x y) yes no)
 25225  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25226  			v_0 := b.Controls[0]
 25227  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25228  				break
 25229  			}
 25230  			z := v_0.Args[0]
 25231  			if z.Op != ssaop.OpARM64AND {
 25232  				break
 25233  			}
 25234  			_ = z.Args[1]
 25235  			z_0 := z.Args[0]
 25236  			z_1 := z.Args[1]
 25237  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25238  				x := z_0
 25239  				y := z_1
 25240  				if !(z.Uses == 1) {
 25241  					continue
 25242  				}
 25243  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 25244  				v0.AddArg2(x, y)
 25245  				b.ResetWithControl(block.BlockARM64GE, v0)
 25246  				return true
 25247  			}
 25248  			break
 25249  		}
 25250  		// match: (GE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 25251  		// cond: x.Uses == 1
 25252  		// result: (GE (TSTconst [c] y) yes no)
 25253  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25254  			v_0 := b.Controls[0]
 25255  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25256  				break
 25257  			}
 25258  			x := v_0.Args[0]
 25259  			if x.Op != ssaop.OpARM64ANDconst {
 25260  				break
 25261  			}
 25262  			c := ssa.AuxIntToInt64(x.AuxInt)
 25263  			y := x.Args[0]
 25264  			if !(x.Uses == 1) {
 25265  				break
 25266  			}
 25267  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 25268  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25269  			v0.AddArg(y)
 25270  			b.ResetWithControl(block.BlockARM64GE, v0)
 25271  			return true
 25272  		}
 25273  		// match: (GE (CMPWconst [0] z:(AND x y)) yes no)
 25274  		// cond: z.Uses == 1
 25275  		// result: (GE (TSTW x y) yes no)
 25276  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25277  			v_0 := b.Controls[0]
 25278  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25279  				break
 25280  			}
 25281  			z := v_0.Args[0]
 25282  			if z.Op != ssaop.OpARM64AND {
 25283  				break
 25284  			}
 25285  			_ = z.Args[1]
 25286  			z_0 := z.Args[0]
 25287  			z_1 := z.Args[1]
 25288  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25289  				x := z_0
 25290  				y := z_1
 25291  				if !(z.Uses == 1) {
 25292  					continue
 25293  				}
 25294  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 25295  				v0.AddArg2(x, y)
 25296  				b.ResetWithControl(block.BlockARM64GE, v0)
 25297  				return true
 25298  			}
 25299  			break
 25300  		}
 25301  		// match: (GE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 25302  		// cond: x.Uses == 1
 25303  		// result: (GE (TSTWconst [int32(c)] y) yes no)
 25304  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25305  			v_0 := b.Controls[0]
 25306  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25307  				break
 25308  			}
 25309  			x := v_0.Args[0]
 25310  			if x.Op != ssaop.OpARM64ANDconst {
 25311  				break
 25312  			}
 25313  			c := ssa.AuxIntToInt64(x.AuxInt)
 25314  			y := x.Args[0]
 25315  			if !(x.Uses == 1) {
 25316  				break
 25317  			}
 25318  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 25319  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25320  			v0.AddArg(y)
 25321  			b.ResetWithControl(block.BlockARM64GE, v0)
 25322  			return true
 25323  		}
 25324  		// match: (GE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 25325  		// cond: x.Uses == 1
 25326  		// result: (GEnoov (CMNconst [c] y) yes no)
 25327  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25328  			v_0 := b.Controls[0]
 25329  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25330  				break
 25331  			}
 25332  			x := v_0.Args[0]
 25333  			if x.Op != ssaop.OpARM64ADDconst {
 25334  				break
 25335  			}
 25336  			c := ssa.AuxIntToInt64(x.AuxInt)
 25337  			y := x.Args[0]
 25338  			if !(x.Uses == 1) {
 25339  				break
 25340  			}
 25341  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 25342  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25343  			v0.AddArg(y)
 25344  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25345  			return true
 25346  		}
 25347  		// match: (GE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 25348  		// cond: x.Uses == 1
 25349  		// result: (GEnoov (CMNWconst [int32(c)] y) yes no)
 25350  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25351  			v_0 := b.Controls[0]
 25352  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25353  				break
 25354  			}
 25355  			x := v_0.Args[0]
 25356  			if x.Op != ssaop.OpARM64ADDconst {
 25357  				break
 25358  			}
 25359  			c := ssa.AuxIntToInt64(x.AuxInt)
 25360  			y := x.Args[0]
 25361  			if !(x.Uses == 1) {
 25362  				break
 25363  			}
 25364  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 25365  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25366  			v0.AddArg(y)
 25367  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25368  			return true
 25369  		}
 25370  		// match: (GE (CMPconst [0] z:(ADD x y)) yes no)
 25371  		// cond: z.Uses == 1
 25372  		// result: (GEnoov (CMN x y) yes no)
 25373  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25374  			v_0 := b.Controls[0]
 25375  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25376  				break
 25377  			}
 25378  			z := v_0.Args[0]
 25379  			if z.Op != ssaop.OpARM64ADD {
 25380  				break
 25381  			}
 25382  			_ = z.Args[1]
 25383  			z_0 := z.Args[0]
 25384  			z_1 := z.Args[1]
 25385  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25386  				x := z_0
 25387  				y := z_1
 25388  				if !(z.Uses == 1) {
 25389  					continue
 25390  				}
 25391  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25392  				v0.AddArg2(x, y)
 25393  				b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25394  				return true
 25395  			}
 25396  			break
 25397  		}
 25398  		// match: (GE (CMPWconst [0] z:(ADD x y)) yes no)
 25399  		// cond: z.Uses == 1
 25400  		// result: (GEnoov (CMNW x y) yes no)
 25401  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25402  			v_0 := b.Controls[0]
 25403  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25404  				break
 25405  			}
 25406  			z := v_0.Args[0]
 25407  			if z.Op != ssaop.OpARM64ADD {
 25408  				break
 25409  			}
 25410  			_ = z.Args[1]
 25411  			z_0 := z.Args[0]
 25412  			z_1 := z.Args[1]
 25413  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25414  				x := z_0
 25415  				y := z_1
 25416  				if !(z.Uses == 1) {
 25417  					continue
 25418  				}
 25419  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25420  				v0.AddArg2(x, y)
 25421  				b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25422  				return true
 25423  			}
 25424  			break
 25425  		}
 25426  		// match: (GE (CMPconst [0] z:(MADD a x y)) yes no)
 25427  		// cond: z.Uses==1
 25428  		// result: (GEnoov (CMN a (MUL <x.Type> x y)) yes no)
 25429  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25430  			v_0 := b.Controls[0]
 25431  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25432  				break
 25433  			}
 25434  			z := v_0.Args[0]
 25435  			if z.Op != ssaop.OpARM64MADD {
 25436  				break
 25437  			}
 25438  			y := z.Args[2]
 25439  			a := z.Args[0]
 25440  			x := z.Args[1]
 25441  			if !(z.Uses == 1) {
 25442  				break
 25443  			}
 25444  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25445  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 25446  			v1.AddArg2(x, y)
 25447  			v0.AddArg2(a, v1)
 25448  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25449  			return true
 25450  		}
 25451  		// match: (GE (CMPWconst [0] z:(MADDW a x y)) yes no)
 25452  		// cond: z.Uses==1
 25453  		// result: (GEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 25454  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25455  			v_0 := b.Controls[0]
 25456  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25457  				break
 25458  			}
 25459  			z := v_0.Args[0]
 25460  			if z.Op != ssaop.OpARM64MADDW {
 25461  				break
 25462  			}
 25463  			y := z.Args[2]
 25464  			a := z.Args[0]
 25465  			x := z.Args[1]
 25466  			if !(z.Uses == 1) {
 25467  				break
 25468  			}
 25469  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25470  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 25471  			v1.AddArg2(x, y)
 25472  			v0.AddArg2(a, v1)
 25473  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25474  			return true
 25475  		}
 25476  		// match: (GE (CMPWconst [0] x) yes no)
 25477  		// result: (TBZ [31] x yes no)
 25478  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25479  			v_0 := b.Controls[0]
 25480  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25481  				break
 25482  			}
 25483  			x := v_0.Args[0]
 25484  			b.ResetWithControl(block.BlockARM64TBZ, x)
 25485  			b.AuxInt = ssa.Int64ToAuxInt(31)
 25486  			return true
 25487  		}
 25488  		// match: (GE (CMPconst [0] x) yes no)
 25489  		// result: (TBZ [63] x yes no)
 25490  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25491  			v_0 := b.Controls[0]
 25492  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25493  				break
 25494  			}
 25495  			x := v_0.Args[0]
 25496  			b.ResetWithControl(block.BlockARM64TBZ, x)
 25497  			b.AuxInt = ssa.Int64ToAuxInt(63)
 25498  			return true
 25499  		}
 25500  		// match: (GE (CMPWconst [128] x) yes no)
 25501  		// cond: ssa.ZeroUpper56Bits(x)
 25502  		// result: (TBNZ [7] x yes no)
 25503  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25504  			v_0 := b.Controls[0]
 25505  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 25506  				break
 25507  			}
 25508  			x := v_0.Args[0]
 25509  			if !(ssa.ZeroUpper56Bits(x)) {
 25510  				break
 25511  			}
 25512  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 25513  			b.AuxInt = ssa.Int64ToAuxInt(7)
 25514  			return true
 25515  		}
 25516  		// match: (GE (CMPconst [128] x) yes no)
 25517  		// cond: ssa.ZeroUpper56Bits(x)
 25518  		// result: (TBNZ [7] x yes no)
 25519  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25520  			v_0 := b.Controls[0]
 25521  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 25522  				break
 25523  			}
 25524  			x := v_0.Args[0]
 25525  			if !(ssa.ZeroUpper56Bits(x)) {
 25526  				break
 25527  			}
 25528  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 25529  			b.AuxInt = ssa.Int64ToAuxInt(7)
 25530  			return true
 25531  		}
 25532  		// match: (GE (FlagConstant [fc]) yes no)
 25533  		// cond: fc.Ge()
 25534  		// result: (First yes no)
 25535  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25536  			v_0 := b.Controls[0]
 25537  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25538  			if !(fc.Ge()) {
 25539  				break
 25540  			}
 25541  			b.Reset(block.BlockFirst)
 25542  			return true
 25543  		}
 25544  		// match: (GE (FlagConstant [fc]) yes no)
 25545  		// cond: !fc.Ge()
 25546  		// result: (First no yes)
 25547  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25548  			v_0 := b.Controls[0]
 25549  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25550  			if !(!fc.Ge()) {
 25551  				break
 25552  			}
 25553  			b.Reset(block.BlockFirst)
 25554  			b.SwapSuccessors()
 25555  			return true
 25556  		}
 25557  		// match: (GE (InvertFlags cmp) yes no)
 25558  		// result: (LE cmp yes no)
 25559  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25560  			v_0 := b.Controls[0]
 25561  			cmp := v_0.Args[0]
 25562  			b.ResetWithControl(block.BlockARM64LE, cmp)
 25563  			return true
 25564  		}
 25565  	case block.BlockARM64GEnoov:
 25566  		// match: (GEnoov (FlagConstant [fc]) yes no)
 25567  		// cond: fc.GeNoov()
 25568  		// result: (First yes no)
 25569  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25570  			v_0 := b.Controls[0]
 25571  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25572  			if !(fc.GeNoov()) {
 25573  				break
 25574  			}
 25575  			b.Reset(block.BlockFirst)
 25576  			return true
 25577  		}
 25578  		// match: (GEnoov (FlagConstant [fc]) yes no)
 25579  		// cond: !fc.GeNoov()
 25580  		// result: (First no yes)
 25581  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25582  			v_0 := b.Controls[0]
 25583  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25584  			if !(!fc.GeNoov()) {
 25585  				break
 25586  			}
 25587  			b.Reset(block.BlockFirst)
 25588  			b.SwapSuccessors()
 25589  			return true
 25590  		}
 25591  	case block.BlockARM64GT:
 25592  		// match: (GT (CMPconst [0] z:(AND x y)) yes no)
 25593  		// cond: z.Uses == 1
 25594  		// result: (GT (TST x y) yes no)
 25595  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25596  			v_0 := b.Controls[0]
 25597  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25598  				break
 25599  			}
 25600  			z := v_0.Args[0]
 25601  			if z.Op != ssaop.OpARM64AND {
 25602  				break
 25603  			}
 25604  			_ = z.Args[1]
 25605  			z_0 := z.Args[0]
 25606  			z_1 := z.Args[1]
 25607  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25608  				x := z_0
 25609  				y := z_1
 25610  				if !(z.Uses == 1) {
 25611  					continue
 25612  				}
 25613  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 25614  				v0.AddArg2(x, y)
 25615  				b.ResetWithControl(block.BlockARM64GT, v0)
 25616  				return true
 25617  			}
 25618  			break
 25619  		}
 25620  		// match: (GT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 25621  		// cond: x.Uses == 1
 25622  		// result: (GT (TSTconst [c] y) yes no)
 25623  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25624  			v_0 := b.Controls[0]
 25625  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25626  				break
 25627  			}
 25628  			x := v_0.Args[0]
 25629  			if x.Op != ssaop.OpARM64ANDconst {
 25630  				break
 25631  			}
 25632  			c := ssa.AuxIntToInt64(x.AuxInt)
 25633  			y := x.Args[0]
 25634  			if !(x.Uses == 1) {
 25635  				break
 25636  			}
 25637  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 25638  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25639  			v0.AddArg(y)
 25640  			b.ResetWithControl(block.BlockARM64GT, v0)
 25641  			return true
 25642  		}
 25643  		// match: (GT (CMPWconst [0] z:(AND x y)) yes no)
 25644  		// cond: z.Uses == 1
 25645  		// result: (GT (TSTW x y) yes no)
 25646  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25647  			v_0 := b.Controls[0]
 25648  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25649  				break
 25650  			}
 25651  			z := v_0.Args[0]
 25652  			if z.Op != ssaop.OpARM64AND {
 25653  				break
 25654  			}
 25655  			_ = z.Args[1]
 25656  			z_0 := z.Args[0]
 25657  			z_1 := z.Args[1]
 25658  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25659  				x := z_0
 25660  				y := z_1
 25661  				if !(z.Uses == 1) {
 25662  					continue
 25663  				}
 25664  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 25665  				v0.AddArg2(x, y)
 25666  				b.ResetWithControl(block.BlockARM64GT, v0)
 25667  				return true
 25668  			}
 25669  			break
 25670  		}
 25671  		// match: (GT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 25672  		// cond: x.Uses == 1
 25673  		// result: (GT (TSTWconst [int32(c)] y) yes no)
 25674  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25675  			v_0 := b.Controls[0]
 25676  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25677  				break
 25678  			}
 25679  			x := v_0.Args[0]
 25680  			if x.Op != ssaop.OpARM64ANDconst {
 25681  				break
 25682  			}
 25683  			c := ssa.AuxIntToInt64(x.AuxInt)
 25684  			y := x.Args[0]
 25685  			if !(x.Uses == 1) {
 25686  				break
 25687  			}
 25688  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 25689  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25690  			v0.AddArg(y)
 25691  			b.ResetWithControl(block.BlockARM64GT, v0)
 25692  			return true
 25693  		}
 25694  		// match: (GT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 25695  		// cond: x.Uses == 1
 25696  		// result: (GTnoov (CMNconst [c] y) yes no)
 25697  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25698  			v_0 := b.Controls[0]
 25699  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25700  				break
 25701  			}
 25702  			x := v_0.Args[0]
 25703  			if x.Op != ssaop.OpARM64ADDconst {
 25704  				break
 25705  			}
 25706  			c := ssa.AuxIntToInt64(x.AuxInt)
 25707  			y := x.Args[0]
 25708  			if !(x.Uses == 1) {
 25709  				break
 25710  			}
 25711  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 25712  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25713  			v0.AddArg(y)
 25714  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 25715  			return true
 25716  		}
 25717  		// match: (GT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 25718  		// cond: x.Uses == 1
 25719  		// result: (GTnoov (CMNWconst [int32(c)] y) yes no)
 25720  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25721  			v_0 := b.Controls[0]
 25722  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25723  				break
 25724  			}
 25725  			x := v_0.Args[0]
 25726  			if x.Op != ssaop.OpARM64ADDconst {
 25727  				break
 25728  			}
 25729  			c := ssa.AuxIntToInt64(x.AuxInt)
 25730  			y := x.Args[0]
 25731  			if !(x.Uses == 1) {
 25732  				break
 25733  			}
 25734  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 25735  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25736  			v0.AddArg(y)
 25737  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 25738  			return true
 25739  		}
 25740  		// match: (GT (CMPconst [0] z:(ADD x y)) yes no)
 25741  		// cond: z.Uses == 1
 25742  		// result: (GTnoov (CMN x y) yes no)
 25743  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25744  			v_0 := b.Controls[0]
 25745  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25746  				break
 25747  			}
 25748  			z := v_0.Args[0]
 25749  			if z.Op != ssaop.OpARM64ADD {
 25750  				break
 25751  			}
 25752  			_ = z.Args[1]
 25753  			z_0 := z.Args[0]
 25754  			z_1 := z.Args[1]
 25755  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25756  				x := z_0
 25757  				y := z_1
 25758  				if !(z.Uses == 1) {
 25759  					continue
 25760  				}
 25761  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25762  				v0.AddArg2(x, y)
 25763  				b.ResetWithControl(block.BlockARM64GTnoov, v0)
 25764  				return true
 25765  			}
 25766  			break
 25767  		}
 25768  		// match: (GT (CMPWconst [0] z:(ADD x y)) yes no)
 25769  		// cond: z.Uses == 1
 25770  		// result: (GTnoov (CMNW x y) yes no)
 25771  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25772  			v_0 := b.Controls[0]
 25773  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25774  				break
 25775  			}
 25776  			z := v_0.Args[0]
 25777  			if z.Op != ssaop.OpARM64ADD {
 25778  				break
 25779  			}
 25780  			_ = z.Args[1]
 25781  			z_0 := z.Args[0]
 25782  			z_1 := z.Args[1]
 25783  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25784  				x := z_0
 25785  				y := z_1
 25786  				if !(z.Uses == 1) {
 25787  					continue
 25788  				}
 25789  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25790  				v0.AddArg2(x, y)
 25791  				b.ResetWithControl(block.BlockARM64GTnoov, v0)
 25792  				return true
 25793  			}
 25794  			break
 25795  		}
 25796  		// match: (GT (CMPconst [0] z:(MADD a x y)) yes no)
 25797  		// cond: z.Uses==1
 25798  		// result: (GTnoov (CMN a (MUL <x.Type> x y)) yes no)
 25799  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25800  			v_0 := b.Controls[0]
 25801  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25802  				break
 25803  			}
 25804  			z := v_0.Args[0]
 25805  			if z.Op != ssaop.OpARM64MADD {
 25806  				break
 25807  			}
 25808  			y := z.Args[2]
 25809  			a := z.Args[0]
 25810  			x := z.Args[1]
 25811  			if !(z.Uses == 1) {
 25812  				break
 25813  			}
 25814  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25815  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 25816  			v1.AddArg2(x, y)
 25817  			v0.AddArg2(a, v1)
 25818  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 25819  			return true
 25820  		}
 25821  		// match: (GT (CMPWconst [0] z:(MADDW a x y)) yes no)
 25822  		// cond: z.Uses==1
 25823  		// result: (GTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 25824  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25825  			v_0 := b.Controls[0]
 25826  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25827  				break
 25828  			}
 25829  			z := v_0.Args[0]
 25830  			if z.Op != ssaop.OpARM64MADDW {
 25831  				break
 25832  			}
 25833  			y := z.Args[2]
 25834  			a := z.Args[0]
 25835  			x := z.Args[1]
 25836  			if !(z.Uses == 1) {
 25837  				break
 25838  			}
 25839  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25840  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 25841  			v1.AddArg2(x, y)
 25842  			v0.AddArg2(a, v1)
 25843  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 25844  			return true
 25845  		}
 25846  		// match: (GT (FlagConstant [fc]) yes no)
 25847  		// cond: fc.Gt()
 25848  		// result: (First yes no)
 25849  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25850  			v_0 := b.Controls[0]
 25851  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25852  			if !(fc.Gt()) {
 25853  				break
 25854  			}
 25855  			b.Reset(block.BlockFirst)
 25856  			return true
 25857  		}
 25858  		// match: (GT (FlagConstant [fc]) yes no)
 25859  		// cond: !fc.Gt()
 25860  		// result: (First no yes)
 25861  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25862  			v_0 := b.Controls[0]
 25863  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25864  			if !(!fc.Gt()) {
 25865  				break
 25866  			}
 25867  			b.Reset(block.BlockFirst)
 25868  			b.SwapSuccessors()
 25869  			return true
 25870  		}
 25871  		// match: (GT (InvertFlags cmp) yes no)
 25872  		// result: (LT cmp yes no)
 25873  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25874  			v_0 := b.Controls[0]
 25875  			cmp := v_0.Args[0]
 25876  			b.ResetWithControl(block.BlockARM64LT, cmp)
 25877  			return true
 25878  		}
 25879  	case block.BlockARM64GTnoov:
 25880  		// match: (GTnoov (FlagConstant [fc]) yes no)
 25881  		// cond: fc.GtNoov()
 25882  		// result: (First yes no)
 25883  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25884  			v_0 := b.Controls[0]
 25885  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25886  			if !(fc.GtNoov()) {
 25887  				break
 25888  			}
 25889  			b.Reset(block.BlockFirst)
 25890  			return true
 25891  		}
 25892  		// match: (GTnoov (FlagConstant [fc]) yes no)
 25893  		// cond: !fc.GtNoov()
 25894  		// result: (First no yes)
 25895  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25896  			v_0 := b.Controls[0]
 25897  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25898  			if !(!fc.GtNoov()) {
 25899  				break
 25900  			}
 25901  			b.Reset(block.BlockFirst)
 25902  			b.SwapSuccessors()
 25903  			return true
 25904  		}
 25905  	case block.BlockIf:
 25906  		// match: (If (Equal cc) yes no)
 25907  		// result: (EQ cc yes no)
 25908  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 25909  			v_0 := b.Controls[0]
 25910  			cc := v_0.Args[0]
 25911  			b.ResetWithControl(block.BlockARM64EQ, cc)
 25912  			return true
 25913  		}
 25914  		// match: (If (NotEqual cc) yes no)
 25915  		// result: (NE cc yes no)
 25916  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 25917  			v_0 := b.Controls[0]
 25918  			cc := v_0.Args[0]
 25919  			b.ResetWithControl(block.BlockARM64NE, cc)
 25920  			return true
 25921  		}
 25922  		// match: (If (LessThan cc) yes no)
 25923  		// result: (LT cc yes no)
 25924  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 25925  			v_0 := b.Controls[0]
 25926  			cc := v_0.Args[0]
 25927  			b.ResetWithControl(block.BlockARM64LT, cc)
 25928  			return true
 25929  		}
 25930  		// match: (If (LessThanU cc) yes no)
 25931  		// result: (ULT cc yes no)
 25932  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 25933  			v_0 := b.Controls[0]
 25934  			cc := v_0.Args[0]
 25935  			b.ResetWithControl(block.BlockARM64ULT, cc)
 25936  			return true
 25937  		}
 25938  		// match: (If (LessEqual cc) yes no)
 25939  		// result: (LE cc yes no)
 25940  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 25941  			v_0 := b.Controls[0]
 25942  			cc := v_0.Args[0]
 25943  			b.ResetWithControl(block.BlockARM64LE, cc)
 25944  			return true
 25945  		}
 25946  		// match: (If (LessEqualU cc) yes no)
 25947  		// result: (ULE cc yes no)
 25948  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 25949  			v_0 := b.Controls[0]
 25950  			cc := v_0.Args[0]
 25951  			b.ResetWithControl(block.BlockARM64ULE, cc)
 25952  			return true
 25953  		}
 25954  		// match: (If (GreaterThan cc) yes no)
 25955  		// result: (GT cc yes no)
 25956  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 25957  			v_0 := b.Controls[0]
 25958  			cc := v_0.Args[0]
 25959  			b.ResetWithControl(block.BlockARM64GT, cc)
 25960  			return true
 25961  		}
 25962  		// match: (If (GreaterThanU cc) yes no)
 25963  		// result: (UGT cc yes no)
 25964  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 25965  			v_0 := b.Controls[0]
 25966  			cc := v_0.Args[0]
 25967  			b.ResetWithControl(block.BlockARM64UGT, cc)
 25968  			return true
 25969  		}
 25970  		// match: (If (GreaterEqual cc) yes no)
 25971  		// result: (GE cc yes no)
 25972  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 25973  			v_0 := b.Controls[0]
 25974  			cc := v_0.Args[0]
 25975  			b.ResetWithControl(block.BlockARM64GE, cc)
 25976  			return true
 25977  		}
 25978  		// match: (If (GreaterEqualU cc) yes no)
 25979  		// result: (UGE cc yes no)
 25980  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 25981  			v_0 := b.Controls[0]
 25982  			cc := v_0.Args[0]
 25983  			b.ResetWithControl(block.BlockARM64UGE, cc)
 25984  			return true
 25985  		}
 25986  		// match: (If (LessThanF cc) yes no)
 25987  		// result: (FLT cc yes no)
 25988  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 25989  			v_0 := b.Controls[0]
 25990  			cc := v_0.Args[0]
 25991  			b.ResetWithControl(block.BlockARM64FLT, cc)
 25992  			return true
 25993  		}
 25994  		// match: (If (LessEqualF cc) yes no)
 25995  		// result: (FLE cc yes no)
 25996  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 25997  			v_0 := b.Controls[0]
 25998  			cc := v_0.Args[0]
 25999  			b.ResetWithControl(block.BlockARM64FLE, cc)
 26000  			return true
 26001  		}
 26002  		// match: (If (GreaterThanF cc) yes no)
 26003  		// result: (FGT cc yes no)
 26004  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 26005  			v_0 := b.Controls[0]
 26006  			cc := v_0.Args[0]
 26007  			b.ResetWithControl(block.BlockARM64FGT, cc)
 26008  			return true
 26009  		}
 26010  		// match: (If (GreaterEqualF cc) yes no)
 26011  		// result: (FGE cc yes no)
 26012  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 26013  			v_0 := b.Controls[0]
 26014  			cc := v_0.Args[0]
 26015  			b.ResetWithControl(block.BlockARM64FGE, cc)
 26016  			return true
 26017  		}
 26018  		// match: (If cond yes no)
 26019  		// result: (TBNZ [0] cond yes no)
 26020  		for {
 26021  			cond := b.Controls[0]
 26022  			b.ResetWithControl(block.BlockARM64TBNZ, cond)
 26023  			b.AuxInt = ssa.Int64ToAuxInt(0)
 26024  			return true
 26025  		}
 26026  	case block.BlockJumpTable:
 26027  		// match: (JumpTable idx)
 26028  		// result: (JUMPTABLE {ssa.MakeJumpTableSym(b)} idx (MOVDaddr <typ.Uintptr> {ssa.MakeJumpTableSym(b)} (SB)))
 26029  		for {
 26030  			idx := b.Controls[0]
 26031  			v0 := b.NewValue0(b.Pos, ssaop.OpARM64MOVDaddr, typ.Uintptr)
 26032  			v0.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
 26033  			v1 := b.NewValue0(b.Pos, ssaop.OpSB, typ.Uintptr)
 26034  			v0.AddArg(v1)
 26035  			b.ResetWithControl2(block.BlockARM64JUMPTABLE, idx, v0)
 26036  			b.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
 26037  			return true
 26038  		}
 26039  	case block.BlockARM64LE:
 26040  		// match: (LE (CMPconst [0] z:(AND x y)) yes no)
 26041  		// cond: z.Uses == 1
 26042  		// result: (LE (TST x y) yes no)
 26043  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26044  			v_0 := b.Controls[0]
 26045  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26046  				break
 26047  			}
 26048  			z := v_0.Args[0]
 26049  			if z.Op != ssaop.OpARM64AND {
 26050  				break
 26051  			}
 26052  			_ = z.Args[1]
 26053  			z_0 := z.Args[0]
 26054  			z_1 := z.Args[1]
 26055  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26056  				x := z_0
 26057  				y := z_1
 26058  				if !(z.Uses == 1) {
 26059  					continue
 26060  				}
 26061  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 26062  				v0.AddArg2(x, y)
 26063  				b.ResetWithControl(block.BlockARM64LE, v0)
 26064  				return true
 26065  			}
 26066  			break
 26067  		}
 26068  		// match: (LE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 26069  		// cond: x.Uses == 1
 26070  		// result: (LE (TSTconst [c] y) yes no)
 26071  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26072  			v_0 := b.Controls[0]
 26073  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26074  				break
 26075  			}
 26076  			x := v_0.Args[0]
 26077  			if x.Op != ssaop.OpARM64ANDconst {
 26078  				break
 26079  			}
 26080  			c := ssa.AuxIntToInt64(x.AuxInt)
 26081  			y := x.Args[0]
 26082  			if !(x.Uses == 1) {
 26083  				break
 26084  			}
 26085  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 26086  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26087  			v0.AddArg(y)
 26088  			b.ResetWithControl(block.BlockARM64LE, v0)
 26089  			return true
 26090  		}
 26091  		// match: (LE (CMPWconst [0] z:(AND x y)) yes no)
 26092  		// cond: z.Uses == 1
 26093  		// result: (LE (TSTW x y) yes no)
 26094  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26095  			v_0 := b.Controls[0]
 26096  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26097  				break
 26098  			}
 26099  			z := v_0.Args[0]
 26100  			if z.Op != ssaop.OpARM64AND {
 26101  				break
 26102  			}
 26103  			_ = z.Args[1]
 26104  			z_0 := z.Args[0]
 26105  			z_1 := z.Args[1]
 26106  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26107  				x := z_0
 26108  				y := z_1
 26109  				if !(z.Uses == 1) {
 26110  					continue
 26111  				}
 26112  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 26113  				v0.AddArg2(x, y)
 26114  				b.ResetWithControl(block.BlockARM64LE, v0)
 26115  				return true
 26116  			}
 26117  			break
 26118  		}
 26119  		// match: (LE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 26120  		// cond: x.Uses == 1
 26121  		// result: (LE (TSTWconst [int32(c)] y) yes no)
 26122  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26123  			v_0 := b.Controls[0]
 26124  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26125  				break
 26126  			}
 26127  			x := v_0.Args[0]
 26128  			if x.Op != ssaop.OpARM64ANDconst {
 26129  				break
 26130  			}
 26131  			c := ssa.AuxIntToInt64(x.AuxInt)
 26132  			y := x.Args[0]
 26133  			if !(x.Uses == 1) {
 26134  				break
 26135  			}
 26136  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 26137  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26138  			v0.AddArg(y)
 26139  			b.ResetWithControl(block.BlockARM64LE, v0)
 26140  			return true
 26141  		}
 26142  		// match: (LE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 26143  		// cond: x.Uses == 1
 26144  		// result: (LEnoov (CMNconst [c] y) yes no)
 26145  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26146  			v_0 := b.Controls[0]
 26147  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26148  				break
 26149  			}
 26150  			x := v_0.Args[0]
 26151  			if x.Op != ssaop.OpARM64ADDconst {
 26152  				break
 26153  			}
 26154  			c := ssa.AuxIntToInt64(x.AuxInt)
 26155  			y := x.Args[0]
 26156  			if !(x.Uses == 1) {
 26157  				break
 26158  			}
 26159  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 26160  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26161  			v0.AddArg(y)
 26162  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26163  			return true
 26164  		}
 26165  		// match: (LE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 26166  		// cond: x.Uses == 1
 26167  		// result: (LEnoov (CMNWconst [int32(c)] y) yes no)
 26168  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26169  			v_0 := b.Controls[0]
 26170  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26171  				break
 26172  			}
 26173  			x := v_0.Args[0]
 26174  			if x.Op != ssaop.OpARM64ADDconst {
 26175  				break
 26176  			}
 26177  			c := ssa.AuxIntToInt64(x.AuxInt)
 26178  			y := x.Args[0]
 26179  			if !(x.Uses == 1) {
 26180  				break
 26181  			}
 26182  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 26183  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26184  			v0.AddArg(y)
 26185  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26186  			return true
 26187  		}
 26188  		// match: (LE (CMPconst [0] z:(ADD x y)) yes no)
 26189  		// cond: z.Uses == 1
 26190  		// result: (LEnoov (CMN x y) yes no)
 26191  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26192  			v_0 := b.Controls[0]
 26193  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26194  				break
 26195  			}
 26196  			z := v_0.Args[0]
 26197  			if z.Op != ssaop.OpARM64ADD {
 26198  				break
 26199  			}
 26200  			_ = z.Args[1]
 26201  			z_0 := z.Args[0]
 26202  			z_1 := z.Args[1]
 26203  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26204  				x := z_0
 26205  				y := z_1
 26206  				if !(z.Uses == 1) {
 26207  					continue
 26208  				}
 26209  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26210  				v0.AddArg2(x, y)
 26211  				b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26212  				return true
 26213  			}
 26214  			break
 26215  		}
 26216  		// match: (LE (CMPWconst [0] z:(ADD x y)) yes no)
 26217  		// cond: z.Uses == 1
 26218  		// result: (LEnoov (CMNW x y) yes no)
 26219  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26220  			v_0 := b.Controls[0]
 26221  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26222  				break
 26223  			}
 26224  			z := v_0.Args[0]
 26225  			if z.Op != ssaop.OpARM64ADD {
 26226  				break
 26227  			}
 26228  			_ = z.Args[1]
 26229  			z_0 := z.Args[0]
 26230  			z_1 := z.Args[1]
 26231  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26232  				x := z_0
 26233  				y := z_1
 26234  				if !(z.Uses == 1) {
 26235  					continue
 26236  				}
 26237  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26238  				v0.AddArg2(x, y)
 26239  				b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26240  				return true
 26241  			}
 26242  			break
 26243  		}
 26244  		// match: (LE (CMPconst [0] z:(MADD a x y)) yes no)
 26245  		// cond: z.Uses==1
 26246  		// result: (LEnoov (CMN a (MUL <x.Type> x y)) yes no)
 26247  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26248  			v_0 := b.Controls[0]
 26249  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26250  				break
 26251  			}
 26252  			z := v_0.Args[0]
 26253  			if z.Op != ssaop.OpARM64MADD {
 26254  				break
 26255  			}
 26256  			y := z.Args[2]
 26257  			a := z.Args[0]
 26258  			x := z.Args[1]
 26259  			if !(z.Uses == 1) {
 26260  				break
 26261  			}
 26262  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26263  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 26264  			v1.AddArg2(x, y)
 26265  			v0.AddArg2(a, v1)
 26266  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26267  			return true
 26268  		}
 26269  		// match: (LE (CMPWconst [0] z:(MADDW a x y)) yes no)
 26270  		// cond: z.Uses==1
 26271  		// result: (LEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 26272  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26273  			v_0 := b.Controls[0]
 26274  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26275  				break
 26276  			}
 26277  			z := v_0.Args[0]
 26278  			if z.Op != ssaop.OpARM64MADDW {
 26279  				break
 26280  			}
 26281  			y := z.Args[2]
 26282  			a := z.Args[0]
 26283  			x := z.Args[1]
 26284  			if !(z.Uses == 1) {
 26285  				break
 26286  			}
 26287  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26288  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 26289  			v1.AddArg2(x, y)
 26290  			v0.AddArg2(a, v1)
 26291  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26292  			return true
 26293  		}
 26294  		// match: (LE (FlagConstant [fc]) yes no)
 26295  		// cond: fc.Le()
 26296  		// result: (First yes no)
 26297  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26298  			v_0 := b.Controls[0]
 26299  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26300  			if !(fc.Le()) {
 26301  				break
 26302  			}
 26303  			b.Reset(block.BlockFirst)
 26304  			return true
 26305  		}
 26306  		// match: (LE (FlagConstant [fc]) yes no)
 26307  		// cond: !fc.Le()
 26308  		// result: (First no yes)
 26309  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26310  			v_0 := b.Controls[0]
 26311  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26312  			if !(!fc.Le()) {
 26313  				break
 26314  			}
 26315  			b.Reset(block.BlockFirst)
 26316  			b.SwapSuccessors()
 26317  			return true
 26318  		}
 26319  		// match: (LE (InvertFlags cmp) yes no)
 26320  		// result: (GE cmp yes no)
 26321  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 26322  			v_0 := b.Controls[0]
 26323  			cmp := v_0.Args[0]
 26324  			b.ResetWithControl(block.BlockARM64GE, cmp)
 26325  			return true
 26326  		}
 26327  	case block.BlockARM64LEnoov:
 26328  		// match: (LEnoov (FlagConstant [fc]) yes no)
 26329  		// cond: fc.LeNoov()
 26330  		// result: (First yes no)
 26331  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26332  			v_0 := b.Controls[0]
 26333  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26334  			if !(fc.LeNoov()) {
 26335  				break
 26336  			}
 26337  			b.Reset(block.BlockFirst)
 26338  			return true
 26339  		}
 26340  		// match: (LEnoov (FlagConstant [fc]) yes no)
 26341  		// cond: !fc.LeNoov()
 26342  		// result: (First no yes)
 26343  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26344  			v_0 := b.Controls[0]
 26345  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26346  			if !(!fc.LeNoov()) {
 26347  				break
 26348  			}
 26349  			b.Reset(block.BlockFirst)
 26350  			b.SwapSuccessors()
 26351  			return true
 26352  		}
 26353  	case block.BlockARM64LT:
 26354  		// match: (LT (CMPconst [0] z:(AND x y)) yes no)
 26355  		// cond: z.Uses == 1
 26356  		// result: (LT (TST x y) yes no)
 26357  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26358  			v_0 := b.Controls[0]
 26359  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26360  				break
 26361  			}
 26362  			z := v_0.Args[0]
 26363  			if z.Op != ssaop.OpARM64AND {
 26364  				break
 26365  			}
 26366  			_ = z.Args[1]
 26367  			z_0 := z.Args[0]
 26368  			z_1 := z.Args[1]
 26369  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26370  				x := z_0
 26371  				y := z_1
 26372  				if !(z.Uses == 1) {
 26373  					continue
 26374  				}
 26375  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 26376  				v0.AddArg2(x, y)
 26377  				b.ResetWithControl(block.BlockARM64LT, v0)
 26378  				return true
 26379  			}
 26380  			break
 26381  		}
 26382  		// match: (LT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 26383  		// cond: x.Uses == 1
 26384  		// result: (LT (TSTconst [c] y) yes no)
 26385  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26386  			v_0 := b.Controls[0]
 26387  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26388  				break
 26389  			}
 26390  			x := v_0.Args[0]
 26391  			if x.Op != ssaop.OpARM64ANDconst {
 26392  				break
 26393  			}
 26394  			c := ssa.AuxIntToInt64(x.AuxInt)
 26395  			y := x.Args[0]
 26396  			if !(x.Uses == 1) {
 26397  				break
 26398  			}
 26399  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 26400  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26401  			v0.AddArg(y)
 26402  			b.ResetWithControl(block.BlockARM64LT, v0)
 26403  			return true
 26404  		}
 26405  		// match: (LT (CMPWconst [0] z:(AND x y)) yes no)
 26406  		// cond: z.Uses == 1
 26407  		// result: (LT (TSTW x y) yes no)
 26408  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26409  			v_0 := b.Controls[0]
 26410  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26411  				break
 26412  			}
 26413  			z := v_0.Args[0]
 26414  			if z.Op != ssaop.OpARM64AND {
 26415  				break
 26416  			}
 26417  			_ = z.Args[1]
 26418  			z_0 := z.Args[0]
 26419  			z_1 := z.Args[1]
 26420  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26421  				x := z_0
 26422  				y := z_1
 26423  				if !(z.Uses == 1) {
 26424  					continue
 26425  				}
 26426  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 26427  				v0.AddArg2(x, y)
 26428  				b.ResetWithControl(block.BlockARM64LT, v0)
 26429  				return true
 26430  			}
 26431  			break
 26432  		}
 26433  		// match: (LT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 26434  		// cond: x.Uses == 1
 26435  		// result: (LT (TSTWconst [int32(c)] y) yes no)
 26436  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26437  			v_0 := b.Controls[0]
 26438  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26439  				break
 26440  			}
 26441  			x := v_0.Args[0]
 26442  			if x.Op != ssaop.OpARM64ANDconst {
 26443  				break
 26444  			}
 26445  			c := ssa.AuxIntToInt64(x.AuxInt)
 26446  			y := x.Args[0]
 26447  			if !(x.Uses == 1) {
 26448  				break
 26449  			}
 26450  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 26451  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26452  			v0.AddArg(y)
 26453  			b.ResetWithControl(block.BlockARM64LT, v0)
 26454  			return true
 26455  		}
 26456  		// match: (LT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 26457  		// cond: x.Uses == 1
 26458  		// result: (LTnoov (CMNconst [c] y) yes no)
 26459  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26460  			v_0 := b.Controls[0]
 26461  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26462  				break
 26463  			}
 26464  			x := v_0.Args[0]
 26465  			if x.Op != ssaop.OpARM64ADDconst {
 26466  				break
 26467  			}
 26468  			c := ssa.AuxIntToInt64(x.AuxInt)
 26469  			y := x.Args[0]
 26470  			if !(x.Uses == 1) {
 26471  				break
 26472  			}
 26473  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 26474  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26475  			v0.AddArg(y)
 26476  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26477  			return true
 26478  		}
 26479  		// match: (LT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 26480  		// cond: x.Uses == 1
 26481  		// result: (LTnoov (CMNWconst [int32(c)] y) yes no)
 26482  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26483  			v_0 := b.Controls[0]
 26484  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26485  				break
 26486  			}
 26487  			x := v_0.Args[0]
 26488  			if x.Op != ssaop.OpARM64ADDconst {
 26489  				break
 26490  			}
 26491  			c := ssa.AuxIntToInt64(x.AuxInt)
 26492  			y := x.Args[0]
 26493  			if !(x.Uses == 1) {
 26494  				break
 26495  			}
 26496  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 26497  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26498  			v0.AddArg(y)
 26499  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26500  			return true
 26501  		}
 26502  		// match: (LT (CMPconst [0] z:(ADD x y)) yes no)
 26503  		// cond: z.Uses == 1
 26504  		// result: (LTnoov (CMN x y) yes no)
 26505  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26506  			v_0 := b.Controls[0]
 26507  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26508  				break
 26509  			}
 26510  			z := v_0.Args[0]
 26511  			if z.Op != ssaop.OpARM64ADD {
 26512  				break
 26513  			}
 26514  			_ = z.Args[1]
 26515  			z_0 := z.Args[0]
 26516  			z_1 := z.Args[1]
 26517  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26518  				x := z_0
 26519  				y := z_1
 26520  				if !(z.Uses == 1) {
 26521  					continue
 26522  				}
 26523  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26524  				v0.AddArg2(x, y)
 26525  				b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26526  				return true
 26527  			}
 26528  			break
 26529  		}
 26530  		// match: (LT (CMPWconst [0] z:(ADD x y)) yes no)
 26531  		// cond: z.Uses == 1
 26532  		// result: (LTnoov (CMNW x y) yes no)
 26533  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26534  			v_0 := b.Controls[0]
 26535  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26536  				break
 26537  			}
 26538  			z := v_0.Args[0]
 26539  			if z.Op != ssaop.OpARM64ADD {
 26540  				break
 26541  			}
 26542  			_ = z.Args[1]
 26543  			z_0 := z.Args[0]
 26544  			z_1 := z.Args[1]
 26545  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26546  				x := z_0
 26547  				y := z_1
 26548  				if !(z.Uses == 1) {
 26549  					continue
 26550  				}
 26551  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26552  				v0.AddArg2(x, y)
 26553  				b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26554  				return true
 26555  			}
 26556  			break
 26557  		}
 26558  		// match: (LT (CMPconst [0] z:(MADD a x y)) yes no)
 26559  		// cond: z.Uses==1
 26560  		// result: (LTnoov (CMN a (MUL <x.Type> x y)) yes no)
 26561  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26562  			v_0 := b.Controls[0]
 26563  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26564  				break
 26565  			}
 26566  			z := v_0.Args[0]
 26567  			if z.Op != ssaop.OpARM64MADD {
 26568  				break
 26569  			}
 26570  			y := z.Args[2]
 26571  			a := z.Args[0]
 26572  			x := z.Args[1]
 26573  			if !(z.Uses == 1) {
 26574  				break
 26575  			}
 26576  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26577  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 26578  			v1.AddArg2(x, y)
 26579  			v0.AddArg2(a, v1)
 26580  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26581  			return true
 26582  		}
 26583  		// match: (LT (CMPWconst [0] z:(MADDW a x y)) yes no)
 26584  		// cond: z.Uses==1
 26585  		// result: (LTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 26586  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26587  			v_0 := b.Controls[0]
 26588  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26589  				break
 26590  			}
 26591  			z := v_0.Args[0]
 26592  			if z.Op != ssaop.OpARM64MADDW {
 26593  				break
 26594  			}
 26595  			y := z.Args[2]
 26596  			a := z.Args[0]
 26597  			x := z.Args[1]
 26598  			if !(z.Uses == 1) {
 26599  				break
 26600  			}
 26601  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26602  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 26603  			v1.AddArg2(x, y)
 26604  			v0.AddArg2(a, v1)
 26605  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26606  			return true
 26607  		}
 26608  		// match: (LT (CMPWconst [0] x) yes no)
 26609  		// result: (TBNZ [31] x yes no)
 26610  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26611  			v_0 := b.Controls[0]
 26612  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26613  				break
 26614  			}
 26615  			x := v_0.Args[0]
 26616  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 26617  			b.AuxInt = ssa.Int64ToAuxInt(31)
 26618  			return true
 26619  		}
 26620  		// match: (LT (CMPconst [0] x) yes no)
 26621  		// result: (TBNZ [63] x yes no)
 26622  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26623  			v_0 := b.Controls[0]
 26624  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26625  				break
 26626  			}
 26627  			x := v_0.Args[0]
 26628  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 26629  			b.AuxInt = ssa.Int64ToAuxInt(63)
 26630  			return true
 26631  		}
 26632  		// match: (LT (CMPWconst [128] x) yes no)
 26633  		// cond: ssa.ZeroUpper56Bits(x)
 26634  		// result: (TBZ [7] x yes no)
 26635  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26636  			v_0 := b.Controls[0]
 26637  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 26638  				break
 26639  			}
 26640  			x := v_0.Args[0]
 26641  			if !(ssa.ZeroUpper56Bits(x)) {
 26642  				break
 26643  			}
 26644  			b.ResetWithControl(block.BlockARM64TBZ, x)
 26645  			b.AuxInt = ssa.Int64ToAuxInt(7)
 26646  			return true
 26647  		}
 26648  		// match: (LT (CMPconst [128] x) yes no)
 26649  		// cond: ssa.ZeroUpper56Bits(x)
 26650  		// result: (TBZ [7] x yes no)
 26651  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26652  			v_0 := b.Controls[0]
 26653  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 26654  				break
 26655  			}
 26656  			x := v_0.Args[0]
 26657  			if !(ssa.ZeroUpper56Bits(x)) {
 26658  				break
 26659  			}
 26660  			b.ResetWithControl(block.BlockARM64TBZ, x)
 26661  			b.AuxInt = ssa.Int64ToAuxInt(7)
 26662  			return true
 26663  		}
 26664  		// match: (LT (FlagConstant [fc]) yes no)
 26665  		// cond: fc.Lt()
 26666  		// result: (First yes no)
 26667  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26668  			v_0 := b.Controls[0]
 26669  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26670  			if !(fc.Lt()) {
 26671  				break
 26672  			}
 26673  			b.Reset(block.BlockFirst)
 26674  			return true
 26675  		}
 26676  		// match: (LT (FlagConstant [fc]) yes no)
 26677  		// cond: !fc.Lt()
 26678  		// result: (First no yes)
 26679  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26680  			v_0 := b.Controls[0]
 26681  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26682  			if !(!fc.Lt()) {
 26683  				break
 26684  			}
 26685  			b.Reset(block.BlockFirst)
 26686  			b.SwapSuccessors()
 26687  			return true
 26688  		}
 26689  		// match: (LT (InvertFlags cmp) yes no)
 26690  		// result: (GT cmp yes no)
 26691  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 26692  			v_0 := b.Controls[0]
 26693  			cmp := v_0.Args[0]
 26694  			b.ResetWithControl(block.BlockARM64GT, cmp)
 26695  			return true
 26696  		}
 26697  	case block.BlockARM64LTnoov:
 26698  		// match: (LTnoov (FlagConstant [fc]) yes no)
 26699  		// cond: fc.LtNoov()
 26700  		// result: (First yes no)
 26701  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26702  			v_0 := b.Controls[0]
 26703  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26704  			if !(fc.LtNoov()) {
 26705  				break
 26706  			}
 26707  			b.Reset(block.BlockFirst)
 26708  			return true
 26709  		}
 26710  		// match: (LTnoov (FlagConstant [fc]) yes no)
 26711  		// cond: !fc.LtNoov()
 26712  		// result: (First no yes)
 26713  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26714  			v_0 := b.Controls[0]
 26715  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26716  			if !(!fc.LtNoov()) {
 26717  				break
 26718  			}
 26719  			b.Reset(block.BlockFirst)
 26720  			b.SwapSuccessors()
 26721  			return true
 26722  		}
 26723  	case block.BlockARM64NE:
 26724  		// match: (NE (CMPconst [0] z:(AND x y)) yes no)
 26725  		// cond: z.Uses == 1
 26726  		// result: (NE (TST x y) yes no)
 26727  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26728  			v_0 := b.Controls[0]
 26729  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26730  				break
 26731  			}
 26732  			z := v_0.Args[0]
 26733  			if z.Op != ssaop.OpARM64AND {
 26734  				break
 26735  			}
 26736  			_ = z.Args[1]
 26737  			z_0 := z.Args[0]
 26738  			z_1 := z.Args[1]
 26739  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26740  				x := z_0
 26741  				y := z_1
 26742  				if !(z.Uses == 1) {
 26743  					continue
 26744  				}
 26745  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 26746  				v0.AddArg2(x, y)
 26747  				b.ResetWithControl(block.BlockARM64NE, v0)
 26748  				return true
 26749  			}
 26750  			break
 26751  		}
 26752  		// match: (NE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 26753  		// cond: x.Uses == 1
 26754  		// result: (NE (TSTconst [c] y) yes no)
 26755  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26756  			v_0 := b.Controls[0]
 26757  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26758  				break
 26759  			}
 26760  			x := v_0.Args[0]
 26761  			if x.Op != ssaop.OpARM64ANDconst {
 26762  				break
 26763  			}
 26764  			c := ssa.AuxIntToInt64(x.AuxInt)
 26765  			y := x.Args[0]
 26766  			if !(x.Uses == 1) {
 26767  				break
 26768  			}
 26769  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 26770  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26771  			v0.AddArg(y)
 26772  			b.ResetWithControl(block.BlockARM64NE, v0)
 26773  			return true
 26774  		}
 26775  		// match: (NE (CMPWconst [0] z:(AND x y)) yes no)
 26776  		// cond: z.Uses == 1
 26777  		// result: (NE (TSTW x y) yes no)
 26778  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26779  			v_0 := b.Controls[0]
 26780  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26781  				break
 26782  			}
 26783  			z := v_0.Args[0]
 26784  			if z.Op != ssaop.OpARM64AND {
 26785  				break
 26786  			}
 26787  			_ = z.Args[1]
 26788  			z_0 := z.Args[0]
 26789  			z_1 := z.Args[1]
 26790  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26791  				x := z_0
 26792  				y := z_1
 26793  				if !(z.Uses == 1) {
 26794  					continue
 26795  				}
 26796  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 26797  				v0.AddArg2(x, y)
 26798  				b.ResetWithControl(block.BlockARM64NE, v0)
 26799  				return true
 26800  			}
 26801  			break
 26802  		}
 26803  		// match: (NE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 26804  		// cond: x.Uses == 1
 26805  		// result: (NE (TSTWconst [int32(c)] y) yes no)
 26806  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26807  			v_0 := b.Controls[0]
 26808  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26809  				break
 26810  			}
 26811  			x := v_0.Args[0]
 26812  			if x.Op != ssaop.OpARM64ANDconst {
 26813  				break
 26814  			}
 26815  			c := ssa.AuxIntToInt64(x.AuxInt)
 26816  			y := x.Args[0]
 26817  			if !(x.Uses == 1) {
 26818  				break
 26819  			}
 26820  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 26821  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26822  			v0.AddArg(y)
 26823  			b.ResetWithControl(block.BlockARM64NE, v0)
 26824  			return true
 26825  		}
 26826  		// match: (NE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 26827  		// cond: x.Uses == 1
 26828  		// result: (NE (CMNconst [c] y) yes no)
 26829  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26830  			v_0 := b.Controls[0]
 26831  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26832  				break
 26833  			}
 26834  			x := v_0.Args[0]
 26835  			if x.Op != ssaop.OpARM64ADDconst {
 26836  				break
 26837  			}
 26838  			c := ssa.AuxIntToInt64(x.AuxInt)
 26839  			y := x.Args[0]
 26840  			if !(x.Uses == 1) {
 26841  				break
 26842  			}
 26843  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 26844  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26845  			v0.AddArg(y)
 26846  			b.ResetWithControl(block.BlockARM64NE, v0)
 26847  			return true
 26848  		}
 26849  		// match: (NE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 26850  		// cond: x.Uses == 1
 26851  		// result: (NE (CMNWconst [int32(c)] y) yes no)
 26852  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26853  			v_0 := b.Controls[0]
 26854  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26855  				break
 26856  			}
 26857  			x := v_0.Args[0]
 26858  			if x.Op != ssaop.OpARM64ADDconst {
 26859  				break
 26860  			}
 26861  			c := ssa.AuxIntToInt64(x.AuxInt)
 26862  			y := x.Args[0]
 26863  			if !(x.Uses == 1) {
 26864  				break
 26865  			}
 26866  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 26867  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26868  			v0.AddArg(y)
 26869  			b.ResetWithControl(block.BlockARM64NE, v0)
 26870  			return true
 26871  		}
 26872  		// match: (NE (CMPconst [0] z:(ADD x y)) yes no)
 26873  		// cond: z.Uses == 1
 26874  		// result: (NE (CMN x y) yes no)
 26875  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26876  			v_0 := b.Controls[0]
 26877  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26878  				break
 26879  			}
 26880  			z := v_0.Args[0]
 26881  			if z.Op != ssaop.OpARM64ADD {
 26882  				break
 26883  			}
 26884  			_ = z.Args[1]
 26885  			z_0 := z.Args[0]
 26886  			z_1 := z.Args[1]
 26887  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26888  				x := z_0
 26889  				y := z_1
 26890  				if !(z.Uses == 1) {
 26891  					continue
 26892  				}
 26893  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26894  				v0.AddArg2(x, y)
 26895  				b.ResetWithControl(block.BlockARM64NE, v0)
 26896  				return true
 26897  			}
 26898  			break
 26899  		}
 26900  		// match: (NE (CMPWconst [0] z:(ADD x y)) yes no)
 26901  		// cond: z.Uses == 1
 26902  		// result: (NE (CMNW x y) yes no)
 26903  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26904  			v_0 := b.Controls[0]
 26905  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26906  				break
 26907  			}
 26908  			z := v_0.Args[0]
 26909  			if z.Op != ssaop.OpARM64ADD {
 26910  				break
 26911  			}
 26912  			_ = z.Args[1]
 26913  			z_0 := z.Args[0]
 26914  			z_1 := z.Args[1]
 26915  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26916  				x := z_0
 26917  				y := z_1
 26918  				if !(z.Uses == 1) {
 26919  					continue
 26920  				}
 26921  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26922  				v0.AddArg2(x, y)
 26923  				b.ResetWithControl(block.BlockARM64NE, v0)
 26924  				return true
 26925  			}
 26926  			break
 26927  		}
 26928  		// match: (NE (CMP x z:(NEG y)) yes no)
 26929  		// cond: z.Uses == 1
 26930  		// result: (NE (CMN x y) yes no)
 26931  		for b.Controls[0].Op == ssaop.OpARM64CMP {
 26932  			v_0 := b.Controls[0]
 26933  			_ = v_0.Args[1]
 26934  			x := v_0.Args[0]
 26935  			z := v_0.Args[1]
 26936  			if z.Op != ssaop.OpARM64NEG {
 26937  				break
 26938  			}
 26939  			y := z.Args[0]
 26940  			if !(z.Uses == 1) {
 26941  				break
 26942  			}
 26943  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26944  			v0.AddArg2(x, y)
 26945  			b.ResetWithControl(block.BlockARM64NE, v0)
 26946  			return true
 26947  		}
 26948  		// match: (NE (CMPW x z:(NEG y)) yes no)
 26949  		// cond: z.Uses == 1
 26950  		// result: (NE (CMNW x y) yes no)
 26951  		for b.Controls[0].Op == ssaop.OpARM64CMPW {
 26952  			v_0 := b.Controls[0]
 26953  			_ = v_0.Args[1]
 26954  			x := v_0.Args[0]
 26955  			z := v_0.Args[1]
 26956  			if z.Op != ssaop.OpARM64NEG {
 26957  				break
 26958  			}
 26959  			y := z.Args[0]
 26960  			if !(z.Uses == 1) {
 26961  				break
 26962  			}
 26963  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26964  			v0.AddArg2(x, y)
 26965  			b.ResetWithControl(block.BlockARM64NE, v0)
 26966  			return true
 26967  		}
 26968  		// match: (NE (CMPconst [0] x) yes no)
 26969  		// result: (NZ x yes no)
 26970  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26971  			v_0 := b.Controls[0]
 26972  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26973  				break
 26974  			}
 26975  			x := v_0.Args[0]
 26976  			b.ResetWithControl(block.BlockARM64NZ, x)
 26977  			return true
 26978  		}
 26979  		// match: (NE (CMPWconst [0] x) yes no)
 26980  		// result: (NZW x yes no)
 26981  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26982  			v_0 := b.Controls[0]
 26983  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26984  				break
 26985  			}
 26986  			x := v_0.Args[0]
 26987  			b.ResetWithControl(block.BlockARM64NZW, x)
 26988  			return true
 26989  		}
 26990  		// match: (NE (CMPconst [0] z:(MADD a x y)) yes no)
 26991  		// cond: z.Uses==1
 26992  		// result: (NE (CMN a (MUL <x.Type> x y)) yes no)
 26993  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26994  			v_0 := b.Controls[0]
 26995  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26996  				break
 26997  			}
 26998  			z := v_0.Args[0]
 26999  			if z.Op != ssaop.OpARM64MADD {
 27000  				break
 27001  			}
 27002  			y := z.Args[2]
 27003  			a := z.Args[0]
 27004  			x := z.Args[1]
 27005  			if !(z.Uses == 1) {
 27006  				break
 27007  			}
 27008  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 27009  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 27010  			v1.AddArg2(x, y)
 27011  			v0.AddArg2(a, v1)
 27012  			b.ResetWithControl(block.BlockARM64NE, v0)
 27013  			return true
 27014  		}
 27015  		// match: (NE (CMPWconst [0] z:(MADDW a x y)) yes no)
 27016  		// cond: z.Uses==1
 27017  		// result: (NE (CMNW a (MULW <x.Type> x y)) yes no)
 27018  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27019  			v_0 := b.Controls[0]
 27020  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27021  				break
 27022  			}
 27023  			z := v_0.Args[0]
 27024  			if z.Op != ssaop.OpARM64MADDW {
 27025  				break
 27026  			}
 27027  			y := z.Args[2]
 27028  			a := z.Args[0]
 27029  			x := z.Args[1]
 27030  			if !(z.Uses == 1) {
 27031  				break
 27032  			}
 27033  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 27034  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 27035  			v1.AddArg2(x, y)
 27036  			v0.AddArg2(a, v1)
 27037  			b.ResetWithControl(block.BlockARM64NE, v0)
 27038  			return true
 27039  		}
 27040  		// match: (NE (CMPconst [0] z:(MSUB a x y)) yes no)
 27041  		// cond: z.Uses==1
 27042  		// result: (NE (CMP a (MUL <x.Type> x y)) yes no)
 27043  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 27044  			v_0 := b.Controls[0]
 27045  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27046  				break
 27047  			}
 27048  			z := v_0.Args[0]
 27049  			if z.Op != ssaop.OpARM64MSUB {
 27050  				break
 27051  			}
 27052  			y := z.Args[2]
 27053  			a := z.Args[0]
 27054  			x := z.Args[1]
 27055  			if !(z.Uses == 1) {
 27056  				break
 27057  			}
 27058  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 27059  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 27060  			v1.AddArg2(x, y)
 27061  			v0.AddArg2(a, v1)
 27062  			b.ResetWithControl(block.BlockARM64NE, v0)
 27063  			return true
 27064  		}
 27065  		// match: (NE (CMPWconst [0] z:(MSUBW a x y)) yes no)
 27066  		// cond: z.Uses==1
 27067  		// result: (NE (CMPW a (MULW <x.Type> x y)) yes no)
 27068  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27069  			v_0 := b.Controls[0]
 27070  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27071  				break
 27072  			}
 27073  			z := v_0.Args[0]
 27074  			if z.Op != ssaop.OpARM64MSUBW {
 27075  				break
 27076  			}
 27077  			y := z.Args[2]
 27078  			a := z.Args[0]
 27079  			x := z.Args[1]
 27080  			if !(z.Uses == 1) {
 27081  				break
 27082  			}
 27083  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 27084  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 27085  			v1.AddArg2(x, y)
 27086  			v0.AddArg2(a, v1)
 27087  			b.ResetWithControl(block.BlockARM64NE, v0)
 27088  			return true
 27089  		}
 27090  		// match: (NE (TSTconst [c] x) yes no)
 27091  		// cond: ssa.OneBit(c)
 27092  		// result: (TBNZ [int64(ssa.Ntz64(c))] x yes no)
 27093  		for b.Controls[0].Op == ssaop.OpARM64TSTconst {
 27094  			v_0 := b.Controls[0]
 27095  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27096  			x := v_0.Args[0]
 27097  			if !(ssa.OneBit(c)) {
 27098  				break
 27099  			}
 27100  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27101  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 27102  			return true
 27103  		}
 27104  		// match: (NE (TSTWconst [c] x) yes no)
 27105  		// cond: ssa.OneBit(int64(uint32(c)))
 27106  		// result: (TBNZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 27107  		for b.Controls[0].Op == ssaop.OpARM64TSTWconst {
 27108  			v_0 := b.Controls[0]
 27109  			c := ssa.AuxIntToInt32(v_0.AuxInt)
 27110  			x := v_0.Args[0]
 27111  			if !(ssa.OneBit(int64(uint32(c)))) {
 27112  				break
 27113  			}
 27114  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27115  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 27116  			return true
 27117  		}
 27118  		// match: (NE (FlagConstant [fc]) yes no)
 27119  		// cond: fc.Ne()
 27120  		// result: (First yes no)
 27121  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27122  			v_0 := b.Controls[0]
 27123  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 27124  			if !(fc.Ne()) {
 27125  				break
 27126  			}
 27127  			b.Reset(block.BlockFirst)
 27128  			return true
 27129  		}
 27130  		// match: (NE (FlagConstant [fc]) yes no)
 27131  		// cond: !fc.Ne()
 27132  		// result: (First no yes)
 27133  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27134  			v_0 := b.Controls[0]
 27135  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 27136  			if !(!fc.Ne()) {
 27137  				break
 27138  			}
 27139  			b.Reset(block.BlockFirst)
 27140  			b.SwapSuccessors()
 27141  			return true
 27142  		}
 27143  		// match: (NE (InvertFlags cmp) yes no)
 27144  		// result: (NE cmp yes no)
 27145  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 27146  			v_0 := b.Controls[0]
 27147  			cmp := v_0.Args[0]
 27148  			b.ResetWithControl(block.BlockARM64NE, cmp)
 27149  			return true
 27150  		}
 27151  	case block.BlockARM64NZ:
 27152  		// match: (NZ (Equal cc) yes no)
 27153  		// result: (EQ cc yes no)
 27154  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 27155  			v_0 := b.Controls[0]
 27156  			cc := v_0.Args[0]
 27157  			b.ResetWithControl(block.BlockARM64EQ, cc)
 27158  			return true
 27159  		}
 27160  		// match: (NZ (NotEqual cc) yes no)
 27161  		// result: (NE cc yes no)
 27162  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 27163  			v_0 := b.Controls[0]
 27164  			cc := v_0.Args[0]
 27165  			b.ResetWithControl(block.BlockARM64NE, cc)
 27166  			return true
 27167  		}
 27168  		// match: (NZ (LessThan cc) yes no)
 27169  		// result: (LT cc yes no)
 27170  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 27171  			v_0 := b.Controls[0]
 27172  			cc := v_0.Args[0]
 27173  			b.ResetWithControl(block.BlockARM64LT, cc)
 27174  			return true
 27175  		}
 27176  		// match: (NZ (LessThanU cc) yes no)
 27177  		// result: (ULT cc yes no)
 27178  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 27179  			v_0 := b.Controls[0]
 27180  			cc := v_0.Args[0]
 27181  			b.ResetWithControl(block.BlockARM64ULT, cc)
 27182  			return true
 27183  		}
 27184  		// match: (NZ (LessEqual cc) yes no)
 27185  		// result: (LE cc yes no)
 27186  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 27187  			v_0 := b.Controls[0]
 27188  			cc := v_0.Args[0]
 27189  			b.ResetWithControl(block.BlockARM64LE, cc)
 27190  			return true
 27191  		}
 27192  		// match: (NZ (LessEqualU cc) yes no)
 27193  		// result: (ULE cc yes no)
 27194  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 27195  			v_0 := b.Controls[0]
 27196  			cc := v_0.Args[0]
 27197  			b.ResetWithControl(block.BlockARM64ULE, cc)
 27198  			return true
 27199  		}
 27200  		// match: (NZ (GreaterThan cc) yes no)
 27201  		// result: (GT cc yes no)
 27202  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 27203  			v_0 := b.Controls[0]
 27204  			cc := v_0.Args[0]
 27205  			b.ResetWithControl(block.BlockARM64GT, cc)
 27206  			return true
 27207  		}
 27208  		// match: (NZ (GreaterThanU cc) yes no)
 27209  		// result: (UGT cc yes no)
 27210  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 27211  			v_0 := b.Controls[0]
 27212  			cc := v_0.Args[0]
 27213  			b.ResetWithControl(block.BlockARM64UGT, cc)
 27214  			return true
 27215  		}
 27216  		// match: (NZ (GreaterEqual cc) yes no)
 27217  		// result: (GE cc yes no)
 27218  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 27219  			v_0 := b.Controls[0]
 27220  			cc := v_0.Args[0]
 27221  			b.ResetWithControl(block.BlockARM64GE, cc)
 27222  			return true
 27223  		}
 27224  		// match: (NZ (GreaterEqualU cc) yes no)
 27225  		// result: (UGE cc yes no)
 27226  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 27227  			v_0 := b.Controls[0]
 27228  			cc := v_0.Args[0]
 27229  			b.ResetWithControl(block.BlockARM64UGE, cc)
 27230  			return true
 27231  		}
 27232  		// match: (NZ (LessThanF cc) yes no)
 27233  		// result: (FLT cc yes no)
 27234  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 27235  			v_0 := b.Controls[0]
 27236  			cc := v_0.Args[0]
 27237  			b.ResetWithControl(block.BlockARM64FLT, cc)
 27238  			return true
 27239  		}
 27240  		// match: (NZ (LessEqualF cc) yes no)
 27241  		// result: (FLE cc yes no)
 27242  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 27243  			v_0 := b.Controls[0]
 27244  			cc := v_0.Args[0]
 27245  			b.ResetWithControl(block.BlockARM64FLE, cc)
 27246  			return true
 27247  		}
 27248  		// match: (NZ (GreaterThanF cc) yes no)
 27249  		// result: (FGT cc yes no)
 27250  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 27251  			v_0 := b.Controls[0]
 27252  			cc := v_0.Args[0]
 27253  			b.ResetWithControl(block.BlockARM64FGT, cc)
 27254  			return true
 27255  		}
 27256  		// match: (NZ (GreaterEqualF cc) yes no)
 27257  		// result: (FGE cc yes no)
 27258  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 27259  			v_0 := b.Controls[0]
 27260  			cc := v_0.Args[0]
 27261  			b.ResetWithControl(block.BlockARM64FGE, cc)
 27262  			return true
 27263  		}
 27264  		// match: (NZ sub:(SUB x y))
 27265  		// cond: sub.Uses == 1
 27266  		// result: (NE (CMP x y))
 27267  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 27268  			sub := b.Controls[0]
 27269  			y := sub.Args[1]
 27270  			x := sub.Args[0]
 27271  			if !(sub.Uses == 1) {
 27272  				break
 27273  			}
 27274  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 27275  			v0.AddArg2(x, y)
 27276  			b.ResetWithControl(block.BlockARM64NE, v0)
 27277  			return true
 27278  		}
 27279  		// match: (NZ sub:(SUBconst [c] y))
 27280  		// cond: sub.Uses == 1
 27281  		// result: (NE (CMPconst [c] y))
 27282  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 27283  			sub := b.Controls[0]
 27284  			c := ssa.AuxIntToInt64(sub.AuxInt)
 27285  			y := sub.Args[0]
 27286  			if !(sub.Uses == 1) {
 27287  				break
 27288  			}
 27289  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 27290  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 27291  			v0.AddArg(y)
 27292  			b.ResetWithControl(block.BlockARM64NE, v0)
 27293  			return true
 27294  		}
 27295  		// match: (NZ (ANDconst [c] x) yes no)
 27296  		// cond: ssa.OneBit(c)
 27297  		// result: (TBNZ [int64(ssa.Ntz64(c))] x yes no)
 27298  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 27299  			v_0 := b.Controls[0]
 27300  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27301  			x := v_0.Args[0]
 27302  			if !(ssa.OneBit(c)) {
 27303  				break
 27304  			}
 27305  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27306  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 27307  			return true
 27308  		}
 27309  		// match: (NZ s:(SRLconst [63] x) yes no)
 27310  		// cond: s.Uses == 1
 27311  		// result: (TBNZ [63] x yes no)
 27312  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27313  			s := b.Controls[0]
 27314  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 27315  				break
 27316  			}
 27317  			x := s.Args[0]
 27318  			if !(s.Uses == 1) {
 27319  				break
 27320  			}
 27321  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27322  			b.AuxInt = ssa.Int64ToAuxInt(63)
 27323  			return true
 27324  		}
 27325  		// match: (NZ s:(SRAconst [63] x) yes no)
 27326  		// cond: s.Uses == 1
 27327  		// result: (TBNZ [63] x yes no)
 27328  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 27329  			s := b.Controls[0]
 27330  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 27331  				break
 27332  			}
 27333  			x := s.Args[0]
 27334  			if !(s.Uses == 1) {
 27335  				break
 27336  			}
 27337  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27338  			b.AuxInt = ssa.Int64ToAuxInt(63)
 27339  			return true
 27340  		}
 27341  		// match: (NZ (MOVDconst [0]) yes no)
 27342  		// result: (First no yes)
 27343  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 27344  			v_0 := b.Controls[0]
 27345  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27346  				break
 27347  			}
 27348  			b.Reset(block.BlockFirst)
 27349  			b.SwapSuccessors()
 27350  			return true
 27351  		}
 27352  		// match: (NZ (MOVDconst [c]) yes no)
 27353  		// cond: c != 0
 27354  		// result: (First yes no)
 27355  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 27356  			v_0 := b.Controls[0]
 27357  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27358  			if !(c != 0) {
 27359  				break
 27360  			}
 27361  			b.Reset(block.BlockFirst)
 27362  			return true
 27363  		}
 27364  	case block.BlockARM64NZW:
 27365  		// match: (NZW sub:(SUB x y))
 27366  		// cond: sub.Uses == 1
 27367  		// result: (NE (CMPW x y))
 27368  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 27369  			sub := b.Controls[0]
 27370  			y := sub.Args[1]
 27371  			x := sub.Args[0]
 27372  			if !(sub.Uses == 1) {
 27373  				break
 27374  			}
 27375  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 27376  			v0.AddArg2(x, y)
 27377  			b.ResetWithControl(block.BlockARM64NE, v0)
 27378  			return true
 27379  		}
 27380  		// match: (NZW sub:(SUBconst [c] y))
 27381  		// cond: sub.Uses == 1
 27382  		// result: (NE (CMPWconst [int32(c)] y))
 27383  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 27384  			sub := b.Controls[0]
 27385  			c := ssa.AuxIntToInt64(sub.AuxInt)
 27386  			y := sub.Args[0]
 27387  			if !(sub.Uses == 1) {
 27388  				break
 27389  			}
 27390  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 27391  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 27392  			v0.AddArg(y)
 27393  			b.ResetWithControl(block.BlockARM64NE, v0)
 27394  			return true
 27395  		}
 27396  		// match: (NZW (ANDconst [c] x) yes no)
 27397  		// cond: ssa.OneBit(int64(uint32(c)))
 27398  		// result: (TBNZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 27399  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 27400  			v_0 := b.Controls[0]
 27401  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27402  			x := v_0.Args[0]
 27403  			if !(ssa.OneBit(int64(uint32(c)))) {
 27404  				break
 27405  			}
 27406  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27407  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 27408  			return true
 27409  		}
 27410  		// match: (NZW (MOVDconst [c]) yes no)
 27411  		// cond: int32(c) == 0
 27412  		// result: (First no yes)
 27413  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 27414  			v_0 := b.Controls[0]
 27415  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27416  			if !(int32(c) == 0) {
 27417  				break
 27418  			}
 27419  			b.Reset(block.BlockFirst)
 27420  			b.SwapSuccessors()
 27421  			return true
 27422  		}
 27423  		// match: (NZW (MOVDconst [c]) yes no)
 27424  		// cond: int32(c) != 0
 27425  		// result: (First yes no)
 27426  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 27427  			v_0 := b.Controls[0]
 27428  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27429  			if !(int32(c) != 0) {
 27430  				break
 27431  			}
 27432  			b.Reset(block.BlockFirst)
 27433  			return true
 27434  		}
 27435  	case block.BlockARM64TBNZ:
 27436  		// match: (TBNZ [0] (Equal cc) yes no)
 27437  		// result: (EQ cc yes no)
 27438  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 27439  			v_0 := b.Controls[0]
 27440  			cc := v_0.Args[0]
 27441  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27442  				break
 27443  			}
 27444  			b.ResetWithControl(block.BlockARM64EQ, cc)
 27445  			return true
 27446  		}
 27447  		// match: (TBNZ [0] (NotEqual cc) yes no)
 27448  		// result: (NE cc yes no)
 27449  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 27450  			v_0 := b.Controls[0]
 27451  			cc := v_0.Args[0]
 27452  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27453  				break
 27454  			}
 27455  			b.ResetWithControl(block.BlockARM64NE, cc)
 27456  			return true
 27457  		}
 27458  		// match: (TBNZ [0] (LessThan cc) yes no)
 27459  		// result: (LT cc yes no)
 27460  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 27461  			v_0 := b.Controls[0]
 27462  			cc := v_0.Args[0]
 27463  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27464  				break
 27465  			}
 27466  			b.ResetWithControl(block.BlockARM64LT, cc)
 27467  			return true
 27468  		}
 27469  		// match: (TBNZ [0] (LessThanU cc) yes no)
 27470  		// result: (ULT cc yes no)
 27471  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 27472  			v_0 := b.Controls[0]
 27473  			cc := v_0.Args[0]
 27474  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27475  				break
 27476  			}
 27477  			b.ResetWithControl(block.BlockARM64ULT, cc)
 27478  			return true
 27479  		}
 27480  		// match: (TBNZ [0] (LessEqual cc) yes no)
 27481  		// result: (LE cc yes no)
 27482  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 27483  			v_0 := b.Controls[0]
 27484  			cc := v_0.Args[0]
 27485  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27486  				break
 27487  			}
 27488  			b.ResetWithControl(block.BlockARM64LE, cc)
 27489  			return true
 27490  		}
 27491  		// match: (TBNZ [0] (LessEqualU cc) yes no)
 27492  		// result: (ULE cc yes no)
 27493  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 27494  			v_0 := b.Controls[0]
 27495  			cc := v_0.Args[0]
 27496  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27497  				break
 27498  			}
 27499  			b.ResetWithControl(block.BlockARM64ULE, cc)
 27500  			return true
 27501  		}
 27502  		// match: (TBNZ [0] (GreaterThan cc) yes no)
 27503  		// result: (GT cc yes no)
 27504  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 27505  			v_0 := b.Controls[0]
 27506  			cc := v_0.Args[0]
 27507  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27508  				break
 27509  			}
 27510  			b.ResetWithControl(block.BlockARM64GT, cc)
 27511  			return true
 27512  		}
 27513  		// match: (TBNZ [0] (GreaterThanU cc) yes no)
 27514  		// result: (UGT cc yes no)
 27515  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 27516  			v_0 := b.Controls[0]
 27517  			cc := v_0.Args[0]
 27518  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27519  				break
 27520  			}
 27521  			b.ResetWithControl(block.BlockARM64UGT, cc)
 27522  			return true
 27523  		}
 27524  		// match: (TBNZ [0] (GreaterEqual cc) yes no)
 27525  		// result: (GE cc yes no)
 27526  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 27527  			v_0 := b.Controls[0]
 27528  			cc := v_0.Args[0]
 27529  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27530  				break
 27531  			}
 27532  			b.ResetWithControl(block.BlockARM64GE, cc)
 27533  			return true
 27534  		}
 27535  		// match: (TBNZ [0] (GreaterEqualU cc) yes no)
 27536  		// result: (UGE cc yes no)
 27537  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 27538  			v_0 := b.Controls[0]
 27539  			cc := v_0.Args[0]
 27540  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27541  				break
 27542  			}
 27543  			b.ResetWithControl(block.BlockARM64UGE, cc)
 27544  			return true
 27545  		}
 27546  		// match: (TBNZ [0] (LessThanF cc) yes no)
 27547  		// result: (FLT cc yes no)
 27548  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 27549  			v_0 := b.Controls[0]
 27550  			cc := v_0.Args[0]
 27551  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27552  				break
 27553  			}
 27554  			b.ResetWithControl(block.BlockARM64FLT, cc)
 27555  			return true
 27556  		}
 27557  		// match: (TBNZ [0] (LessEqualF cc) yes no)
 27558  		// result: (FLE cc yes no)
 27559  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 27560  			v_0 := b.Controls[0]
 27561  			cc := v_0.Args[0]
 27562  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27563  				break
 27564  			}
 27565  			b.ResetWithControl(block.BlockARM64FLE, cc)
 27566  			return true
 27567  		}
 27568  		// match: (TBNZ [0] (GreaterThanF cc) yes no)
 27569  		// result: (FGT cc yes no)
 27570  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 27571  			v_0 := b.Controls[0]
 27572  			cc := v_0.Args[0]
 27573  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27574  				break
 27575  			}
 27576  			b.ResetWithControl(block.BlockARM64FGT, cc)
 27577  			return true
 27578  		}
 27579  		// match: (TBNZ [0] (GreaterEqualF cc) yes no)
 27580  		// result: (FGE cc yes no)
 27581  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 27582  			v_0 := b.Controls[0]
 27583  			cc := v_0.Args[0]
 27584  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27585  				break
 27586  			}
 27587  			b.ResetWithControl(block.BlockARM64FGE, cc)
 27588  			return true
 27589  		}
 27590  		// match: (TBNZ [0] (XORconst [1] x) yes no)
 27591  		// result: (TBZ [0] x yes no)
 27592  		for b.Controls[0].Op == ssaop.OpARM64XORconst {
 27593  			v_0 := b.Controls[0]
 27594  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 27595  				break
 27596  			}
 27597  			x := v_0.Args[0]
 27598  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27599  				break
 27600  			}
 27601  			b.ResetWithControl(block.BlockARM64TBZ, x)
 27602  			b.AuxInt = ssa.Int64ToAuxInt(0)
 27603  			return true
 27604  		}
 27605  		// match: (TBNZ [t] sv:(SRLconst [s] x) yes no)
 27606  		// cond: t+s < 64 && sv.Uses == 1
 27607  		// result: (TBNZ [t+s] x yes no )
 27608  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27609  			sv := b.Controls[0]
 27610  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27611  			x := sv.Args[0]
 27612  			t := ssa.AuxIntToInt64(b.AuxInt)
 27613  			if !(t+s < 64 && sv.Uses == 1) {
 27614  				break
 27615  			}
 27616  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27617  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 27618  			return true
 27619  		}
 27620  		// match: (TBNZ [t] (SRLconst [s] x) yes no)
 27621  		// cond: t+s >= 64
 27622  		// result: (First no yes)
 27623  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27624  			v_0 := b.Controls[0]
 27625  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 27626  			t := ssa.AuxIntToInt64(b.AuxInt)
 27627  			if !(t+s >= 64) {
 27628  				break
 27629  			}
 27630  			b.Reset(block.BlockFirst)
 27631  			b.SwapSuccessors()
 27632  			return true
 27633  		}
 27634  		// match: (TBNZ [t] sv:(SLLconst [s] x) yes no)
 27635  		// cond: t-s >= 0 && sv.Uses == 1
 27636  		// result: (TBNZ [t-s] x yes no )
 27637  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 27638  			sv := b.Controls[0]
 27639  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27640  			x := sv.Args[0]
 27641  			t := ssa.AuxIntToInt64(b.AuxInt)
 27642  			if !(t-s >= 0 && sv.Uses == 1) {
 27643  				break
 27644  			}
 27645  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27646  			b.AuxInt = ssa.Int64ToAuxInt(t - s)
 27647  			return true
 27648  		}
 27649  		// match: (TBNZ [t] (SLLconst [s] x) yes no)
 27650  		// cond: t-s < 0
 27651  		// result: (First no yes)
 27652  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 27653  			v_0 := b.Controls[0]
 27654  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 27655  			t := ssa.AuxIntToInt64(b.AuxInt)
 27656  			if !(t-s < 0) {
 27657  				break
 27658  			}
 27659  			b.Reset(block.BlockFirst)
 27660  			b.SwapSuccessors()
 27661  			return true
 27662  		}
 27663  		// match: (TBNZ [t] rv:(RORconst [r] x) yes no)
 27664  		// cond: rv.Uses == 1
 27665  		// result: (TBNZ [int64(uint64(t+r)%64)] x yes no)
 27666  		for b.Controls[0].Op == ssaop.OpARM64RORconst {
 27667  			rv := b.Controls[0]
 27668  			r := ssa.AuxIntToInt64(rv.AuxInt)
 27669  			x := rv.Args[0]
 27670  			t := ssa.AuxIntToInt64(b.AuxInt)
 27671  			if !(rv.Uses == 1) {
 27672  				break
 27673  			}
 27674  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27675  			b.AuxInt = ssa.Int64ToAuxInt(int64(uint64(t+r) % 64))
 27676  			return true
 27677  		}
 27678  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 27679  		// cond: t+s < 64 && sv.Uses == 1
 27680  		// result: (TBNZ [t+s] x yes no)
 27681  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 27682  			sv := b.Controls[0]
 27683  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27684  			x := sv.Args[0]
 27685  			t := ssa.AuxIntToInt64(b.AuxInt)
 27686  			if !(t+s < 64 && sv.Uses == 1) {
 27687  				break
 27688  			}
 27689  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27690  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 27691  			return true
 27692  		}
 27693  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 27694  		// cond: t+s >= 64 && sv.Uses == 1
 27695  		// result: (TBNZ [63 ] x yes no)
 27696  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 27697  			sv := b.Controls[0]
 27698  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27699  			x := sv.Args[0]
 27700  			t := ssa.AuxIntToInt64(b.AuxInt)
 27701  			if !(t+s >= 64 && sv.Uses == 1) {
 27702  				break
 27703  			}
 27704  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27705  			b.AuxInt = ssa.Int64ToAuxInt(63)
 27706  			return true
 27707  		}
 27708  	case block.BlockARM64TBZ:
 27709  		// match: (TBZ [0] (XORconst [1] x) yes no)
 27710  		// result: (TBNZ [0] x yes no)
 27711  		for b.Controls[0].Op == ssaop.OpARM64XORconst {
 27712  			v_0 := b.Controls[0]
 27713  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 27714  				break
 27715  			}
 27716  			x := v_0.Args[0]
 27717  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27718  				break
 27719  			}
 27720  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27721  			b.AuxInt = ssa.Int64ToAuxInt(0)
 27722  			return true
 27723  		}
 27724  		// match: (TBZ [t] sv:(SRLconst [s] x) yes no)
 27725  		// cond: t+s < 64 && sv.Uses == 1
 27726  		// result: (TBZ [t+s] x yes no )
 27727  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27728  			sv := b.Controls[0]
 27729  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27730  			x := sv.Args[0]
 27731  			t := ssa.AuxIntToInt64(b.AuxInt)
 27732  			if !(t+s < 64 && sv.Uses == 1) {
 27733  				break
 27734  			}
 27735  			b.ResetWithControl(block.BlockARM64TBZ, x)
 27736  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 27737  			return true
 27738  		}
 27739  		// match: (TBZ [t] (SRLconst [s] x) yes no)
 27740  		// cond: t+s >= 64
 27741  		// result: (First yes no )
 27742  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27743  			v_0 := b.Controls[0]
 27744  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 27745  			t := ssa.AuxIntToInt64(b.AuxInt)
 27746  			if !(t+s >= 64) {
 27747  				break
 27748  			}
 27749  			b.Reset(block.BlockFirst)
 27750  			return true
 27751  		}
 27752  		// match: (TBZ [t] sv:(SLLconst [s] x) yes no)
 27753  		// cond: t-s >= 0 && sv.Uses == 1
 27754  		// result: (TBZ [t-s] x yes no )
 27755  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 27756  			sv := b.Controls[0]
 27757  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27758  			x := sv.Args[0]
 27759  			t := ssa.AuxIntToInt64(b.AuxInt)
 27760  			if !(t-s >= 0 && sv.Uses == 1) {
 27761  				break
 27762  			}
 27763  			b.ResetWithControl(block.BlockARM64TBZ, x)
 27764  			b.AuxInt = ssa.Int64ToAuxInt(t - s)
 27765  			return true
 27766  		}
 27767  		// match: (TBZ [t] (SLLconst [s] x) yes no)
 27768  		// cond: t-s < 0
 27769  		// result: (First yes no )
 27770  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 27771  			v_0 := b.Controls[0]
 27772  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 27773  			t := ssa.AuxIntToInt64(b.AuxInt)
 27774  			if !(t-s < 0) {
 27775  				break
 27776  			}
 27777  			b.Reset(block.BlockFirst)
 27778  			return true
 27779  		}
 27780  		// match: (TBZ [t] rv:(RORconst [r] x) yes no)
 27781  		// cond: rv.Uses == 1
 27782  		// result: (TBZ [int64(uint64(t+r)%64)] x yes no)
 27783  		for b.Controls[0].Op == ssaop.OpARM64RORconst {
 27784  			rv := b.Controls[0]
 27785  			r := ssa.AuxIntToInt64(rv.AuxInt)
 27786  			x := rv.Args[0]
 27787  			t := ssa.AuxIntToInt64(b.AuxInt)
 27788  			if !(rv.Uses == 1) {
 27789  				break
 27790  			}
 27791  			b.ResetWithControl(block.BlockARM64TBZ, x)
 27792  			b.AuxInt = ssa.Int64ToAuxInt(int64(uint64(t+r) % 64))
 27793  			return true
 27794  		}
 27795  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 27796  		// cond: t+s < 64 && sv.Uses == 1
 27797  		// result: (TBZ [t+s] x yes no)
 27798  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 27799  			sv := b.Controls[0]
 27800  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27801  			x := sv.Args[0]
 27802  			t := ssa.AuxIntToInt64(b.AuxInt)
 27803  			if !(t+s < 64 && sv.Uses == 1) {
 27804  				break
 27805  			}
 27806  			b.ResetWithControl(block.BlockARM64TBZ, x)
 27807  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 27808  			return true
 27809  		}
 27810  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 27811  		// cond: t+s >= 64 && sv.Uses == 1
 27812  		// result: (TBZ [63 ] x yes no)
 27813  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 27814  			sv := b.Controls[0]
 27815  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27816  			x := sv.Args[0]
 27817  			t := ssa.AuxIntToInt64(b.AuxInt)
 27818  			if !(t+s >= 64 && sv.Uses == 1) {
 27819  				break
 27820  			}
 27821  			b.ResetWithControl(block.BlockARM64TBZ, x)
 27822  			b.AuxInt = ssa.Int64ToAuxInt(63)
 27823  			return true
 27824  		}
 27825  	case block.BlockARM64UGE:
 27826  		// match: (UGE (CMPWconst [128] x) yes no)
 27827  		// cond: ssa.ZeroUpper56Bits(x)
 27828  		// result: (TBNZ [7] x yes no)
 27829  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27830  			v_0 := b.Controls[0]
 27831  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 27832  				break
 27833  			}
 27834  			x := v_0.Args[0]
 27835  			if !(ssa.ZeroUpper56Bits(x)) {
 27836  				break
 27837  			}
 27838  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27839  			b.AuxInt = ssa.Int64ToAuxInt(7)
 27840  			return true
 27841  		}
 27842  		// match: (UGE (CMPconst [128] x) yes no)
 27843  		// cond: ssa.ZeroUpper56Bits(x)
 27844  		// result: (TBNZ [7] x yes no)
 27845  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 27846  			v_0 := b.Controls[0]
 27847  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 27848  				break
 27849  			}
 27850  			x := v_0.Args[0]
 27851  			if !(ssa.ZeroUpper56Bits(x)) {
 27852  				break
 27853  			}
 27854  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27855  			b.AuxInt = ssa.Int64ToAuxInt(7)
 27856  			return true
 27857  		}
 27858  		// match: (UGE (FlagConstant [fc]) yes no)
 27859  		// cond: fc.Uge()
 27860  		// result: (First yes no)
 27861  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27862  			v_0 := b.Controls[0]
 27863  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 27864  			if !(fc.Uge()) {
 27865  				break
 27866  			}
 27867  			b.Reset(block.BlockFirst)
 27868  			return true
 27869  		}
 27870  		// match: (UGE (FlagConstant [fc]) yes no)
 27871  		// cond: !fc.Uge()
 27872  		// result: (First no yes)
 27873  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27874  			v_0 := b.Controls[0]
 27875  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 27876  			if !(!fc.Uge()) {
 27877  				break
 27878  			}
 27879  			b.Reset(block.BlockFirst)
 27880  			b.SwapSuccessors()
 27881  			return true
 27882  		}
 27883  		// match: (UGE (InvertFlags cmp) yes no)
 27884  		// result: (ULE cmp yes no)
 27885  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 27886  			v_0 := b.Controls[0]
 27887  			cmp := v_0.Args[0]
 27888  			b.ResetWithControl(block.BlockARM64ULE, cmp)
 27889  			return true
 27890  		}
 27891  	case block.BlockARM64UGT:
 27892  		// match: (UGT (CMPconst [0] x))
 27893  		// result: (NE (CMPconst [0] x))
 27894  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 27895  			v_0 := b.Controls[0]
 27896  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27897  				break
 27898  			}
 27899  			x := v_0.Args[0]
 27900  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 27901  			v0.AuxInt = ssa.Int64ToAuxInt(0)
 27902  			v0.AddArg(x)
 27903  			b.ResetWithControl(block.BlockARM64NE, v0)
 27904  			return true
 27905  		}
 27906  		// match: (UGT (CMPWconst [0] x))
 27907  		// result: (NE (CMPWconst [0] x))
 27908  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27909  			v_0 := b.Controls[0]
 27910  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27911  				break
 27912  			}
 27913  			x := v_0.Args[0]
 27914  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 27915  			v0.AuxInt = ssa.Int32ToAuxInt(0)
 27916  			v0.AddArg(x)
 27917  			b.ResetWithControl(block.BlockARM64NE, v0)
 27918  			return true
 27919  		}
 27920  		// match: (UGT (FlagConstant [fc]) yes no)
 27921  		// cond: fc.Ugt()
 27922  		// result: (First yes no)
 27923  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27924  			v_0 := b.Controls[0]
 27925  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 27926  			if !(fc.Ugt()) {
 27927  				break
 27928  			}
 27929  			b.Reset(block.BlockFirst)
 27930  			return true
 27931  		}
 27932  		// match: (UGT (FlagConstant [fc]) yes no)
 27933  		// cond: !fc.Ugt()
 27934  		// result: (First no yes)
 27935  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27936  			v_0 := b.Controls[0]
 27937  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 27938  			if !(!fc.Ugt()) {
 27939  				break
 27940  			}
 27941  			b.Reset(block.BlockFirst)
 27942  			b.SwapSuccessors()
 27943  			return true
 27944  		}
 27945  		// match: (UGT (InvertFlags cmp) yes no)
 27946  		// result: (ULT cmp yes no)
 27947  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 27948  			v_0 := b.Controls[0]
 27949  			cmp := v_0.Args[0]
 27950  			b.ResetWithControl(block.BlockARM64ULT, cmp)
 27951  			return true
 27952  		}
 27953  	case block.BlockARM64ULE:
 27954  		// match: (ULE (CMPconst [0] x))
 27955  		// result: (EQ (CMPconst [0] x))
 27956  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 27957  			v_0 := b.Controls[0]
 27958  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27959  				break
 27960  			}
 27961  			x := v_0.Args[0]
 27962  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 27963  			v0.AuxInt = ssa.Int64ToAuxInt(0)
 27964  			v0.AddArg(x)
 27965  			b.ResetWithControl(block.BlockARM64EQ, v0)
 27966  			return true
 27967  		}
 27968  		// match: (ULE (CMPWconst [0] x))
 27969  		// result: (EQ (CMPWconst [0] x))
 27970  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27971  			v_0 := b.Controls[0]
 27972  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27973  				break
 27974  			}
 27975  			x := v_0.Args[0]
 27976  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 27977  			v0.AuxInt = ssa.Int32ToAuxInt(0)
 27978  			v0.AddArg(x)
 27979  			b.ResetWithControl(block.BlockARM64EQ, v0)
 27980  			return true
 27981  		}
 27982  		// match: (ULE (FlagConstant [fc]) yes no)
 27983  		// cond: fc.Ule()
 27984  		// result: (First yes no)
 27985  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27986  			v_0 := b.Controls[0]
 27987  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 27988  			if !(fc.Ule()) {
 27989  				break
 27990  			}
 27991  			b.Reset(block.BlockFirst)
 27992  			return true
 27993  		}
 27994  		// match: (ULE (FlagConstant [fc]) yes no)
 27995  		// cond: !fc.Ule()
 27996  		// result: (First no yes)
 27997  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27998  			v_0 := b.Controls[0]
 27999  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28000  			if !(!fc.Ule()) {
 28001  				break
 28002  			}
 28003  			b.Reset(block.BlockFirst)
 28004  			b.SwapSuccessors()
 28005  			return true
 28006  		}
 28007  		// match: (ULE (InvertFlags cmp) yes no)
 28008  		// result: (UGE cmp yes no)
 28009  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 28010  			v_0 := b.Controls[0]
 28011  			cmp := v_0.Args[0]
 28012  			b.ResetWithControl(block.BlockARM64UGE, cmp)
 28013  			return true
 28014  		}
 28015  	case block.BlockARM64ULT:
 28016  		// match: (ULT (CMPWconst [128] x) yes no)
 28017  		// cond: ssa.ZeroUpper56Bits(x)
 28018  		// result: (TBZ [7] x yes no)
 28019  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 28020  			v_0 := b.Controls[0]
 28021  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 28022  				break
 28023  			}
 28024  			x := v_0.Args[0]
 28025  			if !(ssa.ZeroUpper56Bits(x)) {
 28026  				break
 28027  			}
 28028  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28029  			b.AuxInt = ssa.Int64ToAuxInt(7)
 28030  			return true
 28031  		}
 28032  		// match: (ULT (CMPconst [128] x) yes no)
 28033  		// cond: ssa.ZeroUpper56Bits(x)
 28034  		// result: (TBZ [7] x yes no)
 28035  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 28036  			v_0 := b.Controls[0]
 28037  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 28038  				break
 28039  			}
 28040  			x := v_0.Args[0]
 28041  			if !(ssa.ZeroUpper56Bits(x)) {
 28042  				break
 28043  			}
 28044  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28045  			b.AuxInt = ssa.Int64ToAuxInt(7)
 28046  			return true
 28047  		}
 28048  		// match: (ULT (FlagConstant [fc]) yes no)
 28049  		// cond: fc.Ult()
 28050  		// result: (First yes no)
 28051  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28052  			v_0 := b.Controls[0]
 28053  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28054  			if !(fc.Ult()) {
 28055  				break
 28056  			}
 28057  			b.Reset(block.BlockFirst)
 28058  			return true
 28059  		}
 28060  		// match: (ULT (FlagConstant [fc]) yes no)
 28061  		// cond: !fc.Ult()
 28062  		// result: (First no yes)
 28063  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28064  			v_0 := b.Controls[0]
 28065  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28066  			if !(!fc.Ult()) {
 28067  				break
 28068  			}
 28069  			b.Reset(block.BlockFirst)
 28070  			b.SwapSuccessors()
 28071  			return true
 28072  		}
 28073  		// match: (ULT (InvertFlags cmp) yes no)
 28074  		// result: (UGT cmp yes no)
 28075  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 28076  			v_0 := b.Controls[0]
 28077  			cmp := v_0.Args[0]
 28078  			b.ResetWithControl(block.BlockARM64UGT, cmp)
 28079  			return true
 28080  		}
 28081  	case block.BlockARM64Z:
 28082  		// match: (Z sub:(SUB x y))
 28083  		// cond: sub.Uses == 1
 28084  		// result: (EQ (CMP x y))
 28085  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 28086  			sub := b.Controls[0]
 28087  			y := sub.Args[1]
 28088  			x := sub.Args[0]
 28089  			if !(sub.Uses == 1) {
 28090  				break
 28091  			}
 28092  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28093  			v0.AddArg2(x, y)
 28094  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28095  			return true
 28096  		}
 28097  		// match: (Z sub:(SUBconst [c] y))
 28098  		// cond: sub.Uses == 1
 28099  		// result: (EQ (CMPconst [c] y))
 28100  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 28101  			sub := b.Controls[0]
 28102  			c := ssa.AuxIntToInt64(sub.AuxInt)
 28103  			y := sub.Args[0]
 28104  			if !(sub.Uses == 1) {
 28105  				break
 28106  			}
 28107  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 28108  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 28109  			v0.AddArg(y)
 28110  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28111  			return true
 28112  		}
 28113  		// match: (Z (ANDconst [c] x) yes no)
 28114  		// cond: ssa.OneBit(c)
 28115  		// result: (TBZ [int64(ssa.Ntz64(c))] x yes no)
 28116  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 28117  			v_0 := b.Controls[0]
 28118  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28119  			x := v_0.Args[0]
 28120  			if !(ssa.OneBit(c)) {
 28121  				break
 28122  			}
 28123  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28124  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 28125  			return true
 28126  		}
 28127  		// match: (Z s:(SRLconst [63] x) yes no)
 28128  		// cond: s.Uses == 1
 28129  		// result: (TBZ [63] x yes no)
 28130  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 28131  			s := b.Controls[0]
 28132  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 28133  				break
 28134  			}
 28135  			x := s.Args[0]
 28136  			if !(s.Uses == 1) {
 28137  				break
 28138  			}
 28139  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28140  			b.AuxInt = ssa.Int64ToAuxInt(63)
 28141  			return true
 28142  		}
 28143  		// match: (Z s:(SRAconst [63] x) yes no)
 28144  		// cond: s.Uses == 1
 28145  		// result: (TBZ [63] x yes no)
 28146  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 28147  			s := b.Controls[0]
 28148  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 28149  				break
 28150  			}
 28151  			x := s.Args[0]
 28152  			if !(s.Uses == 1) {
 28153  				break
 28154  			}
 28155  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28156  			b.AuxInt = ssa.Int64ToAuxInt(63)
 28157  			return true
 28158  		}
 28159  		// match: (Z (MOVDconst [0]) yes no)
 28160  		// result: (First yes no)
 28161  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 28162  			v_0 := b.Controls[0]
 28163  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 28164  				break
 28165  			}
 28166  			b.Reset(block.BlockFirst)
 28167  			return true
 28168  		}
 28169  		// match: (Z (MOVDconst [c]) yes no)
 28170  		// cond: c != 0
 28171  		// result: (First no yes)
 28172  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 28173  			v_0 := b.Controls[0]
 28174  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28175  			if !(c != 0) {
 28176  				break
 28177  			}
 28178  			b.Reset(block.BlockFirst)
 28179  			b.SwapSuccessors()
 28180  			return true
 28181  		}
 28182  	case block.BlockARM64ZW:
 28183  		// match: (ZW sub:(SUB x y))
 28184  		// cond: sub.Uses == 1
 28185  		// result: (EQ (CMPW x y))
 28186  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 28187  			sub := b.Controls[0]
 28188  			y := sub.Args[1]
 28189  			x := sub.Args[0]
 28190  			if !(sub.Uses == 1) {
 28191  				break
 28192  			}
 28193  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28194  			v0.AddArg2(x, y)
 28195  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28196  			return true
 28197  		}
 28198  		// match: (ZW sub:(SUBconst [c] y))
 28199  		// cond: sub.Uses == 1
 28200  		// result: (EQ (CMPWconst [int32(c)] y))
 28201  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 28202  			sub := b.Controls[0]
 28203  			c := ssa.AuxIntToInt64(sub.AuxInt)
 28204  			y := sub.Args[0]
 28205  			if !(sub.Uses == 1) {
 28206  				break
 28207  			}
 28208  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 28209  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 28210  			v0.AddArg(y)
 28211  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28212  			return true
 28213  		}
 28214  		// match: (ZW (ANDconst [c] x) yes no)
 28215  		// cond: ssa.OneBit(int64(uint32(c)))
 28216  		// result: (TBZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 28217  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 28218  			v_0 := b.Controls[0]
 28219  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28220  			x := v_0.Args[0]
 28221  			if !(ssa.OneBit(int64(uint32(c)))) {
 28222  				break
 28223  			}
 28224  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28225  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 28226  			return true
 28227  		}
 28228  		// match: (ZW (MOVDconst [c]) yes no)
 28229  		// cond: int32(c) == 0
 28230  		// result: (First yes no)
 28231  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 28232  			v_0 := b.Controls[0]
 28233  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28234  			if !(int32(c) == 0) {
 28235  				break
 28236  			}
 28237  			b.Reset(block.BlockFirst)
 28238  			return true
 28239  		}
 28240  		// match: (ZW (MOVDconst [c]) yes no)
 28241  		// cond: int32(c) != 0
 28242  		// result: (First no yes)
 28243  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 28244  			v_0 := b.Controls[0]
 28245  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28246  			if !(int32(c) != 0) {
 28247  				break
 28248  			}
 28249  			b.Reset(block.BlockFirst)
 28250  			b.SwapSuccessors()
 28251  			return true
 28252  		}
 28253  	}
 28254  	return false
 28255  }
 28256  

View as plain text