Source file src/cmd/compile/internal/ssarewrite/rewritemips64/rewriteMIPS64.go

     1  // Code generated from _gen/MIPS64.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package rewritemips64
     4  
     5  import "cmd/compile/internal/types"
     6  import "cmd/compile/internal/ssa/block"
     7  import "cmd/compile/internal/ssa/ssaop"
     8  import "cmd/compile/internal/ssa"
     9  
    10  func RewriteValue(v *ssa.Value) bool {
    11  	switch v.Op {
    12  	case ssaop.OpAbs:
    13  		v.Op = ssaop.OpMIPS64ABSD
    14  		return true
    15  	case ssaop.OpAdd16:
    16  		v.Op = ssaop.OpMIPS64ADDV
    17  		return true
    18  	case ssaop.OpAdd32:
    19  		v.Op = ssaop.OpMIPS64ADDV
    20  		return true
    21  	case ssaop.OpAdd32F:
    22  		v.Op = ssaop.OpMIPS64ADDF
    23  		return true
    24  	case ssaop.OpAdd64:
    25  		v.Op = ssaop.OpMIPS64ADDV
    26  		return true
    27  	case ssaop.OpAdd64F:
    28  		v.Op = ssaop.OpMIPS64ADDD
    29  		return true
    30  	case ssaop.OpAdd8:
    31  		v.Op = ssaop.OpMIPS64ADDV
    32  		return true
    33  	case ssaop.OpAddPtr:
    34  		v.Op = ssaop.OpMIPS64ADDV
    35  		return true
    36  	case ssaop.OpAddr:
    37  		return rewriteValue_OpAddr(v)
    38  	case ssaop.OpAnd16:
    39  		v.Op = ssaop.OpMIPS64AND
    40  		return true
    41  	case ssaop.OpAnd32:
    42  		v.Op = ssaop.OpMIPS64AND
    43  		return true
    44  	case ssaop.OpAnd64:
    45  		v.Op = ssaop.OpMIPS64AND
    46  		return true
    47  	case ssaop.OpAnd8:
    48  		v.Op = ssaop.OpMIPS64AND
    49  		return true
    50  	case ssaop.OpAndB:
    51  		v.Op = ssaop.OpMIPS64AND
    52  		return true
    53  	case ssaop.OpAtomicAdd32:
    54  		v.Op = ssaop.OpMIPS64LoweredAtomicAdd32
    55  		return true
    56  	case ssaop.OpAtomicAdd64:
    57  		v.Op = ssaop.OpMIPS64LoweredAtomicAdd64
    58  		return true
    59  	case ssaop.OpAtomicAnd32:
    60  		v.Op = ssaop.OpMIPS64LoweredAtomicAnd32
    61  		return true
    62  	case ssaop.OpAtomicAnd8:
    63  		return rewriteValue_OpAtomicAnd8(v)
    64  	case ssaop.OpAtomicCompareAndSwap32:
    65  		return rewriteValue_OpAtomicCompareAndSwap32(v)
    66  	case ssaop.OpAtomicCompareAndSwap64:
    67  		v.Op = ssaop.OpMIPS64LoweredAtomicCas64
    68  		return true
    69  	case ssaop.OpAtomicExchange32:
    70  		v.Op = ssaop.OpMIPS64LoweredAtomicExchange32
    71  		return true
    72  	case ssaop.OpAtomicExchange64:
    73  		v.Op = ssaop.OpMIPS64LoweredAtomicExchange64
    74  		return true
    75  	case ssaop.OpAtomicLoad32:
    76  		v.Op = ssaop.OpMIPS64LoweredAtomicLoad32
    77  		return true
    78  	case ssaop.OpAtomicLoad64:
    79  		v.Op = ssaop.OpMIPS64LoweredAtomicLoad64
    80  		return true
    81  	case ssaop.OpAtomicLoad8:
    82  		v.Op = ssaop.OpMIPS64LoweredAtomicLoad8
    83  		return true
    84  	case ssaop.OpAtomicLoadPtr:
    85  		v.Op = ssaop.OpMIPS64LoweredAtomicLoad64
    86  		return true
    87  	case ssaop.OpAtomicOr32:
    88  		v.Op = ssaop.OpMIPS64LoweredAtomicOr32
    89  		return true
    90  	case ssaop.OpAtomicOr8:
    91  		return rewriteValue_OpAtomicOr8(v)
    92  	case ssaop.OpAtomicStore32:
    93  		v.Op = ssaop.OpMIPS64LoweredAtomicStore32
    94  		return true
    95  	case ssaop.OpAtomicStore64:
    96  		v.Op = ssaop.OpMIPS64LoweredAtomicStore64
    97  		return true
    98  	case ssaop.OpAtomicStore8:
    99  		v.Op = ssaop.OpMIPS64LoweredAtomicStore8
   100  		return true
   101  	case ssaop.OpAtomicStorePtrNoWB:
   102  		v.Op = ssaop.OpMIPS64LoweredAtomicStore64
   103  		return true
   104  	case ssaop.OpAvg64u:
   105  		return rewriteValue_OpAvg64u(v)
   106  	case ssaop.OpClosureCall:
   107  		v.Op = ssaop.OpMIPS64CALLclosure
   108  		return true
   109  	case ssaop.OpCom16:
   110  		return rewriteValue_OpCom16(v)
   111  	case ssaop.OpCom32:
   112  		return rewriteValue_OpCom32(v)
   113  	case ssaop.OpCom64:
   114  		return rewriteValue_OpCom64(v)
   115  	case ssaop.OpCom8:
   116  		return rewriteValue_OpCom8(v)
   117  	case ssaop.OpConst16:
   118  		return rewriteValue_OpConst16(v)
   119  	case ssaop.OpConst32:
   120  		return rewriteValue_OpConst32(v)
   121  	case ssaop.OpConst32F:
   122  		return rewriteValue_OpConst32F(v)
   123  	case ssaop.OpConst64:
   124  		return rewriteValue_OpConst64(v)
   125  	case ssaop.OpConst64F:
   126  		return rewriteValue_OpConst64F(v)
   127  	case ssaop.OpConst8:
   128  		return rewriteValue_OpConst8(v)
   129  	case ssaop.OpConstBool:
   130  		return rewriteValue_OpConstBool(v)
   131  	case ssaop.OpConstNil:
   132  		return rewriteValue_OpConstNil(v)
   133  	case ssaop.OpCvt32Fto32:
   134  		v.Op = ssaop.OpMIPS64TRUNCFW
   135  		return true
   136  	case ssaop.OpCvt32Fto64:
   137  		v.Op = ssaop.OpMIPS64TRUNCFV
   138  		return true
   139  	case ssaop.OpCvt32Fto64F:
   140  		v.Op = ssaop.OpMIPS64MOVFD
   141  		return true
   142  	case ssaop.OpCvt32to32F:
   143  		v.Op = ssaop.OpMIPS64MOVWF
   144  		return true
   145  	case ssaop.OpCvt32to64F:
   146  		v.Op = ssaop.OpMIPS64MOVWD
   147  		return true
   148  	case ssaop.OpCvt64Fto32:
   149  		v.Op = ssaop.OpMIPS64TRUNCDW
   150  		return true
   151  	case ssaop.OpCvt64Fto32F:
   152  		v.Op = ssaop.OpMIPS64MOVDF
   153  		return true
   154  	case ssaop.OpCvt64Fto64:
   155  		v.Op = ssaop.OpMIPS64TRUNCDV
   156  		return true
   157  	case ssaop.OpCvt64to32F:
   158  		v.Op = ssaop.OpMIPS64MOVVF
   159  		return true
   160  	case ssaop.OpCvt64to64F:
   161  		v.Op = ssaop.OpMIPS64MOVVD
   162  		return true
   163  	case ssaop.OpCvtBoolToUint8:
   164  		v.Op = ssaop.OpCopy
   165  		return true
   166  	case ssaop.OpDiv16:
   167  		return rewriteValue_OpDiv16(v)
   168  	case ssaop.OpDiv16u:
   169  		return rewriteValue_OpDiv16u(v)
   170  	case ssaop.OpDiv32:
   171  		return rewriteValue_OpDiv32(v)
   172  	case ssaop.OpDiv32F:
   173  		v.Op = ssaop.OpMIPS64DIVF
   174  		return true
   175  	case ssaop.OpDiv32u:
   176  		return rewriteValue_OpDiv32u(v)
   177  	case ssaop.OpDiv64:
   178  		return rewriteValue_OpDiv64(v)
   179  	case ssaop.OpDiv64F:
   180  		v.Op = ssaop.OpMIPS64DIVD
   181  		return true
   182  	case ssaop.OpDiv64u:
   183  		return rewriteValue_OpDiv64u(v)
   184  	case ssaop.OpDiv8:
   185  		return rewriteValue_OpDiv8(v)
   186  	case ssaop.OpDiv8u:
   187  		return rewriteValue_OpDiv8u(v)
   188  	case ssaop.OpEq16:
   189  		return rewriteValue_OpEq16(v)
   190  	case ssaop.OpEq32:
   191  		return rewriteValue_OpEq32(v)
   192  	case ssaop.OpEq32F:
   193  		return rewriteValue_OpEq32F(v)
   194  	case ssaop.OpEq64:
   195  		return rewriteValue_OpEq64(v)
   196  	case ssaop.OpEq64F:
   197  		return rewriteValue_OpEq64F(v)
   198  	case ssaop.OpEq8:
   199  		return rewriteValue_OpEq8(v)
   200  	case ssaop.OpEqB:
   201  		return rewriteValue_OpEqB(v)
   202  	case ssaop.OpEqPtr:
   203  		return rewriteValue_OpEqPtr(v)
   204  	case ssaop.OpGetCallerPC:
   205  		v.Op = ssaop.OpMIPS64LoweredGetCallerPC
   206  		return true
   207  	case ssaop.OpGetCallerSP:
   208  		v.Op = ssaop.OpMIPS64LoweredGetCallerSP
   209  		return true
   210  	case ssaop.OpGetClosurePtr:
   211  		v.Op = ssaop.OpMIPS64LoweredGetClosurePtr
   212  		return true
   213  	case ssaop.OpHmul32:
   214  		return rewriteValue_OpHmul32(v)
   215  	case ssaop.OpHmul32u:
   216  		return rewriteValue_OpHmul32u(v)
   217  	case ssaop.OpHmul64:
   218  		return rewriteValue_OpHmul64(v)
   219  	case ssaop.OpHmul64u:
   220  		return rewriteValue_OpHmul64u(v)
   221  	case ssaop.OpInterCall:
   222  		v.Op = ssaop.OpMIPS64CALLinter
   223  		return true
   224  	case ssaop.OpIsInBounds:
   225  		return rewriteValue_OpIsInBounds(v)
   226  	case ssaop.OpIsNonNil:
   227  		return rewriteValue_OpIsNonNil(v)
   228  	case ssaop.OpIsSliceInBounds:
   229  		return rewriteValue_OpIsSliceInBounds(v)
   230  	case ssaop.OpLeq16:
   231  		return rewriteValue_OpLeq16(v)
   232  	case ssaop.OpLeq16U:
   233  		return rewriteValue_OpLeq16U(v)
   234  	case ssaop.OpLeq32:
   235  		return rewriteValue_OpLeq32(v)
   236  	case ssaop.OpLeq32F:
   237  		return rewriteValue_OpLeq32F(v)
   238  	case ssaop.OpLeq32U:
   239  		return rewriteValue_OpLeq32U(v)
   240  	case ssaop.OpLeq64:
   241  		return rewriteValue_OpLeq64(v)
   242  	case ssaop.OpLeq64F:
   243  		return rewriteValue_OpLeq64F(v)
   244  	case ssaop.OpLeq64U:
   245  		return rewriteValue_OpLeq64U(v)
   246  	case ssaop.OpLeq8:
   247  		return rewriteValue_OpLeq8(v)
   248  	case ssaop.OpLeq8U:
   249  		return rewriteValue_OpLeq8U(v)
   250  	case ssaop.OpLess16:
   251  		return rewriteValue_OpLess16(v)
   252  	case ssaop.OpLess16U:
   253  		return rewriteValue_OpLess16U(v)
   254  	case ssaop.OpLess32:
   255  		return rewriteValue_OpLess32(v)
   256  	case ssaop.OpLess32F:
   257  		return rewriteValue_OpLess32F(v)
   258  	case ssaop.OpLess32U:
   259  		return rewriteValue_OpLess32U(v)
   260  	case ssaop.OpLess64:
   261  		return rewriteValue_OpLess64(v)
   262  	case ssaop.OpLess64F:
   263  		return rewriteValue_OpLess64F(v)
   264  	case ssaop.OpLess64U:
   265  		return rewriteValue_OpLess64U(v)
   266  	case ssaop.OpLess8:
   267  		return rewriteValue_OpLess8(v)
   268  	case ssaop.OpLess8U:
   269  		return rewriteValue_OpLess8U(v)
   270  	case ssaop.OpLoad:
   271  		return rewriteValue_OpLoad(v)
   272  	case ssaop.OpLocalAddr:
   273  		return rewriteValue_OpLocalAddr(v)
   274  	case ssaop.OpLsh16x16:
   275  		return rewriteValue_OpLsh16x16(v)
   276  	case ssaop.OpLsh16x32:
   277  		return rewriteValue_OpLsh16x32(v)
   278  	case ssaop.OpLsh16x64:
   279  		return rewriteValue_OpLsh16x64(v)
   280  	case ssaop.OpLsh16x8:
   281  		return rewriteValue_OpLsh16x8(v)
   282  	case ssaop.OpLsh32x16:
   283  		return rewriteValue_OpLsh32x16(v)
   284  	case ssaop.OpLsh32x32:
   285  		return rewriteValue_OpLsh32x32(v)
   286  	case ssaop.OpLsh32x64:
   287  		return rewriteValue_OpLsh32x64(v)
   288  	case ssaop.OpLsh32x8:
   289  		return rewriteValue_OpLsh32x8(v)
   290  	case ssaop.OpLsh64x16:
   291  		return rewriteValue_OpLsh64x16(v)
   292  	case ssaop.OpLsh64x32:
   293  		return rewriteValue_OpLsh64x32(v)
   294  	case ssaop.OpLsh64x64:
   295  		return rewriteValue_OpLsh64x64(v)
   296  	case ssaop.OpLsh64x8:
   297  		return rewriteValue_OpLsh64x8(v)
   298  	case ssaop.OpLsh8x16:
   299  		return rewriteValue_OpLsh8x16(v)
   300  	case ssaop.OpLsh8x32:
   301  		return rewriteValue_OpLsh8x32(v)
   302  	case ssaop.OpLsh8x64:
   303  		return rewriteValue_OpLsh8x64(v)
   304  	case ssaop.OpLsh8x8:
   305  		return rewriteValue_OpLsh8x8(v)
   306  	case ssaop.OpMIPS64ADDV:
   307  		return rewriteValue_OpMIPS64ADDV(v)
   308  	case ssaop.OpMIPS64ADDVconst:
   309  		return rewriteValue_OpMIPS64ADDVconst(v)
   310  	case ssaop.OpMIPS64AND:
   311  		return rewriteValue_OpMIPS64AND(v)
   312  	case ssaop.OpMIPS64ANDconst:
   313  		return rewriteValue_OpMIPS64ANDconst(v)
   314  	case ssaop.OpMIPS64LoweredAtomicAdd32:
   315  		return rewriteValue_OpMIPS64LoweredAtomicAdd32(v)
   316  	case ssaop.OpMIPS64LoweredAtomicAdd64:
   317  		return rewriteValue_OpMIPS64LoweredAtomicAdd64(v)
   318  	case ssaop.OpMIPS64LoweredAtomicStore32:
   319  		return rewriteValue_OpMIPS64LoweredAtomicStore32(v)
   320  	case ssaop.OpMIPS64LoweredAtomicStore64:
   321  		return rewriteValue_OpMIPS64LoweredAtomicStore64(v)
   322  	case ssaop.OpMIPS64LoweredPanicBoundsCR:
   323  		return rewriteValue_OpMIPS64LoweredPanicBoundsCR(v)
   324  	case ssaop.OpMIPS64LoweredPanicBoundsRC:
   325  		return rewriteValue_OpMIPS64LoweredPanicBoundsRC(v)
   326  	case ssaop.OpMIPS64LoweredPanicBoundsRR:
   327  		return rewriteValue_OpMIPS64LoweredPanicBoundsRR(v)
   328  	case ssaop.OpMIPS64MOVBUload:
   329  		return rewriteValue_OpMIPS64MOVBUload(v)
   330  	case ssaop.OpMIPS64MOVBUreg:
   331  		return rewriteValue_OpMIPS64MOVBUreg(v)
   332  	case ssaop.OpMIPS64MOVBload:
   333  		return rewriteValue_OpMIPS64MOVBload(v)
   334  	case ssaop.OpMIPS64MOVBreg:
   335  		return rewriteValue_OpMIPS64MOVBreg(v)
   336  	case ssaop.OpMIPS64MOVBstore:
   337  		return rewriteValue_OpMIPS64MOVBstore(v)
   338  	case ssaop.OpMIPS64MOVDF:
   339  		return rewriteValue_OpMIPS64MOVDF(v)
   340  	case ssaop.OpMIPS64MOVDload:
   341  		return rewriteValue_OpMIPS64MOVDload(v)
   342  	case ssaop.OpMIPS64MOVDstore:
   343  		return rewriteValue_OpMIPS64MOVDstore(v)
   344  	case ssaop.OpMIPS64MOVFload:
   345  		return rewriteValue_OpMIPS64MOVFload(v)
   346  	case ssaop.OpMIPS64MOVFstore:
   347  		return rewriteValue_OpMIPS64MOVFstore(v)
   348  	case ssaop.OpMIPS64MOVHUload:
   349  		return rewriteValue_OpMIPS64MOVHUload(v)
   350  	case ssaop.OpMIPS64MOVHUreg:
   351  		return rewriteValue_OpMIPS64MOVHUreg(v)
   352  	case ssaop.OpMIPS64MOVHload:
   353  		return rewriteValue_OpMIPS64MOVHload(v)
   354  	case ssaop.OpMIPS64MOVHreg:
   355  		return rewriteValue_OpMIPS64MOVHreg(v)
   356  	case ssaop.OpMIPS64MOVHstore:
   357  		return rewriteValue_OpMIPS64MOVHstore(v)
   358  	case ssaop.OpMIPS64MOVVload:
   359  		return rewriteValue_OpMIPS64MOVVload(v)
   360  	case ssaop.OpMIPS64MOVVnop:
   361  		return rewriteValue_OpMIPS64MOVVnop(v)
   362  	case ssaop.OpMIPS64MOVVreg:
   363  		return rewriteValue_OpMIPS64MOVVreg(v)
   364  	case ssaop.OpMIPS64MOVVstore:
   365  		return rewriteValue_OpMIPS64MOVVstore(v)
   366  	case ssaop.OpMIPS64MOVWUload:
   367  		return rewriteValue_OpMIPS64MOVWUload(v)
   368  	case ssaop.OpMIPS64MOVWUreg:
   369  		return rewriteValue_OpMIPS64MOVWUreg(v)
   370  	case ssaop.OpMIPS64MOVWload:
   371  		return rewriteValue_OpMIPS64MOVWload(v)
   372  	case ssaop.OpMIPS64MOVWreg:
   373  		return rewriteValue_OpMIPS64MOVWreg(v)
   374  	case ssaop.OpMIPS64MOVWstore:
   375  		return rewriteValue_OpMIPS64MOVWstore(v)
   376  	case ssaop.OpMIPS64NEGV:
   377  		return rewriteValue_OpMIPS64NEGV(v)
   378  	case ssaop.OpMIPS64OR:
   379  		return rewriteValue_OpMIPS64OR(v)
   380  	case ssaop.OpMIPS64ORconst:
   381  		return rewriteValue_OpMIPS64ORconst(v)
   382  	case ssaop.OpMIPS64SGT:
   383  		return rewriteValue_OpMIPS64SGT(v)
   384  	case ssaop.OpMIPS64SGTU:
   385  		return rewriteValue_OpMIPS64SGTU(v)
   386  	case ssaop.OpMIPS64SGTUconst:
   387  		return rewriteValue_OpMIPS64SGTUconst(v)
   388  	case ssaop.OpMIPS64SGTconst:
   389  		return rewriteValue_OpMIPS64SGTconst(v)
   390  	case ssaop.OpMIPS64SLLV:
   391  		return rewriteValue_OpMIPS64SLLV(v)
   392  	case ssaop.OpMIPS64SLLVconst:
   393  		return rewriteValue_OpMIPS64SLLVconst(v)
   394  	case ssaop.OpMIPS64SRAV:
   395  		return rewriteValue_OpMIPS64SRAV(v)
   396  	case ssaop.OpMIPS64SRAVconst:
   397  		return rewriteValue_OpMIPS64SRAVconst(v)
   398  	case ssaop.OpMIPS64SRLV:
   399  		return rewriteValue_OpMIPS64SRLV(v)
   400  	case ssaop.OpMIPS64SRLVconst:
   401  		return rewriteValue_OpMIPS64SRLVconst(v)
   402  	case ssaop.OpMIPS64SUBV:
   403  		return rewriteValue_OpMIPS64SUBV(v)
   404  	case ssaop.OpMIPS64SUBVconst:
   405  		return rewriteValue_OpMIPS64SUBVconst(v)
   406  	case ssaop.OpMIPS64XOR:
   407  		return rewriteValue_OpMIPS64XOR(v)
   408  	case ssaop.OpMIPS64XORconst:
   409  		return rewriteValue_OpMIPS64XORconst(v)
   410  	case ssaop.OpMod16:
   411  		return rewriteValue_OpMod16(v)
   412  	case ssaop.OpMod16u:
   413  		return rewriteValue_OpMod16u(v)
   414  	case ssaop.OpMod32:
   415  		return rewriteValue_OpMod32(v)
   416  	case ssaop.OpMod32u:
   417  		return rewriteValue_OpMod32u(v)
   418  	case ssaop.OpMod64:
   419  		return rewriteValue_OpMod64(v)
   420  	case ssaop.OpMod64u:
   421  		return rewriteValue_OpMod64u(v)
   422  	case ssaop.OpMod8:
   423  		return rewriteValue_OpMod8(v)
   424  	case ssaop.OpMod8u:
   425  		return rewriteValue_OpMod8u(v)
   426  	case ssaop.OpMove:
   427  		return rewriteValue_OpMove(v)
   428  	case ssaop.OpMul16:
   429  		return rewriteValue_OpMul16(v)
   430  	case ssaop.OpMul32:
   431  		return rewriteValue_OpMul32(v)
   432  	case ssaop.OpMul32F:
   433  		v.Op = ssaop.OpMIPS64MULF
   434  		return true
   435  	case ssaop.OpMul64:
   436  		return rewriteValue_OpMul64(v)
   437  	case ssaop.OpMul64F:
   438  		v.Op = ssaop.OpMIPS64MULD
   439  		return true
   440  	case ssaop.OpMul64uhilo:
   441  		v.Op = ssaop.OpMIPS64MULVU
   442  		return true
   443  	case ssaop.OpMul8:
   444  		return rewriteValue_OpMul8(v)
   445  	case ssaop.OpNeg16:
   446  		v.Op = ssaop.OpMIPS64NEGV
   447  		return true
   448  	case ssaop.OpNeg32:
   449  		v.Op = ssaop.OpMIPS64NEGV
   450  		return true
   451  	case ssaop.OpNeg32F:
   452  		v.Op = ssaop.OpMIPS64NEGF
   453  		return true
   454  	case ssaop.OpNeg64:
   455  		v.Op = ssaop.OpMIPS64NEGV
   456  		return true
   457  	case ssaop.OpNeg64F:
   458  		v.Op = ssaop.OpMIPS64NEGD
   459  		return true
   460  	case ssaop.OpNeg8:
   461  		v.Op = ssaop.OpMIPS64NEGV
   462  		return true
   463  	case ssaop.OpNeq16:
   464  		return rewriteValue_OpNeq16(v)
   465  	case ssaop.OpNeq32:
   466  		return rewriteValue_OpNeq32(v)
   467  	case ssaop.OpNeq32F:
   468  		return rewriteValue_OpNeq32F(v)
   469  	case ssaop.OpNeq64:
   470  		return rewriteValue_OpNeq64(v)
   471  	case ssaop.OpNeq64F:
   472  		return rewriteValue_OpNeq64F(v)
   473  	case ssaop.OpNeq8:
   474  		return rewriteValue_OpNeq8(v)
   475  	case ssaop.OpNeqB:
   476  		v.Op = ssaop.OpMIPS64XOR
   477  		return true
   478  	case ssaop.OpNeqPtr:
   479  		return rewriteValue_OpNeqPtr(v)
   480  	case ssaop.OpNilCheck:
   481  		v.Op = ssaop.OpMIPS64LoweredNilCheck
   482  		return true
   483  	case ssaop.OpNot:
   484  		return rewriteValue_OpNot(v)
   485  	case ssaop.OpOffPtr:
   486  		return rewriteValue_OpOffPtr(v)
   487  	case ssaop.OpOr16:
   488  		v.Op = ssaop.OpMIPS64OR
   489  		return true
   490  	case ssaop.OpOr32:
   491  		v.Op = ssaop.OpMIPS64OR
   492  		return true
   493  	case ssaop.OpOr64:
   494  		v.Op = ssaop.OpMIPS64OR
   495  		return true
   496  	case ssaop.OpOr8:
   497  		v.Op = ssaop.OpMIPS64OR
   498  		return true
   499  	case ssaop.OpOrB:
   500  		v.Op = ssaop.OpMIPS64OR
   501  		return true
   502  	case ssaop.OpPanicBounds:
   503  		v.Op = ssaop.OpMIPS64LoweredPanicBoundsRR
   504  		return true
   505  	case ssaop.OpPubBarrier:
   506  		v.Op = ssaop.OpMIPS64LoweredPubBarrier
   507  		return true
   508  	case ssaop.OpRotateLeft16:
   509  		return rewriteValue_OpRotateLeft16(v)
   510  	case ssaop.OpRotateLeft32:
   511  		return rewriteValue_OpRotateLeft32(v)
   512  	case ssaop.OpRotateLeft64:
   513  		return rewriteValue_OpRotateLeft64(v)
   514  	case ssaop.OpRotateLeft8:
   515  		return rewriteValue_OpRotateLeft8(v)
   516  	case ssaop.OpRound32F:
   517  		v.Op = ssaop.OpCopy
   518  		return true
   519  	case ssaop.OpRound64F:
   520  		v.Op = ssaop.OpCopy
   521  		return true
   522  	case ssaop.OpRsh16Ux16:
   523  		return rewriteValue_OpRsh16Ux16(v)
   524  	case ssaop.OpRsh16Ux32:
   525  		return rewriteValue_OpRsh16Ux32(v)
   526  	case ssaop.OpRsh16Ux64:
   527  		return rewriteValue_OpRsh16Ux64(v)
   528  	case ssaop.OpRsh16Ux8:
   529  		return rewriteValue_OpRsh16Ux8(v)
   530  	case ssaop.OpRsh16x16:
   531  		return rewriteValue_OpRsh16x16(v)
   532  	case ssaop.OpRsh16x32:
   533  		return rewriteValue_OpRsh16x32(v)
   534  	case ssaop.OpRsh16x64:
   535  		return rewriteValue_OpRsh16x64(v)
   536  	case ssaop.OpRsh16x8:
   537  		return rewriteValue_OpRsh16x8(v)
   538  	case ssaop.OpRsh32Ux16:
   539  		return rewriteValue_OpRsh32Ux16(v)
   540  	case ssaop.OpRsh32Ux32:
   541  		return rewriteValue_OpRsh32Ux32(v)
   542  	case ssaop.OpRsh32Ux64:
   543  		return rewriteValue_OpRsh32Ux64(v)
   544  	case ssaop.OpRsh32Ux8:
   545  		return rewriteValue_OpRsh32Ux8(v)
   546  	case ssaop.OpRsh32x16:
   547  		return rewriteValue_OpRsh32x16(v)
   548  	case ssaop.OpRsh32x32:
   549  		return rewriteValue_OpRsh32x32(v)
   550  	case ssaop.OpRsh32x64:
   551  		return rewriteValue_OpRsh32x64(v)
   552  	case ssaop.OpRsh32x8:
   553  		return rewriteValue_OpRsh32x8(v)
   554  	case ssaop.OpRsh64Ux16:
   555  		return rewriteValue_OpRsh64Ux16(v)
   556  	case ssaop.OpRsh64Ux32:
   557  		return rewriteValue_OpRsh64Ux32(v)
   558  	case ssaop.OpRsh64Ux64:
   559  		return rewriteValue_OpRsh64Ux64(v)
   560  	case ssaop.OpRsh64Ux8:
   561  		return rewriteValue_OpRsh64Ux8(v)
   562  	case ssaop.OpRsh64x16:
   563  		return rewriteValue_OpRsh64x16(v)
   564  	case ssaop.OpRsh64x32:
   565  		return rewriteValue_OpRsh64x32(v)
   566  	case ssaop.OpRsh64x64:
   567  		return rewriteValue_OpRsh64x64(v)
   568  	case ssaop.OpRsh64x8:
   569  		return rewriteValue_OpRsh64x8(v)
   570  	case ssaop.OpRsh8Ux16:
   571  		return rewriteValue_OpRsh8Ux16(v)
   572  	case ssaop.OpRsh8Ux32:
   573  		return rewriteValue_OpRsh8Ux32(v)
   574  	case ssaop.OpRsh8Ux64:
   575  		return rewriteValue_OpRsh8Ux64(v)
   576  	case ssaop.OpRsh8Ux8:
   577  		return rewriteValue_OpRsh8Ux8(v)
   578  	case ssaop.OpRsh8x16:
   579  		return rewriteValue_OpRsh8x16(v)
   580  	case ssaop.OpRsh8x32:
   581  		return rewriteValue_OpRsh8x32(v)
   582  	case ssaop.OpRsh8x64:
   583  		return rewriteValue_OpRsh8x64(v)
   584  	case ssaop.OpRsh8x8:
   585  		return rewriteValue_OpRsh8x8(v)
   586  	case ssaop.OpSelect0:
   587  		return rewriteValue_OpSelect0(v)
   588  	case ssaop.OpSelect1:
   589  		return rewriteValue_OpSelect1(v)
   590  	case ssaop.OpSignExt16to32:
   591  		v.Op = ssaop.OpMIPS64MOVHreg
   592  		return true
   593  	case ssaop.OpSignExt16to64:
   594  		v.Op = ssaop.OpMIPS64MOVHreg
   595  		return true
   596  	case ssaop.OpSignExt32to64:
   597  		v.Op = ssaop.OpMIPS64MOVWreg
   598  		return true
   599  	case ssaop.OpSignExt8to16:
   600  		v.Op = ssaop.OpMIPS64MOVBreg
   601  		return true
   602  	case ssaop.OpSignExt8to32:
   603  		v.Op = ssaop.OpMIPS64MOVBreg
   604  		return true
   605  	case ssaop.OpSignExt8to64:
   606  		v.Op = ssaop.OpMIPS64MOVBreg
   607  		return true
   608  	case ssaop.OpSlicemask:
   609  		return rewriteValue_OpSlicemask(v)
   610  	case ssaop.OpSqrt:
   611  		v.Op = ssaop.OpMIPS64SQRTD
   612  		return true
   613  	case ssaop.OpSqrt32:
   614  		v.Op = ssaop.OpMIPS64SQRTF
   615  		return true
   616  	case ssaop.OpStaticCall:
   617  		v.Op = ssaop.OpMIPS64CALLstatic
   618  		return true
   619  	case ssaop.OpStore:
   620  		return rewriteValue_OpStore(v)
   621  	case ssaop.OpSub16:
   622  		v.Op = ssaop.OpMIPS64SUBV
   623  		return true
   624  	case ssaop.OpSub32:
   625  		v.Op = ssaop.OpMIPS64SUBV
   626  		return true
   627  	case ssaop.OpSub32F:
   628  		v.Op = ssaop.OpMIPS64SUBF
   629  		return true
   630  	case ssaop.OpSub64:
   631  		v.Op = ssaop.OpMIPS64SUBV
   632  		return true
   633  	case ssaop.OpSub64F:
   634  		v.Op = ssaop.OpMIPS64SUBD
   635  		return true
   636  	case ssaop.OpSub8:
   637  		v.Op = ssaop.OpMIPS64SUBV
   638  		return true
   639  	case ssaop.OpSubPtr:
   640  		v.Op = ssaop.OpMIPS64SUBV
   641  		return true
   642  	case ssaop.OpTailCall:
   643  		v.Op = ssaop.OpMIPS64CALLtail
   644  		return true
   645  	case ssaop.OpTailCallInter:
   646  		v.Op = ssaop.OpMIPS64CALLtailinter
   647  		return true
   648  	case ssaop.OpTrunc16to8:
   649  		v.Op = ssaop.OpCopy
   650  		return true
   651  	case ssaop.OpTrunc32to16:
   652  		v.Op = ssaop.OpCopy
   653  		return true
   654  	case ssaop.OpTrunc32to8:
   655  		v.Op = ssaop.OpCopy
   656  		return true
   657  	case ssaop.OpTrunc64to16:
   658  		v.Op = ssaop.OpCopy
   659  		return true
   660  	case ssaop.OpTrunc64to32:
   661  		v.Op = ssaop.OpCopy
   662  		return true
   663  	case ssaop.OpTrunc64to8:
   664  		v.Op = ssaop.OpCopy
   665  		return true
   666  	case ssaop.OpWB:
   667  		v.Op = ssaop.OpMIPS64LoweredWB
   668  		return true
   669  	case ssaop.OpXor16:
   670  		v.Op = ssaop.OpMIPS64XOR
   671  		return true
   672  	case ssaop.OpXor32:
   673  		v.Op = ssaop.OpMIPS64XOR
   674  		return true
   675  	case ssaop.OpXor64:
   676  		v.Op = ssaop.OpMIPS64XOR
   677  		return true
   678  	case ssaop.OpXor8:
   679  		v.Op = ssaop.OpMIPS64XOR
   680  		return true
   681  	case ssaop.OpZero:
   682  		return rewriteValue_OpZero(v)
   683  	case ssaop.OpZeroExt16to32:
   684  		v.Op = ssaop.OpMIPS64MOVHUreg
   685  		return true
   686  	case ssaop.OpZeroExt16to64:
   687  		v.Op = ssaop.OpMIPS64MOVHUreg
   688  		return true
   689  	case ssaop.OpZeroExt32to64:
   690  		v.Op = ssaop.OpMIPS64MOVWUreg
   691  		return true
   692  	case ssaop.OpZeroExt8to16:
   693  		v.Op = ssaop.OpMIPS64MOVBUreg
   694  		return true
   695  	case ssaop.OpZeroExt8to32:
   696  		v.Op = ssaop.OpMIPS64MOVBUreg
   697  		return true
   698  	case ssaop.OpZeroExt8to64:
   699  		v.Op = ssaop.OpMIPS64MOVBUreg
   700  		return true
   701  	}
   702  	return false
   703  }
   704  func rewriteValue_OpAddr(v *ssa.Value) bool {
   705  	v_0 := v.Args[0]
   706  	// match: (Addr {sym} base)
   707  	// result: (MOVVaddr {sym} base)
   708  	for {
   709  		sym := ssa.AuxToSym(v.Aux)
   710  		base := v_0
   711  		v.Reset(ssaop.OpMIPS64MOVVaddr)
   712  		v.Aux = ssa.SymToAux(sym)
   713  		v.AddArg(base)
   714  		return true
   715  	}
   716  }
   717  func rewriteValue_OpAtomicAnd8(v *ssa.Value) bool {
   718  	v_2 := v.Args[2]
   719  	v_1 := v.Args[1]
   720  	v_0 := v.Args[0]
   721  	b := v.Block
   722  	config := b.Func.Config
   723  	typ := &b.Func.Config.Types
   724  	// match: (AtomicAnd8 ptr val mem)
   725  	// cond: !config.BigEndian
   726  	// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))) (NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))))) mem)
   727  	for {
   728  		ptr := v_0
   729  		val := v_1
   730  		mem := v_2
   731  		if !(!config.BigEndian) {
   732  			break
   733  		}
   734  		v.Reset(ssaop.OpMIPS64LoweredAtomicAnd32)
   735  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64AND, typ.UInt32Ptr)
   736  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   737  		v1.AuxInt = ssa.Int64ToAuxInt(^3)
   738  		v0.AddArg2(v1, ptr)
   739  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, typ.UInt64)
   740  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt32)
   741  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
   742  		v4.AddArg(val)
   743  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLVconst, typ.UInt64)
   744  		v5.AuxInt = ssa.Int64ToAuxInt(3)
   745  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64ANDconst, typ.UInt64)
   746  		v6.AuxInt = ssa.Int64ToAuxInt(3)
   747  		v6.AddArg(ptr)
   748  		v5.AddArg(v6)
   749  		v3.AddArg2(v4, v5)
   750  		v7 := b.NewValue0(v.Pos, ssaop.OpMIPS64NOR, typ.UInt64)
   751  		v8 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   752  		v8.AuxInt = ssa.Int64ToAuxInt(0)
   753  		v9 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt64)
   754  		v10 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   755  		v10.AuxInt = ssa.Int64ToAuxInt(0xff)
   756  		v9.AddArg2(v10, v5)
   757  		v7.AddArg2(v8, v9)
   758  		v2.AddArg2(v3, v7)
   759  		v.AddArg3(v0, v2, mem)
   760  		return true
   761  	}
   762  	// match: (AtomicAnd8 ptr val mem)
   763  	// cond: config.BigEndian
   764  	// result: (LoweredAtomicAnd32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (OR <typ.UInt64> (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))) (NOR (MOVVconst [0]) <typ.UInt64> (SLLV <typ.UInt64> (MOVVconst [0xff]) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))))) mem)
   765  	for {
   766  		ptr := v_0
   767  		val := v_1
   768  		mem := v_2
   769  		if !(config.BigEndian) {
   770  			break
   771  		}
   772  		v.Reset(ssaop.OpMIPS64LoweredAtomicAnd32)
   773  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64AND, typ.UInt32Ptr)
   774  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   775  		v1.AuxInt = ssa.Int64ToAuxInt(^3)
   776  		v0.AddArg2(v1, ptr)
   777  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, typ.UInt64)
   778  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt32)
   779  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
   780  		v4.AddArg(val)
   781  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLVconst, typ.UInt64)
   782  		v5.AuxInt = ssa.Int64ToAuxInt(3)
   783  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64ANDconst, typ.UInt64)
   784  		v6.AuxInt = ssa.Int64ToAuxInt(3)
   785  		v7 := b.NewValue0(v.Pos, ssaop.OpMIPS64XORconst, typ.UInt64)
   786  		v7.AuxInt = ssa.Int64ToAuxInt(3)
   787  		v7.AddArg(ptr)
   788  		v6.AddArg(v7)
   789  		v5.AddArg(v6)
   790  		v3.AddArg2(v4, v5)
   791  		v8 := b.NewValue0(v.Pos, ssaop.OpMIPS64NOR, typ.UInt64)
   792  		v9 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   793  		v9.AuxInt = ssa.Int64ToAuxInt(0)
   794  		v10 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt64)
   795  		v11 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   796  		v11.AuxInt = ssa.Int64ToAuxInt(0xff)
   797  		v10.AddArg2(v11, v5)
   798  		v8.AddArg2(v9, v10)
   799  		v2.AddArg2(v3, v8)
   800  		v.AddArg3(v0, v2, mem)
   801  		return true
   802  	}
   803  	return false
   804  }
   805  func rewriteValue_OpAtomicCompareAndSwap32(v *ssa.Value) bool {
   806  	v_3 := v.Args[3]
   807  	v_2 := v.Args[2]
   808  	v_1 := v.Args[1]
   809  	v_0 := v.Args[0]
   810  	b := v.Block
   811  	typ := &b.Func.Config.Types
   812  	// match: (AtomicCompareAndSwap32 ptr old new mem)
   813  	// result: (LoweredAtomicCas32 ptr (SignExt32to64 old) new mem)
   814  	for {
   815  		ptr := v_0
   816  		old := v_1
   817  		new := v_2
   818  		mem := v_3
   819  		v.Reset(ssaop.OpMIPS64LoweredAtomicCas32)
   820  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
   821  		v0.AddArg(old)
   822  		v.AddArg4(ptr, v0, new, mem)
   823  		return true
   824  	}
   825  }
   826  func rewriteValue_OpAtomicOr8(v *ssa.Value) bool {
   827  	v_2 := v.Args[2]
   828  	v_1 := v.Args[1]
   829  	v_0 := v.Args[0]
   830  	b := v.Block
   831  	config := b.Func.Config
   832  	typ := &b.Func.Config.Types
   833  	// match: (AtomicOr8 ptr val mem)
   834  	// cond: !config.BigEndian
   835  	// result: (LoweredAtomicOr32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] ptr))) mem)
   836  	for {
   837  		ptr := v_0
   838  		val := v_1
   839  		mem := v_2
   840  		if !(!config.BigEndian) {
   841  			break
   842  		}
   843  		v.Reset(ssaop.OpMIPS64LoweredAtomicOr32)
   844  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64AND, typ.UInt32Ptr)
   845  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   846  		v1.AuxInt = ssa.Int64ToAuxInt(^3)
   847  		v0.AddArg2(v1, ptr)
   848  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt32)
   849  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
   850  		v3.AddArg(val)
   851  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLVconst, typ.UInt64)
   852  		v4.AuxInt = ssa.Int64ToAuxInt(3)
   853  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64ANDconst, typ.UInt64)
   854  		v5.AuxInt = ssa.Int64ToAuxInt(3)
   855  		v5.AddArg(ptr)
   856  		v4.AddArg(v5)
   857  		v2.AddArg2(v3, v4)
   858  		v.AddArg3(v0, v2, mem)
   859  		return true
   860  	}
   861  	// match: (AtomicOr8 ptr val mem)
   862  	// cond: config.BigEndian
   863  	// result: (LoweredAtomicOr32 (AND <typ.UInt32Ptr> (MOVVconst [^3]) ptr) (SLLV <typ.UInt32> (ZeroExt8to32 val) (SLLVconst <typ.UInt64> [3] (ANDconst <typ.UInt64> [3] (XORconst <typ.UInt64> [3] ptr)))) mem)
   864  	for {
   865  		ptr := v_0
   866  		val := v_1
   867  		mem := v_2
   868  		if !(config.BigEndian) {
   869  			break
   870  		}
   871  		v.Reset(ssaop.OpMIPS64LoweredAtomicOr32)
   872  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64AND, typ.UInt32Ptr)
   873  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   874  		v1.AuxInt = ssa.Int64ToAuxInt(^3)
   875  		v0.AddArg2(v1, ptr)
   876  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, typ.UInt32)
   877  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
   878  		v3.AddArg(val)
   879  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLVconst, typ.UInt64)
   880  		v4.AuxInt = ssa.Int64ToAuxInt(3)
   881  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64ANDconst, typ.UInt64)
   882  		v5.AuxInt = ssa.Int64ToAuxInt(3)
   883  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64XORconst, typ.UInt64)
   884  		v6.AuxInt = ssa.Int64ToAuxInt(3)
   885  		v6.AddArg(ptr)
   886  		v5.AddArg(v6)
   887  		v4.AddArg(v5)
   888  		v2.AddArg2(v3, v4)
   889  		v.AddArg3(v0, v2, mem)
   890  		return true
   891  	}
   892  	return false
   893  }
   894  func rewriteValue_OpAvg64u(v *ssa.Value) bool {
   895  	v_1 := v.Args[1]
   896  	v_0 := v.Args[0]
   897  	b := v.Block
   898  	// match: (Avg64u <t> x y)
   899  	// result: (ADDV (SRLVconst <t> (SUBV <t> x y) [1]) y)
   900  	for {
   901  		t := v.Type
   902  		x := v_0
   903  		y := v_1
   904  		v.Reset(ssaop.OpMIPS64ADDV)
   905  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLVconst, t)
   906  		v0.AuxInt = ssa.Int64ToAuxInt(1)
   907  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SUBV, t)
   908  		v1.AddArg2(x, y)
   909  		v0.AddArg(v1)
   910  		v.AddArg2(v0, y)
   911  		return true
   912  	}
   913  }
   914  func rewriteValue_OpCom16(v *ssa.Value) bool {
   915  	v_0 := v.Args[0]
   916  	b := v.Block
   917  	typ := &b.Func.Config.Types
   918  	// match: (Com16 x)
   919  	// result: (NOR (MOVVconst [0]) x)
   920  	for {
   921  		x := v_0
   922  		v.Reset(ssaop.OpMIPS64NOR)
   923  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   924  		v0.AuxInt = ssa.Int64ToAuxInt(0)
   925  		v.AddArg2(v0, x)
   926  		return true
   927  	}
   928  }
   929  func rewriteValue_OpCom32(v *ssa.Value) bool {
   930  	v_0 := v.Args[0]
   931  	b := v.Block
   932  	typ := &b.Func.Config.Types
   933  	// match: (Com32 x)
   934  	// result: (NOR (MOVVconst [0]) x)
   935  	for {
   936  		x := v_0
   937  		v.Reset(ssaop.OpMIPS64NOR)
   938  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   939  		v0.AuxInt = ssa.Int64ToAuxInt(0)
   940  		v.AddArg2(v0, x)
   941  		return true
   942  	}
   943  }
   944  func rewriteValue_OpCom64(v *ssa.Value) bool {
   945  	v_0 := v.Args[0]
   946  	b := v.Block
   947  	typ := &b.Func.Config.Types
   948  	// match: (Com64 x)
   949  	// result: (NOR (MOVVconst [0]) x)
   950  	for {
   951  		x := v_0
   952  		v.Reset(ssaop.OpMIPS64NOR)
   953  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   954  		v0.AuxInt = ssa.Int64ToAuxInt(0)
   955  		v.AddArg2(v0, x)
   956  		return true
   957  	}
   958  }
   959  func rewriteValue_OpCom8(v *ssa.Value) bool {
   960  	v_0 := v.Args[0]
   961  	b := v.Block
   962  	typ := &b.Func.Config.Types
   963  	// match: (Com8 x)
   964  	// result: (NOR (MOVVconst [0]) x)
   965  	for {
   966  		x := v_0
   967  		v.Reset(ssaop.OpMIPS64NOR)
   968  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
   969  		v0.AuxInt = ssa.Int64ToAuxInt(0)
   970  		v.AddArg2(v0, x)
   971  		return true
   972  	}
   973  }
   974  func rewriteValue_OpConst16(v *ssa.Value) bool {
   975  	// match: (Const16 [val])
   976  	// result: (MOVVconst [int64(val)])
   977  	for {
   978  		val := ssa.AuxIntToInt16(v.AuxInt)
   979  		v.Reset(ssaop.OpMIPS64MOVVconst)
   980  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
   981  		return true
   982  	}
   983  }
   984  func rewriteValue_OpConst32(v *ssa.Value) bool {
   985  	// match: (Const32 [val])
   986  	// result: (MOVVconst [int64(val)])
   987  	for {
   988  		val := ssa.AuxIntToInt32(v.AuxInt)
   989  		v.Reset(ssaop.OpMIPS64MOVVconst)
   990  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
   991  		return true
   992  	}
   993  }
   994  func rewriteValue_OpConst32F(v *ssa.Value) bool {
   995  	// match: (Const32F [val])
   996  	// result: (MOVFconst [float64(val)])
   997  	for {
   998  		val := ssa.AuxIntToFloat32(v.AuxInt)
   999  		v.Reset(ssaop.OpMIPS64MOVFconst)
  1000  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
  1001  		return true
  1002  	}
  1003  }
  1004  func rewriteValue_OpConst64(v *ssa.Value) bool {
  1005  	// match: (Const64 [val])
  1006  	// result: (MOVVconst [int64(val)])
  1007  	for {
  1008  		val := ssa.AuxIntToInt64(v.AuxInt)
  1009  		v.Reset(ssaop.OpMIPS64MOVVconst)
  1010  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
  1011  		return true
  1012  	}
  1013  }
  1014  func rewriteValue_OpConst64F(v *ssa.Value) bool {
  1015  	// match: (Const64F [val])
  1016  	// result: (MOVDconst [float64(val)])
  1017  	for {
  1018  		val := ssa.AuxIntToFloat64(v.AuxInt)
  1019  		v.Reset(ssaop.OpMIPS64MOVDconst)
  1020  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
  1021  		return true
  1022  	}
  1023  }
  1024  func rewriteValue_OpConst8(v *ssa.Value) bool {
  1025  	// match: (Const8 [val])
  1026  	// result: (MOVVconst [int64(val)])
  1027  	for {
  1028  		val := ssa.AuxIntToInt8(v.AuxInt)
  1029  		v.Reset(ssaop.OpMIPS64MOVVconst)
  1030  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
  1031  		return true
  1032  	}
  1033  }
  1034  func rewriteValue_OpConstBool(v *ssa.Value) bool {
  1035  	// match: (ConstBool [t])
  1036  	// result: (MOVVconst [int64(ssa.B2i(t))])
  1037  	for {
  1038  		t := ssa.AuxIntToBool(v.AuxInt)
  1039  		v.Reset(ssaop.OpMIPS64MOVVconst)
  1040  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.B2i(t)))
  1041  		return true
  1042  	}
  1043  }
  1044  func rewriteValue_OpConstNil(v *ssa.Value) bool {
  1045  	// match: (ConstNil)
  1046  	// result: (MOVVconst [0])
  1047  	for {
  1048  		v.Reset(ssaop.OpMIPS64MOVVconst)
  1049  		v.AuxInt = ssa.Int64ToAuxInt(0)
  1050  		return true
  1051  	}
  1052  }
  1053  func rewriteValue_OpDiv16(v *ssa.Value) bool {
  1054  	v_1 := v.Args[1]
  1055  	v_0 := v.Args[0]
  1056  	b := v.Block
  1057  	typ := &b.Func.Config.Types
  1058  	// match: (Div16 x y)
  1059  	// result: (Select1 (DIVV (SignExt16to64 x) (SignExt16to64 y)))
  1060  	for {
  1061  		x := v_0
  1062  		y := v_1
  1063  		v.Reset(ssaop.OpSelect1)
  1064  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1065  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1066  		v1.AddArg(x)
  1067  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1068  		v2.AddArg(y)
  1069  		v0.AddArg2(v1, v2)
  1070  		v.AddArg(v0)
  1071  		return true
  1072  	}
  1073  }
  1074  func rewriteValue_OpDiv16u(v *ssa.Value) bool {
  1075  	v_1 := v.Args[1]
  1076  	v_0 := v.Args[0]
  1077  	b := v.Block
  1078  	typ := &b.Func.Config.Types
  1079  	// match: (Div16u x y)
  1080  	// result: (Select1 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)))
  1081  	for {
  1082  		x := v_0
  1083  		y := v_1
  1084  		v.Reset(ssaop.OpSelect1)
  1085  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1086  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1087  		v1.AddArg(x)
  1088  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1089  		v2.AddArg(y)
  1090  		v0.AddArg2(v1, v2)
  1091  		v.AddArg(v0)
  1092  		return true
  1093  	}
  1094  }
  1095  func rewriteValue_OpDiv32(v *ssa.Value) bool {
  1096  	v_1 := v.Args[1]
  1097  	v_0 := v.Args[0]
  1098  	b := v.Block
  1099  	typ := &b.Func.Config.Types
  1100  	// match: (Div32 x y)
  1101  	// result: (Select1 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
  1102  	for {
  1103  		x := v_0
  1104  		y := v_1
  1105  		v.Reset(ssaop.OpSelect1)
  1106  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1107  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1108  		v1.AddArg(x)
  1109  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1110  		v2.AddArg(y)
  1111  		v0.AddArg2(v1, v2)
  1112  		v.AddArg(v0)
  1113  		return true
  1114  	}
  1115  }
  1116  func rewriteValue_OpDiv32u(v *ssa.Value) bool {
  1117  	v_1 := v.Args[1]
  1118  	v_0 := v.Args[0]
  1119  	b := v.Block
  1120  	typ := &b.Func.Config.Types
  1121  	// match: (Div32u x y)
  1122  	// result: (Select1 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)))
  1123  	for {
  1124  		x := v_0
  1125  		y := v_1
  1126  		v.Reset(ssaop.OpSelect1)
  1127  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1128  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1129  		v1.AddArg(x)
  1130  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1131  		v2.AddArg(y)
  1132  		v0.AddArg2(v1, v2)
  1133  		v.AddArg(v0)
  1134  		return true
  1135  	}
  1136  }
  1137  func rewriteValue_OpDiv64(v *ssa.Value) bool {
  1138  	v_1 := v.Args[1]
  1139  	v_0 := v.Args[0]
  1140  	b := v.Block
  1141  	typ := &b.Func.Config.Types
  1142  	// match: (Div64 x y)
  1143  	// result: (Select1 (DIVV x y))
  1144  	for {
  1145  		x := v_0
  1146  		y := v_1
  1147  		v.Reset(ssaop.OpSelect1)
  1148  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1149  		v0.AddArg2(x, y)
  1150  		v.AddArg(v0)
  1151  		return true
  1152  	}
  1153  }
  1154  func rewriteValue_OpDiv64u(v *ssa.Value) bool {
  1155  	v_1 := v.Args[1]
  1156  	v_0 := v.Args[0]
  1157  	b := v.Block
  1158  	typ := &b.Func.Config.Types
  1159  	// match: (Div64u x y)
  1160  	// result: (Select1 (DIVVU x y))
  1161  	for {
  1162  		x := v_0
  1163  		y := v_1
  1164  		v.Reset(ssaop.OpSelect1)
  1165  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1166  		v0.AddArg2(x, y)
  1167  		v.AddArg(v0)
  1168  		return true
  1169  	}
  1170  }
  1171  func rewriteValue_OpDiv8(v *ssa.Value) bool {
  1172  	v_1 := v.Args[1]
  1173  	v_0 := v.Args[0]
  1174  	b := v.Block
  1175  	typ := &b.Func.Config.Types
  1176  	// match: (Div8 x y)
  1177  	// result: (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
  1178  	for {
  1179  		x := v_0
  1180  		y := v_1
  1181  		v.Reset(ssaop.OpSelect1)
  1182  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  1183  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1184  		v1.AddArg(x)
  1185  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1186  		v2.AddArg(y)
  1187  		v0.AddArg2(v1, v2)
  1188  		v.AddArg(v0)
  1189  		return true
  1190  	}
  1191  }
  1192  func rewriteValue_OpDiv8u(v *ssa.Value) bool {
  1193  	v_1 := v.Args[1]
  1194  	v_0 := v.Args[0]
  1195  	b := v.Block
  1196  	typ := &b.Func.Config.Types
  1197  	// match: (Div8u x y)
  1198  	// result: (Select1 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)))
  1199  	for {
  1200  		x := v_0
  1201  		y := v_1
  1202  		v.Reset(ssaop.OpSelect1)
  1203  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1204  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1205  		v1.AddArg(x)
  1206  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1207  		v2.AddArg(y)
  1208  		v0.AddArg2(v1, v2)
  1209  		v.AddArg(v0)
  1210  		return true
  1211  	}
  1212  }
  1213  func rewriteValue_OpEq16(v *ssa.Value) bool {
  1214  	v_1 := v.Args[1]
  1215  	v_0 := v.Args[0]
  1216  	b := v.Block
  1217  	typ := &b.Func.Config.Types
  1218  	// match: (Eq16 x y)
  1219  	// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt16to64 x) (ZeroExt16to64 y)))
  1220  	for {
  1221  		x := v_0
  1222  		y := v_1
  1223  		v.Reset(ssaop.OpMIPS64SGTU)
  1224  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1225  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1226  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1227  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1228  		v2.AddArg(x)
  1229  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1230  		v3.AddArg(y)
  1231  		v1.AddArg2(v2, v3)
  1232  		v.AddArg2(v0, v1)
  1233  		return true
  1234  	}
  1235  }
  1236  func rewriteValue_OpEq32(v *ssa.Value) bool {
  1237  	v_1 := v.Args[1]
  1238  	v_0 := v.Args[0]
  1239  	b := v.Block
  1240  	typ := &b.Func.Config.Types
  1241  	// match: (Eq32 x y)
  1242  	// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt32to64 x) (ZeroExt32to64 y)))
  1243  	for {
  1244  		x := v_0
  1245  		y := v_1
  1246  		v.Reset(ssaop.OpMIPS64SGTU)
  1247  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1248  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1249  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1250  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1251  		v2.AddArg(x)
  1252  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1253  		v3.AddArg(y)
  1254  		v1.AddArg2(v2, v3)
  1255  		v.AddArg2(v0, v1)
  1256  		return true
  1257  	}
  1258  }
  1259  func rewriteValue_OpEq32F(v *ssa.Value) bool {
  1260  	v_1 := v.Args[1]
  1261  	v_0 := v.Args[0]
  1262  	b := v.Block
  1263  	// match: (Eq32F x y)
  1264  	// result: (FPFlagTrue (CMPEQF x y))
  1265  	for {
  1266  		x := v_0
  1267  		y := v_1
  1268  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1269  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPEQF, types.TypeFlags)
  1270  		v0.AddArg2(x, y)
  1271  		v.AddArg(v0)
  1272  		return true
  1273  	}
  1274  }
  1275  func rewriteValue_OpEq64(v *ssa.Value) bool {
  1276  	v_1 := v.Args[1]
  1277  	v_0 := v.Args[0]
  1278  	b := v.Block
  1279  	typ := &b.Func.Config.Types
  1280  	// match: (Eq64 x y)
  1281  	// result: (SGTU (MOVVconst [1]) (XOR x y))
  1282  	for {
  1283  		x := v_0
  1284  		y := v_1
  1285  		v.Reset(ssaop.OpMIPS64SGTU)
  1286  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1287  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1288  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1289  		v1.AddArg2(x, y)
  1290  		v.AddArg2(v0, v1)
  1291  		return true
  1292  	}
  1293  }
  1294  func rewriteValue_OpEq64F(v *ssa.Value) bool {
  1295  	v_1 := v.Args[1]
  1296  	v_0 := v.Args[0]
  1297  	b := v.Block
  1298  	// match: (Eq64F x y)
  1299  	// result: (FPFlagTrue (CMPEQD x y))
  1300  	for {
  1301  		x := v_0
  1302  		y := v_1
  1303  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1304  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPEQD, types.TypeFlags)
  1305  		v0.AddArg2(x, y)
  1306  		v.AddArg(v0)
  1307  		return true
  1308  	}
  1309  }
  1310  func rewriteValue_OpEq8(v *ssa.Value) bool {
  1311  	v_1 := v.Args[1]
  1312  	v_0 := v.Args[0]
  1313  	b := v.Block
  1314  	typ := &b.Func.Config.Types
  1315  	// match: (Eq8 x y)
  1316  	// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt8to64 x) (ZeroExt8to64 y)))
  1317  	for {
  1318  		x := v_0
  1319  		y := v_1
  1320  		v.Reset(ssaop.OpMIPS64SGTU)
  1321  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1322  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1323  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1324  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1325  		v2.AddArg(x)
  1326  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1327  		v3.AddArg(y)
  1328  		v1.AddArg2(v2, v3)
  1329  		v.AddArg2(v0, v1)
  1330  		return true
  1331  	}
  1332  }
  1333  func rewriteValue_OpEqB(v *ssa.Value) bool {
  1334  	v_1 := v.Args[1]
  1335  	v_0 := v.Args[0]
  1336  	b := v.Block
  1337  	typ := &b.Func.Config.Types
  1338  	// match: (EqB x y)
  1339  	// result: (XOR (MOVVconst [1]) (XOR <typ.Bool> x y))
  1340  	for {
  1341  		x := v_0
  1342  		y := v_1
  1343  		v.Reset(ssaop.OpMIPS64XOR)
  1344  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1345  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1346  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.Bool)
  1347  		v1.AddArg2(x, y)
  1348  		v.AddArg2(v0, v1)
  1349  		return true
  1350  	}
  1351  }
  1352  func rewriteValue_OpEqPtr(v *ssa.Value) bool {
  1353  	v_1 := v.Args[1]
  1354  	v_0 := v.Args[0]
  1355  	b := v.Block
  1356  	typ := &b.Func.Config.Types
  1357  	// match: (EqPtr x y)
  1358  	// result: (SGTU (MOVVconst [1]) (XOR x y))
  1359  	for {
  1360  		x := v_0
  1361  		y := v_1
  1362  		v.Reset(ssaop.OpMIPS64SGTU)
  1363  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1364  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1365  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  1366  		v1.AddArg2(x, y)
  1367  		v.AddArg2(v0, v1)
  1368  		return true
  1369  	}
  1370  }
  1371  func rewriteValue_OpHmul32(v *ssa.Value) bool {
  1372  	v_1 := v.Args[1]
  1373  	v_0 := v.Args[0]
  1374  	b := v.Block
  1375  	typ := &b.Func.Config.Types
  1376  	// match: (Hmul32 x y)
  1377  	// result: (SRAVconst (Select1 <typ.Int64> (MULV (SignExt32to64 x) (SignExt32to64 y))) [32])
  1378  	for {
  1379  		x := v_0
  1380  		y := v_1
  1381  		v.Reset(ssaop.OpMIPS64SRAVconst)
  1382  		v.AuxInt = ssa.Int64ToAuxInt(32)
  1383  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Int64)
  1384  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULV, types.NewTuple(typ.Int64, typ.Int64))
  1385  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1386  		v2.AddArg(x)
  1387  		v3 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1388  		v3.AddArg(y)
  1389  		v1.AddArg2(v2, v3)
  1390  		v0.AddArg(v1)
  1391  		v.AddArg(v0)
  1392  		return true
  1393  	}
  1394  }
  1395  func rewriteValue_OpHmul32u(v *ssa.Value) bool {
  1396  	v_1 := v.Args[1]
  1397  	v_0 := v.Args[0]
  1398  	b := v.Block
  1399  	typ := &b.Func.Config.Types
  1400  	// match: (Hmul32u x y)
  1401  	// result: (SRLVconst (Select1 <typ.UInt64> (MULVU (ZeroExt32to64 x) (ZeroExt32to64 y))) [32])
  1402  	for {
  1403  		x := v_0
  1404  		y := v_1
  1405  		v.Reset(ssaop.OpMIPS64SRLVconst)
  1406  		v.AuxInt = ssa.Int64ToAuxInt(32)
  1407  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.UInt64)
  1408  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1409  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1410  		v2.AddArg(x)
  1411  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1412  		v3.AddArg(y)
  1413  		v1.AddArg2(v2, v3)
  1414  		v0.AddArg(v1)
  1415  		v.AddArg(v0)
  1416  		return true
  1417  	}
  1418  }
  1419  func rewriteValue_OpHmul64(v *ssa.Value) bool {
  1420  	v_1 := v.Args[1]
  1421  	v_0 := v.Args[0]
  1422  	b := v.Block
  1423  	typ := &b.Func.Config.Types
  1424  	// match: (Hmul64 x y)
  1425  	// result: (Select0 (MULV x y))
  1426  	for {
  1427  		x := v_0
  1428  		y := v_1
  1429  		v.Reset(ssaop.OpSelect0)
  1430  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULV, types.NewTuple(typ.Int64, typ.Int64))
  1431  		v0.AddArg2(x, y)
  1432  		v.AddArg(v0)
  1433  		return true
  1434  	}
  1435  }
  1436  func rewriteValue_OpHmul64u(v *ssa.Value) bool {
  1437  	v_1 := v.Args[1]
  1438  	v_0 := v.Args[0]
  1439  	b := v.Block
  1440  	typ := &b.Func.Config.Types
  1441  	// match: (Hmul64u x y)
  1442  	// result: (Select0 (MULVU x y))
  1443  	for {
  1444  		x := v_0
  1445  		y := v_1
  1446  		v.Reset(ssaop.OpSelect0)
  1447  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  1448  		v0.AddArg2(x, y)
  1449  		v.AddArg(v0)
  1450  		return true
  1451  	}
  1452  }
  1453  func rewriteValue_OpIsInBounds(v *ssa.Value) bool {
  1454  	v_1 := v.Args[1]
  1455  	v_0 := v.Args[0]
  1456  	// match: (IsInBounds idx len)
  1457  	// result: (SGTU len idx)
  1458  	for {
  1459  		idx := v_0
  1460  		len := v_1
  1461  		v.Reset(ssaop.OpMIPS64SGTU)
  1462  		v.AddArg2(len, idx)
  1463  		return true
  1464  	}
  1465  }
  1466  func rewriteValue_OpIsNonNil(v *ssa.Value) bool {
  1467  	v_0 := v.Args[0]
  1468  	b := v.Block
  1469  	typ := &b.Func.Config.Types
  1470  	// match: (IsNonNil ptr)
  1471  	// result: (SGTU ptr (MOVVconst [0]))
  1472  	for {
  1473  		ptr := v_0
  1474  		v.Reset(ssaop.OpMIPS64SGTU)
  1475  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1476  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  1477  		v.AddArg2(ptr, v0)
  1478  		return true
  1479  	}
  1480  }
  1481  func rewriteValue_OpIsSliceInBounds(v *ssa.Value) bool {
  1482  	v_1 := v.Args[1]
  1483  	v_0 := v.Args[0]
  1484  	b := v.Block
  1485  	typ := &b.Func.Config.Types
  1486  	// match: (IsSliceInBounds idx len)
  1487  	// result: (XOR (MOVVconst [1]) (SGTU idx len))
  1488  	for {
  1489  		idx := v_0
  1490  		len := v_1
  1491  		v.Reset(ssaop.OpMIPS64XOR)
  1492  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1493  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1494  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1495  		v1.AddArg2(idx, len)
  1496  		v.AddArg2(v0, v1)
  1497  		return true
  1498  	}
  1499  }
  1500  func rewriteValue_OpLeq16(v *ssa.Value) bool {
  1501  	v_1 := v.Args[1]
  1502  	v_0 := v.Args[0]
  1503  	b := v.Block
  1504  	typ := &b.Func.Config.Types
  1505  	// match: (Leq16 x y)
  1506  	// result: (XOR (MOVVconst [1]) (SGT (SignExt16to64 x) (SignExt16to64 y)))
  1507  	for {
  1508  		x := v_0
  1509  		y := v_1
  1510  		v.Reset(ssaop.OpMIPS64XOR)
  1511  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1512  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1513  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGT, typ.Bool)
  1514  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1515  		v2.AddArg(x)
  1516  		v3 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1517  		v3.AddArg(y)
  1518  		v1.AddArg2(v2, v3)
  1519  		v.AddArg2(v0, v1)
  1520  		return true
  1521  	}
  1522  }
  1523  func rewriteValue_OpLeq16U(v *ssa.Value) bool {
  1524  	v_1 := v.Args[1]
  1525  	v_0 := v.Args[0]
  1526  	b := v.Block
  1527  	typ := &b.Func.Config.Types
  1528  	// match: (Leq16U x y)
  1529  	// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt16to64 x) (ZeroExt16to64 y)))
  1530  	for {
  1531  		x := v_0
  1532  		y := v_1
  1533  		v.Reset(ssaop.OpMIPS64XOR)
  1534  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1535  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1536  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1537  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1538  		v2.AddArg(x)
  1539  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1540  		v3.AddArg(y)
  1541  		v1.AddArg2(v2, v3)
  1542  		v.AddArg2(v0, v1)
  1543  		return true
  1544  	}
  1545  }
  1546  func rewriteValue_OpLeq32(v *ssa.Value) bool {
  1547  	v_1 := v.Args[1]
  1548  	v_0 := v.Args[0]
  1549  	b := v.Block
  1550  	typ := &b.Func.Config.Types
  1551  	// match: (Leq32 x y)
  1552  	// result: (XOR (MOVVconst [1]) (SGT (SignExt32to64 x) (SignExt32to64 y)))
  1553  	for {
  1554  		x := v_0
  1555  		y := v_1
  1556  		v.Reset(ssaop.OpMIPS64XOR)
  1557  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1558  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1559  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGT, typ.Bool)
  1560  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1561  		v2.AddArg(x)
  1562  		v3 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1563  		v3.AddArg(y)
  1564  		v1.AddArg2(v2, v3)
  1565  		v.AddArg2(v0, v1)
  1566  		return true
  1567  	}
  1568  }
  1569  func rewriteValue_OpLeq32F(v *ssa.Value) bool {
  1570  	v_1 := v.Args[1]
  1571  	v_0 := v.Args[0]
  1572  	b := v.Block
  1573  	// match: (Leq32F x y)
  1574  	// result: (FPFlagTrue (CMPGEF y x))
  1575  	for {
  1576  		x := v_0
  1577  		y := v_1
  1578  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1579  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPGEF, types.TypeFlags)
  1580  		v0.AddArg2(y, x)
  1581  		v.AddArg(v0)
  1582  		return true
  1583  	}
  1584  }
  1585  func rewriteValue_OpLeq32U(v *ssa.Value) bool {
  1586  	v_1 := v.Args[1]
  1587  	v_0 := v.Args[0]
  1588  	b := v.Block
  1589  	typ := &b.Func.Config.Types
  1590  	// match: (Leq32U x y)
  1591  	// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt32to64 x) (ZeroExt32to64 y)))
  1592  	for {
  1593  		x := v_0
  1594  		y := v_1
  1595  		v.Reset(ssaop.OpMIPS64XOR)
  1596  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1597  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1598  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1599  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1600  		v2.AddArg(x)
  1601  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1602  		v3.AddArg(y)
  1603  		v1.AddArg2(v2, v3)
  1604  		v.AddArg2(v0, v1)
  1605  		return true
  1606  	}
  1607  }
  1608  func rewriteValue_OpLeq64(v *ssa.Value) bool {
  1609  	v_1 := v.Args[1]
  1610  	v_0 := v.Args[0]
  1611  	b := v.Block
  1612  	typ := &b.Func.Config.Types
  1613  	// match: (Leq64 x y)
  1614  	// result: (XOR (MOVVconst [1]) (SGT x y))
  1615  	for {
  1616  		x := v_0
  1617  		y := v_1
  1618  		v.Reset(ssaop.OpMIPS64XOR)
  1619  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1620  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1621  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGT, typ.Bool)
  1622  		v1.AddArg2(x, y)
  1623  		v.AddArg2(v0, v1)
  1624  		return true
  1625  	}
  1626  }
  1627  func rewriteValue_OpLeq64F(v *ssa.Value) bool {
  1628  	v_1 := v.Args[1]
  1629  	v_0 := v.Args[0]
  1630  	b := v.Block
  1631  	// match: (Leq64F x y)
  1632  	// result: (FPFlagTrue (CMPGED y x))
  1633  	for {
  1634  		x := v_0
  1635  		y := v_1
  1636  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1637  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPGED, types.TypeFlags)
  1638  		v0.AddArg2(y, x)
  1639  		v.AddArg(v0)
  1640  		return true
  1641  	}
  1642  }
  1643  func rewriteValue_OpLeq64U(v *ssa.Value) bool {
  1644  	v_1 := v.Args[1]
  1645  	v_0 := v.Args[0]
  1646  	b := v.Block
  1647  	typ := &b.Func.Config.Types
  1648  	// match: (Leq64U x y)
  1649  	// result: (XOR (MOVVconst [1]) (SGTU x y))
  1650  	for {
  1651  		x := v_0
  1652  		y := v_1
  1653  		v.Reset(ssaop.OpMIPS64XOR)
  1654  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1655  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1656  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1657  		v1.AddArg2(x, y)
  1658  		v.AddArg2(v0, v1)
  1659  		return true
  1660  	}
  1661  }
  1662  func rewriteValue_OpLeq8(v *ssa.Value) bool {
  1663  	v_1 := v.Args[1]
  1664  	v_0 := v.Args[0]
  1665  	b := v.Block
  1666  	typ := &b.Func.Config.Types
  1667  	// match: (Leq8 x y)
  1668  	// result: (XOR (MOVVconst [1]) (SGT (SignExt8to64 x) (SignExt8to64 y)))
  1669  	for {
  1670  		x := v_0
  1671  		y := v_1
  1672  		v.Reset(ssaop.OpMIPS64XOR)
  1673  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1674  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1675  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGT, typ.Bool)
  1676  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1677  		v2.AddArg(x)
  1678  		v3 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1679  		v3.AddArg(y)
  1680  		v1.AddArg2(v2, v3)
  1681  		v.AddArg2(v0, v1)
  1682  		return true
  1683  	}
  1684  }
  1685  func rewriteValue_OpLeq8U(v *ssa.Value) bool {
  1686  	v_1 := v.Args[1]
  1687  	v_0 := v.Args[0]
  1688  	b := v.Block
  1689  	typ := &b.Func.Config.Types
  1690  	// match: (Leq8U x y)
  1691  	// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt8to64 x) (ZeroExt8to64 y)))
  1692  	for {
  1693  		x := v_0
  1694  		y := v_1
  1695  		v.Reset(ssaop.OpMIPS64XOR)
  1696  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  1697  		v0.AuxInt = ssa.Int64ToAuxInt(1)
  1698  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  1699  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1700  		v2.AddArg(x)
  1701  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1702  		v3.AddArg(y)
  1703  		v1.AddArg2(v2, v3)
  1704  		v.AddArg2(v0, v1)
  1705  		return true
  1706  	}
  1707  }
  1708  func rewriteValue_OpLess16(v *ssa.Value) bool {
  1709  	v_1 := v.Args[1]
  1710  	v_0 := v.Args[0]
  1711  	b := v.Block
  1712  	typ := &b.Func.Config.Types
  1713  	// match: (Less16 x y)
  1714  	// result: (SGT (SignExt16to64 y) (SignExt16to64 x))
  1715  	for {
  1716  		x := v_0
  1717  		y := v_1
  1718  		v.Reset(ssaop.OpMIPS64SGT)
  1719  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1720  		v0.AddArg(y)
  1721  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  1722  		v1.AddArg(x)
  1723  		v.AddArg2(v0, v1)
  1724  		return true
  1725  	}
  1726  }
  1727  func rewriteValue_OpLess16U(v *ssa.Value) bool {
  1728  	v_1 := v.Args[1]
  1729  	v_0 := v.Args[0]
  1730  	b := v.Block
  1731  	typ := &b.Func.Config.Types
  1732  	// match: (Less16U x y)
  1733  	// result: (SGTU (ZeroExt16to64 y) (ZeroExt16to64 x))
  1734  	for {
  1735  		x := v_0
  1736  		y := v_1
  1737  		v.Reset(ssaop.OpMIPS64SGTU)
  1738  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1739  		v0.AddArg(y)
  1740  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  1741  		v1.AddArg(x)
  1742  		v.AddArg2(v0, v1)
  1743  		return true
  1744  	}
  1745  }
  1746  func rewriteValue_OpLess32(v *ssa.Value) bool {
  1747  	v_1 := v.Args[1]
  1748  	v_0 := v.Args[0]
  1749  	b := v.Block
  1750  	typ := &b.Func.Config.Types
  1751  	// match: (Less32 x y)
  1752  	// result: (SGT (SignExt32to64 y) (SignExt32to64 x))
  1753  	for {
  1754  		x := v_0
  1755  		y := v_1
  1756  		v.Reset(ssaop.OpMIPS64SGT)
  1757  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1758  		v0.AddArg(y)
  1759  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  1760  		v1.AddArg(x)
  1761  		v.AddArg2(v0, v1)
  1762  		return true
  1763  	}
  1764  }
  1765  func rewriteValue_OpLess32F(v *ssa.Value) bool {
  1766  	v_1 := v.Args[1]
  1767  	v_0 := v.Args[0]
  1768  	b := v.Block
  1769  	// match: (Less32F x y)
  1770  	// result: (FPFlagTrue (CMPGTF y x))
  1771  	for {
  1772  		x := v_0
  1773  		y := v_1
  1774  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1775  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPGTF, types.TypeFlags)
  1776  		v0.AddArg2(y, x)
  1777  		v.AddArg(v0)
  1778  		return true
  1779  	}
  1780  }
  1781  func rewriteValue_OpLess32U(v *ssa.Value) bool {
  1782  	v_1 := v.Args[1]
  1783  	v_0 := v.Args[0]
  1784  	b := v.Block
  1785  	typ := &b.Func.Config.Types
  1786  	// match: (Less32U x y)
  1787  	// result: (SGTU (ZeroExt32to64 y) (ZeroExt32to64 x))
  1788  	for {
  1789  		x := v_0
  1790  		y := v_1
  1791  		v.Reset(ssaop.OpMIPS64SGTU)
  1792  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1793  		v0.AddArg(y)
  1794  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  1795  		v1.AddArg(x)
  1796  		v.AddArg2(v0, v1)
  1797  		return true
  1798  	}
  1799  }
  1800  func rewriteValue_OpLess64(v *ssa.Value) bool {
  1801  	v_1 := v.Args[1]
  1802  	v_0 := v.Args[0]
  1803  	// match: (Less64 x y)
  1804  	// result: (SGT y x)
  1805  	for {
  1806  		x := v_0
  1807  		y := v_1
  1808  		v.Reset(ssaop.OpMIPS64SGT)
  1809  		v.AddArg2(y, x)
  1810  		return true
  1811  	}
  1812  }
  1813  func rewriteValue_OpLess64F(v *ssa.Value) bool {
  1814  	v_1 := v.Args[1]
  1815  	v_0 := v.Args[0]
  1816  	b := v.Block
  1817  	// match: (Less64F x y)
  1818  	// result: (FPFlagTrue (CMPGTD y x))
  1819  	for {
  1820  		x := v_0
  1821  		y := v_1
  1822  		v.Reset(ssaop.OpMIPS64FPFlagTrue)
  1823  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPGTD, types.TypeFlags)
  1824  		v0.AddArg2(y, x)
  1825  		v.AddArg(v0)
  1826  		return true
  1827  	}
  1828  }
  1829  func rewriteValue_OpLess64U(v *ssa.Value) bool {
  1830  	v_1 := v.Args[1]
  1831  	v_0 := v.Args[0]
  1832  	// match: (Less64U x y)
  1833  	// result: (SGTU y x)
  1834  	for {
  1835  		x := v_0
  1836  		y := v_1
  1837  		v.Reset(ssaop.OpMIPS64SGTU)
  1838  		v.AddArg2(y, x)
  1839  		return true
  1840  	}
  1841  }
  1842  func rewriteValue_OpLess8(v *ssa.Value) bool {
  1843  	v_1 := v.Args[1]
  1844  	v_0 := v.Args[0]
  1845  	b := v.Block
  1846  	typ := &b.Func.Config.Types
  1847  	// match: (Less8 x y)
  1848  	// result: (SGT (SignExt8to64 y) (SignExt8to64 x))
  1849  	for {
  1850  		x := v_0
  1851  		y := v_1
  1852  		v.Reset(ssaop.OpMIPS64SGT)
  1853  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1854  		v0.AddArg(y)
  1855  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  1856  		v1.AddArg(x)
  1857  		v.AddArg2(v0, v1)
  1858  		return true
  1859  	}
  1860  }
  1861  func rewriteValue_OpLess8U(v *ssa.Value) bool {
  1862  	v_1 := v.Args[1]
  1863  	v_0 := v.Args[0]
  1864  	b := v.Block
  1865  	typ := &b.Func.Config.Types
  1866  	// match: (Less8U x y)
  1867  	// result: (SGTU (ZeroExt8to64 y) (ZeroExt8to64 x))
  1868  	for {
  1869  		x := v_0
  1870  		y := v_1
  1871  		v.Reset(ssaop.OpMIPS64SGTU)
  1872  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1873  		v0.AddArg(y)
  1874  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  1875  		v1.AddArg(x)
  1876  		v.AddArg2(v0, v1)
  1877  		return true
  1878  	}
  1879  }
  1880  func rewriteValue_OpLoad(v *ssa.Value) bool {
  1881  	v_1 := v.Args[1]
  1882  	v_0 := v.Args[0]
  1883  	// match: (Load <t> ptr mem)
  1884  	// cond: t.IsBoolean()
  1885  	// result: (MOVBUload ptr mem)
  1886  	for {
  1887  		t := v.Type
  1888  		ptr := v_0
  1889  		mem := v_1
  1890  		if !(t.IsBoolean()) {
  1891  			break
  1892  		}
  1893  		v.Reset(ssaop.OpMIPS64MOVBUload)
  1894  		v.AddArg2(ptr, mem)
  1895  		return true
  1896  	}
  1897  	// match: (Load <t> ptr mem)
  1898  	// cond: (ssa.Is8BitInt(t) && t.IsSigned())
  1899  	// result: (MOVBload ptr mem)
  1900  	for {
  1901  		t := v.Type
  1902  		ptr := v_0
  1903  		mem := v_1
  1904  		if !(ssa.Is8BitInt(t) && t.IsSigned()) {
  1905  			break
  1906  		}
  1907  		v.Reset(ssaop.OpMIPS64MOVBload)
  1908  		v.AddArg2(ptr, mem)
  1909  		return true
  1910  	}
  1911  	// match: (Load <t> ptr mem)
  1912  	// cond: (ssa.Is8BitInt(t) && !t.IsSigned())
  1913  	// result: (MOVBUload ptr mem)
  1914  	for {
  1915  		t := v.Type
  1916  		ptr := v_0
  1917  		mem := v_1
  1918  		if !(ssa.Is8BitInt(t) && !t.IsSigned()) {
  1919  			break
  1920  		}
  1921  		v.Reset(ssaop.OpMIPS64MOVBUload)
  1922  		v.AddArg2(ptr, mem)
  1923  		return true
  1924  	}
  1925  	// match: (Load <t> ptr mem)
  1926  	// cond: (ssa.Is16BitInt(t) && t.IsSigned())
  1927  	// result: (MOVHload ptr mem)
  1928  	for {
  1929  		t := v.Type
  1930  		ptr := v_0
  1931  		mem := v_1
  1932  		if !(ssa.Is16BitInt(t) && t.IsSigned()) {
  1933  			break
  1934  		}
  1935  		v.Reset(ssaop.OpMIPS64MOVHload)
  1936  		v.AddArg2(ptr, mem)
  1937  		return true
  1938  	}
  1939  	// match: (Load <t> ptr mem)
  1940  	// cond: (ssa.Is16BitInt(t) && !t.IsSigned())
  1941  	// result: (MOVHUload ptr mem)
  1942  	for {
  1943  		t := v.Type
  1944  		ptr := v_0
  1945  		mem := v_1
  1946  		if !(ssa.Is16BitInt(t) && !t.IsSigned()) {
  1947  			break
  1948  		}
  1949  		v.Reset(ssaop.OpMIPS64MOVHUload)
  1950  		v.AddArg2(ptr, mem)
  1951  		return true
  1952  	}
  1953  	// match: (Load <t> ptr mem)
  1954  	// cond: (ssa.Is32BitInt(t) && t.IsSigned())
  1955  	// result: (MOVWload ptr mem)
  1956  	for {
  1957  		t := v.Type
  1958  		ptr := v_0
  1959  		mem := v_1
  1960  		if !(ssa.Is32BitInt(t) && t.IsSigned()) {
  1961  			break
  1962  		}
  1963  		v.Reset(ssaop.OpMIPS64MOVWload)
  1964  		v.AddArg2(ptr, mem)
  1965  		return true
  1966  	}
  1967  	// match: (Load <t> ptr mem)
  1968  	// cond: (ssa.Is32BitInt(t) && !t.IsSigned())
  1969  	// result: (MOVWUload ptr mem)
  1970  	for {
  1971  		t := v.Type
  1972  		ptr := v_0
  1973  		mem := v_1
  1974  		if !(ssa.Is32BitInt(t) && !t.IsSigned()) {
  1975  			break
  1976  		}
  1977  		v.Reset(ssaop.OpMIPS64MOVWUload)
  1978  		v.AddArg2(ptr, mem)
  1979  		return true
  1980  	}
  1981  	// match: (Load <t> ptr mem)
  1982  	// cond: (ssa.Is64BitInt(t) ||ssa.IsPtr(t))
  1983  	// result: (MOVVload ptr mem)
  1984  	for {
  1985  		t := v.Type
  1986  		ptr := v_0
  1987  		mem := v_1
  1988  		if !(ssa.Is64BitInt(t) || ssa.IsPtr(t)) {
  1989  			break
  1990  		}
  1991  		v.Reset(ssaop.OpMIPS64MOVVload)
  1992  		v.AddArg2(ptr, mem)
  1993  		return true
  1994  	}
  1995  	// match: (Load <t> ptr mem)
  1996  	// cond: ssa.Is32BitFloat(t)
  1997  	// result: (MOVFload ptr mem)
  1998  	for {
  1999  		t := v.Type
  2000  		ptr := v_0
  2001  		mem := v_1
  2002  		if !(ssa.Is32BitFloat(t)) {
  2003  			break
  2004  		}
  2005  		v.Reset(ssaop.OpMIPS64MOVFload)
  2006  		v.AddArg2(ptr, mem)
  2007  		return true
  2008  	}
  2009  	// match: (Load <t> ptr mem)
  2010  	// cond: ssa.Is64BitFloat(t)
  2011  	// result: (MOVDload ptr mem)
  2012  	for {
  2013  		t := v.Type
  2014  		ptr := v_0
  2015  		mem := v_1
  2016  		if !(ssa.Is64BitFloat(t)) {
  2017  			break
  2018  		}
  2019  		v.Reset(ssaop.OpMIPS64MOVDload)
  2020  		v.AddArg2(ptr, mem)
  2021  		return true
  2022  	}
  2023  	return false
  2024  }
  2025  func rewriteValue_OpLocalAddr(v *ssa.Value) bool {
  2026  	v_1 := v.Args[1]
  2027  	v_0 := v.Args[0]
  2028  	b := v.Block
  2029  	typ := &b.Func.Config.Types
  2030  	// match: (LocalAddr <t> {sym} base mem)
  2031  	// cond: t.Elem().HasPointers()
  2032  	// result: (MOVVaddr {sym} (SPanchored base mem))
  2033  	for {
  2034  		t := v.Type
  2035  		sym := ssa.AuxToSym(v.Aux)
  2036  		base := v_0
  2037  		mem := v_1
  2038  		if !(t.Elem().HasPointers()) {
  2039  			break
  2040  		}
  2041  		v.Reset(ssaop.OpMIPS64MOVVaddr)
  2042  		v.Aux = ssa.SymToAux(sym)
  2043  		v0 := b.NewValue0(v.Pos, ssaop.OpSPanchored, typ.Uintptr)
  2044  		v0.AddArg2(base, mem)
  2045  		v.AddArg(v0)
  2046  		return true
  2047  	}
  2048  	// match: (LocalAddr <t> {sym} base _)
  2049  	// cond: !t.Elem().HasPointers()
  2050  	// result: (MOVVaddr {sym} base)
  2051  	for {
  2052  		t := v.Type
  2053  		sym := ssa.AuxToSym(v.Aux)
  2054  		base := v_0
  2055  		if !(!t.Elem().HasPointers()) {
  2056  			break
  2057  		}
  2058  		v.Reset(ssaop.OpMIPS64MOVVaddr)
  2059  		v.Aux = ssa.SymToAux(sym)
  2060  		v.AddArg(base)
  2061  		return true
  2062  	}
  2063  	return false
  2064  }
  2065  func rewriteValue_OpLsh16x16(v *ssa.Value) bool {
  2066  	v_1 := v.Args[1]
  2067  	v_0 := v.Args[0]
  2068  	b := v.Block
  2069  	typ := &b.Func.Config.Types
  2070  	// match: (Lsh16x16 <t> x y)
  2071  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2072  	for {
  2073  		t := v.Type
  2074  		x := v_0
  2075  		y := v_1
  2076  		v.Reset(ssaop.OpMIPS64AND)
  2077  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2078  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2079  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2080  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2081  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  2082  		v3.AddArg(y)
  2083  		v1.AddArg2(v2, v3)
  2084  		v0.AddArg(v1)
  2085  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2086  		v4.AddArg2(x, v3)
  2087  		v.AddArg2(v0, v4)
  2088  		return true
  2089  	}
  2090  }
  2091  func rewriteValue_OpLsh16x32(v *ssa.Value) bool {
  2092  	v_1 := v.Args[1]
  2093  	v_0 := v.Args[0]
  2094  	b := v.Block
  2095  	typ := &b.Func.Config.Types
  2096  	// match: (Lsh16x32 <t> x y)
  2097  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2098  	for {
  2099  		t := v.Type
  2100  		x := v_0
  2101  		y := v_1
  2102  		v.Reset(ssaop.OpMIPS64AND)
  2103  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2104  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2105  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2106  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2107  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  2108  		v3.AddArg(y)
  2109  		v1.AddArg2(v2, v3)
  2110  		v0.AddArg(v1)
  2111  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2112  		v4.AddArg2(x, v3)
  2113  		v.AddArg2(v0, v4)
  2114  		return true
  2115  	}
  2116  }
  2117  func rewriteValue_OpLsh16x64(v *ssa.Value) bool {
  2118  	v_1 := v.Args[1]
  2119  	v_0 := v.Args[0]
  2120  	b := v.Block
  2121  	typ := &b.Func.Config.Types
  2122  	// match: (Lsh16x64 <t> x y)
  2123  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2124  	for {
  2125  		t := v.Type
  2126  		x := v_0
  2127  		y := v_1
  2128  		v.Reset(ssaop.OpMIPS64AND)
  2129  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2130  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2131  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2132  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2133  		v1.AddArg2(v2, y)
  2134  		v0.AddArg(v1)
  2135  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2136  		v3.AddArg2(x, y)
  2137  		v.AddArg2(v0, v3)
  2138  		return true
  2139  	}
  2140  }
  2141  func rewriteValue_OpLsh16x8(v *ssa.Value) bool {
  2142  	v_1 := v.Args[1]
  2143  	v_0 := v.Args[0]
  2144  	b := v.Block
  2145  	typ := &b.Func.Config.Types
  2146  	// match: (Lsh16x8 <t> x y)
  2147  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2148  	for {
  2149  		t := v.Type
  2150  		x := v_0
  2151  		y := v_1
  2152  		v.Reset(ssaop.OpMIPS64AND)
  2153  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2154  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2155  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2156  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2157  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  2158  		v3.AddArg(y)
  2159  		v1.AddArg2(v2, v3)
  2160  		v0.AddArg(v1)
  2161  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2162  		v4.AddArg2(x, v3)
  2163  		v.AddArg2(v0, v4)
  2164  		return true
  2165  	}
  2166  }
  2167  func rewriteValue_OpLsh32x16(v *ssa.Value) bool {
  2168  	v_1 := v.Args[1]
  2169  	v_0 := v.Args[0]
  2170  	b := v.Block
  2171  	typ := &b.Func.Config.Types
  2172  	// match: (Lsh32x16 <t> x y)
  2173  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2174  	for {
  2175  		t := v.Type
  2176  		x := v_0
  2177  		y := v_1
  2178  		v.Reset(ssaop.OpMIPS64AND)
  2179  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2180  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2181  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2182  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2183  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  2184  		v3.AddArg(y)
  2185  		v1.AddArg2(v2, v3)
  2186  		v0.AddArg(v1)
  2187  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2188  		v4.AddArg2(x, v3)
  2189  		v.AddArg2(v0, v4)
  2190  		return true
  2191  	}
  2192  }
  2193  func rewriteValue_OpLsh32x32(v *ssa.Value) bool {
  2194  	v_1 := v.Args[1]
  2195  	v_0 := v.Args[0]
  2196  	b := v.Block
  2197  	typ := &b.Func.Config.Types
  2198  	// match: (Lsh32x32 <t> x y)
  2199  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2200  	for {
  2201  		t := v.Type
  2202  		x := v_0
  2203  		y := v_1
  2204  		v.Reset(ssaop.OpMIPS64AND)
  2205  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2206  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2207  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2208  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2209  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  2210  		v3.AddArg(y)
  2211  		v1.AddArg2(v2, v3)
  2212  		v0.AddArg(v1)
  2213  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2214  		v4.AddArg2(x, v3)
  2215  		v.AddArg2(v0, v4)
  2216  		return true
  2217  	}
  2218  }
  2219  func rewriteValue_OpLsh32x64(v *ssa.Value) bool {
  2220  	v_1 := v.Args[1]
  2221  	v_0 := v.Args[0]
  2222  	b := v.Block
  2223  	typ := &b.Func.Config.Types
  2224  	// match: (Lsh32x64 <t> x y)
  2225  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2226  	for {
  2227  		t := v.Type
  2228  		x := v_0
  2229  		y := v_1
  2230  		v.Reset(ssaop.OpMIPS64AND)
  2231  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2232  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2233  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2234  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2235  		v1.AddArg2(v2, y)
  2236  		v0.AddArg(v1)
  2237  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2238  		v3.AddArg2(x, y)
  2239  		v.AddArg2(v0, v3)
  2240  		return true
  2241  	}
  2242  }
  2243  func rewriteValue_OpLsh32x8(v *ssa.Value) bool {
  2244  	v_1 := v.Args[1]
  2245  	v_0 := v.Args[0]
  2246  	b := v.Block
  2247  	typ := &b.Func.Config.Types
  2248  	// match: (Lsh32x8 <t> x y)
  2249  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2250  	for {
  2251  		t := v.Type
  2252  		x := v_0
  2253  		y := v_1
  2254  		v.Reset(ssaop.OpMIPS64AND)
  2255  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2256  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2257  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2258  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2259  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  2260  		v3.AddArg(y)
  2261  		v1.AddArg2(v2, v3)
  2262  		v0.AddArg(v1)
  2263  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2264  		v4.AddArg2(x, v3)
  2265  		v.AddArg2(v0, v4)
  2266  		return true
  2267  	}
  2268  }
  2269  func rewriteValue_OpLsh64x16(v *ssa.Value) bool {
  2270  	v_1 := v.Args[1]
  2271  	v_0 := v.Args[0]
  2272  	b := v.Block
  2273  	typ := &b.Func.Config.Types
  2274  	// match: (Lsh64x16 <t> x y)
  2275  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2276  	for {
  2277  		t := v.Type
  2278  		x := v_0
  2279  		y := v_1
  2280  		v.Reset(ssaop.OpMIPS64AND)
  2281  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2282  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2283  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2284  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2285  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  2286  		v3.AddArg(y)
  2287  		v1.AddArg2(v2, v3)
  2288  		v0.AddArg(v1)
  2289  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2290  		v4.AddArg2(x, v3)
  2291  		v.AddArg2(v0, v4)
  2292  		return true
  2293  	}
  2294  }
  2295  func rewriteValue_OpLsh64x32(v *ssa.Value) bool {
  2296  	v_1 := v.Args[1]
  2297  	v_0 := v.Args[0]
  2298  	b := v.Block
  2299  	typ := &b.Func.Config.Types
  2300  	// match: (Lsh64x32 <t> x y)
  2301  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2302  	for {
  2303  		t := v.Type
  2304  		x := v_0
  2305  		y := v_1
  2306  		v.Reset(ssaop.OpMIPS64AND)
  2307  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2308  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2309  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2310  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2311  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  2312  		v3.AddArg(y)
  2313  		v1.AddArg2(v2, v3)
  2314  		v0.AddArg(v1)
  2315  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2316  		v4.AddArg2(x, v3)
  2317  		v.AddArg2(v0, v4)
  2318  		return true
  2319  	}
  2320  }
  2321  func rewriteValue_OpLsh64x64(v *ssa.Value) bool {
  2322  	v_1 := v.Args[1]
  2323  	v_0 := v.Args[0]
  2324  	b := v.Block
  2325  	typ := &b.Func.Config.Types
  2326  	// match: (Lsh64x64 <t> x y)
  2327  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2328  	for {
  2329  		t := v.Type
  2330  		x := v_0
  2331  		y := v_1
  2332  		v.Reset(ssaop.OpMIPS64AND)
  2333  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2334  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2335  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2336  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2337  		v1.AddArg2(v2, y)
  2338  		v0.AddArg(v1)
  2339  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2340  		v3.AddArg2(x, y)
  2341  		v.AddArg2(v0, v3)
  2342  		return true
  2343  	}
  2344  }
  2345  func rewriteValue_OpLsh64x8(v *ssa.Value) bool {
  2346  	v_1 := v.Args[1]
  2347  	v_0 := v.Args[0]
  2348  	b := v.Block
  2349  	typ := &b.Func.Config.Types
  2350  	// match: (Lsh64x8 <t> x y)
  2351  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2352  	for {
  2353  		t := v.Type
  2354  		x := v_0
  2355  		y := v_1
  2356  		v.Reset(ssaop.OpMIPS64AND)
  2357  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2358  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2359  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2360  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2361  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  2362  		v3.AddArg(y)
  2363  		v1.AddArg2(v2, v3)
  2364  		v0.AddArg(v1)
  2365  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2366  		v4.AddArg2(x, v3)
  2367  		v.AddArg2(v0, v4)
  2368  		return true
  2369  	}
  2370  }
  2371  func rewriteValue_OpLsh8x16(v *ssa.Value) bool {
  2372  	v_1 := v.Args[1]
  2373  	v_0 := v.Args[0]
  2374  	b := v.Block
  2375  	typ := &b.Func.Config.Types
  2376  	// match: (Lsh8x16 <t> x y)
  2377  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
  2378  	for {
  2379  		t := v.Type
  2380  		x := v_0
  2381  		y := v_1
  2382  		v.Reset(ssaop.OpMIPS64AND)
  2383  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2384  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2385  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2386  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2387  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  2388  		v3.AddArg(y)
  2389  		v1.AddArg2(v2, v3)
  2390  		v0.AddArg(v1)
  2391  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2392  		v4.AddArg2(x, v3)
  2393  		v.AddArg2(v0, v4)
  2394  		return true
  2395  	}
  2396  }
  2397  func rewriteValue_OpLsh8x32(v *ssa.Value) bool {
  2398  	v_1 := v.Args[1]
  2399  	v_0 := v.Args[0]
  2400  	b := v.Block
  2401  	typ := &b.Func.Config.Types
  2402  	// match: (Lsh8x32 <t> x y)
  2403  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
  2404  	for {
  2405  		t := v.Type
  2406  		x := v_0
  2407  		y := v_1
  2408  		v.Reset(ssaop.OpMIPS64AND)
  2409  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2410  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2411  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2412  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2413  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  2414  		v3.AddArg(y)
  2415  		v1.AddArg2(v2, v3)
  2416  		v0.AddArg(v1)
  2417  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2418  		v4.AddArg2(x, v3)
  2419  		v.AddArg2(v0, v4)
  2420  		return true
  2421  	}
  2422  }
  2423  func rewriteValue_OpLsh8x64(v *ssa.Value) bool {
  2424  	v_1 := v.Args[1]
  2425  	v_0 := v.Args[0]
  2426  	b := v.Block
  2427  	typ := &b.Func.Config.Types
  2428  	// match: (Lsh8x64 <t> x y)
  2429  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
  2430  	for {
  2431  		t := v.Type
  2432  		x := v_0
  2433  		y := v_1
  2434  		v.Reset(ssaop.OpMIPS64AND)
  2435  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2436  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2437  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2438  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2439  		v1.AddArg2(v2, y)
  2440  		v0.AddArg(v1)
  2441  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2442  		v3.AddArg2(x, y)
  2443  		v.AddArg2(v0, v3)
  2444  		return true
  2445  	}
  2446  }
  2447  func rewriteValue_OpLsh8x8(v *ssa.Value) bool {
  2448  	v_1 := v.Args[1]
  2449  	v_0 := v.Args[0]
  2450  	b := v.Block
  2451  	typ := &b.Func.Config.Types
  2452  	// match: (Lsh8x8 <t> x y)
  2453  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
  2454  	for {
  2455  		t := v.Type
  2456  		x := v_0
  2457  		y := v_1
  2458  		v.Reset(ssaop.OpMIPS64AND)
  2459  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  2460  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  2461  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  2462  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  2463  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  2464  		v3.AddArg(y)
  2465  		v1.AddArg2(v2, v3)
  2466  		v0.AddArg(v1)
  2467  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SLLV, t)
  2468  		v4.AddArg2(x, v3)
  2469  		v.AddArg2(v0, v4)
  2470  		return true
  2471  	}
  2472  }
  2473  func rewriteValue_OpMIPS64ADDV(v *ssa.Value) bool {
  2474  	v_1 := v.Args[1]
  2475  	v_0 := v.Args[0]
  2476  	// match: (ADDV x (MOVVconst <t> [c]))
  2477  	// cond: ssa.Is32Bit(c) && !t.IsPtr()
  2478  	// result: (ADDVconst [c] x)
  2479  	for {
  2480  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2481  			x := v_0
  2482  			if v_1.Op != ssaop.OpMIPS64MOVVconst {
  2483  				continue
  2484  			}
  2485  			t := v_1.Type
  2486  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  2487  			if !(ssa.Is32Bit(c) && !t.IsPtr()) {
  2488  				continue
  2489  			}
  2490  			v.Reset(ssaop.OpMIPS64ADDVconst)
  2491  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2492  			v.AddArg(x)
  2493  			return true
  2494  		}
  2495  		break
  2496  	}
  2497  	// match: (ADDV x (NEGV y))
  2498  	// result: (SUBV x y)
  2499  	for {
  2500  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2501  			x := v_0
  2502  			if v_1.Op != ssaop.OpMIPS64NEGV {
  2503  				continue
  2504  			}
  2505  			y := v_1.Args[0]
  2506  			v.Reset(ssaop.OpMIPS64SUBV)
  2507  			v.AddArg2(x, y)
  2508  			return true
  2509  		}
  2510  		break
  2511  	}
  2512  	return false
  2513  }
  2514  func rewriteValue_OpMIPS64ADDVconst(v *ssa.Value) bool {
  2515  	v_0 := v.Args[0]
  2516  	// match: (ADDVconst [off1] (MOVVaddr [off2] {sym} ptr))
  2517  	// cond: ssa.Is32Bit(off1+int64(off2))
  2518  	// result: (MOVVaddr [int32(off1)+int32(off2)] {sym} ptr)
  2519  	for {
  2520  		off1 := ssa.AuxIntToInt64(v.AuxInt)
  2521  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  2522  			break
  2523  		}
  2524  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  2525  		sym := ssa.AuxToSym(v_0.Aux)
  2526  		ptr := v_0.Args[0]
  2527  		if !(ssa.Is32Bit(off1 + int64(off2))) {
  2528  			break
  2529  		}
  2530  		v.Reset(ssaop.OpMIPS64MOVVaddr)
  2531  		v.AuxInt = ssa.Int32ToAuxInt(int32(off1) + int32(off2))
  2532  		v.Aux = ssa.SymToAux(sym)
  2533  		v.AddArg(ptr)
  2534  		return true
  2535  	}
  2536  	// match: (ADDVconst [0] x)
  2537  	// result: x
  2538  	for {
  2539  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  2540  			break
  2541  		}
  2542  		x := v_0
  2543  		v.CopyOf(x)
  2544  		return true
  2545  	}
  2546  	// match: (ADDVconst [c] (MOVVconst [d]))
  2547  	// result: (MOVVconst [c+d])
  2548  	for {
  2549  		c := ssa.AuxIntToInt64(v.AuxInt)
  2550  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  2551  			break
  2552  		}
  2553  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2554  		v.Reset(ssaop.OpMIPS64MOVVconst)
  2555  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  2556  		return true
  2557  	}
  2558  	// match: (ADDVconst [c] (ADDVconst [d] x))
  2559  	// cond: ssa.Is32Bit(c+d)
  2560  	// result: (ADDVconst [c+d] x)
  2561  	for {
  2562  		c := ssa.AuxIntToInt64(v.AuxInt)
  2563  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  2564  			break
  2565  		}
  2566  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2567  		x := v_0.Args[0]
  2568  		if !(ssa.Is32Bit(c + d)) {
  2569  			break
  2570  		}
  2571  		v.Reset(ssaop.OpMIPS64ADDVconst)
  2572  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  2573  		v.AddArg(x)
  2574  		return true
  2575  	}
  2576  	// match: (ADDVconst [c] (SUBVconst [d] x))
  2577  	// cond: ssa.Is32Bit(c-d)
  2578  	// result: (ADDVconst [c-d] x)
  2579  	for {
  2580  		c := ssa.AuxIntToInt64(v.AuxInt)
  2581  		if v_0.Op != ssaop.OpMIPS64SUBVconst {
  2582  			break
  2583  		}
  2584  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2585  		x := v_0.Args[0]
  2586  		if !(ssa.Is32Bit(c - d)) {
  2587  			break
  2588  		}
  2589  		v.Reset(ssaop.OpMIPS64ADDVconst)
  2590  		v.AuxInt = ssa.Int64ToAuxInt(c - d)
  2591  		v.AddArg(x)
  2592  		return true
  2593  	}
  2594  	return false
  2595  }
  2596  func rewriteValue_OpMIPS64AND(v *ssa.Value) bool {
  2597  	v_1 := v.Args[1]
  2598  	v_0 := v.Args[0]
  2599  	// match: (AND x (MOVVconst [c]))
  2600  	// cond: ssa.Is32Bit(c)
  2601  	// result: (ANDconst [c] x)
  2602  	for {
  2603  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2604  			x := v_0
  2605  			if v_1.Op != ssaop.OpMIPS64MOVVconst {
  2606  				continue
  2607  			}
  2608  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  2609  			if !(ssa.Is32Bit(c)) {
  2610  				continue
  2611  			}
  2612  			v.Reset(ssaop.OpMIPS64ANDconst)
  2613  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2614  			v.AddArg(x)
  2615  			return true
  2616  		}
  2617  		break
  2618  	}
  2619  	// match: (AND x x)
  2620  	// result: x
  2621  	for {
  2622  		x := v_0
  2623  		if x != v_1 {
  2624  			break
  2625  		}
  2626  		v.CopyOf(x)
  2627  		return true
  2628  	}
  2629  	return false
  2630  }
  2631  func rewriteValue_OpMIPS64ANDconst(v *ssa.Value) bool {
  2632  	v_0 := v.Args[0]
  2633  	// match: (ANDconst [0] _)
  2634  	// result: (MOVVconst [0])
  2635  	for {
  2636  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  2637  			break
  2638  		}
  2639  		v.Reset(ssaop.OpMIPS64MOVVconst)
  2640  		v.AuxInt = ssa.Int64ToAuxInt(0)
  2641  		return true
  2642  	}
  2643  	// match: (ANDconst [-1] x)
  2644  	// result: x
  2645  	for {
  2646  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
  2647  			break
  2648  		}
  2649  		x := v_0
  2650  		v.CopyOf(x)
  2651  		return true
  2652  	}
  2653  	// match: (ANDconst [c] (MOVVconst [d]))
  2654  	// result: (MOVVconst [c&d])
  2655  	for {
  2656  		c := ssa.AuxIntToInt64(v.AuxInt)
  2657  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  2658  			break
  2659  		}
  2660  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2661  		v.Reset(ssaop.OpMIPS64MOVVconst)
  2662  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  2663  		return true
  2664  	}
  2665  	// match: (ANDconst [c] (ANDconst [d] x))
  2666  	// result: (ANDconst [c&d] x)
  2667  	for {
  2668  		c := ssa.AuxIntToInt64(v.AuxInt)
  2669  		if v_0.Op != ssaop.OpMIPS64ANDconst {
  2670  			break
  2671  		}
  2672  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  2673  		x := v_0.Args[0]
  2674  		v.Reset(ssaop.OpMIPS64ANDconst)
  2675  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  2676  		v.AddArg(x)
  2677  		return true
  2678  	}
  2679  	return false
  2680  }
  2681  func rewriteValue_OpMIPS64LoweredAtomicAdd32(v *ssa.Value) bool {
  2682  	v_2 := v.Args[2]
  2683  	v_1 := v.Args[1]
  2684  	v_0 := v.Args[0]
  2685  	// match: (LoweredAtomicAdd32 ptr (MOVVconst [c]) mem)
  2686  	// cond: ssa.Is32Bit(c)
  2687  	// result: (LoweredAtomicAddconst32 [int32(c)] ptr mem)
  2688  	for {
  2689  		ptr := v_0
  2690  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  2691  			break
  2692  		}
  2693  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  2694  		mem := v_2
  2695  		if !(ssa.Is32Bit(c)) {
  2696  			break
  2697  		}
  2698  		v.Reset(ssaop.OpMIPS64LoweredAtomicAddconst32)
  2699  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  2700  		v.AddArg2(ptr, mem)
  2701  		return true
  2702  	}
  2703  	return false
  2704  }
  2705  func rewriteValue_OpMIPS64LoweredAtomicAdd64(v *ssa.Value) bool {
  2706  	v_2 := v.Args[2]
  2707  	v_1 := v.Args[1]
  2708  	v_0 := v.Args[0]
  2709  	// match: (LoweredAtomicAdd64 ptr (MOVVconst [c]) mem)
  2710  	// cond: ssa.Is32Bit(c)
  2711  	// result: (LoweredAtomicAddconst64 [c] ptr mem)
  2712  	for {
  2713  		ptr := v_0
  2714  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  2715  			break
  2716  		}
  2717  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  2718  		mem := v_2
  2719  		if !(ssa.Is32Bit(c)) {
  2720  			break
  2721  		}
  2722  		v.Reset(ssaop.OpMIPS64LoweredAtomicAddconst64)
  2723  		v.AuxInt = ssa.Int64ToAuxInt(c)
  2724  		v.AddArg2(ptr, mem)
  2725  		return true
  2726  	}
  2727  	return false
  2728  }
  2729  func rewriteValue_OpMIPS64LoweredAtomicStore32(v *ssa.Value) bool {
  2730  	v_2 := v.Args[2]
  2731  	v_1 := v.Args[1]
  2732  	v_0 := v.Args[0]
  2733  	// match: (LoweredAtomicStore32 ptr (MOVVconst [0]) mem)
  2734  	// result: (LoweredAtomicStorezero32 ptr mem)
  2735  	for {
  2736  		ptr := v_0
  2737  		if v_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  2738  			break
  2739  		}
  2740  		mem := v_2
  2741  		v.Reset(ssaop.OpMIPS64LoweredAtomicStorezero32)
  2742  		v.AddArg2(ptr, mem)
  2743  		return true
  2744  	}
  2745  	return false
  2746  }
  2747  func rewriteValue_OpMIPS64LoweredAtomicStore64(v *ssa.Value) bool {
  2748  	v_2 := v.Args[2]
  2749  	v_1 := v.Args[1]
  2750  	v_0 := v.Args[0]
  2751  	// match: (LoweredAtomicStore64 ptr (MOVVconst [0]) mem)
  2752  	// result: (LoweredAtomicStorezero64 ptr mem)
  2753  	for {
  2754  		ptr := v_0
  2755  		if v_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  2756  			break
  2757  		}
  2758  		mem := v_2
  2759  		v.Reset(ssaop.OpMIPS64LoweredAtomicStorezero64)
  2760  		v.AddArg2(ptr, mem)
  2761  		return true
  2762  	}
  2763  	return false
  2764  }
  2765  func rewriteValue_OpMIPS64LoweredPanicBoundsCR(v *ssa.Value) bool {
  2766  	v_1 := v.Args[1]
  2767  	v_0 := v.Args[0]
  2768  	// match: (LoweredPanicBoundsCR [kind] {p} (MOVVconst [c]) mem)
  2769  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:p.C, Cy:c}} mem)
  2770  	for {
  2771  		kind := ssa.AuxIntToInt64(v.AuxInt)
  2772  		p := ssa.AuxToPanicBoundsC(v.Aux)
  2773  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  2774  			break
  2775  		}
  2776  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  2777  		mem := v_1
  2778  		v.Reset(ssaop.OpMIPS64LoweredPanicBoundsCC)
  2779  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  2780  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: p.C, Cy: c})
  2781  		v.AddArg(mem)
  2782  		return true
  2783  	}
  2784  	return false
  2785  }
  2786  func rewriteValue_OpMIPS64LoweredPanicBoundsRC(v *ssa.Value) bool {
  2787  	v_1 := v.Args[1]
  2788  	v_0 := v.Args[0]
  2789  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVVconst [c]) mem)
  2790  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:c, Cy:p.C}} mem)
  2791  	for {
  2792  		kind := ssa.AuxIntToInt64(v.AuxInt)
  2793  		p := ssa.AuxToPanicBoundsC(v.Aux)
  2794  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  2795  			break
  2796  		}
  2797  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  2798  		mem := v_1
  2799  		v.Reset(ssaop.OpMIPS64LoweredPanicBoundsCC)
  2800  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  2801  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: c, Cy: p.C})
  2802  		v.AddArg(mem)
  2803  		return true
  2804  	}
  2805  	return false
  2806  }
  2807  func rewriteValue_OpMIPS64LoweredPanicBoundsRR(v *ssa.Value) bool {
  2808  	v_2 := v.Args[2]
  2809  	v_1 := v.Args[1]
  2810  	v_0 := v.Args[0]
  2811  	// match: (LoweredPanicBoundsRR [kind] x (MOVVconst [c]) mem)
  2812  	// result: (LoweredPanicBoundsRC [kind] x {ssa.PanicBoundsC{C:c}} mem)
  2813  	for {
  2814  		kind := ssa.AuxIntToInt64(v.AuxInt)
  2815  		x := v_0
  2816  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  2817  			break
  2818  		}
  2819  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  2820  		mem := v_2
  2821  		v.Reset(ssaop.OpMIPS64LoweredPanicBoundsRC)
  2822  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  2823  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  2824  		v.AddArg2(x, mem)
  2825  		return true
  2826  	}
  2827  	// match: (LoweredPanicBoundsRR [kind] (MOVVconst [c]) y mem)
  2828  	// result: (LoweredPanicBoundsCR [kind] {ssa.PanicBoundsC{C:c}} y mem)
  2829  	for {
  2830  		kind := ssa.AuxIntToInt64(v.AuxInt)
  2831  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  2832  			break
  2833  		}
  2834  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  2835  		y := v_1
  2836  		mem := v_2
  2837  		v.Reset(ssaop.OpMIPS64LoweredPanicBoundsCR)
  2838  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  2839  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  2840  		v.AddArg2(y, mem)
  2841  		return true
  2842  	}
  2843  	return false
  2844  }
  2845  func rewriteValue_OpMIPS64MOVBUload(v *ssa.Value) bool {
  2846  	v_1 := v.Args[1]
  2847  	v_0 := v.Args[0]
  2848  	b := v.Block
  2849  	config := b.Func.Config
  2850  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off] {sym} ptr x _))
  2851  	// result: (MOVBUreg x)
  2852  	for {
  2853  		off := ssa.AuxIntToInt32(v.AuxInt)
  2854  		sym := ssa.AuxToSym(v.Aux)
  2855  		ptr := v_0
  2856  		if v_1.Op != ssaop.OpMIPS64MOVBstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  2857  			break
  2858  		}
  2859  		x := v_1.Args[1]
  2860  		if ptr != v_1.Args[0] {
  2861  			break
  2862  		}
  2863  		v.Reset(ssaop.OpMIPS64MOVBUreg)
  2864  		v.AddArg(x)
  2865  		return true
  2866  	}
  2867  	// match: (MOVBUload [off1] {sym} (ADDVconst [off2] ptr) mem)
  2868  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  2869  	// result: (MOVBUload [off1+int32(off2)] {sym} ptr mem)
  2870  	for {
  2871  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  2872  		sym := ssa.AuxToSym(v.Aux)
  2873  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  2874  			break
  2875  		}
  2876  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  2877  		ptr := v_0.Args[0]
  2878  		mem := v_1
  2879  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  2880  			break
  2881  		}
  2882  		v.Reset(ssaop.OpMIPS64MOVBUload)
  2883  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  2884  		v.Aux = ssa.SymToAux(sym)
  2885  		v.AddArg2(ptr, mem)
  2886  		return true
  2887  	}
  2888  	// match: (MOVBUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  2889  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  2890  	// result: (MOVBUload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  2891  	for {
  2892  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  2893  		sym1 := ssa.AuxToSym(v.Aux)
  2894  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  2895  			break
  2896  		}
  2897  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  2898  		sym2 := ssa.AuxToSym(v_0.Aux)
  2899  		ptr := v_0.Args[0]
  2900  		mem := v_1
  2901  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  2902  			break
  2903  		}
  2904  		v.Reset(ssaop.OpMIPS64MOVBUload)
  2905  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  2906  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  2907  		v.AddArg2(ptr, mem)
  2908  		return true
  2909  	}
  2910  	// match: (MOVBUload [off] {sym} (SB) _)
  2911  	// cond: ssa.SymIsRO(sym)
  2912  	// result: (MOVVconst [int64(ssa.Read8(sym, int64(off)))])
  2913  	for {
  2914  		off := ssa.AuxIntToInt32(v.AuxInt)
  2915  		sym := ssa.AuxToSym(v.Aux)
  2916  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  2917  			break
  2918  		}
  2919  		v.Reset(ssaop.OpMIPS64MOVVconst)
  2920  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read8(sym, int64(off))))
  2921  		return true
  2922  	}
  2923  	return false
  2924  }
  2925  func rewriteValue_OpMIPS64MOVBUreg(v *ssa.Value) bool {
  2926  	v_0 := v.Args[0]
  2927  	// match: (MOVBUreg x:(MOVBUload _ _))
  2928  	// result: (MOVVreg x)
  2929  	for {
  2930  		x := v_0
  2931  		if x.Op != ssaop.OpMIPS64MOVBUload {
  2932  			break
  2933  		}
  2934  		v.Reset(ssaop.OpMIPS64MOVVreg)
  2935  		v.AddArg(x)
  2936  		return true
  2937  	}
  2938  	// match: (MOVBUreg x:(MOVBUreg _))
  2939  	// result: (MOVVreg x)
  2940  	for {
  2941  		x := v_0
  2942  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  2943  			break
  2944  		}
  2945  		v.Reset(ssaop.OpMIPS64MOVVreg)
  2946  		v.AddArg(x)
  2947  		return true
  2948  	}
  2949  	// match: (MOVBUreg (MOVVconst [c]))
  2950  	// result: (MOVVconst [int64(uint8(c))])
  2951  	for {
  2952  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  2953  			break
  2954  		}
  2955  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  2956  		v.Reset(ssaop.OpMIPS64MOVVconst)
  2957  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint8(c)))
  2958  		return true
  2959  	}
  2960  	return false
  2961  }
  2962  func rewriteValue_OpMIPS64MOVBload(v *ssa.Value) bool {
  2963  	v_1 := v.Args[1]
  2964  	v_0 := v.Args[0]
  2965  	b := v.Block
  2966  	config := b.Func.Config
  2967  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off] {sym} ptr x _))
  2968  	// result: (MOVBreg x)
  2969  	for {
  2970  		off := ssa.AuxIntToInt32(v.AuxInt)
  2971  		sym := ssa.AuxToSym(v.Aux)
  2972  		ptr := v_0
  2973  		if v_1.Op != ssaop.OpMIPS64MOVBstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  2974  			break
  2975  		}
  2976  		x := v_1.Args[1]
  2977  		if ptr != v_1.Args[0] {
  2978  			break
  2979  		}
  2980  		v.Reset(ssaop.OpMIPS64MOVBreg)
  2981  		v.AddArg(x)
  2982  		return true
  2983  	}
  2984  	// match: (MOVBload [off1] {sym} (ADDVconst [off2] ptr) mem)
  2985  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  2986  	// result: (MOVBload [off1+int32(off2)] {sym} ptr mem)
  2987  	for {
  2988  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  2989  		sym := ssa.AuxToSym(v.Aux)
  2990  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  2991  			break
  2992  		}
  2993  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  2994  		ptr := v_0.Args[0]
  2995  		mem := v_1
  2996  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  2997  			break
  2998  		}
  2999  		v.Reset(ssaop.OpMIPS64MOVBload)
  3000  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3001  		v.Aux = ssa.SymToAux(sym)
  3002  		v.AddArg2(ptr, mem)
  3003  		return true
  3004  	}
  3005  	// match: (MOVBload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3006  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3007  	// result: (MOVBload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3008  	for {
  3009  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3010  		sym1 := ssa.AuxToSym(v.Aux)
  3011  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3012  			break
  3013  		}
  3014  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3015  		sym2 := ssa.AuxToSym(v_0.Aux)
  3016  		ptr := v_0.Args[0]
  3017  		mem := v_1
  3018  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3019  			break
  3020  		}
  3021  		v.Reset(ssaop.OpMIPS64MOVBload)
  3022  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3023  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3024  		v.AddArg2(ptr, mem)
  3025  		return true
  3026  	}
  3027  	// match: (MOVBload [off] {sym} (SB) _)
  3028  	// cond: ssa.SymIsRO(sym)
  3029  	// result: (MOVVconst [int64(int8(ssa.Read8(sym, int64(off))))])
  3030  	for {
  3031  		off := ssa.AuxIntToInt32(v.AuxInt)
  3032  		sym := ssa.AuxToSym(v.Aux)
  3033  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  3034  			break
  3035  		}
  3036  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3037  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(ssa.Read8(sym, int64(off)))))
  3038  		return true
  3039  	}
  3040  	return false
  3041  }
  3042  func rewriteValue_OpMIPS64MOVBreg(v *ssa.Value) bool {
  3043  	v_0 := v.Args[0]
  3044  	// match: (MOVBreg x:(MOVBload _ _))
  3045  	// result: (MOVVreg x)
  3046  	for {
  3047  		x := v_0
  3048  		if x.Op != ssaop.OpMIPS64MOVBload {
  3049  			break
  3050  		}
  3051  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3052  		v.AddArg(x)
  3053  		return true
  3054  	}
  3055  	// match: (MOVBreg x:(MOVBreg _))
  3056  	// result: (MOVVreg x)
  3057  	for {
  3058  		x := v_0
  3059  		if x.Op != ssaop.OpMIPS64MOVBreg {
  3060  			break
  3061  		}
  3062  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3063  		v.AddArg(x)
  3064  		return true
  3065  	}
  3066  	// match: (MOVBreg (MOVVconst [c]))
  3067  	// result: (MOVVconst [int64(int8(c))])
  3068  	for {
  3069  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  3070  			break
  3071  		}
  3072  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3073  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3074  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(c)))
  3075  		return true
  3076  	}
  3077  	return false
  3078  }
  3079  func rewriteValue_OpMIPS64MOVBstore(v *ssa.Value) bool {
  3080  	v_2 := v.Args[2]
  3081  	v_1 := v.Args[1]
  3082  	v_0 := v.Args[0]
  3083  	b := v.Block
  3084  	config := b.Func.Config
  3085  	// match: (MOVBstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3086  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3087  	// result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem)
  3088  	for {
  3089  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3090  		sym := ssa.AuxToSym(v.Aux)
  3091  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3092  			break
  3093  		}
  3094  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3095  		ptr := v_0.Args[0]
  3096  		val := v_1
  3097  		mem := v_2
  3098  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3099  			break
  3100  		}
  3101  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3102  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3103  		v.Aux = ssa.SymToAux(sym)
  3104  		v.AddArg3(ptr, val, mem)
  3105  		return true
  3106  	}
  3107  	// match: (MOVBstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3108  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3109  	// result: (MOVBstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  3110  	for {
  3111  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3112  		sym1 := ssa.AuxToSym(v.Aux)
  3113  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3114  			break
  3115  		}
  3116  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3117  		sym2 := ssa.AuxToSym(v_0.Aux)
  3118  		ptr := v_0.Args[0]
  3119  		val := v_1
  3120  		mem := v_2
  3121  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3122  			break
  3123  		}
  3124  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3125  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3126  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3127  		v.AddArg3(ptr, val, mem)
  3128  		return true
  3129  	}
  3130  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  3131  	// result: (MOVBstore [off] {sym} ptr x mem)
  3132  	for {
  3133  		off := ssa.AuxIntToInt32(v.AuxInt)
  3134  		sym := ssa.AuxToSym(v.Aux)
  3135  		ptr := v_0
  3136  		if v_1.Op != ssaop.OpMIPS64MOVBreg {
  3137  			break
  3138  		}
  3139  		x := v_1.Args[0]
  3140  		mem := v_2
  3141  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3142  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3143  		v.Aux = ssa.SymToAux(sym)
  3144  		v.AddArg3(ptr, x, mem)
  3145  		return true
  3146  	}
  3147  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  3148  	// result: (MOVBstore [off] {sym} ptr x mem)
  3149  	for {
  3150  		off := ssa.AuxIntToInt32(v.AuxInt)
  3151  		sym := ssa.AuxToSym(v.Aux)
  3152  		ptr := v_0
  3153  		if v_1.Op != ssaop.OpMIPS64MOVBUreg {
  3154  			break
  3155  		}
  3156  		x := v_1.Args[0]
  3157  		mem := v_2
  3158  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3159  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3160  		v.Aux = ssa.SymToAux(sym)
  3161  		v.AddArg3(ptr, x, mem)
  3162  		return true
  3163  	}
  3164  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  3165  	// result: (MOVBstore [off] {sym} ptr x mem)
  3166  	for {
  3167  		off := ssa.AuxIntToInt32(v.AuxInt)
  3168  		sym := ssa.AuxToSym(v.Aux)
  3169  		ptr := v_0
  3170  		if v_1.Op != ssaop.OpMIPS64MOVHreg {
  3171  			break
  3172  		}
  3173  		x := v_1.Args[0]
  3174  		mem := v_2
  3175  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3176  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3177  		v.Aux = ssa.SymToAux(sym)
  3178  		v.AddArg3(ptr, x, mem)
  3179  		return true
  3180  	}
  3181  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  3182  	// result: (MOVBstore [off] {sym} ptr x mem)
  3183  	for {
  3184  		off := ssa.AuxIntToInt32(v.AuxInt)
  3185  		sym := ssa.AuxToSym(v.Aux)
  3186  		ptr := v_0
  3187  		if v_1.Op != ssaop.OpMIPS64MOVHUreg {
  3188  			break
  3189  		}
  3190  		x := v_1.Args[0]
  3191  		mem := v_2
  3192  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3193  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3194  		v.Aux = ssa.SymToAux(sym)
  3195  		v.AddArg3(ptr, x, mem)
  3196  		return true
  3197  	}
  3198  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  3199  	// result: (MOVBstore [off] {sym} ptr x mem)
  3200  	for {
  3201  		off := ssa.AuxIntToInt32(v.AuxInt)
  3202  		sym := ssa.AuxToSym(v.Aux)
  3203  		ptr := v_0
  3204  		if v_1.Op != ssaop.OpMIPS64MOVWreg {
  3205  			break
  3206  		}
  3207  		x := v_1.Args[0]
  3208  		mem := v_2
  3209  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3210  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3211  		v.Aux = ssa.SymToAux(sym)
  3212  		v.AddArg3(ptr, x, mem)
  3213  		return true
  3214  	}
  3215  	// match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem)
  3216  	// result: (MOVBstore [off] {sym} ptr x mem)
  3217  	for {
  3218  		off := ssa.AuxIntToInt32(v.AuxInt)
  3219  		sym := ssa.AuxToSym(v.Aux)
  3220  		ptr := v_0
  3221  		if v_1.Op != ssaop.OpMIPS64MOVWUreg {
  3222  			break
  3223  		}
  3224  		x := v_1.Args[0]
  3225  		mem := v_2
  3226  		v.Reset(ssaop.OpMIPS64MOVBstore)
  3227  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3228  		v.Aux = ssa.SymToAux(sym)
  3229  		v.AddArg3(ptr, x, mem)
  3230  		return true
  3231  	}
  3232  	return false
  3233  }
  3234  func rewriteValue_OpMIPS64MOVDF(v *ssa.Value) bool {
  3235  	v_0 := v.Args[0]
  3236  	// match: (MOVDF (ABSD (MOVFD x)))
  3237  	// result: (ABSF x)
  3238  	for {
  3239  		if v_0.Op != ssaop.OpMIPS64ABSD {
  3240  			break
  3241  		}
  3242  		v_0_0 := v_0.Args[0]
  3243  		if v_0_0.Op != ssaop.OpMIPS64MOVFD {
  3244  			break
  3245  		}
  3246  		x := v_0_0.Args[0]
  3247  		v.Reset(ssaop.OpMIPS64ABSF)
  3248  		v.AddArg(x)
  3249  		return true
  3250  	}
  3251  	// match: (MOVDF (SQRTD (MOVFD x)))
  3252  	// result: (SQRTF x)
  3253  	for {
  3254  		if v_0.Op != ssaop.OpMIPS64SQRTD {
  3255  			break
  3256  		}
  3257  		v_0_0 := v_0.Args[0]
  3258  		if v_0_0.Op != ssaop.OpMIPS64MOVFD {
  3259  			break
  3260  		}
  3261  		x := v_0_0.Args[0]
  3262  		v.Reset(ssaop.OpMIPS64SQRTF)
  3263  		v.AddArg(x)
  3264  		return true
  3265  	}
  3266  	return false
  3267  }
  3268  func rewriteValue_OpMIPS64MOVDload(v *ssa.Value) bool {
  3269  	v_1 := v.Args[1]
  3270  	v_0 := v.Args[0]
  3271  	b := v.Block
  3272  	config := b.Func.Config
  3273  	// match: (MOVDload [off] {sym} ptr (MOVVstore [off] {sym} ptr val _))
  3274  	// result: (MOVVgpfp val)
  3275  	for {
  3276  		off := ssa.AuxIntToInt32(v.AuxInt)
  3277  		sym := ssa.AuxToSym(v.Aux)
  3278  		ptr := v_0
  3279  		if v_1.Op != ssaop.OpMIPS64MOVVstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3280  			break
  3281  		}
  3282  		val := v_1.Args[1]
  3283  		if ptr != v_1.Args[0] {
  3284  			break
  3285  		}
  3286  		v.Reset(ssaop.OpMIPS64MOVVgpfp)
  3287  		v.AddArg(val)
  3288  		return true
  3289  	}
  3290  	// match: (MOVDload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3291  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3292  	// result: (MOVDload [off1+int32(off2)] {sym} ptr mem)
  3293  	for {
  3294  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3295  		sym := ssa.AuxToSym(v.Aux)
  3296  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3297  			break
  3298  		}
  3299  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3300  		ptr := v_0.Args[0]
  3301  		mem := v_1
  3302  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3303  			break
  3304  		}
  3305  		v.Reset(ssaop.OpMIPS64MOVDload)
  3306  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3307  		v.Aux = ssa.SymToAux(sym)
  3308  		v.AddArg2(ptr, mem)
  3309  		return true
  3310  	}
  3311  	// match: (MOVDload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3312  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3313  	// result: (MOVDload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3314  	for {
  3315  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3316  		sym1 := ssa.AuxToSym(v.Aux)
  3317  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3318  			break
  3319  		}
  3320  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3321  		sym2 := ssa.AuxToSym(v_0.Aux)
  3322  		ptr := v_0.Args[0]
  3323  		mem := v_1
  3324  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3325  			break
  3326  		}
  3327  		v.Reset(ssaop.OpMIPS64MOVDload)
  3328  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3329  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3330  		v.AddArg2(ptr, mem)
  3331  		return true
  3332  	}
  3333  	return false
  3334  }
  3335  func rewriteValue_OpMIPS64MOVDstore(v *ssa.Value) bool {
  3336  	v_2 := v.Args[2]
  3337  	v_1 := v.Args[1]
  3338  	v_0 := v.Args[0]
  3339  	b := v.Block
  3340  	config := b.Func.Config
  3341  	// match: (MOVDstore [off] {sym} ptr (MOVVgpfp val) mem)
  3342  	// result: (MOVVstore [off] {sym} ptr val mem)
  3343  	for {
  3344  		off := ssa.AuxIntToInt32(v.AuxInt)
  3345  		sym := ssa.AuxToSym(v.Aux)
  3346  		ptr := v_0
  3347  		if v_1.Op != ssaop.OpMIPS64MOVVgpfp {
  3348  			break
  3349  		}
  3350  		val := v_1.Args[0]
  3351  		mem := v_2
  3352  		v.Reset(ssaop.OpMIPS64MOVVstore)
  3353  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3354  		v.Aux = ssa.SymToAux(sym)
  3355  		v.AddArg3(ptr, val, mem)
  3356  		return true
  3357  	}
  3358  	// match: (MOVDstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3359  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3360  	// result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem)
  3361  	for {
  3362  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3363  		sym := ssa.AuxToSym(v.Aux)
  3364  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3365  			break
  3366  		}
  3367  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3368  		ptr := v_0.Args[0]
  3369  		val := v_1
  3370  		mem := v_2
  3371  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3372  			break
  3373  		}
  3374  		v.Reset(ssaop.OpMIPS64MOVDstore)
  3375  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3376  		v.Aux = ssa.SymToAux(sym)
  3377  		v.AddArg3(ptr, val, mem)
  3378  		return true
  3379  	}
  3380  	// match: (MOVDstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3381  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3382  	// result: (MOVDstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  3383  	for {
  3384  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3385  		sym1 := ssa.AuxToSym(v.Aux)
  3386  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3387  			break
  3388  		}
  3389  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3390  		sym2 := ssa.AuxToSym(v_0.Aux)
  3391  		ptr := v_0.Args[0]
  3392  		val := v_1
  3393  		mem := v_2
  3394  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3395  			break
  3396  		}
  3397  		v.Reset(ssaop.OpMIPS64MOVDstore)
  3398  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3399  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3400  		v.AddArg3(ptr, val, mem)
  3401  		return true
  3402  	}
  3403  	return false
  3404  }
  3405  func rewriteValue_OpMIPS64MOVFload(v *ssa.Value) bool {
  3406  	v_1 := v.Args[1]
  3407  	v_0 := v.Args[0]
  3408  	b := v.Block
  3409  	config := b.Func.Config
  3410  	// match: (MOVFload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  3411  	// result: (MOVWgpfp val)
  3412  	for {
  3413  		off := ssa.AuxIntToInt32(v.AuxInt)
  3414  		sym := ssa.AuxToSym(v.Aux)
  3415  		ptr := v_0
  3416  		if v_1.Op != ssaop.OpMIPS64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3417  			break
  3418  		}
  3419  		val := v_1.Args[1]
  3420  		if ptr != v_1.Args[0] {
  3421  			break
  3422  		}
  3423  		v.Reset(ssaop.OpMIPS64MOVWgpfp)
  3424  		v.AddArg(val)
  3425  		return true
  3426  	}
  3427  	// match: (MOVFload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3428  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3429  	// result: (MOVFload [off1+int32(off2)] {sym} ptr mem)
  3430  	for {
  3431  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3432  		sym := ssa.AuxToSym(v.Aux)
  3433  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3434  			break
  3435  		}
  3436  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3437  		ptr := v_0.Args[0]
  3438  		mem := v_1
  3439  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3440  			break
  3441  		}
  3442  		v.Reset(ssaop.OpMIPS64MOVFload)
  3443  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3444  		v.Aux = ssa.SymToAux(sym)
  3445  		v.AddArg2(ptr, mem)
  3446  		return true
  3447  	}
  3448  	// match: (MOVFload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3449  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3450  	// result: (MOVFload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3451  	for {
  3452  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3453  		sym1 := ssa.AuxToSym(v.Aux)
  3454  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3455  			break
  3456  		}
  3457  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3458  		sym2 := ssa.AuxToSym(v_0.Aux)
  3459  		ptr := v_0.Args[0]
  3460  		mem := v_1
  3461  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3462  			break
  3463  		}
  3464  		v.Reset(ssaop.OpMIPS64MOVFload)
  3465  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3466  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3467  		v.AddArg2(ptr, mem)
  3468  		return true
  3469  	}
  3470  	return false
  3471  }
  3472  func rewriteValue_OpMIPS64MOVFstore(v *ssa.Value) bool {
  3473  	v_2 := v.Args[2]
  3474  	v_1 := v.Args[1]
  3475  	v_0 := v.Args[0]
  3476  	b := v.Block
  3477  	config := b.Func.Config
  3478  	// match: (MOVFstore [off] {sym} ptr (MOVWgpfp val) mem)
  3479  	// result: (MOVWstore [off] {sym} ptr val mem)
  3480  	for {
  3481  		off := ssa.AuxIntToInt32(v.AuxInt)
  3482  		sym := ssa.AuxToSym(v.Aux)
  3483  		ptr := v_0
  3484  		if v_1.Op != ssaop.OpMIPS64MOVWgpfp {
  3485  			break
  3486  		}
  3487  		val := v_1.Args[0]
  3488  		mem := v_2
  3489  		v.Reset(ssaop.OpMIPS64MOVWstore)
  3490  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3491  		v.Aux = ssa.SymToAux(sym)
  3492  		v.AddArg3(ptr, val, mem)
  3493  		return true
  3494  	}
  3495  	// match: (MOVFstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3496  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3497  	// result: (MOVFstore [off1+int32(off2)] {sym} ptr val mem)
  3498  	for {
  3499  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3500  		sym := ssa.AuxToSym(v.Aux)
  3501  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3502  			break
  3503  		}
  3504  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3505  		ptr := v_0.Args[0]
  3506  		val := v_1
  3507  		mem := v_2
  3508  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3509  			break
  3510  		}
  3511  		v.Reset(ssaop.OpMIPS64MOVFstore)
  3512  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3513  		v.Aux = ssa.SymToAux(sym)
  3514  		v.AddArg3(ptr, val, mem)
  3515  		return true
  3516  	}
  3517  	// match: (MOVFstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3518  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3519  	// result: (MOVFstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  3520  	for {
  3521  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3522  		sym1 := ssa.AuxToSym(v.Aux)
  3523  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3524  			break
  3525  		}
  3526  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3527  		sym2 := ssa.AuxToSym(v_0.Aux)
  3528  		ptr := v_0.Args[0]
  3529  		val := v_1
  3530  		mem := v_2
  3531  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3532  			break
  3533  		}
  3534  		v.Reset(ssaop.OpMIPS64MOVFstore)
  3535  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3536  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3537  		v.AddArg3(ptr, val, mem)
  3538  		return true
  3539  	}
  3540  	return false
  3541  }
  3542  func rewriteValue_OpMIPS64MOVHUload(v *ssa.Value) bool {
  3543  	v_1 := v.Args[1]
  3544  	v_0 := v.Args[0]
  3545  	b := v.Block
  3546  	config := b.Func.Config
  3547  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off] {sym} ptr x _))
  3548  	// result: (MOVHUreg x)
  3549  	for {
  3550  		off := ssa.AuxIntToInt32(v.AuxInt)
  3551  		sym := ssa.AuxToSym(v.Aux)
  3552  		ptr := v_0
  3553  		if v_1.Op != ssaop.OpMIPS64MOVHstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3554  			break
  3555  		}
  3556  		x := v_1.Args[1]
  3557  		if ptr != v_1.Args[0] {
  3558  			break
  3559  		}
  3560  		v.Reset(ssaop.OpMIPS64MOVHUreg)
  3561  		v.AddArg(x)
  3562  		return true
  3563  	}
  3564  	// match: (MOVHUload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3565  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3566  	// result: (MOVHUload [off1+int32(off2)] {sym} ptr mem)
  3567  	for {
  3568  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3569  		sym := ssa.AuxToSym(v.Aux)
  3570  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3571  			break
  3572  		}
  3573  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3574  		ptr := v_0.Args[0]
  3575  		mem := v_1
  3576  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3577  			break
  3578  		}
  3579  		v.Reset(ssaop.OpMIPS64MOVHUload)
  3580  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3581  		v.Aux = ssa.SymToAux(sym)
  3582  		v.AddArg2(ptr, mem)
  3583  		return true
  3584  	}
  3585  	// match: (MOVHUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3586  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3587  	// result: (MOVHUload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3588  	for {
  3589  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3590  		sym1 := ssa.AuxToSym(v.Aux)
  3591  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3592  			break
  3593  		}
  3594  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3595  		sym2 := ssa.AuxToSym(v_0.Aux)
  3596  		ptr := v_0.Args[0]
  3597  		mem := v_1
  3598  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3599  			break
  3600  		}
  3601  		v.Reset(ssaop.OpMIPS64MOVHUload)
  3602  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3603  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3604  		v.AddArg2(ptr, mem)
  3605  		return true
  3606  	}
  3607  	// match: (MOVHUload [off] {sym} (SB) _)
  3608  	// cond: ssa.SymIsRO(sym)
  3609  	// result: (MOVVconst [int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
  3610  	for {
  3611  		off := ssa.AuxIntToInt32(v.AuxInt)
  3612  		sym := ssa.AuxToSym(v.Aux)
  3613  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  3614  			break
  3615  		}
  3616  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3617  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
  3618  		return true
  3619  	}
  3620  	return false
  3621  }
  3622  func rewriteValue_OpMIPS64MOVHUreg(v *ssa.Value) bool {
  3623  	v_0 := v.Args[0]
  3624  	// match: (MOVHUreg x:(MOVBUload _ _))
  3625  	// result: (MOVVreg x)
  3626  	for {
  3627  		x := v_0
  3628  		if x.Op != ssaop.OpMIPS64MOVBUload {
  3629  			break
  3630  		}
  3631  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3632  		v.AddArg(x)
  3633  		return true
  3634  	}
  3635  	// match: (MOVHUreg x:(MOVHUload _ _))
  3636  	// result: (MOVVreg x)
  3637  	for {
  3638  		x := v_0
  3639  		if x.Op != ssaop.OpMIPS64MOVHUload {
  3640  			break
  3641  		}
  3642  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3643  		v.AddArg(x)
  3644  		return true
  3645  	}
  3646  	// match: (MOVHUreg x:(MOVBUreg _))
  3647  	// result: (MOVVreg x)
  3648  	for {
  3649  		x := v_0
  3650  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  3651  			break
  3652  		}
  3653  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3654  		v.AddArg(x)
  3655  		return true
  3656  	}
  3657  	// match: (MOVHUreg x:(MOVHUreg _))
  3658  	// result: (MOVVreg x)
  3659  	for {
  3660  		x := v_0
  3661  		if x.Op != ssaop.OpMIPS64MOVHUreg {
  3662  			break
  3663  		}
  3664  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3665  		v.AddArg(x)
  3666  		return true
  3667  	}
  3668  	// match: (MOVHUreg (MOVVconst [c]))
  3669  	// result: (MOVVconst [int64(uint16(c))])
  3670  	for {
  3671  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  3672  			break
  3673  		}
  3674  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3675  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3676  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint16(c)))
  3677  		return true
  3678  	}
  3679  	return false
  3680  }
  3681  func rewriteValue_OpMIPS64MOVHload(v *ssa.Value) bool {
  3682  	v_1 := v.Args[1]
  3683  	v_0 := v.Args[0]
  3684  	b := v.Block
  3685  	config := b.Func.Config
  3686  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off] {sym} ptr x _))
  3687  	// result: (MOVHreg x)
  3688  	for {
  3689  		off := ssa.AuxIntToInt32(v.AuxInt)
  3690  		sym := ssa.AuxToSym(v.Aux)
  3691  		ptr := v_0
  3692  		if v_1.Op != ssaop.OpMIPS64MOVHstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3693  			break
  3694  		}
  3695  		x := v_1.Args[1]
  3696  		if ptr != v_1.Args[0] {
  3697  			break
  3698  		}
  3699  		v.Reset(ssaop.OpMIPS64MOVHreg)
  3700  		v.AddArg(x)
  3701  		return true
  3702  	}
  3703  	// match: (MOVHload [off1] {sym} (ADDVconst [off2] ptr) mem)
  3704  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3705  	// result: (MOVHload [off1+int32(off2)] {sym} ptr mem)
  3706  	for {
  3707  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3708  		sym := ssa.AuxToSym(v.Aux)
  3709  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3710  			break
  3711  		}
  3712  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3713  		ptr := v_0.Args[0]
  3714  		mem := v_1
  3715  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3716  			break
  3717  		}
  3718  		v.Reset(ssaop.OpMIPS64MOVHload)
  3719  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3720  		v.Aux = ssa.SymToAux(sym)
  3721  		v.AddArg2(ptr, mem)
  3722  		return true
  3723  	}
  3724  	// match: (MOVHload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  3725  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3726  	// result: (MOVHload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  3727  	for {
  3728  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3729  		sym1 := ssa.AuxToSym(v.Aux)
  3730  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3731  			break
  3732  		}
  3733  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3734  		sym2 := ssa.AuxToSym(v_0.Aux)
  3735  		ptr := v_0.Args[0]
  3736  		mem := v_1
  3737  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3738  			break
  3739  		}
  3740  		v.Reset(ssaop.OpMIPS64MOVHload)
  3741  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3742  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3743  		v.AddArg2(ptr, mem)
  3744  		return true
  3745  	}
  3746  	// match: (MOVHload [off] {sym} (SB) _)
  3747  	// cond: ssa.SymIsRO(sym)
  3748  	// result: (MOVVconst [int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
  3749  	for {
  3750  		off := ssa.AuxIntToInt32(v.AuxInt)
  3751  		sym := ssa.AuxToSym(v.Aux)
  3752  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  3753  			break
  3754  		}
  3755  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3756  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
  3757  		return true
  3758  	}
  3759  	return false
  3760  }
  3761  func rewriteValue_OpMIPS64MOVHreg(v *ssa.Value) bool {
  3762  	v_0 := v.Args[0]
  3763  	// match: (MOVHreg x:(MOVBload _ _))
  3764  	// result: (MOVVreg x)
  3765  	for {
  3766  		x := v_0
  3767  		if x.Op != ssaop.OpMIPS64MOVBload {
  3768  			break
  3769  		}
  3770  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3771  		v.AddArg(x)
  3772  		return true
  3773  	}
  3774  	// match: (MOVHreg x:(MOVBUload _ _))
  3775  	// result: (MOVVreg x)
  3776  	for {
  3777  		x := v_0
  3778  		if x.Op != ssaop.OpMIPS64MOVBUload {
  3779  			break
  3780  		}
  3781  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3782  		v.AddArg(x)
  3783  		return true
  3784  	}
  3785  	// match: (MOVHreg x:(MOVHload _ _))
  3786  	// result: (MOVVreg x)
  3787  	for {
  3788  		x := v_0
  3789  		if x.Op != ssaop.OpMIPS64MOVHload {
  3790  			break
  3791  		}
  3792  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3793  		v.AddArg(x)
  3794  		return true
  3795  	}
  3796  	// match: (MOVHreg x:(MOVBreg _))
  3797  	// result: (MOVVreg x)
  3798  	for {
  3799  		x := v_0
  3800  		if x.Op != ssaop.OpMIPS64MOVBreg {
  3801  			break
  3802  		}
  3803  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3804  		v.AddArg(x)
  3805  		return true
  3806  	}
  3807  	// match: (MOVHreg x:(MOVBUreg _))
  3808  	// result: (MOVVreg x)
  3809  	for {
  3810  		x := v_0
  3811  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  3812  			break
  3813  		}
  3814  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3815  		v.AddArg(x)
  3816  		return true
  3817  	}
  3818  	// match: (MOVHreg x:(MOVHreg _))
  3819  	// result: (MOVVreg x)
  3820  	for {
  3821  		x := v_0
  3822  		if x.Op != ssaop.OpMIPS64MOVHreg {
  3823  			break
  3824  		}
  3825  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3826  		v.AddArg(x)
  3827  		return true
  3828  	}
  3829  	// match: (MOVHreg (MOVVconst [c]))
  3830  	// result: (MOVVconst [int64(int16(c))])
  3831  	for {
  3832  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  3833  			break
  3834  		}
  3835  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3836  		v.Reset(ssaop.OpMIPS64MOVVconst)
  3837  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(c)))
  3838  		return true
  3839  	}
  3840  	return false
  3841  }
  3842  func rewriteValue_OpMIPS64MOVHstore(v *ssa.Value) bool {
  3843  	v_2 := v.Args[2]
  3844  	v_1 := v.Args[1]
  3845  	v_0 := v.Args[0]
  3846  	b := v.Block
  3847  	config := b.Func.Config
  3848  	// match: (MOVHstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  3849  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3850  	// result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem)
  3851  	for {
  3852  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3853  		sym := ssa.AuxToSym(v.Aux)
  3854  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  3855  			break
  3856  		}
  3857  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  3858  		ptr := v_0.Args[0]
  3859  		val := v_1
  3860  		mem := v_2
  3861  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3862  			break
  3863  		}
  3864  		v.Reset(ssaop.OpMIPS64MOVHstore)
  3865  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3866  		v.Aux = ssa.SymToAux(sym)
  3867  		v.AddArg3(ptr, val, mem)
  3868  		return true
  3869  	}
  3870  	// match: (MOVHstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  3871  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  3872  	// result: (MOVHstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  3873  	for {
  3874  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  3875  		sym1 := ssa.AuxToSym(v.Aux)
  3876  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  3877  			break
  3878  		}
  3879  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3880  		sym2 := ssa.AuxToSym(v_0.Aux)
  3881  		ptr := v_0.Args[0]
  3882  		val := v_1
  3883  		mem := v_2
  3884  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  3885  			break
  3886  		}
  3887  		v.Reset(ssaop.OpMIPS64MOVHstore)
  3888  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  3889  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  3890  		v.AddArg3(ptr, val, mem)
  3891  		return true
  3892  	}
  3893  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  3894  	// result: (MOVHstore [off] {sym} ptr x mem)
  3895  	for {
  3896  		off := ssa.AuxIntToInt32(v.AuxInt)
  3897  		sym := ssa.AuxToSym(v.Aux)
  3898  		ptr := v_0
  3899  		if v_1.Op != ssaop.OpMIPS64MOVHreg {
  3900  			break
  3901  		}
  3902  		x := v_1.Args[0]
  3903  		mem := v_2
  3904  		v.Reset(ssaop.OpMIPS64MOVHstore)
  3905  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3906  		v.Aux = ssa.SymToAux(sym)
  3907  		v.AddArg3(ptr, x, mem)
  3908  		return true
  3909  	}
  3910  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  3911  	// result: (MOVHstore [off] {sym} ptr x mem)
  3912  	for {
  3913  		off := ssa.AuxIntToInt32(v.AuxInt)
  3914  		sym := ssa.AuxToSym(v.Aux)
  3915  		ptr := v_0
  3916  		if v_1.Op != ssaop.OpMIPS64MOVHUreg {
  3917  			break
  3918  		}
  3919  		x := v_1.Args[0]
  3920  		mem := v_2
  3921  		v.Reset(ssaop.OpMIPS64MOVHstore)
  3922  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3923  		v.Aux = ssa.SymToAux(sym)
  3924  		v.AddArg3(ptr, x, mem)
  3925  		return true
  3926  	}
  3927  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  3928  	// result: (MOVHstore [off] {sym} ptr x mem)
  3929  	for {
  3930  		off := ssa.AuxIntToInt32(v.AuxInt)
  3931  		sym := ssa.AuxToSym(v.Aux)
  3932  		ptr := v_0
  3933  		if v_1.Op != ssaop.OpMIPS64MOVWreg {
  3934  			break
  3935  		}
  3936  		x := v_1.Args[0]
  3937  		mem := v_2
  3938  		v.Reset(ssaop.OpMIPS64MOVHstore)
  3939  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3940  		v.Aux = ssa.SymToAux(sym)
  3941  		v.AddArg3(ptr, x, mem)
  3942  		return true
  3943  	}
  3944  	// match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
  3945  	// result: (MOVHstore [off] {sym} ptr x mem)
  3946  	for {
  3947  		off := ssa.AuxIntToInt32(v.AuxInt)
  3948  		sym := ssa.AuxToSym(v.Aux)
  3949  		ptr := v_0
  3950  		if v_1.Op != ssaop.OpMIPS64MOVWUreg {
  3951  			break
  3952  		}
  3953  		x := v_1.Args[0]
  3954  		mem := v_2
  3955  		v.Reset(ssaop.OpMIPS64MOVHstore)
  3956  		v.AuxInt = ssa.Int32ToAuxInt(off)
  3957  		v.Aux = ssa.SymToAux(sym)
  3958  		v.AddArg3(ptr, x, mem)
  3959  		return true
  3960  	}
  3961  	return false
  3962  }
  3963  func rewriteValue_OpMIPS64MOVVload(v *ssa.Value) bool {
  3964  	v_1 := v.Args[1]
  3965  	v_0 := v.Args[0]
  3966  	b := v.Block
  3967  	config := b.Func.Config
  3968  	// match: (MOVVload [off] {sym} ptr (MOVDstore [off] {sym} ptr val _))
  3969  	// result: (MOVVfpgp val)
  3970  	for {
  3971  		off := ssa.AuxIntToInt32(v.AuxInt)
  3972  		sym := ssa.AuxToSym(v.Aux)
  3973  		ptr := v_0
  3974  		if v_1.Op != ssaop.OpMIPS64MOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3975  			break
  3976  		}
  3977  		val := v_1.Args[1]
  3978  		if ptr != v_1.Args[0] {
  3979  			break
  3980  		}
  3981  		v.Reset(ssaop.OpMIPS64MOVVfpgp)
  3982  		v.AddArg(val)
  3983  		return true
  3984  	}
  3985  	// match: (MOVVload [off] {sym} ptr (MOVVstore [off] {sym} ptr x _))
  3986  	// result: (MOVVreg x)
  3987  	for {
  3988  		off := ssa.AuxIntToInt32(v.AuxInt)
  3989  		sym := ssa.AuxToSym(v.Aux)
  3990  		ptr := v_0
  3991  		if v_1.Op != ssaop.OpMIPS64MOVVstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  3992  			break
  3993  		}
  3994  		x := v_1.Args[1]
  3995  		if ptr != v_1.Args[0] {
  3996  			break
  3997  		}
  3998  		v.Reset(ssaop.OpMIPS64MOVVreg)
  3999  		v.AddArg(x)
  4000  		return true
  4001  	}
  4002  	// match: (MOVVload [off1] {sym} (ADDVconst [off2] ptr) mem)
  4003  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4004  	// result: (MOVVload [off1+int32(off2)] {sym} ptr mem)
  4005  	for {
  4006  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4007  		sym := ssa.AuxToSym(v.Aux)
  4008  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4009  			break
  4010  		}
  4011  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4012  		ptr := v_0.Args[0]
  4013  		mem := v_1
  4014  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4015  			break
  4016  		}
  4017  		v.Reset(ssaop.OpMIPS64MOVVload)
  4018  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4019  		v.Aux = ssa.SymToAux(sym)
  4020  		v.AddArg2(ptr, mem)
  4021  		return true
  4022  	}
  4023  	// match: (MOVVload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  4024  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4025  	// result: (MOVVload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  4026  	for {
  4027  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4028  		sym1 := ssa.AuxToSym(v.Aux)
  4029  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4030  			break
  4031  		}
  4032  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4033  		sym2 := ssa.AuxToSym(v_0.Aux)
  4034  		ptr := v_0.Args[0]
  4035  		mem := v_1
  4036  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4037  			break
  4038  		}
  4039  		v.Reset(ssaop.OpMIPS64MOVVload)
  4040  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4041  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4042  		v.AddArg2(ptr, mem)
  4043  		return true
  4044  	}
  4045  	// match: (MOVVload [off] {sym} (SB) _)
  4046  	// cond: ssa.SymIsRO(sym)
  4047  	// result: (MOVVconst [int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
  4048  	for {
  4049  		off := ssa.AuxIntToInt32(v.AuxInt)
  4050  		sym := ssa.AuxToSym(v.Aux)
  4051  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  4052  			break
  4053  		}
  4054  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4055  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
  4056  		return true
  4057  	}
  4058  	return false
  4059  }
  4060  func rewriteValue_OpMIPS64MOVVnop(v *ssa.Value) bool {
  4061  	v_0 := v.Args[0]
  4062  	// match: (MOVVnop (MOVVconst [c]))
  4063  	// result: (MOVVconst [c])
  4064  	for {
  4065  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4066  			break
  4067  		}
  4068  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4069  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4070  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4071  		return true
  4072  	}
  4073  	return false
  4074  }
  4075  func rewriteValue_OpMIPS64MOVVreg(v *ssa.Value) bool {
  4076  	v_0 := v.Args[0]
  4077  	// match: (MOVVreg x)
  4078  	// cond: x.Uses == 1
  4079  	// result: (MOVVnop x)
  4080  	for {
  4081  		x := v_0
  4082  		if !(x.Uses == 1) {
  4083  			break
  4084  		}
  4085  		v.Reset(ssaop.OpMIPS64MOVVnop)
  4086  		v.AddArg(x)
  4087  		return true
  4088  	}
  4089  	// match: (MOVVreg (MOVVconst [c]))
  4090  	// result: (MOVVconst [c])
  4091  	for {
  4092  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4093  			break
  4094  		}
  4095  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4096  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4097  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4098  		return true
  4099  	}
  4100  	return false
  4101  }
  4102  func rewriteValue_OpMIPS64MOVVstore(v *ssa.Value) bool {
  4103  	v_2 := v.Args[2]
  4104  	v_1 := v.Args[1]
  4105  	v_0 := v.Args[0]
  4106  	b := v.Block
  4107  	config := b.Func.Config
  4108  	// match: (MOVVstore [off] {sym} ptr (MOVVfpgp val) mem)
  4109  	// result: (MOVDstore [off] {sym} ptr val mem)
  4110  	for {
  4111  		off := ssa.AuxIntToInt32(v.AuxInt)
  4112  		sym := ssa.AuxToSym(v.Aux)
  4113  		ptr := v_0
  4114  		if v_1.Op != ssaop.OpMIPS64MOVVfpgp {
  4115  			break
  4116  		}
  4117  		val := v_1.Args[0]
  4118  		mem := v_2
  4119  		v.Reset(ssaop.OpMIPS64MOVDstore)
  4120  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4121  		v.Aux = ssa.SymToAux(sym)
  4122  		v.AddArg3(ptr, val, mem)
  4123  		return true
  4124  	}
  4125  	// match: (MOVVstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  4126  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4127  	// result: (MOVVstore [off1+int32(off2)] {sym} ptr val mem)
  4128  	for {
  4129  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4130  		sym := ssa.AuxToSym(v.Aux)
  4131  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4132  			break
  4133  		}
  4134  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4135  		ptr := v_0.Args[0]
  4136  		val := v_1
  4137  		mem := v_2
  4138  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4139  			break
  4140  		}
  4141  		v.Reset(ssaop.OpMIPS64MOVVstore)
  4142  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4143  		v.Aux = ssa.SymToAux(sym)
  4144  		v.AddArg3(ptr, val, mem)
  4145  		return true
  4146  	}
  4147  	// match: (MOVVstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  4148  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4149  	// result: (MOVVstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  4150  	for {
  4151  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4152  		sym1 := ssa.AuxToSym(v.Aux)
  4153  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4154  			break
  4155  		}
  4156  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4157  		sym2 := ssa.AuxToSym(v_0.Aux)
  4158  		ptr := v_0.Args[0]
  4159  		val := v_1
  4160  		mem := v_2
  4161  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4162  			break
  4163  		}
  4164  		v.Reset(ssaop.OpMIPS64MOVVstore)
  4165  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4166  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4167  		v.AddArg3(ptr, val, mem)
  4168  		return true
  4169  	}
  4170  	return false
  4171  }
  4172  func rewriteValue_OpMIPS64MOVWUload(v *ssa.Value) bool {
  4173  	v_1 := v.Args[1]
  4174  	v_0 := v.Args[0]
  4175  	b := v.Block
  4176  	config := b.Func.Config
  4177  	typ := &b.Func.Config.Types
  4178  	// match: (MOVWUload [off] {sym} ptr (MOVFstore [off] {sym} ptr val _))
  4179  	// result: (ZeroExt32to64 (MOVWfpgp <typ.Float32> val))
  4180  	for {
  4181  		off := ssa.AuxIntToInt32(v.AuxInt)
  4182  		sym := ssa.AuxToSym(v.Aux)
  4183  		ptr := v_0
  4184  		if v_1.Op != ssaop.OpMIPS64MOVFstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  4185  			break
  4186  		}
  4187  		val := v_1.Args[1]
  4188  		if ptr != v_1.Args[0] {
  4189  			break
  4190  		}
  4191  		v.Reset(ssaop.OpZeroExt32to64)
  4192  		v0 := b.NewValue0(v_1.Pos, ssaop.OpMIPS64MOVWfpgp, typ.Float32)
  4193  		v0.AddArg(val)
  4194  		v.AddArg(v0)
  4195  		return true
  4196  	}
  4197  	// match: (MOVWUload [off] {sym} ptr (MOVWstore [off] {sym} ptr x _))
  4198  	// result: (MOVWUreg x)
  4199  	for {
  4200  		off := ssa.AuxIntToInt32(v.AuxInt)
  4201  		sym := ssa.AuxToSym(v.Aux)
  4202  		ptr := v_0
  4203  		if v_1.Op != ssaop.OpMIPS64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  4204  			break
  4205  		}
  4206  		x := v_1.Args[1]
  4207  		if ptr != v_1.Args[0] {
  4208  			break
  4209  		}
  4210  		v.Reset(ssaop.OpMIPS64MOVWUreg)
  4211  		v.AddArg(x)
  4212  		return true
  4213  	}
  4214  	// match: (MOVWUload [off1] {sym} (ADDVconst [off2] ptr) mem)
  4215  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4216  	// result: (MOVWUload [off1+int32(off2)] {sym} ptr mem)
  4217  	for {
  4218  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4219  		sym := ssa.AuxToSym(v.Aux)
  4220  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4221  			break
  4222  		}
  4223  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4224  		ptr := v_0.Args[0]
  4225  		mem := v_1
  4226  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4227  			break
  4228  		}
  4229  		v.Reset(ssaop.OpMIPS64MOVWUload)
  4230  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4231  		v.Aux = ssa.SymToAux(sym)
  4232  		v.AddArg2(ptr, mem)
  4233  		return true
  4234  	}
  4235  	// match: (MOVWUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  4236  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4237  	// result: (MOVWUload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  4238  	for {
  4239  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4240  		sym1 := ssa.AuxToSym(v.Aux)
  4241  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4242  			break
  4243  		}
  4244  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4245  		sym2 := ssa.AuxToSym(v_0.Aux)
  4246  		ptr := v_0.Args[0]
  4247  		mem := v_1
  4248  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4249  			break
  4250  		}
  4251  		v.Reset(ssaop.OpMIPS64MOVWUload)
  4252  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4253  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4254  		v.AddArg2(ptr, mem)
  4255  		return true
  4256  	}
  4257  	// match: (MOVWUload [off] {sym} (SB) _)
  4258  	// cond: ssa.SymIsRO(sym)
  4259  	// result: (MOVVconst [int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
  4260  	for {
  4261  		off := ssa.AuxIntToInt32(v.AuxInt)
  4262  		sym := ssa.AuxToSym(v.Aux)
  4263  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  4264  			break
  4265  		}
  4266  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4267  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
  4268  		return true
  4269  	}
  4270  	return false
  4271  }
  4272  func rewriteValue_OpMIPS64MOVWUreg(v *ssa.Value) bool {
  4273  	v_0 := v.Args[0]
  4274  	// match: (MOVWUreg x:(MOVBUload _ _))
  4275  	// result: (MOVVreg x)
  4276  	for {
  4277  		x := v_0
  4278  		if x.Op != ssaop.OpMIPS64MOVBUload {
  4279  			break
  4280  		}
  4281  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4282  		v.AddArg(x)
  4283  		return true
  4284  	}
  4285  	// match: (MOVWUreg x:(MOVHUload _ _))
  4286  	// result: (MOVVreg x)
  4287  	for {
  4288  		x := v_0
  4289  		if x.Op != ssaop.OpMIPS64MOVHUload {
  4290  			break
  4291  		}
  4292  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4293  		v.AddArg(x)
  4294  		return true
  4295  	}
  4296  	// match: (MOVWUreg x:(MOVWUload _ _))
  4297  	// result: (MOVVreg x)
  4298  	for {
  4299  		x := v_0
  4300  		if x.Op != ssaop.OpMIPS64MOVWUload {
  4301  			break
  4302  		}
  4303  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4304  		v.AddArg(x)
  4305  		return true
  4306  	}
  4307  	// match: (MOVWUreg x:(MOVBUreg _))
  4308  	// result: (MOVVreg x)
  4309  	for {
  4310  		x := v_0
  4311  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  4312  			break
  4313  		}
  4314  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4315  		v.AddArg(x)
  4316  		return true
  4317  	}
  4318  	// match: (MOVWUreg x:(MOVHUreg _))
  4319  	// result: (MOVVreg x)
  4320  	for {
  4321  		x := v_0
  4322  		if x.Op != ssaop.OpMIPS64MOVHUreg {
  4323  			break
  4324  		}
  4325  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4326  		v.AddArg(x)
  4327  		return true
  4328  	}
  4329  	// match: (MOVWUreg x:(MOVWUreg _))
  4330  	// result: (MOVVreg x)
  4331  	for {
  4332  		x := v_0
  4333  		if x.Op != ssaop.OpMIPS64MOVWUreg {
  4334  			break
  4335  		}
  4336  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4337  		v.AddArg(x)
  4338  		return true
  4339  	}
  4340  	// match: (MOVWUreg (MOVVconst [c]))
  4341  	// result: (MOVVconst [int64(uint32(c))])
  4342  	for {
  4343  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4344  			break
  4345  		}
  4346  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4347  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4348  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c)))
  4349  		return true
  4350  	}
  4351  	return false
  4352  }
  4353  func rewriteValue_OpMIPS64MOVWload(v *ssa.Value) bool {
  4354  	v_1 := v.Args[1]
  4355  	v_0 := v.Args[0]
  4356  	b := v.Block
  4357  	config := b.Func.Config
  4358  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off] {sym} ptr x _))
  4359  	// result: (MOVWreg x)
  4360  	for {
  4361  		off := ssa.AuxIntToInt32(v.AuxInt)
  4362  		sym := ssa.AuxToSym(v.Aux)
  4363  		ptr := v_0
  4364  		if v_1.Op != ssaop.OpMIPS64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  4365  			break
  4366  		}
  4367  		x := v_1.Args[1]
  4368  		if ptr != v_1.Args[0] {
  4369  			break
  4370  		}
  4371  		v.Reset(ssaop.OpMIPS64MOVWreg)
  4372  		v.AddArg(x)
  4373  		return true
  4374  	}
  4375  	// match: (MOVWload [off1] {sym} (ADDVconst [off2] ptr) mem)
  4376  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4377  	// result: (MOVWload [off1+int32(off2)] {sym} ptr mem)
  4378  	for {
  4379  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4380  		sym := ssa.AuxToSym(v.Aux)
  4381  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4382  			break
  4383  		}
  4384  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4385  		ptr := v_0.Args[0]
  4386  		mem := v_1
  4387  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4388  			break
  4389  		}
  4390  		v.Reset(ssaop.OpMIPS64MOVWload)
  4391  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4392  		v.Aux = ssa.SymToAux(sym)
  4393  		v.AddArg2(ptr, mem)
  4394  		return true
  4395  	}
  4396  	// match: (MOVWload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem)
  4397  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4398  	// result: (MOVWload [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr mem)
  4399  	for {
  4400  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4401  		sym1 := ssa.AuxToSym(v.Aux)
  4402  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4403  			break
  4404  		}
  4405  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4406  		sym2 := ssa.AuxToSym(v_0.Aux)
  4407  		ptr := v_0.Args[0]
  4408  		mem := v_1
  4409  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4410  			break
  4411  		}
  4412  		v.Reset(ssaop.OpMIPS64MOVWload)
  4413  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4414  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4415  		v.AddArg2(ptr, mem)
  4416  		return true
  4417  	}
  4418  	// match: (MOVWload [off] {sym} (SB) _)
  4419  	// cond: ssa.SymIsRO(sym)
  4420  	// result: (MOVVconst [int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
  4421  	for {
  4422  		off := ssa.AuxIntToInt32(v.AuxInt)
  4423  		sym := ssa.AuxToSym(v.Aux)
  4424  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
  4425  			break
  4426  		}
  4427  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4428  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
  4429  		return true
  4430  	}
  4431  	return false
  4432  }
  4433  func rewriteValue_OpMIPS64MOVWreg(v *ssa.Value) bool {
  4434  	v_0 := v.Args[0]
  4435  	// match: (MOVWreg x:(MOVBload _ _))
  4436  	// result: (MOVVreg x)
  4437  	for {
  4438  		x := v_0
  4439  		if x.Op != ssaop.OpMIPS64MOVBload {
  4440  			break
  4441  		}
  4442  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4443  		v.AddArg(x)
  4444  		return true
  4445  	}
  4446  	// match: (MOVWreg x:(MOVBUload _ _))
  4447  	// result: (MOVVreg x)
  4448  	for {
  4449  		x := v_0
  4450  		if x.Op != ssaop.OpMIPS64MOVBUload {
  4451  			break
  4452  		}
  4453  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4454  		v.AddArg(x)
  4455  		return true
  4456  	}
  4457  	// match: (MOVWreg x:(MOVHload _ _))
  4458  	// result: (MOVVreg x)
  4459  	for {
  4460  		x := v_0
  4461  		if x.Op != ssaop.OpMIPS64MOVHload {
  4462  			break
  4463  		}
  4464  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4465  		v.AddArg(x)
  4466  		return true
  4467  	}
  4468  	// match: (MOVWreg x:(MOVHUload _ _))
  4469  	// result: (MOVVreg x)
  4470  	for {
  4471  		x := v_0
  4472  		if x.Op != ssaop.OpMIPS64MOVHUload {
  4473  			break
  4474  		}
  4475  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4476  		v.AddArg(x)
  4477  		return true
  4478  	}
  4479  	// match: (MOVWreg x:(MOVWload _ _))
  4480  	// result: (MOVVreg x)
  4481  	for {
  4482  		x := v_0
  4483  		if x.Op != ssaop.OpMIPS64MOVWload {
  4484  			break
  4485  		}
  4486  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4487  		v.AddArg(x)
  4488  		return true
  4489  	}
  4490  	// match: (MOVWreg x:(MOVBreg _))
  4491  	// result: (MOVVreg x)
  4492  	for {
  4493  		x := v_0
  4494  		if x.Op != ssaop.OpMIPS64MOVBreg {
  4495  			break
  4496  		}
  4497  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4498  		v.AddArg(x)
  4499  		return true
  4500  	}
  4501  	// match: (MOVWreg x:(MOVBUreg _))
  4502  	// result: (MOVVreg x)
  4503  	for {
  4504  		x := v_0
  4505  		if x.Op != ssaop.OpMIPS64MOVBUreg {
  4506  			break
  4507  		}
  4508  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4509  		v.AddArg(x)
  4510  		return true
  4511  	}
  4512  	// match: (MOVWreg x:(MOVHreg _))
  4513  	// result: (MOVVreg x)
  4514  	for {
  4515  		x := v_0
  4516  		if x.Op != ssaop.OpMIPS64MOVHreg {
  4517  			break
  4518  		}
  4519  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4520  		v.AddArg(x)
  4521  		return true
  4522  	}
  4523  	// match: (MOVWreg x:(MOVWreg _))
  4524  	// result: (MOVVreg x)
  4525  	for {
  4526  		x := v_0
  4527  		if x.Op != ssaop.OpMIPS64MOVWreg {
  4528  			break
  4529  		}
  4530  		v.Reset(ssaop.OpMIPS64MOVVreg)
  4531  		v.AddArg(x)
  4532  		return true
  4533  	}
  4534  	// match: (MOVWreg (MOVVconst [c]))
  4535  	// result: (MOVVconst [int64(int32(c))])
  4536  	for {
  4537  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4538  			break
  4539  		}
  4540  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4541  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4542  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(c)))
  4543  		return true
  4544  	}
  4545  	return false
  4546  }
  4547  func rewriteValue_OpMIPS64MOVWstore(v *ssa.Value) bool {
  4548  	v_2 := v.Args[2]
  4549  	v_1 := v.Args[1]
  4550  	v_0 := v.Args[0]
  4551  	b := v.Block
  4552  	config := b.Func.Config
  4553  	// match: (MOVWstore [off] {sym} ptr (MOVWfpgp val) mem)
  4554  	// result: (MOVFstore [off] {sym} ptr val mem)
  4555  	for {
  4556  		off := ssa.AuxIntToInt32(v.AuxInt)
  4557  		sym := ssa.AuxToSym(v.Aux)
  4558  		ptr := v_0
  4559  		if v_1.Op != ssaop.OpMIPS64MOVWfpgp {
  4560  			break
  4561  		}
  4562  		val := v_1.Args[0]
  4563  		mem := v_2
  4564  		v.Reset(ssaop.OpMIPS64MOVFstore)
  4565  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4566  		v.Aux = ssa.SymToAux(sym)
  4567  		v.AddArg3(ptr, val, mem)
  4568  		return true
  4569  	}
  4570  	// match: (MOVWstore [off1] {sym} (ADDVconst [off2] ptr) val mem)
  4571  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4572  	// result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem)
  4573  	for {
  4574  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4575  		sym := ssa.AuxToSym(v.Aux)
  4576  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  4577  			break
  4578  		}
  4579  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  4580  		ptr := v_0.Args[0]
  4581  		val := v_1
  4582  		mem := v_2
  4583  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4584  			break
  4585  		}
  4586  		v.Reset(ssaop.OpMIPS64MOVWstore)
  4587  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4588  		v.Aux = ssa.SymToAux(sym)
  4589  		v.AddArg3(ptr, val, mem)
  4590  		return true
  4591  	}
  4592  	// match: (MOVWstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem)
  4593  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)
  4594  	// result: (MOVWstore [off1+int32(off2)] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  4595  	for {
  4596  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  4597  		sym1 := ssa.AuxToSym(v.Aux)
  4598  		if v_0.Op != ssaop.OpMIPS64MOVVaddr {
  4599  			break
  4600  		}
  4601  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  4602  		sym2 := ssa.AuxToSym(v_0.Aux)
  4603  		ptr := v_0.Args[0]
  4604  		val := v_1
  4605  		mem := v_2
  4606  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_shared)) {
  4607  			break
  4608  		}
  4609  		v.Reset(ssaop.OpMIPS64MOVWstore)
  4610  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  4611  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  4612  		v.AddArg3(ptr, val, mem)
  4613  		return true
  4614  	}
  4615  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  4616  	// result: (MOVWstore [off] {sym} ptr x mem)
  4617  	for {
  4618  		off := ssa.AuxIntToInt32(v.AuxInt)
  4619  		sym := ssa.AuxToSym(v.Aux)
  4620  		ptr := v_0
  4621  		if v_1.Op != ssaop.OpMIPS64MOVWreg {
  4622  			break
  4623  		}
  4624  		x := v_1.Args[0]
  4625  		mem := v_2
  4626  		v.Reset(ssaop.OpMIPS64MOVWstore)
  4627  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4628  		v.Aux = ssa.SymToAux(sym)
  4629  		v.AddArg3(ptr, x, mem)
  4630  		return true
  4631  	}
  4632  	// match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
  4633  	// result: (MOVWstore [off] {sym} ptr x mem)
  4634  	for {
  4635  		off := ssa.AuxIntToInt32(v.AuxInt)
  4636  		sym := ssa.AuxToSym(v.Aux)
  4637  		ptr := v_0
  4638  		if v_1.Op != ssaop.OpMIPS64MOVWUreg {
  4639  			break
  4640  		}
  4641  		x := v_1.Args[0]
  4642  		mem := v_2
  4643  		v.Reset(ssaop.OpMIPS64MOVWstore)
  4644  		v.AuxInt = ssa.Int32ToAuxInt(off)
  4645  		v.Aux = ssa.SymToAux(sym)
  4646  		v.AddArg3(ptr, x, mem)
  4647  		return true
  4648  	}
  4649  	return false
  4650  }
  4651  func rewriteValue_OpMIPS64NEGV(v *ssa.Value) bool {
  4652  	v_0 := v.Args[0]
  4653  	// match: (NEGV (SUBV x y))
  4654  	// result: (SUBV y x)
  4655  	for {
  4656  		if v_0.Op != ssaop.OpMIPS64SUBV {
  4657  			break
  4658  		}
  4659  		y := v_0.Args[1]
  4660  		x := v_0.Args[0]
  4661  		v.Reset(ssaop.OpMIPS64SUBV)
  4662  		v.AddArg2(y, x)
  4663  		return true
  4664  	}
  4665  	// match: (NEGV (NEGV x))
  4666  	// result: x
  4667  	for {
  4668  		if v_0.Op != ssaop.OpMIPS64NEGV {
  4669  			break
  4670  		}
  4671  		x := v_0.Args[0]
  4672  		v.CopyOf(x)
  4673  		return true
  4674  	}
  4675  	// match: (NEGV (MOVVconst [c]))
  4676  	// result: (MOVVconst [-c])
  4677  	for {
  4678  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4679  			break
  4680  		}
  4681  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4682  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4683  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  4684  		return true
  4685  	}
  4686  	return false
  4687  }
  4688  func rewriteValue_OpMIPS64OR(v *ssa.Value) bool {
  4689  	v_1 := v.Args[1]
  4690  	v_0 := v.Args[0]
  4691  	// match: (OR x (MOVVconst [c]))
  4692  	// cond: ssa.Is32Bit(c)
  4693  	// result: (ORconst [c] x)
  4694  	for {
  4695  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4696  			x := v_0
  4697  			if v_1.Op != ssaop.OpMIPS64MOVVconst {
  4698  				continue
  4699  			}
  4700  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4701  			if !(ssa.Is32Bit(c)) {
  4702  				continue
  4703  			}
  4704  			v.Reset(ssaop.OpMIPS64ORconst)
  4705  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4706  			v.AddArg(x)
  4707  			return true
  4708  		}
  4709  		break
  4710  	}
  4711  	// match: (OR x x)
  4712  	// result: x
  4713  	for {
  4714  		x := v_0
  4715  		if x != v_1 {
  4716  			break
  4717  		}
  4718  		v.CopyOf(x)
  4719  		return true
  4720  	}
  4721  	return false
  4722  }
  4723  func rewriteValue_OpMIPS64ORconst(v *ssa.Value) bool {
  4724  	v_0 := v.Args[0]
  4725  	// match: (ORconst [0] x)
  4726  	// result: x
  4727  	for {
  4728  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  4729  			break
  4730  		}
  4731  		x := v_0
  4732  		v.CopyOf(x)
  4733  		return true
  4734  	}
  4735  	// match: (ORconst [-1] _)
  4736  	// result: (MOVVconst [-1])
  4737  	for {
  4738  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
  4739  			break
  4740  		}
  4741  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4742  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  4743  		return true
  4744  	}
  4745  	// match: (ORconst [c] (MOVVconst [d]))
  4746  	// result: (MOVVconst [c|d])
  4747  	for {
  4748  		c := ssa.AuxIntToInt64(v.AuxInt)
  4749  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4750  			break
  4751  		}
  4752  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  4753  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4754  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
  4755  		return true
  4756  	}
  4757  	// match: (ORconst [c] (ORconst [d] x))
  4758  	// cond: ssa.Is32Bit(c|d)
  4759  	// result: (ORconst [c|d] x)
  4760  	for {
  4761  		c := ssa.AuxIntToInt64(v.AuxInt)
  4762  		if v_0.Op != ssaop.OpMIPS64ORconst {
  4763  			break
  4764  		}
  4765  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  4766  		x := v_0.Args[0]
  4767  		if !(ssa.Is32Bit(c | d)) {
  4768  			break
  4769  		}
  4770  		v.Reset(ssaop.OpMIPS64ORconst)
  4771  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
  4772  		v.AddArg(x)
  4773  		return true
  4774  	}
  4775  	return false
  4776  }
  4777  func rewriteValue_OpMIPS64SGT(v *ssa.Value) bool {
  4778  	v_1 := v.Args[1]
  4779  	v_0 := v.Args[0]
  4780  	// match: (SGT (MOVVconst [c]) x)
  4781  	// cond: ssa.Is32Bit(c)
  4782  	// result: (SGTconst [c] x)
  4783  	for {
  4784  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4785  			break
  4786  		}
  4787  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4788  		x := v_1
  4789  		if !(ssa.Is32Bit(c)) {
  4790  			break
  4791  		}
  4792  		v.Reset(ssaop.OpMIPS64SGTconst)
  4793  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4794  		v.AddArg(x)
  4795  		return true
  4796  	}
  4797  	// match: (SGT x x)
  4798  	// result: (MOVVconst [0])
  4799  	for {
  4800  		x := v_0
  4801  		if x != v_1 {
  4802  			break
  4803  		}
  4804  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4805  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4806  		return true
  4807  	}
  4808  	return false
  4809  }
  4810  func rewriteValue_OpMIPS64SGTU(v *ssa.Value) bool {
  4811  	v_1 := v.Args[1]
  4812  	v_0 := v.Args[0]
  4813  	// match: (SGTU (MOVVconst [c]) x)
  4814  	// cond: ssa.Is32Bit(c)
  4815  	// result: (SGTUconst [c] x)
  4816  	for {
  4817  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4818  			break
  4819  		}
  4820  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4821  		x := v_1
  4822  		if !(ssa.Is32Bit(c)) {
  4823  			break
  4824  		}
  4825  		v.Reset(ssaop.OpMIPS64SGTUconst)
  4826  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4827  		v.AddArg(x)
  4828  		return true
  4829  	}
  4830  	// match: (SGTU x x)
  4831  	// result: (MOVVconst [0])
  4832  	for {
  4833  		x := v_0
  4834  		if x != v_1 {
  4835  			break
  4836  		}
  4837  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4838  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4839  		return true
  4840  	}
  4841  	return false
  4842  }
  4843  func rewriteValue_OpMIPS64SGTUconst(v *ssa.Value) bool {
  4844  	v_0 := v.Args[0]
  4845  	// match: (SGTUconst [c] (MOVVconst [d]))
  4846  	// cond: uint64(c)>uint64(d)
  4847  	// result: (MOVVconst [1])
  4848  	for {
  4849  		c := ssa.AuxIntToInt64(v.AuxInt)
  4850  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4851  			break
  4852  		}
  4853  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  4854  		if !(uint64(c) > uint64(d)) {
  4855  			break
  4856  		}
  4857  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4858  		v.AuxInt = ssa.Int64ToAuxInt(1)
  4859  		return true
  4860  	}
  4861  	// match: (SGTUconst [c] (MOVVconst [d]))
  4862  	// cond: uint64(c)<=uint64(d)
  4863  	// result: (MOVVconst [0])
  4864  	for {
  4865  		c := ssa.AuxIntToInt64(v.AuxInt)
  4866  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4867  			break
  4868  		}
  4869  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  4870  		if !(uint64(c) <= uint64(d)) {
  4871  			break
  4872  		}
  4873  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4874  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4875  		return true
  4876  	}
  4877  	// match: (SGTUconst [c] (MOVBUreg _))
  4878  	// cond: 0xff < uint64(c)
  4879  	// result: (MOVVconst [1])
  4880  	for {
  4881  		c := ssa.AuxIntToInt64(v.AuxInt)
  4882  		if v_0.Op != ssaop.OpMIPS64MOVBUreg || !(0xff < uint64(c)) {
  4883  			break
  4884  		}
  4885  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4886  		v.AuxInt = ssa.Int64ToAuxInt(1)
  4887  		return true
  4888  	}
  4889  	// match: (SGTUconst [c] (MOVHUreg _))
  4890  	// cond: 0xffff < uint64(c)
  4891  	// result: (MOVVconst [1])
  4892  	for {
  4893  		c := ssa.AuxIntToInt64(v.AuxInt)
  4894  		if v_0.Op != ssaop.OpMIPS64MOVHUreg || !(0xffff < uint64(c)) {
  4895  			break
  4896  		}
  4897  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4898  		v.AuxInt = ssa.Int64ToAuxInt(1)
  4899  		return true
  4900  	}
  4901  	// match: (SGTUconst [c] (ANDconst [m] _))
  4902  	// cond: uint64(m) < uint64(c)
  4903  	// result: (MOVVconst [1])
  4904  	for {
  4905  		c := ssa.AuxIntToInt64(v.AuxInt)
  4906  		if v_0.Op != ssaop.OpMIPS64ANDconst {
  4907  			break
  4908  		}
  4909  		m := ssa.AuxIntToInt64(v_0.AuxInt)
  4910  		if !(uint64(m) < uint64(c)) {
  4911  			break
  4912  		}
  4913  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4914  		v.AuxInt = ssa.Int64ToAuxInt(1)
  4915  		return true
  4916  	}
  4917  	// match: (SGTUconst [c] (SRLVconst _ [d]))
  4918  	// cond: 0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)
  4919  	// result: (MOVVconst [1])
  4920  	for {
  4921  		c := ssa.AuxIntToInt64(v.AuxInt)
  4922  		if v_0.Op != ssaop.OpMIPS64SRLVconst {
  4923  			break
  4924  		}
  4925  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  4926  		if !(0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)) {
  4927  			break
  4928  		}
  4929  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4930  		v.AuxInt = ssa.Int64ToAuxInt(1)
  4931  		return true
  4932  	}
  4933  	return false
  4934  }
  4935  func rewriteValue_OpMIPS64SGTconst(v *ssa.Value) bool {
  4936  	v_0 := v.Args[0]
  4937  	// match: (SGTconst [c] (MOVVconst [d]))
  4938  	// cond: c>d
  4939  	// result: (MOVVconst [1])
  4940  	for {
  4941  		c := ssa.AuxIntToInt64(v.AuxInt)
  4942  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4943  			break
  4944  		}
  4945  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  4946  		if !(c > d) {
  4947  			break
  4948  		}
  4949  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4950  		v.AuxInt = ssa.Int64ToAuxInt(1)
  4951  		return true
  4952  	}
  4953  	// match: (SGTconst [c] (MOVVconst [d]))
  4954  	// cond: c<=d
  4955  	// result: (MOVVconst [0])
  4956  	for {
  4957  		c := ssa.AuxIntToInt64(v.AuxInt)
  4958  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  4959  			break
  4960  		}
  4961  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  4962  		if !(c <= d) {
  4963  			break
  4964  		}
  4965  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4966  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4967  		return true
  4968  	}
  4969  	// match: (SGTconst [c] (MOVBreg _))
  4970  	// cond: 0x7f < c
  4971  	// result: (MOVVconst [1])
  4972  	for {
  4973  		c := ssa.AuxIntToInt64(v.AuxInt)
  4974  		if v_0.Op != ssaop.OpMIPS64MOVBreg || !(0x7f < c) {
  4975  			break
  4976  		}
  4977  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4978  		v.AuxInt = ssa.Int64ToAuxInt(1)
  4979  		return true
  4980  	}
  4981  	// match: (SGTconst [c] (MOVBreg _))
  4982  	// cond: c <= -0x80
  4983  	// result: (MOVVconst [0])
  4984  	for {
  4985  		c := ssa.AuxIntToInt64(v.AuxInt)
  4986  		if v_0.Op != ssaop.OpMIPS64MOVBreg || !(c <= -0x80) {
  4987  			break
  4988  		}
  4989  		v.Reset(ssaop.OpMIPS64MOVVconst)
  4990  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4991  		return true
  4992  	}
  4993  	// match: (SGTconst [c] (MOVBUreg _))
  4994  	// cond: 0xff < c
  4995  	// result: (MOVVconst [1])
  4996  	for {
  4997  		c := ssa.AuxIntToInt64(v.AuxInt)
  4998  		if v_0.Op != ssaop.OpMIPS64MOVBUreg || !(0xff < c) {
  4999  			break
  5000  		}
  5001  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5002  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5003  		return true
  5004  	}
  5005  	// match: (SGTconst [c] (MOVBUreg _))
  5006  	// cond: c < 0
  5007  	// result: (MOVVconst [0])
  5008  	for {
  5009  		c := ssa.AuxIntToInt64(v.AuxInt)
  5010  		if v_0.Op != ssaop.OpMIPS64MOVBUreg || !(c < 0) {
  5011  			break
  5012  		}
  5013  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5014  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5015  		return true
  5016  	}
  5017  	// match: (SGTconst [c] (MOVHreg _))
  5018  	// cond: 0x7fff < c
  5019  	// result: (MOVVconst [1])
  5020  	for {
  5021  		c := ssa.AuxIntToInt64(v.AuxInt)
  5022  		if v_0.Op != ssaop.OpMIPS64MOVHreg || !(0x7fff < c) {
  5023  			break
  5024  		}
  5025  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5026  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5027  		return true
  5028  	}
  5029  	// match: (SGTconst [c] (MOVHreg _))
  5030  	// cond: c <= -0x8000
  5031  	// result: (MOVVconst [0])
  5032  	for {
  5033  		c := ssa.AuxIntToInt64(v.AuxInt)
  5034  		if v_0.Op != ssaop.OpMIPS64MOVHreg || !(c <= -0x8000) {
  5035  			break
  5036  		}
  5037  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5038  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5039  		return true
  5040  	}
  5041  	// match: (SGTconst [c] (MOVHUreg _))
  5042  	// cond: 0xffff < c
  5043  	// result: (MOVVconst [1])
  5044  	for {
  5045  		c := ssa.AuxIntToInt64(v.AuxInt)
  5046  		if v_0.Op != ssaop.OpMIPS64MOVHUreg || !(0xffff < c) {
  5047  			break
  5048  		}
  5049  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5050  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5051  		return true
  5052  	}
  5053  	// match: (SGTconst [c] (MOVHUreg _))
  5054  	// cond: c < 0
  5055  	// result: (MOVVconst [0])
  5056  	for {
  5057  		c := ssa.AuxIntToInt64(v.AuxInt)
  5058  		if v_0.Op != ssaop.OpMIPS64MOVHUreg || !(c < 0) {
  5059  			break
  5060  		}
  5061  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5062  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5063  		return true
  5064  	}
  5065  	// match: (SGTconst [c] (MOVWUreg _))
  5066  	// cond: c < 0
  5067  	// result: (MOVVconst [0])
  5068  	for {
  5069  		c := ssa.AuxIntToInt64(v.AuxInt)
  5070  		if v_0.Op != ssaop.OpMIPS64MOVWUreg || !(c < 0) {
  5071  			break
  5072  		}
  5073  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5074  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5075  		return true
  5076  	}
  5077  	// match: (SGTconst [c] (ANDconst [m] _))
  5078  	// cond: 0 <= m && m < c
  5079  	// result: (MOVVconst [1])
  5080  	for {
  5081  		c := ssa.AuxIntToInt64(v.AuxInt)
  5082  		if v_0.Op != ssaop.OpMIPS64ANDconst {
  5083  			break
  5084  		}
  5085  		m := ssa.AuxIntToInt64(v_0.AuxInt)
  5086  		if !(0 <= m && m < c) {
  5087  			break
  5088  		}
  5089  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5090  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5091  		return true
  5092  	}
  5093  	// match: (SGTconst [c] (SRLVconst _ [d]))
  5094  	// cond: 0 <= c && 0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)
  5095  	// result: (MOVVconst [1])
  5096  	for {
  5097  		c := ssa.AuxIntToInt64(v.AuxInt)
  5098  		if v_0.Op != ssaop.OpMIPS64SRLVconst {
  5099  			break
  5100  		}
  5101  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5102  		if !(0 <= c && 0 < d && d <= 63 && 0xffffffffffffffff>>uint64(d) < uint64(c)) {
  5103  			break
  5104  		}
  5105  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5106  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5107  		return true
  5108  	}
  5109  	return false
  5110  }
  5111  func rewriteValue_OpMIPS64SLLV(v *ssa.Value) bool {
  5112  	v_1 := v.Args[1]
  5113  	v_0 := v.Args[0]
  5114  	// match: (SLLV _ (MOVVconst [c]))
  5115  	// cond: uint64(c)>=64
  5116  	// result: (MOVVconst [0])
  5117  	for {
  5118  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5119  			break
  5120  		}
  5121  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5122  		if !(uint64(c) >= 64) {
  5123  			break
  5124  		}
  5125  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5126  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5127  		return true
  5128  	}
  5129  	// match: (SLLV x (MOVVconst [c]))
  5130  	// result: (SLLVconst x [c])
  5131  	for {
  5132  		x := v_0
  5133  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5134  			break
  5135  		}
  5136  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5137  		v.Reset(ssaop.OpMIPS64SLLVconst)
  5138  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5139  		v.AddArg(x)
  5140  		return true
  5141  	}
  5142  	return false
  5143  }
  5144  func rewriteValue_OpMIPS64SLLVconst(v *ssa.Value) bool {
  5145  	v_0 := v.Args[0]
  5146  	// match: (SLLVconst [c] (MOVVconst [d]))
  5147  	// result: (MOVVconst [d<<uint64(c)])
  5148  	for {
  5149  		c := ssa.AuxIntToInt64(v.AuxInt)
  5150  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5151  			break
  5152  		}
  5153  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5154  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5155  		v.AuxInt = ssa.Int64ToAuxInt(d << uint64(c))
  5156  		return true
  5157  	}
  5158  	return false
  5159  }
  5160  func rewriteValue_OpMIPS64SRAV(v *ssa.Value) bool {
  5161  	v_1 := v.Args[1]
  5162  	v_0 := v.Args[0]
  5163  	// match: (SRAV x (MOVVconst [c]))
  5164  	// cond: uint64(c)>=64
  5165  	// result: (SRAVconst x [63])
  5166  	for {
  5167  		x := v_0
  5168  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5169  			break
  5170  		}
  5171  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5172  		if !(uint64(c) >= 64) {
  5173  			break
  5174  		}
  5175  		v.Reset(ssaop.OpMIPS64SRAVconst)
  5176  		v.AuxInt = ssa.Int64ToAuxInt(63)
  5177  		v.AddArg(x)
  5178  		return true
  5179  	}
  5180  	// match: (SRAV x (MOVVconst [c]))
  5181  	// result: (SRAVconst x [c])
  5182  	for {
  5183  		x := v_0
  5184  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5185  			break
  5186  		}
  5187  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5188  		v.Reset(ssaop.OpMIPS64SRAVconst)
  5189  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5190  		v.AddArg(x)
  5191  		return true
  5192  	}
  5193  	return false
  5194  }
  5195  func rewriteValue_OpMIPS64SRAVconst(v *ssa.Value) bool {
  5196  	v_0 := v.Args[0]
  5197  	// match: (SRAVconst [c] (MOVVconst [d]))
  5198  	// result: (MOVVconst [d>>uint64(c)])
  5199  	for {
  5200  		c := ssa.AuxIntToInt64(v.AuxInt)
  5201  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5202  			break
  5203  		}
  5204  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5205  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5206  		v.AuxInt = ssa.Int64ToAuxInt(d >> uint64(c))
  5207  		return true
  5208  	}
  5209  	return false
  5210  }
  5211  func rewriteValue_OpMIPS64SRLV(v *ssa.Value) bool {
  5212  	v_1 := v.Args[1]
  5213  	v_0 := v.Args[0]
  5214  	// match: (SRLV _ (MOVVconst [c]))
  5215  	// cond: uint64(c)>=64
  5216  	// result: (MOVVconst [0])
  5217  	for {
  5218  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5219  			break
  5220  		}
  5221  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5222  		if !(uint64(c) >= 64) {
  5223  			break
  5224  		}
  5225  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5226  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5227  		return true
  5228  	}
  5229  	// match: (SRLV x (MOVVconst [c]))
  5230  	// result: (SRLVconst x [c])
  5231  	for {
  5232  		x := v_0
  5233  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5234  			break
  5235  		}
  5236  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5237  		v.Reset(ssaop.OpMIPS64SRLVconst)
  5238  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5239  		v.AddArg(x)
  5240  		return true
  5241  	}
  5242  	return false
  5243  }
  5244  func rewriteValue_OpMIPS64SRLVconst(v *ssa.Value) bool {
  5245  	v_0 := v.Args[0]
  5246  	// match: (SRLVconst [c] (MOVVconst [d]))
  5247  	// result: (MOVVconst [int64(uint64(d)>>uint64(c))])
  5248  	for {
  5249  		c := ssa.AuxIntToInt64(v.AuxInt)
  5250  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5251  			break
  5252  		}
  5253  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5254  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5255  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(d) >> uint64(c)))
  5256  		return true
  5257  	}
  5258  	return false
  5259  }
  5260  func rewriteValue_OpMIPS64SUBV(v *ssa.Value) bool {
  5261  	v_1 := v.Args[1]
  5262  	v_0 := v.Args[0]
  5263  	// match: (SUBV x (MOVVconst [c]))
  5264  	// cond: ssa.Is32Bit(c)
  5265  	// result: (SUBVconst [c] x)
  5266  	for {
  5267  		x := v_0
  5268  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5269  			break
  5270  		}
  5271  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5272  		if !(ssa.Is32Bit(c)) {
  5273  			break
  5274  		}
  5275  		v.Reset(ssaop.OpMIPS64SUBVconst)
  5276  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5277  		v.AddArg(x)
  5278  		return true
  5279  	}
  5280  	// match: (SUBV x (NEGV y))
  5281  	// result: (ADDV x y)
  5282  	for {
  5283  		x := v_0
  5284  		if v_1.Op != ssaop.OpMIPS64NEGV {
  5285  			break
  5286  		}
  5287  		y := v_1.Args[0]
  5288  		v.Reset(ssaop.OpMIPS64ADDV)
  5289  		v.AddArg2(x, y)
  5290  		return true
  5291  	}
  5292  	// match: (SUBV x x)
  5293  	// result: (MOVVconst [0])
  5294  	for {
  5295  		x := v_0
  5296  		if x != v_1 {
  5297  			break
  5298  		}
  5299  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5300  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5301  		return true
  5302  	}
  5303  	// match: (SUBV (MOVVconst [0]) x)
  5304  	// result: (NEGV x)
  5305  	for {
  5306  		if v_0.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5307  			break
  5308  		}
  5309  		x := v_1
  5310  		v.Reset(ssaop.OpMIPS64NEGV)
  5311  		v.AddArg(x)
  5312  		return true
  5313  	}
  5314  	return false
  5315  }
  5316  func rewriteValue_OpMIPS64SUBVconst(v *ssa.Value) bool {
  5317  	v_0 := v.Args[0]
  5318  	// match: (SUBVconst [0] x)
  5319  	// result: x
  5320  	for {
  5321  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  5322  			break
  5323  		}
  5324  		x := v_0
  5325  		v.CopyOf(x)
  5326  		return true
  5327  	}
  5328  	// match: (SUBVconst [c] (MOVVconst [d]))
  5329  	// result: (MOVVconst [d-c])
  5330  	for {
  5331  		c := ssa.AuxIntToInt64(v.AuxInt)
  5332  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5333  			break
  5334  		}
  5335  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5336  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5337  		v.AuxInt = ssa.Int64ToAuxInt(d - c)
  5338  		return true
  5339  	}
  5340  	// match: (SUBVconst [c] (SUBVconst [d] x))
  5341  	// cond: ssa.Is32Bit(-c-d)
  5342  	// result: (ADDVconst [-c-d] x)
  5343  	for {
  5344  		c := ssa.AuxIntToInt64(v.AuxInt)
  5345  		if v_0.Op != ssaop.OpMIPS64SUBVconst {
  5346  			break
  5347  		}
  5348  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5349  		x := v_0.Args[0]
  5350  		if !(ssa.Is32Bit(-c - d)) {
  5351  			break
  5352  		}
  5353  		v.Reset(ssaop.OpMIPS64ADDVconst)
  5354  		v.AuxInt = ssa.Int64ToAuxInt(-c - d)
  5355  		v.AddArg(x)
  5356  		return true
  5357  	}
  5358  	// match: (SUBVconst [c] (ADDVconst [d] x))
  5359  	// cond: ssa.Is32Bit(-c+d)
  5360  	// result: (ADDVconst [-c+d] x)
  5361  	for {
  5362  		c := ssa.AuxIntToInt64(v.AuxInt)
  5363  		if v_0.Op != ssaop.OpMIPS64ADDVconst {
  5364  			break
  5365  		}
  5366  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5367  		x := v_0.Args[0]
  5368  		if !(ssa.Is32Bit(-c + d)) {
  5369  			break
  5370  		}
  5371  		v.Reset(ssaop.OpMIPS64ADDVconst)
  5372  		v.AuxInt = ssa.Int64ToAuxInt(-c + d)
  5373  		v.AddArg(x)
  5374  		return true
  5375  	}
  5376  	return false
  5377  }
  5378  func rewriteValue_OpMIPS64XOR(v *ssa.Value) bool {
  5379  	v_1 := v.Args[1]
  5380  	v_0 := v.Args[0]
  5381  	// match: (XOR x (MOVVconst [c]))
  5382  	// cond: ssa.Is32Bit(c)
  5383  	// result: (XORconst [c] x)
  5384  	for {
  5385  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5386  			x := v_0
  5387  			if v_1.Op != ssaop.OpMIPS64MOVVconst {
  5388  				continue
  5389  			}
  5390  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  5391  			if !(ssa.Is32Bit(c)) {
  5392  				continue
  5393  			}
  5394  			v.Reset(ssaop.OpMIPS64XORconst)
  5395  			v.AuxInt = ssa.Int64ToAuxInt(c)
  5396  			v.AddArg(x)
  5397  			return true
  5398  		}
  5399  		break
  5400  	}
  5401  	// match: (XOR x x)
  5402  	// result: (MOVVconst [0])
  5403  	for {
  5404  		x := v_0
  5405  		if x != v_1 {
  5406  			break
  5407  		}
  5408  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5409  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5410  		return true
  5411  	}
  5412  	return false
  5413  }
  5414  func rewriteValue_OpMIPS64XORconst(v *ssa.Value) bool {
  5415  	v_0 := v.Args[0]
  5416  	// match: (XORconst [0] x)
  5417  	// result: x
  5418  	for {
  5419  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  5420  			break
  5421  		}
  5422  		x := v_0
  5423  		v.CopyOf(x)
  5424  		return true
  5425  	}
  5426  	// match: (XORconst [c] (MOVVconst [d]))
  5427  	// result: (MOVVconst [c^d])
  5428  	for {
  5429  		c := ssa.AuxIntToInt64(v.AuxInt)
  5430  		if v_0.Op != ssaop.OpMIPS64MOVVconst {
  5431  			break
  5432  		}
  5433  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5434  		v.Reset(ssaop.OpMIPS64MOVVconst)
  5435  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
  5436  		return true
  5437  	}
  5438  	// match: (XORconst [c] (XORconst [d] x))
  5439  	// cond: ssa.Is32Bit(c^d)
  5440  	// result: (XORconst [c^d] x)
  5441  	for {
  5442  		c := ssa.AuxIntToInt64(v.AuxInt)
  5443  		if v_0.Op != ssaop.OpMIPS64XORconst {
  5444  			break
  5445  		}
  5446  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  5447  		x := v_0.Args[0]
  5448  		if !(ssa.Is32Bit(c ^ d)) {
  5449  			break
  5450  		}
  5451  		v.Reset(ssaop.OpMIPS64XORconst)
  5452  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
  5453  		v.AddArg(x)
  5454  		return true
  5455  	}
  5456  	return false
  5457  }
  5458  func rewriteValue_OpMod16(v *ssa.Value) bool {
  5459  	v_1 := v.Args[1]
  5460  	v_0 := v.Args[0]
  5461  	b := v.Block
  5462  	typ := &b.Func.Config.Types
  5463  	// match: (Mod16 x y)
  5464  	// result: (Select0 (DIVV (SignExt16to64 x) (SignExt16to64 y)))
  5465  	for {
  5466  		x := v_0
  5467  		y := v_1
  5468  		v.Reset(ssaop.OpSelect0)
  5469  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5470  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  5471  		v1.AddArg(x)
  5472  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  5473  		v2.AddArg(y)
  5474  		v0.AddArg2(v1, v2)
  5475  		v.AddArg(v0)
  5476  		return true
  5477  	}
  5478  }
  5479  func rewriteValue_OpMod16u(v *ssa.Value) bool {
  5480  	v_1 := v.Args[1]
  5481  	v_0 := v.Args[0]
  5482  	b := v.Block
  5483  	typ := &b.Func.Config.Types
  5484  	// match: (Mod16u x y)
  5485  	// result: (Select0 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)))
  5486  	for {
  5487  		x := v_0
  5488  		y := v_1
  5489  		v.Reset(ssaop.OpSelect0)
  5490  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5491  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  5492  		v1.AddArg(x)
  5493  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  5494  		v2.AddArg(y)
  5495  		v0.AddArg2(v1, v2)
  5496  		v.AddArg(v0)
  5497  		return true
  5498  	}
  5499  }
  5500  func rewriteValue_OpMod32(v *ssa.Value) bool {
  5501  	v_1 := v.Args[1]
  5502  	v_0 := v.Args[0]
  5503  	b := v.Block
  5504  	typ := &b.Func.Config.Types
  5505  	// match: (Mod32 x y)
  5506  	// result: (Select0 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
  5507  	for {
  5508  		x := v_0
  5509  		y := v_1
  5510  		v.Reset(ssaop.OpSelect0)
  5511  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5512  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  5513  		v1.AddArg(x)
  5514  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  5515  		v2.AddArg(y)
  5516  		v0.AddArg2(v1, v2)
  5517  		v.AddArg(v0)
  5518  		return true
  5519  	}
  5520  }
  5521  func rewriteValue_OpMod32u(v *ssa.Value) bool {
  5522  	v_1 := v.Args[1]
  5523  	v_0 := v.Args[0]
  5524  	b := v.Block
  5525  	typ := &b.Func.Config.Types
  5526  	// match: (Mod32u x y)
  5527  	// result: (Select0 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)))
  5528  	for {
  5529  		x := v_0
  5530  		y := v_1
  5531  		v.Reset(ssaop.OpSelect0)
  5532  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5533  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  5534  		v1.AddArg(x)
  5535  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  5536  		v2.AddArg(y)
  5537  		v0.AddArg2(v1, v2)
  5538  		v.AddArg(v0)
  5539  		return true
  5540  	}
  5541  }
  5542  func rewriteValue_OpMod64(v *ssa.Value) bool {
  5543  	v_1 := v.Args[1]
  5544  	v_0 := v.Args[0]
  5545  	b := v.Block
  5546  	typ := &b.Func.Config.Types
  5547  	// match: (Mod64 x y)
  5548  	// result: (Select0 (DIVV x y))
  5549  	for {
  5550  		x := v_0
  5551  		y := v_1
  5552  		v.Reset(ssaop.OpSelect0)
  5553  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5554  		v0.AddArg2(x, y)
  5555  		v.AddArg(v0)
  5556  		return true
  5557  	}
  5558  }
  5559  func rewriteValue_OpMod64u(v *ssa.Value) bool {
  5560  	v_1 := v.Args[1]
  5561  	v_0 := v.Args[0]
  5562  	b := v.Block
  5563  	typ := &b.Func.Config.Types
  5564  	// match: (Mod64u x y)
  5565  	// result: (Select0 (DIVVU x y))
  5566  	for {
  5567  		x := v_0
  5568  		y := v_1
  5569  		v.Reset(ssaop.OpSelect0)
  5570  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5571  		v0.AddArg2(x, y)
  5572  		v.AddArg(v0)
  5573  		return true
  5574  	}
  5575  }
  5576  func rewriteValue_OpMod8(v *ssa.Value) bool {
  5577  	v_1 := v.Args[1]
  5578  	v_0 := v.Args[0]
  5579  	b := v.Block
  5580  	typ := &b.Func.Config.Types
  5581  	// match: (Mod8 x y)
  5582  	// result: (Select0 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
  5583  	for {
  5584  		x := v_0
  5585  		y := v_1
  5586  		v.Reset(ssaop.OpSelect0)
  5587  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
  5588  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  5589  		v1.AddArg(x)
  5590  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  5591  		v2.AddArg(y)
  5592  		v0.AddArg2(v1, v2)
  5593  		v.AddArg(v0)
  5594  		return true
  5595  	}
  5596  }
  5597  func rewriteValue_OpMod8u(v *ssa.Value) bool {
  5598  	v_1 := v.Args[1]
  5599  	v_0 := v.Args[0]
  5600  	b := v.Block
  5601  	typ := &b.Func.Config.Types
  5602  	// match: (Mod8u x y)
  5603  	// result: (Select0 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)))
  5604  	for {
  5605  		x := v_0
  5606  		y := v_1
  5607  		v.Reset(ssaop.OpSelect0)
  5608  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
  5609  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  5610  		v1.AddArg(x)
  5611  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  5612  		v2.AddArg(y)
  5613  		v0.AddArg2(v1, v2)
  5614  		v.AddArg(v0)
  5615  		return true
  5616  	}
  5617  }
  5618  func rewriteValue_OpMove(v *ssa.Value) bool {
  5619  	v_2 := v.Args[2]
  5620  	v_1 := v.Args[1]
  5621  	v_0 := v.Args[0]
  5622  	b := v.Block
  5623  	config := b.Func.Config
  5624  	typ := &b.Func.Config.Types
  5625  	// match: (Move [0] _ _ mem)
  5626  	// result: mem
  5627  	for {
  5628  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  5629  			break
  5630  		}
  5631  		mem := v_2
  5632  		v.CopyOf(mem)
  5633  		return true
  5634  	}
  5635  	// match: (Move [1] dst src mem)
  5636  	// result: (MOVBstore dst (MOVBload src mem) mem)
  5637  	for {
  5638  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
  5639  			break
  5640  		}
  5641  		dst := v_0
  5642  		src := v_1
  5643  		mem := v_2
  5644  		v.Reset(ssaop.OpMIPS64MOVBstore)
  5645  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5646  		v0.AddArg2(src, mem)
  5647  		v.AddArg3(dst, v0, mem)
  5648  		return true
  5649  	}
  5650  	// match: (Move [2] {t} dst src mem)
  5651  	// cond: t.Alignment()%2 == 0
  5652  	// result: (MOVHstore dst (MOVHload src mem) mem)
  5653  	for {
  5654  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
  5655  			break
  5656  		}
  5657  		t := ssa.AuxToType(v.Aux)
  5658  		dst := v_0
  5659  		src := v_1
  5660  		mem := v_2
  5661  		if !(t.Alignment()%2 == 0) {
  5662  			break
  5663  		}
  5664  		v.Reset(ssaop.OpMIPS64MOVHstore)
  5665  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5666  		v0.AddArg2(src, mem)
  5667  		v.AddArg3(dst, v0, mem)
  5668  		return true
  5669  	}
  5670  	// match: (Move [2] dst src mem)
  5671  	// result: (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem))
  5672  	for {
  5673  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
  5674  			break
  5675  		}
  5676  		dst := v_0
  5677  		src := v_1
  5678  		mem := v_2
  5679  		v.Reset(ssaop.OpMIPS64MOVBstore)
  5680  		v.AuxInt = ssa.Int32ToAuxInt(1)
  5681  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5682  		v0.AuxInt = ssa.Int32ToAuxInt(1)
  5683  		v0.AddArg2(src, mem)
  5684  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  5685  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5686  		v2.AddArg2(src, mem)
  5687  		v1.AddArg3(dst, v2, mem)
  5688  		v.AddArg3(dst, v0, v1)
  5689  		return true
  5690  	}
  5691  	// match: (Move [4] {t} dst src mem)
  5692  	// cond: t.Alignment()%4 == 0
  5693  	// result: (MOVWstore dst (MOVWload src mem) mem)
  5694  	for {
  5695  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  5696  			break
  5697  		}
  5698  		t := ssa.AuxToType(v.Aux)
  5699  		dst := v_0
  5700  		src := v_1
  5701  		mem := v_2
  5702  		if !(t.Alignment()%4 == 0) {
  5703  			break
  5704  		}
  5705  		v.Reset(ssaop.OpMIPS64MOVWstore)
  5706  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  5707  		v0.AddArg2(src, mem)
  5708  		v.AddArg3(dst, v0, mem)
  5709  		return true
  5710  	}
  5711  	// match: (Move [4] {t} dst src mem)
  5712  	// cond: t.Alignment()%2 == 0
  5713  	// result: (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))
  5714  	for {
  5715  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  5716  			break
  5717  		}
  5718  		t := ssa.AuxToType(v.Aux)
  5719  		dst := v_0
  5720  		src := v_1
  5721  		mem := v_2
  5722  		if !(t.Alignment()%2 == 0) {
  5723  			break
  5724  		}
  5725  		v.Reset(ssaop.OpMIPS64MOVHstore)
  5726  		v.AuxInt = ssa.Int32ToAuxInt(2)
  5727  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5728  		v0.AuxInt = ssa.Int32ToAuxInt(2)
  5729  		v0.AddArg2(src, mem)
  5730  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  5731  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5732  		v2.AddArg2(src, mem)
  5733  		v1.AddArg3(dst, v2, mem)
  5734  		v.AddArg3(dst, v0, v1)
  5735  		return true
  5736  	}
  5737  	// match: (Move [4] dst src mem)
  5738  	// result: (MOVBstore [3] dst (MOVBload [3] src mem) (MOVBstore [2] dst (MOVBload [2] src mem) (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem))))
  5739  	for {
  5740  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  5741  			break
  5742  		}
  5743  		dst := v_0
  5744  		src := v_1
  5745  		mem := v_2
  5746  		v.Reset(ssaop.OpMIPS64MOVBstore)
  5747  		v.AuxInt = ssa.Int32ToAuxInt(3)
  5748  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5749  		v0.AuxInt = ssa.Int32ToAuxInt(3)
  5750  		v0.AddArg2(src, mem)
  5751  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  5752  		v1.AuxInt = ssa.Int32ToAuxInt(2)
  5753  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5754  		v2.AuxInt = ssa.Int32ToAuxInt(2)
  5755  		v2.AddArg2(src, mem)
  5756  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  5757  		v3.AuxInt = ssa.Int32ToAuxInt(1)
  5758  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5759  		v4.AuxInt = ssa.Int32ToAuxInt(1)
  5760  		v4.AddArg2(src, mem)
  5761  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  5762  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5763  		v6.AddArg2(src, mem)
  5764  		v5.AddArg3(dst, v6, mem)
  5765  		v3.AddArg3(dst, v4, v5)
  5766  		v1.AddArg3(dst, v2, v3)
  5767  		v.AddArg3(dst, v0, v1)
  5768  		return true
  5769  	}
  5770  	// match: (Move [8] {t} dst src mem)
  5771  	// cond: t.Alignment()%8 == 0
  5772  	// result: (MOVVstore dst (MOVVload src mem) mem)
  5773  	for {
  5774  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  5775  			break
  5776  		}
  5777  		t := ssa.AuxToType(v.Aux)
  5778  		dst := v_0
  5779  		src := v_1
  5780  		mem := v_2
  5781  		if !(t.Alignment()%8 == 0) {
  5782  			break
  5783  		}
  5784  		v.Reset(ssaop.OpMIPS64MOVVstore)
  5785  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  5786  		v0.AddArg2(src, mem)
  5787  		v.AddArg3(dst, v0, mem)
  5788  		return true
  5789  	}
  5790  	// match: (Move [8] {t} dst src mem)
  5791  	// cond: t.Alignment()%4 == 0
  5792  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  5793  	for {
  5794  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  5795  			break
  5796  		}
  5797  		t := ssa.AuxToType(v.Aux)
  5798  		dst := v_0
  5799  		src := v_1
  5800  		mem := v_2
  5801  		if !(t.Alignment()%4 == 0) {
  5802  			break
  5803  		}
  5804  		v.Reset(ssaop.OpMIPS64MOVWstore)
  5805  		v.AuxInt = ssa.Int32ToAuxInt(4)
  5806  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  5807  		v0.AuxInt = ssa.Int32ToAuxInt(4)
  5808  		v0.AddArg2(src, mem)
  5809  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  5810  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  5811  		v2.AddArg2(src, mem)
  5812  		v1.AddArg3(dst, v2, mem)
  5813  		v.AddArg3(dst, v0, v1)
  5814  		return true
  5815  	}
  5816  	// match: (Move [8] {t} dst src mem)
  5817  	// cond: t.Alignment()%2 == 0
  5818  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  5819  	for {
  5820  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  5821  			break
  5822  		}
  5823  		t := ssa.AuxToType(v.Aux)
  5824  		dst := v_0
  5825  		src := v_1
  5826  		mem := v_2
  5827  		if !(t.Alignment()%2 == 0) {
  5828  			break
  5829  		}
  5830  		v.Reset(ssaop.OpMIPS64MOVHstore)
  5831  		v.AuxInt = ssa.Int32ToAuxInt(6)
  5832  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5833  		v0.AuxInt = ssa.Int32ToAuxInt(6)
  5834  		v0.AddArg2(src, mem)
  5835  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  5836  		v1.AuxInt = ssa.Int32ToAuxInt(4)
  5837  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5838  		v2.AuxInt = ssa.Int32ToAuxInt(4)
  5839  		v2.AddArg2(src, mem)
  5840  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  5841  		v3.AuxInt = ssa.Int32ToAuxInt(2)
  5842  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5843  		v4.AuxInt = ssa.Int32ToAuxInt(2)
  5844  		v4.AddArg2(src, mem)
  5845  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  5846  		v6 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5847  		v6.AddArg2(src, mem)
  5848  		v5.AddArg3(dst, v6, mem)
  5849  		v3.AddArg3(dst, v4, v5)
  5850  		v1.AddArg3(dst, v2, v3)
  5851  		v.AddArg3(dst, v0, v1)
  5852  		return true
  5853  	}
  5854  	// match: (Move [3] dst src mem)
  5855  	// result: (MOVBstore [2] dst (MOVBload [2] src mem) (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem)))
  5856  	for {
  5857  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
  5858  			break
  5859  		}
  5860  		dst := v_0
  5861  		src := v_1
  5862  		mem := v_2
  5863  		v.Reset(ssaop.OpMIPS64MOVBstore)
  5864  		v.AuxInt = ssa.Int32ToAuxInt(2)
  5865  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5866  		v0.AuxInt = ssa.Int32ToAuxInt(2)
  5867  		v0.AddArg2(src, mem)
  5868  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  5869  		v1.AuxInt = ssa.Int32ToAuxInt(1)
  5870  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5871  		v2.AuxInt = ssa.Int32ToAuxInt(1)
  5872  		v2.AddArg2(src, mem)
  5873  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  5874  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBload, typ.Int8)
  5875  		v4.AddArg2(src, mem)
  5876  		v3.AddArg3(dst, v4, mem)
  5877  		v1.AddArg3(dst, v2, v3)
  5878  		v.AddArg3(dst, v0, v1)
  5879  		return true
  5880  	}
  5881  	// match: (Move [6] {t} dst src mem)
  5882  	// cond: t.Alignment()%2 == 0
  5883  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  5884  	for {
  5885  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
  5886  			break
  5887  		}
  5888  		t := ssa.AuxToType(v.Aux)
  5889  		dst := v_0
  5890  		src := v_1
  5891  		mem := v_2
  5892  		if !(t.Alignment()%2 == 0) {
  5893  			break
  5894  		}
  5895  		v.Reset(ssaop.OpMIPS64MOVHstore)
  5896  		v.AuxInt = ssa.Int32ToAuxInt(4)
  5897  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5898  		v0.AuxInt = ssa.Int32ToAuxInt(4)
  5899  		v0.AddArg2(src, mem)
  5900  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  5901  		v1.AuxInt = ssa.Int32ToAuxInt(2)
  5902  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5903  		v2.AuxInt = ssa.Int32ToAuxInt(2)
  5904  		v2.AddArg2(src, mem)
  5905  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  5906  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHload, typ.Int16)
  5907  		v4.AddArg2(src, mem)
  5908  		v3.AddArg3(dst, v4, mem)
  5909  		v1.AddArg3(dst, v2, v3)
  5910  		v.AddArg3(dst, v0, v1)
  5911  		return true
  5912  	}
  5913  	// match: (Move [12] {t} dst src mem)
  5914  	// cond: t.Alignment()%4 == 0
  5915  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  5916  	for {
  5917  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
  5918  			break
  5919  		}
  5920  		t := ssa.AuxToType(v.Aux)
  5921  		dst := v_0
  5922  		src := v_1
  5923  		mem := v_2
  5924  		if !(t.Alignment()%4 == 0) {
  5925  			break
  5926  		}
  5927  		v.Reset(ssaop.OpMIPS64MOVWstore)
  5928  		v.AuxInt = ssa.Int32ToAuxInt(8)
  5929  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  5930  		v0.AuxInt = ssa.Int32ToAuxInt(8)
  5931  		v0.AddArg2(src, mem)
  5932  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  5933  		v1.AuxInt = ssa.Int32ToAuxInt(4)
  5934  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  5935  		v2.AuxInt = ssa.Int32ToAuxInt(4)
  5936  		v2.AddArg2(src, mem)
  5937  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  5938  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWload, typ.Int32)
  5939  		v4.AddArg2(src, mem)
  5940  		v3.AddArg3(dst, v4, mem)
  5941  		v1.AddArg3(dst, v2, v3)
  5942  		v.AddArg3(dst, v0, v1)
  5943  		return true
  5944  	}
  5945  	// match: (Move [16] {t} dst src mem)
  5946  	// cond: t.Alignment()%8 == 0
  5947  	// result: (MOVVstore [8] dst (MOVVload [8] src mem) (MOVVstore dst (MOVVload src mem) mem))
  5948  	for {
  5949  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
  5950  			break
  5951  		}
  5952  		t := ssa.AuxToType(v.Aux)
  5953  		dst := v_0
  5954  		src := v_1
  5955  		mem := v_2
  5956  		if !(t.Alignment()%8 == 0) {
  5957  			break
  5958  		}
  5959  		v.Reset(ssaop.OpMIPS64MOVVstore)
  5960  		v.AuxInt = ssa.Int32ToAuxInt(8)
  5961  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  5962  		v0.AuxInt = ssa.Int32ToAuxInt(8)
  5963  		v0.AddArg2(src, mem)
  5964  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  5965  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  5966  		v2.AddArg2(src, mem)
  5967  		v1.AddArg3(dst, v2, mem)
  5968  		v.AddArg3(dst, v0, v1)
  5969  		return true
  5970  	}
  5971  	// match: (Move [24] {t} dst src mem)
  5972  	// cond: t.Alignment()%8 == 0
  5973  	// result: (MOVVstore [16] dst (MOVVload [16] src mem) (MOVVstore [8] dst (MOVVload [8] src mem) (MOVVstore dst (MOVVload src mem) mem)))
  5974  	for {
  5975  		if ssa.AuxIntToInt64(v.AuxInt) != 24 {
  5976  			break
  5977  		}
  5978  		t := ssa.AuxToType(v.Aux)
  5979  		dst := v_0
  5980  		src := v_1
  5981  		mem := v_2
  5982  		if !(t.Alignment()%8 == 0) {
  5983  			break
  5984  		}
  5985  		v.Reset(ssaop.OpMIPS64MOVVstore)
  5986  		v.AuxInt = ssa.Int32ToAuxInt(16)
  5987  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  5988  		v0.AuxInt = ssa.Int32ToAuxInt(16)
  5989  		v0.AddArg2(src, mem)
  5990  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  5991  		v1.AuxInt = ssa.Int32ToAuxInt(8)
  5992  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  5993  		v2.AuxInt = ssa.Int32ToAuxInt(8)
  5994  		v2.AddArg2(src, mem)
  5995  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  5996  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVload, typ.UInt64)
  5997  		v4.AddArg2(src, mem)
  5998  		v3.AddArg3(dst, v4, mem)
  5999  		v1.AddArg3(dst, v2, v3)
  6000  		v.AddArg3(dst, v0, v1)
  6001  		return true
  6002  	}
  6003  	// match: (Move [s] {t} dst src mem)
  6004  	// cond: s%8 == 0 && s >= 24 && s <= 8*128 && t.Alignment()%8 == 0 && ssa.LogLargeCopyValue(v, s)
  6005  	// result: (DUFFCOPY [16 * (128 - s/8)] dst src mem)
  6006  	for {
  6007  		s := ssa.AuxIntToInt64(v.AuxInt)
  6008  		t := ssa.AuxToType(v.Aux)
  6009  		dst := v_0
  6010  		src := v_1
  6011  		mem := v_2
  6012  		if !(s%8 == 0 && s >= 24 && s <= 8*128 && t.Alignment()%8 == 0 && ssa.LogLargeCopyValue(v, s)) {
  6013  			break
  6014  		}
  6015  		v.Reset(ssaop.OpMIPS64DUFFCOPY)
  6016  		v.AuxInt = ssa.Int64ToAuxInt(16 * (128 - s/8))
  6017  		v.AddArg3(dst, src, mem)
  6018  		return true
  6019  	}
  6020  	// match: (Move [s] {t} dst src mem)
  6021  	// cond: s > 24 && ssa.LogLargeCopyValue(v, s) || t.Alignment()%8 != 0
  6022  	// result: (LoweredMove [t.Alignment()] dst src (ADDVconst <src.Type> src [s-ssa.MoveSize(t.Alignment(), config)]) mem)
  6023  	for {
  6024  		s := ssa.AuxIntToInt64(v.AuxInt)
  6025  		t := ssa.AuxToType(v.Aux)
  6026  		dst := v_0
  6027  		src := v_1
  6028  		mem := v_2
  6029  		if !(s > 24 && ssa.LogLargeCopyValue(v, s) || t.Alignment()%8 != 0) {
  6030  			break
  6031  		}
  6032  		v.Reset(ssaop.OpMIPS64LoweredMove)
  6033  		v.AuxInt = ssa.Int64ToAuxInt(t.Alignment())
  6034  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDVconst, src.Type)
  6035  		v0.AuxInt = ssa.Int64ToAuxInt(s - ssa.MoveSize(t.Alignment(), config))
  6036  		v0.AddArg(src)
  6037  		v.AddArg4(dst, src, v0, mem)
  6038  		return true
  6039  	}
  6040  	return false
  6041  }
  6042  func rewriteValue_OpMul16(v *ssa.Value) bool {
  6043  	v_1 := v.Args[1]
  6044  	v_0 := v.Args[0]
  6045  	b := v.Block
  6046  	typ := &b.Func.Config.Types
  6047  	// match: (Mul16 x y)
  6048  	// result: (Select1 (MULVU x y))
  6049  	for {
  6050  		x := v_0
  6051  		y := v_1
  6052  		v.Reset(ssaop.OpSelect1)
  6053  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  6054  		v0.AddArg2(x, y)
  6055  		v.AddArg(v0)
  6056  		return true
  6057  	}
  6058  }
  6059  func rewriteValue_OpMul32(v *ssa.Value) bool {
  6060  	v_1 := v.Args[1]
  6061  	v_0 := v.Args[0]
  6062  	b := v.Block
  6063  	typ := &b.Func.Config.Types
  6064  	// match: (Mul32 x y)
  6065  	// result: (Select1 (MULVU x y))
  6066  	for {
  6067  		x := v_0
  6068  		y := v_1
  6069  		v.Reset(ssaop.OpSelect1)
  6070  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  6071  		v0.AddArg2(x, y)
  6072  		v.AddArg(v0)
  6073  		return true
  6074  	}
  6075  }
  6076  func rewriteValue_OpMul64(v *ssa.Value) bool {
  6077  	v_1 := v.Args[1]
  6078  	v_0 := v.Args[0]
  6079  	b := v.Block
  6080  	typ := &b.Func.Config.Types
  6081  	// match: (Mul64 x y)
  6082  	// result: (Select1 (MULVU x y))
  6083  	for {
  6084  		x := v_0
  6085  		y := v_1
  6086  		v.Reset(ssaop.OpSelect1)
  6087  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  6088  		v0.AddArg2(x, y)
  6089  		v.AddArg(v0)
  6090  		return true
  6091  	}
  6092  }
  6093  func rewriteValue_OpMul8(v *ssa.Value) bool {
  6094  	v_1 := v.Args[1]
  6095  	v_0 := v.Args[0]
  6096  	b := v.Block
  6097  	typ := &b.Func.Config.Types
  6098  	// match: (Mul8 x y)
  6099  	// result: (Select1 (MULVU x y))
  6100  	for {
  6101  		x := v_0
  6102  		y := v_1
  6103  		v.Reset(ssaop.OpSelect1)
  6104  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  6105  		v0.AddArg2(x, y)
  6106  		v.AddArg(v0)
  6107  		return true
  6108  	}
  6109  }
  6110  func rewriteValue_OpNeq16(v *ssa.Value) bool {
  6111  	v_1 := v.Args[1]
  6112  	v_0 := v.Args[0]
  6113  	b := v.Block
  6114  	typ := &b.Func.Config.Types
  6115  	// match: (Neq16 x y)
  6116  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to64 y)) (MOVVconst [0]))
  6117  	for {
  6118  		x := v_0
  6119  		y := v_1
  6120  		v.Reset(ssaop.OpMIPS64SGTU)
  6121  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6122  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
  6123  		v1.AddArg(x)
  6124  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6125  		v2.AddArg(y)
  6126  		v0.AddArg2(v1, v2)
  6127  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6128  		v3.AuxInt = ssa.Int64ToAuxInt(0)
  6129  		v.AddArg2(v0, v3)
  6130  		return true
  6131  	}
  6132  }
  6133  func rewriteValue_OpNeq32(v *ssa.Value) bool {
  6134  	v_1 := v.Args[1]
  6135  	v_0 := v.Args[0]
  6136  	b := v.Block
  6137  	typ := &b.Func.Config.Types
  6138  	// match: (Neq32 x y)
  6139  	// result: (SGTU (XOR (ZeroExt32to64 x) (ZeroExt32to64 y)) (MOVVconst [0]))
  6140  	for {
  6141  		x := v_0
  6142  		y := v_1
  6143  		v.Reset(ssaop.OpMIPS64SGTU)
  6144  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6145  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6146  		v1.AddArg(x)
  6147  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6148  		v2.AddArg(y)
  6149  		v0.AddArg2(v1, v2)
  6150  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6151  		v3.AuxInt = ssa.Int64ToAuxInt(0)
  6152  		v.AddArg2(v0, v3)
  6153  		return true
  6154  	}
  6155  }
  6156  func rewriteValue_OpNeq32F(v *ssa.Value) bool {
  6157  	v_1 := v.Args[1]
  6158  	v_0 := v.Args[0]
  6159  	b := v.Block
  6160  	// match: (Neq32F x y)
  6161  	// result: (FPFlagFalse (CMPEQF x y))
  6162  	for {
  6163  		x := v_0
  6164  		y := v_1
  6165  		v.Reset(ssaop.OpMIPS64FPFlagFalse)
  6166  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPEQF, types.TypeFlags)
  6167  		v0.AddArg2(x, y)
  6168  		v.AddArg(v0)
  6169  		return true
  6170  	}
  6171  }
  6172  func rewriteValue_OpNeq64(v *ssa.Value) bool {
  6173  	v_1 := v.Args[1]
  6174  	v_0 := v.Args[0]
  6175  	b := v.Block
  6176  	typ := &b.Func.Config.Types
  6177  	// match: (Neq64 x y)
  6178  	// result: (SGTU (XOR x y) (MOVVconst [0]))
  6179  	for {
  6180  		x := v_0
  6181  		y := v_1
  6182  		v.Reset(ssaop.OpMIPS64SGTU)
  6183  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6184  		v0.AddArg2(x, y)
  6185  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6186  		v1.AuxInt = ssa.Int64ToAuxInt(0)
  6187  		v.AddArg2(v0, v1)
  6188  		return true
  6189  	}
  6190  }
  6191  func rewriteValue_OpNeq64F(v *ssa.Value) bool {
  6192  	v_1 := v.Args[1]
  6193  	v_0 := v.Args[0]
  6194  	b := v.Block
  6195  	// match: (Neq64F x y)
  6196  	// result: (FPFlagFalse (CMPEQD x y))
  6197  	for {
  6198  		x := v_0
  6199  		y := v_1
  6200  		v.Reset(ssaop.OpMIPS64FPFlagFalse)
  6201  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64CMPEQD, types.TypeFlags)
  6202  		v0.AddArg2(x, y)
  6203  		v.AddArg(v0)
  6204  		return true
  6205  	}
  6206  }
  6207  func rewriteValue_OpNeq8(v *ssa.Value) bool {
  6208  	v_1 := v.Args[1]
  6209  	v_0 := v.Args[0]
  6210  	b := v.Block
  6211  	typ := &b.Func.Config.Types
  6212  	// match: (Neq8 x y)
  6213  	// result: (SGTU (XOR (ZeroExt8to64 x) (ZeroExt8to64 y)) (MOVVconst [0]))
  6214  	for {
  6215  		x := v_0
  6216  		y := v_1
  6217  		v.Reset(ssaop.OpMIPS64SGTU)
  6218  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6219  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6220  		v1.AddArg(x)
  6221  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6222  		v2.AddArg(y)
  6223  		v0.AddArg2(v1, v2)
  6224  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6225  		v3.AuxInt = ssa.Int64ToAuxInt(0)
  6226  		v.AddArg2(v0, v3)
  6227  		return true
  6228  	}
  6229  }
  6230  func rewriteValue_OpNeqPtr(v *ssa.Value) bool {
  6231  	v_1 := v.Args[1]
  6232  	v_0 := v.Args[0]
  6233  	b := v.Block
  6234  	typ := &b.Func.Config.Types
  6235  	// match: (NeqPtr x y)
  6236  	// result: (SGTU (XOR x y) (MOVVconst [0]))
  6237  	for {
  6238  		x := v_0
  6239  		y := v_1
  6240  		v.Reset(ssaop.OpMIPS64SGTU)
  6241  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64XOR, typ.UInt64)
  6242  		v0.AddArg2(x, y)
  6243  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6244  		v1.AuxInt = ssa.Int64ToAuxInt(0)
  6245  		v.AddArg2(v0, v1)
  6246  		return true
  6247  	}
  6248  }
  6249  func rewriteValue_OpNot(v *ssa.Value) bool {
  6250  	v_0 := v.Args[0]
  6251  	// match: (Not x)
  6252  	// result: (XORconst [1] x)
  6253  	for {
  6254  		x := v_0
  6255  		v.Reset(ssaop.OpMIPS64XORconst)
  6256  		v.AuxInt = ssa.Int64ToAuxInt(1)
  6257  		v.AddArg(x)
  6258  		return true
  6259  	}
  6260  }
  6261  func rewriteValue_OpOffPtr(v *ssa.Value) bool {
  6262  	v_0 := v.Args[0]
  6263  	b := v.Block
  6264  	typ := &b.Func.Config.Types
  6265  	// match: (OffPtr [off] ptr:(SP))
  6266  	// cond: ssa.Is32Bit(off)
  6267  	// result: (MOVVaddr [int32(off)] ptr)
  6268  	for {
  6269  		off := ssa.AuxIntToInt64(v.AuxInt)
  6270  		ptr := v_0
  6271  		if ptr.Op != ssaop.OpSP || !(ssa.Is32Bit(off)) {
  6272  			break
  6273  		}
  6274  		v.Reset(ssaop.OpMIPS64MOVVaddr)
  6275  		v.AuxInt = ssa.Int32ToAuxInt(int32(off))
  6276  		v.AddArg(ptr)
  6277  		return true
  6278  	}
  6279  	// match: (OffPtr [off] ptr)
  6280  	// cond: ssa.Is32Bit(off)
  6281  	// result: (ADDVconst [off] ptr)
  6282  	for {
  6283  		off := ssa.AuxIntToInt64(v.AuxInt)
  6284  		ptr := v_0
  6285  		if !(ssa.Is32Bit(off)) {
  6286  			break
  6287  		}
  6288  		v.Reset(ssaop.OpMIPS64ADDVconst)
  6289  		v.AuxInt = ssa.Int64ToAuxInt(off)
  6290  		v.AddArg(ptr)
  6291  		return true
  6292  	}
  6293  	// match: (OffPtr [off] ptr)
  6294  	// cond: !ssa.Is32Bit(off)
  6295  	// result: (ADDV ptr (MOVVconst <typ.UInt64> [off]))
  6296  	for {
  6297  		off := ssa.AuxIntToInt64(v.AuxInt)
  6298  		ptr := v_0
  6299  		if !(!ssa.Is32Bit(off)) {
  6300  			break
  6301  		}
  6302  		v.Reset(ssaop.OpMIPS64ADDV)
  6303  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6304  		v0.AuxInt = ssa.Int64ToAuxInt(off)
  6305  		v.AddArg2(ptr, v0)
  6306  		return true
  6307  	}
  6308  	return false
  6309  }
  6310  func rewriteValue_OpRotateLeft16(v *ssa.Value) bool {
  6311  	v_1 := v.Args[1]
  6312  	v_0 := v.Args[0]
  6313  	b := v.Block
  6314  	typ := &b.Func.Config.Types
  6315  	// match: (RotateLeft16 <t> x (MOVVconst [c]))
  6316  	// result: (Or16 (Lsh16x64 <t> x (MOVVconst [c&15])) (Rsh16Ux64 <t> x (MOVVconst [-c&15])))
  6317  	for {
  6318  		t := v.Type
  6319  		x := v_0
  6320  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  6321  			break
  6322  		}
  6323  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6324  		v.Reset(ssaop.OpOr16)
  6325  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh16x64, t)
  6326  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6327  		v1.AuxInt = ssa.Int64ToAuxInt(c & 15)
  6328  		v0.AddArg2(x, v1)
  6329  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh16Ux64, t)
  6330  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6331  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 15)
  6332  		v2.AddArg2(x, v3)
  6333  		v.AddArg2(v0, v2)
  6334  		return true
  6335  	}
  6336  	return false
  6337  }
  6338  func rewriteValue_OpRotateLeft32(v *ssa.Value) bool {
  6339  	v_1 := v.Args[1]
  6340  	v_0 := v.Args[0]
  6341  	b := v.Block
  6342  	typ := &b.Func.Config.Types
  6343  	// match: (RotateLeft32 <t> x (MOVVconst [c]))
  6344  	// result: (Or32 (Lsh32x64 <t> x (MOVVconst [c&31])) (Rsh32Ux64 <t> x (MOVVconst [-c&31])))
  6345  	for {
  6346  		t := v.Type
  6347  		x := v_0
  6348  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  6349  			break
  6350  		}
  6351  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6352  		v.Reset(ssaop.OpOr32)
  6353  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh32x64, t)
  6354  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6355  		v1.AuxInt = ssa.Int64ToAuxInt(c & 31)
  6356  		v0.AddArg2(x, v1)
  6357  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh32Ux64, t)
  6358  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6359  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 31)
  6360  		v2.AddArg2(x, v3)
  6361  		v.AddArg2(v0, v2)
  6362  		return true
  6363  	}
  6364  	return false
  6365  }
  6366  func rewriteValue_OpRotateLeft64(v *ssa.Value) bool {
  6367  	v_1 := v.Args[1]
  6368  	v_0 := v.Args[0]
  6369  	b := v.Block
  6370  	typ := &b.Func.Config.Types
  6371  	// match: (RotateLeft64 <t> x (MOVVconst [c]))
  6372  	// result: (Or64 (Lsh64x64 <t> x (MOVVconst [c&63])) (Rsh64Ux64 <t> x (MOVVconst [-c&63])))
  6373  	for {
  6374  		t := v.Type
  6375  		x := v_0
  6376  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  6377  			break
  6378  		}
  6379  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6380  		v.Reset(ssaop.OpOr64)
  6381  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh64x64, t)
  6382  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6383  		v1.AuxInt = ssa.Int64ToAuxInt(c & 63)
  6384  		v0.AddArg2(x, v1)
  6385  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh64Ux64, t)
  6386  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6387  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 63)
  6388  		v2.AddArg2(x, v3)
  6389  		v.AddArg2(v0, v2)
  6390  		return true
  6391  	}
  6392  	return false
  6393  }
  6394  func rewriteValue_OpRotateLeft8(v *ssa.Value) bool {
  6395  	v_1 := v.Args[1]
  6396  	v_0 := v.Args[0]
  6397  	b := v.Block
  6398  	typ := &b.Func.Config.Types
  6399  	// match: (RotateLeft8 <t> x (MOVVconst [c]))
  6400  	// result: (Or8 (Lsh8x64 <t> x (MOVVconst [c&7])) (Rsh8Ux64 <t> x (MOVVconst [-c&7])))
  6401  	for {
  6402  		t := v.Type
  6403  		x := v_0
  6404  		if v_1.Op != ssaop.OpMIPS64MOVVconst {
  6405  			break
  6406  		}
  6407  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6408  		v.Reset(ssaop.OpOr8)
  6409  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh8x64, t)
  6410  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6411  		v1.AuxInt = ssa.Int64ToAuxInt(c & 7)
  6412  		v0.AddArg2(x, v1)
  6413  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh8Ux64, t)
  6414  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6415  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 7)
  6416  		v2.AddArg2(x, v3)
  6417  		v.AddArg2(v0, v2)
  6418  		return true
  6419  	}
  6420  	return false
  6421  }
  6422  func rewriteValue_OpRsh16Ux16(v *ssa.Value) bool {
  6423  	v_1 := v.Args[1]
  6424  	v_0 := v.Args[0]
  6425  	b := v.Block
  6426  	typ := &b.Func.Config.Types
  6427  	// match: (Rsh16Ux16 <t> x y)
  6428  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt16to64 y)))
  6429  	for {
  6430  		t := v.Type
  6431  		x := v_0
  6432  		y := v_1
  6433  		v.Reset(ssaop.OpMIPS64AND)
  6434  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6435  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6436  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6437  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6438  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6439  		v3.AddArg(y)
  6440  		v1.AddArg2(v2, v3)
  6441  		v0.AddArg(v1)
  6442  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6443  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6444  		v5.AddArg(x)
  6445  		v4.AddArg2(v5, v3)
  6446  		v.AddArg2(v0, v4)
  6447  		return true
  6448  	}
  6449  }
  6450  func rewriteValue_OpRsh16Ux32(v *ssa.Value) bool {
  6451  	v_1 := v.Args[1]
  6452  	v_0 := v.Args[0]
  6453  	b := v.Block
  6454  	typ := &b.Func.Config.Types
  6455  	// match: (Rsh16Ux32 <t> x y)
  6456  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt32to64 y)))
  6457  	for {
  6458  		t := v.Type
  6459  		x := v_0
  6460  		y := v_1
  6461  		v.Reset(ssaop.OpMIPS64AND)
  6462  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6463  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6464  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6465  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6466  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6467  		v3.AddArg(y)
  6468  		v1.AddArg2(v2, v3)
  6469  		v0.AddArg(v1)
  6470  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6471  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6472  		v5.AddArg(x)
  6473  		v4.AddArg2(v5, v3)
  6474  		v.AddArg2(v0, v4)
  6475  		return true
  6476  	}
  6477  }
  6478  func rewriteValue_OpRsh16Ux64(v *ssa.Value) bool {
  6479  	v_1 := v.Args[1]
  6480  	v_0 := v.Args[0]
  6481  	b := v.Block
  6482  	typ := &b.Func.Config.Types
  6483  	// match: (Rsh16Ux64 <t> x y)
  6484  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt16to64 x) y))
  6485  	for {
  6486  		t := v.Type
  6487  		x := v_0
  6488  		y := v_1
  6489  		v.Reset(ssaop.OpMIPS64AND)
  6490  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6491  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6492  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6493  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6494  		v1.AddArg2(v2, y)
  6495  		v0.AddArg(v1)
  6496  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6497  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6498  		v4.AddArg(x)
  6499  		v3.AddArg2(v4, y)
  6500  		v.AddArg2(v0, v3)
  6501  		return true
  6502  	}
  6503  }
  6504  func rewriteValue_OpRsh16Ux8(v *ssa.Value) bool {
  6505  	v_1 := v.Args[1]
  6506  	v_0 := v.Args[0]
  6507  	b := v.Block
  6508  	typ := &b.Func.Config.Types
  6509  	// match: (Rsh16Ux8 <t> x y)
  6510  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt8to64 y)))
  6511  	for {
  6512  		t := v.Type
  6513  		x := v_0
  6514  		y := v_1
  6515  		v.Reset(ssaop.OpMIPS64AND)
  6516  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6517  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6518  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6519  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6520  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6521  		v3.AddArg(y)
  6522  		v1.AddArg2(v2, v3)
  6523  		v0.AddArg(v1)
  6524  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6525  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6526  		v5.AddArg(x)
  6527  		v4.AddArg2(v5, v3)
  6528  		v.AddArg2(v0, v4)
  6529  		return true
  6530  	}
  6531  }
  6532  func rewriteValue_OpRsh16x16(v *ssa.Value) bool {
  6533  	v_1 := v.Args[1]
  6534  	v_0 := v.Args[0]
  6535  	b := v.Block
  6536  	typ := &b.Func.Config.Types
  6537  	// match: (Rsh16x16 <t> x y)
  6538  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  6539  	for {
  6540  		t := v.Type
  6541  		x := v_0
  6542  		y := v_1
  6543  		v.Reset(ssaop.OpMIPS64SRAV)
  6544  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  6545  		v0.AddArg(x)
  6546  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6547  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6548  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6549  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6550  		v4.AddArg(y)
  6551  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6552  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  6553  		v3.AddArg2(v4, v5)
  6554  		v2.AddArg(v3)
  6555  		v1.AddArg2(v2, v4)
  6556  		v.AddArg2(v0, v1)
  6557  		return true
  6558  	}
  6559  }
  6560  func rewriteValue_OpRsh16x32(v *ssa.Value) bool {
  6561  	v_1 := v.Args[1]
  6562  	v_0 := v.Args[0]
  6563  	b := v.Block
  6564  	typ := &b.Func.Config.Types
  6565  	// match: (Rsh16x32 <t> x y)
  6566  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  6567  	for {
  6568  		t := v.Type
  6569  		x := v_0
  6570  		y := v_1
  6571  		v.Reset(ssaop.OpMIPS64SRAV)
  6572  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  6573  		v0.AddArg(x)
  6574  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6575  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6576  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6577  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6578  		v4.AddArg(y)
  6579  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6580  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  6581  		v3.AddArg2(v4, v5)
  6582  		v2.AddArg(v3)
  6583  		v1.AddArg2(v2, v4)
  6584  		v.AddArg2(v0, v1)
  6585  		return true
  6586  	}
  6587  }
  6588  func rewriteValue_OpRsh16x64(v *ssa.Value) bool {
  6589  	v_1 := v.Args[1]
  6590  	v_0 := v.Args[0]
  6591  	b := v.Block
  6592  	typ := &b.Func.Config.Types
  6593  	// match: (Rsh16x64 <t> x y)
  6594  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  6595  	for {
  6596  		t := v.Type
  6597  		x := v_0
  6598  		y := v_1
  6599  		v.Reset(ssaop.OpMIPS64SRAV)
  6600  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  6601  		v0.AddArg(x)
  6602  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6603  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6604  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6605  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6606  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  6607  		v3.AddArg2(y, v4)
  6608  		v2.AddArg(v3)
  6609  		v1.AddArg2(v2, y)
  6610  		v.AddArg2(v0, v1)
  6611  		return true
  6612  	}
  6613  }
  6614  func rewriteValue_OpRsh16x8(v *ssa.Value) bool {
  6615  	v_1 := v.Args[1]
  6616  	v_0 := v.Args[0]
  6617  	b := v.Block
  6618  	typ := &b.Func.Config.Types
  6619  	// match: (Rsh16x8 <t> x y)
  6620  	// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  6621  	for {
  6622  		t := v.Type
  6623  		x := v_0
  6624  		y := v_1
  6625  		v.Reset(ssaop.OpMIPS64SRAV)
  6626  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
  6627  		v0.AddArg(x)
  6628  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6629  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6630  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6631  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6632  		v4.AddArg(y)
  6633  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6634  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  6635  		v3.AddArg2(v4, v5)
  6636  		v2.AddArg(v3)
  6637  		v1.AddArg2(v2, v4)
  6638  		v.AddArg2(v0, v1)
  6639  		return true
  6640  	}
  6641  }
  6642  func rewriteValue_OpRsh32Ux16(v *ssa.Value) bool {
  6643  	v_1 := v.Args[1]
  6644  	v_0 := v.Args[0]
  6645  	b := v.Block
  6646  	typ := &b.Func.Config.Types
  6647  	// match: (Rsh32Ux16 <t> x y)
  6648  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt16to64 y)))
  6649  	for {
  6650  		t := v.Type
  6651  		x := v_0
  6652  		y := v_1
  6653  		v.Reset(ssaop.OpMIPS64AND)
  6654  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6655  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6656  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6657  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6658  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6659  		v3.AddArg(y)
  6660  		v1.AddArg2(v2, v3)
  6661  		v0.AddArg(v1)
  6662  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6663  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6664  		v5.AddArg(x)
  6665  		v4.AddArg2(v5, v3)
  6666  		v.AddArg2(v0, v4)
  6667  		return true
  6668  	}
  6669  }
  6670  func rewriteValue_OpRsh32Ux32(v *ssa.Value) bool {
  6671  	v_1 := v.Args[1]
  6672  	v_0 := v.Args[0]
  6673  	b := v.Block
  6674  	typ := &b.Func.Config.Types
  6675  	// match: (Rsh32Ux32 <t> x y)
  6676  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt32to64 y)))
  6677  	for {
  6678  		t := v.Type
  6679  		x := v_0
  6680  		y := v_1
  6681  		v.Reset(ssaop.OpMIPS64AND)
  6682  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6683  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6684  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6685  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6686  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6687  		v3.AddArg(y)
  6688  		v1.AddArg2(v2, v3)
  6689  		v0.AddArg(v1)
  6690  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6691  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6692  		v5.AddArg(x)
  6693  		v4.AddArg2(v5, v3)
  6694  		v.AddArg2(v0, v4)
  6695  		return true
  6696  	}
  6697  }
  6698  func rewriteValue_OpRsh32Ux64(v *ssa.Value) bool {
  6699  	v_1 := v.Args[1]
  6700  	v_0 := v.Args[0]
  6701  	b := v.Block
  6702  	typ := &b.Func.Config.Types
  6703  	// match: (Rsh32Ux64 <t> x y)
  6704  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt32to64 x) y))
  6705  	for {
  6706  		t := v.Type
  6707  		x := v_0
  6708  		y := v_1
  6709  		v.Reset(ssaop.OpMIPS64AND)
  6710  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6711  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6712  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6713  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6714  		v1.AddArg2(v2, y)
  6715  		v0.AddArg(v1)
  6716  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6717  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6718  		v4.AddArg(x)
  6719  		v3.AddArg2(v4, y)
  6720  		v.AddArg2(v0, v3)
  6721  		return true
  6722  	}
  6723  }
  6724  func rewriteValue_OpRsh32Ux8(v *ssa.Value) bool {
  6725  	v_1 := v.Args[1]
  6726  	v_0 := v.Args[0]
  6727  	b := v.Block
  6728  	typ := &b.Func.Config.Types
  6729  	// match: (Rsh32Ux8 <t> x y)
  6730  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt8to64 y)))
  6731  	for {
  6732  		t := v.Type
  6733  		x := v_0
  6734  		y := v_1
  6735  		v.Reset(ssaop.OpMIPS64AND)
  6736  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6737  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6738  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6739  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6740  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6741  		v3.AddArg(y)
  6742  		v1.AddArg2(v2, v3)
  6743  		v0.AddArg(v1)
  6744  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6745  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6746  		v5.AddArg(x)
  6747  		v4.AddArg2(v5, v3)
  6748  		v.AddArg2(v0, v4)
  6749  		return true
  6750  	}
  6751  }
  6752  func rewriteValue_OpRsh32x16(v *ssa.Value) bool {
  6753  	v_1 := v.Args[1]
  6754  	v_0 := v.Args[0]
  6755  	b := v.Block
  6756  	typ := &b.Func.Config.Types
  6757  	// match: (Rsh32x16 <t> x y)
  6758  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  6759  	for {
  6760  		t := v.Type
  6761  		x := v_0
  6762  		y := v_1
  6763  		v.Reset(ssaop.OpMIPS64SRAV)
  6764  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  6765  		v0.AddArg(x)
  6766  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6767  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6768  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6769  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6770  		v4.AddArg(y)
  6771  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6772  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  6773  		v3.AddArg2(v4, v5)
  6774  		v2.AddArg(v3)
  6775  		v1.AddArg2(v2, v4)
  6776  		v.AddArg2(v0, v1)
  6777  		return true
  6778  	}
  6779  }
  6780  func rewriteValue_OpRsh32x32(v *ssa.Value) bool {
  6781  	v_1 := v.Args[1]
  6782  	v_0 := v.Args[0]
  6783  	b := v.Block
  6784  	typ := &b.Func.Config.Types
  6785  	// match: (Rsh32x32 <t> x y)
  6786  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  6787  	for {
  6788  		t := v.Type
  6789  		x := v_0
  6790  		y := v_1
  6791  		v.Reset(ssaop.OpMIPS64SRAV)
  6792  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  6793  		v0.AddArg(x)
  6794  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6795  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6796  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6797  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6798  		v4.AddArg(y)
  6799  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6800  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  6801  		v3.AddArg2(v4, v5)
  6802  		v2.AddArg(v3)
  6803  		v1.AddArg2(v2, v4)
  6804  		v.AddArg2(v0, v1)
  6805  		return true
  6806  	}
  6807  }
  6808  func rewriteValue_OpRsh32x64(v *ssa.Value) bool {
  6809  	v_1 := v.Args[1]
  6810  	v_0 := v.Args[0]
  6811  	b := v.Block
  6812  	typ := &b.Func.Config.Types
  6813  	// match: (Rsh32x64 <t> x y)
  6814  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  6815  	for {
  6816  		t := v.Type
  6817  		x := v_0
  6818  		y := v_1
  6819  		v.Reset(ssaop.OpMIPS64SRAV)
  6820  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  6821  		v0.AddArg(x)
  6822  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6823  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6824  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6825  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6826  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  6827  		v3.AddArg2(y, v4)
  6828  		v2.AddArg(v3)
  6829  		v1.AddArg2(v2, y)
  6830  		v.AddArg2(v0, v1)
  6831  		return true
  6832  	}
  6833  }
  6834  func rewriteValue_OpRsh32x8(v *ssa.Value) bool {
  6835  	v_1 := v.Args[1]
  6836  	v_0 := v.Args[0]
  6837  	b := v.Block
  6838  	typ := &b.Func.Config.Types
  6839  	// match: (Rsh32x8 <t> x y)
  6840  	// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  6841  	for {
  6842  		t := v.Type
  6843  		x := v_0
  6844  		y := v_1
  6845  		v.Reset(ssaop.OpMIPS64SRAV)
  6846  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
  6847  		v0.AddArg(x)
  6848  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6849  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6850  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6851  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6852  		v4.AddArg(y)
  6853  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6854  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  6855  		v3.AddArg2(v4, v5)
  6856  		v2.AddArg(v3)
  6857  		v1.AddArg2(v2, v4)
  6858  		v.AddArg2(v0, v1)
  6859  		return true
  6860  	}
  6861  }
  6862  func rewriteValue_OpRsh64Ux16(v *ssa.Value) bool {
  6863  	v_1 := v.Args[1]
  6864  	v_0 := v.Args[0]
  6865  	b := v.Block
  6866  	typ := &b.Func.Config.Types
  6867  	// match: (Rsh64Ux16 <t> x y)
  6868  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> x (ZeroExt16to64 y)))
  6869  	for {
  6870  		t := v.Type
  6871  		x := v_0
  6872  		y := v_1
  6873  		v.Reset(ssaop.OpMIPS64AND)
  6874  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6875  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6876  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6877  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6878  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6879  		v3.AddArg(y)
  6880  		v1.AddArg2(v2, v3)
  6881  		v0.AddArg(v1)
  6882  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6883  		v4.AddArg2(x, v3)
  6884  		v.AddArg2(v0, v4)
  6885  		return true
  6886  	}
  6887  }
  6888  func rewriteValue_OpRsh64Ux32(v *ssa.Value) bool {
  6889  	v_1 := v.Args[1]
  6890  	v_0 := v.Args[0]
  6891  	b := v.Block
  6892  	typ := &b.Func.Config.Types
  6893  	// match: (Rsh64Ux32 <t> x y)
  6894  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> x (ZeroExt32to64 y)))
  6895  	for {
  6896  		t := v.Type
  6897  		x := v_0
  6898  		y := v_1
  6899  		v.Reset(ssaop.OpMIPS64AND)
  6900  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6901  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6902  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6903  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6904  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  6905  		v3.AddArg(y)
  6906  		v1.AddArg2(v2, v3)
  6907  		v0.AddArg(v1)
  6908  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6909  		v4.AddArg2(x, v3)
  6910  		v.AddArg2(v0, v4)
  6911  		return true
  6912  	}
  6913  }
  6914  func rewriteValue_OpRsh64Ux64(v *ssa.Value) bool {
  6915  	v_1 := v.Args[1]
  6916  	v_0 := v.Args[0]
  6917  	b := v.Block
  6918  	typ := &b.Func.Config.Types
  6919  	// match: (Rsh64Ux64 <t> x y)
  6920  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> x y))
  6921  	for {
  6922  		t := v.Type
  6923  		x := v_0
  6924  		y := v_1
  6925  		v.Reset(ssaop.OpMIPS64AND)
  6926  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6927  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6928  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6929  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6930  		v1.AddArg2(v2, y)
  6931  		v0.AddArg(v1)
  6932  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6933  		v3.AddArg2(x, y)
  6934  		v.AddArg2(v0, v3)
  6935  		return true
  6936  	}
  6937  }
  6938  func rewriteValue_OpRsh64Ux8(v *ssa.Value) bool {
  6939  	v_1 := v.Args[1]
  6940  	v_0 := v.Args[0]
  6941  	b := v.Block
  6942  	typ := &b.Func.Config.Types
  6943  	// match: (Rsh64Ux8 <t> x y)
  6944  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> x (ZeroExt8to64 y)))
  6945  	for {
  6946  		t := v.Type
  6947  		x := v_0
  6948  		y := v_1
  6949  		v.Reset(ssaop.OpMIPS64AND)
  6950  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6951  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6952  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6953  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  6954  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  6955  		v3.AddArg(y)
  6956  		v1.AddArg2(v2, v3)
  6957  		v0.AddArg(v1)
  6958  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  6959  		v4.AddArg2(x, v3)
  6960  		v.AddArg2(v0, v4)
  6961  		return true
  6962  	}
  6963  }
  6964  func rewriteValue_OpRsh64x16(v *ssa.Value) bool {
  6965  	v_1 := v.Args[1]
  6966  	v_0 := v.Args[0]
  6967  	b := v.Block
  6968  	typ := &b.Func.Config.Types
  6969  	// match: (Rsh64x16 <t> x y)
  6970  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  6971  	for {
  6972  		t := v.Type
  6973  		x := v_0
  6974  		y := v_1
  6975  		v.Reset(ssaop.OpMIPS64SRAV)
  6976  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  6977  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  6978  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  6979  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  6980  		v3.AddArg(y)
  6981  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  6982  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  6983  		v2.AddArg2(v3, v4)
  6984  		v1.AddArg(v2)
  6985  		v0.AddArg2(v1, v3)
  6986  		v.AddArg2(x, v0)
  6987  		return true
  6988  	}
  6989  }
  6990  func rewriteValue_OpRsh64x32(v *ssa.Value) bool {
  6991  	v_1 := v.Args[1]
  6992  	v_0 := v.Args[0]
  6993  	b := v.Block
  6994  	typ := &b.Func.Config.Types
  6995  	// match: (Rsh64x32 <t> x y)
  6996  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  6997  	for {
  6998  		t := v.Type
  6999  		x := v_0
  7000  		y := v_1
  7001  		v.Reset(ssaop.OpMIPS64SRAV)
  7002  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7003  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7004  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7005  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7006  		v3.AddArg(y)
  7007  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7008  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  7009  		v2.AddArg2(v3, v4)
  7010  		v1.AddArg(v2)
  7011  		v0.AddArg2(v1, v3)
  7012  		v.AddArg2(x, v0)
  7013  		return true
  7014  	}
  7015  }
  7016  func rewriteValue_OpRsh64x64(v *ssa.Value) bool {
  7017  	v_1 := v.Args[1]
  7018  	v_0 := v.Args[0]
  7019  	b := v.Block
  7020  	typ := &b.Func.Config.Types
  7021  	// match: (Rsh64x64 <t> x y)
  7022  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  7023  	for {
  7024  		t := v.Type
  7025  		x := v_0
  7026  		y := v_1
  7027  		v.Reset(ssaop.OpMIPS64SRAV)
  7028  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7029  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7030  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7031  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7032  		v3.AuxInt = ssa.Int64ToAuxInt(63)
  7033  		v2.AddArg2(y, v3)
  7034  		v1.AddArg(v2)
  7035  		v0.AddArg2(v1, y)
  7036  		v.AddArg2(x, v0)
  7037  		return true
  7038  	}
  7039  }
  7040  func rewriteValue_OpRsh64x8(v *ssa.Value) bool {
  7041  	v_1 := v.Args[1]
  7042  	v_0 := v.Args[0]
  7043  	b := v.Block
  7044  	typ := &b.Func.Config.Types
  7045  	// match: (Rsh64x8 <t> x y)
  7046  	// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  7047  	for {
  7048  		t := v.Type
  7049  		x := v_0
  7050  		y := v_1
  7051  		v.Reset(ssaop.OpMIPS64SRAV)
  7052  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7053  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7054  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7055  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7056  		v3.AddArg(y)
  7057  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7058  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  7059  		v2.AddArg2(v3, v4)
  7060  		v1.AddArg(v2)
  7061  		v0.AddArg2(v1, v3)
  7062  		v.AddArg2(x, v0)
  7063  		return true
  7064  	}
  7065  }
  7066  func rewriteValue_OpRsh8Ux16(v *ssa.Value) bool {
  7067  	v_1 := v.Args[1]
  7068  	v_0 := v.Args[0]
  7069  	b := v.Block
  7070  	typ := &b.Func.Config.Types
  7071  	// match: (Rsh8Ux16 <t> x y)
  7072  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt16to64 y)))
  7073  	for {
  7074  		t := v.Type
  7075  		x := v_0
  7076  		y := v_1
  7077  		v.Reset(ssaop.OpMIPS64AND)
  7078  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7079  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7080  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7081  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7082  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  7083  		v3.AddArg(y)
  7084  		v1.AddArg2(v2, v3)
  7085  		v0.AddArg(v1)
  7086  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7087  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7088  		v5.AddArg(x)
  7089  		v4.AddArg2(v5, v3)
  7090  		v.AddArg2(v0, v4)
  7091  		return true
  7092  	}
  7093  }
  7094  func rewriteValue_OpRsh8Ux32(v *ssa.Value) bool {
  7095  	v_1 := v.Args[1]
  7096  	v_0 := v.Args[0]
  7097  	b := v.Block
  7098  	typ := &b.Func.Config.Types
  7099  	// match: (Rsh8Ux32 <t> x y)
  7100  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt32to64 y)))
  7101  	for {
  7102  		t := v.Type
  7103  		x := v_0
  7104  		y := v_1
  7105  		v.Reset(ssaop.OpMIPS64AND)
  7106  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7107  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7108  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7109  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7110  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7111  		v3.AddArg(y)
  7112  		v1.AddArg2(v2, v3)
  7113  		v0.AddArg(v1)
  7114  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7115  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7116  		v5.AddArg(x)
  7117  		v4.AddArg2(v5, v3)
  7118  		v.AddArg2(v0, v4)
  7119  		return true
  7120  	}
  7121  }
  7122  func rewriteValue_OpRsh8Ux64(v *ssa.Value) bool {
  7123  	v_1 := v.Args[1]
  7124  	v_0 := v.Args[0]
  7125  	b := v.Block
  7126  	typ := &b.Func.Config.Types
  7127  	// match: (Rsh8Ux64 <t> x y)
  7128  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt8to64 x) y))
  7129  	for {
  7130  		t := v.Type
  7131  		x := v_0
  7132  		y := v_1
  7133  		v.Reset(ssaop.OpMIPS64AND)
  7134  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7135  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7136  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7137  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7138  		v1.AddArg2(v2, y)
  7139  		v0.AddArg(v1)
  7140  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7141  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7142  		v4.AddArg(x)
  7143  		v3.AddArg2(v4, y)
  7144  		v.AddArg2(v0, v3)
  7145  		return true
  7146  	}
  7147  }
  7148  func rewriteValue_OpRsh8Ux8(v *ssa.Value) bool {
  7149  	v_1 := v.Args[1]
  7150  	v_0 := v.Args[0]
  7151  	b := v.Block
  7152  	typ := &b.Func.Config.Types
  7153  	// match: (Rsh8Ux8 <t> x y)
  7154  	// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt8to64 y)))
  7155  	for {
  7156  		t := v.Type
  7157  		x := v_0
  7158  		y := v_1
  7159  		v.Reset(ssaop.OpMIPS64AND)
  7160  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7161  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7162  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7163  		v2.AuxInt = ssa.Int64ToAuxInt(64)
  7164  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7165  		v3.AddArg(y)
  7166  		v1.AddArg2(v2, v3)
  7167  		v0.AddArg(v1)
  7168  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64SRLV, t)
  7169  		v5 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7170  		v5.AddArg(x)
  7171  		v4.AddArg2(v5, v3)
  7172  		v.AddArg2(v0, v4)
  7173  		return true
  7174  	}
  7175  }
  7176  func rewriteValue_OpRsh8x16(v *ssa.Value) bool {
  7177  	v_1 := v.Args[1]
  7178  	v_0 := v.Args[0]
  7179  	b := v.Block
  7180  	typ := &b.Func.Config.Types
  7181  	// match: (Rsh8x16 <t> x y)
  7182  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
  7183  	for {
  7184  		t := v.Type
  7185  		x := v_0
  7186  		y := v_1
  7187  		v.Reset(ssaop.OpMIPS64SRAV)
  7188  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  7189  		v0.AddArg(x)
  7190  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7191  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7192  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7193  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
  7194  		v4.AddArg(y)
  7195  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7196  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  7197  		v3.AddArg2(v4, v5)
  7198  		v2.AddArg(v3)
  7199  		v1.AddArg2(v2, v4)
  7200  		v.AddArg2(v0, v1)
  7201  		return true
  7202  	}
  7203  }
  7204  func rewriteValue_OpRsh8x32(v *ssa.Value) bool {
  7205  	v_1 := v.Args[1]
  7206  	v_0 := v.Args[0]
  7207  	b := v.Block
  7208  	typ := &b.Func.Config.Types
  7209  	// match: (Rsh8x32 <t> x y)
  7210  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
  7211  	for {
  7212  		t := v.Type
  7213  		x := v_0
  7214  		y := v_1
  7215  		v.Reset(ssaop.OpMIPS64SRAV)
  7216  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  7217  		v0.AddArg(x)
  7218  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7219  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7220  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7221  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
  7222  		v4.AddArg(y)
  7223  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7224  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  7225  		v3.AddArg2(v4, v5)
  7226  		v2.AddArg(v3)
  7227  		v1.AddArg2(v2, v4)
  7228  		v.AddArg2(v0, v1)
  7229  		return true
  7230  	}
  7231  }
  7232  func rewriteValue_OpRsh8x64(v *ssa.Value) bool {
  7233  	v_1 := v.Args[1]
  7234  	v_0 := v.Args[0]
  7235  	b := v.Block
  7236  	typ := &b.Func.Config.Types
  7237  	// match: (Rsh8x64 <t> x y)
  7238  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
  7239  	for {
  7240  		t := v.Type
  7241  		x := v_0
  7242  		y := v_1
  7243  		v.Reset(ssaop.OpMIPS64SRAV)
  7244  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  7245  		v0.AddArg(x)
  7246  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7247  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7248  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7249  		v4 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7250  		v4.AuxInt = ssa.Int64ToAuxInt(63)
  7251  		v3.AddArg2(y, v4)
  7252  		v2.AddArg(v3)
  7253  		v1.AddArg2(v2, y)
  7254  		v.AddArg2(v0, v1)
  7255  		return true
  7256  	}
  7257  }
  7258  func rewriteValue_OpRsh8x8(v *ssa.Value) bool {
  7259  	v_1 := v.Args[1]
  7260  	v_0 := v.Args[0]
  7261  	b := v.Block
  7262  	typ := &b.Func.Config.Types
  7263  	// match: (Rsh8x8 <t> x y)
  7264  	// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
  7265  	for {
  7266  		t := v.Type
  7267  		x := v_0
  7268  		y := v_1
  7269  		v.Reset(ssaop.OpMIPS64SRAV)
  7270  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
  7271  		v0.AddArg(x)
  7272  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64OR, t)
  7273  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7274  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, typ.Bool)
  7275  		v4 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
  7276  		v4.AddArg(y)
  7277  		v5 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7278  		v5.AuxInt = ssa.Int64ToAuxInt(63)
  7279  		v3.AddArg2(v4, v5)
  7280  		v2.AddArg(v3)
  7281  		v1.AddArg2(v2, v4)
  7282  		v.AddArg2(v0, v1)
  7283  		return true
  7284  	}
  7285  }
  7286  func rewriteValue_OpSelect0(v *ssa.Value) bool {
  7287  	v_0 := v.Args[0]
  7288  	b := v.Block
  7289  	typ := &b.Func.Config.Types
  7290  	// match: (Select0 (Mul64uover x y))
  7291  	// result: (Select1 <typ.UInt64> (MULVU x y))
  7292  	for {
  7293  		if v_0.Op != ssaop.OpMul64uover {
  7294  			break
  7295  		}
  7296  		y := v_0.Args[1]
  7297  		x := v_0.Args[0]
  7298  		v.Reset(ssaop.OpSelect1)
  7299  		v.Type = typ.UInt64
  7300  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  7301  		v0.AddArg2(x, y)
  7302  		v.AddArg(v0)
  7303  		return true
  7304  	}
  7305  	// match: (Select0 <t> (Add64carry x y c))
  7306  	// result: (ADDV (ADDV <t> x y) c)
  7307  	for {
  7308  		t := v.Type
  7309  		if v_0.Op != ssaop.OpAdd64carry {
  7310  			break
  7311  		}
  7312  		c := v_0.Args[2]
  7313  		x := v_0.Args[0]
  7314  		y := v_0.Args[1]
  7315  		v.Reset(ssaop.OpMIPS64ADDV)
  7316  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDV, t)
  7317  		v0.AddArg2(x, y)
  7318  		v.AddArg2(v0, c)
  7319  		return true
  7320  	}
  7321  	// match: (Select0 <t> (Sub64borrow x y c))
  7322  	// result: (SUBV (SUBV <t> x y) c)
  7323  	for {
  7324  		t := v.Type
  7325  		if v_0.Op != ssaop.OpSub64borrow {
  7326  			break
  7327  		}
  7328  		c := v_0.Args[2]
  7329  		x := v_0.Args[0]
  7330  		y := v_0.Args[1]
  7331  		v.Reset(ssaop.OpMIPS64SUBV)
  7332  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64SUBV, t)
  7333  		v0.AddArg2(x, y)
  7334  		v.AddArg2(v0, c)
  7335  		return true
  7336  	}
  7337  	// match: (Select0 (DIVVU _ (MOVVconst [1])))
  7338  	// result: (MOVVconst [0])
  7339  	for {
  7340  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  7341  			break
  7342  		}
  7343  		_ = v_0.Args[1]
  7344  		v_0_1 := v_0.Args[1]
  7345  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 1 {
  7346  			break
  7347  		}
  7348  		v.Reset(ssaop.OpMIPS64MOVVconst)
  7349  		v.AuxInt = ssa.Int64ToAuxInt(0)
  7350  		return true
  7351  	}
  7352  	// match: (Select0 (DIVVU x (MOVVconst [c])))
  7353  	// cond: ssa.IsPowerOfTwo(c)
  7354  	// result: (ANDconst [c-1] x)
  7355  	for {
  7356  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  7357  			break
  7358  		}
  7359  		_ = v_0.Args[1]
  7360  		x := v_0.Args[0]
  7361  		v_0_1 := v_0.Args[1]
  7362  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  7363  			break
  7364  		}
  7365  		c := ssa.AuxIntToInt64(v_0_1.AuxInt)
  7366  		if !(ssa.IsPowerOfTwo(c)) {
  7367  			break
  7368  		}
  7369  		v.Reset(ssaop.OpMIPS64ANDconst)
  7370  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
  7371  		v.AddArg(x)
  7372  		return true
  7373  	}
  7374  	// match: (Select0 (DIVV (MOVVconst [c]) (MOVVconst [d])))
  7375  	// cond: d != 0
  7376  	// result: (MOVVconst [c%d])
  7377  	for {
  7378  		if v_0.Op != ssaop.OpMIPS64DIVV {
  7379  			break
  7380  		}
  7381  		_ = v_0.Args[1]
  7382  		v_0_0 := v_0.Args[0]
  7383  		if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  7384  			break
  7385  		}
  7386  		c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  7387  		v_0_1 := v_0.Args[1]
  7388  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  7389  			break
  7390  		}
  7391  		d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  7392  		if !(d != 0) {
  7393  			break
  7394  		}
  7395  		v.Reset(ssaop.OpMIPS64MOVVconst)
  7396  		v.AuxInt = ssa.Int64ToAuxInt(c % d)
  7397  		return true
  7398  	}
  7399  	// match: (Select0 (DIVVU (MOVVconst [c]) (MOVVconst [d])))
  7400  	// cond: d != 0
  7401  	// result: (MOVVconst [int64(uint64(c)%uint64(d))])
  7402  	for {
  7403  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  7404  			break
  7405  		}
  7406  		_ = v_0.Args[1]
  7407  		v_0_0 := v_0.Args[0]
  7408  		if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  7409  			break
  7410  		}
  7411  		c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  7412  		v_0_1 := v_0.Args[1]
  7413  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  7414  			break
  7415  		}
  7416  		d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  7417  		if !(d != 0) {
  7418  			break
  7419  		}
  7420  		v.Reset(ssaop.OpMIPS64MOVVconst)
  7421  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) % uint64(d)))
  7422  		return true
  7423  	}
  7424  	return false
  7425  }
  7426  func rewriteValue_OpSelect1(v *ssa.Value) bool {
  7427  	v_0 := v.Args[0]
  7428  	b := v.Block
  7429  	typ := &b.Func.Config.Types
  7430  	// match: (Select1 (Mul64uover x y))
  7431  	// result: (SGTU <typ.Bool> (Select0 <typ.UInt64> (MULVU x y)) (MOVVconst <typ.UInt64> [0]))
  7432  	for {
  7433  		if v_0.Op != ssaop.OpMul64uover {
  7434  			break
  7435  		}
  7436  		y := v_0.Args[1]
  7437  		x := v_0.Args[0]
  7438  		v.Reset(ssaop.OpMIPS64SGTU)
  7439  		v.Type = typ.Bool
  7440  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.UInt64)
  7441  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
  7442  		v1.AddArg2(x, y)
  7443  		v0.AddArg(v1)
  7444  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7445  		v2.AuxInt = ssa.Int64ToAuxInt(0)
  7446  		v.AddArg2(v0, v2)
  7447  		return true
  7448  	}
  7449  	// match: (Select1 <t> (Add64carry x y c))
  7450  	// result: (OR (SGTU <t> x s:(ADDV <t> x y)) (SGTU <t> s (ADDV <t> s c)))
  7451  	for {
  7452  		t := v.Type
  7453  		if v_0.Op != ssaop.OpAdd64carry {
  7454  			break
  7455  		}
  7456  		c := v_0.Args[2]
  7457  		x := v_0.Args[0]
  7458  		y := v_0.Args[1]
  7459  		v.Reset(ssaop.OpMIPS64OR)
  7460  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, t)
  7461  		s := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDV, t)
  7462  		s.AddArg2(x, y)
  7463  		v0.AddArg2(x, s)
  7464  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, t)
  7465  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDV, t)
  7466  		v3.AddArg2(s, c)
  7467  		v2.AddArg2(s, v3)
  7468  		v.AddArg2(v0, v2)
  7469  		return true
  7470  	}
  7471  	// match: (Select1 <t> (Sub64borrow x y c))
  7472  	// result: (OR (SGTU <t> s:(SUBV <t> x y) x) (SGTU <t> (SUBV <t> s c) s))
  7473  	for {
  7474  		t := v.Type
  7475  		if v_0.Op != ssaop.OpSub64borrow {
  7476  			break
  7477  		}
  7478  		c := v_0.Args[2]
  7479  		x := v_0.Args[0]
  7480  		y := v_0.Args[1]
  7481  		v.Reset(ssaop.OpMIPS64OR)
  7482  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, t)
  7483  		s := b.NewValue0(v.Pos, ssaop.OpMIPS64SUBV, t)
  7484  		s.AddArg2(x, y)
  7485  		v0.AddArg2(s, x)
  7486  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64SGTU, t)
  7487  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64SUBV, t)
  7488  		v3.AddArg2(s, c)
  7489  		v2.AddArg2(v3, s)
  7490  		v.AddArg2(v0, v2)
  7491  		return true
  7492  	}
  7493  	// match: (Select1 (MULVU x (MOVVconst [-1])))
  7494  	// result: (NEGV x)
  7495  	for {
  7496  		if v_0.Op != ssaop.OpMIPS64MULVU {
  7497  			break
  7498  		}
  7499  		_ = v_0.Args[1]
  7500  		v_0_0 := v_0.Args[0]
  7501  		v_0_1 := v_0.Args[1]
  7502  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7503  			x := v_0_0
  7504  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != -1 {
  7505  				continue
  7506  			}
  7507  			v.Reset(ssaop.OpMIPS64NEGV)
  7508  			v.AddArg(x)
  7509  			return true
  7510  		}
  7511  		break
  7512  	}
  7513  	// match: (Select1 (MULVU _ (MOVVconst [0])))
  7514  	// result: (MOVVconst [0])
  7515  	for {
  7516  		if v_0.Op != ssaop.OpMIPS64MULVU {
  7517  			break
  7518  		}
  7519  		_ = v_0.Args[1]
  7520  		v_0_0 := v_0.Args[0]
  7521  		v_0_1 := v_0.Args[1]
  7522  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7523  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  7524  				continue
  7525  			}
  7526  			v.Reset(ssaop.OpMIPS64MOVVconst)
  7527  			v.AuxInt = ssa.Int64ToAuxInt(0)
  7528  			return true
  7529  		}
  7530  		break
  7531  	}
  7532  	// match: (Select1 (MULVU x (MOVVconst [1])))
  7533  	// result: x
  7534  	for {
  7535  		if v_0.Op != ssaop.OpMIPS64MULVU {
  7536  			break
  7537  		}
  7538  		_ = v_0.Args[1]
  7539  		v_0_0 := v_0.Args[0]
  7540  		v_0_1 := v_0.Args[1]
  7541  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7542  			x := v_0_0
  7543  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 1 {
  7544  				continue
  7545  			}
  7546  			v.CopyOf(x)
  7547  			return true
  7548  		}
  7549  		break
  7550  	}
  7551  	// match: (Select1 (MULVU x (MOVVconst [c])))
  7552  	// cond: ssa.IsPowerOfTwo(c)
  7553  	// result: (SLLVconst [ssa.Log64(c)] x)
  7554  	for {
  7555  		if v_0.Op != ssaop.OpMIPS64MULVU {
  7556  			break
  7557  		}
  7558  		_ = v_0.Args[1]
  7559  		v_0_0 := v_0.Args[0]
  7560  		v_0_1 := v_0.Args[1]
  7561  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7562  			x := v_0_0
  7563  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  7564  				continue
  7565  			}
  7566  			c := ssa.AuxIntToInt64(v_0_1.AuxInt)
  7567  			if !(ssa.IsPowerOfTwo(c)) {
  7568  				continue
  7569  			}
  7570  			v.Reset(ssaop.OpMIPS64SLLVconst)
  7571  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  7572  			v.AddArg(x)
  7573  			return true
  7574  		}
  7575  		break
  7576  	}
  7577  	// match: (Select1 (DIVVU x (MOVVconst [1])))
  7578  	// result: x
  7579  	for {
  7580  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  7581  			break
  7582  		}
  7583  		_ = v_0.Args[1]
  7584  		x := v_0.Args[0]
  7585  		v_0_1 := v_0.Args[1]
  7586  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 1 {
  7587  			break
  7588  		}
  7589  		v.CopyOf(x)
  7590  		return true
  7591  	}
  7592  	// match: (Select1 (DIVVU x (MOVVconst [c])))
  7593  	// cond: ssa.IsPowerOfTwo(c)
  7594  	// result: (SRLVconst [ssa.Log64(c)] x)
  7595  	for {
  7596  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  7597  			break
  7598  		}
  7599  		_ = v_0.Args[1]
  7600  		x := v_0.Args[0]
  7601  		v_0_1 := v_0.Args[1]
  7602  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  7603  			break
  7604  		}
  7605  		c := ssa.AuxIntToInt64(v_0_1.AuxInt)
  7606  		if !(ssa.IsPowerOfTwo(c)) {
  7607  			break
  7608  		}
  7609  		v.Reset(ssaop.OpMIPS64SRLVconst)
  7610  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  7611  		v.AddArg(x)
  7612  		return true
  7613  	}
  7614  	// match: (Select1 (MULVU (MOVVconst [c]) (MOVVconst [d])))
  7615  	// result: (MOVVconst [c*d])
  7616  	for {
  7617  		if v_0.Op != ssaop.OpMIPS64MULVU {
  7618  			break
  7619  		}
  7620  		_ = v_0.Args[1]
  7621  		v_0_0 := v_0.Args[0]
  7622  		v_0_1 := v_0.Args[1]
  7623  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  7624  			if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  7625  				continue
  7626  			}
  7627  			c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  7628  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  7629  				continue
  7630  			}
  7631  			d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  7632  			v.Reset(ssaop.OpMIPS64MOVVconst)
  7633  			v.AuxInt = ssa.Int64ToAuxInt(c * d)
  7634  			return true
  7635  		}
  7636  		break
  7637  	}
  7638  	// match: (Select1 (DIVV (MOVVconst [c]) (MOVVconst [d])))
  7639  	// cond: d != 0
  7640  	// result: (MOVVconst [c/d])
  7641  	for {
  7642  		if v_0.Op != ssaop.OpMIPS64DIVV {
  7643  			break
  7644  		}
  7645  		_ = v_0.Args[1]
  7646  		v_0_0 := v_0.Args[0]
  7647  		if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  7648  			break
  7649  		}
  7650  		c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  7651  		v_0_1 := v_0.Args[1]
  7652  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  7653  			break
  7654  		}
  7655  		d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  7656  		if !(d != 0) {
  7657  			break
  7658  		}
  7659  		v.Reset(ssaop.OpMIPS64MOVVconst)
  7660  		v.AuxInt = ssa.Int64ToAuxInt(c / d)
  7661  		return true
  7662  	}
  7663  	// match: (Select1 (DIVVU (MOVVconst [c]) (MOVVconst [d])))
  7664  	// cond: d != 0
  7665  	// result: (MOVVconst [int64(uint64(c)/uint64(d))])
  7666  	for {
  7667  		if v_0.Op != ssaop.OpMIPS64DIVVU {
  7668  			break
  7669  		}
  7670  		_ = v_0.Args[1]
  7671  		v_0_0 := v_0.Args[0]
  7672  		if v_0_0.Op != ssaop.OpMIPS64MOVVconst {
  7673  			break
  7674  		}
  7675  		c := ssa.AuxIntToInt64(v_0_0.AuxInt)
  7676  		v_0_1 := v_0.Args[1]
  7677  		if v_0_1.Op != ssaop.OpMIPS64MOVVconst {
  7678  			break
  7679  		}
  7680  		d := ssa.AuxIntToInt64(v_0_1.AuxInt)
  7681  		if !(d != 0) {
  7682  			break
  7683  		}
  7684  		v.Reset(ssaop.OpMIPS64MOVVconst)
  7685  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) / uint64(d)))
  7686  		return true
  7687  	}
  7688  	return false
  7689  }
  7690  func rewriteValue_OpSlicemask(v *ssa.Value) bool {
  7691  	v_0 := v.Args[0]
  7692  	b := v.Block
  7693  	// match: (Slicemask <t> x)
  7694  	// result: (SRAVconst (NEGV <t> x) [63])
  7695  	for {
  7696  		t := v.Type
  7697  		x := v_0
  7698  		v.Reset(ssaop.OpMIPS64SRAVconst)
  7699  		v.AuxInt = ssa.Int64ToAuxInt(63)
  7700  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64NEGV, t)
  7701  		v0.AddArg(x)
  7702  		v.AddArg(v0)
  7703  		return true
  7704  	}
  7705  }
  7706  func rewriteValue_OpStore(v *ssa.Value) bool {
  7707  	v_2 := v.Args[2]
  7708  	v_1 := v.Args[1]
  7709  	v_0 := v.Args[0]
  7710  	// match: (Store {t} ptr val mem)
  7711  	// cond: t.Size() == 1
  7712  	// result: (MOVBstore ptr val mem)
  7713  	for {
  7714  		t := ssa.AuxToType(v.Aux)
  7715  		ptr := v_0
  7716  		val := v_1
  7717  		mem := v_2
  7718  		if !(t.Size() == 1) {
  7719  			break
  7720  		}
  7721  		v.Reset(ssaop.OpMIPS64MOVBstore)
  7722  		v.AddArg3(ptr, val, mem)
  7723  		return true
  7724  	}
  7725  	// match: (Store {t} ptr val mem)
  7726  	// cond: t.Size() == 2
  7727  	// result: (MOVHstore ptr val mem)
  7728  	for {
  7729  		t := ssa.AuxToType(v.Aux)
  7730  		ptr := v_0
  7731  		val := v_1
  7732  		mem := v_2
  7733  		if !(t.Size() == 2) {
  7734  			break
  7735  		}
  7736  		v.Reset(ssaop.OpMIPS64MOVHstore)
  7737  		v.AddArg3(ptr, val, mem)
  7738  		return true
  7739  	}
  7740  	// match: (Store {t} ptr val mem)
  7741  	// cond: t.Size() == 4 && !t.IsFloat()
  7742  	// result: (MOVWstore ptr val mem)
  7743  	for {
  7744  		t := ssa.AuxToType(v.Aux)
  7745  		ptr := v_0
  7746  		val := v_1
  7747  		mem := v_2
  7748  		if !(t.Size() == 4 && !t.IsFloat()) {
  7749  			break
  7750  		}
  7751  		v.Reset(ssaop.OpMIPS64MOVWstore)
  7752  		v.AddArg3(ptr, val, mem)
  7753  		return true
  7754  	}
  7755  	// match: (Store {t} ptr val mem)
  7756  	// cond: t.Size() == 8 && !t.IsFloat()
  7757  	// result: (MOVVstore ptr val mem)
  7758  	for {
  7759  		t := ssa.AuxToType(v.Aux)
  7760  		ptr := v_0
  7761  		val := v_1
  7762  		mem := v_2
  7763  		if !(t.Size() == 8 && !t.IsFloat()) {
  7764  			break
  7765  		}
  7766  		v.Reset(ssaop.OpMIPS64MOVVstore)
  7767  		v.AddArg3(ptr, val, mem)
  7768  		return true
  7769  	}
  7770  	// match: (Store {t} ptr val mem)
  7771  	// cond: t.Size() == 4 && t.IsFloat()
  7772  	// result: (MOVFstore ptr val mem)
  7773  	for {
  7774  		t := ssa.AuxToType(v.Aux)
  7775  		ptr := v_0
  7776  		val := v_1
  7777  		mem := v_2
  7778  		if !(t.Size() == 4 && t.IsFloat()) {
  7779  			break
  7780  		}
  7781  		v.Reset(ssaop.OpMIPS64MOVFstore)
  7782  		v.AddArg3(ptr, val, mem)
  7783  		return true
  7784  	}
  7785  	// match: (Store {t} ptr val mem)
  7786  	// cond: t.Size() == 8 && t.IsFloat()
  7787  	// result: (MOVDstore ptr val mem)
  7788  	for {
  7789  		t := ssa.AuxToType(v.Aux)
  7790  		ptr := v_0
  7791  		val := v_1
  7792  		mem := v_2
  7793  		if !(t.Size() == 8 && t.IsFloat()) {
  7794  			break
  7795  		}
  7796  		v.Reset(ssaop.OpMIPS64MOVDstore)
  7797  		v.AddArg3(ptr, val, mem)
  7798  		return true
  7799  	}
  7800  	return false
  7801  }
  7802  func rewriteValue_OpZero(v *ssa.Value) bool {
  7803  	v_1 := v.Args[1]
  7804  	v_0 := v.Args[0]
  7805  	b := v.Block
  7806  	config := b.Func.Config
  7807  	typ := &b.Func.Config.Types
  7808  	// match: (Zero [0] _ mem)
  7809  	// result: mem
  7810  	for {
  7811  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  7812  			break
  7813  		}
  7814  		mem := v_1
  7815  		v.CopyOf(mem)
  7816  		return true
  7817  	}
  7818  	// match: (Zero [1] ptr mem)
  7819  	// result: (MOVBstore ptr (MOVVconst [0]) mem)
  7820  	for {
  7821  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
  7822  			break
  7823  		}
  7824  		ptr := v_0
  7825  		mem := v_1
  7826  		v.Reset(ssaop.OpMIPS64MOVBstore)
  7827  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7828  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  7829  		v.AddArg3(ptr, v0, mem)
  7830  		return true
  7831  	}
  7832  	// match: (Zero [2] {t} ptr mem)
  7833  	// cond: t.Alignment()%2 == 0
  7834  	// result: (MOVHstore ptr (MOVVconst [0]) mem)
  7835  	for {
  7836  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
  7837  			break
  7838  		}
  7839  		t := ssa.AuxToType(v.Aux)
  7840  		ptr := v_0
  7841  		mem := v_1
  7842  		if !(t.Alignment()%2 == 0) {
  7843  			break
  7844  		}
  7845  		v.Reset(ssaop.OpMIPS64MOVHstore)
  7846  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7847  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  7848  		v.AddArg3(ptr, v0, mem)
  7849  		return true
  7850  	}
  7851  	// match: (Zero [2] ptr mem)
  7852  	// result: (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem))
  7853  	for {
  7854  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
  7855  			break
  7856  		}
  7857  		ptr := v_0
  7858  		mem := v_1
  7859  		v.Reset(ssaop.OpMIPS64MOVBstore)
  7860  		v.AuxInt = ssa.Int32ToAuxInt(1)
  7861  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7862  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  7863  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  7864  		v1.AuxInt = ssa.Int32ToAuxInt(0)
  7865  		v1.AddArg3(ptr, v0, mem)
  7866  		v.AddArg3(ptr, v0, v1)
  7867  		return true
  7868  	}
  7869  	// match: (Zero [4] {t} ptr mem)
  7870  	// cond: t.Alignment()%4 == 0
  7871  	// result: (MOVWstore ptr (MOVVconst [0]) mem)
  7872  	for {
  7873  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  7874  			break
  7875  		}
  7876  		t := ssa.AuxToType(v.Aux)
  7877  		ptr := v_0
  7878  		mem := v_1
  7879  		if !(t.Alignment()%4 == 0) {
  7880  			break
  7881  		}
  7882  		v.Reset(ssaop.OpMIPS64MOVWstore)
  7883  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7884  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  7885  		v.AddArg3(ptr, v0, mem)
  7886  		return true
  7887  	}
  7888  	// match: (Zero [4] {t} ptr mem)
  7889  	// cond: t.Alignment()%2 == 0
  7890  	// result: (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem))
  7891  	for {
  7892  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  7893  			break
  7894  		}
  7895  		t := ssa.AuxToType(v.Aux)
  7896  		ptr := v_0
  7897  		mem := v_1
  7898  		if !(t.Alignment()%2 == 0) {
  7899  			break
  7900  		}
  7901  		v.Reset(ssaop.OpMIPS64MOVHstore)
  7902  		v.AuxInt = ssa.Int32ToAuxInt(2)
  7903  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7904  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  7905  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  7906  		v1.AuxInt = ssa.Int32ToAuxInt(0)
  7907  		v1.AddArg3(ptr, v0, mem)
  7908  		v.AddArg3(ptr, v0, v1)
  7909  		return true
  7910  	}
  7911  	// match: (Zero [4] ptr mem)
  7912  	// result: (MOVBstore [3] ptr (MOVVconst [0]) (MOVBstore [2] ptr (MOVVconst [0]) (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem))))
  7913  	for {
  7914  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
  7915  			break
  7916  		}
  7917  		ptr := v_0
  7918  		mem := v_1
  7919  		v.Reset(ssaop.OpMIPS64MOVBstore)
  7920  		v.AuxInt = ssa.Int32ToAuxInt(3)
  7921  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7922  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  7923  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  7924  		v1.AuxInt = ssa.Int32ToAuxInt(2)
  7925  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  7926  		v2.AuxInt = ssa.Int32ToAuxInt(1)
  7927  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  7928  		v3.AuxInt = ssa.Int32ToAuxInt(0)
  7929  		v3.AddArg3(ptr, v0, mem)
  7930  		v2.AddArg3(ptr, v0, v3)
  7931  		v1.AddArg3(ptr, v0, v2)
  7932  		v.AddArg3(ptr, v0, v1)
  7933  		return true
  7934  	}
  7935  	// match: (Zero [8] {t} ptr mem)
  7936  	// cond: t.Alignment()%8 == 0
  7937  	// result: (MOVVstore ptr (MOVVconst [0]) mem)
  7938  	for {
  7939  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  7940  			break
  7941  		}
  7942  		t := ssa.AuxToType(v.Aux)
  7943  		ptr := v_0
  7944  		mem := v_1
  7945  		if !(t.Alignment()%8 == 0) {
  7946  			break
  7947  		}
  7948  		v.Reset(ssaop.OpMIPS64MOVVstore)
  7949  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7950  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  7951  		v.AddArg3(ptr, v0, mem)
  7952  		return true
  7953  	}
  7954  	// match: (Zero [8] {t} ptr mem)
  7955  	// cond: t.Alignment()%4 == 0
  7956  	// result: (MOVWstore [4] ptr (MOVVconst [0]) (MOVWstore [0] ptr (MOVVconst [0]) mem))
  7957  	for {
  7958  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  7959  			break
  7960  		}
  7961  		t := ssa.AuxToType(v.Aux)
  7962  		ptr := v_0
  7963  		mem := v_1
  7964  		if !(t.Alignment()%4 == 0) {
  7965  			break
  7966  		}
  7967  		v.Reset(ssaop.OpMIPS64MOVWstore)
  7968  		v.AuxInt = ssa.Int32ToAuxInt(4)
  7969  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7970  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  7971  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  7972  		v1.AuxInt = ssa.Int32ToAuxInt(0)
  7973  		v1.AddArg3(ptr, v0, mem)
  7974  		v.AddArg3(ptr, v0, v1)
  7975  		return true
  7976  	}
  7977  	// match: (Zero [8] {t} ptr mem)
  7978  	// cond: t.Alignment()%2 == 0
  7979  	// result: (MOVHstore [6] ptr (MOVVconst [0]) (MOVHstore [4] ptr (MOVVconst [0]) (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem))))
  7980  	for {
  7981  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
  7982  			break
  7983  		}
  7984  		t := ssa.AuxToType(v.Aux)
  7985  		ptr := v_0
  7986  		mem := v_1
  7987  		if !(t.Alignment()%2 == 0) {
  7988  			break
  7989  		}
  7990  		v.Reset(ssaop.OpMIPS64MOVHstore)
  7991  		v.AuxInt = ssa.Int32ToAuxInt(6)
  7992  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  7993  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  7994  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  7995  		v1.AuxInt = ssa.Int32ToAuxInt(4)
  7996  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  7997  		v2.AuxInt = ssa.Int32ToAuxInt(2)
  7998  		v3 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  7999  		v3.AuxInt = ssa.Int32ToAuxInt(0)
  8000  		v3.AddArg3(ptr, v0, mem)
  8001  		v2.AddArg3(ptr, v0, v3)
  8002  		v1.AddArg3(ptr, v0, v2)
  8003  		v.AddArg3(ptr, v0, v1)
  8004  		return true
  8005  	}
  8006  	// match: (Zero [3] ptr mem)
  8007  	// result: (MOVBstore [2] ptr (MOVVconst [0]) (MOVBstore [1] ptr (MOVVconst [0]) (MOVBstore [0] ptr (MOVVconst [0]) mem)))
  8008  	for {
  8009  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
  8010  			break
  8011  		}
  8012  		ptr := v_0
  8013  		mem := v_1
  8014  		v.Reset(ssaop.OpMIPS64MOVBstore)
  8015  		v.AuxInt = ssa.Int32ToAuxInt(2)
  8016  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8017  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8018  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  8019  		v1.AuxInt = ssa.Int32ToAuxInt(1)
  8020  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVBstore, types.TypeMem)
  8021  		v2.AuxInt = ssa.Int32ToAuxInt(0)
  8022  		v2.AddArg3(ptr, v0, mem)
  8023  		v1.AddArg3(ptr, v0, v2)
  8024  		v.AddArg3(ptr, v0, v1)
  8025  		return true
  8026  	}
  8027  	// match: (Zero [6] {t} ptr mem)
  8028  	// cond: t.Alignment()%2 == 0
  8029  	// result: (MOVHstore [4] ptr (MOVVconst [0]) (MOVHstore [2] ptr (MOVVconst [0]) (MOVHstore [0] ptr (MOVVconst [0]) mem)))
  8030  	for {
  8031  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
  8032  			break
  8033  		}
  8034  		t := ssa.AuxToType(v.Aux)
  8035  		ptr := v_0
  8036  		mem := v_1
  8037  		if !(t.Alignment()%2 == 0) {
  8038  			break
  8039  		}
  8040  		v.Reset(ssaop.OpMIPS64MOVHstore)
  8041  		v.AuxInt = ssa.Int32ToAuxInt(4)
  8042  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8043  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8044  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  8045  		v1.AuxInt = ssa.Int32ToAuxInt(2)
  8046  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVHstore, types.TypeMem)
  8047  		v2.AuxInt = ssa.Int32ToAuxInt(0)
  8048  		v2.AddArg3(ptr, v0, mem)
  8049  		v1.AddArg3(ptr, v0, v2)
  8050  		v.AddArg3(ptr, v0, v1)
  8051  		return true
  8052  	}
  8053  	// match: (Zero [12] {t} ptr mem)
  8054  	// cond: t.Alignment()%4 == 0
  8055  	// result: (MOVWstore [8] ptr (MOVVconst [0]) (MOVWstore [4] ptr (MOVVconst [0]) (MOVWstore [0] ptr (MOVVconst [0]) mem)))
  8056  	for {
  8057  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
  8058  			break
  8059  		}
  8060  		t := ssa.AuxToType(v.Aux)
  8061  		ptr := v_0
  8062  		mem := v_1
  8063  		if !(t.Alignment()%4 == 0) {
  8064  			break
  8065  		}
  8066  		v.Reset(ssaop.OpMIPS64MOVWstore)
  8067  		v.AuxInt = ssa.Int32ToAuxInt(8)
  8068  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8069  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8070  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  8071  		v1.AuxInt = ssa.Int32ToAuxInt(4)
  8072  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVWstore, types.TypeMem)
  8073  		v2.AuxInt = ssa.Int32ToAuxInt(0)
  8074  		v2.AddArg3(ptr, v0, mem)
  8075  		v1.AddArg3(ptr, v0, v2)
  8076  		v.AddArg3(ptr, v0, v1)
  8077  		return true
  8078  	}
  8079  	// match: (Zero [16] {t} ptr mem)
  8080  	// cond: t.Alignment()%8 == 0
  8081  	// result: (MOVVstore [8] ptr (MOVVconst [0]) (MOVVstore [0] ptr (MOVVconst [0]) mem))
  8082  	for {
  8083  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
  8084  			break
  8085  		}
  8086  		t := ssa.AuxToType(v.Aux)
  8087  		ptr := v_0
  8088  		mem := v_1
  8089  		if !(t.Alignment()%8 == 0) {
  8090  			break
  8091  		}
  8092  		v.Reset(ssaop.OpMIPS64MOVVstore)
  8093  		v.AuxInt = ssa.Int32ToAuxInt(8)
  8094  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8095  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8096  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  8097  		v1.AuxInt = ssa.Int32ToAuxInt(0)
  8098  		v1.AddArg3(ptr, v0, mem)
  8099  		v.AddArg3(ptr, v0, v1)
  8100  		return true
  8101  	}
  8102  	// match: (Zero [24] {t} ptr mem)
  8103  	// cond: t.Alignment()%8 == 0
  8104  	// result: (MOVVstore [16] ptr (MOVVconst [0]) (MOVVstore [8] ptr (MOVVconst [0]) (MOVVstore [0] ptr (MOVVconst [0]) mem)))
  8105  	for {
  8106  		if ssa.AuxIntToInt64(v.AuxInt) != 24 {
  8107  			break
  8108  		}
  8109  		t := ssa.AuxToType(v.Aux)
  8110  		ptr := v_0
  8111  		mem := v_1
  8112  		if !(t.Alignment()%8 == 0) {
  8113  			break
  8114  		}
  8115  		v.Reset(ssaop.OpMIPS64MOVVstore)
  8116  		v.AuxInt = ssa.Int32ToAuxInt(16)
  8117  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVconst, typ.UInt64)
  8118  		v0.AuxInt = ssa.Int64ToAuxInt(0)
  8119  		v1 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  8120  		v1.AuxInt = ssa.Int32ToAuxInt(8)
  8121  		v2 := b.NewValue0(v.Pos, ssaop.OpMIPS64MOVVstore, types.TypeMem)
  8122  		v2.AuxInt = ssa.Int32ToAuxInt(0)
  8123  		v2.AddArg3(ptr, v0, mem)
  8124  		v1.AddArg3(ptr, v0, v2)
  8125  		v.AddArg3(ptr, v0, v1)
  8126  		return true
  8127  	}
  8128  	// match: (Zero [s] {t} ptr mem)
  8129  	// cond: s%8 == 0 && s > 24 && s <= 8*128 && t.Alignment()%8 == 0
  8130  	// result: (DUFFZERO [8 * (128 - s/8)] ptr mem)
  8131  	for {
  8132  		s := ssa.AuxIntToInt64(v.AuxInt)
  8133  		t := ssa.AuxToType(v.Aux)
  8134  		ptr := v_0
  8135  		mem := v_1
  8136  		if !(s%8 == 0 && s > 24 && s <= 8*128 && t.Alignment()%8 == 0) {
  8137  			break
  8138  		}
  8139  		v.Reset(ssaop.OpMIPS64DUFFZERO)
  8140  		v.AuxInt = ssa.Int64ToAuxInt(8 * (128 - s/8))
  8141  		v.AddArg2(ptr, mem)
  8142  		return true
  8143  	}
  8144  	// match: (Zero [s] {t} ptr mem)
  8145  	// cond: s > 8*128 || t.Alignment()%8 != 0
  8146  	// result: (LoweredZero [t.Alignment()] ptr (ADDVconst <ptr.Type> ptr [s-ssa.MoveSize(t.Alignment(), config)]) mem)
  8147  	for {
  8148  		s := ssa.AuxIntToInt64(v.AuxInt)
  8149  		t := ssa.AuxToType(v.Aux)
  8150  		ptr := v_0
  8151  		mem := v_1
  8152  		if !(s > 8*128 || t.Alignment()%8 != 0) {
  8153  			break
  8154  		}
  8155  		v.Reset(ssaop.OpMIPS64LoweredZero)
  8156  		v.AuxInt = ssa.Int64ToAuxInt(t.Alignment())
  8157  		v0 := b.NewValue0(v.Pos, ssaop.OpMIPS64ADDVconst, ptr.Type)
  8158  		v0.AuxInt = ssa.Int64ToAuxInt(s - ssa.MoveSize(t.Alignment(), config))
  8159  		v0.AddArg(ptr)
  8160  		v.AddArg3(ptr, v0, mem)
  8161  		return true
  8162  	}
  8163  	return false
  8164  }
  8165  func RewriteBlock(b *ssa.Block) bool {
  8166  	switch b.Kind {
  8167  	case block.BlockMIPS64EQ:
  8168  		// match: (EQ (FPFlagTrue cmp) yes no)
  8169  		// result: (FPF cmp yes no)
  8170  		for b.Controls[0].Op == ssaop.OpMIPS64FPFlagTrue {
  8171  			v_0 := b.Controls[0]
  8172  			cmp := v_0.Args[0]
  8173  			b.ResetWithControl(block.BlockMIPS64FPF, cmp)
  8174  			return true
  8175  		}
  8176  		// match: (EQ (FPFlagFalse cmp) yes no)
  8177  		// result: (FPT cmp yes no)
  8178  		for b.Controls[0].Op == ssaop.OpMIPS64FPFlagFalse {
  8179  			v_0 := b.Controls[0]
  8180  			cmp := v_0.Args[0]
  8181  			b.ResetWithControl(block.BlockMIPS64FPT, cmp)
  8182  			return true
  8183  		}
  8184  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  8185  		// result: (NE cmp yes no)
  8186  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  8187  			v_0 := b.Controls[0]
  8188  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8189  				break
  8190  			}
  8191  			cmp := v_0.Args[0]
  8192  			if cmp.Op != ssaop.OpMIPS64SGT {
  8193  				break
  8194  			}
  8195  			b.ResetWithControl(block.BlockMIPS64NE, cmp)
  8196  			return true
  8197  		}
  8198  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  8199  		// result: (NE cmp yes no)
  8200  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  8201  			v_0 := b.Controls[0]
  8202  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8203  				break
  8204  			}
  8205  			cmp := v_0.Args[0]
  8206  			if cmp.Op != ssaop.OpMIPS64SGTU {
  8207  				break
  8208  			}
  8209  			b.ResetWithControl(block.BlockMIPS64NE, cmp)
  8210  			return true
  8211  		}
  8212  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  8213  		// result: (NE cmp yes no)
  8214  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  8215  			v_0 := b.Controls[0]
  8216  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8217  				break
  8218  			}
  8219  			cmp := v_0.Args[0]
  8220  			if cmp.Op != ssaop.OpMIPS64SGTconst {
  8221  				break
  8222  			}
  8223  			b.ResetWithControl(block.BlockMIPS64NE, cmp)
  8224  			return true
  8225  		}
  8226  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  8227  		// result: (NE cmp yes no)
  8228  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  8229  			v_0 := b.Controls[0]
  8230  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8231  				break
  8232  			}
  8233  			cmp := v_0.Args[0]
  8234  			if cmp.Op != ssaop.OpMIPS64SGTUconst {
  8235  				break
  8236  			}
  8237  			b.ResetWithControl(block.BlockMIPS64NE, cmp)
  8238  			return true
  8239  		}
  8240  		// match: (EQ (SGTUconst [1] x) yes no)
  8241  		// result: (NE x yes no)
  8242  		for b.Controls[0].Op == ssaop.OpMIPS64SGTUconst {
  8243  			v_0 := b.Controls[0]
  8244  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8245  				break
  8246  			}
  8247  			x := v_0.Args[0]
  8248  			b.ResetWithControl(block.BlockMIPS64NE, x)
  8249  			return true
  8250  		}
  8251  		// match: (EQ (SGTU x (MOVVconst [0])) yes no)
  8252  		// result: (EQ x yes no)
  8253  		for b.Controls[0].Op == ssaop.OpMIPS64SGTU {
  8254  			v_0 := b.Controls[0]
  8255  			_ = v_0.Args[1]
  8256  			x := v_0.Args[0]
  8257  			v_0_1 := v_0.Args[1]
  8258  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  8259  				break
  8260  			}
  8261  			b.ResetWithControl(block.BlockMIPS64EQ, x)
  8262  			return true
  8263  		}
  8264  		// match: (EQ (SGTconst [0] x) yes no)
  8265  		// result: (GEZ x yes no)
  8266  		for b.Controls[0].Op == ssaop.OpMIPS64SGTconst {
  8267  			v_0 := b.Controls[0]
  8268  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8269  				break
  8270  			}
  8271  			x := v_0.Args[0]
  8272  			b.ResetWithControl(block.BlockMIPS64GEZ, x)
  8273  			return true
  8274  		}
  8275  		// match: (EQ (SGT x (MOVVconst [0])) yes no)
  8276  		// result: (LEZ x yes no)
  8277  		for b.Controls[0].Op == ssaop.OpMIPS64SGT {
  8278  			v_0 := b.Controls[0]
  8279  			_ = v_0.Args[1]
  8280  			x := v_0.Args[0]
  8281  			v_0_1 := v_0.Args[1]
  8282  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  8283  				break
  8284  			}
  8285  			b.ResetWithControl(block.BlockMIPS64LEZ, x)
  8286  			return true
  8287  		}
  8288  		// match: (EQ (MOVVconst [0]) yes no)
  8289  		// result: (First yes no)
  8290  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8291  			v_0 := b.Controls[0]
  8292  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8293  				break
  8294  			}
  8295  			b.Reset(block.BlockFirst)
  8296  			return true
  8297  		}
  8298  		// match: (EQ (MOVVconst [c]) yes no)
  8299  		// cond: c != 0
  8300  		// result: (First no yes)
  8301  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8302  			v_0 := b.Controls[0]
  8303  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8304  			if !(c != 0) {
  8305  				break
  8306  			}
  8307  			b.Reset(block.BlockFirst)
  8308  			b.SwapSuccessors()
  8309  			return true
  8310  		}
  8311  	case block.BlockMIPS64GEZ:
  8312  		// match: (GEZ (MOVVconst [c]) yes no)
  8313  		// cond: c >= 0
  8314  		// result: (First yes no)
  8315  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8316  			v_0 := b.Controls[0]
  8317  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8318  			if !(c >= 0) {
  8319  				break
  8320  			}
  8321  			b.Reset(block.BlockFirst)
  8322  			return true
  8323  		}
  8324  		// match: (GEZ (MOVVconst [c]) yes no)
  8325  		// cond: c < 0
  8326  		// result: (First no yes)
  8327  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8328  			v_0 := b.Controls[0]
  8329  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8330  			if !(c < 0) {
  8331  				break
  8332  			}
  8333  			b.Reset(block.BlockFirst)
  8334  			b.SwapSuccessors()
  8335  			return true
  8336  		}
  8337  	case block.BlockMIPS64GTZ:
  8338  		// match: (GTZ (MOVVconst [c]) yes no)
  8339  		// cond: c > 0
  8340  		// result: (First yes no)
  8341  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8342  			v_0 := b.Controls[0]
  8343  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8344  			if !(c > 0) {
  8345  				break
  8346  			}
  8347  			b.Reset(block.BlockFirst)
  8348  			return true
  8349  		}
  8350  		// match: (GTZ (MOVVconst [c]) yes no)
  8351  		// cond: c <= 0
  8352  		// result: (First no yes)
  8353  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8354  			v_0 := b.Controls[0]
  8355  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8356  			if !(c <= 0) {
  8357  				break
  8358  			}
  8359  			b.Reset(block.BlockFirst)
  8360  			b.SwapSuccessors()
  8361  			return true
  8362  		}
  8363  	case block.BlockIf:
  8364  		// match: (If cond yes no)
  8365  		// result: (NE cond yes no)
  8366  		for {
  8367  			cond := b.Controls[0]
  8368  			b.ResetWithControl(block.BlockMIPS64NE, cond)
  8369  			return true
  8370  		}
  8371  	case block.BlockMIPS64LEZ:
  8372  		// match: (LEZ (MOVVconst [c]) yes no)
  8373  		// cond: c <= 0
  8374  		// result: (First yes no)
  8375  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8376  			v_0 := b.Controls[0]
  8377  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8378  			if !(c <= 0) {
  8379  				break
  8380  			}
  8381  			b.Reset(block.BlockFirst)
  8382  			return true
  8383  		}
  8384  		// match: (LEZ (MOVVconst [c]) yes no)
  8385  		// cond: c > 0
  8386  		// result: (First no yes)
  8387  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8388  			v_0 := b.Controls[0]
  8389  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8390  			if !(c > 0) {
  8391  				break
  8392  			}
  8393  			b.Reset(block.BlockFirst)
  8394  			b.SwapSuccessors()
  8395  			return true
  8396  		}
  8397  	case block.BlockMIPS64LTZ:
  8398  		// match: (LTZ (MOVVconst [c]) yes no)
  8399  		// cond: c < 0
  8400  		// result: (First yes no)
  8401  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8402  			v_0 := b.Controls[0]
  8403  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8404  			if !(c < 0) {
  8405  				break
  8406  			}
  8407  			b.Reset(block.BlockFirst)
  8408  			return true
  8409  		}
  8410  		// match: (LTZ (MOVVconst [c]) yes no)
  8411  		// cond: c >= 0
  8412  		// result: (First no yes)
  8413  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8414  			v_0 := b.Controls[0]
  8415  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8416  			if !(c >= 0) {
  8417  				break
  8418  			}
  8419  			b.Reset(block.BlockFirst)
  8420  			b.SwapSuccessors()
  8421  			return true
  8422  		}
  8423  	case block.BlockMIPS64NE:
  8424  		// match: (NE (FPFlagTrue cmp) yes no)
  8425  		// result: (FPT cmp yes no)
  8426  		for b.Controls[0].Op == ssaop.OpMIPS64FPFlagTrue {
  8427  			v_0 := b.Controls[0]
  8428  			cmp := v_0.Args[0]
  8429  			b.ResetWithControl(block.BlockMIPS64FPT, cmp)
  8430  			return true
  8431  		}
  8432  		// match: (NE (FPFlagFalse cmp) yes no)
  8433  		// result: (FPF cmp yes no)
  8434  		for b.Controls[0].Op == ssaop.OpMIPS64FPFlagFalse {
  8435  			v_0 := b.Controls[0]
  8436  			cmp := v_0.Args[0]
  8437  			b.ResetWithControl(block.BlockMIPS64FPF, cmp)
  8438  			return true
  8439  		}
  8440  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  8441  		// result: (EQ cmp yes no)
  8442  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  8443  			v_0 := b.Controls[0]
  8444  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8445  				break
  8446  			}
  8447  			cmp := v_0.Args[0]
  8448  			if cmp.Op != ssaop.OpMIPS64SGT {
  8449  				break
  8450  			}
  8451  			b.ResetWithControl(block.BlockMIPS64EQ, cmp)
  8452  			return true
  8453  		}
  8454  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  8455  		// result: (EQ cmp yes no)
  8456  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  8457  			v_0 := b.Controls[0]
  8458  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8459  				break
  8460  			}
  8461  			cmp := v_0.Args[0]
  8462  			if cmp.Op != ssaop.OpMIPS64SGTU {
  8463  				break
  8464  			}
  8465  			b.ResetWithControl(block.BlockMIPS64EQ, cmp)
  8466  			return true
  8467  		}
  8468  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  8469  		// result: (EQ cmp yes no)
  8470  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  8471  			v_0 := b.Controls[0]
  8472  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8473  				break
  8474  			}
  8475  			cmp := v_0.Args[0]
  8476  			if cmp.Op != ssaop.OpMIPS64SGTconst {
  8477  				break
  8478  			}
  8479  			b.ResetWithControl(block.BlockMIPS64EQ, cmp)
  8480  			return true
  8481  		}
  8482  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  8483  		// result: (EQ cmp yes no)
  8484  		for b.Controls[0].Op == ssaop.OpMIPS64XORconst {
  8485  			v_0 := b.Controls[0]
  8486  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8487  				break
  8488  			}
  8489  			cmp := v_0.Args[0]
  8490  			if cmp.Op != ssaop.OpMIPS64SGTUconst {
  8491  				break
  8492  			}
  8493  			b.ResetWithControl(block.BlockMIPS64EQ, cmp)
  8494  			return true
  8495  		}
  8496  		// match: (NE (SGTUconst [1] x) yes no)
  8497  		// result: (EQ x yes no)
  8498  		for b.Controls[0].Op == ssaop.OpMIPS64SGTUconst {
  8499  			v_0 := b.Controls[0]
  8500  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  8501  				break
  8502  			}
  8503  			x := v_0.Args[0]
  8504  			b.ResetWithControl(block.BlockMIPS64EQ, x)
  8505  			return true
  8506  		}
  8507  		// match: (NE (SGTU x (MOVVconst [0])) yes no)
  8508  		// result: (NE x yes no)
  8509  		for b.Controls[0].Op == ssaop.OpMIPS64SGTU {
  8510  			v_0 := b.Controls[0]
  8511  			_ = v_0.Args[1]
  8512  			x := v_0.Args[0]
  8513  			v_0_1 := v_0.Args[1]
  8514  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  8515  				break
  8516  			}
  8517  			b.ResetWithControl(block.BlockMIPS64NE, x)
  8518  			return true
  8519  		}
  8520  		// match: (NE (SGTconst [0] x) yes no)
  8521  		// result: (LTZ x yes no)
  8522  		for b.Controls[0].Op == ssaop.OpMIPS64SGTconst {
  8523  			v_0 := b.Controls[0]
  8524  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8525  				break
  8526  			}
  8527  			x := v_0.Args[0]
  8528  			b.ResetWithControl(block.BlockMIPS64LTZ, x)
  8529  			return true
  8530  		}
  8531  		// match: (NE (SGT x (MOVVconst [0])) yes no)
  8532  		// result: (GTZ x yes no)
  8533  		for b.Controls[0].Op == ssaop.OpMIPS64SGT {
  8534  			v_0 := b.Controls[0]
  8535  			_ = v_0.Args[1]
  8536  			x := v_0.Args[0]
  8537  			v_0_1 := v_0.Args[1]
  8538  			if v_0_1.Op != ssaop.OpMIPS64MOVVconst || ssa.AuxIntToInt64(v_0_1.AuxInt) != 0 {
  8539  				break
  8540  			}
  8541  			b.ResetWithControl(block.BlockMIPS64GTZ, x)
  8542  			return true
  8543  		}
  8544  		// match: (NE (MOVVconst [0]) yes no)
  8545  		// result: (First no yes)
  8546  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8547  			v_0 := b.Controls[0]
  8548  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8549  				break
  8550  			}
  8551  			b.Reset(block.BlockFirst)
  8552  			b.SwapSuccessors()
  8553  			return true
  8554  		}
  8555  		// match: (NE (MOVVconst [c]) yes no)
  8556  		// cond: c != 0
  8557  		// result: (First yes no)
  8558  		for b.Controls[0].Op == ssaop.OpMIPS64MOVVconst {
  8559  			v_0 := b.Controls[0]
  8560  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  8561  			if !(c != 0) {
  8562  				break
  8563  			}
  8564  			b.Reset(block.BlockFirst)
  8565  			return true
  8566  		}
  8567  	}
  8568  	return false
  8569  }
  8570  

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