!sum
# Float <-> Int conversions
# float32 -> int32
- go: ConvertToInt32
  regexpTag: "convert"
  asm: "VCVTTPS2DQ"
  in:
  - &fp
    go: $t
    base: float
  out:
  - &i32
    go: $u
    base: int
    elemBits: 32
# float32 -> uint32
- go: ConvertToUint32
  regexpTag: "convert"
  asm: "VCVTPS2UDQ"
  in:
  - *fp
  out:
  - &u32
    go: $u
    base: uint
    elemBits: 32
# Widening integer conversions.
# uint8 -> uint16
- go: ExtendToUint16
  addDoc: &zeroExtendDoc
    !string |-
    // The result vector's elements are zero-extended.
  regexpTag: "convert"
  asm: "VPMOVZXBW"
  in:
  - &u8x16
    base: uint
    elemBits: 8
    bits: 128
  out:
  - &u16x16
    base: uint
    elemBits: 16
    bits: 256
- go: ExtendToUint16
  regexpTag: "convert"
  asm: "VPMOVZXBW"
  addDoc: *zeroExtendDoc
  in:
  - &u8x32
    base: uint
    elemBits: 8
    bits: 256
  out:
  - &u16x32
    base: uint
    elemBits: 16
    bits: 512
# int8 -> int16
- go: ExtendToInt16
  regexpTag: "convert"
  asm: "VPMOVSXBW"
  addDoc: &signExtendDoc
    !string |-
    // The result vector's elements are sign-extended.
  in:
  - &i8x16
    base: int
    elemBits: 8
    bits: 128
  out:
  - &i16x16
    base: int
    elemBits: 16
    bits: 256
- go: ExtendToInt16
  regexpTag: "convert"
  asm: "VPMOVSXBW"
  addDoc: *signExtendDoc
  in:
  - &i8x32
    base: int
    elemBits: 8
    bits: 256
  out:
  - &i16x32
    base: int
    elemBits: 16
    bits: 512
# uint16->uint32
- go: ExtendToUint32
  regexpTag: "convert"
  asm: "VPMOVZXWD"
  addDoc: *zeroExtendDoc
  in:
  - &u16x8
    base: uint
    elemBits: 16
    bits: 128
  out:
  - &u32x8
    base: uint
    elemBits: 32
    bits: 256
- go: ExtendToUint32
  regexpTag: "convert"
  asm: "VPMOVZXWD"
  addDoc: *zeroExtendDoc
  in:
  - *u16x16
  out:
  - &u32x16
    base: uint
    elemBits: 32
    bits: 512
# int16->int32
- go: ExtendToInt32
  regexpTag: "convert"
  asm: "VPMOVSXWD"
  addDoc: *signExtendDoc
  in:
  - &i16x8
    base: int
    elemBits: 16
    bits: 128
  out:
  - &i32x8
    base: int
    elemBits: 32
    bits: 256
- go: ExtendToInt32
  regexpTag: "convert"
  asm: "VPMOVSXWD"
  addDoc: *signExtendDoc
  in:
  - *i16x16
  out:
  - &i32x16
    base: int
    elemBits: 32
    bits: 512
# uint32 -> uint64
- go: ExtendToUint64
  regexpTag: "convert"
  asm: "VPMOVZXDQ"
  addDoc: *zeroExtendDoc
  in:
  - &u32x4
    base: uint
    elemBits: 32
    bits: 128
  out:
  - &u64x4
    base: uint
    elemBits: 64
    bits: 256
- go: ExtendToUint64
  regexpTag: "convert"
  asm: "VPMOVZXDQ"
  addDoc: *zeroExtendDoc
  in:
  - *u32x8
  out:
  - &u64x8
    base: uint
    elemBits: 64
    bits: 512
# int32 -> int64
- go: ExtendToInt64
  regexpTag: "convert"
  asm: "VPMOVSXDQ"
  addDoc: *signExtendDoc
  in:
  - &i32x4
    base: int
    elemBits: 32
    bits: 128
  out:
  - &i64x4
    base: int
    elemBits: 64
    bits: 256
- go: ExtendToInt64
  regexpTag: "convert"
  asm: "VPMOVSXDQ"
  addDoc: *signExtendDoc
  in:
  - *i32x8
  out:
  - &i64x8
    base: int
    elemBits: 64
    bits: 512
# uint16 -> uint64
- go: ExtendToUint64
  regexpTag: "convert"
  asm: "VPMOVZXWQ"
  addDoc: *zeroExtendDoc
  in:
  - *u16x8
  out:
  - *u64x8
# int16 -> int64
- go: ExtendToInt64
  regexpTag: "convert"
  asm: "VPMOVSXWQ"
  addDoc: *signExtendDoc
  in:
  - *i16x8
  out:
  - *i64x8
# uint8 -> uint32
- go: ExtendToUint32
  regexpTag: "convert"
  asm: "VPMOVZXBD"
  addDoc: *zeroExtendDoc
  in:
  - *u8x16
  out:
  - *u32x16
# int8 -> int32
- go: ExtendToInt32
  regexpTag: "convert"
  asm: "VPMOVSXBD"
  addDoc: *signExtendDoc
  in:
  - *i8x16
  out:
  - *i32x16
# Truncating conversions
- go: TruncateToInt8
  regexpTag: "convert"
  asm: "VPMOV[WDQ]B"
  addDoc: &truncDocZeroUpper
    !string |-
    // Conversion is done with truncation on the vector elements.
    // Results are packed to low elements in the returned vector, its upper elements are zero-cleared.
  in:
    - base: int
  out:
    - base: int
      bits: 128
- go: TruncateToUint8
  regexpTag: "convert"
  asm: "VPMOV[WDQ]B"
  addDoc: *truncDocZeroUpper
  in:
    - base: uint
  out:
    - base: uint
      bits: 128
- go: TruncateToInt8
  regexpTag: "convert"
  asm: "VPMOV[WDQ]B"
  addDoc: &truncDoc
    !string |-
    // Conversion is done with truncation on the vector elements.
  in:
    - base: int
  out:
    - base: int
      bits: 256|512
- go: TruncateToUint8
  regexpTag: "convert"
  asm: "VPMOV[WDQ]B"
  addDoc: *truncDoc
  in:
    - base: uint
  out:
    - base: uint
      bits: 256|512
- go: TruncateToInt16
  regexpTag: "convert"
  asm: "VPMOV[DQ]W"
  addDoc: *truncDoc
  in:
    - base: int
  out:
    - base: int
- go: TruncateToUint16
  regexpTag: "convert"
  asm: "VPMOV[DQ]W"
  addDoc: *truncDoc
  in:
    - base: uint
  out:
    - base: uint
- go: TruncateToInt32
  regexpTag: "convert"
  asm: "VPMOVQD"
  addDoc: *truncDoc
  in:
    - base: int
  out:
    - base: int
- go: TruncateToUint32
  regexpTag: "convert"
  asm: "VPMOVQD"
  addDoc: *truncDoc
  in:
    - base: uint
  out:
    - base: uint
# Saturated conversions.
- go: SaturateToInt8
  regexpTag: "convert"
  asm: "VPMOVS[WDQ]B"
  addDoc: &satDocZeroUpper
    !string |-
    // Conversion is done with saturation on the vector elements.
    // Results are packed to low elements in the returned vector, its upper elements are zero-cleared.
  in:
    - base: int
  out:
    - base: int
      bits: 128
- go: SaturateToUint8
  regexpTag: "convert"
  asm: "VPMOVS[WDQ]B"
  addDoc: *satDocZeroUpper
  in:
    - base: int
  out:
    - base: int
      bits: 128
- go: SaturateToInt8
  regexpTag: "convert"
  asm: "VPMOVS[WDQ]B"
  addDoc: &satDoc
    !string |-
    // Conversion is done with saturation on the vector elements.
  in:
    - base: int
  out:
    - base: int
      bits: 256|512
- go: SaturateToUint8
  regexpTag: "convert"
  asm: "VPMOVUS[WDQ]B"
  addDoc: *satDoc
  in:
    - base: uint
  out:
    - base: uint
      bits: 256|512
- go: SaturateToInt16
  regexpTag: "convert"
  asm: "VPMOVS[DQ]W"
  addDoc: *satDoc
  in:
    - base: int
  out:
    - base: int
- go: SaturateToUint16
  regexpTag: "convert"
  asm: "VPMOVUS[DQ]W"
  addDoc: *satDoc
  in:
    - base: uint
  out:
    - base: uint
- go: SaturateToInt32
  regexpTag: "convert"
  asm: "VPMOVSQD"
  addDoc: *satDoc
  in:
    - base: int
  out:
    - base: int
- go: SaturateToUint32
  regexpTag: "convert"
  asm: "VPMOVUSQD"
  addDoc: *satDoc
  in:
    - base: uint
  out:
    - base: uint
# Truncating saturated packed
- go: SaturateToInt16Concat
  regexpTag: "convert"
  asm: "VPACKSSDW"
  addDoc: &satDocConcat
    !string |-
    // With each 128-bit as a group:
    // The converted group from the first input vector will be packed to the lower part of the result vector,
    // the converted group from the second input vector will be packed to the upper part of the result vector.
    // Conversion is done with saturation on the vector elements.
  in:
    - base: int
    - base: int
  out:
    - base: int
- go: SaturateToUint16Concat
  regexpTag: "convert"
  asm: "VPACKUSDW"
  addDoc: *satDocConcat
  in:
    - base: uint
    - base: uint
  out:
    - base: uint

# low-part only conversions.
# uint8->uint16
- go: ExtendLo8ToUint16x8
  regexpTag: "convert"
  asm: "VPMOVZXBW"
  addDoc: *zeroExtendDoc
  in:
  - *u8x16
  out:
  - *u16x8
# int8->int16
- go: ExtendLo8ToInt16x8
  regexpTag: "convert"
  asm: "VPMOVSXBW"
  addDoc: *signExtendDoc
  in:
  - *i8x16
  out:
  - *i16x8
# uint16->uint32
- go: ExtendLo4ToUint32x4
  regexpTag: "convert"
  asm: "VPMOVZXWD"
  addDoc: *zeroExtendDoc
  in:
  - *u16x8
  out:
  - *u32x4
# int16->int32
- go: ExtendLo4ToInt32x4
  regexpTag: "convert"
  asm: "VPMOVSXWD"
  addDoc: *signExtendDoc
  in:
  - *i16x8
  out:
  - *i32x4
# uint32 -> uint64
- go: ExtendLo2ToUint64x2
  regexpTag: "convert"
  asm: "VPMOVZXDQ"
  addDoc: *zeroExtendDoc
  in:
  - *u32x4
  out:
  - &u64x2
    base: uint
    elemBits: 64
    bits: 128
# int32 -> int64
- go: ExtendLo2ToInt64x2
  regexpTag: "convert"
  asm: "VPMOVSXDQ"
  addDoc: *signExtendDoc
  in:
  - *i32x4
  out:
  - &i64x2
    base: int
    elemBits: 64
    bits: 128
# uint16 -> uint64
- go: ExtendLo2ToUint64x2
  regexpTag: "convert"
  asm: "VPMOVZXWQ"
  addDoc: *zeroExtendDoc
  in:
  - *u16x8
  out:
  - *u64x2
- go: ExtendLo4ToUint64x4
  regexpTag: "convert"
  asm: "VPMOVZXWQ"
  addDoc: *zeroExtendDoc
  in:
  - *u16x8
  out:
  - *u64x4
# int16 -> int64
- go: ExtendLo2ToInt64x2
  regexpTag: "convert"
  asm: "VPMOVSXWQ"
  addDoc: *signExtendDoc
  in:
  - *i16x8
  out:
  - *i64x2
- go: ExtendLo4ToInt64x4
  regexpTag: "convert"
  asm: "VPMOVSXWQ"
  addDoc: *signExtendDoc
  in:
  - *i16x8
  out:
  - *i64x4
# uint8 -> uint32
- go: ExtendLo4ToUint32x4
  regexpTag: "convert"
  asm: "VPMOVZXBD"
  addDoc: *zeroExtendDoc
  in:
  - *u8x16
  out:
  - *u32x4
- go: ExtendLo8ToUint32x8
  regexpTag: "convert"
  asm: "VPMOVZXBD"
  addDoc: *zeroExtendDoc
  in:
  - *u8x16
  out:
  - *u32x8
# int8 -> int32
- go: ExtendLo4ToInt32x4
  regexpTag: "convert"
  asm: "VPMOVSXBD"
  addDoc: *signExtendDoc
  in:
  - *i8x16
  out:
  - *i32x4
- go: ExtendLo8ToInt32x8
  regexpTag: "convert"
  asm: "VPMOVSXBD"
  addDoc: *signExtendDoc
  in:
  - *i8x16
  out:
  - *i32x8
# uint8 -> uint64
- go: ExtendLo2ToUint64x2
  regexpTag: "convert"
  asm: "VPMOVZXBQ"
  addDoc: *zeroExtendDoc
  in:
  - *u8x16
  out:
  - *u64x2
- go: ExtendLo4ToUint64x4
  regexpTag: "convert"
  asm: "VPMOVZXBQ"
  addDoc: *zeroExtendDoc
  in:
  - *u8x16
  out:
  - *u64x4
- go: ExtendLo8ToUint64x8
  regexpTag: "convert"
  asm: "VPMOVZXBQ"
  addDoc: *zeroExtendDoc
  in:
  - *u8x16
  out:
  - *u64x8
# int8 -> int64
- go: ExtendLo2ToInt64x2
  regexpTag: "convert"
  asm: "VPMOVSXBQ"
  addDoc: *signExtendDoc
  in:
  - *i8x16
  out:
  - *i64x2
- go: ExtendLo4ToInt64x4
  regexpTag: "convert"
  asm: "VPMOVSXBQ"
  addDoc: *signExtendDoc
  in:
  - *i8x16
  out:
  - *i64x4
- go: ExtendLo8ToInt64x8
  regexpTag: "convert"
  asm: "VPMOVSXBQ"
  addDoc: *signExtendDoc
  in:
  - *i8x16
  out:
  - *i64x8