1 !sum
2 - go: SetElem
3 asm: "VPINSR[BWDQ]"
4 in:
5 - &t
6 class: vreg
7 base: $b
8 - class: greg
9 base: $b
10 lanes: 1 # Scalar, darn it!
11 - &imm
12 class: immediate
13 immOffset: 0
14 name: index
15 out:
16 - *t
17
18 - go: SetElem
19 asm: "VPINSR[DQ]"
20 in:
21 - &t
22 class: vreg
23 base: int
24 OverwriteBase: float
25 - class: greg
26 base: int
27 OverwriteBase: float
28 lanes: 1 # Scalar, darn it!
29 - &imm
30 class: immediate
31 immOffset: 0
32 name: index
33 out:
34 - *t
35
36 - go: GetElem
37 asm: "VPEXTR[BWDQ]"
38 in:
39 - class: vreg
40 base: $b
41 elemBits: $e
42 - *imm
43 out:
44 - class: greg
45 base: $b
46 bits: $e
47
48 - go: GetElem
49 asm: "VPEXTR[DQ]"
50 in:
51 - class: vreg
52 base: int
53 elemBits: $e
54 OverwriteBase: float
55 - *imm
56 out:
57 - class: greg
58 base: int
59 bits: $e
60 OverwriteBase: float
61
62 - go: "SetHi|SetLo"
63 regexpTag: "move"
64 asm: "VINSERTI128|VINSERTI64X4"
65 inVariant: []
66 in:
67 - &i8x2N
68 class: vreg
69 base: $t
70 OverwriteElementBits: 8
71 - &i8xN
72 class: vreg
73 base: $t
74 OverwriteElementBits: 8
75 - &imm01 # This immediate should be only 0 or 1
76 class: immediate
77 const: 0 # place holder
78 name: index
79 out:
80 - *i8x2N
81
82 - go: "GetHi|GetLo"
83 asm: "VEXTRACTI128|VEXTRACTI64X4"
84 regexpTag: "move"
85 inVariant: []
86 in:
87 - *i8x2N
88 - *imm01
89 out:
90 - *i8xN
91
92 - go: "SetHi|SetLo"
93 asm: "VINSERTI128|VINSERTI64X4"
94 regexpTag: "move"
95 inVariant: []
96 in:
97 - &i16x2N
98 class: vreg
99 base: $t
100 OverwriteElementBits: 16
101 - &i16xN
102 class: vreg
103 base: $t
104 OverwriteElementBits: 16
105 - *imm01
106 out:
107 - *i16x2N
108
109 - go: "GetHi|GetLo"
110 regexpTag: "move"
111 asm: "VEXTRACTI128|VEXTRACTI64X4"
112 inVariant: []
113 in:
114 - *i16x2N
115 - *imm01
116 out:
117 - *i16xN
118
119 - go: "SetHi|SetLo"
120 regexpTag: "move"
121 asm: "VINSERTI128|VINSERTI64X4"
122 inVariant: []
123 in:
124 - &i32x2N
125 class: vreg
126 base: $t
127 OverwriteElementBits: 32
128 - &i32xN
129 class: vreg
130 base: $t
131 OverwriteElementBits: 32
132 - *imm01
133 out:
134 - *i32x2N
135
136 - go: "GetHi|GetLo"
137 regexpTag: "move"
138 asm: "VEXTRACTI128|VEXTRACTI64X4"
139 inVariant: []
140 in:
141 - *i32x2N
142 - *imm01
143 out:
144 - *i32xN
145
146 - go: "SetHi|SetLo"
147 regexpTag: "move"
148 asm: "VINSERTI128|VINSERTI64X4"
149 inVariant: []
150 in:
151 - &i64x2N
152 class: vreg
153 base: $t
154 OverwriteElementBits: 64
155 - &i64xN
156 class: vreg
157 base: $t
158 OverwriteElementBits: 64
159 - *imm01
160 out:
161 - *i64x2N
162
163 - go: "GetHi|GetLo"
164 regexpTag: "move"
165 asm: "VEXTRACTI128|VEXTRACTI64X4"
166 inVariant: []
167 in:
168 - *i64x2N
169 - *imm01
170 out:
171 - *i64xN
172
173 - go: "SetHi|SetLo"
174 regexpTag: "move"
175 asm: "VINSERTF128|VINSERTF64X4"
176 inVariant: []
177 in:
178 - &f32x2N
179 class: vreg
180 base: $t
181 OverwriteElementBits: 32
182 - &f32xN
183 class: vreg
184 base: $t
185 OverwriteElementBits: 32
186 - *imm01
187 out:
188 - *f32x2N
189
190 - go: "GetHi|GetLo"
191 regexpTag: "move"
192 asm: "VEXTRACTF128|VEXTRACTF64X4"
193 inVariant: []
194 in:
195 - *f32x2N
196 - *imm01
197 out:
198 - *f32xN
199
200 - go: "SetHi|SetLo"
201 regexpTag: "move"
202 asm: "VINSERTF128|VINSERTF64X4"
203 inVariant: []
204 in:
205 - &f64x2N
206 class: vreg
207 base: $t
208 OverwriteElementBits: 64
209 - &f64xN
210 class: vreg
211 base: $t
212 OverwriteElementBits: 64
213 - *imm01
214 out:
215 - *f64x2N
216
217 - go: "GetHi|GetLo"
218 regexpTag: "move"
219 asm: "VEXTRACTF128|VEXTRACTF64X4"
220 inVariant: []
221 in:
222 - *f64x2N
223 - *imm01
224 out:
225 - *f64xN
226
227 - go: Permute
228 asm: "VPERMQ|VPERMPD"
229 addDoc: !string |-
230 // The low 2 bits (values 0-3) of each element of indices is used
231 operandOrder: "21Type1"
232 in:
233 - &anyindices
234 go: $t
235 name: indices
236 overwriteBase: uint
237 - &any4
238 go: $t
239 lanes: 4
240 out:
241 - &any
242 go: $t
243
244 - go: Permute
245 asm: "VPERM[WDQ]|VPERMP[SD]"
246 addDoc: !string |-
247 // The low 3 bits (values 0-7) of each element of indices is used
248 operandOrder: "21Type1"
249 in:
250 - *anyindices
251 - &any8
252 go: $t
253 lanes: 8
254 out:
255 - *any
256
257 - go: Permute
258 asm: "VPERM[BWD]|VPERMPS"
259 addDoc: !string |-
260 // The low 4 bits (values 0-15) of each element of indices is used
261 operandOrder: "21Type1"
262 in:
263 - *anyindices
264 - &any16
265 go: $t
266 lanes: 16
267 out:
268 - *any
269
270 - go: Permute
271 asm: "VPERM[BW]"
272 addDoc: !string |-
273 // The low 5 bits (values 0-31) of each element of indices is used
274 operandOrder: "21Type1"
275 in:
276 - *anyindices
277 - &any32
278 go: $t
279 lanes: 32
280 out:
281 - *any
282
283 - go: Permute
284 asm: "VPERMB"
285 addDoc: !string |-
286 // The low 6 bits (values 0-63) of each element of indices is used
287 operandOrder: "21Type1"
288 in:
289 - *anyindices
290 - &any64
291 go: $t
292 lanes: 64
293 out:
294 - *any
295
296 - go: ConcatPermute
297 asm: "VPERMI2[BWDQ]|VPERMI2P[SD]"
298 # Because we are overwriting the receiver's type, we
299 # have to move the receiver to be a parameter so that
300 # we can have no duplication.
301 operandOrder: "231Type1"
302 in:
303 - *anyindices # result in arg 0
304 - *any
305 - *any
306 out:
307 - *any
308
309 - go: Compress
310 asm: "VPCOMPRESS[BWDQ]|VCOMPRESSP[SD]"
311 in:
312 # The mask in Compress is a control mask rather than a write mask, so it's not optional.
313 - class: mask
314 - *any
315 out:
316 - *any
317
318 # For now a non-public method because
319 # (1) [OverwriteClass] must be set together with [OverwriteBase]
320 # (2) "simdgen does not support [OverwriteClass] in inputs".
321 # That means the signature is wrong.
322 - go: blend
323 asm: VPBLENDVB
324 zeroing: false
325 in:
326 - &v
327 go: $t
328 class: vreg
329 base: int
330 - *v
331 -
332 class: vreg
333 base: int
334 name: mask
335 out:
336 - *v
337
338 # For AVX512
339 - go: blend
340 asm: VPBLENDM[BWDQ]
341 zeroing: false
342 in:
343 - &v
344 go: $t
345 bits: 512
346 class: vreg
347 base: int
348 - *v
349 inVariant:
350 -
351 class: mask
352 out:
353 - *v
354
355 # For AVX512
356 - go: move
357 asm: VMOVDQU(8|16|32|64)
358 zeroing: true
359 in:
360 - &v
361 go: $t
362 class: vreg
363 base: int|uint
364 inVariant:
365 -
366 class: mask
367 out:
368 - *v
369
370 - go: Expand
371 asm: "VPEXPAND[BWDQ]|VEXPANDP[SD]"
372 in:
373 # The mask in Expand is a control mask rather than a write mask, so it's not optional.
374 - class: mask
375 - *any
376 out:
377 - *any
378
379 - go: Broadcast128
380 asm: VPBROADCAST[BWDQ]
381 in:
382 - class: vreg
383 bits: 128
384 elemBits: $e
385 base: $b
386 out:
387 - class: vreg
388 bits: 128
389 elemBits: $e
390 base: $b
391
392 # weirdly, this one case on AVX2 is memory-operand-only
393 - go: Broadcast128
394 asm: VPBROADCASTQ
395 in:
396 - class: vreg
397 bits: 128
398 elemBits: 64
399 base: int
400 OverwriteBase: float
401 out:
402 - class: vreg
403 bits: 128
404 elemBits: 64
405 base: int
406 OverwriteBase: float
407
408 - go: Broadcast256
409 asm: VPBROADCAST[BWDQ]
410 in:
411 - class: vreg
412 bits: 128
413 elemBits: $e
414 base: $b
415 out:
416 - class: vreg
417 bits: 256
418 elemBits: $e
419 base: $b
420
421 - go: Broadcast512
422 asm: VPBROADCAST[BWDQ]
423 in:
424 - class: vreg
425 bits: 128
426 elemBits: $e
427 base: $b
428 out:
429 - class: vreg
430 bits: 512
431 elemBits: $e
432 base: $b
433
434 - go: Broadcast128
435 asm: VBROADCASTS[SD]
436 in:
437 - class: vreg
438 bits: 128
439 elemBits: $e
440 base: $b
441 out:
442 - class: vreg
443 bits: 128
444 elemBits: $e
445 base: $b
446
447 - go: Broadcast256
448 asm: VBROADCASTS[SD]
449 in:
450 - class: vreg
451 bits: 128
452 elemBits: $e
453 base: $b
454 out:
455 - class: vreg
456 bits: 256
457 elemBits: $e
458 base: $b
459
460 - go: Broadcast512
461 asm: VBROADCASTS[SD]
462 in:
463 - class: vreg
464 bits: 128
465 elemBits: $e
466 base: $b
467 out:
468 - class: vreg
469 bits: 512
470 elemBits: $e
471 base: $b
472
473 # VPSHUFB for 128-bit byte shuffles will be picked with higher priority than VPERMB, given its lower CPU feature requirement. (It's AVX)
474 - go: PermuteOrZero
475 asm: VPSHUFB
476 addDoc: !string |-
477 // The lower four bits of each byte-sized index in indices select an element from x,
478 // unless the index's sign bit is set in which case zero is used instead.
479 in:
480 - &128any
481 bits: 128
482 go: $t
483 - bits: 128
484 name: indices
485 base: int # always signed
486 out:
487 - *128any
488
489 - go: PermuteOrZeroGrouped
490 asm: VPSHUFB
491 addDoc: !string |-
492 // result = {x_group0[indices[0]], x_group0[indices[1]], ..., x_group1[indices[16]], x_group1[indices[17]], ...}
493 // The lower four bits of each byte-sized index in indices select an element from its corresponding group in x,
494 // unless the index's sign bit is set in which case zero is used instead.
495 // Each group is of size 128-bit.
496 in:
497 - &256Or512any
498 bits: "256|512"
499 go: $t
500 - bits: "256|512"
501 base: int
502 name: indices
503 out:
504 - *256Or512any
505
506 - go: permuteScalars
507 asm: VPSHUFD
508 addDoc: !string |-
509 // result = {x[indices[0:2]], x[indices[2:4]], x[indices[4:6]], x[indices[6:8]]}
510 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
511 in:
512 - *128any
513 - class: immediate
514 immOffset: 0
515 name: indices
516 hideMaskMethods: true
517 out:
518 - *128any
519
520 - go: permuteScalarsGrouped
521 asm: VPSHUFD
522 addDoc: !string |-
523 // result = {x_group0[indices[0:2]], x_group0[indices[2:4]], x_group0[indices[4:6]], x_group0[indices[6:8]], x_group1[indices[0:2]], ...}
524 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
525 // Each group is of size 128-bit.
526 in:
527 - *256Or512any
528 - class: immediate
529 immOffset: 0
530 name: indices
531 hideMaskMethods: true
532 out:
533 - *256Or512any
534
535 - go: permuteScalarsLo
536 asm: VPSHUFLW
537 addDoc: !string |-
538 // result = {x[indices[0:2]], x[indices[2:4]], x[indices[4:6]], x[indices[6:8]], x[4], x[5], x[6], x[7]}
539 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
540 in:
541 - &128lanes8
542 bits: 128
543 go: $t
544 elemBits: 16
545 - class: immediate
546 immOffset: 0
547 name: indices
548 hideMaskMethods: true
549 out:
550 - *128lanes8
551
552 - go: permuteScalarsLoGrouped
553 asm: VPSHUFLW
554 addDoc: !string |-
555 //
556 // result = {x_group0[indices[0:2]], x_group0[indices[2:4]], x_group0[indices[4:6]], x_group0[indices[6:8]], x[4], x[5], x[6], x[7],
557 // x_group1[indices[0:2]], ...}
558 //
559 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
560 // Each group is of size 128-bit.
561 in:
562 - &256Or512lanes8
563 bits: "256|512"
564 go: $t
565 elemBits: 16
566 - class: immediate
567 immOffset: 0
568 name: indices
569 hideMaskMethods: true
570 out:
571 - *256Or512lanes8
572
573 - go: permuteScalarsHi
574 asm: VPSHUFHW
575 addDoc: !string |-
576 // result = {x[0], x[1], x[2], x[3], x[indices[0:2]+4], x[indices[2:4]+4], x[indices[4:6]+4], x[indices[6:8]+4]}
577 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
578 in:
579 - *128lanes8
580 - class: immediate
581 immOffset: 0
582 name: indices
583 hideMaskMethods: true
584 out:
585 - *128lanes8
586
587 - go: permuteScalarsHiGrouped
588 asm: VPSHUFHW
589 addDoc: !string |-
590 // result =
591 //
592 // {x_group0[0], x_group0[1], x_group0[2], x_group0[3], x_group0[indices[0:2]+4], x_group0[indices[2:4]+4], x_group0[indices[4:6]+4], x_group0[indices[6:8]+4],
593 // x_group1[0], x_group1[1], x_group1[2], x_group1[3], x_group1[indices[0:2]+4], ...}
594 //
595 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
596 // Each group is of size 128-bit.
597 in:
598 - *256Or512lanes8
599 - class: immediate
600 immOffset: 0
601 name: indices
602 hideMaskMethods: true
603 out:
604 - *256Or512lanes8
605
606 - go: InterleaveHi
607 asm: VPUNPCKH(QDQ|DQ|WD|WB)
608 in:
609 - *128any
610 - *128any
611 inVariant: []
612 out:
613 - *128any
614
615 - go: InterleaveLo
616 asm: VPUNPCKL(QDQ|DQ|WD|WB)
617 in:
618 - *128any
619 - *128any
620 inVariant: []
621 out:
622 - *128any
623
624 - go: InterleaveHiGrouped
625 asm: VPUNPCKH(QDQ|DQ|WD|WB)
626 in:
627 - *256Or512any
628 - *256Or512any
629 inVariant: []
630 out:
631 - *256Or512any
632
633 - go: InterleaveLoGrouped
634 asm: VPUNPCKL(QDQ|DQ|WD|WB)
635 in:
636 - *256Or512any
637 - *256Or512any
638 inVariant: []
639 out:
640 - *256Or512any
641
642 # These are all described separately to carry the name of the constant parameter
643
644 - go: concatSelectedConstant
645 asm: VSHUFPS
646 width: 32
647 in:
648 - &v
649 go: $t
650 class: vreg
651 base: float
652 bits: 128
653 - *v
654 - class: immediate
655 immOffset: 0
656 name: h1h0l1l0
657 inVariant: []
658 out:
659 - *v
660
661 - go: concatSelectedConstant
662 asm: VSHUFPS
663 in:
664 - &v
665 go: $t
666 class: vreg
667 base: float
668 bits: 128
669 OverwriteBase: int
670 - *v
671 - class: immediate
672 immOffset: 0
673 name: h1h0l1l0
674 inVariant: []
675 out:
676 - *v
677
678 - go: concatSelectedConstant
679 asm: VSHUFPS
680 in:
681 - &v
682 go: $t
683 class: vreg
684 base: float
685 bits: 128
686 OverwriteBase: uint
687 - *v
688 - class: immediate
689 immOffset: 0
690 name: h1h0l1l0
691 inVariant: []
692 out:
693 - *v
694
695
696 - go: concatSelectedConstantGrouped
697 asm: VSHUFPS
698 in:
699 - &v
700 go: $t
701 class: vreg
702 base: float
703 bits: "256|512"
704 - *v
705 - class: immediate
706 immOffset: 0
707 name: h1h0l1l0
708 inVariant: []
709 out:
710 - *v
711
712 - go: concatSelectedConstantGrouped
713 asm: VSHUFPS
714 in:
715 - &v
716 go: $t
717 class: vreg
718 base: float
719 bits: "256|512"
720 OverwriteBase: int
721 - *v
722 - class: immediate
723 immOffset: 0
724 name: h1h0l1l0
725 inVariant: []
726 out:
727 - *v
728
729 - go: concatSelectedConstantGrouped
730 asm: VSHUFPS
731 in:
732 - &v
733 go: $t
734 class: vreg
735 base: float
736 bits: "256|512"
737 OverwriteBase: uint
738 - *v
739 - class: immediate
740 immOffset: 0
741 name: h1h0l1l0
742 inVariant: []
743 out:
744 - *v
745
746
747 # 64 bit versions
748
749 - go: concatSelectedConstant
750 asm: VSHUFPD
751 in:
752 - &v
753 go: $t
754 class: vreg
755 base: float
756 bits: 128
757 - *v
758 - class: immediate
759 immOffset: 0
760 name: hilo
761 inVariant: []
762 out:
763 - *v
764
765 - go: concatSelectedConstant
766 asm: VSHUFPD
767 in:
768 - &v
769 go: $t
770 class: vreg
771 base: float
772 bits: 128
773 OverwriteBase: int
774 - *v
775 - class: immediate
776 immOffset: 0
777 name: hilo
778 inVariant: []
779 out:
780 - *v
781
782 - go: concatSelectedConstant
783 asm: VSHUFPD
784 in:
785 - &v
786 go: $t
787 class: vreg
788 base: float
789 bits: 128
790 OverwriteBase: uint
791 - *v
792 - class: immediate
793 immOffset: 0
794 name: hilo
795 inVariant: []
796 out:
797 - *v
798
799 - go: concatSelectedConstantGrouped
800 asm: VSHUFPD
801 in:
802 - &v
803 go: $t
804 class: vreg
805 base: float
806 bits: "256|512"
807 - *v
808 - class: immediate
809 immOffset: 0
810 name: hilos
811 inVariant: []
812 out:
813 - *v
814
815 - go: concatSelectedConstantGrouped
816 asm: VSHUFPD
817 in:
818 - &v
819 go: $t
820 class: vreg
821 base: float
822 bits: "256|512"
823 OverwriteBase: int
824 - *v
825 - class: immediate
826 immOffset: 0
827 name: hilos
828 inVariant: []
829 out:
830 - *v
831
832 - go: concatSelectedConstantGrouped
833 asm: VSHUFPD
834 in:
835 - &v
836 go: $t
837 class: vreg
838 base: float
839 bits: "256|512"
840 OverwriteBase: uint
841 - *v
842 - class: immediate
843 immOffset: 0
844 name: hilos
845 inVariant: []
846 out:
847 - *v
848
849 - go: Select128FromPair
850 asm: VPERM2F128
851 operandOrder: II
852 addDoc: !string |-
853 // For example,
854 //
855 // {40, 41, 50, 51}.NAME(3, 0, {60, 61, 70, 71})
856 //
857 // returns {70, 71, 40, 41}.
858 in:
859 - &v
860 go: $t
861 class: vreg
862 base: float
863 bits: 256
864 - *v
865 - class: immediate
866 immOffset: 0
867 name: "lo, hi"
868 inVariant: []
869 out:
870 - *v
871
872 - go: Select128FromPair
873 asm: VPERM2F128
874 operandOrder: II
875 addDoc: !string |-
876 // For example,
877 //
878 // {40, 41, 42, 43, 50, 51, 52, 53}.NAME(3, 0, {60, 61, 62, 63, 70, 71, 72, 73})
879 //
880 // returns {70, 71, 72, 73, 40, 41, 42, 43}.
881 in:
882 - &v
883 go: $t
884 class: vreg
885 base: float
886 bits: 256
887 OverwriteElementBits: 32
888 - *v
889 - class: immediate
890 immOffset: 0
891 name: "lo, hi"
892 inVariant: []
893 out:
894 - *v
895
896 - go: Select128FromPair
897 asm: VPERM2I128
898 operandOrder: II
899 addDoc: !string |-
900 // For example,
901 //
902 // {40, 41, 50, 51}.NAME(3, 0, {60, 61, 70, 71})
903 //
904 // returns {70, 71, 40, 41}.
905 in:
906 - &v
907 go: $t
908 class: vreg
909 base: int|uint
910 bits: 256
911 OverwriteElementBits: 64
912 - *v
913 - class: immediate
914 immOffset: 0
915 name: "lo, hi"
916 inVariant: []
917 out:
918 - *v
919
920 - go: Select128FromPair
921 asm: VPERM2I128
922 operandOrder: II
923 addDoc: !string |-
924 // For example,
925 //
926 // {40, 41, 42, 43, 50, 51, 52, 53}.NAME(3, 0, {60, 61, 62, 63, 70, 71, 72, 73})
927 //
928 // returns {70, 71, 72, 73, 40, 41, 42, 43}.
929 in:
930 - &v
931 go: $t
932 class: vreg
933 base: int|uint
934 bits: 256
935 OverwriteElementBits: 32
936 - *v
937 - class: immediate
938 immOffset: 0
939 name: "lo, hi"
940 inVariant: []
941 out:
942 - *v
943
944 - go: Select128FromPair
945 asm: VPERM2I128
946 operandOrder: II
947 addDoc: !string |-
948 // For example,
949 //
950 // {40, 41, 42, 43, 44, 45, 46, 47, 50, 51, 52, 53, 54, 55, 56, 57}.NAME(3, 0,
951 // {60, 61, 62, 63, 64, 65, 66, 67, 70, 71, 72, 73, 74, 75, 76, 77})
952 //
953 // returns {70, 71, 72, 73, 74, 75, 76, 77, 40, 41, 42, 43, 44, 45, 46, 47}.
954 in:
955 - &v
956 go: $t
957 class: vreg
958 base: int|uint
959 bits: 256
960 OverwriteElementBits: 16
961 - *v
962 - class: immediate
963 immOffset: 0
964 name: "lo, hi"
965 inVariant: []
966 out:
967 - *v
968
969 - go: Select128FromPair
970 asm: VPERM2I128
971 operandOrder: II
972 addDoc: !string |-
973 // For example,
974 //
975 // {0x40, 0x41, ..., 0x4f, 0x50, 0x51, ..., 0x5f}.NAME(3, 0,
976 // {0x60, 0x61, ..., 0x6f, 0x70, 0x71, ..., 0x7f})
977 //
978 // returns {0x70, 0x71, ..., 0x7f, 0x40, 0x41, ..., 0x4f}.
979 in:
980 - &v
981 go: $t
982 class: vreg
983 base: int|uint
984 bits: 256
985 OverwriteElementBits: 8
986 - *v
987 - class: immediate
988 immOffset: 0
989 name: "lo, hi"
990 inVariant: []
991 out:
992 - *v
993
994 - go: ConcatShiftBytesRight
995 asm: VPALIGNR
996 in:
997 - &uint128
998 go: $t
999 base: uint
1000 bits: 128
1001 - *uint128
1002 - class: immediate
1003 immOffset: 0
1004 out:
1005 - *uint128
1006
1007 - go: ConcatShiftBytesRightGrouped
1008 asm: VPALIGNR
1009 in:
1010 - &uint256512
1011 go: $t
1012 base: uint
1013 bits: 256|512
1014 - *uint256512
1015 - class: immediate
1016 immOffset: 0
1017 out:
1018 - *uint256512
1019
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