Text file src/simd/archsimd/_gen/simdgen/ops/NegAbs/go_arm64.yaml
1 !sum 2 # Signed integer Neg — VNEG 3 - go: Neg 4 asm: "VNEG" 5 in: 6 - &int 7 go: $t 8 base: int 9 out: 10 - *int 11 12 # Float Neg — VFNEG 13 - go: Neg 14 asm: "VFNEG" 15 in: 16 - &float 17 go: $t 18 base: float 19 out: 20 - *float 21 22 # Signed integer Abs — VABS 23 - go: Abs 24 asm: "VABS" 25 in: 26 - *int 27 out: 28 - *int 29 30 # Float Abs — VFABS 31 - go: Abs 32 asm: "VFABS" 33 in: 34 - *float 35 out: 36 - *float 37