Text file src/simd/archsimd/_gen/simdgen/ops/ShiftRotate/go_arm64.yaml

     1  !sum
     2  
     3  # Shift by vector
     4  - go: Shift
     5    signed: true
     6    asm: "VSSHL"
     7    in:
     8    - &int
     9      go: $t
    10      base: int
    11    - *int
    12    out:
    13    - *int
    14  
    15  - go: Shift
    16    signed: false
    17    asm: "VUSHL"
    18    in:
    19    - &uint
    20      go: $t
    21      base: uint
    22    - &uintAsInt
    23      go: $t
    24      base: uint
    25      OverwriteBase: int
    26    out:
    27    - *uint
    28  
    29  - go: ShiftSaturated
    30    signed: true
    31    asm: "VSQSHL"
    32    in:
    33    - *int
    34    - *int
    35    out:
    36    - *int
    37  
    38  - go: ShiftSaturated
    39    signed: false
    40    asm: "VUQSHL"
    41    in:
    42    - *uint
    43    - *uintAsInt
    44    out:
    45    - *uint
    46  
    47  # Shift right by constant
    48  - go: shiftAllRightConst
    49    signed: true
    50    asm: "VSSHR"
    51    specialLower: "if a==0 => x"
    52    in:
    53    - &imm
    54      class: immediate
    55      immOffset: 0
    56    - *int
    57    out:
    58    - *int
    59  
    60  - go: shiftAllRightConst
    61    signed: false
    62    asm: "VUSHR"
    63    specialLower: "if a==0 => x"
    64    in:
    65    - *imm
    66    - *uint
    67    out:
    68    - *uint
    69  
    70  # Shift left by constant
    71  - go: shiftAllLeftConst
    72    signed: true
    73    asm: "VSHL"
    74    specialLower: "if a==0 => x"
    75    in:
    76    - *imm
    77    - *int
    78    out:
    79    - *int
    80  
    81  - go: shiftAllLeftConst
    82    signed: false
    83    asm: "VSHL"
    84    specialLower: "if a==0 => x"
    85    in:
    86    - *imm
    87    - *uint
    88    out:
    89    - *uint
    90  
    91  # Shift left saturated by constant
    92  - go: shiftLeftSaturatedConst
    93    signed: true
    94    asm: "VSQSHL"
    95    SSAVariant: "const"
    96    specialLower: "if a==0 => x"
    97    in:
    98    - *imm
    99    - *int
   100    out:
   101    - *int
   102  
   103  - go: shiftLeftSaturatedConst
   104    signed: false
   105    asm: "VUQSHL"
   106    SSAVariant: "const"
   107    specialLower: "if a==0 => x"
   108    in:
   109    - *imm
   110    - *uint
   111    out:
   112    - *uint
   113  
   114  # Shift all lanes in vector x by the same unsigned scalar amount y.
   115  # ShiftAll* are lowered to corresponding ShiftConst* if the amount is constant and fits into immediate,
   116  # otherwise fallback to the Shift intrinsic using sign to specify shift direction, e.g.:
   117  #   x.Shift(Zero.SetElem(0, -y).Broadcast1ToN()) for shift right
   118  #   x.Shift(Zero.SetElem(0,  y).Broadcast1ToN()) for shift left
   119  - go: ShiftAllLeft
   120    signed: true
   121    asm: "VSSHL"
   122    specialLower: !string |-
   123      earlymatch (%g x y) => (VSSHL%a x (VDUP%sbcast [0] (VMOV%sins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
   124  
   125    in:
   126    - *int
   127    - &scalarShiftSigned
   128      go: $t
   129      base: int
   130      treatLikeAScalarOfSize: 64
   131    out:
   132    - *int
   133  
   134  - go: ShiftAllLeft
   135    signed: false
   136    asm: "VUSHL"
   137    specialLower: !string "earlymatch (%g x y) => (VUSHL%a x (VDUP%sbcast [0] (VMOV%sins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))"
   138    in:
   139    - *uint
   140    - &scalarShiftUnsigned
   141      go: $t
   142      base: uint
   143      treatLikeAScalarOfSize: 64
   144      OverwriteBase: int
   145    out:
   146    - *uint
   147  
   148  - go: ShiftAllRight
   149    signed: true
   150    asm: "VSSHL"
   151    specialLower: !string "earlymatch (%g x y) => (VSSHL%a x (VDUP%sbcast [0] (VMOV%sins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))"
   152    in:
   153    - *int
   154    - *scalarShiftSigned
   155    out:
   156    - *int
   157  
   158  - go: ShiftAllRight
   159    signed: false
   160    asm: "VUSHL"
   161    specialLower: !string "earlymatch (%g x y) => (VUSHL%a x (VDUP%sbcast [0] (VMOV%sins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))"
   162    in:
   163    - *uint
   164    - *scalarShiftUnsigned
   165    out:
   166    - *uint
   167  
   168  - go: shiftRightNarrowConst
   169    asm: "VSHRN"
   170    hiHalfAsm: "VSHRN2"
   171    specialLower: !string "match (%h [0] x) => (VXTN%a x)"
   172    in:
   173    - *imm
   174    - go: $t
   175      base: uint
   176    out:
   177    - go: $u
   178      base: uint
   179  
   180  - go: shiftLeftWidenLoConst
   181    signed: false
   182    asm: "VUSHLL"
   183    hiHalfAsm: "VUSHLL2"
   184    in:
   185    - *imm
   186    - go: $t
   187      base: uint
   188    out:
   189    - go: $u
   190      base: uint
   191  
   192  - go: shiftLeftWidenLoConst
   193    signed: true
   194    asm: "VSSHLL"
   195    hiHalfAsm: "VSSHLL2"
   196    in:
   197    - *imm
   198    - go: $t
   199      base: int
   200    out:
   201    - go: $u
   202      base: int
   203  

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