Text file src/simd/archsimd/_gen/simdgen/ops/ShiftRotate/go_sve.yaml

     1  !sum
     2  # ShiftAllLeft — shift every element left by one amount. The amount is a
     3  # scalar in the API, which the lowering broadcasts into the 64-bit lanes of the
     4  # vector LSL (wide elements) shifts each narrower element by. LSL gives 0 for
     5  # an amount of the element width or more, as the API does, so the amount needs
     6  # no clamping. A constant amount below the element width becomes the immediate
     7  # form, shiftAllLeftConst (sftimm).
     8  - go: ShiftAllLeft
     9    asm: "ZLSL"
    10    specialLower: sftimm
    11    in:
    12    - &int
    13      go: $t
    14      base: int|uint
    15    - &wideShift
    16      class: vreg
    17      elemBits: 64
    18      treatLikeAScalarOfSize: 64
    19      name: shift
    20    out:
    21    - *int
    22  
    23  # LSL has no wide form for 64-bit elements; LSL (vectors) takes the amount
    24  # from each element of a vector instead, and gives 0 for 64 or more.
    25  - go: ShiftAllLeft
    26    asm: "ZLSL"
    27    specialLower: sftimm
    28    in:
    29    - &int64
    30      go: $t
    31      base: int|uint
    32      elemBits: 64
    33    - *wideShift
    34    - class: mask # governing predicate
    35    out:
    36    - *int64
    37  
    38  # shiftAllLeftConst — LSL (immediate, unpredicated), a shift by an amount
    39  # below the element width. No API; sftimm lowers ShiftAllLeft to it.
    40  - go: shiftAllLeftConst
    41    asm: "ZLSL"
    42    ssaVariant: "const"
    43    in:
    44    - class: immediate
    45    - *int
    46    out:
    47    - *int
    48  

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