1 !sum
2 # Float <-> Int conversions
3 # float32 -> int32
4 - go: ConvertToInt32
5 regexpTag: "convert"
6 asm: "VCVTTPS2DQ"
7 in:
8 - &fp
9 go: $t
10 base: float
11 out:
12 - &i32
13 go: $u
14 base: int
15 elemBits: 32
16 # float32 -> uint32
17 - go: ConvertToUint32
18 regexpTag: "convert"
19 asm: "VCVTPS2UDQ"
20 in:
21 - *fp
22 out:
23 - &u32
24 go: $u
25 base: uint
26 elemBits: 32
27 # Widening integer conversions.
28 # uint8 -> uint16
29 - go: ExtendToUint16
30 addDoc: &zeroExtendDoc
31 !string |-
32 // The result vector's elements are zero-extended.
33 regexpTag: "convert"
34 asm: "VPMOVZXBW"
35 in:
36 - &u8x16
37 base: uint
38 elemBits: 8
39 bits: 128
40 out:
41 - &u16x16
42 base: uint
43 elemBits: 16
44 bits: 256
45 - go: ExtendToUint16
46 regexpTag: "convert"
47 asm: "VPMOVZXBW"
48 addDoc: *zeroExtendDoc
49 in:
50 - &u8x32
51 base: uint
52 elemBits: 8
53 bits: 256
54 out:
55 - &u16x32
56 base: uint
57 elemBits: 16
58 bits: 512
59 # int8 -> int16
60 - go: ExtendToInt16
61 regexpTag: "convert"
62 asm: "VPMOVSXBW"
63 addDoc: &signExtendDoc
64 !string |-
65 // The result vector's elements are sign-extended.
66 in:
67 - &i8x16
68 base: int
69 elemBits: 8
70 bits: 128
71 out:
72 - &i16x16
73 base: int
74 elemBits: 16
75 bits: 256
76 - go: ExtendToInt16
77 regexpTag: "convert"
78 asm: "VPMOVSXBW"
79 addDoc: *signExtendDoc
80 in:
81 - &i8x32
82 base: int
83 elemBits: 8
84 bits: 256
85 out:
86 - &i16x32
87 base: int
88 elemBits: 16
89 bits: 512
90 # uint16->uint32
91 - go: ExtendToUint32
92 regexpTag: "convert"
93 asm: "VPMOVZXWD"
94 addDoc: *zeroExtendDoc
95 in:
96 - &u16x8
97 base: uint
98 elemBits: 16
99 bits: 128
100 out:
101 - &u32x8
102 base: uint
103 elemBits: 32
104 bits: 256
105 - go: ExtendToUint32
106 regexpTag: "convert"
107 asm: "VPMOVZXWD"
108 addDoc: *zeroExtendDoc
109 in:
110 - *u16x16
111 out:
112 - &u32x16
113 base: uint
114 elemBits: 32
115 bits: 512
116 # int16->int32
117 - go: ExtendToInt32
118 regexpTag: "convert"
119 asm: "VPMOVSXWD"
120 addDoc: *signExtendDoc
121 in:
122 - &i16x8
123 base: int
124 elemBits: 16
125 bits: 128
126 out:
127 - &i32x8
128 base: int
129 elemBits: 32
130 bits: 256
131 - go: ExtendToInt32
132 regexpTag: "convert"
133 asm: "VPMOVSXWD"
134 addDoc: *signExtendDoc
135 in:
136 - *i16x16
137 out:
138 - &i32x16
139 base: int
140 elemBits: 32
141 bits: 512
142 # uint32 -> uint64
143 - go: ExtendToUint64
144 regexpTag: "convert"
145 asm: "VPMOVZXDQ"
146 addDoc: *zeroExtendDoc
147 in:
148 - &u32x4
149 base: uint
150 elemBits: 32
151 bits: 128
152 out:
153 - &u64x4
154 base: uint
155 elemBits: 64
156 bits: 256
157 - go: ExtendToUint64
158 regexpTag: "convert"
159 asm: "VPMOVZXDQ"
160 addDoc: *zeroExtendDoc
161 in:
162 - *u32x8
163 out:
164 - &u64x8
165 base: uint
166 elemBits: 64
167 bits: 512
168 # int32 -> int64
169 - go: ExtendToInt64
170 regexpTag: "convert"
171 asm: "VPMOVSXDQ"
172 addDoc: *signExtendDoc
173 in:
174 - &i32x4
175 base: int
176 elemBits: 32
177 bits: 128
178 out:
179 - &i64x4
180 base: int
181 elemBits: 64
182 bits: 256
183 - go: ExtendToInt64
184 regexpTag: "convert"
185 asm: "VPMOVSXDQ"
186 addDoc: *signExtendDoc
187 in:
188 - *i32x8
189 out:
190 - &i64x8
191 base: int
192 elemBits: 64
193 bits: 512
194 # uint16 -> uint64
195 - go: ExtendToUint64
196 regexpTag: "convert"
197 asm: "VPMOVZXWQ"
198 addDoc: *zeroExtendDoc
199 in:
200 - *u16x8
201 out:
202 - *u64x8
203 # int16 -> int64
204 - go: ExtendToInt64
205 regexpTag: "convert"
206 asm: "VPMOVSXWQ"
207 addDoc: *signExtendDoc
208 in:
209 - *i16x8
210 out:
211 - *i64x8
212 # uint8 -> uint32
213 - go: ExtendToUint32
214 regexpTag: "convert"
215 asm: "VPMOVZXBD"
216 addDoc: *zeroExtendDoc
217 in:
218 - *u8x16
219 out:
220 - *u32x16
221 # int8 -> int32
222 - go: ExtendToInt32
223 regexpTag: "convert"
224 asm: "VPMOVSXBD"
225 addDoc: *signExtendDoc
226 in:
227 - *i8x16
228 out:
229 - *i32x16
230 # Truncating conversions
231 - go: TruncateToInt8
232 regexpTag: "convert"
233 asm: "VPMOV[WDQ]B"
234 addDoc: &truncDocZeroUpper
235 !string |-
236 // Conversion is done with truncation on the vector elements.
237 // Results are packed to low elements in the returned vector, its upper elements are zero-cleared.
238 in:
239 - base: int
240 out:
241 - base: int
242 bits: 128
243 - go: TruncateToUint8
244 regexpTag: "convert"
245 asm: "VPMOV[WDQ]B"
246 addDoc: *truncDocZeroUpper
247 in:
248 - base: uint
249 out:
250 - base: uint
251 bits: 128
252 - go: TruncateToInt8
253 regexpTag: "convert"
254 asm: "VPMOV[WDQ]B"
255 addDoc: &truncDoc
256 !string |-
257 // Conversion is done with truncation on the vector elements.
258 in:
259 - base: int
260 out:
261 - base: int
262 bits: 256|512
263 - go: TruncateToUint8
264 regexpTag: "convert"
265 asm: "VPMOV[WDQ]B"
266 addDoc: *truncDoc
267 in:
268 - base: uint
269 out:
270 - base: uint
271 bits: 256|512
272 - go: TruncateToInt16
273 regexpTag: "convert"
274 asm: "VPMOV[DQ]W"
275 addDoc: *truncDoc
276 in:
277 - base: int
278 out:
279 - base: int
280 - go: TruncateToUint16
281 regexpTag: "convert"
282 asm: "VPMOV[DQ]W"
283 addDoc: *truncDoc
284 in:
285 - base: uint
286 out:
287 - base: uint
288 - go: TruncateToInt32
289 regexpTag: "convert"
290 asm: "VPMOVQD"
291 addDoc: *truncDoc
292 in:
293 - base: int
294 out:
295 - base: int
296 - go: TruncateToUint32
297 regexpTag: "convert"
298 asm: "VPMOVQD"
299 addDoc: *truncDoc
300 in:
301 - base: uint
302 out:
303 - base: uint
304 # Saturated conversions.
305 - go: SaturateToInt8
306 regexpTag: "convert"
307 asm: "VPMOVS[WDQ]B"
308 addDoc: &satDocZeroUpper
309 !string |-
310 // Conversion is done with saturation on the vector elements.
311 // Results are packed to low elements in the returned vector, its upper elements are zero-cleared.
312 in:
313 - base: int
314 out:
315 - base: int
316 bits: 128
317 - go: SaturateToUint8
318 regexpTag: "convert"
319 asm: "VPMOVS[WDQ]B"
320 addDoc: *satDocZeroUpper
321 in:
322 - base: int
323 out:
324 - base: int
325 bits: 128
326 - go: SaturateToInt8
327 regexpTag: "convert"
328 asm: "VPMOVS[WDQ]B"
329 addDoc: &satDoc
330 !string |-
331 // Conversion is done with saturation on the vector elements.
332 in:
333 - base: int
334 out:
335 - base: int
336 bits: 256|512
337 - go: SaturateToUint8
338 regexpTag: "convert"
339 asm: "VPMOVUS[WDQ]B"
340 addDoc: *satDoc
341 in:
342 - base: uint
343 out:
344 - base: uint
345 bits: 256|512
346 - go: SaturateToInt16
347 regexpTag: "convert"
348 asm: "VPMOVS[DQ]W"
349 addDoc: *satDoc
350 in:
351 - base: int
352 out:
353 - base: int
354 - go: SaturateToUint16
355 regexpTag: "convert"
356 asm: "VPMOVUS[DQ]W"
357 addDoc: *satDoc
358 in:
359 - base: uint
360 out:
361 - base: uint
362 - go: SaturateToInt32
363 regexpTag: "convert"
364 asm: "VPMOVSQD"
365 addDoc: *satDoc
366 in:
367 - base: int
368 out:
369 - base: int
370 - go: SaturateToUint32
371 regexpTag: "convert"
372 asm: "VPMOVUSQD"
373 addDoc: *satDoc
374 in:
375 - base: uint
376 out:
377 - base: uint
378 # Truncating saturated packed
379 - go: SaturateToInt16Concat
380 regexpTag: "convert"
381 asm: "VPACKSSDW"
382 addDoc: &satDocConcat
383 !string |-
384 // With each 128-bit as a group:
385 // The converted group from the first input vector will be packed to the lower part of the result vector,
386 // the converted group from the second input vector will be packed to the upper part of the result vector.
387 // Conversion is done with saturation on the vector elements.
388 in:
389 - base: int
390 - base: int
391 out:
392 - base: int
393 - go: SaturateToUint16Concat
394 regexpTag: "convert"
395 asm: "VPACKUSDW"
396 addDoc: *satDocConcat
397 in:
398 - base: uint
399 - base: uint
400 out:
401 - base: uint
402
403 # low-part only conversions.
404 # uint8->uint16
405 - go: ExtendLo8ToUint16x8
406 regexpTag: "convert"
407 asm: "VPMOVZXBW"
408 addDoc: *zeroExtendDoc
409 in:
410 - *u8x16
411 out:
412 - *u16x8
413 # int8->int16
414 - go: ExtendLo8ToInt16x8
415 regexpTag: "convert"
416 asm: "VPMOVSXBW"
417 addDoc: *signExtendDoc
418 in:
419 - *i8x16
420 out:
421 - *i16x8
422 # uint16->uint32
423 - go: ExtendLo4ToUint32x4
424 regexpTag: "convert"
425 asm: "VPMOVZXWD"
426 addDoc: *zeroExtendDoc
427 in:
428 - *u16x8
429 out:
430 - *u32x4
431 # int16->int32
432 - go: ExtendLo4ToInt32x4
433 regexpTag: "convert"
434 asm: "VPMOVSXWD"
435 addDoc: *signExtendDoc
436 in:
437 - *i16x8
438 out:
439 - *i32x4
440 # uint32 -> uint64
441 - go: ExtendLo2ToUint64x2
442 regexpTag: "convert"
443 asm: "VPMOVZXDQ"
444 addDoc: *zeroExtendDoc
445 in:
446 - *u32x4
447 out:
448 - &u64x2
449 base: uint
450 elemBits: 64
451 bits: 128
452 # int32 -> int64
453 - go: ExtendLo2ToInt64x2
454 regexpTag: "convert"
455 asm: "VPMOVSXDQ"
456 addDoc: *signExtendDoc
457 in:
458 - *i32x4
459 out:
460 - &i64x2
461 base: int
462 elemBits: 64
463 bits: 128
464 # uint16 -> uint64
465 - go: ExtendLo2ToUint64x2
466 regexpTag: "convert"
467 asm: "VPMOVZXWQ"
468 addDoc: *zeroExtendDoc
469 in:
470 - *u16x8
471 out:
472 - *u64x2
473 - go: ExtendLo4ToUint64x4
474 regexpTag: "convert"
475 asm: "VPMOVZXWQ"
476 addDoc: *zeroExtendDoc
477 in:
478 - *u16x8
479 out:
480 - *u64x4
481 # int16 -> int64
482 - go: ExtendLo2ToInt64x2
483 regexpTag: "convert"
484 asm: "VPMOVSXWQ"
485 addDoc: *signExtendDoc
486 in:
487 - *i16x8
488 out:
489 - *i64x2
490 - go: ExtendLo4ToInt64x4
491 regexpTag: "convert"
492 asm: "VPMOVSXWQ"
493 addDoc: *signExtendDoc
494 in:
495 - *i16x8
496 out:
497 - *i64x4
498 # uint8 -> uint32
499 - go: ExtendLo4ToUint32x4
500 regexpTag: "convert"
501 asm: "VPMOVZXBD"
502 addDoc: *zeroExtendDoc
503 in:
504 - *u8x16
505 out:
506 - *u32x4
507 - go: ExtendLo8ToUint32x8
508 regexpTag: "convert"
509 asm: "VPMOVZXBD"
510 addDoc: *zeroExtendDoc
511 in:
512 - *u8x16
513 out:
514 - *u32x8
515 # int8 -> int32
516 - go: ExtendLo4ToInt32x4
517 regexpTag: "convert"
518 asm: "VPMOVSXBD"
519 addDoc: *signExtendDoc
520 in:
521 - *i8x16
522 out:
523 - *i32x4
524 - go: ExtendLo8ToInt32x8
525 regexpTag: "convert"
526 asm: "VPMOVSXBD"
527 addDoc: *signExtendDoc
528 in:
529 - *i8x16
530 out:
531 - *i32x8
532 # uint8 -> uint64
533 - go: ExtendLo2ToUint64x2
534 regexpTag: "convert"
535 asm: "VPMOVZXBQ"
536 addDoc: *zeroExtendDoc
537 in:
538 - *u8x16
539 out:
540 - *u64x2
541 - go: ExtendLo4ToUint64x4
542 regexpTag: "convert"
543 asm: "VPMOVZXBQ"
544 addDoc: *zeroExtendDoc
545 in:
546 - *u8x16
547 out:
548 - *u64x4
549 - go: ExtendLo8ToUint64x8
550 regexpTag: "convert"
551 asm: "VPMOVZXBQ"
552 addDoc: *zeroExtendDoc
553 in:
554 - *u8x16
555 out:
556 - *u64x8
557 # int8 -> int64
558 - go: ExtendLo2ToInt64x2
559 regexpTag: "convert"
560 asm: "VPMOVSXBQ"
561 addDoc: *signExtendDoc
562 in:
563 - *i8x16
564 out:
565 - *i64x2
566 - go: ExtendLo4ToInt64x4
567 regexpTag: "convert"
568 asm: "VPMOVSXBQ"
569 addDoc: *signExtendDoc
570 in:
571 - *i8x16
572 out:
573 - *i64x4
574 - go: ExtendLo8ToInt64x8
575 regexpTag: "convert"
576 asm: "VPMOVSXBQ"
577 addDoc: *signExtendDoc
578 in:
579 - *i8x16
580 out:
581 - *i64x8
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